* [PATCH 21/21] ARM: tegra: clock: Miscellaneous clock updates
From: Colin Cross @ 2011-02-13 9:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1297590033-15035-1-git-send-email-ccross@android.com>
Correct max rates for pclk and sclk (Originally fixed by
Dima Zavin <dima@android.com>)
Correct max rate for plla (Originally fixed by
Stephen Warren <swarren@nvidia.com>)
Remove unnecessary no-op set_rate on audio clocks
Add clock lookup entries for grhost, bsea, and vde clocks
Update clock clookup entries for vcp, bsea, and vde clocks
Add shared clock entries for sclk and emc
Add a virtual cop clock to provide a reset op (Originally fixed by
Dima Zavin <dima@android.com>)
Pass set_rate on super clocks through to parent
Fix pllx frequency table entry for 608 MHz
Remove incorrect plla frequency table entries
Signed-off-by: Colin Cross <ccross@android.com>
---
arch/arm/mach-tegra/tegra2_clocks.c | 98 ++++++++++++++++++++++++-----------
1 files changed, 67 insertions(+), 31 deletions(-)
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index 00e348a..7799cba 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -362,11 +362,24 @@ static int tegra2_super_clk_set_parent(struct clk *c, struct clk *p)
return -EINVAL;
}
+/*
+ * Super clocks have "clock skippers" instead of dividers. Dividing using
+ * a clock skipper does not allow the voltage to be scaled down, so instead
+ * adjust the rate of the parent clock. This requires that the parent of a
+ * super clock have no other children, otherwise the rate will change
+ * underneath the other children.
+ */
+static int tegra2_super_clk_set_rate(struct clk *c, unsigned long rate)
+{
+ return clk_set_rate(c->parent, rate);
+}
+
static struct clk_ops tegra_super_ops = {
.init = tegra2_super_clk_init,
.enable = tegra2_super_clk_enable,
.disable = tegra2_super_clk_disable,
.set_parent = tegra2_super_clk_set_parent,
+ .set_rate = tegra2_super_clk_set_rate,
};
/* virtual cpu clock functions */
@@ -435,6 +448,20 @@ static struct clk_ops tegra_cpu_ops = {
.set_rate = tegra2_cpu_clk_set_rate,
};
+/* virtual cop clock functions. Used to acquire the fake 'cop' clock to
+ * reset the COP block (i.e. AVP) */
+static void tegra2_cop_clk_reset(struct clk *c, bool assert)
+{
+ unsigned long reg = assert ? RST_DEVICES_SET : RST_DEVICES_CLR;
+
+ pr_debug("%s %s\n", __func__, assert ? "assert" : "deassert");
+ clk_writel(1 << 1, reg);
+}
+
+static struct clk_ops tegra_cop_ops = {
+ .reset = tegra2_cop_clk_reset,
+};
+
/* bus clock functions */
static void tegra2_bus_clk_init(struct clk *c)
{
@@ -1224,30 +1251,10 @@ static int tegra2_audio_sync_clk_set_parent(struct clk *c, struct clk *p)
return -EINVAL;
}
-static int tegra2_audio_sync_clk_set_rate(struct clk *c, unsigned long rate)
-{
- unsigned long parent_rate;
- if (!c->parent) {
- pr_err("%s: clock has no parent\n", __func__);
- return -EINVAL;
- }
- parent_rate = c->parent->rate;
- if (rate != parent_rate) {
- pr_err("%s: %s/%ld differs from parent %s/%ld\n",
- __func__,
- c->name, rate,
- c->parent->name, parent_rate);
- return -EINVAL;
- }
- c->rate = parent_rate;
- return 0;
-}
-
static struct clk_ops tegra_audio_sync_clk_ops = {
.init = tegra2_audio_sync_clk_init,
.enable = tegra2_audio_sync_clk_enable,
.disable = tegra2_audio_sync_clk_disable,
- .set_rate = tegra2_audio_sync_clk_set_rate,
.set_parent = tegra2_audio_sync_clk_set_parent,
};
@@ -1547,8 +1554,6 @@ static struct clk tegra_pll_p_out4 = {
static struct clk_pll_freq_table tegra_pll_a_freq_table[] = {
{ 28800000, 56448000, 49, 25, 1, 1},
{ 28800000, 73728000, 64, 25, 1, 1},
- { 28800000, 11289600, 49, 25, 1, 1},
- { 28800000, 12288000, 64, 25, 1, 1},
{ 28800000, 24000000, 5, 6, 1, 1},
{ 0, 0, 0, 0, 0, 0 },
};
@@ -1559,7 +1564,7 @@ static struct clk tegra_pll_a = {
.ops = &tegra_pll_ops,
.reg = 0xb0,
.parent = &tegra_pll_p_out1,
- .max_rate = 56448000,
+ .max_rate = 73728000,
.u.pll = {
.input_min = 2000000,
.input_max = 31000000,
@@ -1579,7 +1584,7 @@ static struct clk tegra_pll_a_out0 = {
.parent = &tegra_pll_a,
.reg = 0xb4,
.reg_shift = 0,
- .max_rate = 56448000,
+ .max_rate = 73728000,
};
static struct clk_pll_freq_table tegra_pll_d_freq_table[] = {
@@ -1681,10 +1686,10 @@ static struct clk_pll_freq_table tegra_pll_x_freq_table[] = {
{ 26000000, 760000000, 760, 26, 1, 12},
/* 608 MHz */
- { 12000000, 608000000, 760, 12, 1, 12},
- { 13000000, 608000000, 760, 13, 1, 12},
+ { 12000000, 608000000, 608, 12, 1, 12},
+ { 13000000, 608000000, 608, 13, 1, 12},
{ 19200000, 608000000, 380, 12, 1, 8},
- { 26000000, 608000000, 760, 26, 1, 12},
+ { 26000000, 608000000, 608, 26, 1, 12},
/* 456 MHz */
{ 12000000, 456000000, 456, 12, 1, 12},
@@ -1797,7 +1802,7 @@ static struct clk tegra_clk_audio = {
.name = "audio",
.inputs = mux_audio_sync_clk,
.reg = 0x38,
- .max_rate = 24000000,
+ .max_rate = 73728000,
.ops = &tegra_audio_sync_clk_ops
};
@@ -1883,7 +1888,8 @@ static struct clk tegra_clk_sclk = {
.inputs = mux_sclk,
.reg = 0x28,
.ops = &tegra_super_ops,
- .max_rate = 600000000,
+ .max_rate = 240000000,
+ .min_rate = 120000000,
};
static struct clk tegra_clk_virtual_cpu = {
@@ -1897,6 +1903,13 @@ static struct clk tegra_clk_virtual_cpu = {
},
};
+static struct clk tegra_clk_cop = {
+ .name = "cop",
+ .parent = &tegra_clk_sclk,
+ .ops = &tegra_cop_ops,
+ .max_rate = 240000000,
+};
+
static struct clk tegra_clk_hclk = {
.name = "hclk",
.flags = DIV_BUS,
@@ -1914,7 +1927,7 @@ static struct clk tegra_clk_pclk = {
.reg = 0x30,
.reg_shift = 0,
.ops = &tegra_bus_ops,
- .max_rate = 108000000,
+ .max_rate = 120000000,
};
static struct clk tegra_clk_blink = {
@@ -2063,7 +2076,10 @@ struct clk tegra_list_clks[] = {
PERIPH_CLK("sdmmc2", "sdhci-tegra.1", NULL, 9, 0x154, 52000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage */
PERIPH_CLK("sdmmc3", "sdhci-tegra.2", NULL, 69, 0x1bc, 52000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage */
PERIPH_CLK("sdmmc4", "sdhci-tegra.3", NULL, 15, 0x164, 52000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage */
- PERIPH_CLK("vde", "vde", NULL, 61, 0x1c8, 250000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage and process_id */
+ PERIPH_CLK("vcp", "tegra-avp", "vcp", 29, 0, 250000000, mux_clk_m, 0),
+ PERIPH_CLK("bsea", "tegra-avp", "bsea", 62, 0, 250000000, mux_clk_m, 0),
+ PERIPH_CLK("bsev", "tegra-aes", "bsev", 63, 0, 250000000, mux_clk_m, 0),
+ PERIPH_CLK("vde", "tegra-avp", "vde", 61, 0x1c8, 250000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage and process_id */
PERIPH_CLK("csite", "csite", NULL, 73, 0x1d4, 144000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* max rate ??? */
/* FIXME: what is la? */
PERIPH_CLK("la", "la", NULL, 76, 0x1f8, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71),
@@ -2106,6 +2122,18 @@ struct clk tegra_list_clks[] = {
PERIPH_CLK("pex", NULL, "pex", 70, 0, 26000000, mux_clk_m, PERIPH_MANUAL_RESET),
PERIPH_CLK("afi", NULL, "afi", 72, 0, 26000000, mux_clk_m, PERIPH_MANUAL_RESET),
PERIPH_CLK("pcie_xclk", NULL, "pcie_xclk", 74, 0, 26000000, mux_clk_m, PERIPH_MANUAL_RESET),
+
+ SHARED_CLK("avp.sclk", "tegra-avp", "sclk", &tegra_clk_sclk),
+ SHARED_CLK("avp.emc", "tegra-avp", "emc", &tegra_clk_emc),
+ SHARED_CLK("cpu.emc", "cpu", "emc", &tegra_clk_emc),
+ SHARED_CLK("disp1.emc", "tegradc.0", "emc", &tegra_clk_emc),
+ SHARED_CLK("disp2.emc", "tegradc.1", "emc", &tegra_clk_emc),
+ SHARED_CLK("hdmi.emc", "hdmi", "emc", &tegra_clk_emc),
+ SHARED_CLK("host.emc", "tegra_grhost", "emc", &tegra_clk_emc),
+ SHARED_CLK("usbd.emc", "fsl-tegra-udc", "emc", &tegra_clk_emc),
+ SHARED_CLK("usb1.emc", "tegra-ehci.0", "emc", &tegra_clk_emc),
+ SHARED_CLK("usb2.emc", "tegra-ehci.1", "emc", &tegra_clk_emc),
+ SHARED_CLK("usb3.emc", "tegra-ehci.2", "emc", &tegra_clk_emc),
};
#define CLK_DUPLICATE(_name, _dev, _con) \
@@ -2136,6 +2164,13 @@ struct clk_duplicate tegra_clk_duplicates[] = {
CLK_DUPLICATE("pwm", "tegra_pwm.1", NULL),
CLK_DUPLICATE("pwm", "tegra_pwm.2", NULL),
CLK_DUPLICATE("pwm", "tegra_pwm.3", NULL),
+ CLK_DUPLICATE("host1x", "tegra_grhost", "host1x"),
+ CLK_DUPLICATE("2d", "tegra_grhost", "gr2d"),
+ CLK_DUPLICATE("3d", "tegra_grhost", "gr3d"),
+ CLK_DUPLICATE("epp", "tegra_grhost", "epp"),
+ CLK_DUPLICATE("mpe", "tegra_grhost", "mpe"),
+ CLK_DUPLICATE("cop", "tegra-avp", "cop"),
+ CLK_DUPLICATE("vde", "tegra-aes", "vde"),
};
#define CLK(dev, con, ck) \
@@ -2174,6 +2209,7 @@ struct clk *tegra_ptr_clks[] = {
&tegra_dev2_clk,
&tegra_clk_virtual_cpu,
&tegra_clk_blink,
+ &tegra_clk_cop,
&tegra_clk_emc,
};
--
1.7.3.1
^ permalink raw reply related
* [PATCH V3 2/6] pxa3xx_nand: rework irq logic
From: Eric Miao @ 2011-02-13 9:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1287742484-4276-3-git-send-email-leiwen@marvell.com>
Hi Lei,
I like this idea very much. There are several places for improvement,
though, you mind take a look?
> ?static int pxa3xx_nand_dev_ready(struct mtd_info *mtd)
> @@ -580,14 +582,12 @@ static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
> ?{
> ? ? ? ?struct pxa3xx_nand_info *info = mtd->priv;
> ? ? ? ?const struct pxa3xx_nand_cmdset *cmdset = info->cmdset;
> - ? ? ? int ret;
> + ? ? ? int ret, exec_cmd = 0;
>
> ? ? ? ?info->use_dma = (use_dma) ? 1 : 0;
> ? ? ? ?info->use_ecc = 0;
> ? ? ? ?info->data_size = 0;
> - ? ? ? info->state = STATE_READY;
> -
> - ? ? ? init_completion(&info->cmd_complete);
> + ? ? ? info->state = 0;
>
> ? ? ? ?switch (command) {
> ? ? ? ?case NAND_CMD_READOOB:
> @@ -596,14 +596,12 @@ static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
> ? ? ? ? ? ? ? ?info->buf_start = mtd->writesize + column;
> ? ? ? ? ? ? ? ?memset(info->data_buff, 0xFF, info->buf_count);
>
> - ? ? ? ? ? ? ? if (prepare_read_prog_cmd(info, cmdset->read1, column, page_addr))
> - ? ? ? ? ? ? ? ? ? ? ? break;
> -
> - ? ? ? ? ? ? ? pxa3xx_nand_do_cmd(info, NDSR_RDDREQ | NDSR_DBERR | NDSR_SBERR);
> -
> + ? ? ? ? ? ? ? prepare_read_prog_cmd(info, cmdset->read1, column, page_addr);
> ? ? ? ? ? ? ? ?/* We only are OOB, so if the data has error, does not matter */
> ? ? ? ? ? ? ? ?if (info->retcode == ERR_DBERR)
> ? ? ? ? ? ? ? ? ? ? ? ?info->retcode = ERR_NONE;
Note the above statement is executed after a do_cmd() is done, so
info->retcode contains a valid return code. While the actual code
to perform the command has been moved to below.
For each transaction, there are three steps:
1. prepare/fill the command
2. perform the command
3. handle the return status
I actually though of merging steps 2) and 3) together, but step
3) could be different, and that the timeout for different type of
commands might be different, that's why I introduced the do_cmd()
function.
> +
> + ? ? ? ? ? ? ? exec_cmd = 1;
Maybe for those cases where commands are not executed, just simply
return will avoid introducing this exec_cmd variable.
.....
> @@ -807,10 +795,7 @@ static int __readid(struct pxa3xx_nand_info *info, uint32_t *id)
> ? ? ? ?uint32_t ndcr;
> ? ? ? ?uint8_t ?id_buff[8];
>
I saw __readid() is replaced by pxa3xx_nand_cmdfunc(NAND_CMD_READID)
in the code below. Is it possible to completely remove this function
now??
^ permalink raw reply
* [PATCH V3 3/6] pxa3xx_nand: discard wait_for_event, write_cmd, __readid function
From: Eric Miao @ 2011-02-13 9:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1287742484-4276-4-git-send-email-leiwen@marvell.com>
On Fri, Oct 22, 2010 at 6:14 PM, Lei Wen <leiwen@marvell.com> wrote:
> Since we have rework the irq process, we don't need additional
> delay in wait_for_event. Also write_cmd and __readid is also
> discarded for the same reason.
>
> Signed-off-by: Lei Wen <leiwen@marvell.com>
> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
> Cc: Eric Miao <eric.y.miao@gmail.com>
> Cc: David Woodhouse <dwmw2@infradead.org>
Ack.
> ---
> ?drivers/mtd/nand/pxa3xx_nand.c | ? 77 +---------------------------------------
> ?1 files changed, 1 insertions(+), 76 deletions(-)
>
> diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
> index dc24000..a7f623f 100644
> --- a/drivers/mtd/nand/pxa3xx_nand.c
> +++ b/drivers/mtd/nand/pxa3xx_nand.c
> @@ -258,25 +258,6 @@ static void pxa3xx_nand_set_timing(struct pxa3xx_nand_info *info,
> ? ? ? ?nand_writel(info, NDTR1CS0, ndtr1);
> ?}
>
> -#define WAIT_EVENT_TIMEOUT ? ? 10
> -
> -static int wait_for_event(struct pxa3xx_nand_info *info, uint32_t event)
> -{
> - ? ? ? int timeout = WAIT_EVENT_TIMEOUT;
> - ? ? ? uint32_t ndsr;
> -
> - ? ? ? while (timeout--) {
> - ? ? ? ? ? ? ? ndsr = nand_readl(info, NDSR) & NDSR_MASK;
> - ? ? ? ? ? ? ? if (ndsr & event) {
> - ? ? ? ? ? ? ? ? ? ? ? nand_writel(info, NDSR, ndsr);
> - ? ? ? ? ? ? ? ? ? ? ? return 0;
> - ? ? ? ? ? ? ? }
> - ? ? ? ? ? ? ? udelay(10);
> - ? ? ? }
> -
> - ? ? ? return -ETIMEDOUT;
> -}
> -
> ?static void pxa3xx_set_datasize(struct pxa3xx_nand_info *info)
> ?{
> ? ? ? ?int oob_enable = info->reg_ndcr & NDCR_SPARE_EN;
> @@ -414,35 +395,6 @@ static void disable_int(struct pxa3xx_nand_info *info, uint32_t int_mask)
> ? ? ? ?nand_writel(info, NDCR, ndcr | int_mask);
> ?}
>
> -/* NOTE: it is a must to set ND_RUN firstly, then write command buffer
> - * otherwise, it does not work
> - */
> -static int write_cmd(struct pxa3xx_nand_info *info)
> -{
> - ? ? ? uint32_t ndcr;
> -
> - ? ? ? /* clear status bits and run */
> - ? ? ? nand_writel(info, NDSR, NDSR_MASK);
> -
> - ? ? ? ndcr = info->reg_ndcr;
> -
> - ? ? ? ndcr |= info->use_ecc ? NDCR_ECC_EN : 0;
> - ? ? ? ndcr |= info->use_dma ? NDCR_DMA_EN : 0;
> - ? ? ? ndcr |= NDCR_ND_RUN;
> -
> - ? ? ? nand_writel(info, NDCR, ndcr);
> -
> - ? ? ? if (wait_for_event(info, NDSR_WRCMDREQ)) {
> - ? ? ? ? ? ? ? printk(KERN_ERR "timed out writing command\n");
> - ? ? ? ? ? ? ? return -ETIMEDOUT;
> - ? ? ? }
> -
> - ? ? ? nand_writel(info, NDCB0, info->ndcb0);
> - ? ? ? nand_writel(info, NDCB0, info->ndcb1);
> - ? ? ? nand_writel(info, NDCB0, info->ndcb2);
> - ? ? ? return 0;
> -}
> -
> ?static void handle_data_pio(struct pxa3xx_nand_info *info)
> ?{
> ? ? ? ?switch (info->state) {
> @@ -789,33 +741,6 @@ static int pxa3xx_nand_ecc_correct(struct mtd_info *mtd,
> ? ? ? ?return 0;
> ?}
>
> -static int __readid(struct pxa3xx_nand_info *info, uint32_t *id)
> -{
> - ? ? ? const struct pxa3xx_nand_cmdset *cmdset = info->cmdset;
> - ? ? ? uint32_t ndcr;
> - ? ? ? uint8_t ?id_buff[8];
> -
> - ? ? ? prepare_other_cmd(info, cmdset->read_id);
> -
> - ? ? ? /* Send command */
> - ? ? ? if (write_cmd(info))
> - ? ? ? ? ? ? ? goto fail_timeout;
> -
> - ? ? ? /* Wait for CMDDM(command done successfully) */
> - ? ? ? if (wait_for_event(info, NDSR_RDDREQ))
> - ? ? ? ? ? ? ? goto fail_timeout;
> -
> - ? ? ? __raw_readsl(info->mmio_base + NDDB, id_buff, 2);
> - ? ? ? *id = id_buff[0] | (id_buff[1] << 8);
> - ? ? ? return 0;
> -
> -fail_timeout:
> - ? ? ? ndcr = nand_readl(info, NDCR);
> - ? ? ? nand_writel(info, NDCR, ndcr & ~NDCR_ND_RUN);
> - ? ? ? udelay(10);
> - ? ? ? return -ETIMEDOUT;
> -}
> -
> ?static int pxa3xx_nand_config_flash(struct pxa3xx_nand_info *info,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?const struct pxa3xx_nand_flash *f)
> ?{
> @@ -868,7 +793,7 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
>
> ? ? ? ?page_per_block = ndcr & NDCR_PG_PER_BLK ? 64 : 32;
> ? ? ? ?info->page_size = ndcr & NDCR_PAGE_SZ ? 2048 : 512;
> - ? ? ? /* set info fields needed to __readid */
> + ? ? ? /* set info fields needed to read id */
> ? ? ? ?info->read_id_bytes = (info->page_size == 2048) ? 4 : 2;
> ? ? ? ?info->reg_ndcr = ndcr;
>
> --
> 1.7.0.4
>
>
^ permalink raw reply
* [PATCH] Clean up set_pxa_fb_info
From: Russell King - ARM Linux @ 2011-02-13 10:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110206115254.GA13084@n2100.arm.linux.org.uk>
Eric, ping.
On Sun, Feb 06, 2011 at 11:52:54AM +0000, Russell King - ARM Linux wrote:
> set_pxa_fb_info() has been a long-standing wart in the naming scheme
> of the pxa_set_xxx_info() functions. This renames the function, and
> combines set_pxa_fb_parent() with set_pxa_fb_info().
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> ---
> I've had this patch sitting around for a while, so it's been updated.
> It might be worth merging it.
>
> arch/arm/mach-pxa/am200epd.c | 4 ++--
> arch/arm/mach-pxa/balloon3.c | 2 +-
> arch/arm/mach-pxa/cm-x2xx.c | 2 +-
> arch/arm/mach-pxa/cm-x300.c | 2 +-
> arch/arm/mach-pxa/colibri-pxa270-income.c | 2 +-
> arch/arm/mach-pxa/colibri-pxa3xx.c | 2 +-
> arch/arm/mach-pxa/devices.c | 8 ++------
> arch/arm/mach-pxa/em-x270.c | 2 +-
> arch/arm/mach-pxa/eseries.c | 2 +-
> arch/arm/mach-pxa/ezx.c | 12 ++++++------
> arch/arm/mach-pxa/idp.c | 2 +-
> arch/arm/mach-pxa/include/mach/pxafb.h | 3 +--
> arch/arm/mach-pxa/littleton.c | 2 +-
> arch/arm/mach-pxa/lpd270.c | 2 +-
> arch/arm/mach-pxa/lubbock.c | 2 +-
> arch/arm/mach-pxa/magician.c | 2 +-
> arch/arm/mach-pxa/mainstone.c | 2 +-
> arch/arm/mach-pxa/mioa701.c | 2 +-
> arch/arm/mach-pxa/palm27x.c | 2 +-
> arch/arm/mach-pxa/palmtc.c | 2 +-
> arch/arm/mach-pxa/palmte2.c | 2 +-
> arch/arm/mach-pxa/pcm990-baseboard.c | 2 +-
> arch/arm/mach-pxa/poodle.c | 3 +--
> arch/arm/mach-pxa/raumfeld.c | 2 +-
> arch/arm/mach-pxa/saar.c | 2 +-
> arch/arm/mach-pxa/spitz.c | 2 +-
> arch/arm/mach-pxa/tavorevb.c | 2 +-
> arch/arm/mach-pxa/trizeps4.c | 4 ++--
> arch/arm/mach-pxa/viper.c | 2 +-
> arch/arm/mach-pxa/vpac270.c | 2 +-
> arch/arm/mach-pxa/z2.c | 2 +-
> arch/arm/mach-pxa/zeus.c | 2 +-
> arch/arm/mach-pxa/zylonite.c | 4 ++--
> 33 files changed, 42 insertions(+), 48 deletions(-)
>
> diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
> index 3499fad..10964e3 100644
> --- a/arch/arm/mach-pxa/am200epd.c
> +++ b/arch/arm/mach-pxa/am200epd.c
> @@ -194,7 +194,7 @@ static struct notifier_block am200_fb_notif = {
> };
>
> /* this gets called as part of our init. these steps must be done now so
> - * that we can use set_pxa_fb_info */
> + * that we can use pxa_set_fb_info */
> static void __init am200_presetup_fb(void)
> {
> int fw;
> @@ -249,7 +249,7 @@ static void __init am200_presetup_fb(void)
> /* we divide since we told the LCD controller we're 16bpp */
> am200_fb_info.modes->xres /= 2;
>
> - set_pxa_fb_info(&am200_fb_info);
> + pxa_set_fb_info(NULL, &am200_fb_info);
>
> }
>
> diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
> index e194d92..0e12667 100644
> --- a/arch/arm/mach-pxa/balloon3.c
> +++ b/arch/arm/mach-pxa/balloon3.c
> @@ -264,7 +264,7 @@ static void __init balloon3_lcd_init(void)
> }
>
> balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power;
> - set_pxa_fb_info(&balloon3_lcd_screen);
> + pxa_set_fb_info(NULL, &balloon3_lcd_screen);
> return;
>
> err2:
> diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
> index b734d84..8225e2e 100644
> --- a/arch/arm/mach-pxa/cm-x2xx.c
> +++ b/arch/arm/mach-pxa/cm-x2xx.c
> @@ -379,7 +379,7 @@ __setup("monitor=", cmx2xx_set_display);
>
> static void __init cmx2xx_init_display(void)
> {
> - set_pxa_fb_info(cmx2xx_display);
> + pxa_set_fb_info(NULL, cmx2xx_display);
> }
> #else
> static inline void cmx2xx_init_display(void) {}
> diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
> index 7984268..0c9cfbc 100644
> --- a/arch/arm/mach-pxa/cm-x300.c
> +++ b/arch/arm/mach-pxa/cm-x300.c
> @@ -296,7 +296,7 @@ static struct pxafb_mach_info cm_x300_lcd = {
>
> static void __init cm_x300_init_lcd(void)
> {
> - set_pxa_fb_info(&cm_x300_lcd);
> + pxa_set_fb_info(NULL, &cm_x300_lcd);
> }
> #else
> static inline void cm_x300_init_lcd(void) {}
> diff --git a/arch/arm/mach-pxa/colibri-pxa270-income.c b/arch/arm/mach-pxa/colibri-pxa270-income.c
> index 07b62a0..c2f164b 100644
> --- a/arch/arm/mach-pxa/colibri-pxa270-income.c
> +++ b/arch/arm/mach-pxa/colibri-pxa270-income.c
> @@ -176,7 +176,7 @@ static struct pxafb_mach_info income_lcd_screen = {
>
> static void __init income_lcd_init(void)
> {
> - set_pxa_fb_info(&income_lcd_screen);
> + pxa_set_fb_info(NULL, &income_lcd_screen);
> }
> #else
> static inline void income_lcd_init(void) {}
> diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c
> index 96b2d9f..3f9be41 100644
> --- a/arch/arm/mach-pxa/colibri-pxa3xx.c
> +++ b/arch/arm/mach-pxa/colibri-pxa3xx.c
> @@ -105,7 +105,7 @@ void __init colibri_pxa3xx_init_lcd(int bl_pin)
> lcd_bl_pin = bl_pin;
> gpio_request(bl_pin, "lcd backlight");
> gpio_direction_output(bl_pin, 0);
> - set_pxa_fb_info(&sharp_lq43_info);
> + pxa_set_fb_info(NULL, &sharp_lq43_info);
> }
> #endif
>
> diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
> index 4c766e3..edfe803 100644
> --- a/arch/arm/mach-pxa/devices.c
> +++ b/arch/arm/mach-pxa/devices.c
> @@ -188,16 +188,12 @@ struct platform_device pxa_device_fb = {
> .resource = pxafb_resources,
> };
>
> -void __init set_pxa_fb_info(struct pxafb_mach_info *info)
> +void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
> {
> + pxa_device_fb.dev.parent = parent;
> pxa_register_device(&pxa_device_fb, info);
> }
>
> -void __init set_pxa_fb_parent(struct device *parent_dev)
> -{
> - pxa_device_fb.dev.parent = parent_dev;
> -}
> -
> static struct resource pxa_resource_ffuart[] = {
> {
> .start = 0x40100000,
> diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
> index a78bb30..2da03a4 100644
> --- a/arch/arm/mach-pxa/em-x270.c
> +++ b/arch/arm/mach-pxa/em-x270.c
> @@ -689,7 +689,7 @@ static struct pxafb_mach_info em_x270_lcd = {
>
> static void __init em_x270_init_lcd(void)
> {
> - set_pxa_fb_info(&em_x270_lcd);
> + pxa_set_fb_info(NULL, &em_x270_lcd);
> }
> #else
> static inline void em_x270_init_lcd(void) {}
> diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
> index edca0a0..8fdf5a3 100644
> --- a/arch/arm/mach-pxa/eseries.c
> +++ b/arch/arm/mach-pxa/eseries.c
> @@ -344,7 +344,7 @@ static void __init e400_init(void)
> /* Fixme - e400 may have a switched clock */
> eseries_register_clks();
> eseries_get_tmio_gpios();
> - set_pxa_fb_info(&e400_pxafb_mach_info);
> + pxa_set_fb_info(NULL, &e400_pxafb_mach_info);
> platform_add_devices(ARRAY_AND_SIZE(e400_devices));
> pxa_set_udc_info(&e7xx_udc_mach_info);
> }
> diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
> index 87cec0a..fcd366a 100644
> --- a/arch/arm/mach-pxa/ezx.c
> +++ b/arch/arm/mach-pxa/ezx.c
> @@ -783,7 +783,7 @@ static void __init a780_init(void)
>
> pxa_set_i2c_info(NULL);
>
> - set_pxa_fb_info(&ezx_fb_info_1);
> + pxa_set_fb_info(NULL, &ezx_fb_info_1);
>
> pxa_set_keypad_info(&a780_keypad_platform_data);
>
> @@ -853,7 +853,7 @@ static void __init e680_init(void)
> pxa_set_i2c_info(NULL);
> i2c_register_board_info(0, ARRAY_AND_SIZE(e680_i2c_board_info));
>
> - set_pxa_fb_info(&ezx_fb_info_1);
> + pxa_set_fb_info(NULL, &ezx_fb_info_1);
>
> pxa_set_keypad_info(&e680_keypad_platform_data);
>
> @@ -918,7 +918,7 @@ static void __init a1200_init(void)
> pxa_set_i2c_info(NULL);
> i2c_register_board_info(0, ARRAY_AND_SIZE(a1200_i2c_board_info));
>
> - set_pxa_fb_info(&ezx_fb_info_2);
> + pxa_set_fb_info(NULL, &ezx_fb_info_2);
>
> pxa_set_keypad_info(&a1200_keypad_platform_data);
>
> @@ -1103,7 +1103,7 @@ static void __init a910_init(void)
> pxa_set_i2c_info(NULL);
> i2c_register_board_info(0, ARRAY_AND_SIZE(a910_i2c_board_info));
>
> - set_pxa_fb_info(&ezx_fb_info_2);
> + pxa_set_fb_info(NULL, &ezx_fb_info_2);
>
> pxa_set_keypad_info(&a910_keypad_platform_data);
>
> @@ -1173,7 +1173,7 @@ static void __init e6_init(void)
> pxa_set_i2c_info(NULL);
> i2c_register_board_info(0, ARRAY_AND_SIZE(e6_i2c_board_info));
>
> - set_pxa_fb_info(&ezx_fb_info_2);
> + pxa_set_fb_info(NULL, &ezx_fb_info_2);
>
> pxa_set_keypad_info(&e6_keypad_platform_data);
>
> @@ -1212,7 +1212,7 @@ static void __init e2_init(void)
> pxa_set_i2c_info(NULL);
> i2c_register_board_info(0, ARRAY_AND_SIZE(e2_i2c_board_info));
>
> - set_pxa_fb_info(&ezx_fb_info_2);
> + pxa_set_fb_info(NULL, &ezx_fb_info_2);
>
> pxa_set_keypad_info(&e2_keypad_platform_data);
>
> diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
> index dd40e4a..f7fb64f 100644
> --- a/arch/arm/mach-pxa/idp.c
> +++ b/arch/arm/mach-pxa/idp.c
> @@ -167,7 +167,7 @@ static void __init idp_init(void)
>
> platform_device_register(&smc91x_device);
> //platform_device_register(&mst_audio_device);
> - set_pxa_fb_info(&sharp_lm8v31);
> + pxa_set_fb_info(NULL, &sharp_lm8v31);
> pxa_set_mci_info(&idp_mci_platform_data);
> }
>
> diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
> index 160ec83..1288e83 100644
> --- a/arch/arm/mach-pxa/include/mach/pxafb.h
> +++ b/arch/arm/mach-pxa/include/mach/pxafb.h
> @@ -154,8 +154,7 @@ struct pxafb_mach_info {
> void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *);
> void (*smart_update)(struct fb_info *);
> };
> -void set_pxa_fb_info(struct pxafb_mach_info *hard_pxa_fb_info);
> -void set_pxa_fb_parent(struct device *parent_dev);
> +void pxa_set_fb_info(struct pxafb_mach_info *hard_pxa_fb_info);
> unsigned long pxafb_get_hsync_time(struct device *dev);
>
> extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int);
> diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
> index ccb7bfa..4b2c45f 100644
> --- a/arch/arm/mach-pxa/littleton.c
> +++ b/arch/arm/mach-pxa/littleton.c
> @@ -185,7 +185,7 @@ static struct pxafb_mach_info littleton_lcd_info = {
>
> static void littleton_init_lcd(void)
> {
> - set_pxa_fb_info(&littleton_lcd_info);
> + pxa_set_fb_info(NULL, &littleton_lcd_info);
> }
> #else
> static inline void littleton_init_lcd(void) {};
> diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
> index c9a3e77..8aebc58 100644
> --- a/arch/arm/mach-pxa/lpd270.c
> +++ b/arch/arm/mach-pxa/lpd270.c
> @@ -480,7 +480,7 @@ static void __init lpd270_init(void)
> pxa_set_ac97_info(NULL);
>
> if (lpd270_lcd_to_use != NULL)
> - set_pxa_fb_info(lpd270_lcd_to_use);
> + pxa_set_fb_info(NULL, lpd270_lcd_to_use);
>
> pxa_set_ohci_info(&lpd270_ohci_platform_data);
> }
> diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
> index dca20de..12a2a56 100644
> --- a/arch/arm/mach-pxa/lubbock.c
> +++ b/arch/arm/mach-pxa/lubbock.c
> @@ -521,7 +521,7 @@ static void __init lubbock_init(void)
>
> clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL);
> pxa_set_udc_info(&udc_info);
> - set_pxa_fb_info(&sharp_lm8v31);
> + pxa_set_fb_info(NULL, &sharp_lm8v31);
> pxa_set_mci_info(&lubbock_mci_platform_data);
> pxa_set_ficp_info(&lubbock_ficp_platform_data);
> pxa_set_ac97_info(NULL);
> diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
> index 41198f0..ad70264 100644
> --- a/arch/arm/mach-pxa/magician.c
> +++ b/arch/arm/mach-pxa/magician.c
> @@ -757,7 +757,7 @@ static void __init magician_init(void)
> gpio_direction_output(GPIO104_MAGICIAN_LCD_POWER_1, 0);
> gpio_direction_output(GPIO105_MAGICIAN_LCD_POWER_2, 0);
> gpio_direction_output(GPIO106_MAGICIAN_LCD_POWER_3, 0);
> - set_pxa_fb_info(lcd_select ? &samsung_info : &toppoly_info);
> + pxa_set_fb_info(NULL, lcd_select ? &samsung_info : &toppoly_info);
> } else
> pr_err("LCD detection: CPLD mapping failed\n");
> }
> diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
> index d4b6f23..a58f522 100644
> --- a/arch/arm/mach-pxa/mainstone.c
> +++ b/arch/arm/mach-pxa/mainstone.c
> @@ -592,7 +592,7 @@ static void __init mainstone_init(void)
> else
> mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
>
> - set_pxa_fb_info(&mainstone_pxafb_info);
> + pxa_set_fb_info(NULL, &mainstone_pxafb_info);
> mainstone_backlight_register();
>
> pxa_set_mci_info(&mainstone_mci_platform_data);
> diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
> index faafea3..18e05b1 100644
> --- a/arch/arm/mach-pxa/mioa701.c
> +++ b/arch/arm/mach-pxa/mioa701.c
> @@ -795,7 +795,7 @@ static void __init mioa701_machine_init(void)
> pxa_set_stuart_info(NULL);
> mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
> bootstrap_init();
> - set_pxa_fb_info(&mioa701_pxafb_info);
> + pxa_set_fb_info(NULL, &mioa701_pxafb_info);
> pxa_set_mci_info(&mioa701_mci_info);
> pxa_set_keypad_info(&mioa701_keypad_info);
> pxa_set_udc_info(&mioa701_udc_info);
> diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
> index 405b92a..4f26d78 100644
> --- a/arch/arm/mach-pxa/palm27x.c
> +++ b/arch/arm/mach-pxa/palm27x.c
> @@ -159,7 +159,7 @@ void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode)
> palm27x_lcd_screen.pxafb_lcd_power = palm27x_lcd_ctl;
> }
>
> - set_pxa_fb_info(&palm27x_lcd_screen);
> + pxa_set_fb_info(NULL, &palm27x_lcd_screen);
> }
> #endif
>
> diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
> index a09a237..fb06bd0 100644
> --- a/arch/arm/mach-pxa/palmtc.c
> +++ b/arch/arm/mach-pxa/palmtc.c
> @@ -507,7 +507,7 @@ static struct pxafb_mach_info palmtc_lcd_screen = {
>
> static void __init palmtc_lcd_init(void)
> {
> - set_pxa_fb_info(&palmtc_lcd_screen);
> + pxa_set_fb_info(NULL, &palmtc_lcd_screen);
> }
> #else
> static inline void palmtc_lcd_init(void) {}
> diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
> index 3f25014..7fdf099 100644
> --- a/arch/arm/mach-pxa/palmte2.c
> +++ b/arch/arm/mach-pxa/palmte2.c
> @@ -363,7 +363,7 @@ static void __init palmte2_init(void)
> pxa_set_btuart_info(NULL);
> pxa_set_stuart_info(NULL);
>
> - set_pxa_fb_info(&palmte2_lcd_screen);
> + pxa_set_fb_info(NULL, &palmte2_lcd_screen);
> pxa_set_mci_info(&palmte2_mci_platform_data);
> palmte2_udc_init();
> pxa_set_ac97_info(&palmte2_ac97_pdata);
> diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
> index 90820fa..c1a6448 100644
> --- a/arch/arm/mach-pxa/pcm990-baseboard.c
> +++ b/arch/arm/mach-pxa/pcm990-baseboard.c
> @@ -515,7 +515,7 @@ void __init pcm990_baseboard_init(void)
> pcm990_init_irq();
>
> #ifndef CONFIG_PCM990_DISPLAY_NONE
> - set_pxa_fb_info(&pcm990_fbinfo);
> + pxa_set_fb_info(NULL, &pcm990_fbinfo);
> #endif
> platform_device_register(&pcm990_backlight_device);
>
> diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
> index 4f0ff1a..be68ec5 100644
> --- a/arch/arm/mach-pxa/poodle.c
> +++ b/arch/arm/mach-pxa/poodle.c
> @@ -445,8 +445,7 @@ static void __init poodle_init(void)
> if (ret)
> pr_warning("poodle: Unable to register LoCoMo device\n");
>
> - set_pxa_fb_parent(&poodle_locomo_device.dev);
> - set_pxa_fb_info(&poodle_fb_info);
> + pxa_set_fb_info(&poodle_locomo_device.dev, &poodle_fb_info);
> pxa_set_udc_info(&udc_info);
> pxa_set_mci_info(&poodle_mci_platform_data);
> pxa_set_ficp_info(&poodle_ficp_platform_data);
> diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
> index 8361151..d9a5791 100644
> --- a/arch/arm/mach-pxa/raumfeld.c
> +++ b/arch/arm/mach-pxa/raumfeld.c
> @@ -597,7 +597,7 @@ static void __init raumfeld_lcd_init(void)
> {
> int ret;
>
> - set_pxa_fb_info(&raumfeld_sharp_lcd_info);
> + pxa_set_fb_info(NULL, &raumfeld_sharp_lcd_info);
>
> /* Earlier devices had the backlight regulator controlled
> * via PWM, later versions use another controller for that */
> diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
> index c1ca8cb..dd0118f 100644
> --- a/arch/arm/mach-pxa/saar.c
> +++ b/arch/arm/mach-pxa/saar.c
> @@ -473,7 +473,7 @@ static struct pxafb_mach_info saar_lcd_info = {
>
> static void __init saar_init_lcd(void)
> {
> - set_pxa_fb_info(&saar_lcd_info);
> + pxa_set_fb_info(NULL, &saar_lcd_info);
> }
> #else
> static inline void saar_init_lcd(void) {}
> diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
> index b49a2c2..e646b6d 100644
> --- a/arch/arm/mach-pxa/spitz.c
> +++ b/arch/arm/mach-pxa/spitz.c
> @@ -725,7 +725,7 @@ static struct pxafb_mach_info spitz_pxafb_info = {
>
> static void __init spitz_lcd_init(void)
> {
> - set_pxa_fb_info(&spitz_pxafb_info);
> + pxa_set_fb_info(NULL, &spitz_pxafb_info);
> }
> #else
> static inline void spitz_lcd_init(void) {}
> diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
> index 9cecf83..53d4a47 100644
> --- a/arch/arm/mach-pxa/tavorevb.c
> +++ b/arch/arm/mach-pxa/tavorevb.c
> @@ -466,7 +466,7 @@ static void __init tavorevb_init_lcd(void)
> {
> platform_device_register(&tavorevb_backlight_devices[0]);
> platform_device_register(&tavorevb_backlight_devices[1]);
> - set_pxa_fb_info(&tavorevb_lcd_info);
> + pxa_set_fb_info(NULL, &tavorevb_lcd_info);
> }
> #else
> static inline void tavorevb_init_lcd(void) {}
> diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
> index 423261d..fa510fd 100644
> --- a/arch/arm/mach-pxa/trizeps4.c
> +++ b/arch/arm/mach-pxa/trizeps4.c
> @@ -516,9 +516,9 @@ static void __init trizeps4_init(void)
> pxa_set_stuart_info(NULL);
>
> if (0) /* dont know how to determine LCD */
> - set_pxa_fb_info(&sharp_lcd);
> + pxa_set_fb_info(NULL, &sharp_lcd);
> else
> - set_pxa_fb_info(&toshiba_lcd);
> + pxa_set_fb_info(NULL, &toshiba_lcd);
>
> pxa_set_mci_info(&trizeps4_mci_platform_data);
> #ifndef STATUS_LEDS_ON_STUART_PINS
> diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
> index 49eeeab..53b2495 100644
> --- a/arch/arm/mach-pxa/viper.c
> +++ b/arch/arm/mach-pxa/viper.c
> @@ -932,7 +932,7 @@ static void __init viper_init(void)
> /* Wake-up serial console */
> viper_init_serial_gpio();
>
> - set_pxa_fb_info(&fb_info);
> + pxa_set_fb_info(NULL, &fb_info);
>
> /* v1 hardware cannot use the datacs line */
> version = viper_hw_version();
> diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
> index b9b5797..a46f8d1 100644
> --- a/arch/arm/mach-pxa/vpac270.c
> +++ b/arch/arm/mach-pxa/vpac270.c
> @@ -573,7 +573,7 @@ static void __init vpac270_lcd_init(void)
> }
>
> vpac270_lcd_screen.pxafb_lcd_power = vpac270_lcd_power;
> - set_pxa_fb_info(&vpac270_lcd_screen);
> + pxa_set_fb_info(NULL, &vpac270_lcd_screen);
> return;
>
> err2:
> diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
> index a323e07..084c724 100644
> --- a/arch/arm/mach-pxa/z2.c
> +++ b/arch/arm/mach-pxa/z2.c
> @@ -272,7 +272,7 @@ static struct pxafb_mach_info z2_lcd_screen = {
>
> static void __init z2_lcd_init(void)
> {
> - set_pxa_fb_info(&z2_lcd_screen);
> + pxa_set_fb_info(NULL, &z2_lcd_screen);
> }
> #else
> static inline void z2_lcd_init(void) {}
> diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
> index f4b053b..3db0ba4 100644
> --- a/arch/arm/mach-pxa/zeus.c
> +++ b/arch/arm/mach-pxa/zeus.c
> @@ -847,7 +847,7 @@ static void __init zeus_init(void)
> if (zeus_setup_fb_gpios())
> pr_err("Failed to setup fb gpios\n");
> else
> - set_pxa_fb_info(&zeus_fb_info);
> + pxa_set_fb_info(NULL, &zeus_fb_info);
>
> pxa_set_mci_info(&zeus_mci_platform_data);
> pxa_set_udc_info(&zeus_udc_info);
> diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
> index a4c784a..5821185 100644
> --- a/arch/arm/mach-pxa/zylonite.c
> +++ b/arch/arm/mach-pxa/zylonite.c
> @@ -208,7 +208,7 @@ static void __init zylonite_init_lcd(void)
> platform_device_register(&zylonite_backlight_device);
>
> if (lcd_id & 0x20) {
> - set_pxa_fb_info(&zylonite_sharp_lcd_info);
> + pxa_set_fb_info(NULL, &zylonite_sharp_lcd_info);
> return;
> }
>
> @@ -220,7 +220,7 @@ static void __init zylonite_init_lcd(void)
> else
> zylonite_toshiba_lcd_info.modes = &toshiba_ltm04c380k_mode;
>
> - set_pxa_fb_info(&zylonite_toshiba_lcd_info);
> + pxa_set_fb_info(NULL, &zylonite_toshiba_lcd_info);
> }
> #else
> static inline void zylonite_init_lcd(void) {}
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH RFC] ARM: MPCore v6_early_abort enhancement
From: Russell King - ARM Linux @ 2011-02-13 10:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110211225342.GD236@mvista.com>
On Fri, Feb 11, 2011 at 05:53:42PM -0500, George G. Davis wrote:
> Hi,
>
> On Fri, Feb 11, 2011 at 10:38:44PM +0000, Russell King - ARM Linux wrote:
> > On Sat, Feb 12, 2011 at 12:54:21AM +0300, Valentine Barshak wrote:
> > > SWP instruction sets bit 11 in DFSR, in case of data fault on SMP MPCore.
> > > So v6_early_abort doesn't need erratum 326103 workaround for MPCore.
> >
> > NAK. When building a SMP kernel which also supports v6 CPUs, this will
> > cause v6 CPUs to break.
>
> Since the SWP erratum only affects ARM1136 (UP) processors, how will this
> break ARM11 MPCore (v6) processors?
Omitting the code will break MPcore processors.
> Are you referring to unified kernels which support both UP and SMP machines?
Of course.
> I reckon that's a recent feature to be able to boot SMP kernels on UP
> machines.
Makes no difference if it's a recent feature or not. We're not adding
new obstacles to this when we're getting rid of them. It's counter
productive.
> Perhaps if that's why you're against this, then we need to have a
> separate config option to specifically enable this ARM1136 erratum
> workaround?
No we don't. Omitting the code is an optimization to what is already a
slow path which results in breakage for people. That's why I nak'd it.
^ permalink raw reply
* [PATCH 2/2] ARM: tegra: add TrimSlice board
From: Mike Rapoport @ 2011-02-13 11:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <AANLkTim5-dmpF8r9uZp8iDsT6p61D0iaJZuHvRLfUL6Y@mail.gmail.com>
On 02/11/11 04:43, Colin Cross wrote:
> On Mon, Feb 7, 2011 at 12:10 AM, Mike Rapoport <mike@compulab.co.il> wrote:
>> Add basic support for CompuLab TrimSlice platform
>>
>> Signed-off-by: Mike Rapoport <mike@compulab.co.il>
>> ---
>> arch/arm/mach-tegra/Kconfig | 6 +
>> arch/arm/mach-tegra/Makefile | 3 +
>> arch/arm/mach-tegra/board-trimslice-pinmux.c | 145 ++++++++++++++++++++++++++
>> arch/arm/mach-tegra/board-trimslice.c | 104 ++++++++++++++++++
>> arch/arm/mach-tegra/board-trimslice.h | 22 ++++
>> 5 files changed, 280 insertions(+), 0 deletions(-)
>> create mode 100644 arch/arm/mach-tegra/board-trimslice-pinmux.c
>> create mode 100644 arch/arm/mach-tegra/board-trimslice.c
>> create mode 100644 arch/arm/mach-tegra/board-trimslice.h
>>
>> diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
>> index acd9552..f0fda77 100644
>> --- a/arch/arm/mach-tegra/Kconfig
>> +++ b/arch/arm/mach-tegra/Kconfig
>> @@ -27,6 +27,12 @@ config MACH_HARMONY
>> help
>> Support for nVidia Harmony development platform
>>
>> +config MACH_TRIMSLICE
>> + bool "TrimSlice board"
>> + select TEGRA_PCI
>> + help
>> + Support for CompuLab TrimSlice platform
>> +
>> choice
>> prompt "Low-level debug console UART"
>> default TEGRA_DEBUG_UART_NONE
>> diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
>> index cdbc68e..0e1844b 100644
>> --- a/arch/arm/mach-tegra/Makefile
>> +++ b/arch/arm/mach-tegra/Makefile
>> @@ -19,3 +19,6 @@ obj-$(CONFIG_TEGRA_PCI) += pcie.o
>> obj-${CONFIG_MACH_HARMONY} += board-harmony.o
>> obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o
>> obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o
>> +
>> +obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o
>> +obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o
>> diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
>> new file mode 100644
>> index 0000000..6d4fc9f
>> --- /dev/null
>> +++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
>> @@ -0,0 +1,145 @@
>> +/*
>> + * arch/arm/mach-tegra/board-trimslice-pinmux.c
>> + *
>> + * Copyright (C) 2011 CompuLab, Ltd.
>> + *
>> + * This software is licensed under the terms of the GNU General Public
>> + * License version 2, as published by the Free Software Foundation, and
>> + * may be copied, distributed, and modified under those terms.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + */
>> +
>> +#include <linux/kernel.h>
>> +#include <linux/init.h>
>> +#include <mach/pinmux.h>
>> +
>> +#include "board-trimslice.h"
>> +
>> +static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
>> + {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_OSC, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_DDC, TEGRA_MUX_I2C2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_DTD, TEGRA_MUX_VI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_DTE, TEGRA_MUX_VI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_DTF, TEGRA_MUX_I2C3, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_GMB, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_GMC, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_GME, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_GPU, TEGRA_MUX_UARTA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_GPV, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_I2CP, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_IRRX, TEGRA_MUX_UARTB, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_IRTX, TEGRA_MUX_UARTB, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_KBCA, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_KBCB, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_KBCC, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_KBCD, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_KBCE, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_KBCF, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_LCSN, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_LD0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD3, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD4, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD5, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD6, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD7, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD8, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD9, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD10, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD11, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD12, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD13, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD14, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD15, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD16, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LD17, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LDC, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_LDI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LHP0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LHP1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LHP2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LHS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LM0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LM1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LPW0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LPW1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_LPW2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LSC1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_LSCK, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_LSDA, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_LSDI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LVP0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_LVP1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_PTA, TEGRA_MUX_RSVD3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_SDD, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_SPDI, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_SPDO, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_SPIA, TEGRA_MUX_SPI2, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_SPIB, TEGRA_MUX_SPI2, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_SPIC, TEGRA_MUX_SPI2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_UAD, TEGRA_MUX_IRDA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_UCA, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_UCB, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_UDA, TEGRA_MUX_ULPI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
>> + {TEGRA_PINGROUP_CK32, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_DDRC, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_PMCA, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_PMCB, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_PMCC, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_PMCD, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_PMCE, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_XM2C, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> + {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
>> +};
>> +
>> +void __init trimslice_pinmux_init(void)
>> +{
>> + tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
>> +}
>> diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
>> new file mode 100644
>> index 0000000..ef233b2
>> --- /dev/null
>> +++ b/arch/arm/mach-tegra/board-trimslice.c
>> @@ -0,0 +1,104 @@
>> +/*
>> + * arch/arm/mach-tegra/board-trimslice.c
>> + *
>> + * Copyright (C) 2011 CompuLab, Ltd.
>> + * Author: Mike Rapoport <mike@compulab.co.il>
>> + *
>> + * Based on board-harmony.c
>> + * Copyright (C) 2010 Google, Inc.
>> + *
>> + * This software is licensed under the terms of the GNU General Public
>> + * License version 2, as published by the Free Software Foundation, and
>> + * may be copied, distributed, and modified under those terms.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + */
>> +
>> +#include <linux/kernel.h>
>> +#include <linux/init.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/serial_8250.h>
>> +#include <linux/io.h>
>> +
>> +#include <asm/mach-types.h>
>> +#include <asm/mach/arch.h>
>> +#include <asm/setup.h>
>> +
>> +#include <mach/iomap.h>
>> +
>> +#include "board.h"
>> +#include "clock.h"
>> +
>> +#include "board-trimslice.h"
>> +
>> +static struct plat_serial8250_port debug_uart_platform_data[] = {
>> + {
>> + .membase = IO_ADDRESS(TEGRA_UARTA_BASE),
>> + .mapbase = TEGRA_UARTA_BASE,
>> + .irq = INT_UARTA,
>> + .flags = UPF_BOOT_AUTOCONF,
>> + .iotype = UPIO_MEM,
>> + .regshift = 2,
>> + .uartclk = 216000000,
>> + }, {
>> + .flags = 0
>> + }
>> +};
>> +
>> +static struct platform_device debug_uart = {
>> + .name = "serial8250",
>> + .id = PLAT8250_DEV_PLATFORM,
>> + .dev = {
>> + .platform_data = debug_uart_platform_data,
>> + },
>> +};
>> +
>> +static struct platform_device *trimslice_devices[] __initdata = {
>> + &debug_uart,
>> +};
>> +
>> +static void __init tegra_trimslice_fixup(struct machine_desc *desc,
>> + struct tag *tags, char **cmdline, struct meminfo *mi)
>> +{
>> + mi->nr_banks = 2;
>> + mi->bank[0].start = PHYS_OFFSET;
>> + mi->bank[0].size = 448 * SZ_1M;
>> + mi->bank[1].start = SZ_512M;
>> + mi->bank[1].size = SZ_512M;
>> +}
>> +
>> +static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
>> + /* name parent rate enabled */
>> + { "uarta", "pll_p", 216000000, true },
>> + { NULL, NULL, 0, 0},
>> +};
>> +
>> +static int __init tegra_trimslice_pci_init(void)
>> +{
>> + return tegra_pcie_init(true, true);
>> +}
>> +subsys_initcall(tegra_trimslice_pci_init);
>> +
>> +static void __init tegra_trimslice_init(void)
>> +{
>> + tegra_common_init();
>> +
>> + tegra_clk_init_from_table(trimslice_clk_init_table);
>> +
>> + trimslice_pinmux_init();
>> +
>> + platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
>> +}
>> +
>> +MACHINE_START(TRIMSLICE, "trimslice")
>> + .boot_params = 0x00000100,
>> + .fixup = tegra_trimslice_fixup,
>> + .init_irq = tegra_init_irq,
>> + .init_machine = tegra_trimslice_init,
>> + .map_io = tegra_map_common_io,
>> + .timer = &tegra_timer,
>> +MACHINE_END
>> diff --git a/arch/arm/mach-tegra/board-trimslice.h b/arch/arm/mach-tegra/board-trimslice.h
>> new file mode 100644
>> index 0000000..16ec0f0
>> --- /dev/null
>> +++ b/arch/arm/mach-tegra/board-trimslice.h
>> @@ -0,0 +1,22 @@
>> +/*
>> + * arch/arm/mach-tegra/board-trimslice.h
>> + *
>> + * Copyright (C) 2011 CompuLab, Ltd.
>> + *
>> + * This software is licensed under the terms of the GNU General Public
>> + * License version 2, as published by the Free Software Foundation, and
>> + * may be copied, distributed, and modified under those terms.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + */
>> +
>> +#ifndef _MACH_TEGRA_BOARD_TRIMSLICE_H
>> +#define _MACH_TEGRA_BOARD_TRIMSLICE_H
>> +
>> +void trimslice_pinmux_init(void);
>> +
>> +#endif
>> --
>> 1.7.3.1
>
> Ack, the machine type is merged so I'll put this in for-next. Do you
> want it enabled in tegra_defconfig?
If 'select TEGRA_PCI' does not trouble you, I'd be glad to have the TrimSlice in
tegra_defconfig :)
> --
> To unsubscribe from this list: send the line "unsubscribe linux-tegra" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Sincerely yours,
Mike.
^ permalink raw reply
* The p2v branch
From: Russell King - ARM Linux @ 2011-02-13 11:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.LFD.2.00.1102121556330.14920@xanadu.home>
On Sat, Feb 12, 2011 at 04:01:14PM -0500, Nicolas Pitre wrote:
> I've rebased my 2 patches on top of your latest p2v branch. You may
> pull them from:
>
> git://git.linaro.org/people/nico/linux p2v
>
> Or if you prefer I can put them in the patch system.
I'd like to wait for Catalin to respond on the phys_addr_t patch - which
allows 64-bit phys addresses. Obviously that's going to have an impact
on the p2v code and I'd rather someone else had the job of working out
what to do about the T2 code.
^ permalink raw reply
* [PATCH 2/2] P2V: Thumb2 support
From: Russell King - ARM Linux @ 2011-02-13 11:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.LFD.2.00.1102121331220.14920@xanadu.home>
On Sat, Feb 12, 2011 at 01:33:42PM -0500, Nicolas Pitre wrote:
> __fixup_a_pv_table:
> +#ifdef CONFIG_THUMB2_KERNEL
> +#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
> + lsls r0, r6, #24
> + lsr r6, #8
> + beq 1f
> + clz r7, r0
> + lsrs r0, #24
> + lsls r0, r7
Why do these instructions need to update the PSR?
> + bic r0, 0x0080
> + lsrs r7, #1
> + orrcs r0, #0x0080
> + orr r0, r0, r7, lsl #12
> +#endif
> +1: lsls r6, #24
> + beq 4f
> + clz r7, r6
> + lsrs r6, #24
> + lsls r6, r7
> + bic r6, #0x0080
> + lsrs r7, #1
> + orrcs r6, #0x0080
> + orr r6, r6, r7, lsl #12
> + orr r6, #0x4000
> + b 4f
> +2: add r7, r3
> +#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
> + ldrh ip, [r7]
> + tst ip, 0x0400 @ the i bit tells us LS or MS byte
> + beq 3f
> + cmp r0, #0 @ set C flag, and ...
> + biceq ip, 0x0400 @ immediate zero value has a special encoding
> + streqh ip, [r7] @ that requires the i bit cleared
> +#endif
> +3: ldrh ip, [r7, #2]
> + and ip, 0x8f00
> + orrcc ip, r6 @ mask in offset bits 31-24
> + orrcs ip, r0 @ mask in offset bits 23-16
> + strh ip, [r7, #2]
> +4: cmp r4, r5
> + ldrcc r7, [r4], #4 @ use branch for delay slot
> + bcc 2b
> + bx lr
Something's wrong with the indentation here.
^ permalink raw reply
* [PATCH] ARM: PXA: Make PXA27x/PXA3xx overlay actually work
From: Russell King - ARM Linux @ 2011-02-13 13:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1296679619-32666-1-git-send-email-anarsoul@gmail.com>
Eric - ping?
On Wed, Feb 02, 2011 at 10:46:59PM +0200, Vasily Khoruzhick wrote:
> From: "Russell King - ARM Linux" <linux@arm.linux.org.uk>
>
> Release callback tries to free memory even if it was not allocated in
> map_video_memory. Fix PXA27x/3xx overlay memory management and make overlay
> actually work.
>
> Added by Vasily Khoruzhick:
>
> - Move overlay Z-ordering selection into main fb initialization,
> otherwise plane ordering is wrong.
> - Clear x_res/y_res fields of fb.var on release, to make sure
> our callback will be called on next FBIOPUT_VSCREENINFO ioctl.
> - Disable overlay only if it was enabled.
>
> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> ---
> drivers/video/pxafb.c | 86 ++++++++++++++++++++++++++++++------------------
> drivers/video/pxafb.h | 2 +-
> 2 files changed, 55 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c
> index 825b665..33f607a 100644
> --- a/drivers/video/pxafb.c
> +++ b/drivers/video/pxafb.c
> @@ -629,16 +629,19 @@ static void overlay1fb_disable(struct pxafb_layer *ofb)
> {
> uint32_t lccr5 = lcd_readl(ofb->fbi, LCCR5);
>
> - lcd_writel(ofb->fbi, OVL1C1, ofb->control[0] & ~OVLxC1_OEN);
> + if (lcd_readl(ofb->fbi, OVL1C1) & OVLxC1_OEN) {
> + lcd_writel(ofb->fbi, OVL1C1, ofb->control[0] & ~OVLxC1_OEN);
>
> - lcd_writel(ofb->fbi, LCSR1, LCSR1_BS(1));
> - lcd_writel(ofb->fbi, LCCR5, lccr5 & ~LCSR1_BS(1));
> - lcd_writel(ofb->fbi, FBR1, ofb->fbi->fdadr[DMA_OV1] | 0x3);
> + lcd_writel(ofb->fbi, LCSR1, LCSR1_BS(1));
> + lcd_writel(ofb->fbi, LCCR5, lccr5 & ~LCSR1_BS(1));
> + lcd_writel(ofb->fbi, FBR1, ofb->fbi->fdadr[DMA_OV1] | 0x3);
>
> - if (wait_for_completion_timeout(&ofb->branch_done, 1 * HZ) == 0)
> - pr_warning("%s: timeout disabling overlay1\n", __func__);
> + if (wait_for_completion_timeout(&ofb->branch_done, 1 * HZ) == 0)
> + pr_warning("%s: timeout disabling overlay1\n",
> + __func__);
>
> - lcd_writel(ofb->fbi, LCCR5, lccr5);
> + lcd_writel(ofb->fbi, LCCR5, lccr5);
> + }
> }
>
> static void overlay2fb_setup(struct pxafb_layer *ofb)
> @@ -687,16 +690,19 @@ static void overlay2fb_disable(struct pxafb_layer *ofb)
> {
> uint32_t lccr5 = lcd_readl(ofb->fbi, LCCR5);
>
> - lcd_writel(ofb->fbi, OVL2C1, ofb->control[0] & ~OVLxC1_OEN);
> + if (lcd_readl(ofb->fbi, OVL2C1) & OVLxC1_OEN) {
> + lcd_writel(ofb->fbi, OVL2C1, ofb->control[0] & ~OVLxC1_OEN);
>
> - lcd_writel(ofb->fbi, LCSR1, LCSR1_BS(2));
> - lcd_writel(ofb->fbi, LCCR5, lccr5 & ~LCSR1_BS(2));
> - lcd_writel(ofb->fbi, FBR2, ofb->fbi->fdadr[DMA_OV2_Y] | 0x3);
> - lcd_writel(ofb->fbi, FBR3, ofb->fbi->fdadr[DMA_OV2_Cb] | 0x3);
> - lcd_writel(ofb->fbi, FBR4, ofb->fbi->fdadr[DMA_OV2_Cr] | 0x3);
> + lcd_writel(ofb->fbi, LCSR1, LCSR1_BS(2));
> + lcd_writel(ofb->fbi, LCCR5, lccr5 & ~LCSR1_BS(2));
> + lcd_writel(ofb->fbi, FBR2, ofb->fbi->fdadr[DMA_OV2_Y] | 0x3);
> + lcd_writel(ofb->fbi, FBR3, ofb->fbi->fdadr[DMA_OV2_Cb] | 0x3);
> + lcd_writel(ofb->fbi, FBR4, ofb->fbi->fdadr[DMA_OV2_Cr] | 0x3);
>
> - if (wait_for_completion_timeout(&ofb->branch_done, 1 * HZ) == 0)
> - pr_warning("%s: timeout disabling overlay2\n", __func__);
> + if (wait_for_completion_timeout(&ofb->branch_done, 1 * HZ) == 0)
> + pr_warning("%s: timeout disabling overlay2\n",
> + __func__);
> + }
> }
>
> static struct pxafb_layer_ops ofb_ops[] = {
> @@ -720,12 +726,10 @@ static int overlayfb_open(struct fb_info *info, int user)
> if (user == 0)
> return -ENODEV;
>
> - /* allow only one user at a time */
> - if (atomic_inc_and_test(&ofb->usage))
> - return -EBUSY;
> + if (ofb->usage++ == 0)
> + /* unblank the base framebuffer */
> + fb_blank(&ofb->fbi->fb, FB_BLANK_UNBLANK);
>
> - /* unblank the base framebuffer */
> - fb_blank(&ofb->fbi->fb, FB_BLANK_UNBLANK);
> return 0;
> }
>
> @@ -733,12 +737,24 @@ static int overlayfb_release(struct fb_info *info, int user)
> {
> struct pxafb_layer *ofb = (struct pxafb_layer*) info;
>
> - atomic_dec(&ofb->usage);
> - ofb->ops->disable(ofb);
> -
> - free_pages_exact(ofb->video_mem, ofb->video_mem_size);
> - ofb->video_mem = NULL;
> - ofb->video_mem_size = 0;
> + if (--ofb->usage == 0) {
> + ofb->ops->disable(ofb);
> + ofb->fb.var.height = -1;
> + ofb->fb.var.width = -1;
> + ofb->fb.var.xres = ofb->fb.var.xres_virtual = 0;
> + ofb->fb.var.yres = ofb->fb.var.yres_virtual = 0;
> +
> + mutex_lock(&ofb->fb.mm_lock);
> + ofb->fb.fix.smem_start = 0;
> + ofb->fb.fix.smem_len = 0;
> + mutex_unlock(&ofb->fb.mm_lock);
> +
> + if (ofb->video_mem) {
> + free_pages_exact(ofb->video_mem, ofb->video_mem_size);
> + ofb->video_mem = NULL;
> + ofb->video_mem_size = 0;
> + }
> + }
> return 0;
> }
>
> @@ -817,7 +833,8 @@ static int overlayfb_map_video_memory(struct pxafb_layer *ofb)
> if (ofb->video_mem_size >= size)
> return 0;
>
> - free_pages_exact(ofb->video_mem, ofb->video_mem_size);
> + /* don't re-allocate: userspace may have the buffer mapped */
> + return -EINVAL;
> }
>
> ofb->video_mem = alloc_pages_exact(size, GFP_KERNEL | __GFP_ZERO);
> @@ -891,7 +908,7 @@ static void __devinit init_pxafb_overlay(struct pxafb_info *fbi,
>
> ofb->id = id;
> ofb->ops = &ofb_ops[id];
> - atomic_set(&ofb->usage, 0);
> + ofb->usage = 0;
> ofb->fbi = fbi;
> init_completion(&ofb->branch_done);
> }
> @@ -923,8 +940,6 @@ static int __devinit pxafb_overlay_init(struct pxafb_info *fbi)
> /* mask all IU/BS/EOF/SOF interrupts */
> lcd_writel(fbi, LCCR5, ~0);
>
> - /* place overlay(s) on top of base */
> - fbi->lccr0 |= LCCR0_OUC;
> pr_info("PXA Overlay driver loaded successfully!\n");
> return 0;
> }
> @@ -1368,7 +1383,8 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var,
> (lcd_readl(fbi, LCCR3) != fbi->reg_lccr3) ||
> (lcd_readl(fbi, LCCR4) != fbi->reg_lccr4) ||
> (lcd_readl(fbi, FDADR0) != fbi->fdadr[0]) ||
> - (lcd_readl(fbi, FDADR1) != fbi->fdadr[1]))
> + ((fbi->lccr0 & LCCR0_SDS) &&
> + (lcd_readl(fbi, FDADR1) != fbi->fdadr[1])))
> pxafb_schedule_work(fbi, C_REENABLE);
>
> return 0;
> @@ -1420,7 +1436,8 @@ static void pxafb_enable_controller(struct pxafb_info *fbi)
> lcd_writel(fbi, LCCR0, fbi->reg_lccr0 & ~LCCR0_ENB);
>
> lcd_writel(fbi, FDADR0, fbi->fdadr[0]);
> - lcd_writel(fbi, FDADR1, fbi->fdadr[1]);
> + if (fbi->lccr0 & LCCR0_SDS)
> + lcd_writel(fbi, FDADR1, fbi->fdadr[1]);
> lcd_writel(fbi, LCCR0, fbi->reg_lccr0 | LCCR0_ENB);
> }
>
> @@ -1806,6 +1823,11 @@ static struct pxafb_info * __devinit pxafb_init_fbinfo(struct device *dev)
>
> pxafb_decode_mach_info(fbi, inf);
>
> +#ifdef CONFIG_FB_PXA_OVERLAY
> + if (cpu_is_pxa27x())
> + fbi->lccr0 |= LCCR0_OUC;
> +#endif
> +
> init_waitqueue_head(&fbi->ctrlr_wait);
> INIT_WORK(&fbi->task, pxafb_task);
> mutex_init(&fbi->ctrlr_lock);
> diff --git a/drivers/video/pxafb.h b/drivers/video/pxafb.h
> index 2353521..84e3ae1 100644
> --- a/drivers/video/pxafb.h
> +++ b/drivers/video/pxafb.h
> @@ -92,7 +92,7 @@ struct pxafb_layer_ops {
> struct pxafb_layer {
> struct fb_info fb;
> int id;
> - atomic_t usage;
> + uint32_t usage;
> uint32_t control[2];
>
> struct pxafb_layer_ops *ops;
> --
> 1.7.4.rc1
>
^ permalink raw reply
* [PATCH 2/2] P2V: Thumb2 support
From: Nicolas Pitre @ 2011-02-13 13:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110213114243.GC4799@n2100.arm.linux.org.uk>
On Sun, 13 Feb 2011, Russell King - ARM Linux wrote:
> On Sat, Feb 12, 2011 at 01:33:42PM -0500, Nicolas Pitre wrote:
> > __fixup_a_pv_table:
> > +#ifdef CONFIG_THUMB2_KERNEL
> > +#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
> > + lsls r0, r6, #24
> > + lsr r6, #8
> > + beq 1f
> > + clz r7, r0
> > + lsrs r0, #24
> > + lsls r0, r7
>
> Why do these instructions need to update the PSR?
Strictly speaking they don't. It's just a size optimization. There is
a 16-bit encoding for them while their non-PSR-updating counterparts
have only a 32-bit encoding.
> > + strh ip, [r7, #2]
> > +4: cmp r4, r5
> > + ldrcc r7, [r4], #4 @ use branch for delay slot
> > + bcc 2b
> > + bx lr
>
> Something's wrong with the indentation here.
Right, spaces instead of tabs, fixed.
Nicolas
^ permalink raw reply
* The p2v branch
From: Nicolas Pitre @ 2011-02-13 14:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110213114050.GB4799@n2100.arm.linux.org.uk>
On Sun, 13 Feb 2011, Russell King - ARM Linux wrote:
> On Sat, Feb 12, 2011 at 04:01:14PM -0500, Nicolas Pitre wrote:
> > I've rebased my 2 patches on top of your latest p2v branch. You may
> > pull them from:
> >
> > git://git.linaro.org/people/nico/linux p2v
> >
> > Or if you prefer I can put them in the patch system.
>
> I'd like to wait for Catalin to respond on the phys_addr_t patch - which
> allows 64-bit phys addresses. Obviously that's going to have an impact
> on the p2v code and I'd rather someone else had the job of working out
> what to do about the T2 code.
OK.
Thinking ahead a bit, what changes would be needed? Obviously, there
can't be a machine with all its RAM above the 4G limit or it wouldn't be
able to run without the MMU on. And the p2v/v2p conversion macros can
only be used on the direct mapped memory i.e. the non highmem memory
which is likely to be all located below that 4G limit. In that case the
fixup code shouldn't be affected, right?
Nicolas
^ permalink raw reply
* [PATCH 1/7] mmc: mxs-mmc: add mmc host driver for i.MX23/28
From: Arnd Bergmann @ 2011-02-13 15:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110213175300.GA10271@S2100-06.ap.freescale.net>
On Sunday 13 February 2011 18:53:02 Shawn Guo wrote:
> On Fri, Feb 11, 2011 at 08:35:34AM +0800, Shawn Guo wrote:
> >
> > > > + unsigned present:1;
> > >
> > > Your card detection by polling through this variable is
> > > really bad for power management. Is there really no interrupt
> > > that gets triggered when installing or removing a card?
> > >
> > Good point. Will try to use interrupt.
> >
> I'm trying to use interrupt for card detection. But unfortunately,
> I got stuck for some reason.
>
> There is a known issue that mx28 gpio interrupt from bank0 can not
> work, because the pin bank0 irq number 127 was used in
> get_irqnr_and_base (entry-macro.S) to tell there is no pending
> interrupt any more.
>
> The mmc0 cd pin has no problem to trigger interrupt, as it's GPIO_2_9.
> But mmc1 cd pin can not, because it's GPIO_0_20.
>
> So I probably have to stay with polling.
I'm not sure if I understand completely. Is this a fundamental restriction,
or something that only happens on a specific board?
Maybe you can do both polling and interrupt driven card detection in
the driver, and make it depend on a board-specific quirk. E.g. if you
pass an interrupt number in the platform data, it should just use the
interrupt, but if the interrupt is missing, you can fall back to
polling.
Arnd
^ permalink raw reply
* [PATCH V3 2/6] pxa3xx_nand: rework irq logic
From: Lei Wen @ 2011-02-13 15:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <AANLkTinPyB-gUQg00kFg6SnsCpnfJRcD2PtgwfkjrUUh@mail.gmail.com>
Hi Eric,
On Sun, Feb 13, 2011 at 5:46 PM, Eric Miao <eric.y.miao@gmail.com> wrote:
> Hi Lei,
>
> I like this idea very much. There are several places for improvement,
> though, you mind take a look?
>
>> ?static int pxa3xx_nand_dev_ready(struct mtd_info *mtd)
>> @@ -580,14 +582,12 @@ static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
>> ?{
>> ? ? ? ?struct pxa3xx_nand_info *info = mtd->priv;
>> ? ? ? ?const struct pxa3xx_nand_cmdset *cmdset = info->cmdset;
>> - ? ? ? int ret;
>> + ? ? ? int ret, exec_cmd = 0;
>>
>> ? ? ? ?info->use_dma = (use_dma) ? 1 : 0;
>> ? ? ? ?info->use_ecc = 0;
>> ? ? ? ?info->data_size = 0;
>> - ? ? ? info->state = STATE_READY;
>> -
>> - ? ? ? init_completion(&info->cmd_complete);
>> + ? ? ? info->state = 0;
>>
>> ? ? ? ?switch (command) {
>> ? ? ? ?case NAND_CMD_READOOB:
>> @@ -596,14 +596,12 @@ static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
>> ? ? ? ? ? ? ? ?info->buf_start = mtd->writesize + column;
>> ? ? ? ? ? ? ? ?memset(info->data_buff, 0xFF, info->buf_count);
>>
>> - ? ? ? ? ? ? ? if (prepare_read_prog_cmd(info, cmdset->read1, column, page_addr))
>> - ? ? ? ? ? ? ? ? ? ? ? break;
>> -
>> - ? ? ? ? ? ? ? pxa3xx_nand_do_cmd(info, NDSR_RDDREQ | NDSR_DBERR | NDSR_SBERR);
>> -
>> + ? ? ? ? ? ? ? prepare_read_prog_cmd(info, cmdset->read1, column, page_addr);
>> ? ? ? ? ? ? ? ?/* We only are OOB, so if the data has error, does not matter */
>> ? ? ? ? ? ? ? ?if (info->retcode == ERR_DBERR)
>> ? ? ? ? ? ? ? ? ? ? ? ?info->retcode = ERR_NONE;
>
> Note the above statement is executed after a do_cmd() is done, so
> info->retcode contains a valid return code. While the actual code
> to perform the command has been moved to below.
It is my fault not delete those line here...
In my following 0004 patch, I would unify the prepare step into one function.
BTW, for OOB data, I think we also shouldn't omit the DB error.
Like BCH crc algorithm, it also protect the oob area, so it is reasonable to
be aware that area...
>
> For each transaction, there are three steps:
>
> ?1. prepare/fill the command
> ?2. perform the command
> ?3. handle the return status
>
> I actually though of merging steps 2) and 3) together, but step
> 3) could be different, and that the timeout for different type of
> commands might be different, that's why I introduced the do_cmd()
> function.
I agree. :)
That is what I want to do in this patch set, unify the prepare behavior
into one function, and then execute it.
>
>> +
>> + ? ? ? ? ? ? ? exec_cmd = 1;
>
> Maybe for those cases where commands are not executed, just simply
> return will avoid introducing this exec_cmd variable.
For I unify the prepare process into one function according to different
command, simply return would be unable to notify the execute action...
The exec_cmd would be made as the return value for the prepare function.
>
> .....
>
>> @@ -807,10 +795,7 @@ static int __readid(struct pxa3xx_nand_info *info, uint32_t *id)
>> ? ? ? ?uint32_t ndcr;
>> ? ? ? ?uint8_t ?id_buff[8];
>>
>
> I saw __readid() is replaced by pxa3xx_nand_cmdfunc(NAND_CMD_READID)
> in the code below. ?Is it possible to completely remove this function
> now??
I made the remove behavior in the patch 0003. :)
Thanks,
Lei
^ permalink raw reply
* [PATCH 1/7] mmc: mxs-mmc: add mmc host driver for i.MX23/28
From: Arnd Bergmann @ 2011-02-13 16:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110213235207.GA10397@S2100-06.ap.freescale.net>
On Monday 14 February 2011 00:52:08 Shawn Guo wrote:
> I rewriting the code to use mmc core card detect polling framework.
>
> static int mxs_mmc_get_cd(struct mmc_host *mmc)
> {
> struct mxs_mmc_host *host = mmc_priv(mmc);
>
> return !(readl(host->base + HW_SSP_STATUS) &
> BM_SSP_STATUS_CARD_DETECT);
> }
>
> static const struct mmc_host_ops mxs_mmc_ops = {
> ...
> .get_cd = mxs_mmc_get_cd,
> };
>
> static int mxs_mmc_probe(struct platform_device *pdev)
> {
> ...
> mmc_caps |= MMC_CAP_NEEDS_POLL;
> ...
> }
>
> It looks pretty simple and mmc core code has taken care of the case
> of power management. So if this looks fine to you, I will go for it
> in v2 of the patch set.
Yes, that looks very good.
Arnd
^ permalink raw reply
* MMC quirks relating to performance/lifetime.
From: Arnd Bergmann @ 2011-02-13 17:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <AANLkTikGvUZ2sWfox9Ws+gbuCw1JiykO=y-rk9QjL8xJ@mail.gmail.com>
On Sunday 13 February 2011 01:10:09 Andrei Warkentin wrote:
> On Sat, Feb 12, 2011 at 12:37 PM, Arnd Bergmann <arnd@arndb.de> wrote:
>
> > This part might make sense in general, though it's hard to know the
> > page size in the general case. For many SD cards, writing naturally
> > aligned 64 KB blocks was the ideal case in my testing, but some need
> > larger alignment or can deal well with smaller blocks.
> >
>
> ...which is why I believe this should be a boot per-card parameter,
> and that it really only makes sense for embedded parts, where you know
> nothing else is going to be used as, say, mmcblk0.
I don't think it needs to be boot-time, it can easily be run-time
tuneable using sysfs, where you can configure it using an init script
or some other logic from user space.
> > I could imagine that this will cause problems on your eMMC once you
> > write small blocks to more than erase block group, because that probably
> > causes it to start garbage collection -- it makes sense for the cards
> > to know that something is a directory, but it can only know about
> > a small number of directories, so it will turn the segment into a regular
> > one as soon something else becomes a directory.
> >
>
> It's difficult for me to argue one way or another. The code provided
> is implementing Toshiba's suggestions for mitigating excessive wear.
> Basically, as far as certain Android products are concerned, Motorola
> created some "typical usage" cases, and collected data logs. These
> logs were analyzed by Toshiba, which reported an approx x16
> multiplication factor for writes.
Yes, I've seen similar numbers in my measurements. My experience with
the Kingston/Toshiba cards is that they combine two unfortunate
problems:
* Only one 4 MB AU can be open, writing to a different AU waits for
garbage collection on the old one. Other cards typically have
five buffers for open AUs, which makes them much easier to work with.
* Only linear access within one AU is fast. Writing to a block with
a lower address in the same AU causes garbage collection of the AU.
> Analysis of data written showed that there were many random accesses
> with 16KB or 32KB, meaning they go into buffer B.
I have started a remapping layer that should be able to deal with
this independent of the card, see
https://wiki.linaro.org/WorkingGroups/KernelConsolidation/Projects/FlashDeviceMapper
It's still in the early stages, but maybe something like that will
help you as well.
The real solution would be to have a file system that knows what
accesses are fast and reorders file data accordingly. Right now,
the only thing that is normally fast is FAT32 using 32KB clusters,
and only if the file system is aligned properly.
> According to T, that
> means extra GC and PE cycle. I'm guessing per write.
Yes.
What is "PE" here?
> So T suggested for random data to better go into buffer A. How? Two suggestions.
> 1) Split smaller accesses into 8KB and write with reliable write.
> 2) Split smaller accesses into 8KB and write in reverse.
>
> The patch does both and I am verifying if that is really necessary. I
> need to go see the mmc spec and what it says about reliable write.
I should add this to my test tool once I can reproduce it. If it turns
out that other media do the same, we can also trigger the same behavior
for those.
> Basically, whatever behavior you choose is going to be wrong some set
> of cards. Which is why tuning it probably only makes sense for eMMC
> parts, and should be a set of runtime/compile-time quirks. What do you
> think?
Your explanation makes sense, but I'd definitely favor a run-time solution
over compile-time or boot-time, because it would be much more flexible.
We should also be able to find some optimizations that are universally
good so we can always use them.
Arnd
^ permalink raw reply
* [PATCH 1/7] mmc: mxs-mmc: add mmc host driver for i.MX23/28
From: Shawn Guo @ 2011-02-13 17:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110211003533.GA9151@S2100-06.ap.freescale.net>
Hi Arnd,
On Fri, Feb 11, 2011 at 08:35:34AM +0800, Shawn Guo wrote:
>
> > > + unsigned present:1;
> >
> > Your card detection by polling through this variable is
> > really bad for power management. Is there really no interrupt
> > that gets triggered when installing or removing a card?
> >
> Good point. Will try to use interrupt.
>
I'm trying to use interrupt for card detection. But unfortunately,
I got stuck for some reason.
There is a known issue that mx28 gpio interrupt from bank0 can not
work, because the pin bank0 irq number 127 was used in
get_irqnr_and_base (entry-macro.S) to tell there is no pending
interrupt any more.
The mmc0 cd pin has no problem to trigger interrupt, as it's GPIO_2_9.
But mmc1 cd pin can not, because it's GPIO_0_20.
So I probably have to stay with polling.
Regards,
Shawn
^ permalink raw reply
* [PATCH 2/2] ARM: tegra: add TrimSlice board
From: Colin Cross @ 2011-02-13 19:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4D57BBC7.4070306@compulab.co.il>
On Sun, Feb 13, 2011 at 3:08 AM, Mike Rapoport <mike@compulab.co.il> wrote:
> On 02/11/11 04:43, Colin Cross wrote:
>> On Mon, Feb 7, 2011 at 12:10 AM, Mike Rapoport <mike@compulab.co.il> wrote:
>>> Add basic support for CompuLab TrimSlice platform
>>>
>>> Signed-off-by: Mike Rapoport <mike@compulab.co.il>
>>> ---
>>> ?arch/arm/mach-tegra/Kconfig ? ? ? ? ? ? ? ? ?| ? ?6 +
>>> ?arch/arm/mach-tegra/Makefile ? ? ? ? ? ? ? ? | ? ?3 +
>>> ?arch/arm/mach-tegra/board-trimslice-pinmux.c | ?145 ++++++++++++++++++++++++++
>>> ?arch/arm/mach-tegra/board-trimslice.c ? ? ? ?| ?104 ++++++++++++++++++
>>> ?arch/arm/mach-tegra/board-trimslice.h ? ? ? ?| ? 22 ++++
>>> ?5 files changed, 280 insertions(+), 0 deletions(-)
>>> ?create mode 100644 arch/arm/mach-tegra/board-trimslice-pinmux.c
>>> ?create mode 100644 arch/arm/mach-tegra/board-trimslice.c
>>> ?create mode 100644 arch/arm/mach-tegra/board-trimslice.h
>>>
>>> diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
>>> index acd9552..f0fda77 100644
>>> --- a/arch/arm/mach-tegra/Kconfig
>>> +++ b/arch/arm/mach-tegra/Kconfig
>>> @@ -27,6 +27,12 @@ config MACH_HARMONY
>>> ? ? ? ?help
>>> ? ? ? ? ?Support for nVidia Harmony development platform
>>>
>>> +config MACH_TRIMSLICE
>>> + ? ? ? bool "TrimSlice board"
>>> + ? ? ? select TEGRA_PCI
>>> + ? ? ? help
>>> + ? ? ? ? Support for CompuLab TrimSlice platform
>>> +
>>> ?choice
>>> ? ? ? ? prompt "Low-level debug console UART"
>>> ? ? ? ? default TEGRA_DEBUG_UART_NONE
>>> diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
>>> index cdbc68e..0e1844b 100644
>>> --- a/arch/arm/mach-tegra/Makefile
>>> +++ b/arch/arm/mach-tegra/Makefile
>>> @@ -19,3 +19,6 @@ obj-$(CONFIG_TEGRA_PCI) ? ? ? ? ? ? ? ? ? ? ? += pcie.o
>>> ?obj-${CONFIG_MACH_HARMONY} ? ? ? ? ? ? ?+= board-harmony.o
>>> ?obj-${CONFIG_MACH_HARMONY} ? ? ? ? ? ? ?+= board-harmony-pinmux.o
>>> ?obj-${CONFIG_MACH_HARMONY} ? ? ? ? ? ? ?+= board-harmony-pcie.o
>>> +
>>> +obj-${CONFIG_MACH_TRIMSLICE} ? ? ? ? ? ?+= board-trimslice.o
>>> +obj-${CONFIG_MACH_TRIMSLICE} ? ? ? ? ? ?+= board-trimslice-pinmux.o
>>> diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
>>> new file mode 100644
>>> index 0000000..6d4fc9f
>>> --- /dev/null
>>> +++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
>>> @@ -0,0 +1,145 @@
>>> +/*
>>> + * arch/arm/mach-tegra/board-trimslice-pinmux.c
>>> + *
>>> + * Copyright (C) 2011 CompuLab, Ltd.
>>> + *
>>> + * This software is licensed under the terms of the GNU General Public
>>> + * License version 2, as published by the Free Software Foundation, and
>>> + * may be copied, distributed, and modified under those terms.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the
>>> + * GNU General Public License for more details.
>>> + *
>>> + */
>>> +
>>> +#include <linux/kernel.h>
>>> +#include <linux/init.h>
>>> +#include <mach/pinmux.h>
>>> +
>>> +#include "board-trimslice.h"
>>> +
>>> +static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
>>> + ? ? ? {TEGRA_PINGROUP_ATA, ? TEGRA_MUX_IDE, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_ATB, ? TEGRA_MUX_SDIO4, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_ATC, ? TEGRA_MUX_NAND, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_ATD, ? TEGRA_MUX_GMI, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_ATE, ? TEGRA_MUX_GMI, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_OSC, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, ? ? TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_CRTP, ?TEGRA_MUX_CRT, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_CSUS, ?TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_DAP1, ?TEGRA_MUX_DAP1, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_DAP2, ?TEGRA_MUX_DAP2, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_DAP3, ?TEGRA_MUX_DAP3, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_DAP4, ?TEGRA_MUX_DAP4, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_DDC, ? TEGRA_MUX_I2C2, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_DTA, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_DTB, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_DTC, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_DTD, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_DTE, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_DTF, ? TEGRA_MUX_I2C3, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_GMA, ? TEGRA_MUX_SDIO4, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_GMB, ? TEGRA_MUX_NAND, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_GMC, ? TEGRA_MUX_SFLASH, ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_GMD, ? TEGRA_MUX_SFLASH, ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_GME, ? TEGRA_MUX_GMI, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_GPU, ? TEGRA_MUX_UARTA, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_GPU7, ?TEGRA_MUX_RTCK, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_GPV, ? TEGRA_MUX_PCIE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_I2CP, ?TEGRA_MUX_I2C, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_IRRX, ?TEGRA_MUX_UARTB, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_IRTX, ?TEGRA_MUX_UARTB, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_KBCA, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_KBCB, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_KBCC, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_KBCD, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_KBCE, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_KBCF, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_LCSN, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_LD0, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD1, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD2, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD3, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD4, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD5, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD6, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD7, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD8, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD9, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD10, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD11, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD12, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD13, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD14, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD15, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD16, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LD17, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LDC, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_LDI, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LHP0, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LHP1, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LHP2, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LHS, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LM0, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LM1, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_LPP, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LPW0, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LPW1, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_LPW2, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LSC0, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LSC1, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_LSCK, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_LSDA, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_LSDI, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_LSPI, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LVP0, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_LVP1, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_LVS, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_OWC, ? TEGRA_MUX_RSVD2, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_PMC, ? TEGRA_MUX_PWR_ON, ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_PTA, ? TEGRA_MUX_RSVD3, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_RM, ? ?TEGRA_MUX_I2C, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_SDB, ? TEGRA_MUX_PWM, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_SDC, ? TEGRA_MUX_PWM, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_SDD, ? TEGRA_MUX_PWM, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_SLXA, ?TEGRA_MUX_PCIE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_SLXC, ?TEGRA_MUX_SDIO3, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_SLXD, ?TEGRA_MUX_SDIO3, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_SLXK, ?TEGRA_MUX_PCIE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_SPDI, ?TEGRA_MUX_SPDIF, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_SPDO, ?TEGRA_MUX_SPDIF, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_SPIA, ?TEGRA_MUX_SPI2, ? ? ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_SPIB, ?TEGRA_MUX_SPI2, ? ? ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_SPIC, ?TEGRA_MUX_SPI2, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_SPID, ?TEGRA_MUX_SPI1, ? ? ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_SPIE, ?TEGRA_MUX_SPI1, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_SPIF, ?TEGRA_MUX_SPI1, ? ? ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_SPIG, ?TEGRA_MUX_SPI2_ALT, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_SPIH, ?TEGRA_MUX_SPI2_ALT, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_UAA, ? TEGRA_MUX_ULPI, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_UAB, ? TEGRA_MUX_ULPI, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_UAC, ? TEGRA_MUX_RSVD2, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_UAD, ? TEGRA_MUX_IRDA, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_UCA, ? TEGRA_MUX_UARTC, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_UCB, ? TEGRA_MUX_UARTC, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_UDA, ? TEGRA_MUX_ULPI, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
>>> + ? ? ? {TEGRA_PINGROUP_CK32, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_DDRC, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_PMCA, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_PMCB, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_PMCC, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_PMCD, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_PMCE, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_XM2C, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> + ? ? ? {TEGRA_PINGROUP_XM2D, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
>>> +};
>>> +
>>> +void __init trimslice_pinmux_init(void)
>>> +{
>>> + ? ? ? tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
>>> +}
>>> diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
>>> new file mode 100644
>>> index 0000000..ef233b2
>>> --- /dev/null
>>> +++ b/arch/arm/mach-tegra/board-trimslice.c
>>> @@ -0,0 +1,104 @@
>>> +/*
>>> + * arch/arm/mach-tegra/board-trimslice.c
>>> + *
>>> + * Copyright (C) 2011 CompuLab, Ltd.
>>> + * Author: Mike Rapoport <mike@compulab.co.il>
>>> + *
>>> + * Based on board-harmony.c
>>> + * Copyright (C) 2010 Google, Inc.
>>> + *
>>> + * This software is licensed under the terms of the GNU General Public
>>> + * License version 2, as published by the Free Software Foundation, and
>>> + * may be copied, distributed, and modified under those terms.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the
>>> + * GNU General Public License for more details.
>>> + *
>>> + */
>>> +
>>> +#include <linux/kernel.h>
>>> +#include <linux/init.h>
>>> +#include <linux/platform_device.h>
>>> +#include <linux/serial_8250.h>
>>> +#include <linux/io.h>
>>> +
>>> +#include <asm/mach-types.h>
>>> +#include <asm/mach/arch.h>
>>> +#include <asm/setup.h>
>>> +
>>> +#include <mach/iomap.h>
>>> +
>>> +#include "board.h"
>>> +#include "clock.h"
>>> +
>>> +#include "board-trimslice.h"
>>> +
>>> +static struct plat_serial8250_port debug_uart_platform_data[] = {
>>> + ? ? ? {
>>> + ? ? ? ? ? ? ? .membase ? ? ? ?= IO_ADDRESS(TEGRA_UARTA_BASE),
>>> + ? ? ? ? ? ? ? .mapbase ? ? ? ?= TEGRA_UARTA_BASE,
>>> + ? ? ? ? ? ? ? .irq ? ? ? ? ? ?= INT_UARTA,
>>> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= UPF_BOOT_AUTOCONF,
>>> + ? ? ? ? ? ? ? .iotype ? ? ? ? = UPIO_MEM,
>>> + ? ? ? ? ? ? ? .regshift ? ? ? = 2,
>>> + ? ? ? ? ? ? ? .uartclk ? ? ? ?= 216000000,
>>> + ? ? ? }, {
>>> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0
>>> + ? ? ? }
>>> +};
>>> +
>>> +static struct platform_device debug_uart = {
>>> + ? ? ? .name ? = "serial8250",
>>> + ? ? ? .id ? ? = PLAT8250_DEV_PLATFORM,
>>> + ? ? ? .dev ? ?= {
>>> + ? ? ? ? ? ? ? .platform_data ?= debug_uart_platform_data,
>>> + ? ? ? },
>>> +};
>>> +
>>> +static struct platform_device *trimslice_devices[] __initdata = {
>>> + ? ? ? &debug_uart,
>>> +};
>>> +
>>> +static void __init tegra_trimslice_fixup(struct machine_desc *desc,
>>> + ? ? ? struct tag *tags, char **cmdline, struct meminfo *mi)
>>> +{
>>> + ? ? ? mi->nr_banks = 2;
>>> + ? ? ? mi->bank[0].start = PHYS_OFFSET;
>>> + ? ? ? mi->bank[0].size = 448 * SZ_1M;
>>> + ? ? ? mi->bank[1].start = SZ_512M;
>>> + ? ? ? mi->bank[1].size = SZ_512M;
>>> +}
>>> +
>>> +static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
>>> + ? ? ? /* name ? ? ? ? parent ? ? ? ? ?rate ? ? ? ? ? ?enabled */
>>> + ? ? ? { "uarta", ? ? ?"pll_p", ? ? ? ?216000000, ? ? ?true },
>>> + ? ? ? { NULL, ? ? ? ? NULL, ? ? ? ? ? 0, ? ? ? ? ? ? ?0},
>>> +};
>>> +
>>> +static int __init tegra_trimslice_pci_init(void)
>>> +{
>>> + ? ? ? return tegra_pcie_init(true, true);
>>> +}
>>> +subsys_initcall(tegra_trimslice_pci_init);
>>> +
>>> +static void __init tegra_trimslice_init(void)
>>> +{
>>> + ? ? ? tegra_common_init();
>>> +
>>> + ? ? ? tegra_clk_init_from_table(trimslice_clk_init_table);
>>> +
>>> + ? ? ? trimslice_pinmux_init();
>>> +
>>> + ? ? ? platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
>>> +}
>>> +
>>> +MACHINE_START(TRIMSLICE, "trimslice")
>>> + ? ? ? .boot_params ? ?= 0x00000100,
>>> + ? ? ? .fixup ? ? ? ? ?= tegra_trimslice_fixup,
>>> + ? ? ? .init_irq ? ? ? = tegra_init_irq,
>>> + ? ? ? .init_machine ? = tegra_trimslice_init,
>>> + ? ? ? .map_io ? ? ? ? = tegra_map_common_io,
>>> + ? ? ? .timer ? ? ? ? ?= &tegra_timer,
>>> +MACHINE_END
>>> diff --git a/arch/arm/mach-tegra/board-trimslice.h b/arch/arm/mach-tegra/board-trimslice.h
>>> new file mode 100644
>>> index 0000000..16ec0f0
>>> --- /dev/null
>>> +++ b/arch/arm/mach-tegra/board-trimslice.h
>>> @@ -0,0 +1,22 @@
>>> +/*
>>> + * arch/arm/mach-tegra/board-trimslice.h
>>> + *
>>> + * Copyright (C) 2011 CompuLab, Ltd.
>>> + *
>>> + * This software is licensed under the terms of the GNU General Public
>>> + * License version 2, as published by the Free Software Foundation, and
>>> + * may be copied, distributed, and modified under those terms.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the
>>> + * GNU General Public License for more details.
>>> + *
>>> + */
>>> +
>>> +#ifndef _MACH_TEGRA_BOARD_TRIMSLICE_H
>>> +#define _MACH_TEGRA_BOARD_TRIMSLICE_H
>>> +
>>> +void trimslice_pinmux_init(void);
>>> +
>>> +#endif
>>> --
>>> 1.7.3.1
>>
>> Ack, the machine type is merged so I'll put this in for-next. ?Do you
>> want it enabled in tegra_defconfig?
>
> If 'select TEGRA_PCI' does not trouble you, I'd be glad to have the TrimSlice in
> tegra_defconfig :)
My board without PCI doesn't boot if CONFIG_TEGRA_PCI is selected, so
I guess it should stay off for now. Any idea why it wouldn't boot?
^ permalink raw reply
* [PATCH v2 1/7] mmc: mxs-mmc: add mmc host driver for i.MX23/28
From: Chris Ball @ 2011-02-13 19:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1297650746-12841-2-git-send-email-shawn.guo@freescale.com>
Hi Shawn,
On Mon, Feb 14, 2011 at 10:32:20AM +0800, Shawn Guo wrote:
> This adds the mmc host driver for Freescale MXS-based SoC i.MX23/28.
> The driver calls into mxs-dma via generic dmaengine api for both pio
> and data transfer.
>
> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Please add a Reviewed-by: from Arnd and a Tested-by: from Lothar.
Could you add a MODULE_AUTHOR() field, too?
I could take the drivers/mmc files through the MMC tree and have you
submit the architecture patches separately, or you can send everything
through an ARM tree with my ACK -- whichever you prefer.
Here's an indentation patch:
diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c
index f359093..3a609f9 100644
--- a/drivers/mmc/host/mxs-mmc.c
+++ b/drivers/mmc/host/mxs-mmc.c
@@ -127,13 +127,13 @@
#define BF_SSP(value, field) (((value) << BP_SSP_##field) & BM_SSP_##field)
#define MXS_MMC_IRQ_BITS (BM_SSP_CTRL1_SDIO_IRQ | \
- BM_SSP_CTRL1_RESP_ERR_IRQ | \
- BM_SSP_CTRL1_RESP_TIMEOUT_IRQ | \
- BM_SSP_CTRL1_DATA_TIMEOUT_IRQ | \
- BM_SSP_CTRL1_DATA_CRC_IRQ | \
- BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ | \
- BM_SSP_CTRL1_RECV_TIMEOUT_IRQ | \
- BM_SSP_CTRL1_FIFO_OVERRUN_IRQ)
+ BM_SSP_CTRL1_RESP_ERR_IRQ | \
+ BM_SSP_CTRL1_RESP_TIMEOUT_IRQ | \
+ BM_SSP_CTRL1_DATA_TIMEOUT_IRQ | \
+ BM_SSP_CTRL1_DATA_CRC_IRQ | \
+ BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ | \
+ BM_SSP_CTRL1_RECV_TIMEOUT_IRQ | \
+ BM_SSP_CTRL1_FIFO_OVERRUN_IRQ)
#define SSP_PIO_NUM 3
@@ -165,7 +165,7 @@ static int mxs_mmc_get_ro(struct mmc_host *mmc)
{
struct mxs_mmc_host *host = mmc_priv(mmc);
struct mxs_mmc_platform_data *pdata =
- mmc_dev(host->mmc)->platform_data;
+ mmc_dev(host->mmc)->platform_data;
if (!pdata)
return -EFAULT;
@@ -181,7 +181,7 @@ static int mxs_mmc_get_cd(struct mmc_host *mmc)
struct mxs_mmc_host *host = mmc_priv(mmc);
return !(readl(host->base + HW_SSP_STATUS) &
- BM_SSP_STATUS_CARD_DETECT);
+ BM_SSP_STATUS_CARD_DETECT);
}
static void mxs_mmc_reset(struct mxs_mmc_host *host)
@@ -202,21 +202,21 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host)
BM_SSP_CTRL1_RESP_ERR_IRQ_EN;
writel(BF_SSP(0xffff, TIMING_TIMEOUT) |
- BF_SSP(2, TIMING_CLOCK_DIVIDE) |
- BF_SSP(0, TIMING_CLOCK_RATE),
- host->base + HW_SSP_TIMING);
+ BF_SSP(2, TIMING_CLOCK_DIVIDE) |
+ BF_SSP(0, TIMING_CLOCK_RATE),
+ host->base + HW_SSP_TIMING);
if (host->sdio_irq_en) {
ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
ctrl1 |= BM_SSP_CTRL1_SDIO_IRQ_EN;
- }
+ }
writel(ctrl0, host->base + HW_SSP_CTRL0);
writel(ctrl1, host->base + HW_SSP_CTRL1);
}
static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
- struct mmc_command *cmd);
+ struct mmc_command *cmd);
static void mxs_mmc_request_done(struct mxs_mmc_host *host)
{
@@ -240,13 +240,13 @@ static void mxs_mmc_request_done(struct mxs_mmc_host *host)
break;
default:
dev_warn(mmc_dev(host->mmc),
- "%s: unsupported response type 0x%x\n",
- __func__, mmc_resp_type(cmd));
+ "%s: unsupported response type 0x%x\n",
+ __func__, mmc_resp_type(cmd));
}
if (data) {
dma_unmap_sg(mmc_dev(host->mmc), data->sg,
- data->sg_len, host->dma_dir);
+ data->sg_len, host->dma_dir);
/*
* If there was an error on any block, we mark all
* data blocks as being in error.
@@ -285,7 +285,7 @@ static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id)
stat = readl(host->base + HW_SSP_CTRL1);
writel(stat & MXS_MMC_IRQ_BITS,
- host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR);
+ host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR);
if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN))
mmc_signal_sdio_irq(host->mmc);
@@ -299,7 +299,7 @@ static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id)
if (data) {
if (stat & (BM_SSP_CTRL1_DATA_TIMEOUT_IRQ |
- BM_SSP_CTRL1_RECV_TIMEOUT_IRQ))
+ BM_SSP_CTRL1_RECV_TIMEOUT_IRQ))
data->error = -ETIMEDOUT;
else if (stat & BM_SSP_CTRL1_DATA_CRC_IRQ)
data->error = -EILSEQ;
@@ -313,7 +313,7 @@ static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id)
}
static struct dma_async_tx_descriptor *mxs_mmc_prep_dma(
- struct mxs_mmc_host *host, unsigned int append)
+ struct mxs_mmc_host *host, unsigned int append)
{
struct dma_async_tx_descriptor *desc;
struct mmc_data *data = host->data;
@@ -323,7 +323,7 @@ static struct dma_async_tx_descriptor *mxs_mmc_prep_dma(
if (data) {
/* data */
dma_map_sg(mmc_dev(host->mmc), data->sg,
- data->sg_len, host->dma_dir);
+ data->sg_len, host->dma_dir);
sgl = data->sg;
sg_len = data->sg_len;
} else {
@@ -340,7 +340,7 @@ static struct dma_async_tx_descriptor *mxs_mmc_prep_dma(
} else {
if (data)
dma_unmap_sg(mmc_dev(host->mmc), data->sg,
- data->sg_len, host->dma_dir);
+ data->sg_len, host->dma_dir);
}
return desc;
@@ -374,7 +374,7 @@ static void mxs_mmc_bc(struct mxs_mmc_host *host)
out:
dev_warn(mmc_dev(host->mmc),
- "%s: failed to prep dma\n", __func__);
+ "%s: failed to prep dma\n", __func__);
}
static void mxs_mmc_ac(struct mxs_mmc_host *host)
@@ -413,7 +413,7 @@ static void mxs_mmc_ac(struct mxs_mmc_host *host)
out:
dev_warn(mmc_dev(host->mmc),
- "%s: failed to prep dma\n", __func__);
+ "%s: failed to prep dma\n", __func__);
}
static unsigned short mxs_ns_to_ssp_ticks(unsigned clock_rate, unsigned ns)
@@ -492,12 +492,12 @@ static void mxs_mmc_adtc(struct mxs_mmc_host *host)
} else {
writel(data_size, host->base + HW_SSP_XFER_SIZE);
writel(BF_SSP(log2_blksz, BLOCK_SIZE_BLOCK_SIZE) |
- BF_SSP(blocks - 1, BLOCK_SIZE_BLOCK_COUNT),
- host->base + HW_SSP_BLOCK_SIZE);
+ BF_SSP(blocks - 1, BLOCK_SIZE_BLOCK_COUNT),
+ host->base + HW_SSP_BLOCK_SIZE);
}
if ((cmd->opcode == MMC_STOP_TRANSMISSION) ||
- (cmd->opcode == SD_IO_RW_EXTENDED))
+ (cmd->opcode == SD_IO_RW_EXTENDED))
cmd0 |= BM_SSP_CMD0_APPEND_8CYC;
cmd1 = cmd->arg;
@@ -535,11 +535,11 @@ static void mxs_mmc_adtc(struct mxs_mmc_host *host)
return;
out:
dev_warn(mmc_dev(host->mmc),
- "%s: failed to prep dma\n", __func__);
+ "%s: failed to prep dma\n", __func__);
}
static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
- struct mmc_command *cmd)
+ struct mmc_command *cmd)
{
host->cmd = cmd;
@@ -558,7 +558,7 @@ static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
break;
default:
dev_warn(mmc_dev(host->mmc),
- "%s: unknown MMC command\n", __func__);
+ "%s: unknown MMC command\n", __func__);
break;
}
}
@@ -636,18 +636,18 @@ static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
if (enable) {
writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
- host->base + HW_SSP_CTRL0 + MXS_SET_ADDR);
+ host->base + HW_SSP_CTRL0 + MXS_SET_ADDR);
writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
- host->base + HW_SSP_CTRL1 + MXS_SET_ADDR);
+ host->base + HW_SSP_CTRL1 + MXS_SET_ADDR);
if (readl(host->base + HW_SSP_STATUS) & BM_SSP_STATUS_SDIO_IRQ)
mmc_signal_sdio_irq(host->mmc);
} else {
writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
- host->base + HW_SSP_CTRL0 + MXS_CLR_ADDR);
+ host->base + HW_SSP_CTRL0 + MXS_CLR_ADDR);
writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
- host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR);
+ host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR);
}
spin_unlock_irqrestore(&host->lock, flags);
@@ -710,7 +710,7 @@ static int mxs_mmc_probe(struct platform_device *pdev)
/* only major verion does matter */
host->version = readl(host->base + HW_SSP_VERSION) >>
- BP_SSP_VERSION_MAJOR;
+ BP_SSP_VERSION_MAJOR;
host->mmc = mmc;
host->res = r;
@@ -755,8 +755,7 @@ static int mxs_mmc_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, mmc);
- ret = request_irq(host->irq, mxs_mmc_irq_handler, 0,
- DRIVER_NAME, host);
+ ret = request_irq(host->irq, mxs_mmc_irq_handler, 0, DRIVER_NAME, host);
if (ret)
goto out_free_dma;
--
Chris Ball <cjb@laptop.org> <http://printf.net/>
One Laptop Per Child
^ permalink raw reply related
* [PATCH] mx31: add support for the bugbase 1.3 from buglabs
From: Uwe Kleine-König @ 2011-02-13 21:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1297465616.18578.8.camel@gnutoo-laptop>
Hi Denis,
On Sat, Feb 12, 2011 at 12:06:56AM +0100, Denis 'GNUtoo' Carikli wrote:
> On Fri, 2011-02-11 at 22:39 +0100, Uwe Kleine-K?nig wrote:
> > On Fri, Feb 11, 2011 at 10:13:36PM +0100, Denis 'GNUtoo' Carikli wrote:
> > > > diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
> > > > index e634d6c..b45f534 100644
> > > > --- a/arch/arm/plat-mxc/include/mach/uncompress.h
> > > > +++ b/arch/arm/plat-mxc/include/mach/uncompress.h
> > > > @@ -62,6 +62,7 @@ static inline void flush(void)
> > > > #define MX2X_UART1_BASE_ADDR 0x1000a000
> > > > #define MX3X_UART1_BASE_ADDR 0x43F90000
> > > > #define MX3X_UART2_BASE_ADDR 0x43F94000
> > > > +#define MX3X_UART5_BASE_ADDR 0x43FB4000
> > > > #define MX51_UART1_BASE_ADDR 0x73fbc000
> > > > #define MX50_UART1_BASE_ADDR 0x53fbc000
> > > > #define MX53_UART1_BASE_ADDR 0x53fbc000
> > > > @@ -102,6 +103,9 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
> > > > case MACH_TYPE_MAGX_ZN5:
> > > > uart_base = MX3X_UART2_BASE_ADDR;
> > > > break;
> > > > + case MACH_TYPE_BUG:
> > > > + uart_base = MX3X_UART5_BASE_ADDR;
> > > > + break;
> > > > case MACH_TYPE_MX51_BABBAGE:
> > > > case MACH_TYPE_EUKREA_CPUIMX51SD:
> > > > case MACH_TYPE_MX51_3DS:
> > > That seem not to crash, but I wonder if it's really useful:
> > > Basically I see u-boot loading the kernel, then I have
> > > > Uncompressing Linux...
> > > Then I wait some seconds
> > > Then I see that line beeing complretted with:
> > > > done, booting the kernel.
> > > Then the rest of the messages are displayed very fast,
> > > along with initramfs loading messages and I finally get a shell.
> > That means you'd prefer no output?
> I should have misunderstood something, but I believed that that
> uncompress.h was for early printk.
> And so I expected printk to be printed on serial console immediately,
> not waiting for the serial port to be initialized again(as it is already
> initialized by the u-boot bootloader).
There is nothing reinitialized, in fact the code in
arch/arm/plat-mxc/include/mach/uncompress.h assumes the UART is already
initialized by the boot loader. The only difference this hunk above
results in is that the messages "Uncompressing Linux..." and "done,
booting the kernel." are printed on your UART. And if you skip them you
still have that some seconds pause, and you only save the time the
characters need to pass your UART.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [RFC] Inter-processor Mailboxes Drivers
From: Linus Walleij @ 2011-02-13 21:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <AANLkTikP0P9S1VgiU_yT53f-kZq0JMLBJoVWigAy8YWB@mail.gmail.com>
2011/2/12 Sundar <sunder.svit@gmail.com>:
> At least I would like this; I wanted to generalize such mailbox IPCs
> right from the day when I was working on one, but coudnt really
> work on that.
>
>> ? ?2. Does something like this already exist?
>
> Not generic as you say; but apart from the OMAP platforms,
> you could refer to arch/arm/mach-ux500/prcmu for a mailbox based
> IPC on the U8500 platform.
We also have this thing:
arch/arm/mach-ux500/mbox-db5500.c
It's another mailbox driver, this one talks to the modem in the
U5500 (basically a physical transport for the CAIF protocol).
(For the U8500 I think modem IPC is instead handled with
a high-speed hardware FIFO, a bit different.)
>> ? ?3. Is someone else already working on this?
>
> Not sure of that too :), but I am CCing Linus W, the maintainer
> of U8500 if he thinks it is a good idea to come up with a mailbox IPC
> framework
I don't know too much about the subject actually, I've not been
deeply into any such code. I don't think anyone is working
on something general from ST-Ericsson or Linaro.
Recently I saw that Texas Instruments are posting a "hardware
spinlock" framework though, this would be on a related tone,
but I think it's for shared data structures (control path) rather
than buffer passing (data path). I'm guessing this works like
that one CPU gets to spin waiting for another one to release
the lock.
Given that we may have a framework for hardware spinlock
and that we don't want to stockpile drivers into arch/*
or drivers/misc/* I would say it's intuitively a good idea,
but the question is what data types you would pass in?
In arch/arm/mach-ux500/include/mach/mbox-db5500.h
we have a struct like this:
/**
* struct mbox - Mailbox instance struct
* @list: Linked list head.
* @pdev: Pointer to device struct.
* @cb: Callback function. Will be called
* when new data is received.
* @client_data: Clients private data. Will be sent back
* in the callback function.
* @virtbase_peer: Virtual address for outgoing mailbox.
* @virtbase_local: Virtual address for incoming mailbox.
* @buffer: Then internal queue for outgoing messages.
* @name: Name of this mailbox.
* @buffer_available: Completion variable to achieve "blocking send".
* This variable will be signaled when there is
* internal buffer space available.
* @client_blocked: To keep track if any client is currently
* blocked.
* @lock: Spinlock to protect this mailbox instance.
* @write_index: Index in internal buffer to write to.
* @read_index: Index in internal buffer to read from.
* @allocated: Indicates whether this particular mailbox
* id has been allocated by someone.
*/
struct mbox {
struct list_head list;
struct platform_device *pdev;
mbox_recv_cb_t *cb;
void *client_data;
void __iomem *virtbase_peer;
void __iomem *virtbase_local;
u32 buffer[MBOX_BUF_SIZE];
char name[MBOX_NAME_SIZE];
struct completion buffer_available;
u8 client_blocked;
spinlock_t lock;
u8 write_index;
u8 read_index;
bool allocated;
};
Compare OMAPs mailboxes in
arch/arm/plat-omap/include/plat/mailbox.h:
typedef u32 mbox_msg_t;
truct omap_mbox_ops {
omap_mbox_type_t type;
int (*startup)(struct omap_mbox *mbox);
void (*shutdown)(struct omap_mbox *mbox);
/* fifo */
mbox_msg_t (*fifo_read)(struct omap_mbox *mbox);
void (*fifo_write)(struct omap_mbox *mbox, mbox_msg_t msg);
int (*fifo_empty)(struct omap_mbox *mbox);
int (*fifo_full)(struct omap_mbox *mbox);
/* irq */
void (*enable_irq)(struct omap_mbox *mbox,
omap_mbox_irq_t irq);
void (*disable_irq)(struct omap_mbox *mbox,
omap_mbox_irq_t irq);
void (*ack_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
int (*is_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
/* ctx */
void (*save_ctx)(struct omap_mbox *mbox);
void (*restore_ctx)(struct omap_mbox *mbox);
};
struct omap_mbox_queue {
spinlock_t lock;
struct kfifo fifo;
struct work_struct work;
struct tasklet_struct tasklet;
struct omap_mbox *mbox;
bool full;
};
struct omap_mbox {
char *name;
unsigned int irq;
struct omap_mbox_queue *txq, *rxq;
struct omap_mbox_ops *ops;
struct device *dev;
void *priv;
int use_count;
struct blocking_notifier_head notifier;
};
Some of this may be generalized? I dunno, they look quite
different but maybe queueing etc can actually be made general
enough to form a framework.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCHv3] mx31: add support for the bugbase 1.3 from buglabs
From: Uwe Kleine-König @ 2011-02-13 21:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1297545419-31181-1-git-send-email-GNUtoo@no-log.org>
Hi Denis,
On Sat, Feb 12, 2011 at 10:16:59PM +0100, Denis 'GNUtoo' Carikli wrote:
> This work was based on bug-linux-2.6.30.patch that can be found
> in buglabs's svn here:
> svn://bugcamp.net/bug/branches/izzy/experimental
>
> Note that the hardware schematics and documentations can be obtained
> here: http://www.bugcommunity.com/wiki/index.php/BUGbase
>
> Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
The patch looks good to me now. If you want to make me still more
happy, there are still two minor things to optimize:
- don't reference the history of the patch in the commit log. This is
quite useless once the commit made it into Linus' tree. (The info
might still be interesting, but then put it after the tripple dash
below. Then it won't make it into git.)
- there is a trailing empty line in bug_board_init()
Maybe Sascha can fix this up when taking the patch? (Assuming the
others are happy now, too of course.)
And I wonder there is no copyright statement by you in
arch/arm/mach-mx3/mach-bug.c, maybe because you consider your changes
too minor to be relevant? (INAL and I don't know who to value your
contribution.)
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [RFC] Inter-processor Mailboxes Drivers
From: Linus Walleij @ 2011-02-13 21:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4D55A7F7.5090700@mentor.com>
2011/2/11 Meador Inge <meador_inge@mentor.com>:
>?This would entail the traditional
> generic/specific driver split:
>
> ? ?1. Hardware specific bits somewhere under '.../arch/*'. ?Drivers
> ? ? ? for the MPIC message registers on Power and OMAP4 mailboxes, for
> ? ? ? example.
Having any drivers under arch/* is no good tradition IMO.
Better move the whole shebang down to drivers/mailbox so
that the subsystem maintainer get the complete overview
of her/his driver family.
> ? ?2. A higher level driver under '.../drivers/mailbox/*'. ?That the
> ? ? ? pieces in (1) would register with. ?This piece would expose the
> ? ? ? main kernel API.
Cool...
> ? ?3. Userspace interfaces for accessing the mailboxes. ?A
> ? ? ? '/dev/mailbox1', '/dev/mailbox2', etc... mapping, for example.
What kind of business does userspace have with directly using
mailboxes? Enlighten me so I get it... in our system these are
used by protocols, such as net/caif/* thru drivers/net/caif/*, and
we have similar kernelspace functionality for Phonet.
CAIF and Phonet on the other hand, have custom openings
down to the thing that exists on the other end of the mailbox.
Most of these systems tend to talk some funny protocol that
is often better handled by the kernel than by any userspace.
So is this for the situation when you have no intermediate
protocol between your userpace and the other CPU's
subsystem? Or are you thinking about handling that
protocol in userspace? That is generally not such a good idea
for efficiency reasons.
Yoursm
Linus Walleij
^ permalink raw reply
* [RFC PATCH 3/3] ARM: vfp: Use cpu pm notifiers to save vfp state
From: Colin Cross @ 2011-02-13 21:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <AANLkTinYf3G+b8n6okeZk44xvO0xP0dw8S_dfE2C4E1-@mail.gmail.com>
On Fri, Feb 11, 2011 at 11:50 AM, Colin Cross <ccross@android.com> wrote:
>> Something like below (untested):
>>
>> ? ? ? ?if (last_VFP_context[cpu]) {
>> ? ? ? ? ? ? ? ?vfp_save_state(last_VFP_context[cpu], fpexc);
>> ? ? ? ? ? ? ? ?/* force a reload when coming back from idle */
>> ? ? ? ? ? ? ? ?last_VFP_context[cpu] = NULL;
>> ? ? ? ? ? ? ? ?fmxr(FPEXC, fpexc & ~FPEXC_EN);
>> ? ? ? ?}
One more fix is necessary, the VFP will usually not be enabled when
this is called. The VFP needs to be enabled before vfp_save_state,
and then disabled after.
> ? ? ? ?/* save state for resumption */
> ? ? ? ?if (last_VFP_context[ti->cpu]) {
> ? ? ? ? ? ? ? ?printk(KERN_DEBUG "%s: saving vfp state\n", __func__);
> ? ? ? ? ? ? ? ?vfp_save_state(last_VFP_context[ti->cpu], fpexc);
>
> ? ? ? ? ? ? ? ?/* disable, just in case */
> ? ? ? ? ? ? ? ?fmxr(FPEXC, fpexc & ~FPEXC_EN);
> ? ? ? ?}
Same fix is needed here.
^ permalink raw reply
* [PATCH 6/6] ARM: pm: allow generic sleep code to be used with SMP CPU idle
From: Colin Cross @ 2011-02-13 21:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <E1PnviF-0002yt-EC@rmk-PC.arm.linux.org.uk>
On Fri, Feb 11, 2011 at 8:19 AM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> Allow the generic sleep code to be used with SMP CPU idle by storing
> N CPU stack pointers rather than just one.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> ---
> ?arch/arm/kernel/sleep.S | ? 26 +++++++++++++++++++++++++-
> ?1 files changed, 25 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
> index 9f106fa..e10618f 100644
> --- a/arch/arm/kernel/sleep.S
> +++ b/arch/arm/kernel/sleep.S
<snip>
> @@ -107,4 +129,6 @@ ENTRY(cpu_resume)
> ?ENDPROC(cpu_resume)
>
> ?sleep_save_sp:
> - ? ? ? .word ? 0 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? @ preserve stack phys ptr here
> + ? ? ? .rept ? CONFIG_NR_CPUS
> + ? ? ? .long ? 0 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? @ preserve stack phys ptr here
> + ? ? ? .endr
This doesn't compile on CONFIG_SMP=n, CONFIG_NR_CPUS is undefined.
Including linux/threads.h will provide a default definition.
^ permalink raw reply
* [PATCH v2 1/7] mmc: mxs-mmc: add mmc host driver for i.MX23/28
From: Arnd Bergmann @ 2011-02-13 22:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110213192609.GA21429@void.printf.net>
On Sunday 13 February 2011, Chris Ball wrote:
> On Mon, Feb 14, 2011 at 10:32:20AM +0800, Shawn Guo wrote:
> > This adds the mmc host driver for Freescale MXS-based SoC i.MX23/28.
> > The driver calls into mxs-dma via generic dmaengine api for both pio
> > and data transfer.
> >
> > Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
>
> Please add a Reviewed-by: from Arnd and a Tested-by: from Lothar.
> Could you add a MODULE_AUTHOR() field, too?
In general, these tags should not simply be added by the author without
having the person who did the reviewing or testing specifically provide
them!
In this particular case, I'm happy with the driver in version 2, good job!
Please do add my
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
^ permalink raw reply
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