* [PATCH] msm: add single-wire serial bus interface (SSBI) driver
From: Daniel Walker @ 2011-02-23 0:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <AANLkTi=0Pxg09x8DdVDVy9Ur7r1dgB+4LM3q0hM4_8Rg@mail.gmail.com>
On Tue, 2011-02-22 at 12:47 -0800, Dima Zavin wrote:
> What is the problem leaving it under arch/arm/mach-msm?
Because it's a driver.
Daniel
^ permalink raw reply
* [PATCH] msm: add single-wire serial bus interface (SSBI) driver
From: David Brown @ 2011-02-23 0:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298419839.17118.5.camel@m0nster>
On Tue, Feb 22 2011, Daniel Walker wrote:
> On Tue, 2011-02-22 at 12:47 -0800, Dima Zavin wrote:
>
>> What is the problem leaving it under arch/arm/mach-msm?
>
> Because it's a driver.
There are a lot of other drivers currently under various arch
subsystems. I'm not sure if a driver that is specific to only one arch
has a strong reason to be elsewhere in the kernel. If there was a
possibility of there being other devices that used SSBI, it might make
sense to put it elsewhere. But, as far as I know, this device is only
found on MSM chips.
It seems kind of unusual to create an entirely new directory under
drivers to hold what will only ever be a single driver.
David
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
^ permalink raw reply
* [PATCH] MAINTAINERS: Update MSM maintainers
From: Daniel Walker @ 2011-02-23 0:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298419415-3973-1-git-send-email-davidb@codeaurora.org>
On Tue, 2011-02-22 at 16:03 -0800, David Brown wrote:
> Remove Bryan Huntsman and Daniel Walker from the MSM maintainer list.
>
No.. I don't sign off on this.. Please ignore this Linus.
Daniel
^ permalink raw reply
* [PATCH v2] i2c: tegra: Add i2c support
From: Ben Dooks @ 2011-02-23 0:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298250861-27094-1-git-send-email-ccross@android.com>
On Sun, Feb 20, 2011 at 05:14:21PM -0800, Colin Cross wrote:
> Adds I2C bus driver for nVidia Tegra SoCs. Tegra includes 4 I2C
> controllers, one of which is inside the Dynamic Voltage Controller
> and has a slightly different register map.
>
> Signed-off-by: Colin Cross <ccross@android.com>
Would have been helpful to start a new thread, missed this the first time
around.
> + i2c_dev = kzalloc(sizeof(struct tegra_i2c_dev), GFP_KERNEL);
> + if (!i2c_dev) {
no error print here.
> + ret = -ENOMEM;
> + goto err_i2c_clk_put;
> + }
> + if (pdev->id == 3)
> + i2c_dev->is_dvc = 1;
> + init_completion(&i2c_dev->msg_complete);
you might want to think about having a seperate platform bus name for
this case, and switching the is_dvc field on that. It'll make life much
easier if someone decides that what the next tegra i2c needs is 5 i2c
controllers.
I'll consider putting this (as is) into the -next tree, but would like
to see the issues with readsl/writesl sorted out and any other review
comments sorted.
--
Ben Dooks, ben at fluff.org, http://www.fluff.org/ben/
Large Hadron Colada: A large Pina Colada that makes the universe disappear.
^ permalink raw reply
* [PATCH] MAINTAINERS: Update MSM maintainers
From: Bryan Huntsman @ 2011-02-23 0:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298419415-3973-1-git-send-email-davidb@codeaurora.org>
On 02/22/2011 04:03 PM, David Brown wrote:
> Remove Bryan Huntsman and Daniel Walker from the MSM maintainer list.
>
> Signed-off-by: David Brown <davidb@codeaurora.org>
> ---
> MAINTAINERS | 2 --
> 1 files changed, 0 insertions(+), 2 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 6f99e12..c6c6f55 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -885,8 +885,6 @@ S: Supported
>
> ARM/QUALCOMM MSM MACHINE SUPPORT
> M: David Brown <davidb@codeaurora.org>
> -M: Daniel Walker <dwalker@fifo99.com>
> -M: Bryan Huntsman <bryanh@codeaurora.org>
> L: linux-arm-msm at vger.kernel.org
> F: arch/arm/mach-msm/
> F: drivers/video/msm/
Acked-by: Bryan Huntsman <bryanh@codeaurora.org>
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
^ permalink raw reply
* [PATCH] msm: add single-wire serial bus interface (SSBI) driver
From: Daniel Walker @ 2011-02-23 0:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <8ya62sbli3z.fsf@huya.qualcomm.com>
On Tue, 2011-02-22 at 16:17 -0800, David Brown wrote:
> On Tue, Feb 22 2011, Daniel Walker wrote:
>
> > On Tue, 2011-02-22 at 12:47 -0800, Dima Zavin wrote:
> >
> >> What is the problem leaving it under arch/arm/mach-msm?
> >
> > Because it's a driver.
>
> There are a lot of other drivers currently under various arch
> subsystems. I'm not sure if a driver that is specific to only one arch
> has a strong reason to be elsewhere in the kernel. If there was a
> possibility of there being other devices that used SSBI, it might make
> sense to put it elsewhere. But, as far as I know, this device is only
> found on MSM chips.
There are lots of arch specific drivers under drivers/ . In fact I'm
sure there are more arch specific drivers under drivers/ than anyplace
else. That's how we organize things in Linux.
> It seems kind of unusual to create an entirely new directory under
> drivers to hold what will only ever be a single driver.
Then put it under another directory.
Daniel
^ permalink raw reply
* [PATCH V2] i2c: add driver for Freescale i.MX28
From: Ben Dooks @ 2011-02-23 1:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1297859956-13811-1-git-send-email-w.sang@pengutronix.de>
On Wed, Feb 16, 2011 at 01:39:16PM +0100, Wolfram Sang wrote:
> Currently only supporting the PIOQUEUE-mode, because DMA-support for
> this platform is not yet in mainline. When it becomes available and
> support has been added to this driver, it will also be suitable for
> i.MX23 and STMP3xxx.
added to -next, will do a full review later.
> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
> Cc: Ben Dooks <ben-linux@fluff.org>
> Cc: Shawn Guo <shawn.guo@freescale.com>
> ---
>
> Changes since V1:
> * remove interruptible from completion (lots of problems with signals)
> * add modalias
> * resource failure now returning -ENOENT instead of -ENODEV
> * improve the comments, explaining functions and TODOs
> * add kerneldoc
> * fix bad strncpy
> * drop __raw-accessors
>
> Note about mxs_i2c_wait_for_data():
>
> I tried twice to use a waitqueue instead, but the interrupt for the wake did not
> work as I expected. Definately not proud of it, but at leasts it works for now.
>
> drivers/i2c/busses/Kconfig | 10 +
> drivers/i2c/busses/Makefile | 1 +
> drivers/i2c/busses/i2c-mxs.c | 412 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 423 insertions(+), 0 deletions(-)
> create mode 100644 drivers/i2c/busses/i2c-mxs.c
>
> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
> index 3a6321c..25e2dc7 100644
> --- a/drivers/i2c/busses/Kconfig
> +++ b/drivers/i2c/busses/Kconfig
> @@ -452,6 +452,16 @@ config I2C_MV64XXX
> This driver can also be built as a module. If so, the module
> will be called i2c-mv64xxx.
>
> +config I2C_MXS
> + tristate "Freescale i.MX28 I2C interface"
> + depends on SOC_IMX28
> + help
> + Say Y here if you want to use the I2C bus controller on
> + the Freescale i.MX28 processors.
> +
> + This driver can also be built as a module. If so, the module
> + will be called i2c-mxs.
> +
> config I2C_NOMADIK
> tristate "ST-Ericsson Nomadik/Ux500 I2C Controller"
> depends on PLAT_NOMADIK
> diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
> index 84cb16a..f415132 100644
> --- a/drivers/i2c/busses/Makefile
> +++ b/drivers/i2c/busses/Makefile
> @@ -43,6 +43,7 @@ obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
> obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
> obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
> obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o
> +obj-$(CONFIG_I2C_MXS) += i2c-mxs.o
> obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o
> obj-$(CONFIG_I2C_NUC900) += i2c-nuc900.o
> obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o
> diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
> new file mode 100644
> index 0000000..8022e23
> --- /dev/null
> +++ b/drivers/i2c/busses/i2c-mxs.c
> @@ -0,0 +1,412 @@
> +/*
> + * Freescale MXS I2C bus driver
> + *
> + * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K.
> + *
> + * based on a (non-working) driver which was:
> + *
> + * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
> + *
> + * TODO: add dma-support if platform-support for it is available
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + */
> +
> +#include <linux/slab.h>
> +#include <linux/device.h>
> +#include <linux/module.h>
> +#include <linux/i2c.h>
> +#include <linux/err.h>
> +#include <linux/interrupt.h>
> +#include <linux/completion.h>
> +#include <linux/platform_device.h>
> +#include <linux/jiffies.h>
> +#include <linux/io.h>
> +
> +#include <mach/common.h>
> +
> +#define DRIVER_NAME "mxs-i2c"
> +
> +#define MXS_I2C_CTRL0 (0x00)
> +#define MXS_I2C_CTRL0_SET (0x04)
> +
> +#define MXS_I2C_CTRL0_SFTRST 0x80000000
> +#define MXS_I2C_CTRL0_SEND_NAK_ON_LAST 0x02000000
> +#define MXS_I2C_CTRL0_RETAIN_CLOCK 0x00200000
> +#define MXS_I2C_CTRL0_POST_SEND_STOP 0x00100000
> +#define MXS_I2C_CTRL0_PRE_SEND_START 0x00080000
> +#define MXS_I2C_CTRL0_MASTER_MODE 0x00020000
> +#define MXS_I2C_CTRL0_DIRECTION 0x00010000
> +#define MXS_I2C_CTRL0_XFER_COUNT(v) ((v) & 0x0000FFFF)
> +
> +#define MXS_I2C_CTRL1 (0x40)
> +#define MXS_I2C_CTRL1_SET (0x44)
> +#define MXS_I2C_CTRL1_CLR (0x48)
> +
> +#define MXS_I2C_CTRL1_BUS_FREE_IRQ 0x80
> +#define MXS_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ 0x40
> +#define MXS_I2C_CTRL1_NO_SLAVE_ACK_IRQ 0x20
> +#define MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ 0x10
> +#define MXS_I2C_CTRL1_EARLY_TERM_IRQ 0x08
> +#define MXS_I2C_CTRL1_MASTER_LOSS_IRQ 0x04
> +#define MXS_I2C_CTRL1_SLAVE_STOP_IRQ 0x02
> +#define MXS_I2C_CTRL1_SLAVE_IRQ 0x01
> +
> +#define MXS_I2C_IRQ_MASK (MXS_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ | \
> + MXS_I2C_CTRL1_NO_SLAVE_ACK_IRQ | \
> + MXS_I2C_CTRL1_EARLY_TERM_IRQ | \
> + MXS_I2C_CTRL1_MASTER_LOSS_IRQ | \
> + MXS_I2C_CTRL1_SLAVE_STOP_IRQ | \
> + MXS_I2C_CTRL1_SLAVE_IRQ)
> +
> +#define MXS_I2C_QUEUECTRL (0x60)
> +#define MXS_I2C_QUEUECTRL_SET (0x64)
> +#define MXS_I2C_QUEUECTRL_CLR (0x68)
> +
> +#define MXS_I2C_QUEUECTRL_QUEUE_RUN 0x20
> +#define MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE 0x04
> +
> +#define MXS_I2C_QUEUESTAT (0x70)
> +#define MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY 0x00002000
> +
> +#define MXS_I2C_QUEUECMD (0x80)
> +
> +#define MXS_I2C_QUEUEDATA (0x90)
> +
> +#define MXS_I2C_DATA (0xa0)
> +
> +
> +#define MXS_CMD_I2C_SELECT (MXS_I2C_CTRL0_RETAIN_CLOCK | \
> + MXS_I2C_CTRL0_PRE_SEND_START | \
> + MXS_I2C_CTRL0_MASTER_MODE | \
> + MXS_I2C_CTRL0_DIRECTION | \
> + MXS_I2C_CTRL0_XFER_COUNT(1))
> +
> +#define MXS_CMD_I2C_WRITE (MXS_I2C_CTRL0_PRE_SEND_START | \
> + MXS_I2C_CTRL0_MASTER_MODE | \
> + MXS_I2C_CTRL0_DIRECTION)
> +
> +#define MXS_CMD_I2C_READ (MXS_I2C_CTRL0_SEND_NAK_ON_LAST | \
> + MXS_I2C_CTRL0_MASTER_MODE)
> +
> +/**
> + * struct mxs_i2c_dev - per device, private MXS-I2C data
> + *
> + * @dev: driver model device node
> + * @regs: IO registers pointer
> + * @cmd_complete: completion object for transaction wait
> + * @cmd_err: error code for last transaction
> + * @adapter: i2c subsystem adapter node
> + */
> +struct mxs_i2c_dev {
> + struct device *dev;
> + void __iomem *regs;
> + struct completion cmd_complete;
> + u32 cmd_err;
> + struct i2c_adapter adapter;
> +};
> +
> +/*
> + * TODO: check if calls to here are really needed. If not, we could get rid of
> + * mxs_reset_block and the mach-dependency. Needs an I2C analyzer, probably.
> + */
> +static void mxs_i2c_reset(struct mxs_i2c_dev *i2c)
> +{
> + mxs_reset_block(i2c->regs);
> + writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);
> +}
> +
> +static void mxs_i2c_pioq_setup_read(struct mxs_i2c_dev *i2c, u8 addr, int len,
> + int flags)
> +{
> + u32 data;
> +
> + writel(MXS_CMD_I2C_SELECT, i2c->regs + MXS_I2C_QUEUECMD);
> +
> + data = (addr << 1) | I2C_SMBUS_READ;
> + writel(data, i2c->regs + MXS_I2C_DATA);
> +
> + data = MXS_CMD_I2C_READ | MXS_I2C_CTRL0_XFER_COUNT(len) | flags;
> + writel(data, i2c->regs + MXS_I2C_QUEUECMD);
> +}
> +
> +static void mxs_i2c_pioq_setup_write(struct mxs_i2c_dev *i2c,
> + u8 addr, u8 *buf, int len, int flags)
> +{
> + u32 data;
> + int i, shifts_left;
> +
> + data = MXS_CMD_I2C_WRITE | MXS_I2C_CTRL0_XFER_COUNT(len + 1) | flags;
> + writel(data, i2c->regs + MXS_I2C_QUEUECMD);
> +
> + /*
> + * We have to copy the slave address (u8) and buffer (arbitrary number
> + * of u8) into the data register (u32). To achieve that, the u8 are put
> + * into the MSBs of 'data' which is then shifted for the next u8. When
> + * apropriate, 'data' is written to MXS_I2C_DATA. So, the first u32
> + * looks like this:
> + *
> + * 3 2 1 0
> + * 10987654|32109876|54321098|76543210
> + * --------+--------+--------+--------
> + * buffer+2|buffer+1|buffer+0|slave_addr
> + */
> +
> + data = ((addr << 1) | I2C_SMBUS_WRITE) << 24;
> +
> + for (i = 0; i < len; i++) {
> + data >>= 8;
> + data |= buf[i] << 24;
> + if ((i & 3) == 2)
> + writel(data, i2c->regs + MXS_I2C_DATA);
> + }
> +
> + /* Write out the remaining bytes if any */
> + shifts_left = 24 - (i & 3) * 8;
> + if (shifts_left)
> + writel(data >> shifts_left, i2c->regs + MXS_I2C_DATA);
> +}
> +
> +/*
> + * TODO: should be replaceable with a waitqueue and RD_QUEUE_IRQ (setting the
> + * rd_threshold to 1). Couldn't get this to work, though.
> + */
> +static int mxs_i2c_wait_for_data(struct mxs_i2c_dev *i2c)
> +{
> + unsigned long timeout = jiffies + msecs_to_jiffies(1000);
> +
> + while (readl(i2c->regs + MXS_I2C_QUEUESTAT)
> + & MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY) {
> + if (time_after(jiffies, timeout))
> + return -ETIMEDOUT;
> + cond_resched();
> + }
> +
> + return 0;
> +}
> +
> +static int mxs_i2c_finish_read(struct mxs_i2c_dev *i2c, u8 *buf, int len)
> +{
> + u32 data;
> + int i;
> +
> + for (i = 0; i < len; i++) {
> + if ((i & 3) == 0) {
> + if (mxs_i2c_wait_for_data(i2c))
> + return -ETIMEDOUT;
> + data = readl(i2c->regs + MXS_I2C_QUEUEDATA);
> + }
> + buf[i] = data & 0xff;
> + data >>= 8;
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * Low level master read/write transaction.
> + */
> +static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg,
> + int stop)
> +{
> + struct mxs_i2c_dev *i2c = i2c_get_adapdata(adap);
> + int ret;
> + int flags;
> +
> + init_completion(&i2c->cmd_complete);
> +
> + dev_dbg(i2c->dev, "addr: 0x%04x, len: %d, flags: 0x%x, stop: %d\n",
> + msg->addr, msg->len, msg->flags, stop);
> +
> + if (msg->len == 0)
> + return -EINVAL;
> +
> + flags = stop ? MXS_I2C_CTRL0_POST_SEND_STOP : 0;
> +
> + if (msg->flags & I2C_M_RD)
> + mxs_i2c_pioq_setup_read(i2c, msg->addr, msg->len, flags);
> + else
> + mxs_i2c_pioq_setup_write(i2c, msg->addr, msg->buf, msg->len,
> + flags);
> +
> + writel(MXS_I2C_QUEUECTRL_QUEUE_RUN,
> + i2c->regs + MXS_I2C_QUEUECTRL_SET);
> +
> + ret = wait_for_completion_timeout(&i2c->cmd_complete,
> + msecs_to_jiffies(1000));
> + if (ret == 0)
> + goto timeout;
> +
> + if ((!i2c->cmd_err) && (msg->flags & I2C_M_RD)) {
> + ret = mxs_i2c_finish_read(i2c, msg->buf, msg->len);
> + if (ret)
> + goto timeout;
> + }
> +
> + if (i2c->cmd_err == -ENXIO)
> + mxs_i2c_reset(i2c);
> +
> + dev_dbg(i2c->dev, "Done with err=%d\n", i2c->cmd_err);
> +
> + return i2c->cmd_err;
> +
> +timeout:
> + dev_dbg(i2c->dev, "Timeout!\n");
> + mxs_i2c_reset(i2c);
> + return -ETIMEDOUT;
> +}
> +
> +static int mxs_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
> + int num)
> +{
> + int i;
> + int err;
> +
> + for (i = 0; i < num; i++) {
> + err = mxs_i2c_xfer_msg(adap, &msgs[i], i == (num - 1));
> + if (err)
> + return err;
> + }
> +
> + return num;
> +}
> +
> +static u32 mxs_i2c_func(struct i2c_adapter *adap)
> +{
> + return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
> +}
> +
> +static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id)
> +{
> + struct mxs_i2c_dev *i2c = dev_id;
> + u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK;
> +
> + if (!stat)
> + return IRQ_NONE;
> +
> + if (stat & MXS_I2C_CTRL1_NO_SLAVE_ACK_IRQ)
> + i2c->cmd_err = -ENXIO;
> + else if (stat & (MXS_I2C_CTRL1_EARLY_TERM_IRQ |
> + MXS_I2C_CTRL1_MASTER_LOSS_IRQ |
> + MXS_I2C_CTRL1_SLAVE_STOP_IRQ | MXS_I2C_CTRL1_SLAVE_IRQ))
> + /* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */
> + i2c->cmd_err = -EIO;
> + else
> + i2c->cmd_err = 0;
> +
> + complete(&i2c->cmd_complete);
> +
> + writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR);
> + return IRQ_HANDLED;
> +}
> +
> +static const struct i2c_algorithm mxs_i2c_algo = {
> + .master_xfer = mxs_i2c_xfer,
> + .functionality = mxs_i2c_func,
> +};
> +
> +static int __devinit mxs_i2c_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct mxs_i2c_dev *i2c;
> + struct i2c_adapter *adap;
> + struct resource *res;
> + resource_size_t res_size;
> + int err, irq;
> +
> + i2c = devm_kzalloc(dev, sizeof(struct mxs_i2c_dev), GFP_KERNEL);
> + if (!i2c)
> + return -ENOMEM;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!res)
> + return -ENOENT;
> +
> + res_size = resource_size(res);
> + if (!devm_request_mem_region(dev, res->start, res_size, res->name))
> + return -EBUSY;
> +
> + i2c->regs = devm_ioremap_nocache(dev, res->start, res_size);
> + if (!i2c->regs)
> + return -EBUSY;
> +
> + irq = platform_get_irq(pdev, 0);
> + if (irq < 0)
> + return irq;
> +
> + err = devm_request_irq(dev, irq, mxs_i2c_isr, 0, dev_name(dev), i2c);
> + if (err)
> + return err;
> +
> + i2c->dev = dev;
> + platform_set_drvdata(pdev, i2c);
> +
> + /* Do reset to enforce correct startup after pinmuxing */
> + mxs_i2c_reset(i2c);
> + writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE,
> + i2c->regs + MXS_I2C_QUEUECTRL_SET);
> +
> + adap = &i2c->adapter;
> + strlcpy(adap->name, "MXS I2C adapter", sizeof(adap->name));
> + adap->owner = THIS_MODULE;
> + adap->algo = &mxs_i2c_algo;
> + adap->dev.parent = dev;
> + adap->nr = pdev->id;
> + i2c_set_adapdata(adap, i2c);
> + err = i2c_add_numbered_adapter(adap);
> + if (err) {
> + dev_err(dev, "Failed to add adapter (%d)\n", err);
> + writel(MXS_I2C_CTRL0_SFTRST,
> + i2c->regs + MXS_I2C_CTRL0_SET);
> + return err;
> + }
> +
> + return 0;
> +}
> +
> +static int __devexit mxs_i2c_remove(struct platform_device *pdev)
> +{
> + struct mxs_i2c_dev *i2c = platform_get_drvdata(pdev);
> + int ret;
> +
> + ret = i2c_del_adapter(&i2c->adapter);
> + if (ret)
> + return -EBUSY;
> +
> + writel(MXS_I2C_QUEUECTRL_QUEUE_RUN,
> + i2c->regs + MXS_I2C_QUEUECTRL_CLR);
> + writel(MXS_I2C_CTRL0_SFTRST, i2c->regs + MXS_I2C_CTRL0_SET);
> +
> + platform_set_drvdata(pdev, NULL);
> +
> + return 0;
> +}
> +
> +static struct platform_driver mxs_i2c_driver = {
> + .driver = {
> + .name = DRIVER_NAME,
> + .owner = THIS_MODULE,
> + },
> + .remove = __devexit_p(mxs_i2c_remove),
> +};
> +
> +static int __init mxs_i2c_init(void)
> +{
> + return platform_driver_probe(&mxs_i2c_driver, mxs_i2c_probe);
> +}
> +subsys_initcall(mxs_i2c_init);
> +
> +static void __exit mxs_i2c_exit(void)
> +{
> + platform_driver_unregister(&mxs_i2c_driver);
> +}
> +module_exit(mxs_i2c_exit);
> +
> +MODULE_AUTHOR("Wolfram Sang <w.sang@pengutronix.de>");
> +MODULE_DESCRIPTION("MXS I2C Bus Driver");
> +MODULE_LICENSE("GPL");
> +MODULE_ALIAS("platform:" DRIVER_NAME);
> --
> 1.7.2.3
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-i2c" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Ben Dooks, ben at fluff.org, http://www.fluff.org/ben/
Large Hadron Colada: A large Pina Colada that makes the universe disappear.
^ permalink raw reply
* [PATCH] MAINTAINERS: Update MSM maintainers
From: Linus Torvalds @ 2011-02-23 1:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298420395.17118.6.camel@m0nster>
On Tue, Feb 22, 2011 at 4:19 PM, Daniel Walker <dwalker@fifo99.com> wrote:
> On Tue, 2011-02-22 at 16:03 -0800, David Brown wrote:
>> Remove Bryan Huntsman and Daniel Walker from the MSM maintainer list.
>>
>
> No.. I don't sign off on this.. Please ignore this Linus.
Guys, you need to sort out your differences here..
Linus
^ permalink raw reply
* [PATCH 3/6] i2c/pxa2xx: Add PCI support for PXA I2C controller
From: Ben Dooks @ 2011-02-23 1:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110207175604.GA24850@www.tglx.de>
On Mon, Feb 07, 2011 at 06:56:04PM +0100, Sebastian Andrzej Siewior wrote:
> * Sebastian Andrzej Siewior | 2011-01-14 15:31:07 [+0100]:
>
> >* Ben Dooks | 2011-01-05 20:21:36 [+0000]:
>
> Hi Ben,
>
> >[cut]
> >
> >I fixed up all your comments (unless I forgot something by accident). Is
> >it possible for this to go in this merge window or do I have to wait for
> >the next one?
>
> I've rebased the whole series on top of v2.6.38-rc3. I fixed the
> conflict and considered three new boards (colibri-evalboard, saarb and
> pxa95).
can you repost it then for review please.
> The series is available at
> git://git.linutronix.de/users/bigeasy/soda.git i2c_v3
>
> Sebastian Andrzej Siewior (6):
> i2c-pxa2xx: use dynamic register layout
> ARM: pxa2xx: reorganize I2C files
> i2c-pxa2xx: Add PCI support for PXA I2C controller
> i2c-pxa2xx: add support for shared IRQ handler
> i2c-pxa2xx: check timeout correctly
> i2c-pxa2xx: pass of_node from platform driver to adapter and publish
>
> arch/arm/mach-mmp/include/mach/mmp2.h | 2 +-
> arch/arm/mach-mmp/include/mach/pxa168.h | 2 +-
> arch/arm/mach-mmp/include/mach/pxa910.h | 2 +-
> arch/arm/mach-pxa/balloon3.c | 3 +-
> arch/arm/mach-pxa/cm-x300.c | 2 +-
> arch/arm/mach-pxa/colibri-evalboard.c | 3 +-
> arch/arm/mach-pxa/colibri-pxa270-income.c | 3 +-
> arch/arm/mach-pxa/corgi.c | 2 +-
> arch/arm/mach-pxa/csb726.c | 2 +-
> arch/arm/mach-pxa/devices.c | 2 +-
> arch/arm/mach-pxa/em-x270.c | 2 +-
> arch/arm/mach-pxa/ezx.c | 2 +-
> arch/arm/mach-pxa/hx4700.c | 2 +-
> arch/arm/mach-pxa/littleton.c | 2 +-
> arch/arm/mach-pxa/magician.c | 2 +-
> arch/arm/mach-pxa/mainstone.c | 2 +-
> arch/arm/mach-pxa/mioa701.c | 2 +-
> arch/arm/mach-pxa/mxm8x10.c | 2 +-
> arch/arm/mach-pxa/palm27x.c | 3 +-
> arch/arm/mach-pxa/pcm990-baseboard.c | 2 +-
> arch/arm/mach-pxa/poodle.c | 2 +-
> arch/arm/mach-pxa/pxa27x.c | 3 +-
> arch/arm/mach-pxa/pxa3xx.c | 2 +-
> arch/arm/mach-pxa/pxa95x.c | 2 +-
> arch/arm/mach-pxa/raumfeld.c | 2 +-
> arch/arm/mach-pxa/saar.c | 2 +-
> arch/arm/mach-pxa/saarb.c | 3 +-
> arch/arm/mach-pxa/spitz.c | 3 +-
> arch/arm/mach-pxa/stargate2.c | 2 +-
> arch/arm/mach-pxa/tavorevb3.c | 3 +-
> arch/arm/mach-pxa/tosa.c | 2 +-
> arch/arm/mach-pxa/trizeps4.c | 2 +-
> arch/arm/mach-pxa/viper.c | 2 +-
> arch/arm/mach-pxa/vpac270.c | 3 +-
> arch/arm/mach-pxa/xcep.c | 3 +-
> arch/arm/mach-pxa/z2.c | 3 +-
> arch/arm/mach-pxa/zeus.c | 3 +-
> arch/arm/mach-pxa/zylonite_pxa300.c | 2 +-
> drivers/i2c/busses/Kconfig | 7 +-
> drivers/i2c/busses/Makefile | 1 +
> drivers/i2c/busses/i2c-pxa-pci.c | 176 ++++++++++++++++++++
> drivers/i2c/busses/i2c-pxa.c | 116 ++++++++++---
> .../plat/i2c.h => include/linux/i2c/pxa-i2c.h | 0
> 43 files changed, 310 insertions(+), 78 deletions(-)
> create mode 100644 drivers/i2c/busses/i2c-pxa-pci.c
> rename arch/arm/plat-pxa/include/plat/i2c.h => include/linux/i2c/pxa-i2c.h (100%)
>
> Sebastian
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Ben Dooks, ben at fluff.org, http://www.fluff.org/ben/
Large Hadron Colada: A large Pina Colada that makes the universe disappear.
^ permalink raw reply
* [PATCH v3 2/2] OMAP: IOMMU: add support to callback during fault handling
From: Guzman Lugo, Fernando @ 2011-02-23 1:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1297884951-3019-3-git-send-email-dacohen@gmail.com>
On Wed, Feb 16, 2011 at 1:35 PM, David Cohen <dacohen@gmail.com> wrote:
> Add support to register an isr for IOMMU fault situations and adapt it
> to allow such (*isr)() to be used as fault callback. Drivers using IOMMU
> module might want to be informed when errors happen in order to debug it
> or react.
>
> Signed-off-by: David Cohen <dacohen@gmail.com>
> ---
> ?arch/arm/mach-omap2/iommu2.c ? ? ? ? ? ?| ? 17 +++++++++-
> ?arch/arm/plat-omap/include/plat/iommu.h | ? 14 ++++++++-
> ?arch/arm/plat-omap/iommu.c ? ? ? ? ? ? ?| ? 52 ++++++++++++++++++++++---------
> ?3 files changed, 65 insertions(+), 18 deletions(-)
>
....
> @@ -917,6 +912,33 @@ void iommu_put(struct iommu *obj)
> ?}
> ?EXPORT_SYMBOL_GPL(iommu_put);
>
> +int iommu_set_isr(const char *name,
> + ? ? ? ? ? ? ? ? int (*isr)(struct iommu *obj, u32 da, u32 iommu_errs,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ?void *priv),
> + ? ? ? ? ? ? ? ? void *isr_priv)
> +{
> + ? ? ? struct device *dev;
> + ? ? ? struct iommu *obj;
> +
if the driver support multiple user for the same iommu why can only
one callback be registered? should it support register multiple
callback function (one per user)?
Regards,
Fernando.
^ permalink raw reply
* [PATCH] ARM: pxa: support 806MHz operating points for PXA31x processors A2 stepping
From: Haojian Zhuang @ 2011-02-23 1:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <AANLkTin7E9j6Q32JR-t13ekpdveiSrPCqAorT08DdM=6@mail.gmail.com>
>-----Original Message-----
>From: Eric Miao [mailto:eric.y.miao at gmail.com]
>Sent: 2011?2?22? 9:19 PM
>To: Axel Lin; Haojian Zhuang
>Cc: Igor Grinberg; linux-kernel at vger.kernel.org; Russell King; linux-
>arm-kernel at lists.infradead.org
>Subject: Re: [PATCH] ARM: pxa: support 806MHz operating points for
>PXA31x processors A2 stepping
>
>>> Another thing (which could be related to the patch) is the package
>marking.
>>> We have PXA3xx SoCs marked A2 stepping, but C624, which means that
>the
>>> highest running frequency should not exceed 624MHz.
>>
>> This means not all PXA310 A2 stepping supports 806Mhz.
>> Can we differentiate the Cxxx option in software?
>>
>>> What is your PXA3xx A2 marking in respect to Cxxx option?
>>
>> Mine is 88AP310-A2-BGK2C806.
>>
>
>Haojian,
>
>Can you help check on the stepping/markings on these processors
>to see which of them supports 806MHz, reliably?
>
>- eric
Hi Eric,
There's no way to recognize 806MHz on PXA310 A2 since not all A2 chips
can support 806MHz. The only way to recognize 806MHz is to read marks on
the top of chip.
Thanks
Haojian
^ permalink raw reply
* [PATCH v4 0/7] Basic ARM devicetree support
From: Grant Likely @ 2011-02-23 2:22 UTC (permalink / raw)
To: linux-arm-kernel
Fourth posting. v4 rebases on top of Nicolas' patch to merge
lookup_machine_type() into setup_machine(). It also adds
documentation and error output when the kernel cannot find a
machine_desc that matches the top level compatible property.
I'm not asking for these patches to be merged into mainline yet, but
I'm fairly confident that they should be pretty close to their final
form.
Not included in this series is:
- Russell's patch to remove early vetting of the machine type number
- Rob's patch to map the region if atags or the dtb are not within the
first 1MB of ram.
- Nicolas' patch to eliminate lookup_machine_type()
However, I am carrying those patches in my devicetree/arm and
devicetree/test branches for anyone who wants to try them out.
Please test.
...
This patch series allows CONFIG_OF to be enabled on ARM and allows the
kernel to accept a dtb pointer from boot firmware instead of atags.
If a dtb is passed, then the kernel will use the root 'compatible'
property to find a matching machine_desc, and it will use it to obtain
the memory layout, initrd location and kernel parameters string.
Only limited device tree support is enabled here. It does not perform
any kind of device registration from device tree data. That support
will be enabled in a later patch set. Rather, this series is a stable
base that other engineers can use to start working on device tree
support for their platforms.
Tested on Versatile (qemu) and nVidia Tegra Harmony. Kernel compiles
and boots with CONFIG_OF both on and off, both with and without passing
a device tree blob.
This series is reflected in the following branch (stable; will not be
rebased):
git://git.secretlab.ca/git/linux-2.6 devicetree/arm
The 'clean' patches (rebased) can be found here:
git://git.secretlab.ca/git/linux-2.6 devicetree/test
---
Grant Likely (6):
arm/dt: Make __vet_atags also accept a dtb image
arm/dt: consolidate atags setup into setup_machine_atags
arm/dt: probe for platforms via the device tree
arm/dt: Basic versatile devicetree support
arm/dt: Basic tegra devicetree support
dt: add documentation of ARM dt boot interface
Jeremy Kerr (1):
arm/dt: Allow CONFIG_OF on ARM
Documentation/arm/Booting | 33 +++++
Documentation/devicetree/booting-without-of.txt | 40 ++++++
arch/arm/Kconfig | 7 +
arch/arm/include/asm/mach/arch.h | 9 +
arch/arm/include/asm/prom.h | 37 ++++++
arch/arm/include/asm/setup.h | 5 +
arch/arm/kernel/Makefile | 1
arch/arm/kernel/devtree.c | 147 +++++++++++++++++++++++
arch/arm/kernel/head-common.S | 24 +++-
arch/arm/kernel/head.S | 8 +
arch/arm/kernel/setup.c | 86 ++++++++-----
arch/arm/mach-tegra/board-harmony.c | 6 +
arch/arm/mach-versatile/versatile_ab.c | 6 +
arch/arm/mach-versatile/versatile_pb.c | 6 +
arch/arm/mm/init.c | 11 ++
15 files changed, 379 insertions(+), 47 deletions(-)
create mode 100644 arch/arm/include/asm/prom.h
create mode 100644 arch/arm/kernel/devtree.c
--
Signature
^ permalink raw reply
* [PATCH v4 1/7] arm/dt: Make __vet_atags also accept a dtb image
From: Grant Likely @ 2011-02-23 2:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110223021524.18318.71902.stgit@localhost6.localdomain6>
The dtb is passed to the kernel via register r2, which is the same
method that is used to pass an atags pointer. This patch modifies
__vet_atags to not clear r2 when it encounters a dtb image.
v2: fixed bugs pointed out by Nicolas Pitre
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
arch/arm/kernel/head-common.S | 24 ++++++++++++++++++------
arch/arm/kernel/head.S | 8 ++++----
2 files changed, 22 insertions(+), 10 deletions(-)
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index c84b57d..854bd22 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -15,6 +15,12 @@
#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
#define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2)
+#ifdef CONFIG_CPU_BIG_ENDIAN
+#define OF_DT_MAGIC 0xd00dfeed
+#else
+#define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */
+#endif
+
/*
* Exception handling. Something went wrong and we can't proceed. We
* ought to tell the user, but since we don't have any guarantee that
@@ -28,20 +34,26 @@
/* Determine validity of the r2 atags pointer. The heuristic requires
* that the pointer be aligned, in the first 16k of physical RAM and
- * that the ATAG_CORE marker is first and present. Future revisions
+ * that the ATAG_CORE marker is first and present. If CONFIG_OF_FLATTREE
+ * is selected, then it will also accept a dtb pointer. Future revisions
* of this function may be more lenient with the physical address and
* may also be able to move the ATAGS block if necessary.
*
* Returns:
- * r2 either valid atags pointer, or zero
+ * r2 either valid atags pointer, valid dtb pointer, or zero
* r5, r6 corrupted
*/
__vet_atags:
tst r2, #0x3 @ aligned?
bne 1f
- ldr r5, [r2, #0] @ is first tag ATAG_CORE?
- cmp r5, #ATAG_CORE_SIZE
+ ldr r5, [r2, #0]
+#ifdef CONFIG_OF_FLATTREE
+ ldr r6, =OF_DT_MAGIC @ is it a DTB?
+ cmp r5, r6
+ beq 2f
+#endif
+ cmp r5, #ATAG_CORE_SIZE @ is first tag ATAG_CORE?
cmpne r5, #ATAG_CORE_SIZE_EMPTY
bne 1f
ldr r5, [r2, #4]
@@ -49,7 +61,7 @@ __vet_atags:
cmp r5, r6
bne 1f
- mov pc, lr @ atag pointer is ok
+2: mov pc, lr @ atag/dtb pointer is ok
1: mov r2, #0
mov pc, lr
@@ -61,7 +73,7 @@ ENDPROC(__vet_atags)
*
* r0 = cp#15 control register
* r1 = machine ID
- * r2 = atags pointer
+ * r2 = atags/dtb pointer
* r9 = processor ID
*/
__INIT
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 64af186..5bad500 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -66,7 +66,7 @@
*
* This is normally called from the decompressor code. The requirements
* are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
- * r1 = machine nr, r2 = atags pointer.
+ * r1 = machine nr, r2 = atags or dtb pointer.
*
* This code is mostly position independent, so if you link the kernel at
* 0xc0008000, you call this at __pa(0xc0008000).
@@ -89,7 +89,7 @@ ENTRY(stext)
beq __error_p @ yes, error 'p'
/*
- * r1 = machine no, r2 = atags,
+ * r1 = machine no, r2 = atags or dtb,
* r9 = cpuid, r10 = procinfo
*/
bl __vet_atags
@@ -347,7 +347,7 @@ __secondary_data:
*
* r0 = cp#15 control register
* r1 = machine ID
- * r2 = atags pointer
+ * r2 = atags or dtb pointer
* r4 = page table pointer
* r9 = processor ID
* r13 = *virtual* address to jump to upon completion
@@ -384,7 +384,7 @@ ENDPROC(__enable_mmu)
*
* r0 = cp#15 control register
* r1 = machine ID
- * r2 = atags pointer
+ * r2 = atags or dtb pointer
* r9 = processor ID
* r13 = *virtual* address to jump to upon completion
*
^ permalink raw reply related
* [PATCH v4 2/7] arm/dt: Allow CONFIG_OF on ARM
From: Grant Likely @ 2011-02-23 2:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110223021524.18318.71902.stgit@localhost6.localdomain6>
From: Jeremy Kerr <jeremy.kerr@canonical.com>
Add some basic empty infrastructure for DT support on ARM.
v3: - moved cmd_line export and initrd setup to this patch to make the
series bisectable.
- switched to alloc_bootmem_align() for allocation when
unflattening the device tree. memblock_alloc() was not the
right interface.
Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
arch/arm/Kconfig | 7 ++++++
arch/arm/include/asm/prom.h | 25 ++++++++++++++++++++++
arch/arm/include/asm/setup.h | 3 +++
arch/arm/kernel/Makefile | 1 +
arch/arm/kernel/devtree.c | 47 ++++++++++++++++++++++++++++++++++++++++++
arch/arm/kernel/setup.c | 4 ++--
arch/arm/mm/init.c | 9 ++++++++
7 files changed, 94 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/include/asm/prom.h
create mode 100644 arch/arm/kernel/devtree.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 166efa2..92bae09 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1611,6 +1611,13 @@ endmenu
menu "Boot options"
+config USE_OF
+ bool "Flattened Device Tree support"
+ select OF
+ select OF_EARLY_FLATTREE
+ help
+ Include support for flattened device tree machine descriptions.
+
# Compressed boot loader in ROM. Yes, we really want to ask about
# TEXT and BSS so we preserve their values in the config files.
config ZBOOT_ROM_TEXT
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
new file mode 100644
index 0000000..8f1037f
--- /dev/null
+++ b/arch/arm/include/asm/prom.h
@@ -0,0 +1,25 @@
+/*
+ * arch/arm/include/asm/prom.h
+ *
+ * Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef __ASMARM_PROM_H
+#define __ASMARM_PROM_H
+
+#ifdef CONFIG_OF
+
+#include <asm/setup.h>
+#include <asm/irq.h>
+
+static inline void irq_dispose_mapping(unsigned int virq)
+{
+ return;
+}
+
+#endif /* CONFIG_OF */
+#endif /* ASMARM_PROM_H */
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index f1e5a9b..1cec82a 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -221,6 +221,9 @@ extern struct meminfo meminfo;
#define bank_phys_end(bank) ((bank)->start + (bank)->size)
#define bank_phys_size(bank) (bank)->size
+extern int arm_add_memory(unsigned long start, unsigned long size);
+extern char cmd_line[COMMAND_LINE_SIZE];
+
#endif /* __KERNEL__ */
#endif
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 185ee82..8df05fd 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_ARM_THUMBEE) += thumbee.o
obj-$(CONFIG_KGDB) += kgdb.o
obj-$(CONFIG_ARM_UNWIND) += unwind.o
obj-$(CONFIG_HAVE_TCM) += tcm.o
+obj-$(CONFIG_OF) += devtree.o
obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_SWP_EMULATE) += swp_emulate.o
CFLAGS_swp_emulate.o := -Wa,-march=armv7-a
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
new file mode 100644
index 0000000..75e3df8
--- /dev/null
+++ b/arch/arm/kernel/devtree.c
@@ -0,0 +1,47 @@
+/*
+ * linux/arch/arm/kernel/devtree.c
+ *
+ * Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/bootmem.h>
+#include <linux/memblock.h>
+#include <linux/of.h>
+#include <linux/of_fdt.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+
+#include <asm/setup.h>
+#include <asm/page.h>
+
+void __init early_init_dt_add_memory_arch(u64 base, u64 size)
+{
+ arm_add_memory(base, size);
+}
+
+void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
+{
+ return alloc_bootmem_align(size, align);
+}
+
+/**
+ * irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq#
+ *
+ * Currently the mapping mechanism is trivial; simple flat hwirq numbers are
+ * mapped 1:1 onto Linux irq numbers. Cascaded irq controllers are not
+ * supported.
+ */
+unsigned int irq_create_of_mapping(struct device_node *controller,
+ const u32 *intspec, unsigned int intsize)
+{
+ return intspec[0];
+}
+EXPORT_SYMBOL_GPL(irq_create_of_mapping);
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index a40216e..8e046f1 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -125,7 +125,7 @@ EXPORT_SYMBOL(elf_platform);
static const char *cpu_name;
static const char *machine_name;
-static char __initdata cmd_line[COMMAND_LINE_SIZE];
+char cmd_line[COMMAND_LINE_SIZE];
struct machine_desc *machine_desc __initdata;
static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
@@ -466,7 +466,7 @@ static struct machine_desc * __init setup_machine(unsigned int nr)
/* can't use cpu_relax() here as it may require MMU setup */;
}
-static int __init arm_add_memory(unsigned long start, unsigned long size)
+int __init arm_add_memory(unsigned long start, unsigned long size)
{
struct membank *bank = &meminfo.bank[meminfo.nr_banks];
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index cddd684..a2ba1d1 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -15,6 +15,7 @@
#include <linux/mman.h>
#include <linux/nodemask.h>
#include <linux/initrd.h>
+#include <linux/of_fdt.h>
#include <linux/highmem.h>
#include <linux/gfp.h>
#include <linux/memblock.h>
@@ -71,6 +72,14 @@ static int __init parse_tag_initrd2(const struct tag *tag)
__tagtable(ATAG_INITRD2, parse_tag_initrd2);
+#ifdef CONFIG_OF_FLATTREE
+void __init early_init_dt_setup_initrd_arch(unsigned long start, unsigned long end)
+{
+ phys_initrd_start = start;
+ phys_initrd_size = end - start + 1;
+}
+#endif /* CONFIG_OF_FLATTREE */
+
/*
* This keeps memory configuration data used by a couple memory
* initialization functions, as well as show_mem() for the skipping
^ permalink raw reply related
* [PATCH v4 3/7] arm/dt: consolidate atags setup into setup_machine_atags
From: Grant Likely @ 2011-02-23 2:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110223021524.18318.71902.stgit@localhost6.localdomain6>
In preparation for adding device tree support, this patch consolidates
all of the atag-specific setup into a single function.
v4: - adapt to the removal of lookup_machine_type()
- break out dump of machine_desc table into dump_machine_table()
because the device tree probe code will use it.
- Add for_each_machine_desc() macro
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
arch/arm/include/asm/mach/arch.h | 7 ++++
arch/arm/kernel/setup.c | 74 +++++++++++++++++++++++---------------
2 files changed, 51 insertions(+), 30 deletions(-)
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 3a0893a..ed9a10c 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -52,6 +52,13 @@ struct machine_desc {
extern struct machine_desc *machine_desc;
/*
+ * Machine type table - also only accessible during boot
+ */
+extern struct machine_desc __arch_info_begin[], __arch_info_end[];
+#define for_each_machine_desc(p) \
+ for (p = __arch_info_begin; p < __arch_info_end; p++)
+
+/*
* Set of macros to define architecture features. This is built into
* a table by the linker.
*/
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 8e046f1..e420565 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -439,25 +439,12 @@ void cpu_init(void)
: "r14");
}
-static struct machine_desc * __init setup_machine(unsigned int nr)
+static void __init dump_machine_table(void)
{
- extern struct machine_desc __arch_info_begin[], __arch_info_end[];
struct machine_desc *p;
- /*
- * locate machine in the list of supported machines.
- */
- for (p = __arch_info_begin; p < __arch_info_end; p++)
- if (nr == p->nr) {
- printk("Machine: %s\n", p->name);
- return p;
- }
-
- early_print("\n"
- "Error: unrecognized/unsupported machine ID (r1 = 0x%08x).\n\n"
- "Available machine support:\n\nID (hex)\tNAME\n", nr);
-
- for (p = __arch_info_begin; p < __arch_info_end; p++)
+ early_print("Available machine support:\n\nID (hex)\tNAME\n");
+ for_each_machine_desc(p)
early_print("%08x\t%s\n", p->nr, p->name);
early_print("\nPlease check your kernel config and/or bootloader.\n");
@@ -819,21 +806,29 @@ static void __init squash_mem_tags(struct tag *tag)
tag->hdr.tag = ATAG_NONE;
}
-void __init setup_arch(char **cmdline_p)
+static struct machine_desc * __init setup_machine_tags(unsigned int nr)
{
struct tag *tags = (struct tag *)&init_tags;
- struct machine_desc *mdesc;
+ struct machine_desc *mdesc = NULL, *p;
char *from = default_command_line;
- unwind_init();
+ /*
+ * locate machine in the list of supported machines.
+ */
+ for_each_machine_desc(p)
+ if (nr == p->nr) {
+ printk("Machine: %s\n", p->name);
+ mdesc = p;
+ break;
+ }
- setup_processor();
- mdesc = setup_machine(machine_arch_type);
- machine_desc = mdesc;
- machine_name = mdesc->name;
+ if (!mdesc) {
+ early_print("\nError: unrecognized/unsupported machine ID"
+ " (r1 = 0x%08x).\n\n", nr);
+ dump_machine_table(); /* does not return */
+ }
- if (mdesc->soft_reboot)
- reboot_setup("s");
+ printk("Machine: %s\n", mdesc->name);
if (__atags_pointer)
tags = phys_to_virt(__atags_pointer);
@@ -861,16 +856,35 @@ void __init setup_arch(char **cmdline_p)
parse_tags(tags);
}
- init_mm.start_code = (unsigned long) _text;
- init_mm.end_code = (unsigned long) _etext;
- init_mm.end_data = (unsigned long) _edata;
- init_mm.brk = (unsigned long) _end;
-
/* parse_early_param needs a boot_command_line */
strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
/* populate cmd_line too for later use, preserving boot_command_line */
strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
+
+ return mdesc;
+}
+
+
+void __init setup_arch(char **cmdline_p)
+{
+ struct machine_desc *mdesc;
+
+ unwind_init();
+
+ setup_processor();
+ mdesc = setup_machine_tags(machine_arch_type);
+ machine_desc = mdesc;
+ machine_name = mdesc->name;
+
+ if (mdesc->soft_reboot)
+ reboot_setup("s");
+
+ init_mm.start_code = (unsigned long) _text;
+ init_mm.end_code = (unsigned long) _etext;
+ init_mm.end_data = (unsigned long) _edata;
+ init_mm.brk = (unsigned long) _end;
+
*cmdline_p = cmd_line;
parse_early_param();
^ permalink raw reply related
* [PATCH v4 4/7] arm/dt: probe for platforms via the device tree
From: Grant Likely @ 2011-02-23 2:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110223021524.18318.71902.stgit@localhost6.localdomain6>
If a dtb is passed to the kernel then the kernel needs to iterate
through compiled-in mdescs looking for one that matches and move the
dtb data to a safe location before it gets accidentally overwritten by
the kernel.
This patch creates a new function, setup_machine_fdt() which is
analogous to the setup_machine_atags() created in the previous patch.
It does all the early setup needed to use a device tree machine
description.
v4: - Dump some output when a matching machine_desc cannot be found
v3: - Added processing of reserved list.
- Backed out the v2 change that copied instead of reserved the
dtb. dtb is reserved again and the real problem was fixed by
using alloc_bootmem_align() for early allocation of RAM for
unflattening the tree.
- Moved cmd_line and initrd changes to earlier patch to make series
bisectable.
v2: Changed to save the dtb by copying into an allocated buffer.
- Since the dtb will very likely be passed in the first 16k of ram
where the interrupt vectors live, memblock_reserve() is
insufficient to protect the dtb data.
[based on work originally written by Jeremy Kerr <jeremy.kerr@canonical.com>]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
arch/arm/include/asm/mach/arch.h | 2 +
arch/arm/include/asm/prom.h | 12 +++++
arch/arm/include/asm/setup.h | 2 +
arch/arm/kernel/devtree.c | 100 ++++++++++++++++++++++++++++++++++++++
arch/arm/kernel/setup.c | 12 +++--
arch/arm/mm/init.c | 2 +
6 files changed, 127 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index ed9a10c..d7b12ad 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -22,6 +22,8 @@ struct machine_desc {
unsigned int nr; /* architecture number */
const char *name; /* architecture name */
unsigned long boot_params; /* tagged list */
+ const char **dt_compat; /* array of device tree
+ * 'compatible' strings */
unsigned int nr_irqs; /* number of IRQs */
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
index 8f1037f..11b8708 100644
--- a/arch/arm/include/asm/prom.h
+++ b/arch/arm/include/asm/prom.h
@@ -21,5 +21,17 @@ static inline void irq_dispose_mapping(unsigned int virq)
return;
}
+extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys);
+extern void arm_dt_memblock_reserve(void);
+
+#else /* CONFIG_OF */
+
+static inline struct machine_desc *setup_machine_fdt(unsigned int dt_phys)
+{
+ return NULL;
+}
+
+static inline void arm_dt_memblock_reserve(void) { }
+
#endif /* CONFIG_OF */
#endif /* ASMARM_PROM_H */
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index 1cec82a..207f911 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -223,6 +223,8 @@ extern struct meminfo meminfo;
extern int arm_add_memory(unsigned long start, unsigned long size);
extern char cmd_line[COMMAND_LINE_SIZE];
+extern void early_print(const char *str, ...);
+extern void dump_machine_table(void);
#endif /* __KERNEL__ */
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index 75e3df8..4dd725a 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -21,6 +21,8 @@
#include <asm/setup.h>
#include <asm/page.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
void __init early_init_dt_add_memory_arch(u64 base, u64 size)
{
@@ -32,6 +34,33 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
return alloc_bootmem_align(size, align);
}
+void __init arm_dt_memblock_reserve(void)
+{
+ u64 *reserve_map, base, size;
+
+ if (!initial_boot_params)
+ return;
+
+ /* Reserve the dtb region */
+ memblock_reserve(virt_to_phys(initial_boot_params),
+ be32_to_cpu(initial_boot_params->totalsize));
+
+ /*
+ * Process the reserve map. This will probably overlap the initrd
+ * and dtb locations which are already reserved, but overlaping
+ * doesn't hurt anything
+ */
+ reserve_map = ((void*)initial_boot_params) +
+ be32_to_cpu(initial_boot_params->off_mem_rsvmap);
+ while (1) {
+ base = be64_to_cpup(reserve_map++);
+ size = be64_to_cpup(reserve_map++);
+ if (!size)
+ break;
+ memblock_reserve(base, size);
+ }
+}
+
/**
* irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq#
*
@@ -45,3 +74,74 @@ unsigned int irq_create_of_mapping(struct device_node *controller,
return intspec[0];
}
EXPORT_SYMBOL_GPL(irq_create_of_mapping);
+
+/**
+ * setup_machine_fdt - Machine setup when an dtb was passed to the kernel
+ * @dt_phys: physical address of dt blob
+ *
+ * If a dtb was passed to the kernel in r2, then use it to choose the
+ * correct machine_desc and to setup the system.
+ */
+struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
+{
+ struct boot_param_header *devtree;
+ struct machine_desc *mdesc, *mdesc_best = NULL;
+ unsigned int score, mdesc_score = ~1;
+ unsigned long dt_root;
+ const char *model;
+
+ devtree = phys_to_virt(dt_phys);
+
+ /* check device tree validity */
+ if (be32_to_cpu(devtree->magic) != OF_DT_HEADER)
+ return NULL;
+
+ /* Search the mdescs for the 'best' compatible value match */
+ initial_boot_params = devtree;
+ dt_root = of_get_flat_dt_root();
+ for_each_machine_desc(mdesc) {
+ score = of_flat_dt_match(dt_root, mdesc->dt_compat);
+ if (score > 0 && score < mdesc_score) {
+ mdesc_best = mdesc;
+ mdesc_score = score;
+ }
+ }
+ if (!mdesc_best) {
+ const char *prop;
+ long size;
+
+ early_print("\nError: unrecognized/unsupported "
+ "device tree compatible list:\n[ ");
+
+ prop = of_get_flat_dt_prop(dt_root, "compatible", &size);
+ while (size > 0) {
+ early_print("'%s' ", prop);
+ size -= strlen(prop) + 1;
+ prop += strlen(prop) + 1;
+ }
+ early_print("]\n\n");
+
+ dump_machine_table(); /* does not return */
+ }
+
+ model = of_get_flat_dt_prop(dt_root, "model", NULL);
+ if (!model)
+ model = of_get_flat_dt_prop(dt_root, "compatible", NULL);
+ if (!model)
+ model = "<unknown>";
+ pr_info("Machine: %s, model: %s\n", mdesc_best->name, model);
+
+ /* Retrieve various information from the /chosen node */
+ of_scan_flat_dt(early_init_dt_scan_chosen, NULL);
+ /* Initialize {size,address}-cells info */
+ of_scan_flat_dt(early_init_dt_scan_root, NULL);
+ /* Setup memory, calling early_init_dt_add_memory_arch */
+ of_scan_flat_dt(early_init_dt_scan_memory, NULL);
+ /* Save command line for /proc/cmdline */
+ strlcpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
+
+ /* Change machine number to match the mdesc we're using */
+ __machine_arch_type = mdesc->nr;
+
+ return mdesc_best;
+}
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index e420565..8734716 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -20,6 +20,7 @@
#include <linux/screen_info.h>
#include <linux/init.h>
#include <linux/kexec.h>
+#include <linux/of_fdt.h>
#include <linux/crash_dump.h>
#include <linux/root_dev.h>
#include <linux/cpu.h>
@@ -42,6 +43,7 @@
#include <asm/cachetype.h>
#include <asm/tlbflush.h>
+#include <asm/prom.h>
#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
@@ -309,7 +311,7 @@ static void __init cacheid_init(void)
*/
extern struct proc_info_list *lookup_processor_type(unsigned int);
-static void __init early_print(const char *str, ...)
+void __init early_print(const char *str, ...)
{
extern void printascii(const char *);
char buf[256];
@@ -439,7 +441,7 @@ void cpu_init(void)
: "r14");
}
-static void __init dump_machine_table(void)
+void __init dump_machine_table(void)
{
struct machine_desc *p;
@@ -873,7 +875,9 @@ void __init setup_arch(char **cmdline_p)
unwind_init();
setup_processor();
- mdesc = setup_machine_tags(machine_arch_type);
+ mdesc = setup_machine_fdt(__atags_pointer);
+ if (!mdesc)
+ mdesc = setup_machine_tags(machine_arch_type);
machine_desc = mdesc;
machine_name = mdesc->name;
@@ -894,6 +898,8 @@ void __init setup_arch(char **cmdline_p)
paging_init(mdesc);
request_standard_resources(mdesc);
+ unflatten_device_tree();
+
#ifdef CONFIG_SMP
if (is_smp())
smp_init_cpus();
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index a2ba1d1..8e3387c 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -22,6 +22,7 @@
#include <linux/sort.h>
#include <asm/mach-types.h>
+#include <asm/prom.h>
#include <asm/sections.h>
#include <asm/setup.h>
#include <asm/sizes.h>
@@ -322,6 +323,7 @@ void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc)
#endif
arm_mm_memblock_reserve();
+ arm_dt_memblock_reserve();
/* reserve any platform specific memblock areas */
if (mdesc->reserve)
^ permalink raw reply related
* [PATCH v4 5/7] arm/dt: Basic versatile devicetree support
From: Grant Likely @ 2011-02-23 2:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110223021524.18318.71902.stgit@localhost6.localdomain6>
This patch adds adds very basic support for booting versatile with a
device tree. It simply allows the existing machine_descs to match
against the versatile ab & pb compatible values so that the kernel can
boot. Kernel parameters and the initrd pointer is read out of the
tree instead of atags.
This is not complete device tree support. This change will be
reverted when a new machine_desc is added that can populate the
versatile device registrations directly from data in the tree instead
of using hard coded data. That change will be made in a future patch.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
arch/arm/mach-versatile/versatile_ab.c | 6 ++++++
arch/arm/mach-versatile/versatile_pb.c | 6 ++++++
2 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index aa9730f..62053df 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -33,6 +33,11 @@
#include "core.h"
+static const char *versatile_ab_match[] __initdata = {
+ "arm,versatile-ab",
+ NULL,
+};
+
MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.boot_params = 0x00000100,
@@ -40,4 +45,5 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
.init_irq = versatile_init_irq,
.timer = &versatile_timer,
.init_machine = versatile_init,
+ .dt_compat = versatile_ab_match,
MACHINE_END
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index bf46964..eba12fa 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -106,6 +106,11 @@ static void __init versatile_pb_init(void)
}
}
+static const char *versatile_pb_match[] __initdata = {
+ "arm,versatile-pb",
+ NULL,
+};
+
MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.boot_params = 0x00000100,
@@ -113,4 +118,5 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
.init_irq = versatile_init_irq,
.timer = &versatile_timer,
.init_machine = versatile_pb_init,
+ .dt_compat = versatile_pb_match,
MACHINE_END
^ permalink raw reply related
* [PATCH v4 6/7] arm/dt: Basic tegra devicetree support
From: Grant Likely @ 2011-02-23 2:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110223021524.18318.71902.stgit@localhost6.localdomain6>
This patch adds adds very basic support for booting tegra with a
device tree. It simply allows the existing machine_descs to match
against the tegra compatible values so that the kernel can boot.
Kernel parameters and the initrd pointer is read out of the tree
instead of atags.
This is not complete device tree support. This change will be
reverted when a new machine_desc is added that can populate the
device registrations directly from data in the tree instead of using
hard coded data. That change will be made in a future patch.
v2: Fixed cut-and-paste error in commit text
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
arch/arm/mach-tegra/board-harmony.c | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index b9dbdb1..99884e9 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -113,6 +113,11 @@ static void __init tegra_harmony_init(void)
platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices));
}
+static const char * tegra_harmony_board_compat[] = {
+ "nvidia,harmony",
+ NULL
+};
+
MACHINE_START(HARMONY, "harmony")
.boot_params = 0x00000100,
.fixup = tegra_harmony_fixup,
@@ -120,4 +125,5 @@ MACHINE_START(HARMONY, "harmony")
.init_machine = tegra_harmony_init,
.map_io = tegra_map_common_io,
.timer = &tegra_timer,
+ .dt_compat = tegra_harmony_board_compat,
MACHINE_END
^ permalink raw reply related
* [PATCH v4 7/7] dt: add documentation of ARM dt boot interface
From: Grant Likely @ 2011-02-23 2:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110223021524.18318.71902.stgit@localhost6.localdomain6>
v3: added details to Documentation/arm/Booting
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
Documentation/arm/Booting | 33 +++++++++++++++++--
Documentation/devicetree/booting-without-of.txt | 40 +++++++++++++++++++++++
2 files changed, 69 insertions(+), 4 deletions(-)
diff --git a/Documentation/arm/Booting b/Documentation/arm/Booting
index 7685029..4e686a2 100644
--- a/Documentation/arm/Booting
+++ b/Documentation/arm/Booting
@@ -65,13 +65,19 @@ looks at the connected hardware is beyond the scope of this document.
The boot loader must ultimately be able to provide a MACH_TYPE_xxx
value to the kernel. (see linux/arch/arm/tools/mach-types).
-
-4. Setup the kernel tagged list
--------------------------------
+4. Setup boot data
+------------------
Existing boot loaders: OPTIONAL, HIGHLY RECOMMENDED
New boot loaders: MANDATORY
+The boot loader must provide either a tagged list or a dtb image for
+passing configuration data to the kernel. The physical address of the
+boot data is passed to the kernel in register r2.
+
+4a. Setup the kernel tagged list
+--------------------------------
+
The boot loader must create and initialise the kernel tagged list.
A valid tagged list starts with ATAG_CORE and ends with ATAG_NONE.
The ATAG_CORE tag may or may not be empty. An empty ATAG_CORE tag
@@ -101,6 +107,24 @@ The tagged list must be placed in a region of memory where neither
the kernel decompressor nor initrd 'bootp' program will overwrite
it. The recommended placement is in the first 16KiB of RAM.
+4b. Setup the device tree
+-------------------------
+
+The boot loader must load a device tree image (dtb) into system ram
+at a 64bit aligned address and initialize it with the boot data. The
+dtb format is documented in Documentation/devicetree/booting-without-of.txt.
+The kernel will look for the dtb magic value of 0xd00dfeed at the dtb
+physical address to determine if a dtb has been passed instead of a
+tagged list.
+
+The boot loader must pass at a minimum the size and location of the
+system memory, and the root filesystem location. The dtb must be
+placed in a region of memory where the kernel decompressor will not
+overwrite it. The recommended placement is in the first 16KiB of RAM
+with the caveat that it may not be located at physical address 0 since
+the kernel interprets a value of 0 in r2 to mean neither a tagged list
+nor a dtb were passed.
+
5. Calling the kernel image
---------------------------
@@ -125,7 +149,8 @@ In either case, the following conditions must be met:
- CPU register settings
r0 = 0,
r1 = machine type number discovered in (3) above.
- r2 = physical address of tagged list in system RAM.
+ r2 = physical address of tagged list in system RAM, or
+ physical address of device tree block (dtb) in system RAM
- CPU mode
All forms of interrupts must be disabled (IRQs and FIQs)
diff --git a/Documentation/devicetree/booting-without-of.txt b/Documentation/devicetree/booting-without-of.txt
index 28b1c9d..9381a14 100644
--- a/Documentation/devicetree/booting-without-of.txt
+++ b/Documentation/devicetree/booting-without-of.txt
@@ -13,6 +13,7 @@ Table of Contents
I - Introduction
1) Entry point for arch/powerpc
+ 2) Entry point for arch/arm
II - The DT block format
1) Header
@@ -225,6 +226,45 @@ it with special cases.
cannot support both configurations with Book E and configurations
with classic Powerpc architectures.
+2) Entry point for arch/arm
+---------------------------
+
+ There is one single entry point to the kernel, at the start
+ of the kernel image. That entry point supports two calling
+ conventions. A summary of the interface is described here. A full
+ description of the boot requirements is documented in
+ Documentation/arm/Booting
+
+ a) ATAGS interface. Minimal information is passed from firmware
+ to the kernel with a tagged list of predefined parameters.
+
+ r0 : 0
+
+ r1 : Machine type number
+
+ r2 : Physical address of tagged list in system RAM
+
+ b) Entry with a flattened device-tree block. Firmware loads the
+ physical address of the flattened device tree block (dtb) into r2,
+ r1 is not used, but it is considered good practise to use a valid
+ machine number as described in Documentation/arm/Booting.
+
+ r0 : 0
+
+ r1 : Valid machine type number. When using a device tree,
+ a single machine type number will often be assigned to
+ represent a class or family of SoCs.
+
+ r2 : physical pointer to the device-tree block
+ (defined in chapter II) in RAM. Device tree can be located
+ anywhere in system RAM, but it should be aligned on a 32 bit
+ boundary.
+
+ The kernel will differentiate between ATAGS and device tree booting by
+ reading the memory pointed to by r1 and looking for either the flattened
+ device tree block magic value (0xd00dfeed) or the ATAG_CORE value at
+ offset 0x4 from r2 (0x54410001).
+
II - The DT block format
========================
^ permalink raw reply related
* [PATCH] msm: add single-wire serial bus interface (SSBI) driver
From: Nicolas Pitre @ 2011-02-23 2:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <8ya62sbli3z.fsf@huya.qualcomm.com>
On Tue, 22 Feb 2011, David Brown wrote:
> On Tue, Feb 22 2011, Daniel Walker wrote:
>
> > On Tue, 2011-02-22 at 12:47 -0800, Dima Zavin wrote:
> >
> >> What is the problem leaving it under arch/arm/mach-msm?
> >
> > Because it's a driver.
>
> There are a lot of other drivers currently under various arch
> subsystems.
And they are wrong. Probably because of some historical reasons.
> I'm not sure if a driver that is specific to only one arch
> has a strong reason to be elsewhere in the kernel.
You'll find plenty of examples for that, far more than drivers in arch
specific directories.
> If there was a possibility of there being other devices that used
> SSBI, it might make sense to put it elsewhere. But, as far as I know,
> this device is only found on MSM chips.
That doesn't matter.
The main reasoning is that Linux has no stable internal API by design.
When large scale driver API changes happen, it is the responsibility of
the person doing that change to also fix up all the in-tree users of
that API. And it is far more trouble for that person who probably has
no knowledge about msm to go and hunt for all scattered drivers
throughout the tree than it is for you to remember that all your drivers
are under linux/drivers/.
And if someone else comes up with a SSBI interface, then it will be much
easier to notice the already existing driver if it is in the driver
directory rather than somewhere else in some unrelated (from that
person's pov) obscure directory.
This was discussed in the past already. I would have liked to provide a
link to some archived discussions (they do exist) but I can't find them
at the moment.
> It seems kind of unusual to create an entirely new directory under
> drivers to hold what will only ever be a single driver.
Well, a couple examples exist already: drivers/dca, drivers/nfc,
drivers/sn, drivers/tc, drivers/vlynq, etc. And if you expect to have
more oddball msm drivers then you can create a drivers/msm directory,
similar to the existing drivers/macintosh, drivers/parisc, drivers/s390,
drivers/sh, drivers/video/omap, drivers/video/omap2, etc.
Nicolas
^ permalink raw reply
* [PATCH 1/2] Add a common struct clk
From: Jeremy Kerr @ 2011-02-23 2:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110222201725.GF22310@pengutronix.de>
Hi Uwe,
> > +static inline void clk_common_init(struct clk *clk) { }
> > +
> > +/*
> > + * For !CONFIG_USE_COMMON_STRUCT_CLK, we don't enforce any atomicity
> > + * requirements for clk_enable/clk_disable, so the prepare and unprepare
> > + * functions are no-ops
> > + */
> > +int clk_prepare(struct clk *clk) { return 0; }
> > +void clk_unprepare(struct clk *clk) { }
>
> these should be static inline. Otherwise these functions end up in many
> files and so provoke a build failure.
Ugh, brown paper bag time. Thanks for that, I'll update this patch.
Cheers,
Jeremy
^ permalink raw reply
* [PATCH v4 7/7] dt: add documentation of ARM dt boot interface
From: Nicolas Pitre @ 2011-02-23 2:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110223022239.18318.87333.stgit@localhost6.localdomain6>
On Tue, 22 Feb 2011, Grant Likely wrote:
> +The boot loader must load a device tree image (dtb) into system ram
> +at a 64bit aligned address and initialize it with the boot data.
[...]
> + r2 : physical pointer to the device-tree block
> + (defined in chapter II) in RAM. Device tree can be located
> + anywhere in system RAM, but it should be aligned on a 32 bit
> + boundary.
So... which one is true?
Nicolas
^ permalink raw reply
* [PATCH] OMAP2+: clocksource: fix crash on boot when !CONFIG_OMAP_32K_TIMER
From: Paul Walmsley @ 2011-02-23 2:59 UTC (permalink / raw)
To: linux-arm-kernel
OMAP2+ kernels built without CONFIG_OMAP_32K_TIMER crash on boot after the
2.6.38 sched_clock changes:
[ 0.000000] OMAP clockevent source: GPTIMER1 at 13000000 Hz
[ 0.000000] Unable to handle kernel NULL pointer dereference at virtual address 00000000
[ 0.000000] pgd = c0004000
[ 0.000000] [00000000] *pgd=00000000
[ 0.000000] Internal error: Oops: 80000005 [#1] SMP
[ 0.000000] last sysfs file:
[ 0.000000] Modules linked in:
[ 0.000000] CPU: 0 Not tainted (2.6.38-rc5-00057-g04aa67d #152)
[ 0.000000] PC is at 0x0
[ 0.000000] LR is at sched_clock_poll+0x2c/0x3c
Without CONFIG_OMAP_32K_TIMER, the kernel has an clockevent and
clocksource resolution about three orders of magnitude higher than
with CONFIG_OMAP_32K_TIMER set. The tradeoff is that the lowest
power consumption states are not available.
Fix by calling init_sched_clock() from the GPTIMER clocksource init code.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/timer-gp.c | 13 +++++++++++++
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 7b7c268..0fc550e 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -39,6 +39,7 @@
#include <asm/mach/time.h>
#include <plat/dmtimer.h>
#include <asm/localtimer.h>
+#include <asm/sched_clock.h>
#include "timer-gp.h"
@@ -190,6 +191,7 @@ static void __init omap2_gp_clocksource_init(void)
/*
* clocksource
*/
+static DEFINE_CLOCK_DATA(cd);
static struct omap_dm_timer *gpt_clocksource;
static cycle_t clocksource_read_cycles(struct clocksource *cs)
{
@@ -204,6 +206,15 @@ static struct clocksource clocksource_gpt = {
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
+static void notrace dmtimer_update_sched_clock(void)
+{
+ u32 cyc;
+
+ cyc = omap_dm_timer_read_counter(gpt_clocksource);
+
+ update_sched_clock(&cd, cyc, (u32)~0);
+}
+
/* Setup free-running counter for clocksource */
static void __init omap2_gp_clocksource_init(void)
{
@@ -224,6 +235,8 @@ static void __init omap2_gp_clocksource_init(void)
omap_dm_timer_set_load_start(gpt, 1, 0);
+ init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate);
+
if (clocksource_register_hz(&clocksource_gpt, tick_rate))
printk(err2, clocksource_gpt.name);
}
--
1.7.2.3
^ permalink raw reply related
* [PATCH] msm: add single-wire serial bus interface (SSBI) driver
From: David Brown @ 2011-02-23 3:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.LFD.2.00.1102222049410.22028@xanadu.home>
On Tue, Feb 22 2011, Nicolas Pitre wrote:
> And if someone else comes up with a SSBI interface, then it will be much
> easier to notice the already existing driver if it is in the driver
> directory rather than somewhere else in some unrelated (from that
> person's pov) obscure directory.
Well, I'm fairly sure that nobody would be making an SSBI interface, but
point taken.
>> It seems kind of unusual to create an entirely new directory under
>> drivers to hold what will only ever be a single driver.
>
> Well, a couple examples exist already: drivers/dca, drivers/nfc,
> drivers/sn, drivers/tc, drivers/vlynq, etc. And if you expect to have
> more oddball msm drivers then you can create a drivers/msm directory,
> similar to the existing drivers/macintosh, drivers/parisc, drivers/s390,
> drivers/sh, drivers/video/omap, drivers/video/omap2, etc.
drivers/msm seems like a reasonable place. We already have other
drivers that are in appropriate places.
So what kinds of things constitute drivers versus arch-specific code?
Currently, iommu drivers seem to be sprinkled throughout arch.
We also have a shared-memory driver-type thing that is only used by
other drivers. Does that make sense to be in drivers/msm?
Ken, do you mind moving this driver into 'drivers/msm' as the first one
there?
Thanks,
David
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
^ permalink raw reply
* [PATCH v3 2/2] ARM: mxs: add dma device
From: Shawn Guo @ 2011-02-23 3:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110222183036.GB22310@pengutronix.de>
Hi Uwe,
On Tue, Feb 22, 2011 at 07:30:36PM +0100, Uwe Kleine-K?nig wrote:
> Hi Shawn,
>
> On Tue, Feb 22, 2011 at 08:27:34PM +0800, Shawn Guo wrote:
> > > > diff --git a/arch/arm/mach-mxs/devices/platform-dma.c b/arch/arm/mach-mxs/devices/platform-dma.c
> > > > new file mode 100644
> > > > index 0000000..ee3220e
> > > > --- /dev/null
> > > > +++ b/arch/arm/mach-mxs/devices/platform-dma.c
> > > I'd prefer to have that called platform-mxs-dma.c to match the driver
> > > name. (At least that's what you use for the data structs.)
> > >
> > If you put this comment a little bit earlier on platform-auart.c which
> > is the first example that saves the "mxs" from driver name, I would
> > have platform-mxs-dma.c and platform-mxs-mmc.c from the start.
> I already noticed I missed auart and planned to follow up with a patch.
> Sorry if this resulted in an extra iteration for you.
>
Can we keep it as it is for now, and get your patch fix this
"mxs global" thing?
Sascha plans to rename fb.h to mxsfb.h, and I'm not sure if you will
do the same to rename dma.h and mmc.h under mach-mxs/include/mach to
align everything with driver name. Just a reminder, this will
require changes in dma and mmc drivers accordingly, also will bring
plat-mxc a mxs-dma.h later support gpmi with mxs dma.
--
Regards,
Shawn
^ permalink raw reply
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