* [PATCH v2] ARM: Tegra: Make tegra_dma_init a postcore_initcall
From: Olof Johansson @ 2011-02-23 19:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298482889-21841-1-git-send-email-swarren@nvidia.com>
On Wed, Feb 23, 2011 at 9:41 AM, Stephen Warren <swarren@nvidia.com> wrote:
> The following commit makes the Tegra APB DMA engine fail to initialize
> correctly: 0cf6230af909a86f81907455eca2a5c9b8f68fe6
> ARM: tegra: Move tegra_common_init to tegra_init_early
>
> The reason is that tegra_init_early_ calls tegra_dma_init which calls
> request_threaded_irq, which fails since the IRQ hasn't yet been marked
> valid; that only happens in tegra_init_irq, which gets called after
> tegra_init_early.
>
> This used to work OK, since tegra_init_early was tegra_common_init, which
> got called after tegra_init_irq, basically from the beginning of
> tegra_harmony_init.
>
> Solve this by converting tegra_dma_init to a postcore_initcall. This makes
> it execute late enough that IRQs are marked valid, and avoids having to
> add it back to every machine's init function.
>
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
^ permalink raw reply
* [PATCH V11 2/4] ptp: Added a clock that uses the eTSEC found on the MPC85xx.
From: Scott Wood @ 2011-02-23 19:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110223175459.GH14597@angua.secretlab.ca>
On Wed, 23 Feb 2011 10:54:59 -0700
Grant Likely <grant.likely@secretlab.ca> wrote:
> On Wed, Feb 23, 2011 at 11:26:12AM -0600, Scott Wood wrote:
> > eTSEC is versioned, that's more reliable than the chip name since chips
> > have revisions (rev 2.1 of mpc8313 has eTSEC 1.6, not sure about previous
> > revs of mpc8313). Logic blocks can be and have been uprevved between one
> > revision of a chip to the next. I think "fsl,mpc8313rev2.1-etsec-ptp"
> > would be taking things a bit too far (and there could be board-level bugs
> > too...).
> >
> > If you really need to know the exact SoC you're on, look in SVR (which
> > will provide revision info as well). Isn't the device tree for things that
> > can't be probed?
>
> This is far more about the binding than it is about the chip revision.
> When documenting a binding it makes far more sense to anchor it to a
> specific implementation than to try and come up with a 'generic'
> catchall.
Whatever string is used should be written into a binding document.
fsl,etsec-v1.6-ptp seems like it would be just as good for that purpose.
Even just fsl,etsec-ptp will identify the binding, though it's lacking in
identifying the hardware (in the absence of access to the eTSEC ID
registers).
If somehow Freescale makes something completely different in the future
called "etsec-ptp", then we'll just have to pick a different name for
*that* compatible (after we smack whoever was responsible for reusing the
name). The point of the vendor namespacing is to constrain this problem to
a manageable scope.
> > The eTSEC revision is probeable as well, but due the way PTP is described as
> > a separate node, the driver doesn't have straightforward access to those
> > registers.
>
> Ignorant question: Should the ptp be described as a separate node?
Probably not.
> > Insisting on an explicit chip also encourages people to claim compatibility
> > with that chip without ensuring that it really is fully compatible.
>
> In practise, I've not seen this to be an issue.
I see it often enough in our BSPs (though the BSP device trees tend to be
problematic in a variety of ways), especially on things like guts and
pmc.
It's a question of how strong a statement people are asked to make -- in a
place where fixing errors is somewhat painful, and we don't really need that
strong statement of compatibility to be made, as long as there's another
way to fully identify the hardware (e.g. SVR, top-level board compatible) if
some strange workaround needs to be made[1].
To turn things around, in practice, I've not seen compatibles that don't
encode a specific chip name to be a problem, as long as it's well
documented what it means.
-Scott
[1] IIRC, this was the original reason for citing a specific chip, but it
doesn't hold up if that chip gets cited by other chips as compatible. If
compatibliity includes having all the same bugs, then very little will be
able to claim compatibility, and we'll be back to long lists of device
IDs in the driver. Not to mention errata that are discovered after a
device tree claiming compatibility is released...
^ permalink raw reply
* [PATCH 0/8] OMAP2+: hwmod/clockevent: allow late-init of individual hwmods
From: Tony Lindgren @ 2011-02-23 19:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110223070455.5874.51326.stgit@twilight.localdomain>
* Paul Walmsley <paul@pwsan.com> [110222 23:11]:
> Hello,
>
> This series adds the ability to late-initialize individual
> hwmods. The goal here is for clockevent (and eventually
> clocksource) hwmods to be late-initialized individually, and
> right before they are needed, in the timer init code. Then
> omap_hwmod_late_init(), which late-inits the rest of the hwmods,
> is intended to run as an initcall -- much later in the boot
> process.
Sounds good to me!
Tony
^ permalink raw reply
* [PATCH 7/8] OMAP2+: hwmod: add ability to late-init individual hwmods
From: Tony Lindgren @ 2011-02-23 19:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110223071152.5874.54222.stgit@twilight.localdomain>
Hi,
* Paul Walmsley <paul@pwsan.com> [110222 23:11]:
> --- a/arch/arm/mach-omap2/omap_hwmod.c
> +++ b/arch/arm/mach-omap2/omap_hwmod.c
> +int __init omap_hwmod_late_init_one(const char *oh_name)
How about the following naming changes to avoid confusion:
omap_hwmod_init -> omap_hwmod_register
omap_hwmod_late_init -> omap_hwmod_init
omap_hwmod_late_init_one -> omap_hwmod_init_one
This is because "late_init" gets actually called very early
during the boot.
Regards,
Tony
^ permalink raw reply
* [PATCH 1/5] ARM: smp: Select local timers vs dummytimersupportruntime
From: Santosh Shilimkar @ 2011-02-23 19:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110223190305.GB16041@n2100.arm.linux.org.uk>
> -----Original Message-----
> From: Russell King - ARM Linux [mailto:linux at arm.linux.org.uk]
> Sent: Thursday, February 24, 2011 12:33 AM
> To: Santosh Shilimkar
> Cc: linux-omap at vger.kernel.org; Kevin Hilman; linux-arm-
> kernel at lists.infradead.org; tony at atomide.com; David Brown; Daniel
> Walker; Bryan Huntsman; Kukjin Kim; Paul Mundt; Magnus Damm; Colin
> Cross; Erik Gilling; Srinidhi Kasagar; Linus Walleij
> Subject: Re: [PATCH 1/5] ARM: smp: Select local timers vs
> dummytimersupportruntime
>
> On Wed, Feb 23, 2011 at 11:28:11PM +0530, Santosh Shilimkar wrote:
> > Patch 6759/1 and patch 6760/1 in patch system
>
> Was there any difference between 6760 and 6753 ?
Nope.
I just rebased them together and pushed
^ permalink raw reply
* [PATCH 4/5] ARM: Tegra: Create defines for GPIO names
From: Colin Cross @ 2011-02-23 19:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298487532-5000-5-git-send-email-swarren@nvidia.com>
On Wed, Feb 23, 2011 at 10:58 AM, Stephen Warren <swarren@nvidia.com> wrote:
> This ensures they're kept in sync between platform_data definitions and
> the GPIO table initialization.
>
Can you name these for what they are used for (if they have a single use)?
i.e. TEGRA_GPIO_EMMC_CD instead of TEGRA_GPIO_SD2_CD
^ permalink raw reply
* When does mach-types get updated in a tree?
From: John Linn @ 2011-02-23 19:06 UTC (permalink / raw)
To: linux-arm-kernel
I am trying to get a branch ready that could be pulled from with my new
patches.
There is a new Xilinx entry when I look at the
http://www.arm.linux.org.uk/developer/machines/download.php.
But I don't see a Xilinx entry anywhere in any git trees.
Maybe I overlooked it, or don't really understand the process (more than
likely).
Thanks,
John
This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
^ permalink raw reply
* [PATCH 1/5] ARM: smp: Select local timers vs dummytimersupport runtime
From: Russell King - ARM Linux @ 2011-02-23 19:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2d63c430d007703753afa4ae98902341@mail.gmail.com>
On Wed, Feb 23, 2011 at 11:28:11PM +0530, Santosh Shilimkar wrote:
> Patch 6759/1 and patch 6760/1 in patch system
Was there any difference between 6760 and 6753 ?
^ permalink raw reply
* [PATCH 5/5] ARM: Tegra: Enable Harmony audio support
From: Stephen Warren @ 2011-02-23 18:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298487532-5000-1-git-send-email-swarren@nvidia.com>
* Set up platform data required by I2C, and ASoC machine & codec drivers.
* Enable required GPIO pins as GPIOs.
* Initialize audio-related clocks.
* Correctly configure pinmux for audio-related GPIOs.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
NOTE: This patch will not apply until Olof's recently posted
boards-for-next branch is merged.
NOTE: This patch will not apply until the following two commits are
present in Tegra for-next:
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound-2.6.git
7cfe56172ac14d2031f1896ecb629033f71caafa
ASoC: wm8903: Expose GPIOs through gpiolib
Mark said he'd be OK with this being cherry-picked into the Tegra tree.
git://git.fluff.org/bjdooks/linux.git
db811ca0f48578f9940f49f284ac81e336b264ad
i2c: tegra: Add i2c support
Ben hasn't been asked whether a cherry-pick is OK. We could ask, or simply
wait for the merge window to be open, Linus' tree to pick this change up,
Tegra for-next to be rebased on Linus' tree, and then apply the patch below.
Note: I manually tested cherry-picking both those changes into Tegra for-next,
merging Olof's branch, and applying this patch series. The build succeeded,
and Harmony booted to a shell prompt.
arch/arm/mach-tegra/board-harmony-pinmux.c | 16 +++++---
arch/arm/mach-tegra/board-harmony.c | 58 ++++++++++++++++++++++++++++
arch/arm/mach-tegra/board-harmony.h | 7 +++
3 files changed, 75 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index 3ada474..4d63e2e 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -27,11 +27,11 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
{TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
- {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_OSC, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
+ {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
- {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
+ {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@@ -114,13 +114,13 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
{TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
- {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
- {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
- {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
+ {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
+ {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
+ {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
- {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
+ {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
@@ -147,6 +147,10 @@ static struct tegra_gpio_table gpio_table[] = {
{ .gpio = TEGRA_GPIO_SD4_CD, .enable = true },
{ .gpio = TEGRA_GPIO_SD4_WP, .enable = true },
{ .gpio = TEGRA_GPIO_SD4_POWER, .enable = true },
+ { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
+ { .gpio = TEGRA_GPIO_HP_DET, .enable = true },
+ { .gpio = TEGRA_GPIO_INT_MIC_EN, .enable = true },
+ { .gpio = TEGRA_GPIO_EXT_MIC_EN, .enable = true },
};
void harmony_pinmux_init(void)
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index 2c4a234..afa4b5e 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -2,6 +2,7 @@
* arch/arm/mach-tegra/board-harmony.c
*
* Copyright (C) 2010 Google, Inc.
+ * Copyright (C) 2011 NVIDIA, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -21,13 +22,19 @@
#include <linux/clk.h>
#include <linux/dma-mapping.h>
#include <linux/pda_power.h>
+#include <linux/i2c.h>
+#include <linux/i2c-tegra.h>
#include <linux/io.h>
+#include <sound/wm8903.h>
+
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/setup.h>
+#include <mach/gpio.h>
+#include <mach/harmony_audio.h>
#include <mach/iomap.h>
#include <mach/irqs.h>
#include <mach/sdhci.h>
@@ -60,11 +67,31 @@ static struct platform_device debug_uart = {
},
};
+static struct harmony_audio_platform_data harmony_audio_pdata = {
+ .gpio_spkr_en = TEGRA_GPIO_SPKR_EN,
+ .gpio_hp_det = TEGRA_GPIO_HP_DET,
+ .gpio_int_mic_en = TEGRA_GPIO_INT_MIC_EN,
+ .gpio_ext_mic_en = TEGRA_GPIO_EXT_MIC_EN,
+};
+
+static struct platform_device harmony_audio_device = {
+ .name = "tegra-snd-harmony",
+ .id = 0,
+ .dev = {
+ .platform_data = &harmony_audio_pdata,
+ },
+};
+
static struct platform_device *harmony_devices[] __initdata = {
&debug_uart,
&tegra_sdhci_device1,
&tegra_sdhci_device2,
&tegra_sdhci_device4,
+ &tegra_i2c_device1,
+ &tegra_i2s_device1,
+ &tegra_das_device,
+ &tegra_pcm_device,
+ &harmony_audio_device,
};
static void __init tegra_harmony_fixup(struct machine_desc *desc,
@@ -80,6 +107,10 @@ static void __init tegra_harmony_fixup(struct machine_desc *desc,
static __initdata struct tegra_clk_init_table harmony_clk_init_table[] = {
/* name parent rate enabled */
{ "uartd", "pll_p", 216000000, true },
+ { "pll_a", "pll_p_out1", 56448000, true },
+ { "pll_a_out0", "pll_a", 11289600, true },
+ { "cdev1", NULL, 0, true },
+ { "i2s1", "pll_a_out0", 11289600, false},
{ NULL, NULL, 0, 0},
};
@@ -103,6 +134,30 @@ static struct tegra_sdhci_platform_data sdhci_pdata4 = {
.is_8bit = 1,
};
+static struct tegra_i2c_platform_data i2c_pdata1 = {
+ .bus_clk_rate = 400000,
+};
+
+static struct wm8903_platform_data harmony_wm8903_pdata = {
+ .irq_active_low = 0,
+ .micdet_cfg = 0,
+ .micdet_delay = 100,
+ .gpio_base = GPIO_WM8903(0),
+ .gpio_cfg = {
+ WM8903_GPIO_NO_CONFIG,
+ WM8903_GPIO_NO_CONFIG,
+ 0,
+ WM8903_GPIO_NO_CONFIG,
+ WM8903_GPIO_NO_CONFIG,
+ },
+};
+
+static struct i2c_board_info __initdata wm8903_board_info = {
+ I2C_BOARD_INFO("wm8903", 0x1a),
+ .platform_data = &harmony_wm8903_pdata,
+ .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
+};
+
static void __init tegra_harmony_init(void)
{
tegra_clk_init_from_table(harmony_clk_init_table);
@@ -112,8 +167,11 @@ static void __init tegra_harmony_init(void)
tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
tegra_sdhci_device2.dev.platform_data = &sdhci_pdata2;
tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
+ tegra_i2c_device1.dev.platform_data = &i2c_pdata1;
platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices));
+
+ i2c_register_board_info(0, &wm8903_board_info, 1);
}
MACHINE_START(HARMONY, "harmony")
diff --git a/arch/arm/mach-tegra/board-harmony.h b/arch/arm/mach-tegra/board-harmony.h
index 4fe33b8..fbf2304 100644
--- a/arch/arm/mach-tegra/board-harmony.h
+++ b/arch/arm/mach-tegra/board-harmony.h
@@ -17,12 +17,19 @@
#ifndef _MACH_TEGRA_BOARD_HARMONY_H
#define _MACH_TEGRA_BOARD_HARMONY_H
+#define GPIO_WM8903(_x_) (TEGRA_NR_GPIOS + (_x_))
+
#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5
#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1
#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PT3
#define TEGRA_GPIO_SD4_CD TEGRA_GPIO_PH2
#define TEGRA_GPIO_SD4_WP TEGRA_GPIO_PH3
#define TEGRA_GPIO_SD4_POWER TEGRA_GPIO_PI6
+#define TEGRA_GPIO_CDC_IRQ TEGRA_GPIO_PX3
+#define TEGRA_GPIO_SPKR_EN GPIO_WM8903(2)
+#define TEGRA_GPIO_HP_DET TEGRA_GPIO_PW2
+#define TEGRA_GPIO_INT_MIC_EN TEGRA_GPIO_PX0
+#define TEGRA_GPIO_EXT_MIC_EN TEGRA_GPIO_PX1
void harmony_pinmux_init(void);
--
1.7.1
^ permalink raw reply related
* [PATCH 4/5] ARM: Tegra: Create defines for GPIO names
From: Stephen Warren @ 2011-02-23 18:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298487532-5000-1-git-send-email-swarren@nvidia.com>
This ensures they're kept in sync between platform_data definitions and
the GPIO table initialization.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
NOTE: This patch will not apply until Olof's recently posted
boards-for-next branch is merged.
arch/arm/mach-tegra/board-harmony-pinmux.c | 12 ++++++------
arch/arm/mach-tegra/board-harmony.c | 12 ++++++------
arch/arm/mach-tegra/board-harmony.h | 7 +++++++
arch/arm/mach-tegra/board-seaboard-pinmux.c | 10 +++++-----
arch/arm/mach-tegra/board-seaboard.c | 6 +++---
arch/arm/mach-tegra/board-seaboard.h | 3 +++
6 files changed, 30 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index 98368d9..3ada474 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -141,12 +141,12 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
};
static struct tegra_gpio_table gpio_table[] = {
- { .gpio = TEGRA_GPIO_PI5, .enable = true }, /* mmc2 cd */
- { .gpio = TEGRA_GPIO_PH1, .enable = true }, /* mmc2 wp */
- { .gpio = TEGRA_GPIO_PT3, .enable = true }, /* mmc2 pwr */
- { .gpio = TEGRA_GPIO_PH2, .enable = true }, /* mmc4 cd */
- { .gpio = TEGRA_GPIO_PH3, .enable = true }, /* mmc4 wp */
- { .gpio = TEGRA_GPIO_PI6, .enable = true }, /* mmc4 pwr */
+ { .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
+ { .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
+ { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
+ { .gpio = TEGRA_GPIO_SD4_CD, .enable = true },
+ { .gpio = TEGRA_GPIO_SD4_WP, .enable = true },
+ { .gpio = TEGRA_GPIO_SD4_POWER, .enable = true },
};
void harmony_pinmux_init(void)
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index 49224e9..2c4a234 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -91,15 +91,15 @@ static struct tegra_sdhci_platform_data sdhci_pdata1 = {
};
static struct tegra_sdhci_platform_data sdhci_pdata2 = {
- .cd_gpio = TEGRA_GPIO_PI5,
- .wp_gpio = TEGRA_GPIO_PH1,
- .power_gpio = TEGRA_GPIO_PT3,
+ .cd_gpio = TEGRA_GPIO_SD2_CD,
+ .wp_gpio = TEGRA_GPIO_SD2_WP,
+ .power_gpio = TEGRA_GPIO_SD2_POWER,
};
static struct tegra_sdhci_platform_data sdhci_pdata4 = {
- .cd_gpio = TEGRA_GPIO_PH2,
- .wp_gpio = TEGRA_GPIO_PH3,
- .power_gpio = TEGRA_GPIO_PI6,
+ .cd_gpio = TEGRA_GPIO_SD4_CD,
+ .wp_gpio = TEGRA_GPIO_SD4_WP,
+ .power_gpio = TEGRA_GPIO_SD4_POWER,
.is_8bit = 1,
};
diff --git a/arch/arm/mach-tegra/board-harmony.h b/arch/arm/mach-tegra/board-harmony.h
index 09ca775..4fe33b8 100644
--- a/arch/arm/mach-tegra/board-harmony.h
+++ b/arch/arm/mach-tegra/board-harmony.h
@@ -17,6 +17,13 @@
#ifndef _MACH_TEGRA_BOARD_HARMONY_H
#define _MACH_TEGRA_BOARD_HARMONY_H
+#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5
+#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1
+#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PT3
+#define TEGRA_GPIO_SD4_CD TEGRA_GPIO_PH2
+#define TEGRA_GPIO_SD4_WP TEGRA_GPIO_PH3
+#define TEGRA_GPIO_SD4_POWER TEGRA_GPIO_PI6
+
void harmony_pinmux_init(void);
#endif
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index 2d6ad83..7b6f38c 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -161,11 +161,11 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
static struct tegra_gpio_table gpio_table[] = {
- { .gpio = TEGRA_GPIO_PI5, .enable = true }, /* mmc2 cd */
- { .gpio = TEGRA_GPIO_PH1, .enable = true }, /* mmc2 wp */
- { .gpio = TEGRA_GPIO_PI6, .enable = true }, /* mmc2 pwr */
- { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, /* lid switch */
- { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, /* power key */
+ { .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
+ { .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
+ { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
+ { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true },
+ { .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
};
void __init seaboard_pinmux_init(void)
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
index 6ca9e61..eb28dbd 100644
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -103,9 +103,9 @@ static struct tegra_sdhci_platform_data sdhci_pdata1 = {
};
static struct tegra_sdhci_platform_data sdhci_pdata3 = {
- .cd_gpio = TEGRA_GPIO_PI5,
- .wp_gpio = TEGRA_GPIO_PH1,
- .power_gpio = TEGRA_GPIO_PI6,
+ .cd_gpio = TEGRA_GPIO_SD2_CD,
+ .wp_gpio = TEGRA_GPIO_SD2_WP,
+ .power_gpio = TEGRA_GPIO_SD2_POWER,
};
static struct tegra_sdhci_platform_data sdhci_pdata4 = {
diff --git a/arch/arm/mach-tegra/board-seaboard.h b/arch/arm/mach-tegra/board-seaboard.h
index a098e35..d8415e1 100644
--- a/arch/arm/mach-tegra/board-seaboard.h
+++ b/arch/arm/mach-tegra/board-seaboard.h
@@ -17,6 +17,9 @@
#ifndef _MACH_TEGRA_BOARD_SEABOARD_H
#define _MACH_TEGRA_BOARD_SEABOARD_H
+#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5
+#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1
+#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PI6
#define TEGRA_GPIO_LIDSWITCH TEGRA_GPIO_PC7
#define TEGRA_GPIO_USB1 TEGRA_GPIO_PD0
#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PV2
--
1.7.1
^ permalink raw reply related
* [PATCH 3/5] ARM: Tegra: Rename clk_dev1/2 to cdev1/2
From: Stephen Warren @ 2011-02-23 18:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298487532-5000-1-git-send-email-swarren@nvidia.com>
The ASoC machine driver was written assuming my previous patch to add
complete support for these clocks, which named them cdev1/2. Rename
the clocks to match that, to avoid churn in the ASoC driver.
This rename also makes the clocks more consistent with other Tegra
clocks irrespective of any of that.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
NOTE: This patch should apply right now.
arch/arm/mach-tegra/tegra2_clocks.c | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index ee3f9d7..6d7c4ee 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -1823,8 +1823,8 @@ static struct clk tegra_clk_d = {
};
/* dap_mclk1, belongs to the cdev1 pingroup. */
-static struct clk tegra_dev1_clk = {
- .name = "clk_dev1",
+static struct clk tegra_clk_cdev1 = {
+ .name = "cdev1",
.ops = &tegra_cdev_clk_ops,
.rate = 26000000,
.max_rate = 26000000,
@@ -1834,8 +1834,8 @@ static struct clk tegra_dev1_clk = {
};
/* dap_mclk2, belongs to the cdev2 pingroup. */
-static struct clk tegra_dev2_clk = {
- .name = "clk_dev2",
+static struct clk tegra_clk_cdev2 = {
+ .name = "cdev2",
.ops = &tegra_cdev_clk_ops,
.rate = 26000000,
.max_rate = 26000000,
@@ -2276,8 +2276,8 @@ struct clk *tegra_ptr_clks[] = {
&tegra_clk_hclk,
&tegra_clk_pclk,
&tegra_clk_d,
- &tegra_dev1_clk,
- &tegra_dev2_clk,
+ &tegra_clk_cdev1,
+ &tegra_clk_cdev2,
&tegra_clk_virtual_cpu,
&tegra_clk_blink,
&tegra_clk_cop,
--
1.7.1
^ permalink raw reply related
* [PATCH 2/5] ARM: Tegra: Rename I2S clocks to match driver name
From: Stephen Warren @ 2011-02-23 18:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298487532-5000-1-git-send-email-swarren@nvidia.com>
The driver is tegra-i2s not just i2s. Rename the clocks to match, so that
clk_get_sys can look up by driver name.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
NOTE: This patch should apply right now.
arch/arm/mach-tegra/tegra2_clocks.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index 3015a2c..ee3f9d7 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -2128,8 +2128,8 @@ struct clk tegra_list_clks[] = {
PERIPH_CLK("apbdma", "tegra-dma", NULL, 34, 0, 108000000, mux_pclk, 0),
PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET),
PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0),
- PERIPH_CLK("i2s1", "i2s.0", NULL, 11, 0x100, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71),
- PERIPH_CLK("i2s2", "i2s.1", NULL, 18, 0x104, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71),
+ PERIPH_CLK("i2s1", "tegra-i2s.0", NULL, 11, 0x100, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71),
+ PERIPH_CLK("i2s2", "tegra-i2s.1", NULL, 18, 0x104, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71),
PERIPH_CLK("spdif_out", "spdif_out", NULL, 10, 0x108, 100000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71),
PERIPH_CLK("spdif_in", "spdif_in", NULL, 10, 0x10c, 100000000, mux_pllp_pllc_pllm, MUX | DIV_U71),
PERIPH_CLK("pwm", "pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_audio_clkm_clk32, MUX | DIV_U71),
--
1.7.1
^ permalink raw reply related
* [PATCH 1/5] ARM: Tegra: Add devices.c entries for audio
From: Stephen Warren @ 2011-02-23 18:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298487532-5000-1-git-send-email-swarren@nvidia.com>
For I2S, DAS, PCM devices
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
NOTE: This patch will not apply until Olof's recently posted
boards-for-next branch is merged.
arch/arm/mach-tegra/devices.c | 70 ++++++++++++++++++++++++++++++
arch/arm/mach-tegra/devices.h | 4 ++
arch/arm/mach-tegra/include/mach/iomap.h | 3 +
3 files changed, 77 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c
index 682e6d3..1528f9d 100644
--- a/arch/arm/mach-tegra/devices.c
+++ b/arch/arm/mach-tegra/devices.c
@@ -503,3 +503,73 @@ struct platform_device tegra_uarte_device = {
.coherent_dma_mask = DMA_BIT_MASK(32),
},
};
+
+static struct resource i2s_resource1[] = {
+ [0] = {
+ .start = INT_I2S1,
+ .end = INT_I2S1,
+ .flags = IORESOURCE_IRQ
+ },
+ [1] = {
+ .start = TEGRA_DMA_REQ_SEL_I2S_1,
+ .end = TEGRA_DMA_REQ_SEL_I2S_1,
+ .flags = IORESOURCE_DMA
+ },
+ [2] = {
+ .start = TEGRA_I2S1_BASE,
+ .end = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
+ .flags = IORESOURCE_MEM
+ }
+};
+
+static struct resource i2s_resource2[] = {
+ [0] = {
+ .start = INT_I2S2,
+ .end = INT_I2S2,
+ .flags = IORESOURCE_IRQ
+ },
+ [1] = {
+ .start = TEGRA_DMA_REQ_SEL_I2S2_1,
+ .end = TEGRA_DMA_REQ_SEL_I2S2_1,
+ .flags = IORESOURCE_DMA
+ },
+ [2] = {
+ .start = TEGRA_I2S2_BASE,
+ .end = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
+ .flags = IORESOURCE_MEM
+ }
+};
+
+struct platform_device tegra_i2s_device1 = {
+ .name = "tegra-i2s",
+ .id = 0,
+ .resource = i2s_resource1,
+ .num_resources = ARRAY_SIZE(i2s_resource1),
+};
+
+struct platform_device tegra_i2s_device2 = {
+ .name = "tegra-i2s",
+ .id = 1,
+ .resource = i2s_resource2,
+ .num_resources = ARRAY_SIZE(i2s_resource2),
+};
+
+static struct resource tegra_das_resources[] = {
+ [0] = {
+ .start = TEGRA_APB_MISC_DAS_BASE,
+ .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+struct platform_device tegra_das_device = {
+ .name = "tegra-das",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(tegra_das_resources),
+ .resource = tegra_das_resources,
+};
+
+struct platform_device tegra_pcm_device = {
+ .name = "tegra-pcm-audio",
+ .id = -1,
+};
diff --git a/arch/arm/mach-tegra/devices.h b/arch/arm/mach-tegra/devices.h
index 888810c..4a7dc0a 100644
--- a/arch/arm/mach-tegra/devices.h
+++ b/arch/arm/mach-tegra/devices.h
@@ -42,5 +42,9 @@ extern struct platform_device tegra_uartc_device;
extern struct platform_device tegra_uartd_device;
extern struct platform_device tegra_uarte_device;
extern struct platform_device tegra_pmu_device;
+extern struct platform_device tegra_i2s_device1;
+extern struct platform_device tegra_i2s_device2;
+extern struct platform_device tegra_das_device;
+extern struct platform_device tegra_pcm_device;
#endif
diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h
index 691cdab..19dec3a 100644
--- a/arch/arm/mach-tegra/include/mach/iomap.h
+++ b/arch/arm/mach-tegra/include/mach/iomap.h
@@ -122,6 +122,9 @@
#define TEGRA_APB_MISC_BASE 0x70000000
#define TEGRA_APB_MISC_SIZE SZ_4K
+#define TEGRA_APB_MISC_DAS_BASE 0x70000c00
+#define TEGRA_APB_MISC_DAS_SIZE SZ_128
+
#define TEGRA_AC97_BASE 0x70002000
#define TEGRA_AC97_SIZE SZ_512
--
1.7.1
^ permalink raw reply related
* [PATCH 0/5] ARM: Tegra: Harmony: Enable audio driver
From: Stephen Warren @ 2011-02-23 18:58 UTC (permalink / raw)
To: linux-arm-kernel
This patchset enables the audio driver for Tegra Harmony.
Important notes:
* This series is based on Olof's recently posted boards-for-next branch.
Some patches won't apply without that being in first.
* The final patch in the series depends on header adds/edits that are not
in Tegra's for-next branch
See notes in the individual patches for further details.
Stephen Warren (5):
ARM: Tegra: Add devices.c entries for audio
ARM: Tegra: Rename I2S clocks to match driver name
ARM: Tegra: Rename clk_dev1/2 to cdev1/2
ARM: Tegra: Create defines for GPIO names
ARM: Tegra: Enable Harmony audio support
arch/arm/mach-tegra/board-harmony-pinmux.c | 28 ++++++-----
arch/arm/mach-tegra/board-harmony.c | 70 ++++++++++++++++++++++++--
arch/arm/mach-tegra/board-harmony.h | 14 +++++
arch/arm/mach-tegra/board-seaboard-pinmux.c | 10 ++--
arch/arm/mach-tegra/board-seaboard.c | 6 +-
arch/arm/mach-tegra/board-seaboard.h | 3 +
arch/arm/mach-tegra/devices.c | 70 +++++++++++++++++++++++++++
arch/arm/mach-tegra/devices.h | 4 ++
arch/arm/mach-tegra/include/mach/iomap.h | 3 +
arch/arm/mach-tegra/tegra2_clocks.c | 16 +++---
10 files changed, 190 insertions(+), 34 deletions(-)
^ permalink raw reply
* [PATCH v4 4/4] davinci: add spi devices support for da830/omap-l137/am17x evm
From: Michael Williamson @ 2011-02-23 18:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298486651-18882-1-git-send-email-michael.williamson@criticallink.com>
From: Sekhar Nori <nsekhar@ti.com>
This patch adds the on-board SPI flash device to the
DA830/OMAP-L137/AM17x EVM. It also registers the SPI flash
device to the MTD subsystem.
Based on SPI flash device support for MityDSP-L138F platform.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
[michael.williamson at criticallink.com: moved da830evm_spi0_pdata to devices-da8xx.c]
[michael.williamson at criticallink.com: moved da830evm_init_spi0 to devices-da8xx.c]
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
---
arch/arm/mach-davinci/board-da830-evm.c | 67 +++++++++++++++++++++++++++++++
1 files changed, 67 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index b52a3a1..8bc3701 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -20,6 +20,8 @@
#include <linux/i2c/at24.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -30,6 +32,7 @@
#include <mach/da8xx.h>
#include <mach/usb.h>
#include <mach/aemif.h>
+#include <mach/spi.h>
#define DA830_EVM_PHY_ID ""
/*
@@ -534,6 +537,64 @@ static struct edma_rsv_info da830_edma_rsv[] = {
},
};
+static struct mtd_partition da830evm_spiflash_part[] = {
+ [0] = {
+ .name = "DSP-UBL",
+ .offset = 0,
+ .size = SZ_8K,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ [1] = {
+ .name = "ARM-UBL",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_16K + SZ_8K,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ [2] = {
+ .name = "U-Boot",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_256K - SZ_32K,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ [3] = {
+ .name = "U-Boot-Environment",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_16K,
+ .mask_flags = 0,
+ },
+ [4] = {
+ .name = "Kernel",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ .mask_flags = 0,
+ },
+};
+
+static struct flash_platform_data da830evm_spiflash_data = {
+ .name = "m25p80",
+ .parts = da830evm_spiflash_part,
+ .nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
+ .type = "w25x32",
+};
+
+static struct davinci_spi_config da830evm_spiflash_cfg = {
+ .io_type = SPI_IO_TYPE_DMA,
+ .c2tdelay = 8,
+ .t2cdelay = 8,
+};
+
+static struct spi_board_info da830evm_spi_info[] = {
+ {
+ .modalias = "m25p80",
+ .platform_data = &da830evm_spiflash_data,
+ .controller_data = &da830evm_spiflash_cfg,
+ .mode = SPI_MODE_0,
+ .max_speed_hz = 30000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ },
+};
+
static __init void da830_evm_init(void)
{
struct davinci_soc_info *soc_info = &davinci_soc_info;
@@ -590,6 +651,12 @@ static __init void da830_evm_init(void)
ret = da8xx_register_rtc();
if (ret)
pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
+
+ ret = da8xx_register_spi(0, da830evm_spi_info,
+ ARRAY_SIZE(da830evm_spi_info));
+ if (ret)
+ pr_warning("da830_evm_init: spi 0 registration failed: %d\n",
+ ret);
}
#ifdef CONFIG_SERIAL_8250_CONSOLE
--
1.7.0.4
^ permalink raw reply related
* [PATCH v4 3/4] davinci: add spi devices support for da850/omap-l138/am18x evm
From: Michael Williamson @ 2011-02-23 18:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298486651-18882-1-git-send-email-michael.williamson@criticallink.com>
From: Sekhar Nori <nsekhar@ti.com>
This patch adds the on-board SPI flash device to the
DA850/OMAP-L138/AM18x EVM. It also registers the SPI flash
device to the MTD subsystem.
Based on SPI flash device support for MityDSP-L138F platform.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
[michael.williamson at criticallink.com: moved da850_evm_spi1_pdata to devices-da8xx.c]
[michael.williamson at criticallink.com: moved da850evm_init_spi1 to devices-da8xx.c]
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
---
arch/arm/mach-davinci/board-da850-evm.c | 73 +++++++++++++++++++++++++++++++
1 files changed, 73 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 11f986b..0aef6b2 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -29,6 +29,8 @@
#include <linux/regulator/machine.h>
#include <linux/regulator/tps6507x.h>
#include <linux/input/tps6507x-ts.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -38,6 +40,7 @@
#include <mach/nand.h>
#include <mach/mux.h>
#include <mach/aemif.h>
+#include <mach/spi.h>
#define DA850_EVM_PHY_ID "0:00"
#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
@@ -48,6 +51,70 @@
#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
+static struct mtd_partition da850evm_spiflash_part[] = {
+ [0] = {
+ .name = "UBL",
+ .offset = 0,
+ .size = SZ_64K,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ [1] = {
+ .name = "U-Boot",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_512K,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ [2] = {
+ .name = "U-Boot-Env",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_64K,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ [3] = {
+ .name = "Kernel",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_2M + SZ_512K,
+ .mask_flags = 0,
+ },
+ [4] = {
+ .name = "Filesystem",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_4M,
+ .mask_flags = 0,
+ },
+ [5] = {
+ .name = "MAC-Address",
+ .offset = SZ_8M - SZ_64K,
+ .size = SZ_64K,
+ .mask_flags = MTD_WRITEABLE,
+ },
+};
+
+static struct flash_platform_data da850evm_spiflash_data = {
+ .name = "m25p80",
+ .parts = da850evm_spiflash_part,
+ .nr_parts = ARRAY_SIZE(da850evm_spiflash_part),
+ .type = "m25p64",
+};
+
+static struct davinci_spi_config da850evm_spiflash_cfg = {
+ .io_type = SPI_IO_TYPE_DMA,
+ .c2tdelay = 8,
+ .t2cdelay = 8,
+};
+
+static struct spi_board_info da850evm_spi_info[] = {
+ {
+ .modalias = "m25p80",
+ .platform_data = &da850evm_spiflash_data,
+ .controller_data = &da850evm_spiflash_cfg,
+ .mode = SPI_MODE_0,
+ .max_speed_hz = 30000000,
+ .bus_num = 1,
+ .chip_select = 0,
+ },
+};
+
static struct mtd_partition da850_evm_norflash_partition[] = {
{
.name = "bootloaders + env",
@@ -1167,6 +1234,12 @@ static __init void da850_evm_init(void)
if (ret)
pr_warning("da850_evm_init: suspend registration failed: %d\n",
ret);
+
+ ret = da8xx_register_spi(1, da850evm_spi_info,
+ ARRAY_SIZE(da850evm_spi_info));
+ if (ret)
+ pr_warning("da850_evm_init: spi 1 registration failed: %d\n",
+ ret);
}
#ifdef CONFIG_SERIAL_8250_CONSOLE
--
1.7.0.4
^ permalink raw reply related
* [PATCH v4 2/4] davinci: add spi devices support for MityDSP-L138/MityARM-1808 platform
From: Michael Williamson @ 2011-02-23 18:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298486651-18882-1-git-send-email-michael.williamson@criticallink.com>
This patch adds support for accessing the on board SPI NOR FLASH
device for MityDSP-L138 and MityARM-1808 SoMs.
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
Tested-by: Michael Williamson <michael.williamson@criticallink.com>
---
arch/arm/mach-davinci/board-mityomapl138.c | 84 ++++++++++++++++++++++++++++
1 files changed, 84 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 0ea5932..2aa79c5 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -17,6 +17,8 @@
#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/etherdevice.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -25,6 +27,7 @@
#include <mach/da8xx.h>
#include <mach/nand.h>
#include <mach/mux.h>
+#include <mach/spi.h>
#define MITYOMAPL138_PHY_ID "0:03"
@@ -294,6 +297,82 @@ static int __init pmic_tps65023_init(void)
}
/*
+ * SPI Devices:
+ * SPI1_CS0: 8M Flash ST-M25P64-VME6G
+ */
+static struct mtd_partition spi_flash_partitions[] = {
+ [0] = {
+ .name = "ubl",
+ .offset = 0,
+ .size = SZ_64K,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ [1] = {
+ .name = "u-boot",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_512K,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ [2] = {
+ .name = "u-boot-env",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_64K,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ [3] = {
+ .name = "periph-config",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_64K,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ [4] = {
+ .name = "reserved",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_256K + SZ_64K,
+ },
+ [5] = {
+ .name = "kernel",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_2M + SZ_1M,
+ },
+ [6] = {
+ .name = "fpga",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_2M,
+ },
+ [7] = {
+ .name = "spare",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct flash_platform_data mityomapl138_spi_flash_data = {
+ .name = "m25p80",
+ .parts = spi_flash_partitions,
+ .nr_parts = ARRAY_SIZE(spi_flash_partitions),
+ .type = "m24p64",
+};
+
+static struct davinci_spi_config spi_eprom_config = {
+ .io_type = SPI_IO_TYPE_DMA,
+ .c2tdelay = 8,
+ .t2cdelay = 8,
+};
+
+static struct spi_board_info mityomapl138_spi_flash_info[] = {
+ {
+ .modalias = "m25p80",
+ .platform_data = &mityomapl138_spi_flash_data,
+ .controller_data = &spi_eprom_config,
+ .mode = SPI_MODE_0,
+ .max_speed_hz = 30000000,
+ .bus_num = 1,
+ .chip_select = 0,
+ },
+};
+
+/*
* MityDSP-L138 includes a 256 MByte large-page NAND flash
* (128K blocks).
*/
@@ -448,6 +527,11 @@ static void __init mityomapl138_init(void)
mityomapl138_setup_nand();
+ ret = da8xx_register_spi(1, mityomapl138_spi_flash_info,
+ ARRAY_SIZE(mityomapl138_spi_flash_info));
+ if (ret)
+ pr_warning("spi 1 registration failed: %d\n", ret);
+
mityomapl138_config_emac();
ret = da8xx_register_rtc();
--
1.7.0.4
^ permalink raw reply related
* [PATCH v4 1/4] davinci: da8xx: add spi resources and registration routine
From: Michael Williamson @ 2011-02-23 18:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298486651-18882-1-git-send-email-michael.williamson@criticallink.com>
Add IO resource structures, platform data, and a registration
routine in order to support spi device on DA850/OMAP-L138/AM18x
and DA830/OMAP-L137/AM17x platforms.
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
---
arch/arm/mach-davinci/devices-da8xx.c | 104 ++++++++++++++++++++++++++++
arch/arm/mach-davinci/include/mach/da8xx.h | 4 +
2 files changed, 108 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 119d46e..625d4b6 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -38,14 +38,20 @@
#define DA8XX_EMAC_MDIO_BASE 0x01e24000
#define DA8XX_GPIO_BASE 0x01e26000
#define DA8XX_I2C1_BASE 0x01e28000
+#define DA8XX_SPI0_BASE 0x01c41000
+#define DA8XX_SPI1_BASE 0x01f0e000
#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000
#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000
#define DA8XX_EMAC_RAM_OFFSET 0x0000
#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
+#define DA8XX_DMA_SPI0_RX EDMA_CTLR_CHAN(0, 14)
+#define DA8XX_DMA_SPI0_TX EDMA_CTLR_CHAN(0, 15)
#define DA8XX_DMA_MMCSD0_RX EDMA_CTLR_CHAN(0, 16)
#define DA8XX_DMA_MMCSD0_TX EDMA_CTLR_CHAN(0, 17)
+#define DA8XX_DMA_SPI1_RX EDMA_CTLR_CHAN(0, 18)
+#define DA8XX_DMA_SPI1_TX EDMA_CTLR_CHAN(0, 19)
#define DA850_DMA_MMCSD1_RX EDMA_CTLR_CHAN(1, 28)
#define DA850_DMA_MMCSD1_TX EDMA_CTLR_CHAN(1, 29)
@@ -730,3 +736,101 @@ int __init da8xx_register_cpuidle(void)
return platform_device_register(&da8xx_cpuidle_device);
}
+
+static struct resource da8xx_spi0_resources[] = {
+ [0] = {
+ .start = DA8XX_SPI0_BASE,
+ .end = DA8XX_SPI0_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_DA8XX_SPINT0,
+ .end = IRQ_DA8XX_SPINT0,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = DA8XX_DMA_SPI0_RX,
+ .end = DA8XX_DMA_SPI0_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .start = DA8XX_DMA_SPI0_TX,
+ .end = DA8XX_DMA_SPI0_TX,
+ .flags = IORESOURCE_DMA,
+ },
+};
+
+static struct resource da8xx_spi1_resources[] = {
+ [0] = {
+ .start = DA8XX_SPI1_BASE,
+ .end = DA8XX_SPI1_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_DA8XX_SPINT1,
+ .end = IRQ_DA8XX_SPINT1,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = DA8XX_DMA_SPI1_RX,
+ .end = DA8XX_DMA_SPI1_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .start = DA8XX_DMA_SPI1_TX,
+ .end = DA8XX_DMA_SPI1_TX,
+ .flags = IORESOURCE_DMA,
+ },
+};
+
+struct davinci_spi_platform_data da8xx_spi_pdata[] = {
+ [0] = {
+ .version = SPI_VERSION_2,
+ .intr_line = 1,
+ .dma_event_q = EVENTQ_0,
+ },
+ [1] = {
+ .version = SPI_VERSION_2,
+ .intr_line = 1,
+ .dma_event_q = EVENTQ_0,
+ },
+};
+
+static struct platform_device da8xx_spi_device[] = {
+ [0] = {
+ .name = "spi_davinci",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(da8xx_spi0_resources),
+ .resource = da8xx_spi0_resources,
+ .dev = {
+ .platform_data = &da8xx_spi_pdata[0],
+ },
+ },
+ [1] = {
+ .name = "spi_davinci",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(da8xx_spi1_resources),
+ .resource = da8xx_spi1_resources,
+ .dev = {
+ .platform_data = &da8xx_spi_pdata[1],
+ },
+ },
+};
+
+int __init da8xx_register_spi(int instance, struct spi_board_info *info,
+ unsigned len)
+{
+ int ret;
+
+ if (instance < 0 || instance > 1)
+ return -EINVAL;
+
+ ret = spi_register_board_info(info, len);
+ if (ret)
+ pr_warning("%s: failed to register board info for spi %d :"
+ " %d\n", __func__, instance, ret);
+
+ da8xx_spi_pdata[instance].num_chipselect = len;
+
+ return platform_device_register(&da8xx_spi_device[instance]);
+}
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index cfcb223..e4fc1af 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -15,6 +15,7 @@
#include <linux/platform_device.h>
#include <linux/davinci_emac.h>
+#include <linux/spi/spi.h>
#include <mach/serial.h>
#include <mach/edma.h>
@@ -23,6 +24,7 @@
#include <mach/mmc.h>
#include <mach/usb.h>
#include <mach/pm.h>
+#include <mach/spi.h>
extern void __iomem *da8xx_syscfg0_base;
extern void __iomem *da8xx_syscfg1_base;
@@ -77,6 +79,7 @@ void __init da850_init(void);
int da830_register_edma(struct edma_rsv_info *rsv);
int da850_register_edma(struct edma_rsv_info *rsv[2]);
int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
+int da8xx_register_spi(int instance, struct spi_board_info *info, unsigned len);
int da8xx_register_watchdog(void);
int da8xx_register_usb20(unsigned mA, unsigned potpgt);
int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
@@ -95,6 +98,7 @@ extern struct platform_device da8xx_serial_device;
extern struct emac_platform_data da8xx_emac_pdata;
extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
+extern struct davinci_spi_platform_data da8xx_spi_pdata[];
extern struct platform_device da8xx_wdt_device;
--
1.7.0.4
^ permalink raw reply related
* [PATCH v4 0/4] davinci: add spi devices support for da8xx based platforms
From: Michael Williamson @ 2011-02-23 18:44 UTC (permalink / raw)
To: linux-arm-kernel
This patch series adds SPI bus support and devices for the MityDSP-L138,
MityARM-1808, da850 evm, and da830 evm platforms. This patch series is
against the staging tree at [1] as per Sekhar's instructions.
This series has been tested on the MityDSP-L138 platform.
[1] http://arago-project.org/git/projects/?p=linux-davinci.git;a=shortlog;h=refs/heads/next-for-kevin
---
changes since v3:
-- first 5 patches of series are incorporated in [1] and not included
in this submission
-- refactored common spi registration code into da8xx_register_spi
routine, reducing effective lines of code for multiple platform
support.
Michael Williamson (2):
davinci: da8xx: add spi resources and registration routine
davinci: add spi devices support for MityDSP-L138/MityARM-1808
platform
Sekhar Nori (2):
davinci: add spi devices support for da850/omap-l138/am18x evm
davinci: add spi devices support for da830/omap-l137/am17x evm
arch/arm/mach-davinci/board-da830-evm.c | 67 ++++++++++++++++++
arch/arm/mach-davinci/board-da850-evm.c | 73 +++++++++++++++++++
arch/arm/mach-davinci/board-mityomapl138.c | 84 ++++++++++++++++++++++
arch/arm/mach-davinci/devices-da8xx.c | 104 ++++++++++++++++++++++++++++
arch/arm/mach-davinci/include/mach/da8xx.h | 4 +
5 files changed, 332 insertions(+), 0 deletions(-)
^ permalink raw reply
* [PATCH] ARM: Tegra: DMA: Fail safe if initialization fails
From: Colin Cross @ 2011-02-23 18:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <74CDBE0F657A3D45AFBB94109FB122FF03112A5CF5@HQMAIL01.nvidia.com>
On Wed, Feb 23, 2011 at 9:54 AM, Stephen Warren <swarren@nvidia.com> wrote:
> Colin Cross wrote at Wednesday, February 23, 2011 10:38 AM:
>>
>> On Wed, Feb 23, 2011 at 9:29 AM, Stephen Warren <swarren@nvidia.com> wrote:
>> > tegra_dma_init currently simply bails out early if any initialization fails.
>> > This skips various data-structure initialization. In turn, this means that
>> > tegra_dma_allocate_channel can still hand out channels. In this case, when
>> > tegra_dma_free_channel is called, which calls tegra_dma_cancel, the walking
>> > on ch->list will OOPS since the list's next/prev pointers may still be
>> > NULL.
>> >
>> > To solve this:
>> > * Mark all possible channels as in-use before doing anything else in init.
>> > * Only mark a channel as free once all channel-related initialization has
>> > ?completed.
>> >
>> > This prevents allocate_channel from handing out uninitialized channels.
>> >
>> > There is still one small hole; allocate_channel can't check the usage array
>> > for the shared channel, since this channel is permanently marked in-use.
>> > This could be solved using an explicit "init OK" flag that allocate_channel
>> > could check.
>>
>> If we still need an init complete flag, why not skip this patch and
>> just add that?
>
> I tend to like the cleanup in this patch; it simplifies the channel_usage
> initialization. I'll let you make the call on whether to take this or not.
Ok, it seems like a reasonable cleanup. Can I request a few changes?
Get rid of the redundant memsets
Replace the initial for loop to set all the bits with bitmap_set
Might as well add the init complete flag to this patch as well. You
could also do it by checking the channel_usage bit for the shared
channel, and never setting it in tegra_dma_allocate_channel.
> I can certainly throw together a second patch, or modify this patch, to also
> use an init_ok flag to completely solve the shared channel case too though.
>
> --
> nvpublic
>
>
^ permalink raw reply
* [PATCH v2 13/13] tty: pruss SUART driver
From: Greg KH @ 2011-02-23 18:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <6E7634AAF813458489E0444DF71260CF@subhasishg>
On Wed, Feb 23, 2011 at 07:05:53PM +0530, Subhasish Ghosh wrote:
> Hello,
>
> Anything regarding this.
What is with the impatience? We do sleep around here, sometimes...
thanks,
greg k-h
^ permalink raw reply
* [PATCH v2 13/13] tty: pruss SUART driver
From: Greg KH @ 2011-02-23 18:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <86364E209B534BF1ADB2764227483070@subhasishg>
On Wed, Feb 23, 2011 at 11:00:25AM +0530, Subhasish Ghosh wrote:
> I could not follow the recommendations clearly.
> This is just to clarify.
>
> Currently, I have the following files for the suart implementation:
>
> drivers/tty/serial/da8xx_pruss/pruss_suart_api.h
> drivers/tty/serial/da8xx_pruss/pruss_suart_err.h
> drivers/tty/serial/da8xx_pruss/pruss_suart_regs.h
> drivers/tty/serial/da8xx_pruss/pruss_suart_board.h
> drivers/tty/serial/da8xx_pruss/pruss_suart_mcasp.h
> drivers/tty/serial/da8xx_pruss/pruss_suart_utils.h
>
> drivers/tty/serial/da8xx_pruss/pruss_suart_api.c
> drivers/tty/serial/da8xx_pruss/pruss_suart.c
> drivers/tty/serial/da8xx_pruss/pruss_suart_utils.c
>
> Of these, I will be removing pruss_suart_err.h as part of the Linux
> error code cleanup.
> But, I need to keep at least pruss_suart_board.h as a separate
> file, as this defines
> configurations which will be often modified by users, I don't want
> to mix it with other files.
Why would a .h file ever need to be "modified by users"? That sounds
wrong to me.
> Should I combine rest of the headers into a single file ?
Yes, why would they need to be separate?
> and keep the other three .c files under "drivers/tty/serial/" and
> remove the da8xx_pruss directory altogether.
Yes.
thanks,
greg k-h
^ permalink raw reply
* [PATCH 1/5] ARM: smp: Select local timers vs dummytimersupport runtime
From: Santosh Shilimkar @ 2011-02-23 17:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <780a7a77ef7a93b801ca178e1518e05b@mail.gmail.com>
> -----Original Message-----
> From: Santosh Shilimkar [mailto:santosh.shilimkar at ti.com]
> Sent: Wednesday, February 23, 2011 10:09 PM
> To: Russell King - ARM Linux
> Cc: linux-omap at vger.kernel.org; Kevin Hilman; linux-arm-
> kernel at lists.infradead.org; tony at atomide.com; David Brown; Daniel
> Walker; Bryan Huntsman; Kukjin Kim; Paul Mundt; Magnus Damm; Colin
> Cross; Erik Gilling; Srinidhi Kasagar; Linus Walleij
> Subject: RE: [PATCH 1/5] ARM: smp: Select local timers vs
> dummytimersupport runtime
[....]
> >
> > Grr. This conflicts horribly with the Versatile stuff. Can you
> > recreate
> > against what currently appears in devel rather than mainline
> please?
> Ok. I will pull your devel branch and rebase it
Done.
Patch 6759/1 and patch 6760/1 in patch system
Regards,
Santosh
^ permalink raw reply
* [PATCH V11 2/4] ptp: Added a clock that uses the eTSEC found on the MPC85xx.
From: Grant Likely @ 2011-02-23 17:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110223112612.30071995@schlenkerla>
On Wed, Feb 23, 2011 at 11:26:12AM -0600, Scott Wood wrote:
> On Wed, 23 Feb 2011 09:50:58 -0700
> Grant Likely <grant.likely@secretlab.ca> wrote:
>
> > On Wed, Feb 23, 2011 at 11:38:17AM +0100, Richard Cochran wrote:
> > > +
> > > +* Gianfar PTP clock nodes
> > > +
> > > +General Properties:
> > > +
> > > + - compatible Should be "fsl,etsec-ptp"
> >
> > Should specify an *exact* part; ie: "fsl,mpc8313-etsec-ptp" instead of
> > trying to define a generic catchall. The reason is that the same
> > marketing name can end up getting applied to a wide range of parts.
> >
> > Instead, choose one specific device to stand in as the 'common'
> > implementation and get all parts with the same core to claim
> > compatibility with it. ie: a p2020 might have:
> >
> > compatible = "fsl,mpc2020-etsec-ptp", "fsl,mpc8313-etsec-ptp";
>
> eTSEC is versioned, that's more reliable than the chip name since chips
> have revisions (rev 2.1 of mpc8313 has eTSEC 1.6, not sure about previous
> revs of mpc8313). Logic blocks can be and have been uprevved between one
> revision of a chip to the next. I think "fsl,mpc8313rev2.1-etsec-ptp"
> would be taking things a bit too far (and there could be board-level bugs
> too...).
>
> If you really need to know the exact SoC you're on, look in SVR (which
> will provide revision info as well). Isn't the device tree for things that
> can't be probed?
This is far more about the binding than it is about the chip revision.
When documenting a binding it makes far more sense to anchor it to a
specific implementation than to try and come up with a 'generic'
catchall. A new binding means new compatible value and dropping any
claims of being compatible with the old.
It is not about the logic block version, particularly when it is
detectable by the driver as you say.
>
> The eTSEC revision is probeable as well, but due the way PTP is described as
> a separate node, the driver doesn't have straightforward access to those
> registers.
Ignorant question: Should the ptp be described as a separate node?
>
> Insisting on an explicit chip also encourages people to claim compatibility
> with that chip without ensuring that it really is fully compatible.
In practise, I've not seen this to be an issue.
g.
^ permalink raw reply
* [PATCH] ARM: Tegra: DMA: Fail safe if initialization fails
From: Stephen Warren @ 2011-02-23 17:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <AANLkTi=iWsX_UN6pE7nE=7NBXRPv7=6Ja68B=u8U4Ww=@mail.gmail.com>
Colin Cross wrote at Wednesday, February 23, 2011 10:38 AM:
>
> On Wed, Feb 23, 2011 at 9:29 AM, Stephen Warren <swarren@nvidia.com> wrote:
> > tegra_dma_init currently simply bails out early if any initialization fails.
> > This skips various data-structure initialization. In turn, this means that
> > tegra_dma_allocate_channel can still hand out channels. In this case, when
> > tegra_dma_free_channel is called, which calls tegra_dma_cancel, the walking
> > on ch->list will OOPS since the list's next/prev pointers may still be
> > NULL.
> >
> > To solve this:
> > * Mark all possible channels as in-use before doing anything else in init.
> > * Only mark a channel as free once all channel-related initialization has
> > ?completed.
> >
> > This prevents allocate_channel from handing out uninitialized channels.
> >
> > There is still one small hole; allocate_channel can't check the usage array
> > for the shared channel, since this channel is permanently marked in-use.
> > This could be solved using an explicit "init OK" flag that allocate_channel
> > could check.
>
> If we still need an init complete flag, why not skip this patch and
> just add that?
I tend to like the cleanup in this patch; it simplifies the channel_usage
initialization. I'll let you make the call on whether to take this or not.
I can certainly throw together a second patch, or modify this patch, to also
use an init_ok flag to completely solve the shared channel case too though.
--
nvpublic
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