* [PATCH resend] omap: Fix linker error in drivers/video/omap/lcd_2430sdp.c
From: Tomi Valkeinen @ 2011-02-28 15:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228164715.e34a965e.jhnikula@gmail.com>
On Mon, 2011-02-28 at 08:47 -0600, Jarkko Nikula wrote:
> On Thu, 24 Feb 2011 13:26:44 -0800
> Tony Lindgren <tony@atomide.com> wrote:
>
> > We should avoid selecting driver related things, otherwise we can never
> > build a tiny kernel with initramfs with everything as modules.
> >
> > Can you see if adding depends to the LCD panel option does the trick
> > instead?
> >
> True and as lcd_2430sdp.c is not compiled without CONFIG_FB_OMAP a hack
> below should work a bit better.
>
> What would you think Tomi?
>
> diff --git a/drivers/video/omap/Kconfig b/drivers/video/omap/Kconfig
> index 083c8fe..c981249 100644
> --- a/drivers/video/omap/Kconfig
> +++ b/drivers/video/omap/Kconfig
> @@ -5,6 +5,7 @@ config FB_OMAP
> select FB_CFB_FILLRECT
> select FB_CFB_COPYAREA
> select FB_CFB_IMAGEBLIT
> + select TWL4030_CORE if MACH_OMAP_2430SDP
> help
> Frame buffer driver for OMAP based boards.
>
Well, it's a bit ugly, but I'm fine with it. It's for the old omapfb,
which hopefully nobody uses anymore (right =), and there's no simple way
to make it modular and neat.
The old omapfb compiles lcd_2430sdp always into the kernel if
MACH_OMAP_2430SDP is defined, so this looks like a correct fix to me.
Heh, interestingly, the old omapfb Makefile says: "Makefile for the new
OMAP framebuffer device driver". Things are relative =).
Tomi
^ permalink raw reply
* [PATCH 6/8 resend] dw_dmac: Mark all tx_descriptors with DMA_CRTL_ACK after xfer finish
From: viresh kumar @ 2011-02-28 15:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4D6B8F84.40905@ru.mvista.com>
On 2/28/11, Sergei Shtylyov <sshtylyov@mvista.com> wrote:
> Hello.
>
> On 28-02-2011 13:41, Viresh Kumar wrote:
>
>> dwc_desc_get checks all descriptors for DMA_CTRL_ACK before allocating
>> them for
>> transfers. And descriptors are not marked with DMA_CRTL_ACK after transfer
>> finishes. Thus descriptor once used is not usable again. This patch marks
>> descriptors with DMA_CRTL_ACK after dma xfer finishes
>
>> Signed-off-by: Viresh Kumar<viresh.kumar@st.com>
>> ---
>> drivers/dma/dw_dmac.c | 7 +++++++
>> 1 files changed, 7 insertions(+), 0 deletions(-)
>
>> diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
>> index c40b89f..01f783d 100644
>> --- a/drivers/dma/dw_dmac.c
>> +++ b/drivers/dma/dw_dmac.c
>> @@ -196,6 +196,7 @@ dwc_descriptor_complete(struct dw_dma_chan *dwc,
>> struct dw_desc *desc)
>> dma_async_tx_callback callback;
>> void *param;
>> struct dma_async_tx_descriptor *txd =&desc->txd;
>> + struct dw_desc *child;
>
> Shouldn't this varaible name be aligned with the above variable names?
>
Should be. Will take care of this while resending this patch series,
after getting all
review comments.
--
viresh
^ permalink raw reply
* [PATCH V4 3/4] ARM: Xilinx: base header files and assembly macros
From: Jamie Iles @ 2011-02-28 15:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <0f644016-95cf-4fcb-853d-fb20bee31908@VA3EHSMHS013.ehs.local>
On Mon, Feb 28, 2011 at 07:20:32AM -0700, John Linn wrote:
[...]
> > > +
> > > +static inline void flush(void)
> > > +{
> > > + u32 status;
> > > + /*
> > > + * Wait while the FIFO is not empty
> > > + */
> > > + while (1) {
> > > + status = __raw_readl(IOMEM(LL_UART_PADDR +
> UART_SR_OFFSET));
> > > + if (status & UART_SR_TXEMPTY)
> > > + break;
> > > + cpu_relax();
> > > + }
> >
> > This could be written as:
> >
> > static inline void flush(void)
> > {
> > while (!(__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) &
> > UART_SR_TXEMPTY))
> > cpu_relax();
> > }
>
> Honestly I had it that way as I know most in the community do that and
> terse-ness is somewhat preferred.
>
> I thought my way is a bit clearer as it was a bit harder to read the
> other way.
>
> Do you think everyone else would say to change it? No big deal to
> change it.
I guess it's largely down to personal preference. Personally I find the
infinite loop with conditional break harder to read but then I'm not
going to the the primary maintainer ;-)
Jamie
^ permalink raw reply
* [PATCH 1/4] ASoC: Add TI tlv320aic32x4 codec support.
From: Mark Brown @ 2011-02-28 15:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298641370-17461-1-git-send-email-javier.martin@vista-silicon.com>
On Fri, Feb 25, 2011 at 02:42:47PM +0100, Javier Martin wrote:
> +#define aic32x4_reset(c) snd_soc_write(c, AIC32X4_RESET, 0x01);
Make this a proper function.
> + SOC_DOUBLE_R_AIC32X4("HP Driver Gain", AIC32X4_HPLGAIN,
> + AIC32X4_HPRGAIN, 0, 0x23, 0),
> + SOC_DOUBLE_R_AIC32X4("LO Driver Gain", AIC32X4_LOLGAIN,
> + AIC32X4_LORGAIN, 0, 0x23, 0),
These should be Volume controls, ideally with TLV information.
> + SOC_DOUBLE_R("ADC Volume Level", AIC32X4_LADCVOL,
> + AIC32X4_RADCVOL, 0, 0x28, 0),
> + SOC_DOUBLE_R("PGA Gain Level", AIC32X4_LMICPGAVOL,
> + AIC32X4_RMICPGAVOL, 0, 0x5f, 0),
Again, Volume controls. All gain controls are Volume controls.
> + SOC_SINGLE("Auto-mute", AIC32X4_DACMUTE, 4, 7, 0),
... Switch.
> + SOC_SINGLE("MIC BIAS", AIC32X4_MICBIAS, 6, 1, 0),
This should not be user visible, this should be a DAPM widget.
> +static const struct aic32x4_configs aic32x4_reg_init[] = {
> + {AIC32X4_PWRCFG, AIC32X4_AVDDWEAKDISABLE},
What are these "aic32x4_configs" all about? They look like you're
setting non-default configurations...
> +static const struct snd_kcontrol_new hpl_output_mixer_controls[] = {
> + SOC_DAPM_SINGLE("L_DAC switch", AIC32X4_HPLROUTE, 3, 1, 0),
> + SOC_DAPM_SINGLE("IN1_L switch", AIC32X4_HPLROUTE, 2, 1, 0),
Switch (similarly for other DAPM controls).
> + if (codec->hw_write(codec->control_data, data, 2) == 2)
> + return 0;
> + else
> + return -EIO;
Ideally if this returned an error code you'd return that.
> +int snd_soc_get_volsw_2r_aic32x4(struct snd_kcontrol *kcontrol,
> + struct snd_ctl_elem_value *ucontrol)
> +{
> + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
> + int reg = kcontrol->private_value & 0xff;
> + int reg2 = (kcontrol->private_value >> 24) & 0xff;
> + int mask;
> + int shift;
> + unsigned short val, val2;
> +
> + if (!strcmp(kcontrol->id.name, "PCM Playback Volume")) {
> + mask = 0xff;
> + shift = 0;
> + } else if ((!strcmp(kcontrol->id.name, "HP Driver Gain")) ||
> + (!strcmp(kcontrol->id.name, "LO Driver Gain"))) {
> + mask = 0x3F;
> + shift = 0;
> + } else if (!strcmp(kcontrol->id.name, "PGA Capture Volume")) {
> + mask = 0x7F;
> + shift = 0;
> + } else {
> + printk(KERN_ERR "aic32x4: invalid kcontrol name\n");
> + return -1;
> + }
According to the info callback you're actually passing the mask in
through the private data and the shift is always zero so there's no need
to do these strcmp().
> + if (!strcmp(kcontrol->id.name, "PCM Playback Volume")) {
> + ucontrol->value.integer.value[0] =
> + (val <= 48) ? (val + 127) : (val - 129);
> + ucontrol->value.integer.value[1] =
> + (val2 <= 48) ? (val2 + 127) : (val2 - 129);
This looks awfully like the code that was added in the SGTL5000 driver
for volume controls there - this really needs to be factored out into a
standard macro.
> +static struct i2c_driver aic32x4_i2c_driver = {
> + .driver = {
> + .name = "tlv320aic32x4-codec",
> + .owner = THIS_MODULE,
Drop the -codec from the driver name, it's redundant.
> +{
> + int ret = 0;
> +#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
> + ret = i2c_add_driver(&aic32x4_i2c_driver);
> + if (ret != 0) {
> + printk(KERN_ERR "Failed to register aic32x4 I2C driver: %d\n",
> + ret);
> + }
> +#endif
Remove the ifdefs if the driver doesn't support non-I2C buses.
^ permalink raw reply
* [PATCH v10 05/18] OMAP2,3 DSS2 Change driver name to omap_display
From: Tomi Valkeinen @ 2011-02-28 14:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4D6BAA8C.2020203@ti.com>
On Mon, 2011-02-28 at 08:00 -0600, Cousson, Benoit wrote:
> On 2/28/2011 1:10 PM, Valkeinen, Tomi wrote:
> > On Mon, 2011-02-28 at 05:36 -0600, Cousson, Benoit wrote:
> >> Hi Tomi,
> >>
> >> On 2/28/2011 8:19 AM, Valkeinen, Tomi wrote:
> >>> On Mon, 2011-02-28 at 01:09 -0600, Taneja, Archit wrote:
> >>>> Hi,
> >>>>
> >>>> On Monday 28 February 2011 12:23 PM, Valkeinen, Tomi wrote:
> >>>>> On Thu, 2011-02-24 at 03:27 -0600, Tomi Valkeinen wrote:
> >>>>>> Hi,
> >>>>>>
> >>>>>> On Mon, 2011-01-24 at 11:51 +0530, ext Sumit Semwal wrote:
> >>>>>>> From: Senthilvadivu Guruswamy<svadivu@ti.com>
> >>>>>>>
> >>>>>>> Change the driver name from omapdss to omap_display as the driver takes care of
> >>>>>>> the display devices ie number of panels, type of panels available in the
> >>>>>>> platform. Change the device name in the board files and 2420,2430,3xxx clock
> >>>>>>> files from omapdss to omap_display to match the driver name.
> >>>>>>
> >>>>>> I just realized that changing the driver name will break all scripts and
> >>>>>> applications using omapdss sysfs files.
> >>>>>>
> >>>>>> How does this sound:
> >>>>>>
> >>>>>> Let's leave the omapdss device name as it is. It represents a "super"
> >>>>>> device, containing the dss sysfs files and upper level dss management.
> >>
> >> This is the case for all the drivers migrated to omap_device anyway due
> >> to the change in the top level hierarchy. Everything is below
> >> platform/omap now.
> >
> > The HW module drivers are under platform/omap/, but omapdss is in
> > platform/. Do you mean that omapdss should also be under platform/omap/?
>
> This is because you are probably not using omap_device yet. is should
> happen when you will change your platform_device to be omap_device.
Hmm. The HW module devices use omap_device. But we have also a
"management" device, omapdss, which is doesn't match directly to any HW
component but manages the HW module drivers. It contains, so to say, the
HW module drivers.
Should this device also be a omap_device? What does omap_device actually
represent? My understanding is that omap_device is a linux device for a
HW block inside OMAP. omapdss doesn't quite match that definition.
> > The reason I'm unwilling to change omapdss name, or location, is that
> > omapdss directory contains lots of DSS configuration files, used by
> > scripts and programs.
>
> Is that used for debug only?
Unfortunately no. DSS contains many features which cannot be exported to
userspace via the framebuffer device. While I'm not really happy with
the current omapdss sysfs interface, it's the best we've come up with.
Tomi
^ permalink raw reply
* [PATCH v10 05/18] OMAP2, 3 DSS2 Change driver name to omap_display
From: Cousson, Benoit @ 2011-02-28 14:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228140617.GA2176@n2100.arm.linux.org.uk>
On 2/28/2011 3:06 PM, Russell King - ARM Linux wrote:
> On Mon, Feb 28, 2011 at 02:38:32PM +0100, Cousson, Benoit wrote:
>> On 2/28/2011 1:13 PM, Russell King - ARM Linux wrote:
>>> On Mon, Feb 28, 2011 at 02:10:26PM +0200, Tomi Valkeinen wrote:
>>>> On Mon, 2011-02-28 at 05:36 -0600, Cousson, Benoit wrote:
>>>>> Cannot you use a device hierarchy then to do that?
>>>>> omap_dss/core
>>>>> omap_dss/dsi
>>>>> omap_dss/venc
>>>>>
>>>>> This is moreover the way the HW is done.
>>>>
>>>> Hmm, how would that work? The devices are platform devices, and they
>>>> have a unique global name, which is used to match the driver for the
>>>> device.
>>>
>>> And not forgetting that '/' is not permitted in device or driver names.
>>
>> I was not really considering naming the device with a '/'. The idea is
>> that the devices will not longer be flat platform devices but something
>> like dss devices that will have have a omap_dss parent.
>>
>> I do not know if that makes sense to store some kind of hierarchy in the
>> device model, but encoding the hierarchy in the name like it is proposed
>> looks like a hack to me.
>
> Try:
>
> tree -d /sys/devices/pci0000\:00
>
> on your PC, taking special note of how pci-to-pci bridges are handled.
Here it is, but I'm not sure to understand how it is really done :-(
/sys/devices/pci0000:00
??? 0000:00:00.0
? ??? firmware_node -> ../../LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/PNP0C02:00
? ??? power
? ??? subsystem -> ../../../bus/pci
??? 0000:00:02.0
? ??? 0000:00:02.0:pcie01
? ? ??? power
? ? ??? subsystem -> ../../../../bus/pci_express
? ??? 0000:00:02.0:pcie02
? ? ??? driver -> ../../../../bus/pci_express/drivers/aer
? ? ??? power
? ? ??? subsystem -> ../../../../bus/pci_express
? ??? 0000:06:00.0
? ? ??? 0000:06:00.0:pcie12
? ? ? ??? power
? ? ? ??? subsystem -> ../../../../../bus/pci_express
? ? ??? 0000:07:00.0
? ? ? ??? 0000:07:00.0:pcie22
? ? ? ? ??? power
? ? ? ? ??? subsystem -> ../../../../../../bus/pci_express
? ? ? ??? 0000:08:00.0
? ? ? ? ??? 0000:09:00.0
? ? ? ? ? ??? driver -> ../../../../../../../bus/pci/drivers/bnx2
? ? ? ? ? ??? net
? ? ? ? ? ? ??? eth1
? ? ? ? ? ? ??? device -> ../../../0000:09:00.0
? ? ? ? ? ? ??? power
? ? ? ? ? ? ??? statistics
? ? ? ? ? ? ??? subsystem -> ../../../../../../../../../class/net
? ? ? ? ? ??? power
? ? ? ? ? ??? subsystem -> ../../../../../../../bus/pci
? ? ? ? ??? pci_bus
? ? ? ? ? ??? 0000:09
? ? ? ? ? ??? device -> ../../../0000:08:00.0
? ? ? ? ? ??? power
? ? ? ? ? ??? subsystem -> ../../../../../../../../class/pci_bus
? ? ? ? ??? power
? ? ? ? ??? subsystem -> ../../../../../../bus/pci
? ? ? ??? driver -> ../../../../../bus/pci/drivers/pcieport
? ? ? ??? pci_bus
? ? ? ? ??? 0000:08
? ? ? ? ??? device -> ../../../0000:07:00.0
? ? ? ? ??? power
? ? ? ? ??? subsystem -> ../../../../../../../class/pci_bus
? ? ? ??? power
? ? ? ??? subsystem -> ../../../../../bus/pci
...
^ permalink raw reply
* [patch 2/2] efika mx/sb: enable watchdog
From: Uwe Kleine-König @ 2011-02-28 14:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228132646.494426111@rtp-net.org>
Hi Arnaud,
just one nitpick below ...
On Mon, Feb 28, 2011 at 02:21:34PM +0100, Arnaud Patard wrote:
> Register watchdog for efika mx and sb systems.
>
> Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
>
> Index: linux-2.6-submit/arch/arm/mach-mx5/mx51_efika.c
> ===================================================================
> --- linux-2.6-submit.orig/arch/arm/mach-mx5/mx51_efika.c 2011-02-27 23:13:37.000000000 +0100
> +++ linux-2.6-submit/arch/arm/mach-mx5/mx51_efika.c 2011-02-27 23:20:38.000000000 +0100
> @@ -611,6 +611,7 @@
> ARRAY_SIZE(mx51efika_pads));
> imx51_add_imx_uart(0, &uart_pdata);
> mx51_efika_usb();
> + imx51_add_imx2_wdt(0, NULL);
> imx51_add_sdhci_esdhc_imx(0, NULL);
>
> /* FIXME: comes from original code. check this. */
> Index: linux-2.6-submit/arch/arm/mach-mx5/Kconfig
> ===================================================================
> --- linux-2.6-submit.orig/arch/arm/mach-mx5/Kconfig 2011-02-27 23:13:42.000000000 +0100
> +++ linux-2.6-submit/arch/arm/mach-mx5/Kconfig 2011-02-27 23:20:38.000000000 +0100
> @@ -117,6 +117,7 @@
> bool
> select SOC_IMX51
> select IMX_HAVE_PLATFORM_IMX_UART
> + select IMX_HAVE_PLATFORM_IMX2_WDT
> select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
> select IMX_HAVE_PLATFORM_SPI_IMX
These IMX_HAVE_PLATFORM entries are sorted alphabetically and 2 sorts
before _, so IMX_HAVE_PLATFORM_IMX2_WDT should be the first entry here.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [PATCH V3 4/4] mmc: sdhci-esdhc: enable esdhc on imx53
From: Wolfram Sang @ 2011-02-28 14:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298892725-23672-4-git-send-email-Hong-Xing.Zhu@freescale.com>
On Mon, Feb 28, 2011 at 07:32:05PM +0800, Richard Zhu wrote:
> Fix the NO INT in the Multi-BLK IO in SD/MMC, and
> Multi-BLK read in SDIO
>
> The CMDTYPE of the CMD register(offset 0xE) should be set to
> "11" when the STOP CMD12 is issued on imx53 to abort one
> open ended multi-blk IO. Otherwise one the TC INT wouldn't
> be generated.
>
> In exact block transfer, the controller doesn't complete the
> operations automatically as required at the end of the
> transfer and remains on hold if the abort command is not sent.
> As a result, the TC flag is not asserted and SW received timeout
> exeception. set bit1 of Vendor Spec registor to fix it
>
> Signed-off-by: Richard Zhu <Hong-Xing.Zhu@freescale.com>
> Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
> ---
> drivers/mmc/host/sdhci-esdhc-imx.c | 77 ++++++++++++++++++++++++++++++++++-
> drivers/mmc/host/sdhci-pltfm.h | 2 +-
> 2 files changed, 75 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
> index 9b82910..32af7c4 100644
> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
> @@ -15,13 +15,41 @@
> #include <linux/delay.h>
> #include <linux/err.h>
> #include <linux/clk.h>
> +#include <linux/slab.h>
> #include <linux/mmc/host.h>
> #include <linux/mmc/sdhci-pltfm.h>
> +#include <linux/mmc/mmc.h>
> +#include <linux/mmc/sdio.h>
> #include <mach/hardware.h>
> #include "sdhci.h"
> #include "sdhci-pltfm.h"
> #include "sdhci-esdhc.h"
>
> +/* Abort type definition in the command register */
> +#define SDHCI_CMD_ABORTCMD 0xC0
Won't that belong into sd.h (unless I misunderstood your last mail)?
> +/* VENDOR SPEC register */
> +#define SDHCI_VENDOR_SPEC 0xC0
> +
> +/*
> + * The CMDTYPE of the CMD register(offset 0xE) should be set to
Check spaces.
> + * "11" when the STOP CMD12 is issued on imx53 to abort one
> + * open ended multi-blk IO. Otherwise one the TC INT wouldn't
> + * be generated.
> + * In exact block transfer, the controller doesn't complete the
> + * operations automatically as required at the end of the
> + * transfer and remains on hold if the abort command is not sent.
> + * As a result, the TC flag is not asserted and SW received timeout
> + * exeception. Bit1 of Vendor Spec registor is used to fix it.
> + */
This is a better description, thanks. But what does the bit technically
do? Can't we keep it enabled all the time? Can't we use it to fix CMD12,
too?
> +#define IMX_MULTIBLK_NO_INT (1 << 0)
> +
> +struct pltfm_imx_data {
> + int flags;
> + u32 mod_val;
> +};
Hmm, to me, just using cpu_is_mx53() is more readable than introducing
another layer of flags/quirks.
> +
> +static struct sdhci_ops sdhci_esdhc_ops;
> +
Move them to the front. But I did this already, so no worries :) I will
ping Chris to merge my series, so we will have something better to
develop on.
> static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, int reg)
> {
> void __iomem *base = host->ioaddr + (reg & ~0x3);
> @@ -38,20 +66,51 @@ static u16 esdhc_readw_le(struct sdhci_host *host, int reg)
> return readw(host->ioaddr + reg);
> }
>
> +static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
> +{
> + switch (reg) {
> + case SDHCI_INT_STATUS:
> + if (val & SDHCI_INT_DATA_END) {
> + u32 v;
> + v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
> + if (v & 0x2) {
> + v &= ~0x2;
Forgot to mention this before. Please use a define instead of hardocded
values.
I skipped the rest because we probably need to answer the questions
above first and to get a stable base with out conflicts.
Regards,
Wolfram
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply
* [PATCH resend] omap: Fix linker error in drivers/video/omap/lcd_2430sdp.c
From: Jarkko Nikula @ 2011-02-28 14:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110224212644.GN20560@atomide.com>
On Thu, 24 Feb 2011 13:26:44 -0800
Tony Lindgren <tony@atomide.com> wrote:
> We should avoid selecting driver related things, otherwise we can never
> build a tiny kernel with initramfs with everything as modules.
>
> Can you see if adding depends to the LCD panel option does the trick
> instead?
>
True and as lcd_2430sdp.c is not compiled without CONFIG_FB_OMAP a hack
below should work a bit better.
What would you think Tomi?
diff --git a/drivers/video/omap/Kconfig b/drivers/video/omap/Kconfig
index 083c8fe..c981249 100644
--- a/drivers/video/omap/Kconfig
+++ b/drivers/video/omap/Kconfig
@@ -5,6 +5,7 @@ config FB_OMAP
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
+ select TWL4030_CORE if MACH_OMAP_2430SDP
help
Frame buffer driver for OMAP based boards.
--
Jarkko
^ permalink raw reply related
* [PATCH 7/7] Serial: OMAP2+: Make the RX_TIMEOUT for DMA configurable for each UART
From: Govindraj.R @ 2011-02-28 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298903958-6496-1-git-send-email-govindraj.raja@ti.com>
From: Jon Hunter <jon-hunter@ti.com>
When using DMA there are two timeouts defined. The first timeout,
rx_timeout, is really a polling rate in which software polls the
DMA status to see if the DMA has finished. This is necessary for
the RX side because we do not know how much data we will receive.
The secound timeout, RX_TIMEOUT, is a timeout after which the
DMA will be stopped if no more data is received. To make this
clearer, rename rx_timeout as rx_poll_rate and rename the
function serial_omap_rx_timeout() to serial_omap_rxdma_poll().
The OMAP-Serial driver defines an RX_TIMEOUT of 3 seconds that is
used to indicate when the DMA for UART can be stopped if no more
data is received. The value is a global definition that is applied
to all instances of the UART.
Each UART may be used for a different purpose and so the timeout
required may differ. Make this value configurable for each UART so
that this value can be optimised for power savings.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
---
arch/arm/mach-omap2/serial.c | 2 ++
arch/arm/plat-omap/include/plat/omap-serial.h | 6 ++++--
drivers/tty/serial/omap-serial.c | 15 ++++++++-------
3 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 530e9e3..ff52442 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -48,6 +48,7 @@ static struct omap_uart_port_info omap_serial_default_info[] = {
{
.dma_enabled = 0,
.dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE,
+ .dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE,
.dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT,
.idle_timeout = DEFAULT_IDLE_TIMEOUT,
},
@@ -268,6 +269,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
pdata->flags = UPF_BOOT_AUTOCONF;
pdata->dma_enabled = info->dma_enabled;
pdata->dma_rx_buf_size = info->dma_rx_buf_size;
+ pdata->dma_rx_poll_rate = info->dma_rx_poll_rate;
pdata->dma_rx_timeout = info->dma_rx_timeout;
pdata->idle_timeout = info->idle_timeout;
if (bdata->id == omap_uart_con_id)
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
index 4f12d6c..e338f4e 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -51,8 +51,8 @@
#define OMAP_UART_DMA_CH_FREE -1
-#define RX_TIMEOUT (3 * HZ) /* RX DMA timeout (jiffies) */
-#define DEFAULT_RXDMA_TIMEOUT 1 /* RX DMA polling rate (us) */
+#define DEFAULT_RXDMA_TIMEOUT (3 * HZ) /* RX DMA timeout (jiffies) */
+#define DEFAULT_RXDMA_POLLRATE 1 /* RX DMA polling rate (us) */
#define DEFAULT_RXDMA_BUFSIZE 4096 /* RX DMA buffer size */
#define DEFAULT_IDLE_TIMEOUT (5 * HZ) /* UART idle timeout (secs) */
@@ -70,6 +70,7 @@ struct omap_uart_port_info {
unsigned int console_uart;
unsigned int dma_rx_buf_size;/* DMA Rx Buffer Size */
unsigned int dma_rx_timeout; /* DMA RX timeout */
+ unsigned int dma_rx_poll_rate; /* DMA RX timeout */
unsigned int idle_timeout; /* OMAP UART idle timeout */
void __iomem *wk_st;
@@ -99,6 +100,7 @@ struct uart_omap_dma {
/* timer to poll activity on rx dma */
struct timer_list rx_timer;
unsigned int rx_buf_size;
+ unsigned int rx_poll_rate;
unsigned int rx_timeout;
};
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 008645c..5c3d2fc 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -51,7 +51,7 @@ static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
/* Forward declaration of functions */
static void uart_tx_dma_callback(int lch, u16 ch_status, void *data);
-static void serial_omap_rx_timeout(unsigned long uart_no);
+static void serial_omap_rxdma_poll(unsigned long uart_no);
static int serial_omap_start_rxdma(struct uart_omap_port *up);
static void omap_uart_mdr1_errataset(struct uart_omap_port *up);
@@ -589,7 +589,7 @@ static int serial_omap_startup(struct uart_port *port)
(dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys),
0);
init_timer(&(up->uart_dma.rx_timer));
- up->uart_dma.rx_timer.function = serial_omap_rx_timeout;
+ up->uart_dma.rx_timer.function = serial_omap_rxdma_poll;
up->uart_dma.rx_timer.data = up->pdev->id;
/* Currently the buffer size is 4KB. Can increase it */
up->uart_dma.rx_buf = dma_alloc_coherent(NULL,
@@ -1191,7 +1191,7 @@ static int serial_omap_resume(struct device *dev)
return 0;
}
-static void serial_omap_rx_timeout(unsigned long uart_no)
+static void serial_omap_rxdma_poll(unsigned long uart_no)
{
struct uart_omap_port *up = ui[uart_no];
unsigned int curr_dma_pos, curr_transmitted_size;
@@ -1201,9 +1201,9 @@ static void serial_omap_rx_timeout(unsigned long uart_no)
if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) ||
(curr_dma_pos == 0)) {
if (jiffies_to_msecs(jiffies - up->port_activity) <
- RX_TIMEOUT) {
+ up->uart_dma.rx_timeout) {
mod_timer(&up->uart_dma.rx_timer, jiffies +
- usecs_to_jiffies(up->uart_dma.rx_timeout));
+ usecs_to_jiffies(up->uart_dma.rx_poll_rate));
} else {
serial_omap_stop_rxdma(up);
up->ier |= (UART_IER_RDI | UART_IER_RLSI);
@@ -1232,7 +1232,7 @@ static void serial_omap_rx_timeout(unsigned long uart_no)
}
} else {
mod_timer(&up->uart_dma.rx_timer, jiffies +
- usecs_to_jiffies(up->uart_dma.rx_timeout));
+ usecs_to_jiffies(up->uart_dma.rx_poll_rate));
}
up->port_activity = jiffies;
}
@@ -1270,7 +1270,7 @@ static int serial_omap_start_rxdma(struct uart_omap_port *up)
/* FIXME: Cache maintenance needed here? */
omap_start_dma(up->uart_dma.rx_dma_channel);
mod_timer(&up->uart_dma.rx_timer, jiffies +
- usecs_to_jiffies(up->uart_dma.rx_timeout));
+ usecs_to_jiffies(up->uart_dma.rx_poll_rate));
up->uart_dma.rx_dma_used = true;
return ret;
}
@@ -1412,6 +1412,7 @@ static int serial_omap_probe(struct platform_device *pdev)
up->use_dma = 1;
up->uart_dma.rx_buf_size = omap_up_info->dma_rx_buf_size;
up->uart_dma.rx_timeout = omap_up_info->dma_rx_timeout;
+ up->uart_dma.rx_poll_rate = omap_up_info->dma_rx_poll_rate;
spin_lock_init(&(up->uart_dma.tx_lock));
spin_lock_init(&(up->uart_dma.rx_lock));
up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
--
1.7.1
^ permalink raw reply related
* [PATCH 6/7] OMAP: Serial: Allow UART parameters to be configured from board file
From: Govindraj.R @ 2011-02-28 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298903958-6496-1-git-send-email-govindraj.raja@ti.com>
From: Jon Hunter <jon-hunter@ti.com>
The following UART parameters are defined within the UART driver:
1). Whether the UART uses DMA (dma_enabled), by default set to 0
2). The size of dma buffer (set to 4096 bytes)
3). The time after which the dma should stop if no more data is received.
4). The idle timeout (DEFAULT_TIMEOUT) that sets the can_sleep flag after
uart inactivity.
5). Add default serial pads to board data if no pad info is available from
board file to avoid breaking uart wakeup capability from rx pad.
Different UARTs may be used for different purpose such as the console,
for interfacing bluetooth chip, for interfacing to a modem chip, etc.
Therefore, it is necessary to be able to customize the above settings
for a given board on a per UART basis.
This change allows these parameters to be configured from the board file
and allows the parameters to be configured for each UART independently.
If a board does not define its own custom parameters for the UARTs, then
use the default parameters in the structure "omap_serial_default_info".
The default parameters are defined to be the same as the current settings
in the UART driver to avoid breaking the UART for any board. By default,
make all boards use the default UART parameters.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Deepak K <deepak.k@ti.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
---
arch/arm/mach-omap2/board-2430sdp.c | 3 +-
arch/arm/mach-omap2/board-3430sdp.c | 4 +-
arch/arm/mach-omap2/board-4430sdp.c | 3 +-
arch/arm/mach-omap2/board-am3517evm.c | 3 +-
arch/arm/mach-omap2/board-apollon.c | 3 +-
arch/arm/mach-omap2/board-cm-t35.c | 3 +-
arch/arm/mach-omap2/board-cm-t3517.c | 3 +-
arch/arm/mach-omap2/board-devkit8000.c | 3 +-
arch/arm/mach-omap2/board-generic.c | 3 +-
arch/arm/mach-omap2/board-h4.c | 3 +-
arch/arm/mach-omap2/board-igep0020.c | 3 +-
arch/arm/mach-omap2/board-igep0030.c | 3 +-
arch/arm/mach-omap2/board-ldp.c | 3 +-
arch/arm/mach-omap2/board-n8x0.c | 9 +-
arch/arm/mach-omap2/board-omap3beagle.c | 3 +-
arch/arm/mach-omap2/board-omap3evm.c | 3 +-
arch/arm/mach-omap2/board-omap3logic.c | 3 +-
arch/arm/mach-omap2/board-omap3pandora.c | 3 +-
arch/arm/mach-omap2/board-omap3stalker.c | 3 +-
arch/arm/mach-omap2/board-omap3touchbook.c | 3 +-
arch/arm/mach-omap2/board-omap4panda.c | 3 +-
arch/arm/mach-omap2/board-overo.c | 3 +-
arch/arm/mach-omap2/board-rm680.c | 3 +-
arch/arm/mach-omap2/board-rx51.c | 3 +-
arch/arm/mach-omap2/board-ti8168evm.c | 2 +-
arch/arm/mach-omap2/board-zoom-peripherals.c | 3 +-
arch/arm/mach-omap2/serial.c | 108 +++++++++++++++++++++++-
arch/arm/plat-omap/include/plat/omap-serial.h | 14 +++-
arch/arm/plat-omap/include/plat/serial.h | 6 +-
drivers/tty/serial/omap-serial.c | 10 +-
30 files changed, 177 insertions(+), 45 deletions(-)
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index cc42d47..0cfa3c7 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -38,6 +38,7 @@
#include <plat/gpmc.h>
#include <plat/usb.h>
#include <plat/gpmc-smc91x.h>
+#include <plat/omap-serial.h>
#include "mux.h"
#include "hsmmc.h"
@@ -249,7 +250,7 @@ static void __init omap_2430sdp_init(void)
omap2430_i2c_init();
platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
- omap_serial_init();
+ omap_serial_init(NULL);
omap2_hsmmc_init(mmc);
omap2_usbfs_init(&sdp2430_usb_config);
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 8950ecc..7d7df08 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -39,8 +39,8 @@
#include <plat/gpmc.h>
#include <plat/display.h>
#include <plat/panel-generic-dpi.h>
-
#include <plat/gpmc-smc91x.h>
+#include <plat/omap-serial.h>
#include "board-flash.h"
#include "mux.h"
@@ -798,7 +798,7 @@ static void __init omap_3430sdp_init(void)
spi_register_board_info(sdp3430_spi_board_info,
ARRAY_SIZE(sdp3430_spi_board_info));
ads7846_dev_init();
- omap_serial_init();
+ omap_serial_init(NULL);
usb_musb_init(&musb_board_data);
board_smc91x_init();
board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 1a943be..9687aec 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -36,6 +36,7 @@
#include <plat/usb.h>
#include <plat/mmc.h>
#include <plat/omap4-keypad.h>
+#include <plat/omap-serial.h>
#include "mux.h"
#include "hsmmc.h"
@@ -643,7 +644,7 @@ static void __init omap_4430sdp_init(void)
omap4_i2c_init();
omap_sfh7741prox_init();
platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
- omap_serial_init();
+ omap_serial_init(NULL);
omap4_twl6030_hsmmc_init(mmc);
usb_musb_init(&musb_board_data);
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 634fe65..bbc79a4 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -36,6 +36,7 @@
#include <plat/usb.h>
#include <plat/display.h>
#include <plat/panel-generic-dpi.h>
+#include <plat/omap-serial.h>
#include "mux.h"
#include "control.h"
@@ -487,7 +488,7 @@ static void __init am3517_evm_init(void)
am3517_evm_i2c_init();
omap_display_init(&am3517_evm_dss_data);
- omap_serial_init();
+ omap_serial_init(NULL);
/* Configure GPIO for EHCI port */
omap_mux_init_gpio(57, OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 4ef4aad..e021cdb 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -39,6 +39,7 @@
#include <plat/board.h>
#include <plat/common.h>
#include <plat/gpmc.h>
+#include <plat/omap-serial.h>
#include "mux.h"
#include "control.h"
@@ -342,7 +343,7 @@ static void __init omap_apollon_init(void)
* if not needed.
*/
platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices));
- omap_serial_init();
+ omap_serial_init(NULL);
}
static void __init omap_apollon_map_io(void)
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 7311824..8ecde7e 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -48,6 +48,7 @@
#include <plat/display.h>
#include <plat/panel-generic-dpi.h>
#include <plat/mcspi.h>
+#include <plat/omap-serial.h>
#include <mach/hardware.h>
@@ -788,7 +789,7 @@ static struct omap_musb_board_data musb_board_data = {
static void __init cm_t35_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
- omap_serial_init();
+ omap_serial_init(NULL);
cm_t35_init_i2c();
cm_t35_init_nand();
cm_t35_init_ads7846();
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 38bef6d..a1c0d87 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -43,6 +43,7 @@
#include <plat/usb.h>
#include <plat/nand.h>
#include <plat/gpmc.h>
+#include <plat/omap-serial.h>
#include <mach/am35xx.h>
@@ -292,7 +293,7 @@ static struct omap_board_mux board_mux[] __initdata = {
static void __init cm_t3517_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
- omap_serial_init();
+ omap_serial_init(NULL);
cm_t3517_init_leds();
cm_t3517_init_nand();
cm_t3517_init_rtc();
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 54abdd0..28fac56 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -47,6 +47,7 @@
#include <plat/usb.h>
#include <plat/display.h>
#include <plat/panel-generic-dpi.h>
+#include <plat/omap-serial.h>
#include <plat/mcspi.h>
#include <linux/input/matrix_keypad.h>
@@ -784,7 +785,7 @@ static struct omap_board_mux board_mux[] __initdata = {
static void __init devkit8000_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
- omap_serial_init();
+ omap_serial_init(NULL);
omap_dm9000_init();
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 682da92..450128b 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -29,6 +29,7 @@
#include <plat/usb.h>
#include <plat/board.h>
#include <plat/common.h>
+#include <plat/omap-serial.h>
static struct omap_board_config_kernel generic_config[] = {
};
@@ -43,7 +44,7 @@ static void __init omap_generic_init_early(void)
static void __init omap_generic_init(void)
{
- omap_serial_init();
+ omap_serial_init(NULL);
}
static void __init omap_generic_map_io(void)
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index f6a3872..6481bab 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -39,6 +39,7 @@
#include <plat/menelaus.h>
#include <plat/dma.h>
#include <plat/gpmc.h>
+#include <plat/omap-serial.h>
#include "mux.h"
#include "control.h"
@@ -370,7 +371,7 @@ static void __init omap_h4_init(void)
platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
omap2_usbfs_init(&h4_usb_config);
- omap_serial_init();
+ omap_serial_init(NULL);
}
static void __init omap_h4_map_io(void)
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 54e6318..9223b9b 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -34,6 +34,7 @@
#include <plat/display.h>
#include <plat/panel-generic-dpi.h>
#include <plat/onenand.h>
+#include <plat/omap-serial.h>
#include "mux.h"
#include "hsmmc.h"
@@ -686,7 +687,7 @@ static void __init igep2_init(void)
igep2_i2c_init();
platform_add_devices(igep2_devices, ARRAY_SIZE(igep2_devices));
omap_display_init(&igep2_dss_data);
- omap_serial_init();
+ omap_serial_init(NULL);
usb_musb_init(&musb_board_data);
usb_ehci_init(&ehci_pdata);
diff --git a/arch/arm/mach-omap2/board-igep0030.c b/arch/arm/mach-omap2/board-igep0030.c
index d75028e..c593a5c 100644
--- a/arch/arm/mach-omap2/board-igep0030.c
+++ b/arch/arm/mach-omap2/board-igep0030.c
@@ -31,6 +31,7 @@
#include <plat/gpmc.h>
#include <plat/usb.h>
#include <plat/onenand.h>
+#include <plat/omap-serial.h>
#include "mux.h"
#include "hsmmc.h"
@@ -432,7 +433,7 @@ static void __init igep3_init(void)
/* Register I2C busses and drivers */
igep3_i2c_init();
platform_add_devices(igep3_devices, ARRAY_SIZE(igep3_devices));
- omap_serial_init();
+ omap_serial_init(NULL);
usb_musb_init(&musb_board_data);
usb_ehci_init(&ehci_pdata);
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index a3fae56..ff93da7 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -40,6 +40,7 @@
#include <plat/common.h>
#include <plat/gpmc.h>
#include <mach/board-zoom.h>
+#include <plat/omap-serial.h>
#include <asm/delay.h>
#include <plat/usb.h>
@@ -430,7 +431,7 @@ static void __init omap_ldp_init(void)
spi_register_board_info(ldp_spi_board_info,
ARRAY_SIZE(ldp_spi_board_info));
ads7846_dev_init();
- omap_serial_init();
+ omap_serial_init(NULL);
usb_musb_init(&musb_board_data);
board_nand_init(ldp_nand_partitions,
ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0);
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index b36cbd2..7347256 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -33,6 +33,7 @@
#include <plat/onenand.h>
#include <plat/mmc.h>
#include <plat/serial.h>
+#include <plat/omap-serial.h>
#include "mux.h"
@@ -662,22 +663,22 @@ static inline void board_serial_init(void)
bdata.pads_cnt = 0;
bdata.id = 0;
- omap_serial_init_port(&bdata);
+ omap_serial_init_port(&bdata, NULL);
bdata.id = 1;
- omap_serial_init_port(&bdata);
+ omap_serial_init_port(&bdata, NULL);
bdata.id = 2;
bdata.pads = serial2_pads;
bdata.pads_cnt = ARRAY_SIZE(serial2_pads);
- omap_serial_init_port(&bdata);
+ omap_serial_init_port(&bdata, NULL);
}
#else
static inline void board_serial_init(void)
{
- omap_serial_init();
+ omap_serial_init(NULL);
}
#endif
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index a1faea3..e6c0299 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -45,6 +45,7 @@
#include <plat/gpmc.h>
#include <plat/nand.h>
#include <plat/usb.h>
+#include <plat/omap-serial.h>
#include "mux.h"
#include "hsmmc.h"
@@ -613,7 +614,7 @@ static void __init omap3_beagle_init(void)
platform_add_devices(omap3_beagle_devices,
ARRAY_SIZE(omap3_beagle_devices));
omap_display_init(&beagle_dss_data);
- omap_serial_init();
+ omap_serial_init(NULL);
omap_mux_init_gpio(170, OMAP_PIN_INPUT);
gpio_request(170, "DVI_nPD");
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 5364147..0b793f1 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -46,6 +46,7 @@
#include <plat/mcspi.h>
#include <plat/display.h>
#include <plat/panel-generic-dpi.h>
+#include <plat/omap-serial.h>
#include "mux.h"
#include "sdram-micron-mt46h32m32lf-6.h"
@@ -831,7 +832,7 @@ static void __init omap3_evm_init(void)
spi_register_board_info(omap3evm_spi_board_info,
ARRAY_SIZE(omap3evm_spi_board_info));
- omap_serial_init();
+ omap_serial_init(NULL);
/* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
usb_nop_xceiv_register();
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index b726943..0b5ba52 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -44,6 +44,7 @@
#include <plat/gpmc-smsc911x.h>
#include <plat/gpmc.h>
#include <plat/sdrc.h>
+#include <plat/omap-serial.h>
#define OMAP3LOGIC_SMSC911X_CS 1
@@ -212,7 +213,7 @@ static void __init omap3logic_init(void)
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap3torpedo_fix_pbias_voltage();
omap3logic_i2c_init();
- omap_serial_init();
+ omap_serial_init(NULL);
board_mmc_init();
board_smsc911x_init();
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 17ef547..6f84247 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -48,6 +48,7 @@
#include <plat/usb.h>
#include <plat/display.h>
#include <plat/nand.h>
+#include <plat/omap-serial.h>
#include "mux.h"
#include "sdram-micron-mt46h32m32lf-6.h"
@@ -703,7 +704,7 @@ static void __init omap3pandora_init(void)
platform_add_devices(omap3pandora_devices,
ARRAY_SIZE(omap3pandora_devices));
omap_display_init(&pandora_dss_data);
- omap_serial_init();
+ omap_serial_init(NULL);
spi_register_board_info(omap3pandora_spi_board_info,
ARRAY_SIZE(omap3pandora_spi_board_info));
omap3pandora_ads7846_init();
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 07006c3..629bdce 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -41,6 +41,7 @@
#include <plat/usb.h>
#include <plat/display.h>
#include <plat/panel-generic-dpi.h>
+#include <plat/omap-serial.h>
#include <plat/mcspi.h>
#include <linux/input/matrix_keypad.h>
@@ -639,7 +640,7 @@ static void __init omap3_stalker_init(void)
spi_register_board_info(omap3stalker_spi_board_info,
ARRAY_SIZE(omap3stalker_spi_board_info));
- omap_serial_init();
+ omap_serial_init(NULL);
usb_musb_init(&musb_board_data);
usb_ehci_init(&ehci_pdata);
ads7846_dev_init();
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 6a60f79..c6bf289 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -48,6 +48,7 @@
#include <plat/gpmc.h>
#include <plat/nand.h>
#include <plat/usb.h>
+#include <plat/omap-serial.h>
#include "mux.h"
#include "hsmmc.h"
@@ -519,7 +520,7 @@ static void __init omap3_touchbook_init(void)
omap3_touchbook_i2c_init();
platform_add_devices(omap3_touchbook_devices,
ARRAY_SIZE(omap3_touchbook_devices));
- omap_serial_init();
+ omap_serial_init(NULL);
omap_mux_init_gpio(170, OMAP_PIN_INPUT);
gpio_request(176, "DVI_nPD");
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 3dd241b..2245ed1 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -39,6 +39,7 @@
#include <plat/common.h>
#include <plat/usb.h>
#include <plat/mmc.h>
+#include <plat/omap-serial.h>
#include "timer-gp.h"
#include "hsmmc.h"
@@ -470,7 +471,7 @@ static void __init omap4_panda_init(void)
omap4_panda_i2c_init();
platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
platform_device_register(&omap_vwlan_device);
- omap_serial_init();
+ omap_serial_init(NULL);
omap4_twl6030_hsmmc_init(mmc);
omap4_ehci_init();
usb_musb_init(&musb_board_data);
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index a33ec0e..960a3ea 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -46,6 +46,7 @@
#include <mach/hardware.h>
#include <plat/nand.h>
#include <plat/usb.h>
+#include <plat/omap-serial.h>
#include "mux.h"
#include "sdram-micron-mt46h32m32lf-6.h"
@@ -450,7 +451,7 @@ static void __init overo_init(void)
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
overo_i2c_init();
platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices));
- omap_serial_init();
+ omap_serial_init(NULL);
overo_flash_init();
usb_musb_init(&musb_board_data);
usb_ehci_init(&ehci_pdata);
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index bdebcb7..bd4b7ad 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -27,6 +27,7 @@
#include <plat/gpmc.h>
#include <plat/common.h>
#include <plat/onenand.h>
+#include <plat/omap-serial.h>
#include "mux.h"
#include "hsmmc.h"
@@ -162,7 +163,7 @@ static struct omap_musb_board_data rm680_musb_data = {
static void __init rm680_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
- omap_serial_init();
+ omap_serial_init(NULL);
usb_musb_init(&rm680_musb_data);
rm680_peripherals_init();
}
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 3cf72fe..08619e9 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -29,6 +29,7 @@
#include <plat/dma.h>
#include <plat/gpmc.h>
#include <plat/usb.h>
+#include <plat/omap-serial.h>
#include "mux.h"
#include "pm.h"
@@ -127,7 +128,7 @@ static struct omap_musb_board_data musb_board_data = {
static void __init rx51_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
- omap_serial_init();
+ omap_serial_init(NULL);
usb_musb_init(&musb_board_data);
rx51_peripherals_init();
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index f2b0971..c4f83ed 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -42,7 +42,7 @@ static void __init ti8168_evm_init_irq(void)
static void __init ti8168_evm_init(void)
{
- omap_serial_init();
+ omap_serial_init(NULL);
}
static void __init ti8168_evm_map_io(void)
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index e0e040f..82ca121 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -26,6 +26,7 @@
#include <plat/common.h>
#include <plat/usb.h>
+#include <plat/omap-serial.h>
#include <mach/board-zoom.h>
@@ -394,5 +395,5 @@ void __init zoom_peripherals_init(void)
platform_device_register(&omap_vwlan_device);
usb_musb_init(&musb_board_data);
enable_board_wakeup_source();
- omap_serial_init();
+ omap_serial_init(NULL);
}
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 755f4aa..530e9e3 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -44,6 +44,15 @@
static int omap_uart_con_id __initdata = -1;
+static struct omap_uart_port_info omap_serial_default_info[] = {
+ {
+ .dma_enabled = 0,
+ .dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE,
+ .dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT,
+ .idle_timeout = DEFAULT_IDLE_TIMEOUT,
+ },
+};
+
static int uart_idle_hwmod(struct omap_device *od)
{
omap_hwmod_idle(od->hwmods[0]);
@@ -66,6 +75,54 @@ static struct omap_device_pm_latency omap_uart_latency[] = {
},
};
+#ifdef CONFIG_OMAP_MUX
+static struct omap_device_pad default_serial0_pads[] __initdata = {
+ {
+ .name = "uart1_rx.uart1_rx",
+ .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
+ .enable = OMAP_MUX_MODE0,
+ },
+};
+
+static struct omap_device_pad default_serial1_pads[] __initdata = {
+ {
+ .name = "uart2_rx.uart2_rx",
+ .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
+ .enable = OMAP_MUX_MODE0,
+ },
+};
+
+static struct omap_device_pad default_serial2_pads[] __initdata = {
+ {
+ .name = "uart3_rx_irrx.uart3_rx_irrx",
+ .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
+ .enable = OMAP_MUX_MODE0,
+ },
+};
+
+static struct omap_device_pad default_omap36xx_serial3_pads[] __initdata = {
+ {
+ .name = "gpmc_wait3.uart4_rx",
+ .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
+ .enable = OMAP_MUX_MODE2,
+ },
+};
+
+static struct omap_device_pad default_omap4_serial3_pads[] __initdata = {
+ {
+ .name = "uart4_rx.uart4_rx",
+ .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
+ .enable = OMAP_MUX_MODE0,
+ },
+};
+#else
+static struct omap_device_pad default_serial0_pads[] __initdata = {};
+static struct omap_device_pad default_serial1_pads[] __initdata = {};
+static struct omap_device_pad default_serial2_pads[] __initdata = {};
+static struct omap_device_pad default_omap36xx_serial3_pads[] __initdata = {};
+static struct omap_device_pad default_omap4_serial3_pads[] __initdata = {};
+#endif
+
static void omap_uart_idle_init(struct omap_uart_port_info *uart,
unsigned short num)
{
@@ -164,6 +221,7 @@ core_initcall(omap_serial_early_init);
/**
* omap_serial_init_port() - initialize single serial port
* @bdata: port specific board data pointer
+ * @info: platform specific data pointer
*
* This function initialies serial driver for given port only.
* Platforms can call this function instead of omap_serial_init()
@@ -172,7 +230,8 @@ core_initcall(omap_serial_early_init);
* Don't mix calls to omap_serial_init_port() and omap_serial_init(),
* use only one of the two.
*/
-void __init omap_serial_init_port(struct omap_board_data *bdata)
+void __init omap_serial_init_port(struct omap_board_data *bdata,
+ struct omap_uart_port_info *info)
{
struct omap_hwmod *oh;
struct omap_device *od;
@@ -190,6 +249,9 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
if (!oh)
return;
+ if (info == NULL)
+ info = omap_serial_default_info;
+
pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
if (!pdata) {
pr_err("Memory allocation for UART pdata failed\n");
@@ -204,6 +266,10 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
pdata->uartclk = OMAP24XX_BASE_BAUD * 16;
pdata->flags = UPF_BOOT_AUTOCONF;
+ pdata->dma_enabled = info->dma_enabled;
+ pdata->dma_rx_buf_size = info->dma_rx_buf_size;
+ pdata->dma_rx_timeout = info->dma_rx_timeout;
+ pdata->idle_timeout = info->idle_timeout;
if (bdata->id == omap_uart_con_id)
pdata->console_uart = true;
@@ -222,21 +288,53 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
/**
* omap_serial_init() - initialize all supported serial ports
+ * @info: platform specific data pointer
*
* Initializes all available UARTs as serial ports. Platforms
* can call this function when they want to have default behaviour
* for serial ports (e.g initialize them all as serial ports).
*/
-void __init omap_serial_init(void)
+void __init omap_serial_init(struct omap_uart_port_info *info)
{
struct omap_board_data bdata;
u8 i;
+ if (info == NULL)
+ info = omap_serial_default_info;
+
for (i = 0; i < OMAP_MAX_HSUART_PORTS; i++) {
bdata.id = i;
bdata.flags = 0;
- bdata.pads = NULL;
- bdata.pads_cnt = 0;
- omap_serial_init_port(&bdata);
+ switch (i) {
+ case 0:
+ bdata.pads = default_serial0_pads;
+ bdata.pads_cnt = ARRAY_SIZE(default_serial0_pads);
+ break;
+ case 1:
+ bdata.pads = default_serial1_pads;
+ bdata.pads_cnt = ARRAY_SIZE(default_serial1_pads);
+ break;
+ case 2:
+ bdata.pads = default_serial2_pads;
+ bdata.pads_cnt = ARRAY_SIZE(default_serial2_pads);
+ break;
+ case 3:
+ if (cpu_is_omap44xx()) {
+ bdata.pads = default_omap4_serial3_pads;
+ bdata.pads_cnt =
+ ARRAY_SIZE(default_omap4_serial3_pads);
+ } else {
+ bdata.pads = default_omap36xx_serial3_pads;
+ bdata.pads_cnt =
+ ARRAY_SIZE(default_omap36xx_serial3_pads);
+ }
+ break;
+ default:
+ bdata.pads = NULL;
+ bdata.pads_cnt = 0;
+ break;
+ }
+
+ omap_serial_init_port(&bdata, info);
}
}
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
index f9bc7ef..4f12d6c 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -51,7 +51,11 @@
#define OMAP_UART_DMA_CH_FREE -1
-#define RX_TIMEOUT (3 * HZ)
+#define RX_TIMEOUT (3 * HZ) /* RX DMA timeout (jiffies) */
+#define DEFAULT_RXDMA_TIMEOUT 1 /* RX DMA polling rate (us) */
+#define DEFAULT_RXDMA_BUFSIZE 4096 /* RX DMA buffer size */
+#define DEFAULT_IDLE_TIMEOUT (5 * HZ) /* UART idle timeout (secs) */
+
#define OMAP_MAX_HSUART_PORTS 4
#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
@@ -64,6 +68,9 @@ struct omap_uart_port_info {
upf_t flags; /* UPF_* flags */
unsigned int errata;
unsigned int console_uart;
+ unsigned int dma_rx_buf_size;/* DMA Rx Buffer Size */
+ unsigned int dma_rx_timeout; /* DMA RX timeout */
+ unsigned int idle_timeout; /* OMAP UART idle timeout */
void __iomem *wk_st;
void __iomem *wk_en;
@@ -91,8 +98,8 @@ struct uart_omap_dma {
spinlock_t rx_lock;
/* timer to poll activity on rx dma */
struct timer_list rx_timer;
- int rx_buf_size;
- int rx_timeout;
+ unsigned int rx_buf_size;
+ unsigned int rx_timeout;
};
struct uart_omap_port {
@@ -120,6 +127,7 @@ struct uart_omap_port {
char name[20];
unsigned long port_activity;
struct timer_list inactivity_timer;
+ unsigned int idle_timeout;
unsigned int errata;
int can_sleep;
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index 6339848..2ed24b3 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -103,9 +103,11 @@
#ifndef __ASSEMBLER__
struct omap_board_data;
+struct omap_uart_port_info;
-extern void omap_serial_init(void);
-extern void omap_serial_init_port(struct omap_board_data *bdata);
+extern void omap_serial_init(struct omap_uart_port_info *platform_data);
+extern void omap_serial_init_port(struct omap_board_data *bdata,
+ struct omap_uart_port_info *platform_data);
extern void omap_uart_prepare_idle(int num);
extern void omap_uart_resume_idle(int num);
#endif
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index bc877b9..008645c 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -47,8 +47,6 @@
#define omap_uart_console(port) NULL
#endif
-#define OMAP_UART_CLK_PUT_DELAY (5 * HZ)
-
static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
/* Forward declaration of functions */
@@ -139,7 +137,7 @@ static void serial_omap_port_enable(struct uart_omap_port *up)
}
up->can_sleep = 0;
- mod_timer(&up->inactivity_timer, jiffies + OMAP_UART_CLK_PUT_DELAY);
+ mod_timer(&up->inactivity_timer, jiffies + up->idle_timeout);
}
void omap_uart_prepare_idle(int num)
@@ -1412,16 +1410,18 @@ static int serial_omap_probe(struct platform_device *pdev)
up->uart_dma.uart_dma_tx = dma_tx->start;
up->uart_dma.uart_dma_rx = dma_rx->start;
up->use_dma = 1;
- up->uart_dma.rx_buf_size = 4096;
- up->uart_dma.rx_timeout = 2;
+ up->uart_dma.rx_buf_size = omap_up_info->dma_rx_buf_size;
+ up->uart_dma.rx_timeout = omap_up_info->dma_rx_timeout;
spin_lock_init(&(up->uart_dma.tx_lock));
spin_lock_init(&(up->uart_dma.rx_lock));
up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
}
+
init_timer(&(up->inactivity_timer));
up->inactivity_timer.function = serial_omap_inactivity_timer;
up->inactivity_timer.data = up->pdev->id;
+ up->idle_timeout = omap_up_info->idle_timeout;
pm_runtime_enable(&pdev->dev);
pm_runtime_irq_safe(&pdev->dev);
--
1.7.1
^ permalink raw reply related
* [PATCH 5/7] Serial: OMAP: add runtime pm support for omap-serial driver
From: Govindraj.R @ 2011-02-28 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298903958-6496-1-git-send-email-govindraj.raja@ti.com>
Adapts omap-serial driver to use pm_runtime api's.
1.) Populate reg values to uart port which can be used for context restore.
2.) Moved Erratum handling func to driver from serial.c
3.) adding port_enable/disable func to enable/disable given uart port.
4.) using prepare/resume api's to cut and enable back uart func_clks.
5.) using timer to set flag to cut uart clocks based on this flag in
sram_idle path.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
---
drivers/tty/serial/omap-serial.c | 304 +++++++++++++++++++++++++++++++++++---
1 files changed, 283 insertions(+), 21 deletions(-)
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index d40924a..bc877b9 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -33,10 +33,21 @@
#include <linux/clk.h>
#include <linux/serial_core.h>
#include <linux/irq.h>
+#include <linux/pm_runtime.h>
#include <plat/dma.h>
#include <plat/dmtimer.h>
#include <plat/omap-serial.h>
+#include <plat/serial.h>
+#include <plat/omap_device.h>
+
+#ifdef CONFIG_SERIAL_OMAP_CONSOLE
+#define omap_uart_console(port) ((port)->cons && (port)->cons->index == (port)->line)
+#else
+#define omap_uart_console(port) NULL
+#endif
+
+#define OMAP_UART_CLK_PUT_DELAY (5 * HZ)
static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
@@ -44,6 +55,7 @@ static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
static void uart_tx_dma_callback(int lch, u16 ch_status, void *data);
static void serial_omap_rx_timeout(unsigned long uart_no);
static int serial_omap_start_rxdma(struct uart_omap_port *up);
+static void omap_uart_mdr1_errataset(struct uart_omap_port *up);
static inline unsigned int serial_in(struct uart_omap_port *up, int offset)
{
@@ -90,6 +102,73 @@ serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
return port->uartclk/(baud * divisor);
}
+static void omap_uart_smart_idle(struct uart_omap_port *up)
+{
+ struct platform_device *pdev = up->pdev;
+ struct omap_device *od = container_of(pdev, struct omap_device, pdev);
+
+ omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART);
+}
+
+static void serial_omap_port_disable(struct uart_omap_port *up)
+{
+ if (!pm_runtime_suspended(&up->pdev->dev)) {
+ del_timer(&up->inactivity_timer);
+ if (omap_uart_console(&up->port))
+ console_stop(up->port.cons);
+
+ pm_runtime_put_sync(&up->pdev->dev);
+ }
+}
+
+static void serial_omap_inactivity_timer(unsigned long uart_no)
+{
+ struct uart_omap_port *up = ui[uart_no];
+
+ up->can_sleep = 1;
+ omap_uart_smart_idle(up);
+}
+
+static void serial_omap_port_enable(struct uart_omap_port *up)
+{
+ if (pm_runtime_suspended(&up->pdev->dev)) {
+ if (omap_uart_console(&up->port))
+ console_start(up->port.cons);
+
+ pm_runtime_get_sync(&up->pdev->dev);
+ }
+
+ up->can_sleep = 0;
+ mod_timer(&up->inactivity_timer, jiffies + OMAP_UART_CLK_PUT_DELAY);
+}
+
+void omap_uart_prepare_idle(int num)
+{
+ struct uart_omap_port *up = ui[num];
+
+ if (up && up->can_sleep)
+ serial_omap_port_disable(up);
+}
+
+void omap_uart_resume_idle(int num)
+{
+ struct uart_omap_port *up = ui[num];
+ struct omap_device *od;
+ struct platform_device *pdev;
+
+ if (!up)
+ return;
+
+ pdev = up->pdev;
+ od = container_of(pdev, struct omap_device, pdev);
+
+ if (omap_hmwod_pad_wakeup_status(od->hwmods[0]) == true)
+ serial_omap_port_enable(up);
+
+ if (up->wk_st && (__raw_readl(up->wk_st) & up->wk_mask))
+ serial_omap_port_enable(up);
+}
+
static void serial_omap_stop_rxdma(struct uart_omap_port *up)
{
if (up->uart_dma.rx_dma_used) {
@@ -105,6 +184,7 @@ static void serial_omap_enable_ms(struct uart_port *port)
{
struct uart_omap_port *up = (struct uart_omap_port *)port;
+ serial_omap_port_enable(up);
dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->pdev->id);
up->ier |= UART_IER_MSI;
serial_out(up, UART_IER, up->ier);
@@ -114,6 +194,7 @@ static void serial_omap_stop_tx(struct uart_port *port)
{
struct uart_omap_port *up = (struct uart_omap_port *)port;
+ serial_omap_port_enable(up);
if (up->use_dma &&
up->uart_dma.tx_dma_channel != OMAP_UART_DMA_CH_FREE) {
/*
@@ -137,6 +218,7 @@ static void serial_omap_stop_rx(struct uart_port *port)
{
struct uart_omap_port *up = (struct uart_omap_port *)port;
+ serial_omap_port_enable(up);
if (up->use_dma)
serial_omap_stop_rxdma(up);
up->ier &= ~UART_IER_RLSI;
@@ -258,6 +340,7 @@ static void serial_omap_start_tx(struct uart_port *port)
unsigned int start;
int ret = 0;
+ serial_omap_port_enable(up);
if (!up->use_dma) {
serial_omap_enable_ier_thri(up);
return;
@@ -351,6 +434,7 @@ static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
unsigned int iir, lsr;
unsigned long flags;
+ serial_omap_port_enable(up);
iir = serial_in(up, UART_IIR);
if (iir & UART_IIR_NO_INT)
return IRQ_NONE;
@@ -385,6 +469,7 @@ static unsigned int serial_omap_tx_empty(struct uart_port *port)
unsigned long flags = 0;
unsigned int ret = 0;
+ serial_omap_port_enable(up);
dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->pdev->id);
spin_lock_irqsave(&up->port.lock, flags);
ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
@@ -399,6 +484,7 @@ static unsigned int serial_omap_get_mctrl(struct uart_port *port)
unsigned char status;
unsigned int ret = 0;
+ serial_omap_port_enable(up);
status = check_modem_status(up);
dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->pdev->id);
@@ -419,6 +505,7 @@ static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
unsigned char mcr = 0;
dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->pdev->id);
+ serial_omap_port_enable(up);
if (mctrl & TIOCM_RTS)
mcr |= UART_MCR_RTS;
if (mctrl & TIOCM_DTR)
@@ -440,6 +527,7 @@ static void serial_omap_break_ctl(struct uart_port *port, int break_state)
unsigned long flags = 0;
dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->pdev->id);
+ serial_omap_port_enable(up);
spin_lock_irqsave(&up->port.lock, flags);
if (break_state == -1)
up->lcr |= UART_LCR_SBC;
@@ -465,6 +553,7 @@ static int serial_omap_startup(struct uart_port *port)
dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->pdev->id);
+ serial_omap_port_enable(up);
/*
* Clear the FIFO buffers and disable them.
* (they will be reenabled in set_termios())
@@ -530,6 +619,8 @@ static void serial_omap_shutdown(struct uart_port *port)
unsigned long flags = 0;
dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->pdev->id);
+
+ serial_omap_port_enable(up);
/*
* Disable interrupts from this port
*/
@@ -668,6 +759,10 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);
quot = serial_omap_get_divisor(port, baud);
+ up->dll = quot & 0xff;
+ up->dlh = quot >> 8;
+ up->mdr1 = UART_OMAP_MDR1_DISABLE;
+
up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
UART_FCR_ENABLE_FIFO;
if (up->use_dma)
@@ -677,6 +772,7 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
* Ok, we're now changing the port state. Do it with
* interrupts disabled.
*/
+ serial_omap_port_enable(up);
spin_lock_irqsave(&up->port.lock, flags);
/*
@@ -755,8 +851,11 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
serial_out(up, UART_MCR, up->mcr);
/* Protocol, Baud Rate, and Interrupt Settings */
+ if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
+ omap_uart_mdr1_errataset(up);
+ else
+ serial_out(up, UART_OMAP_MDR1, up->mdr1);
- serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
up->efr = serial_in(up, UART_EFR);
@@ -766,8 +865,8 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
serial_out(up, UART_IER, 0);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
- serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
- serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
+ serial_out(up, UART_DLL, up->dll); /* LS of divisor */
+ serial_out(up, UART_DLM, up->dlh); /* MS of divisor */
serial_out(up, UART_LCR, 0);
serial_out(up, UART_IER, up->ier);
@@ -777,9 +876,14 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
serial_out(up, UART_LCR, cval);
if (baud > 230400 && baud != 3000000)
- serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_13X_MODE);
+ up->mdr1 = UART_OMAP_MDR1_13X_MODE;
+ else
+ up->mdr1 = UART_OMAP_MDR1_16X_MODE;
+
+ if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
+ omap_uart_mdr1_errataset(up);
else
- serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE);
+ serial_out(up, UART_OMAP_MDR1, up->mdr1);
/* Hardware Flow Control Configuration */
@@ -818,6 +922,8 @@ serial_omap_pm(struct uart_port *port, unsigned int state,
unsigned char efr;
dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id);
+
+ serial_omap_port_enable(up);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
efr = serial_in(up, UART_EFR);
serial_out(up, UART_EFR, efr | UART_EFR_ECB);
@@ -827,6 +933,8 @@ serial_omap_pm(struct uart_port *port, unsigned int state,
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
serial_out(up, UART_EFR, efr);
serial_out(up, UART_LCR, 0);
+ if (state)
+ serial_omap_port_disable(up);
}
static void serial_omap_release_port(struct uart_port *port)
@@ -904,6 +1012,8 @@ static inline void wait_for_xmitr(struct uart_omap_port *up)
static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
{
struct uart_omap_port *up = (struct uart_omap_port *)port;
+
+ serial_omap_port_enable(up);
wait_for_xmitr(up);
serial_out(up, UART_TX, ch);
}
@@ -911,8 +1021,10 @@ static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
static int serial_omap_poll_get_char(struct uart_port *port)
{
struct uart_omap_port *up = (struct uart_omap_port *)port;
- unsigned int status = serial_in(up, UART_LSR);
+ unsigned int status;
+ serial_omap_port_enable(up);
+ status = serial_in(up, UART_LSR);
if (!(status & UART_LSR_DR))
return NO_POLL_CHAR;
@@ -922,7 +1034,6 @@ static int serial_omap_poll_get_char(struct uart_port *port)
#endif /* CONFIG_CONSOLE_POLL */
#ifdef CONFIG_SERIAL_OMAP_CONSOLE
-
static struct uart_omap_port *serial_omap_console_ports[4];
static struct uart_driver serial_omap_reg;
@@ -931,6 +1042,7 @@ static void serial_omap_console_putchar(struct uart_port *port, int ch)
{
struct uart_omap_port *up = (struct uart_omap_port *)port;
+ serial_omap_port_enable(up);
wait_for_xmitr(up);
serial_out(up, UART_TX, ch);
}
@@ -944,6 +1056,7 @@ serial_omap_console_write(struct console *co, const char *s,
unsigned int ier;
int locked = 1;
+ serial_omap_port_enable(up);
local_irq_save(flags);
if (up->port.sysrq)
locked = 0;
@@ -1058,22 +1171,25 @@ static struct uart_driver serial_omap_reg = {
.cons = OMAP_CONSOLE,
};
-static int
-serial_omap_suspend(struct platform_device *pdev, pm_message_t state)
+static int serial_omap_suspend(struct device *dev)
{
- struct uart_omap_port *up = platform_get_drvdata(pdev);
+ struct uart_omap_port *up = dev_get_drvdata(dev);
- if (up)
+ if (up) {
uart_suspend_port(&serial_omap_reg, &up->port);
+ serial_omap_port_disable(up);
+ }
+
return 0;
}
-static int serial_omap_resume(struct platform_device *dev)
+static int serial_omap_resume(struct device *dev)
{
- struct uart_omap_port *up = platform_get_drvdata(dev);
+ struct uart_omap_port *up = dev_get_drvdata(dev);
if (up)
uart_resume_port(&serial_omap_reg, &up->port);
+
return 0;
}
@@ -1221,9 +1337,10 @@ static void uart_tx_dma_callback(int lch, u16 ch_status, void *data)
static int serial_omap_probe(struct platform_device *pdev)
{
- struct uart_omap_port *up;
+ struct uart_omap_port *up = NULL;
struct resource *mem, *irq, *dma_tx, *dma_rx;
struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data;
+ struct omap_device *od;
int ret = -ENOSPC;
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1273,12 +1390,23 @@ static int serial_omap_probe(struct platform_device *pdev)
up->port.ops = &serial_omap_pops;
up->port.line = pdev->id;
- up->port.membase = omap_up_info->membase;
- up->port.mapbase = omap_up_info->mapbase;
+ up->port.mapbase = mem->start;
+ up->port.membase = ioremap(mem->start, mem->end - mem->start);
+
+ if (!up->port.membase) {
+ dev_err(&pdev->dev, "can't ioremap UART\n");
+ ret = -ENOMEM;
+ goto err1;
+ }
+
up->port.flags = omap_up_info->flags;
- up->port.irqflags = omap_up_info->irqflags;
up->port.uartclk = omap_up_info->uartclk;
up->uart_dma.uart_base = mem->start;
+ up->errata = omap_up_info->errata;
+
+ up->wk_st = omap_up_info->wk_st;
+ up->wk_en = omap_up_info->wk_en;
+ up->wk_mask = omap_up_info->wk_mask;
if (omap_up_info->dma_enabled) {
up->uart_dma.uart_dma_tx = dma_tx->start;
@@ -1291,19 +1419,35 @@ static int serial_omap_probe(struct platform_device *pdev)
up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
}
+ init_timer(&(up->inactivity_timer));
+ up->inactivity_timer.function = serial_omap_inactivity_timer;
+ up->inactivity_timer.data = up->pdev->id;
+
+ pm_runtime_enable(&pdev->dev);
+ pm_runtime_irq_safe(&pdev->dev);
+
+ if (omap_up_info->console_uart) {
+ od = container_of(pdev, struct omap_device, pdev);
+ omap_hwmod_idle(od->hwmods[0]);
+ serial_omap_port_enable(up);
+ }
ui[pdev->id] = up;
serial_omap_add_console_port(up);
ret = uart_add_one_port(&serial_omap_reg, &up->port);
if (ret != 0)
- goto do_release_region;
+ goto err1;
+ dev_set_drvdata(&pdev->dev, up);
platform_set_drvdata(pdev, up);
+
return 0;
err:
dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n",
pdev->id, __func__, ret);
+err1:
+ kfree(up);
do_release_region:
release_mem_region(mem->start, (mem->end - mem->start) + 1);
return ret;
@@ -1315,20 +1459,138 @@ static int serial_omap_remove(struct platform_device *dev)
platform_set_drvdata(dev, NULL);
if (up) {
+ pm_runtime_disable(&up->pdev->dev);
uart_remove_one_port(&serial_omap_reg, &up->port);
kfree(up);
}
return 0;
}
+/*
+ * Work Around for Errata i202 (3430 - 1.12, 3630 - 1.6)
+ * The access to uart register after MDR1 Access
+ * causes UART to corrupt data.
+ *
+ * Need a delay =
+ * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
+ * give 10 times as much
+ */
+static void omap_uart_mdr1_errataset(struct uart_omap_port *up)
+{
+ u8 timeout = 255;
+
+ serial_out(up, UART_OMAP_MDR1, up->mdr1);
+ udelay(2);
+ serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT |
+ UART_FCR_CLEAR_RCVR);
+ /*
+ * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
+ * TX_FIFO_E bit is 1.
+ */
+ while (UART_LSR_THRE != (serial_in(up, UART_LSR) &
+ (UART_LSR_THRE | UART_LSR_DR))) {
+ timeout--;
+ if (!timeout) {
+ /* Should *never* happen. we warn and carry on */
+ dev_crit(&up->pdev->dev, "Errata i202: timedout %x\n",
+ serial_in(up, UART_LSR));
+ break;
+ }
+ udelay(1);
+ }
+}
+
+static void omap_uart_restore_context(struct uart_omap_port *up)
+{
+ u16 efr = 0;
+
+ if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
+ omap_uart_mdr1_errataset(up);
+ else
+ serial_out(up, UART_OMAP_MDR1, up->mdr1);
+ serial_out(up, UART_LCR, 0xBF); /* Config B mode */
+ efr = serial_in(up, UART_EFR);
+ serial_out(up, UART_EFR, UART_EFR_ECB);
+ serial_out(up, UART_LCR, 0x0); /* Operational mode */
+ serial_out(up, UART_IER, 0x0);
+ serial_out(up, UART_LCR, 0xBF); /* Config B mode */
+ serial_out(up, UART_DLL, up->dll);
+ serial_out(up, UART_DLM, up->dlh);
+ serial_out(up, UART_LCR, 0x0); /* Operational mode */
+ serial_out(up, UART_IER, up->ier);
+ serial_out(up, UART_FCR, up->fcr);
+ serial_out(up, UART_LCR, 0x80);
+ serial_out(up, UART_MCR, up->mcr);
+ serial_out(up, UART_LCR, 0xBF); /* Config B mode */
+ serial_out(up, UART_EFR, efr);
+ serial_out(up, UART_LCR, UART_LCR_WLEN8);
+ if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
+ omap_uart_mdr1_errataset(up);
+ else
+ /* UART 16x mode */
+ serial_out(up, UART_OMAP_MDR1, up->mdr1);
+}
+
+static void omap_uart_enable_wakeup(struct uart_omap_port *up)
+{
+ /* Set wake-enable bit */
+ if (up->wk_en && up->wk_mask) {
+ u32 v = __raw_readl(up->wk_en);
+ v |= up->wk_mask;
+ __raw_writel(v, up->wk_en);
+ }
+}
+
+static void omap_uart_disable_wakeup(struct uart_omap_port *up)
+{
+ /* Clear wake-enable bit */
+ if (up->wk_en && up->wk_mask) {
+ u32 v = __raw_readl(up->wk_en);
+ v &= ~up->wk_mask;
+ __raw_writel(v, up->wk_en);
+ }
+}
+
+static int omap_serial_runtime_suspend(struct device *dev)
+{
+ struct uart_omap_port *up = dev_get_drvdata(dev);
+
+ if (!up)
+ goto done;
+
+ if (device_may_wakeup(&up->pdev->dev))
+ omap_uart_enable_wakeup(up);
+ else
+ omap_uart_disable_wakeup(up);
+done:
+ return 0;
+}
+
+static int omap_serial_runtime_resume(struct device *dev)
+{
+ struct uart_omap_port *up = dev_get_drvdata(dev);
+
+ if (!up)
+ goto done;
+
+ omap_uart_restore_context(up);
+done:
+ return 0;
+}
+
+static const struct dev_pm_ops omap_serial_dev_pm_ops = {
+ .suspend = serial_omap_suspend,
+ .resume = serial_omap_resume,
+ .runtime_suspend = omap_serial_runtime_suspend,
+ .runtime_resume = omap_serial_runtime_resume,
+};
+
static struct platform_driver serial_omap_driver = {
.probe = serial_omap_probe,
.remove = serial_omap_remove,
-
- .suspend = serial_omap_suspend,
- .resume = serial_omap_resume,
.driver = {
.name = DRIVER_NAME,
+ .pm = &omap_serial_dev_pm_ops,
},
};
--
1.7.1
^ permalink raw reply related
* [PATCH 4/7] OMAP2+: UART: Remove uart clock handling code serial.c
From: Govindraj.R @ 2011-02-28 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298903958-6496-1-git-send-email-govindraj.raja@ti.com>
Cleanup serial.c file in preparation to addition of runtime api's in omap-serial
file. Cleanup serial.c file and remove all clock handling mechanism as
this will be taken care with pm runtime apis in omap-serial.c file itself.
1.) remove omap-device enable and disable. We can can use get_sync/put_sync api's
2.) remove context save/restore can be done with runtime_resume callback for
get_sync call. No need to save context as all reg details available in
uart_port structure can be used for restore, so add missing regs in
uart port struct.
3.) Add api to identify console uart.
4.) Erratum handling informed as flag to driver and func to handle erratum
can be moved to omap-serial driver itself.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
---
arch/arm/mach-omap2/serial.c | 749 ++-----------------------
arch/arm/plat-omap/include/plat/omap-serial.h | 21 +-
2 files changed, 75 insertions(+), 695 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 47eef48..755f4aa 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -19,25 +19,18 @@
*/
#include <linux/kernel.h>
#include <linux/init.h>
-#include <linux/serial_reg.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
-#include <linux/serial_8250.h>
#include <linux/pm_runtime.h>
-#include <linux/console.h>
-#ifdef CONFIG_SERIAL_OMAP
#include <plat/omap-serial.h>
-#endif
-
#include <plat/common.h>
#include <plat/board.h>
#include <plat/clock.h>
#include <plat/dma.h>
-#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
#include "prm2xxx_3xxx.h"
@@ -47,65 +40,9 @@
#include "control.h"
#include "mux.h"
-#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52
-#define UART_OMAP_WER 0x17 /* Wake-up enable register */
-
-#define UART_ERRATA_FIFO_FULL_ABORT (0x1 << 0)
-#define UART_ERRATA_i202_MDR1_ACCESS (0x1 << 1)
-
-/*
- * NOTE: By default the serial timeout is disabled as it causes lost characters
- * over the serial ports. This means that the UART clocks will stay on until
- * disabled via sysfs. This also causes that any deeper omap sleep states are
- * blocked.
- */
-#define DEFAULT_TIMEOUT 0
-
-#define MAX_UART_HWMOD_NAME_LEN 16
-
-struct omap_uart_state {
- int num;
- int can_sleep;
- struct timer_list timer;
- u32 timeout;
-
- void __iomem *wk_st;
- void __iomem *wk_en;
- u32 wk_mask;
- u32 padconf;
- u32 dma_enabled;
-
- struct clk *ick;
- struct clk *fck;
- int clocked;
-
- int irq;
- int regshift;
- int irqflags;
- void __iomem *membase;
- resource_size_t mapbase;
-
- struct list_head node;
- struct omap_hwmod *oh;
- struct platform_device *pdev;
-
- u32 errata;
-#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
- int context_valid;
+#define MAX_UART_HWMOD_NAME_LEN 16
- /* Registers to be saved/restored for OFF-mode */
- u16 dll;
- u16 dlh;
- u16 ier;
- u16 sysc;
- u16 scr;
- u16 wer;
- u16 mcr;
-#endif
-};
-
-static LIST_HEAD(uart_list);
-static u8 num_uarts;
+static int omap_uart_con_id __initdata = -1;
static int uart_idle_hwmod(struct omap_device *od)
{
@@ -129,396 +66,35 @@ static struct omap_device_pm_latency omap_uart_latency[] = {
},
};
-static inline unsigned int __serial_read_reg(struct uart_port *up,
- int offset)
-{
- offset <<= up->regshift;
- return (unsigned int)__raw_readb(up->membase + offset);
-}
-
-static inline unsigned int serial_read_reg(struct omap_uart_state *uart,
- int offset)
-{
- offset <<= uart->regshift;
- return (unsigned int)__raw_readb(uart->membase + offset);
-}
-
-static inline void __serial_write_reg(struct uart_port *up, int offset,
- int value)
-{
- offset <<= up->regshift;
- __raw_writeb(value, up->membase + offset);
-}
-
-static inline void serial_write_reg(struct omap_uart_state *uart, int offset,
- int value)
-{
- offset <<= uart->regshift;
- __raw_writeb(value, uart->membase + offset);
-}
-
-/*
- * Internal UARTs need to be initialized for the 8250 autoconfig to work
- * properly. Note that the TX watermark initialization may not be needed
- * once the 8250.c watermark handling code is merged.
- */
-
-static inline void __init omap_uart_reset(struct omap_uart_state *uart)
-{
- serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
- serial_write_reg(uart, UART_OMAP_SCR, 0x08);
- serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE);
-}
-
-#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
-
-/*
- * Work Around for Errata i202 (3430 - 1.12, 3630 - 1.6)
- * The access to uart register after MDR1 Access
- * causes UART to corrupt data.
- *
- * Need a delay =
- * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
- * give 10 times as much
- */
-static void omap_uart_mdr1_errataset(struct omap_uart_state *uart, u8 mdr1_val,
- u8 fcr_val)
-{
- u8 timeout = 255;
-
- serial_write_reg(uart, UART_OMAP_MDR1, mdr1_val);
- udelay(2);
- serial_write_reg(uart, UART_FCR, fcr_val | UART_FCR_CLEAR_XMIT |
- UART_FCR_CLEAR_RCVR);
- /*
- * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
- * TX_FIFO_E bit is 1.
- */
- while (UART_LSR_THRE != (serial_read_reg(uart, UART_LSR) &
- (UART_LSR_THRE | UART_LSR_DR))) {
- timeout--;
- if (!timeout) {
- /* Should *never* happen. we warn and carry on */
- dev_crit(&uart->pdev->dev, "Errata i202: timedout %x\n",
- serial_read_reg(uart, UART_LSR));
- break;
- }
- udelay(1);
- }
-}
-
-static void omap_uart_save_context(struct omap_uart_state *uart)
-{
- u16 lcr = 0;
-
- if (!enable_off_mode)
- return;
-
- lcr = serial_read_reg(uart, UART_LCR);
- serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
- uart->dll = serial_read_reg(uart, UART_DLL);
- uart->dlh = serial_read_reg(uart, UART_DLM);
- serial_write_reg(uart, UART_LCR, lcr);
- uart->ier = serial_read_reg(uart, UART_IER);
- uart->sysc = serial_read_reg(uart, UART_OMAP_SYSC);
- uart->scr = serial_read_reg(uart, UART_OMAP_SCR);
- uart->wer = serial_read_reg(uart, UART_OMAP_WER);
- serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_A);
- uart->mcr = serial_read_reg(uart, UART_MCR);
- serial_write_reg(uart, UART_LCR, lcr);
-
- uart->context_valid = 1;
-}
-
-static void omap_uart_restore_context(struct omap_uart_state *uart)
-{
- u16 efr = 0;
-
- if (!enable_off_mode)
- return;
-
- if (!uart->context_valid)
- return;
-
- uart->context_valid = 0;
-
- if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS)
- omap_uart_mdr1_errataset(uart, UART_OMAP_MDR1_DISABLE, 0xA0);
- else
- serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
-
- serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
- efr = serial_read_reg(uart, UART_EFR);
- serial_write_reg(uart, UART_EFR, UART_EFR_ECB);
- serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */
- serial_write_reg(uart, UART_IER, 0x0);
- serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
- serial_write_reg(uart, UART_DLL, uart->dll);
- serial_write_reg(uart, UART_DLM, uart->dlh);
- serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */
- serial_write_reg(uart, UART_IER, uart->ier);
- serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_A);
- serial_write_reg(uart, UART_MCR, uart->mcr);
- serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
- serial_write_reg(uart, UART_EFR, efr);
- serial_write_reg(uart, UART_LCR, UART_LCR_WLEN8);
- serial_write_reg(uart, UART_OMAP_SCR, uart->scr);
- serial_write_reg(uart, UART_OMAP_WER, uart->wer);
- serial_write_reg(uart, UART_OMAP_SYSC, uart->sysc);
-
- if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS)
- omap_uart_mdr1_errataset(uart, UART_OMAP_MDR1_16X_MODE, 0xA1);
- else
- /* UART 16x mode */
- serial_write_reg(uart, UART_OMAP_MDR1,
- UART_OMAP_MDR1_16X_MODE);
-}
-#else
-static inline void omap_uart_save_context(struct omap_uart_state *uart) {}
-static inline void omap_uart_restore_context(struct omap_uart_state *uart) {}
-#endif /* CONFIG_PM && CONFIG_ARCH_OMAP3 */
-
-static inline void omap_uart_enable_clocks(struct omap_uart_state *uart)
-{
- if (uart->clocked)
- return;
-
- omap_device_enable(uart->pdev);
- uart->clocked = 1;
- omap_uart_restore_context(uart);
-}
-
-#ifdef CONFIG_PM
-
-static inline void omap_uart_disable_clocks(struct omap_uart_state *uart)
-{
- if (!uart->clocked)
- return;
-
- omap_uart_save_context(uart);
- uart->clocked = 0;
- omap_device_idle(uart->pdev);
-}
-
-static void omap_uart_enable_wakeup(struct omap_uart_state *uart)
-{
- /* Set wake-enable bit */
- if (uart->wk_en && uart->wk_mask) {
- u32 v = __raw_readl(uart->wk_en);
- v |= uart->wk_mask;
- __raw_writel(v, uart->wk_en);
- }
-
- /* Ensure IOPAD wake-enables are set */
- if (cpu_is_omap34xx() && uart->padconf) {
- u16 v = omap_ctrl_readw(uart->padconf);
- v |= OMAP3_PADCONF_WAKEUPENABLE0;
- omap_ctrl_writew(v, uart->padconf);
- }
-}
-
-static void omap_uart_disable_wakeup(struct omap_uart_state *uart)
-{
- /* Clear wake-enable bit */
- if (uart->wk_en && uart->wk_mask) {
- u32 v = __raw_readl(uart->wk_en);
- v &= ~uart->wk_mask;
- __raw_writel(v, uart->wk_en);
- }
-
- /* Ensure IOPAD wake-enables are cleared */
- if (cpu_is_omap34xx() && uart->padconf) {
- u16 v = omap_ctrl_readw(uart->padconf);
- v &= ~OMAP3_PADCONF_WAKEUPENABLE0;
- omap_ctrl_writew(v, uart->padconf);
- }
-}
-
-static void omap_uart_smart_idle_enable(struct omap_uart_state *uart,
- int enable)
-{
- u8 idlemode;
-
- if (enable) {
- /**
- * Errata 2.15: [UART]:Cannot Acknowledge Idle Requests
- * in Smartidle Mode When Configured for DMA Operations.
- */
- if (uart->dma_enabled)
- idlemode = HWMOD_IDLEMODE_FORCE;
- else
- idlemode = HWMOD_IDLEMODE_SMART;
- } else {
- idlemode = HWMOD_IDLEMODE_NO;
- }
-
- omap_hwmod_set_slave_idlemode(uart->oh, idlemode);
-}
-
-static void omap_uart_block_sleep(struct omap_uart_state *uart)
-{
- omap_uart_enable_clocks(uart);
-
- omap_uart_smart_idle_enable(uart, 0);
- uart->can_sleep = 0;
- if (uart->timeout)
- mod_timer(&uart->timer, jiffies + uart->timeout);
- else
- del_timer(&uart->timer);
-}
-
-static void omap_uart_allow_sleep(struct omap_uart_state *uart)
-{
- if (device_may_wakeup(&uart->pdev->dev))
- omap_uart_enable_wakeup(uart);
- else
- omap_uart_disable_wakeup(uart);
-
- if (!uart->clocked)
- return;
-
- omap_uart_smart_idle_enable(uart, 1);
- uart->can_sleep = 1;
- del_timer(&uart->timer);
-}
-
-static void omap_uart_idle_timer(unsigned long data)
+static void omap_uart_idle_init(struct omap_uart_port_info *uart,
+ unsigned short num)
{
- struct omap_uart_state *uart = (struct omap_uart_state *)data;
-
- omap_uart_allow_sleep(uart);
-}
-
-void omap_uart_prepare_idle(int num)
-{
- struct omap_uart_state *uart;
-
- list_for_each_entry(uart, &uart_list, node) {
- if (num == uart->num && uart->can_sleep) {
- omap_uart_disable_clocks(uart);
- return;
- }
- }
-}
-
-void omap_uart_resume_idle(int num)
-{
- struct omap_uart_state *uart;
-
- list_for_each_entry(uart, &uart_list, node) {
- if (num == uart->num && uart->can_sleep) {
- omap_uart_enable_clocks(uart);
-
- /* Check for IO pad wakeup */
- if (cpu_is_omap34xx() && uart->padconf) {
- u16 p = omap_ctrl_readw(uart->padconf);
-
- if (p & OMAP3_PADCONF_WAKEUPEVENT0)
- omap_uart_block_sleep(uart);
- }
-
- /* Check for normal UART wakeup */
- if (__raw_readl(uart->wk_st) & uart->wk_mask)
- omap_uart_block_sleep(uart);
- return;
- }
- }
-}
-
-void omap_uart_prepare_suspend(void)
-{
- struct omap_uart_state *uart;
-
- list_for_each_entry(uart, &uart_list, node) {
- omap_uart_allow_sleep(uart);
- }
-}
-
-int omap_uart_can_sleep(void)
-{
- struct omap_uart_state *uart;
- int can_sleep = 1;
-
- list_for_each_entry(uart, &uart_list, node) {
- if (!uart->clocked)
- continue;
-
- if (!uart->can_sleep) {
- can_sleep = 0;
- continue;
- }
-
- /* This UART can now safely sleep. */
- omap_uart_allow_sleep(uart);
- }
-
- return can_sleep;
-}
-
-/**
- * omap_uart_interrupt()
- *
- * This handler is used only to detect that *any* UART interrupt has
- * occurred. It does _nothing_ to handle the interrupt. Rather,
- * any UART interrupt will trigger the inactivity timer so the
- * UART will not idle or sleep for its timeout period.
- *
- **/
-/* static int first_interrupt; */
-static irqreturn_t omap_uart_interrupt(int irq, void *dev_id)
-{
- struct omap_uart_state *uart = dev_id;
-
- omap_uart_block_sleep(uart);
-
- return IRQ_NONE;
-}
-
-static void omap_uart_idle_init(struct omap_uart_state *uart)
-{
- int ret;
-
- uart->can_sleep = 0;
- uart->timeout = DEFAULT_TIMEOUT;
- setup_timer(&uart->timer, omap_uart_idle_timer,
- (unsigned long) uart);
- if (uart->timeout)
- mod_timer(&uart->timer, jiffies + uart->timeout);
- omap_uart_smart_idle_enable(uart, 0);
-
- if (cpu_is_omap34xx() && !cpu_is_ti816x()) {
- u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
+ if (cpu_is_omap34xx()) {
+ u32 mod = num > 1 ? OMAP3430_PER_MOD : CORE_MOD;
u32 wk_mask = 0;
- u32 padconf = 0;
- /* XXX These PRM accesses do not belong here */
uart->wk_en = OMAP34XX_PRM_REGADDR(mod, PM_WKEN1);
uart->wk_st = OMAP34XX_PRM_REGADDR(mod, PM_WKST1);
- switch (uart->num) {
+ switch (num) {
case 0:
wk_mask = OMAP3430_ST_UART1_MASK;
- padconf = 0x182;
break;
case 1:
wk_mask = OMAP3430_ST_UART2_MASK;
- padconf = 0x17a;
break;
case 2:
wk_mask = OMAP3430_ST_UART3_MASK;
- padconf = 0x19e;
break;
case 3:
wk_mask = OMAP3630_ST_UART4_MASK;
- padconf = 0x0d2;
break;
}
uart->wk_mask = wk_mask;
- uart->padconf = padconf;
} else if (cpu_is_omap24xx()) {
u32 wk_mask = 0;
u32 wk_en = PM_WKEN1, wk_st = PM_WKST1;
- switch (uart->num) {
+ switch (num) {
case 0:
wk_mask = OMAP24XX_ST_UART1_MASK;
break;
@@ -543,155 +119,44 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
uart->wk_en = NULL;
uart->wk_st = NULL;
uart->wk_mask = 0;
- uart->padconf = 0;
- }
-
- uart->irqflags |= IRQF_SHARED;
- ret = request_threaded_irq(uart->irq, NULL, omap_uart_interrupt,
- IRQF_SHARED, "serial idle", (void *)uart);
- WARN_ON(ret);
-}
-
-void omap_uart_enable_irqs(int enable)
-{
- int ret;
- struct omap_uart_state *uart;
-
- list_for_each_entry(uart, &uart_list, node) {
- if (enable) {
- pm_runtime_put_sync(&uart->pdev->dev);
- ret = request_threaded_irq(uart->irq, NULL,
- omap_uart_interrupt,
- IRQF_SHARED,
- "serial idle",
- (void *)uart);
- } else {
- pm_runtime_get_noresume(&uart->pdev->dev);
- free_irq(uart->irq, (void *)uart);
- }
}
}
-static ssize_t sleep_timeout_show(struct device *dev,
- struct device_attribute *attr,
- char *buf)
+char *cmdline_find_option(char *str)
{
- struct platform_device *pdev = to_platform_device(dev);
- struct omap_device *odev = to_omap_device(pdev);
- struct omap_uart_state *uart = odev->hwmods[0]->dev_attr;
+ extern char *saved_command_line;
- return sprintf(buf, "%u\n", uart->timeout / HZ);
+ return strstr(saved_command_line, str);
}
-static ssize_t sleep_timeout_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t n)
+struct omap_hwmod *omap_uart_hwmod_lookup(int num)
{
- struct platform_device *pdev = to_platform_device(dev);
- struct omap_device *odev = to_omap_device(pdev);
- struct omap_uart_state *uart = odev->hwmods[0]->dev_attr;
- unsigned int value;
-
- if (sscanf(buf, "%u", &value) != 1) {
- dev_err(dev, "sleep_timeout_store: Invalid value\n");
- return -EINVAL;
- }
-
- uart->timeout = value * HZ;
- if (uart->timeout)
- mod_timer(&uart->timer, jiffies + uart->timeout);
- else
- /* A zero value means disable timeout feature */
- omap_uart_block_sleep(uart);
-
- return n;
-}
-
-static DEVICE_ATTR(sleep_timeout, 0644, sleep_timeout_show,
- sleep_timeout_store);
-#define DEV_CREATE_FILE(dev, attr) WARN_ON(device_create_file(dev, attr))
-#else
-static inline void omap_uart_idle_init(struct omap_uart_state *uart) {}
-static void omap_uart_block_sleep(struct omap_uart_state *uart)
-{
- /* Needed to enable UART clocks when built without CONFIG_PM */
- omap_uart_enable_clocks(uart);
-}
-#define DEV_CREATE_FILE(dev, attr)
-#endif /* CONFIG_PM */
-
-#ifndef CONFIG_SERIAL_OMAP
-/*
- * Override the default 8250 read handler: mem_serial_in()
- * Empty RX fifo read causes an abort on omap3630 and omap4
- * This function makes sure that an empty rx fifo is not read on these silicons
- * (OMAP1/2/3430 are not affected)
- */
-static unsigned int serial_in_override(struct uart_port *up, int offset)
-{
- if (UART_RX == offset) {
- unsigned int lsr;
- lsr = __serial_read_reg(up, UART_LSR);
- if (!(lsr & UART_LSR_DR))
- return -EPERM;
- }
-
- return __serial_read_reg(up, offset);
-}
-
-static void serial_out_override(struct uart_port *up, int offset, int value)
-{
- unsigned int status, tmout = 10000;
+ struct omap_hwmod *oh;
+ char oh_name[MAX_UART_HWMOD_NAME_LEN];
- status = __serial_read_reg(up, UART_LSR);
- while (!(status & UART_LSR_THRE)) {
- /* Wait up to 10ms for the character(s) to be sent. */
- if (--tmout == 0)
- break;
- udelay(1);
- status = __serial_read_reg(up, UART_LSR);
- }
- __serial_write_reg(up, offset, value);
+ snprintf(oh_name, MAX_UART_HWMOD_NAME_LEN, "uart%d", num + 1);
+ oh = omap_hwmod_lookup(oh_name);
+ WARN(IS_ERR(oh), "Could not lookup hmwod info for %s\n",
+ oh_name);
+ return oh;
}
-#endif
static int __init omap_serial_early_init(void)
{
int i = 0;
+ char omap_tty_name[MAX_UART_HWMOD_NAME_LEN];
+ struct omap_hwmod *oh;
- do {
- char oh_name[MAX_UART_HWMOD_NAME_LEN];
- struct omap_hwmod *oh;
- struct omap_uart_state *uart;
-
- snprintf(oh_name, MAX_UART_HWMOD_NAME_LEN,
- "uart%d", i + 1);
- oh = omap_hwmod_lookup(oh_name);
- if (!oh)
- break;
-
- uart = kzalloc(sizeof(struct omap_uart_state), GFP_KERNEL);
- if (WARN_ON(!uart))
- return -ENODEV;
-
- uart->oh = oh;
- uart->num = i++;
- list_add_tail(&uart->node, &uart_list);
- num_uarts++;
-
- /*
- * NOTE: omap_hwmod_init() has not yet been called,
- * so no hwmod functions will work yet.
- */
-
- /*
- * During UART early init, device need to be probed
- * to determine SoC specific init before omap_device
- * is ready. Therefore, don't allow idle here
- */
- uart->oh->flags |= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET;
- } while (1);
-
+ for (i = 0; i < OMAP_MAX_HSUART_PORTS; i++) {
+ snprintf(omap_tty_name, MAX_UART_HWMOD_NAME_LEN,
+ "%s%d", OMAP_SERIAL_NAME, i);
+ if (cmdline_find_option(omap_tty_name)) {
+ omap_uart_con_id = i;
+ oh = omap_uart_hwmod_lookup(i);
+ oh->flags |= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET;
+ return 0;
+ }
+ }
return 0;
}
core_initcall(omap_serial_early_init);
@@ -709,149 +174,50 @@ core_initcall(omap_serial_early_init);
*/
void __init omap_serial_init_port(struct omap_board_data *bdata)
{
- struct omap_uart_state *uart;
struct omap_hwmod *oh;
struct omap_device *od;
- void *pdata = NULL;
- u32 pdata_size = 0;
- char *name;
-#ifndef CONFIG_SERIAL_OMAP
- struct plat_serial8250_port ports[2] = {
- {},
- {.flags = 0},
- };
- struct plat_serial8250_port *p = &ports[0];
-#else
- struct omap_uart_port_info omap_up;
-#endif
+ struct omap_uart_port_info *pdata;
+ char *name = DRIVER_NAME;
if (WARN_ON(!bdata))
return;
if (WARN_ON(bdata->id < 0))
return;
- if (WARN_ON(bdata->id >= num_uarts))
+ if (WARN_ON(bdata->id >= OMAP_MAX_HSUART_PORTS))
return;
- list_for_each_entry(uart, &uart_list, node)
- if (bdata->id == uart->num)
- break;
-
- oh = uart->oh;
- uart->dma_enabled = 0;
-#ifndef CONFIG_SERIAL_OMAP
- name = "serial8250";
-
- /*
- * !! 8250 driver does not use standard IORESOURCE* It
- * has it's own custom pdata that can be taken from
- * the hwmod resource data. But, this needs to be
- * done after the build.
- *
- * ?? does it have to be done before the register ??
- * YES, because platform_device_data_add() copies
- * pdata, it does not use a pointer.
- */
- p->flags = UPF_BOOT_AUTOCONF;
- p->iotype = UPIO_MEM;
- p->regshift = 2;
- p->uartclk = OMAP24XX_BASE_BAUD * 16;
- p->irq = oh->mpu_irqs[0].irq;
- p->mapbase = oh->slaves[0]->addr->pa_start;
- p->membase = omap_hwmod_get_mpu_rt_va(oh);
- p->irqflags = IRQF_SHARED;
- p->private_data = uart;
-
- /*
- * omap44xx, ti816x: Never read empty UART fifo
- * omap3xxx: Never read empty UART fifo on UARTs
- * with IP rev >=0x52
- */
- uart->regshift = p->regshift;
- uart->membase = p->membase;
- if (cpu_is_omap44xx() || cpu_is_ti816x())
- uart->errata |= UART_ERRATA_FIFO_FULL_ABORT;
- else if ((serial_read_reg(uart, UART_OMAP_MVER) & 0xFF)
- >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV)
- uart->errata |= UART_ERRATA_FIFO_FULL_ABORT;
+ oh = omap_uart_hwmod_lookup(bdata->id);
+ if (!oh)
+ return;
- if (uart->errata & UART_ERRATA_FIFO_FULL_ABORT) {
- p->serial_in = serial_in_override;
- p->serial_out = serial_out_override;
+ pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
+ if (!pdata) {
+ pr_err("Memory allocation for UART pdata failed\n");
+ return;
}
- pdata = &ports[0];
- pdata_size = 2 * sizeof(struct plat_serial8250_port);
-#else
-
- name = DRIVER_NAME;
+ /* Enable the MDR1 errata for OMAP3 */
+ if (cpu_is_omap34xx())
+ pdata->errata |= UART_ERRATA_i202_MDR1_ACCESS;
- omap_up.dma_enabled = uart->dma_enabled;
- omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
- omap_up.mapbase = oh->slaves[0]->addr->pa_start;
- omap_up.membase = omap_hwmod_get_mpu_rt_va(oh);
- omap_up.irqflags = IRQF_SHARED;
- omap_up.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
+ omap_uart_idle_init(pdata, bdata->id);
- pdata = &omap_up;
- pdata_size = sizeof(struct omap_uart_port_info);
-#endif
+ pdata->uartclk = OMAP24XX_BASE_BAUD * 16;
+ pdata->flags = UPF_BOOT_AUTOCONF;
+ if (bdata->id == omap_uart_con_id)
+ pdata->console_uart = true;
- if (WARN_ON(!oh))
- return;
-
- od = omap_device_build(name, uart->num, oh, pdata, pdata_size,
- omap_uart_latency,
- ARRAY_SIZE(omap_uart_latency), false);
+ od = omap_device_build(name, bdata->id, oh, pdata,
+ sizeof(*pdata), omap_uart_latency,
+ ARRAY_SIZE(omap_uart_latency), false);
WARN(IS_ERR(od), "Could not build omap_device for %s: %s.\n",
name, oh->name);
oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
-
- uart->irq = oh->mpu_irqs[0].irq;
- uart->regshift = 2;
- uart->mapbase = oh->slaves[0]->addr->pa_start;
- uart->membase = omap_hwmod_get_mpu_rt_va(oh);
- uart->pdev = &od->pdev;
-
- oh->dev_attr = uart;
-
- console_lock(); /* in case the earlycon is on the UART */
-
- /*
- * Because of early UART probing, UART did not get idled
- * on init. Now that omap_device is ready, ensure full idle
- * before doing omap_device_enable().
- */
- omap_hwmod_idle(uart->oh);
-
- omap_device_enable(uart->pdev);
- omap_uart_idle_init(uart);
- omap_uart_reset(uart);
- omap_hwmod_enable_wakeup(uart->oh);
- omap_device_idle(uart->pdev);
-
- /*
- * Need to block sleep long enough for interrupt driven
- * driver to start. Console driver is in polling mode
- * so device needs to be kept enabled while polling driver
- * is in use.
- */
- if (uart->timeout)
- uart->timeout = (30 * HZ);
- omap_uart_block_sleep(uart);
- uart->timeout = DEFAULT_TIMEOUT;
-
- console_unlock();
-
- if ((cpu_is_omap34xx() && uart->padconf) ||
- (uart->wk_en && uart->wk_mask)) {
+ if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads) ||
+ (pdata->wk_en && pdata->wk_mask)) {
device_init_wakeup(&od->pdev.dev, true);
- DEV_CREATE_FILE(&od->pdev.dev, &dev_attr_sleep_timeout);
}
-
- /* Enable the MDR1 errata for OMAP3 */
- if (cpu_is_omap34xx() && !cpu_is_ti816x())
- uart->errata |= UART_ERRATA_i202_MDR1_ACCESS;
}
/**
@@ -863,15 +229,14 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
*/
void __init omap_serial_init(void)
{
- struct omap_uart_state *uart;
struct omap_board_data bdata;
+ u8 i;
- list_for_each_entry(uart, &uart_list, node) {
- bdata.id = uart->num;
+ for (i = 0; i < OMAP_MAX_HSUART_PORTS; i++) {
+ bdata.id = i;
bdata.flags = 0;
bdata.pads = NULL;
bdata.pads_cnt = 0;
omap_serial_init_port(&bdata);
-
}
}
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
index 2682043..f9bc7ef 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -56,13 +56,18 @@
#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
+#define UART_ERRATA_i202_MDR1_ACCESS BIT(0)
+
struct omap_uart_port_info {
bool dma_enabled; /* To specify DMA Mode */
unsigned int uartclk; /* UART clock rate */
- void __iomem *membase; /* ioremap cookie or NULL */
- resource_size_t mapbase; /* resource base */
- unsigned long irqflags; /* request_irq flags */
upf_t flags; /* UPF_* flags */
+ unsigned int errata;
+ unsigned int console_uart;
+
+ void __iomem *wk_st;
+ void __iomem *wk_en;
+ u32 wk_mask;
};
struct uart_omap_dma {
@@ -100,6 +105,9 @@ struct uart_omap_port {
unsigned char mcr;
unsigned char fcr;
unsigned char efr;
+ unsigned char dll;
+ unsigned char dlh;
+ unsigned char mdr1;
int use_dma;
/*
@@ -111,6 +119,13 @@ struct uart_omap_port {
unsigned char msr_saved_flags;
char name[20];
unsigned long port_activity;
+ struct timer_list inactivity_timer;
+ unsigned int errata;
+ int can_sleep;
+
+ void __iomem *wk_st;
+ void __iomem *wk_en;
+ u32 wk_mask;
};
#endif /* __OMAP_SERIAL_H__ */
--
1.7.1
^ permalink raw reply related
* [PATCH 3/7] OMAP2+: UART: Remove certain uart calls from sram_idle
From: Govindraj.R @ 2011-02-28 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298903958-6496-1-git-send-email-govindraj.raja@ti.com>
In preparation to UART runtime conversion. Remove certain uart specific calls
from sram_idle path in pm24xx/34xx files.
These func calls will no more be used with upcoming uart runtime design.
1.) Removing console lock holding :- Now can be handled with omap-serial file
itself with appropraite console_enable/disable calls for clk_enable/disable
cases.
2.) omap_uart_can_sleep :- not needed driver can decide based on inactivity.
3.) omap_uart_prepare_suspend :- omap-serial can take care with driver
suspend/resume hooks.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
---
arch/arm/mach-omap2/pm24xx.c | 11 -----------
arch/arm/mach-omap2/pm34xx.c | 16 ----------------
arch/arm/plat-omap/include/plat/serial.h | 4 ----
3 files changed, 0 insertions(+), 31 deletions(-)
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 97feb3a..5af9881 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -132,11 +132,6 @@ static void omap2_enter_full_retention(void)
if (omap_irq_pending())
goto no_sleep;
- /* Block console output in case it is on one of the OMAP UARTs */
- if (!is_suspending())
- if (!console_trylock())
- goto no_sleep;
-
omap_uart_prepare_idle(0);
omap_uart_prepare_idle(1);
omap_uart_prepare_idle(2);
@@ -150,9 +145,6 @@ static void omap2_enter_full_retention(void)
omap_uart_resume_idle(1);
omap_uart_resume_idle(0);
- if (!is_suspending())
- console_unlock();
-
no_sleep:
if (omap2_pm_debug) {
unsigned long long tmp;
@@ -267,8 +259,6 @@ static int omap2_can_sleep(void)
{
if (omap2_fclks_active())
return 0;
- if (!omap_uart_can_sleep())
- return 0;
if (osc_ck->usecount > 1)
return 0;
if (omap_dma_running())
@@ -319,7 +309,6 @@ static int omap2_pm_suspend(void)
mir1 = omap_readl(0x480fe0a4);
omap_writel(1 << 5, 0x480fe0ac);
- omap_uart_prepare_suspend();
omap2_enter_full_retention();
omap_writel(mir1, 0x480fe0a4);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 2f864e4..850bb0a 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -395,13 +395,6 @@ void omap_sram_idle(void)
omap3_enable_io_chain();
}
- /* Block console output in case it is on one of the OMAP UARTs */
- if (!is_suspending())
- if (per_next_state < PWRDM_POWER_ON ||
- core_next_state < PWRDM_POWER_ON)
- if (!console_trylock())
- goto console_still_active;
-
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
@@ -481,10 +474,6 @@ void omap_sram_idle(void)
omap_uart_resume_idle(3);
}
- if (!is_suspending())
- console_unlock();
-
-console_still_active:
/* Disable IO-PAD and IO-CHAIN wakeup */
if (omap3_has_io_wakeup() &&
(per_next_state < PWRDM_POWER_ON ||
@@ -503,8 +492,6 @@ int omap3_can_sleep(void)
{
if (!sleep_while_idle)
return 0;
- if (!omap_uart_can_sleep())
- return 0;
return 1;
}
@@ -547,7 +534,6 @@ static int omap3_pm_suspend(void)
goto restore;
}
- omap_uart_prepare_suspend();
omap3_intc_suspend();
omap_sram_idle();
@@ -594,14 +580,12 @@ static int omap3_pm_begin(suspend_state_t state)
{
disable_hlt();
suspend_state = state;
- omap_uart_enable_irqs(0);
return 0;
}
static void omap3_pm_end(void)
{
suspend_state = PM_SUSPEND_ON;
- omap_uart_enable_irqs(1);
enable_hlt();
return;
}
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index 8061695..6339848 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -106,12 +106,8 @@ struct omap_board_data;
extern void omap_serial_init(void);
extern void omap_serial_init_port(struct omap_board_data *bdata);
-extern int omap_uart_can_sleep(void);
-extern void omap_uart_check_wakeup(void);
-extern void omap_uart_prepare_suspend(void);
extern void omap_uart_prepare_idle(int num);
extern void omap_uart_resume_idle(int num);
-extern void omap_uart_enable_irqs(int enable);
#endif
#endif
--
1.7.1
^ permalink raw reply related
* [PATCH 2/7] OMAP2+: mux: Enable wakeup for wakeup enable requested pads
From: Govindraj.R @ 2011-02-28 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298903958-6496-1-git-send-email-govindraj.raja@ti.com>
For device pads which have OMAP_DEVICE_PAD_WAKEUP set (which means they
are wakeup capable) enable the IO-daisy wakeup capability.
During re-muxing avoid direct write with val as this can disturb if any
mux done at bootloader level so read the pad then write back.
Also add a api to fetch the wake-up status bit is set for given omap-hwmod
device using available mux info which is added during omap_hwmod_mux_init.
Wakeup status bit is needed for uart_resume_idle call from sram_idle path
based on wake-up event has occurred for given uart we can enable clocks back.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
---
arch/arm/mach-omap2/mux.c | 23 +++++++++++++++++++++++
arch/arm/mach-omap2/mux.h | 13 +++++++++++++
arch/arm/mach-omap2/omap_hwmod.c | 13 +++++++++++++
arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 +
4 files changed, 50 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 98148b6..5338b93 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -317,6 +317,24 @@ err1:
return NULL;
}
+/* Gets the wakeup status of given pad from omap-hwmod */
+int omap_hwmod_mux_wakeup(struct omap_hwmod_mux_info *hmux)
+{
+ int i;
+ unsigned int val = -EINVAL;
+
+ for (i = 0; i < hmux->nr_pads; i++) {
+ struct omap_device_pad *pad = &hmux->pads[i];
+
+ val = omap_mux_read(pad->partition, pad->mux->reg_offset);
+ }
+
+ if (val > 0 && val & OMAP_WAKEUP_EVENT)
+ return 1;
+ else
+ return 0;
+}
+
/* Assumes the calling function takes care of locking */
void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state)
{
@@ -342,6 +360,9 @@ void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state)
break;
flags &= ~OMAP_DEVICE_PAD_ENABLED;
val = pad->idle;
+ if (flags & OMAP_DEVICE_PAD_WAKEUP)
+ val |= OMAP_WAKEUP_EN;
+
pr_debug("%s: Idling %s %x\n", __func__,
pad->name, val);
break;
@@ -358,6 +379,8 @@ void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state)
};
if (val >= 0) {
+ val |= omap_mux_read(pad->partition,
+ pad->mux->reg_offset);
omap_mux_write(pad->partition, val,
pad->mux->reg_offset);
pad->flags = flags;
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index a4ab17a..84a8fc2 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -220,8 +220,21 @@ omap_hwmod_mux_init(struct omap_device_pad *bpads, int nr_pads);
*/
void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state);
+
+/**
+ * omap_hwmod_mux_wakeup - omap hwmod check given pad had wakeup event
+ * @hmux: Pads for a hwmod
+ *
+ * Called only from omap_hwmod.c, do not use.
+ */
+int omap_hwmod_mux_wakeup(struct omap_hwmod_mux_info *hmux);
#else
+static inline int omap_hwmod_mux_wakeup(struct omap_hwmod_mux_info *hmux)
+{
+ return 0;
+}
+
static inline int omap_mux_init_gpio(int gpio, int val)
{
return 0;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 9e89a58..893dae1 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2239,3 +2239,16 @@ u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
return ret;
}
+
+/**
+ * omap_hwmod_pad_wakeup_status - get pad wakeup status if mux is available.
+ * @oh: struct omap_hwmod *
+ *
+ * Returns the wake_up status bit of available pad mux pin.
+ */
+int omap_hmwod_pad_wakeup_status(struct omap_hwmod *oh)
+{
+ if (oh->mux)
+ return omap_hwmod_mux_wakeup(oh->mux);
+ return -EINVAL;
+}
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index fedd829..4100be0 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -588,6 +588,7 @@ int omap_hwmod_for_each_by_class(const char *classname,
int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state);
u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
+int omap_hmwod_pad_wakeup_status(struct omap_hwmod *oh);
/*
* Chip variant-specific hwmod init routines - XXX should be converted
* to use initcalls once the initial boot ordering is straightened out
--
1.7.1
^ permalink raw reply related
* [PATCH 1/7] OMAP2+ : hwmod_data: update uart hwmod data.
From: Govindraj.R @ 2011-02-28 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298903958-6496-1-git-send-email-govindraj.raja@ti.com>
Add HWMOD_SWSUP_SIDLE flag to uart*_hwmod data. With addition of this flag the
hwmod framework will take care of updating sysc reg with no_idle mode while
enabling clocks and to force_idle mode while disabling clocks.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 3 +++
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 3 +++
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 4 ++++
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 4 ++++
4 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index f323c6b..48392f3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -434,6 +434,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = {
static struct omap_hwmod omap2420_uart1_hwmod = {
.name = "uart1",
+ .flags = HWMOD_SWSUP_SIDLE,
.mpu_irqs = uart1_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs),
.sdma_reqs = uart1_sdma_reqs,
@@ -471,6 +472,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = {
static struct omap_hwmod omap2420_uart2_hwmod = {
.name = "uart2",
+ .flags = HWMOD_SWSUP_SIDLE,
.mpu_irqs = uart2_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs),
.sdma_reqs = uart2_sdma_reqs,
@@ -508,6 +510,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = {
static struct omap_hwmod omap2420_uart3_hwmod = {
.name = "uart3",
+ .flags = HWMOD_SWSUP_SIDLE,
.mpu_irqs = uart3_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs),
.sdma_reqs = uart3_sdma_reqs,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index de0015d..ab58a20 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -490,6 +490,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
static struct omap_hwmod omap2430_uart1_hwmod = {
.name = "uart1",
+ .flags = HWMOD_SWSUP_SIDLE,
.mpu_irqs = uart1_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs),
.sdma_reqs = uart1_sdma_reqs,
@@ -527,6 +528,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = {
static struct omap_hwmod omap2430_uart2_hwmod = {
.name = "uart2",
+ .flags = HWMOD_SWSUP_SIDLE,
.mpu_irqs = uart2_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs),
.sdma_reqs = uart2_sdma_reqs,
@@ -564,6 +566,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = {
static struct omap_hwmod omap2430_uart3_hwmod = {
.name = "uart3",
+ .flags = HWMOD_SWSUP_SIDLE,
.mpu_irqs = uart3_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs),
.sdma_reqs = uart3_sdma_reqs,
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index e9d0012..79c39d4 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -626,6 +626,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = {
static struct omap_hwmod omap3xxx_uart1_hwmod = {
.name = "uart1",
+ .flags = HWMOD_SWSUP_SIDLE,
.mpu_irqs = uart1_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs),
.sdma_reqs = uart1_sdma_reqs,
@@ -663,6 +664,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = {
static struct omap_hwmod omap3xxx_uart2_hwmod = {
.name = "uart2",
+ .flags = HWMOD_SWSUP_SIDLE,
.mpu_irqs = uart2_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs),
.sdma_reqs = uart2_sdma_reqs,
@@ -700,6 +702,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = {
static struct omap_hwmod omap3xxx_uart3_hwmod = {
.name = "uart3",
+ .flags = HWMOD_SWSUP_SIDLE,
.mpu_irqs = uart3_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs),
.sdma_reqs = uart3_sdma_reqs,
@@ -737,6 +740,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = {
static struct omap_hwmod omap3xxx_uart4_hwmod = {
.name = "uart4",
+ .flags = HWMOD_SWSUP_SIDLE,
.mpu_irqs = uart4_mpu_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(uart4_mpu_irqs),
.sdma_reqs = uart4_sdma_reqs,
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 79a8601..13c2df1 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -4587,6 +4587,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart1_slaves[] = {
static struct omap_hwmod omap44xx_uart1_hwmod = {
.name = "uart1",
+ .flags = HWMOD_SWSUP_SIDLE,
.class = &omap44xx_uart_hwmod_class,
.mpu_irqs = omap44xx_uart1_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart1_irqs),
@@ -4639,6 +4640,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart2_slaves[] = {
static struct omap_hwmod omap44xx_uart2_hwmod = {
.name = "uart2",
+ .flags = HWMOD_SWSUP_SIDLE,
.class = &omap44xx_uart_hwmod_class,
.mpu_irqs = omap44xx_uart2_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart2_irqs),
@@ -4691,6 +4693,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = {
static struct omap_hwmod omap44xx_uart3_hwmod = {
.name = "uart3",
+ .flags = HWMOD_SWSUP_SIDLE,
.class = &omap44xx_uart_hwmod_class,
.flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
.mpu_irqs = omap44xx_uart3_irqs,
@@ -4744,6 +4747,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart4_slaves[] = {
static struct omap_hwmod omap44xx_uart4_hwmod = {
.name = "uart4",
+ .flags = HWMOD_SWSUP_SIDLE,
.class = &omap44xx_uart_hwmod_class,
.mpu_irqs = omap44xx_uart4_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart4_irqs),
--
1.7.1
^ permalink raw reply related
* [PATCH 0/7] OMAP2+: UART: runtime conversion + cleanup.
From: Govindraj.R @ 2011-02-28 14:39 UTC (permalink / raw)
To: linux-arm-kernel
Converting uart driver to adapt to pm runtime api's.
Changes involves:
================
1.) Cleaning up certain uart calls from sram_idle func but still
retaining the prepare_idle/resume_idle func calls because as
of today uart module level wakeup doesn't seem to work.
We have informed the hardware folks about this and discussion
is in progress. So until we have a workaround for this we have to
depend on prepare/resume calls to cut uart clock and wakeup based
on io-daisy chain mechanism using uart_rx padconf.
2.) Removed all types of uart clock handling code from serial.c
file and now onwards serial.c file is used only for device registration
and to probe early uart and pass some uart board data which
can be passed as pdata to driver. Also cleaned up direct padconf usage.
3.) Using hwmod_mux api enable wakeup capability for uart pad during
hwmod_idle state i.e., when uart clocks are disabled we can enable
io-pad wakeup capability for uart if mux_data is available for
given uart. Also during during resume from idle call to uart we need
to enable clocks back conditionally and this can be done only when io-pad
wakeup event bit is set for uart_rx pad. So we need a hwmod api
which can probe the uart pad and let us know whether a uart wakeup
happened. So omap_hmwod_pad_wakeup_status api is added to meet this
requirement.
3.) Adapted omap-serial driver to use runtime api's.
4.) Modify serial_init calls to accept certain dma based uart parameters
5.) Minor cleanups and rename uart_rx_dma api.
Patch series is based on LO Kernel omap_for_linus branch.
Commit-id: 7cab8713b1ed0dab08ad6458f92a40b7ff4be619
Dependency patches needed to test system wide suspend on omap_for_linus branch.
https://patchwork.kernel.org/patch/550551/
https://patchwork.kernel.org/patch/513481/
https://patchwork.kernel.org/patch/501211/
Testing updates:
----------------
3430SDP, ZOOM2: retention, off_mode, system_wide suspend is tested.
OMAP3630 - Zoom3: pm-retention checked, off mode for per domain checked.
[uart3/uart4 in per domain on omap3630].
OMAP4430[Blaze]: Boot tested.
OMAP2420/2430SDP: Boot tested
Govindraj.R (5):
OMAP2+ : hwmod_data: update uart hwmod data.
OMAP2+: mux: Enable wakeup for wakeup enable requested pads.
OMAP2+: UART: Remove certain uart calls from sram_idle.
OMAP2+: UART: Remove uart clock handling code serial.c
Serial: OMAP: add runtime pm support for omap-serial driver
Jon Hunter (2):
OMAP: Serial: Allow UART parameters to be configured from board file
Serial: OMAP2+: Make the RX_TIMEOUT for DMA configurable for each
UART
arch/arm/mach-omap2/board-2430sdp.c | 3 +-
arch/arm/mach-omap2/board-3430sdp.c | 4 +-
arch/arm/mach-omap2/board-4430sdp.c | 3 +-
arch/arm/mach-omap2/board-am3517evm.c | 3 +-
arch/arm/mach-omap2/board-apollon.c | 3 +-
arch/arm/mach-omap2/board-cm-t35.c | 3 +-
arch/arm/mach-omap2/board-cm-t3517.c | 3 +-
arch/arm/mach-omap2/board-devkit8000.c | 3 +-
arch/arm/mach-omap2/board-generic.c | 3 +-
arch/arm/mach-omap2/board-h4.c | 3 +-
arch/arm/mach-omap2/board-igep0020.c | 3 +-
arch/arm/mach-omap2/board-igep0030.c | 3 +-
arch/arm/mach-omap2/board-ldp.c | 3 +-
arch/arm/mach-omap2/board-n8x0.c | 9 +-
arch/arm/mach-omap2/board-omap3beagle.c | 3 +-
arch/arm/mach-omap2/board-omap3evm.c | 3 +-
arch/arm/mach-omap2/board-omap3logic.c | 3 +-
arch/arm/mach-omap2/board-omap3pandora.c | 3 +-
arch/arm/mach-omap2/board-omap3stalker.c | 3 +-
arch/arm/mach-omap2/board-omap3touchbook.c | 3 +-
arch/arm/mach-omap2/board-omap4panda.c | 3 +-
arch/arm/mach-omap2/board-overo.c | 3 +-
arch/arm/mach-omap2/board-rm680.c | 3 +-
arch/arm/mach-omap2/board-rx51.c | 3 +-
arch/arm/mach-omap2/board-ti8168evm.c | 2 +-
arch/arm/mach-omap2/board-zoom-peripherals.c | 3 +-
arch/arm/mach-omap2/mux.c | 23 +
arch/arm/mach-omap2/mux.h | 13 +
arch/arm/mach-omap2/omap_hwmod.c | 13 +
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 3 +
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 3 +
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 4 +
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 4 +
arch/arm/mach-omap2/pm24xx.c | 11 -
arch/arm/mach-omap2/pm34xx.c | 16 -
arch/arm/mach-omap2/serial.c | 845 +++++--------------------
arch/arm/plat-omap/include/plat/omap-serial.h | 37 +-
arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 +
arch/arm/plat-omap/include/plat/serial.h | 10 +-
drivers/tty/serial/omap-serial.c | 323 +++++++++-
40 files changed, 601 insertions(+), 789 deletions(-)
^ permalink raw reply
* [patch 1/2] mc13892: reboot on wdi event
From: Mark Brown @ 2011-02-28 14:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228132643.964403175@rtp-net.org>
On Mon, Feb 28, 2011 at 02:21:33PM +0100, Arnaud Patard wrote:
> +
> + /* allows to reboot on wdi event */
> + ret = mc13xxx_reg_read(mc13892, MC13892_POWERCTL2, &val);
> + if (!ret) {
> + val |= MC13892_POWERCTL2_WDIRESET;
> + mc13xxx_reg_write(mc13892, MC13892_POWERCTL2, val);
> + }
> +
Also, why is this in the regulator driver? The MFD core for the device
might be a better choice - that'll ensure it gets done even if regulator
support isn't enabled for some reason.
^ permalink raw reply
* When does mach-types get updated in a tree?
From: John Linn @ 2011-02-28 14:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228101030.GB29843@n2100.arm.linux.org.uk>
> -----Original Message-----
> From: Russell King - ARM Linux [mailto:linux at arm.linux.org.uk]
> Sent: Monday, February 28, 2011 3:11 AM
> To: John Linn
> Cc: linux-arm-kernel at lists.infradead.org; grant.likely at secretlab.ca
> Subject: Re: When does mach-types get updated in a tree?
>
> On Sat, Feb 26, 2011 at 08:40:24AM -0700, John Linn wrote:
> > > -----Original Message-----
> > > From: John Linn
> > > Sent: Wednesday, February 23, 2011 12:06 PM
> > > To: 'linux-arm-kernel at lists.infradead.org';
'linux at arm.linux.org.uk'
> > > Cc: grant.likely at secretlab.ca
> > > Subject: When does mach-types get updated in a tree?
> > >
> > > I am trying to get a branch ready that could be pulled from with
my
> > new patches.
> >
> > Maybe I missed it, but I didn't notice any response to this,
> > or it was a really dumb question that didn't deserve an answer.
>
> I don't update it too frequently because its becoming quite a burden
to
> edit out all the buggered entries people have made in it - and I don't
> want to draw attention to it by updating it too regularly. I can see
> that it's a file that Linus will eventually complain about - it is
134K,
> most of which is probably not used.
Thanks for the insight there.
>
> So I tend to update it on request, and normally no more than once
every
> two months.
What is your suggestion to people with regards to patches that need the
update?
I'm open to suggestions, just trying to work with everyone the best way
to get
Xilinx patches into the system.
I could submit my patches to your patch system if that helps, or have a
branch
that you can pull from (and it relies on the mach-types update)?
Thanks for your time,
John
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^ permalink raw reply
* [patch 1/2] mc13892: reboot on wdi event
From: Mark Brown @ 2011-02-28 14:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228132643.964403175@rtp-net.org>
On Mon, Feb 28, 2011 at 02:21:33PM +0100, Arnaud Patard wrote:
> By default, on wdi (watchdog input) event the mc13892 is powering off.
> This patch is changing this to reboot on wdi event.
>
> Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
This strikes me as something that should be configurable by platforms.
^ permalink raw reply
* Linux support for Samsung S3C2510A Processor
From: Madhavi Manchala @ 2011-02-28 14:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228133256.GB22646@trinity.fluff.org>
On Mon, Feb 28, 2011 at 7:02 PM, Ben Dooks <ben@trinity.fluff.org> wrote:
> On Mon, Feb 28, 2011 at 06:52:15PM +0530, Madhavi Manchala wrote:
>> Dear All,
>>
>> Does Linux kernel supports the Samsung S3C2510A processor? Why am I
>> asking this question is, when I looked into ?the arch/arm/ directory I
>> did not find anything which is related to Samsung S3C2510A processor.
>> There are other directories like mach-s3c24xx and mach-s3c64xx
>> directories, but not mach-s3c25xx.
>>
>> Any ideas / hints will be appreciated.
>
> I think this is a no-mmu version, and there is not a lot of ARM no-mmu
> support at the moment.
Dear Ben,
Thanks for you information.
As you said, it is not a MMU CPU.
That is, we do not port the Linux directly on to my board. If I want
to support Linux on my board which is based on the Samsung S3C2510A,
what is the procedure for it? Please suggest me.
Thanks and Regards,
Madhavi M.
> --
> Ben Dooks, ben at fluff.org, http://www.fluff.org/ben/
>
> Large Hadron Colada: A large Pina Colada that makes the universe disappear.
>
>
^ permalink raw reply
* [PATCH V4 3/4] ARM: Xilinx: base header files and assemblymacros
From: John Linn @ 2011-02-28 14:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228112055.GC29843@n2100.arm.linux.org.uk>
> -----Original Message-----
> From: Russell King - ARM Linux [mailto:linux at arm.linux.org.uk]
> Sent: Monday, February 28, 2011 4:21 AM
> To: John Linn
> Cc: linux-arm-kernel at lists.infradead.org;
linux-kernel at vger.kernel.org; catalin.marinas at arm.com;
> glikely at secretlab.ca; jamie at jamieiles.com; arnd at arndb.de
> Subject: Re: [PATCH V4 3/4] ARM: Xilinx: base header files and
assemblymacros
>
> On Fri, Feb 18, 2011 at 11:14:40AM -0700, John Linn wrote:
> > diff --git a/arch/arm/mach-xilinx/include/mach/uncompress.h
b/arch/arm/mach-
> xilinx/include/mach/uncompress.h
> > new file mode 100644
> > index 0000000..ff3754c
> > --- /dev/null
> > +++ b/arch/arm/mach-xilinx/include/mach/uncompress.h
> > @@ -0,0 +1,61 @@
> > +/* arch/arm/mach-xilinx/include/mach/uncompress.h
> > + *
> > + * Copyright (C) 2011 Xilinx
> > + *
> > + * This software is licensed under the terms of the GNU General
Public
> > + * License version 2, as published by the Free Software Foundation,
and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#ifndef __MACH_UNCOMPRESS_H__
> > +#define __MACH_UNCOMPRESS_H__
> > +
> > +#include <mach/xilinx_soc.h>
> > +#include <mach/uart.h>
> > +#include <asm/processor.h>
> > +#include <asm/io.h>
> > +#include <mach/io.h>
>
> You don't need mach/io.h here - it's already included by asm/io.h.
> It's probably also worth trying linux/io.h instead of asm/io.h too.
Makes sense, will incorporate that into next patch version.
Thanks,
John
This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
^ permalink raw reply
* [PATCH V4 0/4] ARM: Basic Xilinx Support
From: John Linn @ 2011-02-28 14:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228111949.GC2754@pulham.picochip.com>
> -----Original Message-----
> From: Jamie Iles [mailto:jamie at jamieiles.com]
> Sent: Monday, February 28, 2011 4:20 AM
> To: John Linn
> Cc: linux-arm-kernel at lists.infradead.org;
linux-kernel at vger.kernel.org; linux at arm.linux.org.uk;
> catalin.marinas at arm.com; glikely at secretlab.ca; jamie at jamieiles.com;
arnd at arndb.de
> Subject: Re: [PATCH V4 0/4] ARM: Basic Xilinx Support
>
> On Fri, Feb 18, 2011 at 11:14:37AM -0700, John Linn wrote:
> >
> > V4
> >
> > I incorporated more feedback from Jamie Iles. It was
> > primariy cleanup with the only significant change
> > being a move to using raw_read/write in the uncompressor
> > uart code.
> >
> > The other changes were minor updates so that the patch
> > set applies to linux-next.
> >
> > This patch set is now tested against the linux-next branch
> > from pub/scm/linux/kernel/git/sfr/linux-next.git.
>
> Hi John,
>
> I've just tried a quick dummy build of this series (with a fudge in
> mach-types to get it building) and I see a couple of minor sparse
> warnings:
>
> arch/arm/mach-xilinx/common.c:54:13: warning: symbol
> 'xilinx_system_init' was not declared. Should it be static?
> arch/arm/mach-xilinx/common.c:68:13: warning: symbol 'xilinx_irq_init'
> was not declared. Should it be static?
> arch/arm/mach-xilinx/common.c:110:13: warning: symbol 'xilinx_map_io'
> was not declared. Should it be static?
> arch/arm/mach-xilinx/timer.c:290:18: warning: symbol
'xttcpss_sys_timer'
> was not declared. Should it be static?
>
> I think all of these can be resolved by including "common.h" in both
> timer.c and common.c.
Will have a look at it. Easy enough to fix and verify.
>
> I've put a couple of nitpicks for the individual patches, sorry I
didn't
> spot them before. Otherwise,
No problem, appreciate your time, patience and input.
Thanks,
John
>
> Reviewed-by: Jamie Iles <jamie@jamieiles.com>
>
> Jamie
This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
^ permalink raw reply
* [PATCH V3 3/4] mmc: sdhci-esdhc: remove SDHCI_QUIRK_NO_CARD_NO_RESET from ESDHC_DEFAULT_QUIRKS
From: Wolfram Sang @ 2011-02-28 14:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298892725-23672-3-git-send-email-Hong-Xing.Zhu@freescale.com>
On Mon, Feb 28, 2011 at 07:32:04PM +0800, Richard Zhu wrote:
> sdhci-esdhc-imx does not need SDHCI_QUIRK_NO_CARD_NO_RESET. Make it OF-specific.
>
> Signed-off-by: Richard Zhu <Hong-Xing.Zhu@freescale.com>
Seems to work on mx35 at least:
Tested-by: Wolfram Sang <w.sang@pengutronix.de>
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply
* [PATCH V4 3/4] ARM: Xilinx: base header files and assembly macros
From: John Linn @ 2011-02-28 14:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228111839.GA9206@pulham.picochip.com>
> -----Original Message-----
> From: Jamie Iles [mailto:jamie at jamieiles.com]
> Sent: Monday, February 28, 2011 4:19 AM
> To: John Linn
> Cc: linux-arm-kernel at lists.infradead.org;
linux-kernel at vger.kernel.org; linux at arm.linux.org.uk;
> catalin.marinas at arm.com; glikely at secretlab.ca; jamie at jamieiles.com;
arnd at arndb.de
> Subject: Re: [PATCH V4 3/4] ARM: Xilinx: base header files and
assembly macros
>
> Hi John,
>
> One more pedantic nitpick, but nothing major!
>
> Jamie
>
> On Fri, Feb 18, 2011 at 11:14:40AM -0700, John Linn wrote:
> > These are the minimum needed to build the kernel for the new
platform.
> >
> > Signed-off-by: John Linn <john.linn@xilinx.com>
> > ---
> >
> > V4 Changes
> >
> > Cleanup based on input from Jamie Iles.
> > Moved to PLAT_PHYS_OFFSET.
> > Remove headers file inclusions that weren't needed.
> > Added use of raw_readl/raw_writel in uncompressor uart code.
> > Added cpu_relax() in the uncompressor uart code.
> >
> > V3 Changes
> >
> > Updates based on Russell Kings' comments
> > Changed headers to update the license info and remove
> > the address
> >
> > Updated the constant to use UL in vmalloc.h
> >
> > V2 Changes
> >
> > Updates based on Russell King's comments
> > moved to using entry-macro-gic.S
> > moved stuff from hardware.h to xilinx_soc.h
> > added IOMEM() in io.h to help with typing
> > Minor updates to IO_SPACE_LIMIT and __io()
> > Updated addresses to be clear with seperate virtual
> > and physical addresses
> >
> > arch/arm/mach-xilinx/include/mach/clkdev.h | 33 ++++++++++++
> > arch/arm/mach-xilinx/include/mach/debug-macro.S | 36
+++++++++++++
> > arch/arm/mach-xilinx/include/mach/entry-macro.S | 30 +++++++++++
> > arch/arm/mach-xilinx/include/mach/hardware.h | 18 +++++++
> > arch/arm/mach-xilinx/include/mach/io.h | 33 ++++++++++++
> > arch/arm/mach-xilinx/include/mach/irqs.h | 29 +++++++++++
> > arch/arm/mach-xilinx/include/mach/memory.h | 23 +++++++++
> > arch/arm/mach-xilinx/include/mach/system.h | 28 ++++++++++
> > arch/arm/mach-xilinx/include/mach/timex.h | 22 ++++++++
> > arch/arm/mach-xilinx/include/mach/uart.h | 25 +++++++++
> > arch/arm/mach-xilinx/include/mach/uncompress.h | 61
+++++++++++++++++++++++
> > arch/arm/mach-xilinx/include/mach/vmalloc.h | 20 +++++++
> > arch/arm/mach-xilinx/include/mach/xilinx_soc.h | 46
+++++++++++++++++
> > 13 files changed, 404 insertions(+), 0 deletions(-)
> > create mode 100644 arch/arm/mach-xilinx/include/mach/clkdev.h
> > create mode 100644 arch/arm/mach-xilinx/include/mach/debug-macro.S
> > create mode 100644 arch/arm/mach-xilinx/include/mach/entry-macro.S
> > create mode 100644 arch/arm/mach-xilinx/include/mach/hardware.h
> > create mode 100644 arch/arm/mach-xilinx/include/mach/io.h
> > create mode 100644 arch/arm/mach-xilinx/include/mach/irqs.h
> > create mode 100644 arch/arm/mach-xilinx/include/mach/memory.h
> > create mode 100644 arch/arm/mach-xilinx/include/mach/system.h
> > create mode 100644 arch/arm/mach-xilinx/include/mach/timex.h
> > create mode 100644 arch/arm/mach-xilinx/include/mach/uart.h
> > create mode 100644 arch/arm/mach-xilinx/include/mach/uncompress.h
> > create mode 100644 arch/arm/mach-xilinx/include/mach/vmalloc.h
> > create mode 100644 arch/arm/mach-xilinx/include/mach/xilinx_soc.h
> >
> > diff --git a/arch/arm/mach-xilinx/include/mach/clkdev.h
b/arch/arm/mach-xilinx/include/mach/clkdev.h
> > new file mode 100644
> > index 0000000..5dd1453
> > --- /dev/null
> > +++ b/arch/arm/mach-xilinx/include/mach/clkdev.h
> > @@ -0,0 +1,33 @@
> > +/*
> > + * arch/arm/mach-xilinx/include/mach/clkdev.h
> > + *
> > + * Copyright (C) 2011 Xilinx, Inc.
> > + *
> > + * This software is licensed under the terms of the GNU General
Public
> > + * License version 2, as published by the Free Software Foundation,
and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + */
> > +
> > +#ifndef __MACH_CLKDEV_H__
> > +#define __MACH_CLKDEV_H__
> > +
> > +struct clk {
> > + unsigned long rate;
> > +};
> > +
> > +static inline int __clk_get(struct clk *clk)
> > +{
> > + return 1;
> > +}
> > +
> > +static inline void __clk_put(struct clk *clk)
> > +{
> > +}
> > +
> > +#endif
> > diff --git a/arch/arm/mach-xilinx/include/mach/debug-macro.S
b/arch/arm/mach-
> xilinx/include/mach/debug-macro.S
> > new file mode 100644
> > index 0000000..30d3d3d
> > --- /dev/null
> > +++ b/arch/arm/mach-xilinx/include/mach/debug-macro.S
> > @@ -0,0 +1,36 @@
> > +/* arch/arm/mach-xilinx/include/mach/debug-macro.S
> > + *
> > + * Debugging macro include header
> > + *
> > + * Copyright (C) 2011 Xilinx
> > + *
> > + * This software is licensed under the terms of the GNU General
Public
> > + * License version 2, as published by the Free Software Foundation,
and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#include <mach/xilinx_soc.h>
> > +#include <mach/uart.h>
> > +
> > + .macro addruart, rp, rv
> > + ldr \rp, =LL_UART_PADDR @ physical
> > + ldr \rv, =LL_UART_VADDR @ virtual
> > + .endm
> > +
> > + .macro senduart,rd,rx
> > + str \rd, [\rx, #UART_FIFO_OFFSET] @ TXDATA
> > + .endm
> > +
> > + .macro waituart,rd,rx
> > + .endm
> > +
> > + .macro busyuart,rd,rx
> > +1002: ldr \rd, [\rx, #UART_SR_OFFSET] @ get
status register
> > + tst \rd, #UART_SR_TXFULL @
> > + bne 1002b @ wait if FIFO is full
> > + .endm
> > diff --git a/arch/arm/mach-xilinx/include/mach/entry-macro.S
b/arch/arm/mach-
> xilinx/include/mach/entry-macro.S
> > new file mode 100644
> > index 0000000..11a2866
> > --- /dev/null
> > +++ b/arch/arm/mach-xilinx/include/mach/entry-macro.S
> > @@ -0,0 +1,30 @@
> > +/*
> > + * arch/arm/mach-xilinx/include/mach/entry-macro.S
> > + *
> > + * Low-level IRQ helper macros
> > + *
> > + * Copyright (C) 2011 Xilinx
> > + *
> > + * based on arch/plat-mxc/include/mach/entry-macro.S
> > + *
> > + * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
> > + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights
Reserved.
> > + *
> > + * This software is licensed under the terms of the GNU General
Public
> > + * License version 2, as published by the Free Software Foundation,
and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#include <mach/hardware.h>
> > +#include <asm/hardware/entry-macro-gic.S>
> > +
> > + .macro disable_fiq
> > + .endm
> > +
> > + .macro arch_ret_to_user, tmp1, tmp2
> > + .endm
> > diff --git a/arch/arm/mach-xilinx/include/mach/hardware.h
b/arch/arm/mach-
> xilinx/include/mach/hardware.h
> > new file mode 100644
> > index 0000000..f9685c4
> > --- /dev/null
> > +++ b/arch/arm/mach-xilinx/include/mach/hardware.h
> > @@ -0,0 +1,18 @@
> > +/* arch/arm/mach-xilinx/include/mach/hardware.h
> > + *
> > + * Copyright (C) 2011 Xilinx
> > + *
> > + * This software is licensed under the terms of the GNU General
Public
> > + * License version 2, as published by the Free Software Foundation,
and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#ifndef __MACH_HARDWARE_H__
> > +#define __MACH_HARDWARE_H__
> > +
> > +#endif
> > diff --git a/arch/arm/mach-xilinx/include/mach/io.h
b/arch/arm/mach-xilinx/include/mach/io.h
> > new file mode 100644
> > index 0000000..ef69e65
> > --- /dev/null
> > +++ b/arch/arm/mach-xilinx/include/mach/io.h
> > @@ -0,0 +1,33 @@
> > +/* arch/arm/mach-xilinx/include/mach/io.h
> > + *
> > + * Copyright (C) 2011 Xilinx
> > + *
> > + * This software is licensed under the terms of the GNU General
Public
> > + * License version 2, as published by the Free Software Foundation,
and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#ifndef __MACH_IO_H__
> > +#define __MACH_IO_H__
> > +
> > +/* Allow IO space to be anywhere in the memory */
> > +
> > +#define IO_SPACE_LIMIT 0xffff
> > +
> > +/* IO address mapping macros, nothing special at this time but
required */
> > +
> > +#ifdef __ASSEMBLER__
> > +#define IOMEM(x) (x)
> > +#else
> > +#define IOMEM(x) ((void __force __iomem *)(x))
> > +#endif
> > +
> > +#define __io(a) __typesafe_io(a)
> > +#define __mem_pci(a) (a)
> > +
> > +#endif
> > diff --git a/arch/arm/mach-xilinx/include/mach/irqs.h
b/arch/arm/mach-xilinx/include/mach/irqs.h
> > new file mode 100644
> > index 0000000..47a8162
> > --- /dev/null
> > +++ b/arch/arm/mach-xilinx/include/mach/irqs.h
> > @@ -0,0 +1,29 @@
> > +/* arch/arm/mach-xilinx/include/mach/irqs.h
> > + *
> > + * Copyright (C) 2011 Xilinx
> > + *
> > + * This software is licensed under the terms of the GNU General
Public
> > + * License version 2, as published by the Free Software Foundation,
and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#ifndef __MACH_IRQS_H
> > +#define __MACH_IRQS_H
> > +
> > +#define ARCH_NR_GPIOS 118
> > +#define NR_IRQS (128 + ARCH_NR_GPIOS)
> > +
> > +/*
> > + * GIC Interrupts
> > + */
> > +
> > +#define IRQ_GIC_SPI_START 32
> > +#define IRQ_TIMERCOUNTER0 42
> > +#define IRQ_UART0 59
> > +
> > +#endif
> > diff --git a/arch/arm/mach-xilinx/include/mach/memory.h
b/arch/arm/mach-xilinx/include/mach/memory.h
> > new file mode 100644
> > index 0000000..3efde15
> > --- /dev/null
> > +++ b/arch/arm/mach-xilinx/include/mach/memory.h
> > @@ -0,0 +1,23 @@
> > +/* arch/arm/mach-xilinx/include/mach/memory.h
> > + *
> > + * Copyright (C) 2011 Xilinx
> > + *
> > + * This software is licensed under the terms of the GNU General
Public
> > + * License version 2, as published by the Free Software Foundation,
and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#ifndef __MACH_MEMORY_H__
> > +#define __MACH_MEMORY_H__
> > +
> > +#include <asm/sizes.h>
> > +
> > +#define PHYS_OFFSET UL(0x0)
> > +#define MEM_SIZE SZ_256M
> > +
> > +#endif
> > diff --git a/arch/arm/mach-xilinx/include/mach/system.h
b/arch/arm/mach-xilinx/include/mach/system.h
> > new file mode 100644
> > index 0000000..e8514a0
> > --- /dev/null
> > +++ b/arch/arm/mach-xilinx/include/mach/system.h
> > @@ -0,0 +1,28 @@
> > +/* arch/arm/mach-xilinx/include/mach/system.h
> > + *
> > + * Copyright (C) 2011 Xilinx
> > + *
> > + * This software is licensed under the terms of the GNU General
Public
> > + * License version 2, as published by the Free Software Foundation,
and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#ifndef __MACH_SYSTEM_H__
> > +#define __MACH_SYSTEM_H__
> > +
> > +static inline void arch_idle(void)
> > +{
> > + cpu_do_idle();
> > +}
> > +
> > +static inline void arch_reset(char mode, const char *cmd)
> > +{
> > + /* Add architecture specific reset processing here */
> > +}
> > +
> > +#endif
> > diff --git a/arch/arm/mach-xilinx/include/mach/timex.h
b/arch/arm/mach-xilinx/include/mach/timex.h
> > new file mode 100644
> > index 0000000..4ebc0a6
> > --- /dev/null
> > +++ b/arch/arm/mach-xilinx/include/mach/timex.h
> > @@ -0,0 +1,22 @@
> > +/* arch/arm/mach-xilinx/include/mach/timex.h
> > + *
> > + * Copyright (C) 2011 Xilinx
> > + *
> > + * This software is licensed under the terms of the GNU General
Public
> > + * License version 2, as published by the Free Software Foundation,
and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#ifndef __MACH_TIMEX_H__
> > +#define __MACH_TIMEX_H__
> > +
> > +#define PERIPHERAL_CLOCK_RATE 2500000
> > +
> > +#define CLOCK_TICK_RATE (PERIPHERAL_CLOCK_RATE / 32)
> > +
> > +#endif
> > diff --git a/arch/arm/mach-xilinx/include/mach/uart.h
b/arch/arm/mach-xilinx/include/mach/uart.h
> > new file mode 100644
> > index 0000000..7fca361
> > --- /dev/null
> > +++ b/arch/arm/mach-xilinx/include/mach/uart.h
> > @@ -0,0 +1,25 @@
> > +/* arch/arm/mach-xilinx/include/mach/uart.h
> > + *
> > + * Copyright (C) 2011 Xilinx
> > + *
> > + * This software is licensed under the terms of the GNU General
Public
> > + * License version 2, as published by the Free Software Foundation,
and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#ifndef __MACH_UART_H__
> > +#define __MACH_UART_H__
> > +
> > +#define UART_CR_OFFSET 0x00 /* Control Register [8:0] */
> > +#define UART_SR_OFFSET 0x2C /* Channel Status [11:0] */
> > +#define UART_FIFO_OFFSET 0x30 /* FIFO [15:0] or [7:0] */
> > +
> > +#define UART_SR_TXFULL 0x00000010 /* TX FIFO full
*/
> > +#define UART_SR_TXEMPTY 0x00000008 /* TX FIFO empty
*/
> > +
> > +#endif
> > diff --git a/arch/arm/mach-xilinx/include/mach/uncompress.h
b/arch/arm/mach-
> xilinx/include/mach/uncompress.h
> > new file mode 100644
> > index 0000000..ff3754c
> > --- /dev/null
> > +++ b/arch/arm/mach-xilinx/include/mach/uncompress.h
> > @@ -0,0 +1,61 @@
> > +/* arch/arm/mach-xilinx/include/mach/uncompress.h
> > + *
> > + * Copyright (C) 2011 Xilinx
> > + *
> > + * This software is licensed under the terms of the GNU General
Public
> > + * License version 2, as published by the Free Software Foundation,
and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#ifndef __MACH_UNCOMPRESS_H__
> > +#define __MACH_UNCOMPRESS_H__
> > +
> > +#include <mach/xilinx_soc.h>
> > +#include <mach/uart.h>
> > +#include <asm/processor.h>
> > +#include <asm/io.h>
> > +#include <mach/io.h>
> > +
> > +void arch_decomp_setup(void)
> > +{
> > +}
> > +
> > +static inline void flush(void)
> > +{
> > + u32 status;
> > + /*
> > + * Wait while the FIFO is not empty
> > + */
> > + while (1) {
> > + status = __raw_readl(IOMEM(LL_UART_PADDR +
UART_SR_OFFSET));
> > + if (status & UART_SR_TXEMPTY)
> > + break;
> > + cpu_relax();
> > + }
>
> This could be written as:
>
> static inline void flush(void)
> {
> while (!(__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) &
> UART_SR_TXEMPTY))
> cpu_relax();
> }
Honestly I had it that way as I know most in the community do that and
terse-ness
is somewhat preferred.
I thought my way is a bit clearer as it was a bit harder to read the
other way.
Do you think everyone else would say to change it? No big deal to
change it.
Thanks,
John
>
> > +}
> > +
> > +#define arch_decomp_wdog()
> > +
> > +static void putc(char ch)
> > +{
> > + u32 status;
> > +
> > + /*
> > + * Wait for room in the FIFO, then write the char into the FIFO
> > + */
> > + while (1) {
> > + status = __raw_readl(IOMEM(LL_UART_PADDR +
UART_SR_OFFSET));
> > + if (!(status & UART_SR_TXFULL))
> > + break;
> > + cpu_relax();
> > + }
> > +
> > + __raw_writel(ch, IOMEM(LL_UART_PADDR + UART_FIFO_OFFSET));
> > +}
>
> static void putch(char ch)
> {
> while (__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) &
> UART_SR_TXFULL)
> cpu_relax();
> __raw_writel(ch, IOMEM(LL_UART_PADDR + UART_FIFO_OFFSET));
> }
>
Same thing.
> > +
> > +#endif
> > diff --git a/arch/arm/mach-xilinx/include/mach/vmalloc.h
b/arch/arm/mach-
> xilinx/include/mach/vmalloc.h
> > new file mode 100644
> > index 0000000..aba20a3
> > --- /dev/null
> > +++ b/arch/arm/mach-xilinx/include/mach/vmalloc.h
> > @@ -0,0 +1,20 @@
> > +/* arch/arm/mach-xilinx/include/mach/vmalloc.h
> > + *
> > + * Copyright (C) 2011 Xilinx
> > + *
> > + * This software is licensed under the terms of the GNU General
Public
> > + * License version 2, as published by the Free Software Foundation,
and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#ifndef __MACH_VMALLOC_H__
> > +#define __MACH_VMALLOC_H__
> > +
> > +#define VMALLOC_END 0xE0000000UL
> > +
> > +#endif
> > diff --git a/arch/arm/mach-xilinx/include/mach/xilinx_soc.h
b/arch/arm/mach-
> xilinx/include/mach/xilinx_soc.h
> > new file mode 100644
> > index 0000000..d01cde1
> > --- /dev/null
> > +++ b/arch/arm/mach-xilinx/include/mach/xilinx_soc.h
> > @@ -0,0 +1,46 @@
> > +/* arch/arm/mach-xilinx/include/mach/xilinx_soc.h
> > + *
> > + * Copyright (C) 2011 Xilinx
> > + *
> > + * This software is licensed under the terms of the GNU General
Public
> > + * License version 2, as published by the Free Software Foundation,
and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#ifndef __MACH_XILINX_SOC_H__
> > +#define __MACH_XILINX_SOC_H__
> > +
> > +/* For now, all mappings are flat (physical = virtual)
> > + */
> > +#define UART0_PHYS 0xE0000000
> > +#define UART0_VIRT UART0_PHYS
> > +
> > +#define TTC0_PHYS 0xF8001000
> > +#define TTC0_VIRT TTC0_PHYS
> > +
> > +#define PL310_L2CC_PHYS 0xF8F02000
> > +#define PL310_L2CC_VIRT PL310_L2CC_PHYS
> > +
> > +#define SCU_PERIPH_PHYS 0xF8F00000
> > +#define SCU_PERIPH_VIRT SCU_PERIPH_PHYS
> > +
> > +/* The following are intended for the devices that are mapped early
*/
> > +
> > +#define TTC0_BASE IOMEM(TTC0_VIRT)
> > +#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT)
> > +#define SCU_GIC_CPU_BASE (SCU_PERIPH_BASE + 0x100)
> > +#define SCU_GIC_DIST_BASE (SCU_PERIPH_BASE + 0x1000)
> > +#define PL310_L2CC_BASE IOMEM(PL310_L2CC_VIRT)
> > +
> > +/*
> > + * Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical
> > + */
> > +#define LL_UART_PADDR UART0_PHYS
> > +#define LL_UART_VADDR UART0_VIRT
> > +
> > +#endif
> > --
> > 1.6.2.1
> >
> >
> >
> > This email and any attachments are intended for the sole use of the
named recipient(s) and
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privileged or copyrighted under
> applicable law. If you are not the intended recipient, do not read,
copy, or forward this email
> message or any attachments. Delete this email message and any
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> >
> >
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