* [PATCH 0/4] Support for device-tree appended to zImage
From: Shawn Guo @ 2011-03-01 2:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228233153.24836.24176.stgit@riker>
Hi John,
On Mon, Feb 28, 2011 at 03:33:18PM -0800, John Bonesio wrote:
> The following series support for device tree binary blobs (dtb) that are
> appended to the compressed kernel image (zImage).
>
> Having appended dtb data is not required to boot with a device tree. If no dtb
> data is appended to zImage, the kernel will boot using prior methods.
>
> ---
>
> John Bonesio (4):
> ARM:boot:device tree: Allow the device tree binary to be appended to zImage
> ARM:boot:device tree: Merge specific atags into the device tree
> ARM:boot:device tree: Add puthex routine for use in the boot wrapper
> ARM:boot:device tree: Allow multiple device trees to be appended to zImage
>
>
> arch/arm/Kconfig | 7 ++
> arch/arm/boot/compressed/Makefile | 31 +++++++-
> arch/arm/boot/compressed/atags.c | 70 +++++++++++++++++++
> arch/arm/boot/compressed/head.S | 136 +++++++++++++++++++++++++++++++++++--
> arch/arm/boot/compressed/misc.c | 134 ++++++++++++++++++++++++++++++++++++
> 5 files changed, 365 insertions(+), 13 deletions(-)
> create mode 100644 arch/arm/boot/compressed/atags.c
>
I'm trying to test and use it. But it does not apply against any tree
that I can find, neither mainline nor Grant's tree. Need rebasing?
--
Regards,
Shawn
^ permalink raw reply
* [PATCH V3 4/4] mmc: sdhci-esdhc: enable esdhc on imx53
From: Eric Miao @ 2011-03-01 3:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <010C9052C42A00499CE76D637FA5EE900C7B7B@039-SN1MPN1-001.039d.mgd.msft.net>
>> Hmm, to me, just using cpu_is_mx53() is more readable than introducing
>> another layer of flags/quirks.
> Hi Wolfram:
> I discussed it with Richard Zhao before sending out these V3 patches.
> As we know that there is not only mx53 has this issue, maybe some following SOCs have this issue too.
> So we make a decision that we introduce another flags/quirks to declare it for all those SOCs that required this
> mechanism in the end.
I agree with Richard here that a flag/quirk will be more generic than
cpu_is_*(). Otherwise we may end up one day growing a big list of
these cpu_is_*().
One other point to consider is the SoC stepping, as this might be
fixed in later steppings, and keeping cpu_is_mx53() or
cpu_is_mx53_stepping_b2_or_above() doesn't look very good in
the driver code itself.
^ permalink raw reply
* [PATCH V4] ARM: EXYNOS4: Implement kernel timers using MCT
From: Kyungmin Park @ 2011-03-01 3:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298870207-1850-3-git-send-email-kgene.kim@samsung.com>
Hi,
MCT is only possible from EVT1.0 or later. The current universal_c210
used the EVT0 version.
So can you remove the ifdef and board can select which timer is used?
Please refer the omap implementation and how to use it.
If we use the same configuration, It will be boot failed at
universal_c210 board.
Thank you,
Kyungmin Park
On Mon, Feb 28, 2011 at 2:16 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> From: Changhwan Youn <chaos.youn@samsung.com>
>
> The Multi-Core Timer(MCT) of EXYNOS4 is designed for implementing
> clock source timer and clock event timers. This patch implements
> 1 clock source timer with 64 bit free running counter of MCT and
> 2 clock event timers with two of 31-bit tick counters.
>
> Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
> Cc: Ben Dooks <ben-linux@fluff.org>
> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
> Changes since v3:
> - Re-worked based on exynos4
> - Changed member of clock_evetn_device like following
> ?struct mct_clock_event_device {
> ? ? ? ?struct clock_event_device *evt;
> ?...
> - Address comments from Russell King
> ?Added static into "irqreturn_t exynos4_mct_comp_isr()"
> ?Added .dev_id member into "struct irqaction mct_comp_event_irq"
>
> Changes since v2:
> - Addressed comments from Russell King
> ?Added mct_clock_event_device structure
> - Removed suspend()/resume() which are not used now
>
> Changes since v1:
> - Addressed comments from Russell King
> ?(implemented global timer, used local timer and so on)
> - Fixed small things
>
> ?arch/arm/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?2 +-
> ?arch/arm/mach-exynos4/Kconfig ? ? ? ? ? ? ? ? | ? ?5 +
> ?arch/arm/mach-exynos4/Makefile ? ? ? ? ? ? ? ?| ? 11 +-
> ?arch/arm/mach-exynos4/include/mach/regs-mct.h | ? 52 +++
> ?arch/arm/mach-exynos4/mct.c ? ? ? ? ? ? ? ? ? | ?421 +++++++++++++++++++++++++
> ?5 files changed, 488 insertions(+), 3 deletions(-)
> ?create mode 100644 arch/arm/mach-exynos4/include/mach/regs-mct.h
> ?create mode 100644 arch/arm/mach-exynos4/mct.c
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index ec3bf98..b4db99b 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -1366,7 +1366,7 @@ config LOCAL_TIMERS
> ? ? ? ?bool "Use local timer interrupts"
> ? ? ? ?depends on SMP
> ? ? ? ?default y
> - ? ? ? select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
> + ? ? ? select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
> ? ? ? ?help
> ? ? ? ? ?Enable support for local timers on SMP platforms, rather then the
> ? ? ? ? ?legacy IPI broadcast method. ?Local timers allows the system
> diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
> index ad03840..77b5d93 100644
> --- a/arch/arm/mach-exynos4/Kconfig
> +++ b/arch/arm/mach-exynos4/Kconfig
> @@ -15,6 +15,11 @@ config CPU_EXYNOS4210
> ? ? ? ?help
> ? ? ? ? ?Enable EXYNOS4210 CPU support
>
> +config EXYNOS4_MCT
> + ? ? ? bool "Kernel timer support by MCT"
> + ? ? ? help
> + ? ? ? ? Use MCT (Multi Core Timer) as kernel timers
> +
> ?config EXYNOS4_DEV_PD
> ? ? ? ?bool
> ? ? ? ?help
> diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
> index 0558235..de20b91 100644
> --- a/arch/arm/mach-exynos4/Makefile
> +++ b/arch/arm/mach-exynos4/Makefile
> @@ -13,11 +13,18 @@ obj- ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?:=
> ?# Core support for EXYNOS4 system
>
> ?obj-$(CONFIG_CPU_EXYNOS4210) ? += cpu.o init.o clock.o irq-combiner.o
> -obj-$(CONFIG_CPU_EXYNOS4210) ? += setup-i2c0.o time.o gpiolib.o irq-eint.o dma.o
> +obj-$(CONFIG_CPU_EXYNOS4210) ? += setup-i2c0.o gpiolib.o irq-eint.o dma.o
> ?obj-$(CONFIG_CPU_FREQ) ? ? ? ? += cpufreq.o
>
> ?obj-$(CONFIG_SMP) ? ? ? ? ? ? ?+= platsmp.o headsmp.o
> -obj-$(CONFIG_LOCAL_TIMERS) ? ? += localtimer.o
> +
> +ifeq ($(CONFIG_EXYNOS4_MCT),y)
> +obj-y ? ? ? ? ? ? ? ? ? ? ? ? ?+= mct.o
> +else
> +obj-y ? ? ? ? ? ? ? ? ? ? ? ? ?+= time.o
> +obj-$(CONFIG_LOCAL_TIMERS) ? ? += localtimer.o
> +endif
> +
> ?obj-$(CONFIG_HOTPLUG_CPU) ? ? ?+= hotplug.o
>
> ?# machine support
> diff --git a/arch/arm/mach-exynos4/include/mach/regs-mct.h b/arch/arm/mach-exynos4/include/mach/regs-mct.h
> new file mode 100644
> index 0000000..ca9c843
> --- /dev/null
> +++ b/arch/arm/mach-exynos4/include/mach/regs-mct.h
> @@ -0,0 +1,52 @@
> +/* arch/arm/mach-exynos4/include/mach/regs-mct.h
> + *
> + * Copyright (c) 2011 Samsung Electronics Co., Ltd.
> + * ? ? ? ? ? ? http://www.samsung.com
> + *
> + * EXYNOS4 MCT configutation
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#ifndef __ASM_ARCH_REGS_MCT_H
> +#define __ASM_ARCH_REGS_MCT_H __FILE__
> +
> +#include <mach/map.h>
> +
> +#define EXYNOS4_MCTREG(x) ? ? ? ? ? ? ?(S5P_VA_SYSTIMER + (x))
> +
> +#define EXYNOS4_MCT_G_CNT_L ? ? ? ? ? ?EXYNOS4_MCTREG(0x100)
> +#define EXYNOS4_MCT_G_CNT_U ? ? ? ? ? ?EXYNOS4_MCTREG(0x104)
> +#define EXYNOS4_MCT_G_CNT_WSTAT ? ? ? ? ? ? ? ?EXYNOS4_MCTREG(0x110)
> +
> +#define EXYNOS4_MCT_G_COMP0_L ? ? ? ? ?EXYNOS4_MCTREG(0x200)
> +#define EXYNOS4_MCT_G_COMP0_U ? ? ? ? ?EXYNOS4_MCTREG(0x204)
> +#define EXYNOS4_MCT_G_COMP0_ADD_INCR ? EXYNOS4_MCTREG(0x208)
> +
> +#define EXYNOS4_MCT_G_TCON ? ? ? ? ? ? EXYNOS4_MCTREG(0x240)
> +
> +#define EXYNOS4_MCT_G_INT_CSTAT ? ? ? ? ? ? ? ?EXYNOS4_MCTREG(0x244)
> +#define EXYNOS4_MCT_G_INT_ENB ? ? ? ? ?EXYNOS4_MCTREG(0x248)
> +#define EXYNOS4_MCT_G_WSTAT ? ? ? ? ? ?EXYNOS4_MCTREG(0x24C)
> +
> +#define EXYNOS4_MCT_L0_BASE ? ? ? ? ? ?EXYNOS4_MCTREG(0x300)
> +#define EXYNOS4_MCT_L1_BASE ? ? ? ? ? ?EXYNOS4_MCTREG(0x400)
> +
> +#define MCT_L_TCNTB_OFFSET ? ? ? ? ? ? (0x00)
> +#define MCT_L_ICNTB_OFFSET ? ? ? ? ? ? (0x08)
> +#define MCT_L_TCON_OFFSET ? ? ? ? ? ? ?(0x20)
> +#define MCT_L_INT_CSTAT_OFFSET ? ? ? ? (0x30)
> +#define MCT_L_INT_ENB_OFFSET ? ? ? ? ? (0x34)
> +#define MCT_L_WSTAT_OFFSET ? ? ? ? ? ? (0x40)
> +
> +#define MCT_G_TCON_START ? ? ? ? ? ? ? (1 << 8)
> +#define MCT_G_TCON_COMP0_AUTO_INC ? ? ?(1 << 1)
> +#define MCT_G_TCON_COMP0_ENABLE ? ? ? ? ? ? ? ?(1 << 0)
> +
> +#define MCT_L_TCON_INTERVAL_MODE ? ? ? (1 << 2)
> +#define MCT_L_TCON_INT_START ? ? ? ? ? (1 << 1)
> +#define MCT_L_TCON_TIMER_START ? ? ? ? (1 << 0)
> +
> +#endif /* __ASM_ARCH_REGS_MCT_H */
> diff --git a/arch/arm/mach-exynos4/mct.c b/arch/arm/mach-exynos4/mct.c
> new file mode 100644
> index 0000000..6bb4b50
> --- /dev/null
> +++ b/arch/arm/mach-exynos4/mct.c
> @@ -0,0 +1,421 @@
> +/* linux/arch/arm/mach-exynos4/mct.c
> + *
> + * Copyright (c) 2011 Samsung Electronics Co., Ltd.
> + * ? ? ? ? ? ? http://www.samsung.com
> + *
> + * EXYNOS4 MCT(Multi-Core Timer) support
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#include <linux/sched.h>
> +#include <linux/interrupt.h>
> +#include <linux/irq.h>
> +#include <linux/err.h>
> +#include <linux/clk.h>
> +#include <linux/clockchips.h>
> +#include <linux/platform_device.h>
> +#include <linux/delay.h>
> +#include <linux/percpu.h>
> +
> +#include <mach/map.h>
> +#include <mach/regs-mct.h>
> +#include <asm/mach/time.h>
> +
> +static unsigned long clk_cnt_per_tick;
> +static unsigned long clk_rate;
> +
> +struct mct_clock_event_device {
> + ? ? ? struct clock_event_device *evt;
> + ? ? ? void __iomem *base;
> +};
> +
> +struct mct_clock_event_device mct_tick[2];
> +
> +static void exynos4_mct_write(unsigned int value, void *addr)
> +{
> + ? ? ? void __iomem *stat_addr;
> + ? ? ? u32 mask;
> + ? ? ? u32 i;
> +
> + ? ? ? __raw_writel(value, addr);
> +
> + ? ? ? switch ((u32) addr) {
> + ? ? ? case (u32) EXYNOS4_MCT_G_TCON:
> + ? ? ? ? ? ? ? stat_addr = EXYNOS4_MCT_G_WSTAT;
> + ? ? ? ? ? ? ? mask = 1 << 16; ? ? ? ? /* G_TCON write status */
> + ? ? ? ? ? ? ? break;
> + ? ? ? case (u32) EXYNOS4_MCT_G_COMP0_L:
> + ? ? ? ? ? ? ? stat_addr = EXYNOS4_MCT_G_WSTAT;
> + ? ? ? ? ? ? ? mask = 1 << 0; ? ? ? ? ?/* G_COMP0_L write status */
> + ? ? ? ? ? ? ? break;
> + ? ? ? case (u32) EXYNOS4_MCT_G_COMP0_U:
> + ? ? ? ? ? ? ? stat_addr = EXYNOS4_MCT_G_WSTAT;
> + ? ? ? ? ? ? ? mask = 1 << 1; ? ? ? ? ?/* G_COMP0_U write status */
> + ? ? ? ? ? ? ? break;
> + ? ? ? case (u32) EXYNOS4_MCT_G_COMP0_ADD_INCR:
> + ? ? ? ? ? ? ? stat_addr = EXYNOS4_MCT_G_WSTAT;
> + ? ? ? ? ? ? ? mask = 1 << 2; ? ? ? ? ?/* G_COMP0_ADD_INCR write status */
> + ? ? ? ? ? ? ? break;
> + ? ? ? case (u32) EXYNOS4_MCT_G_CNT_L:
> + ? ? ? ? ? ? ? stat_addr = EXYNOS4_MCT_G_CNT_WSTAT;
> + ? ? ? ? ? ? ? mask = 1 << 0; ? ? ? ? ?/* G_CNT_L write status */
> + ? ? ? ? ? ? ? break;
> + ? ? ? case (u32) EXYNOS4_MCT_G_CNT_U:
> + ? ? ? ? ? ? ? stat_addr = EXYNOS4_MCT_G_CNT_WSTAT;
> + ? ? ? ? ? ? ? mask = 1 << 1; ? ? ? ? ?/* G_CNT_U write status */
> + ? ? ? ? ? ? ? break;
> + ? ? ? case (u32)(EXYNOS4_MCT_L0_BASE + MCT_L_TCON_OFFSET):
> + ? ? ? ? ? ? ? stat_addr = EXYNOS4_MCT_L0_BASE + MCT_L_WSTAT_OFFSET;
> + ? ? ? ? ? ? ? mask = 1 << 3; ? ? ? ? ?/* L0_TCON write status */
> + ? ? ? ? ? ? ? break;
> + ? ? ? case (u32)(EXYNOS4_MCT_L1_BASE + MCT_L_TCON_OFFSET):
> + ? ? ? ? ? ? ? stat_addr = EXYNOS4_MCT_L1_BASE + MCT_L_WSTAT_OFFSET;
> + ? ? ? ? ? ? ? mask = 1 << 3; ? ? ? ? ?/* L1_TCON write status */
> + ? ? ? ? ? ? ? break;
> + ? ? ? case (u32)(EXYNOS4_MCT_L0_BASE + MCT_L_TCNTB_OFFSET):
> + ? ? ? ? ? ? ? stat_addr = EXYNOS4_MCT_L0_BASE + MCT_L_WSTAT_OFFSET;
> + ? ? ? ? ? ? ? mask = 1 << 0; ? ? ? ? ?/* L0_TCNTB write status */
> + ? ? ? ? ? ? ? break;
> + ? ? ? case (u32)(EXYNOS4_MCT_L1_BASE + MCT_L_TCNTB_OFFSET):
> + ? ? ? ? ? ? ? stat_addr = EXYNOS4_MCT_L1_BASE + MCT_L_WSTAT_OFFSET;
> + ? ? ? ? ? ? ? mask = 1 << 0; ? ? ? ? ?/* L1_TCNTB write status */
> + ? ? ? ? ? ? ? break;
> + ? ? ? case (u32)(EXYNOS4_MCT_L0_BASE + MCT_L_ICNTB_OFFSET):
> + ? ? ? ? ? ? ? stat_addr = EXYNOS4_MCT_L0_BASE + MCT_L_WSTAT_OFFSET;
> + ? ? ? ? ? ? ? mask = 1 << 1; ? ? ? ? ?/* L0_ICNTB write status */
> + ? ? ? ? ? ? ? break;
> + ? ? ? case (u32)(EXYNOS4_MCT_L1_BASE + MCT_L_ICNTB_OFFSET):
> + ? ? ? ? ? ? ? stat_addr = EXYNOS4_MCT_L1_BASE + MCT_L_WSTAT_OFFSET;
> + ? ? ? ? ? ? ? mask = 1 << 1; ? ? ? ? ?/* L1_ICNTB write status */
> + ? ? ? ? ? ? ? break;
> + ? ? ? default:
> + ? ? ? ? ? ? ? return;
> + ? ? ? }
> +
> + ? ? ? /* Wait maximum 1 ms until written values are applied */
> + ? ? ? for (i = 0; i < loops_per_jiffy / 1000 * HZ; i++)
> + ? ? ? ? ? ? ? if (__raw_readl(stat_addr) & mask) {
> + ? ? ? ? ? ? ? ? ? ? ? __raw_writel(mask, stat_addr);
> + ? ? ? ? ? ? ? ? ? ? ? return;
> + ? ? ? ? ? ? ? }
> +
> + ? ? ? panic("MCT hangs after writing %d (addr:0x%08x)\n", value, (u32)addr);
> +}
> +
> +/* Clocksource handling */
> +static void exynos4_mct_frc_start(u32 hi, u32 lo)
> +{
> + ? ? ? u32 reg;
> +
> + ? ? ? exynos4_mct_write(lo, EXYNOS4_MCT_G_CNT_L);
> + ? ? ? exynos4_mct_write(hi, EXYNOS4_MCT_G_CNT_U);
> +
> + ? ? ? reg = __raw_readl(EXYNOS4_MCT_G_TCON);
> + ? ? ? reg |= MCT_G_TCON_START;
> + ? ? ? exynos4_mct_write(reg, EXYNOS4_MCT_G_TCON);
> +}
> +
> +static cycle_t exynos4_frc_read(struct clocksource *cs)
> +{
> + ? ? ? unsigned int lo, hi;
> + ? ? ? u32 hi2 = __raw_readl(EXYNOS4_MCT_G_CNT_U);
> +
> + ? ? ? do {
> + ? ? ? ? ? ? ? hi = hi2;
> + ? ? ? ? ? ? ? lo = __raw_readl(EXYNOS4_MCT_G_CNT_L);
> + ? ? ? ? ? ? ? hi2 = __raw_readl(EXYNOS4_MCT_G_CNT_U);
> + ? ? ? } while (hi != hi2);
> +
> + ? ? ? return ((cycle_t)hi << 32) | lo;
> +}
> +
> +struct clocksource mct_frc = {
> + ? ? ? .name ? ? ? ? ? = "mct-frc",
> + ? ? ? .rating ? ? ? ? = 400,
> + ? ? ? .read ? ? ? ? ? = exynos4_frc_read,
> + ? ? ? .mask ? ? ? ? ? = CLOCKSOURCE_MASK(64),
> + ? ? ? .flags ? ? ? ? ?= CLOCK_SOURCE_IS_CONTINUOUS,
> +};
> +
> +static void __init exynos4_clocksource_init(void)
> +{
> + ? ? ? exynos4_mct_frc_start(0, 0);
> +
> + ? ? ? if (clocksource_register_hz(&mct_frc, clk_rate))
> + ? ? ? ? ? ? ? panic("%s: can't register clocksource\n", mct_frc.name);
> +}
> +
> +static void exynos4_mct_comp0_stop(void)
> +{
> + ? ? ? unsigned int tcon;
> +
> + ? ? ? tcon = __raw_readl(EXYNOS4_MCT_G_TCON);
> + ? ? ? tcon &= ~(MCT_G_TCON_COMP0_ENABLE | MCT_G_TCON_COMP0_AUTO_INC);
> +
> + ? ? ? exynos4_mct_write(tcon, EXYNOS4_MCT_G_TCON);
> + ? ? ? exynos4_mct_write(0, EXYNOS4_MCT_G_INT_ENB);
> +}
> +
> +static void exynos4_mct_comp0_start(enum clock_event_mode mode,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? unsigned long cycles)
> +{
> + ? ? ? unsigned int tcon;
> + ? ? ? cycle_t comp_cycle;
> +
> + ? ? ? tcon = __raw_readl(EXYNOS4_MCT_G_TCON);
> +
> + ? ? ? if (mode == CLOCK_EVT_MODE_PERIODIC) {
> + ? ? ? ? ? ? ? tcon |= MCT_G_TCON_COMP0_AUTO_INC;
> + ? ? ? ? ? ? ? exynos4_mct_write(cycles, EXYNOS4_MCT_G_COMP0_ADD_INCR);
> + ? ? ? }
> +
> + ? ? ? comp_cycle = exynos4_frc_read(&mct_frc) + cycles;
> + ? ? ? exynos4_mct_write((u32)comp_cycle, EXYNOS4_MCT_G_COMP0_L);
> + ? ? ? exynos4_mct_write((u32)(comp_cycle >> 32), EXYNOS4_MCT_G_COMP0_U);
> +
> + ? ? ? exynos4_mct_write(0x1, EXYNOS4_MCT_G_INT_ENB);
> +
> + ? ? ? tcon |= MCT_G_TCON_COMP0_ENABLE;
> + ? ? ? exynos4_mct_write(tcon , EXYNOS4_MCT_G_TCON);
> +}
> +
> +static int exynos4_comp_set_next_event(unsigned long cycles,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?struct clock_event_device *evt)
> +{
> + ? ? ? exynos4_mct_comp0_start(evt->mode, cycles);
> +
> + ? ? ? return 0;
> +}
> +
> +static void exynos4_comp_set_mode(enum clock_event_mode mode,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? struct clock_event_device *evt)
> +{
> + ? ? ? exynos4_mct_comp0_stop();
> +
> + ? ? ? switch (mode) {
> + ? ? ? case CLOCK_EVT_MODE_PERIODIC:
> + ? ? ? ? ? ? ? exynos4_mct_comp0_start(mode, clk_cnt_per_tick);
> + ? ? ? ? ? ? ? break;
> +
> + ? ? ? case CLOCK_EVT_MODE_ONESHOT:
> + ? ? ? case CLOCK_EVT_MODE_UNUSED:
> + ? ? ? case CLOCK_EVT_MODE_SHUTDOWN:
> + ? ? ? case CLOCK_EVT_MODE_RESUME:
> + ? ? ? ? ? ? ? break;
> + ? ? ? }
> +}
> +
> +static struct clock_event_device mct_comp_device = {
> + ? ? ? .name ? ? ? ? ? = "mct-comp",
> + ? ? ? .features ? ? ? = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
> + ? ? ? .rating ? ? ? ? = 250,
> + ? ? ? .set_next_event = exynos4_comp_set_next_event,
> + ? ? ? .set_mode ? ? ? = exynos4_comp_set_mode,
> +};
> +
> +static irqreturn_t exynos4_mct_comp_isr(int irq, void *dev_id)
> +{
> + ? ? ? struct clock_event_device *evt = dev_id;
> +
> + ? ? ? exynos4_mct_write(0x1, EXYNOS4_MCT_G_INT_CSTAT);
> +
> + ? ? ? evt->event_handler(evt);
> +
> + ? ? ? return IRQ_HANDLED;
> +}
> +
> +static struct irqaction mct_comp_event_irq = {
> + ? ? ? .name ? ? ? ? ? = "mct_comp_irq",
> + ? ? ? .flags ? ? ? ? ?= IRQF_TIMER | IRQF_IRQPOLL,
> + ? ? ? .handler ? ? ? ?= exynos4_mct_comp_isr,
> + ? ? ? .dev_id ? ? ? ? = &mct_comp_device,
> +};
> +
> +static void exynos4_clockevent_init(void)
> +{
> + ? ? ? clk_cnt_per_tick = clk_rate / 2 / HZ;
> +
> + ? ? ? clockevents_calc_mult_shift(&mct_comp_device, clk_rate / 2, 5);
> + ? ? ? mct_comp_device.max_delta_ns =
> + ? ? ? ? ? ? ? clockevent_delta2ns(0xffffffff, &mct_comp_device);
> + ? ? ? mct_comp_device.min_delta_ns =
> + ? ? ? ? ? ? ? clockevent_delta2ns(0xf, &mct_comp_device);
> + ? ? ? mct_comp_device.cpumask = cpumask_of(0);
> + ? ? ? clockevents_register_device(&mct_comp_device);
> +
> + ? ? ? setup_irq(IRQ_MCT_G0, &mct_comp_event_irq);
> +}
> +
> +#ifdef CONFIG_LOCAL_TIMERS
> +/* Clock event handling */
> +static void exynos4_mct_tick_stop(struct mct_clock_event_device *mevt)
> +{
> + ? ? ? unsigned long tmp;
> + ? ? ? unsigned long mask = MCT_L_TCON_INT_START | MCT_L_TCON_TIMER_START;
> + ? ? ? void __iomem *addr = mevt->base + MCT_L_TCON_OFFSET;
> +
> + ? ? ? tmp = __raw_readl(addr);
> + ? ? ? if (tmp & mask) {
> + ? ? ? ? ? ? ? tmp &= ~mask;
> + ? ? ? ? ? ? ? exynos4_mct_write(tmp, addr);
> + ? ? ? }
> +}
> +
> +static void exynos4_mct_tick_start(unsigned long cycles,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?struct mct_clock_event_device *mevt)
> +{
> + ? ? ? unsigned long tmp;
> +
> + ? ? ? exynos4_mct_tick_stop(mevt);
> +
> + ? ? ? tmp = (1 << 31) | cycles; ? ? ? /* MCT_L_UPDATE_ICNTB */
> +
> + ? ? ? /* update interrupt count buffer */
> + ? ? ? exynos4_mct_write(tmp, mevt->base + MCT_L_ICNTB_OFFSET);
> +
> + ? ? ? /* enable MCT tick interupt */
> + ? ? ? exynos4_mct_write(0x1, mevt->base + MCT_L_INT_ENB_OFFSET);
> +
> + ? ? ? tmp = __raw_readl(mevt->base + MCT_L_TCON_OFFSET);
> + ? ? ? tmp |= MCT_L_TCON_INT_START | MCT_L_TCON_TIMER_START |
> + ? ? ? ? ? ? ?MCT_L_TCON_INTERVAL_MODE;
> + ? ? ? exynos4_mct_write(tmp, mevt->base + MCT_L_TCON_OFFSET);
> +}
> +
> +static int exynos4_tick_set_next_event(unsigned long cycles,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?struct clock_event_device *evt)
> +{
> + ? ? ? struct mct_clock_event_device *mevt = &mct_tick[smp_processor_id()];
> +
> + ? ? ? exynos4_mct_tick_start(cycles, mevt);
> +
> + ? ? ? return 0;
> +}
> +
> +static inline void exynos4_tick_set_mode(enum clock_event_mode mode,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?struct clock_event_device *evt)
> +{
> + ? ? ? struct mct_clock_event_device *mevt = &mct_tick[smp_processor_id()];
> +
> + ? ? ? exynos4_mct_tick_stop(mevt);
> +
> + ? ? ? switch (mode) {
> + ? ? ? case CLOCK_EVT_MODE_PERIODIC:
> + ? ? ? ? ? ? ? exynos4_mct_tick_start(clk_cnt_per_tick, mevt);
> + ? ? ? ? ? ? ? break;
> +
> + ? ? ? case CLOCK_EVT_MODE_ONESHOT:
> + ? ? ? case CLOCK_EVT_MODE_UNUSED:
> + ? ? ? case CLOCK_EVT_MODE_SHUTDOWN:
> + ? ? ? case CLOCK_EVT_MODE_RESUME:
> + ? ? ? ? ? ? ? break;
> + ? ? ? }
> +}
> +
> +static irqreturn_t exynos4_mct_tick_isr(int irq, void *dev_id)
> +{
> + ? ? ? struct mct_clock_event_device *mevt = dev_id;
> + ? ? ? struct clock_event_device *evt = mevt->evt;
> +
> + ? ? ? /*
> + ? ? ? ?* This is for supporting oneshot mode.
> + ? ? ? ?* Mct would generate interrupt periodically
> + ? ? ? ?* without explicit stopping.
> + ? ? ? ?*/
> + ? ? ? if (evt->mode != CLOCK_EVT_MODE_PERIODIC)
> + ? ? ? ? ? ? ? exynos4_mct_tick_stop(mevt);
> +
> + ? ? ? /* Clear the MCT tick interrupt */
> + ? ? ? exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET);
> +
> + ? ? ? evt->event_handler(evt);
> +
> + ? ? ? return IRQ_HANDLED;
> +}
> +
> +static struct irqaction mct_tick0_event_irq = {
> + ? ? ? .name ? ? ? ? ? = "mct_tick0_irq",
> + ? ? ? .flags ? ? ? ? ?= IRQF_TIMER | IRQF_NOBALANCING,
> + ? ? ? .handler ? ? ? ?= exynos4_mct_tick_isr,
> +};
> +
> +static struct irqaction mct_tick1_event_irq = {
> + ? ? ? .name ? ? ? ? ? = "mct_tick1_irq",
> + ? ? ? .flags ? ? ? ? ?= IRQF_TIMER | IRQF_NOBALANCING,
> + ? ? ? .handler ? ? ? ?= exynos4_mct_tick_isr,
> +};
> +
> +static void exynos4_mct_tick_init(struct clock_event_device *evt)
> +{
> + ? ? ? unsigned int cpu = smp_processor_id();
> +
> + ? ? ? mct_tick[cpu].evt = evt;
> +
> + ? ? ? if (cpu == 0) {
> + ? ? ? ? ? ? ? mct_tick[cpu].base = EXYNOS4_MCT_L0_BASE;
> + ? ? ? ? ? ? ? evt->name = "mct_tick0";
> + ? ? ? } else {
> + ? ? ? ? ? ? ? mct_tick[cpu].base = EXYNOS4_MCT_L1_BASE;
> + ? ? ? ? ? ? ? evt->name = "mct_tick1";
> + ? ? ? }
> +
> + ? ? ? evt->cpumask = cpumask_of(cpu);
> + ? ? ? evt->set_next_event = exynos4_tick_set_next_event;
> + ? ? ? evt->set_mode = exynos4_tick_set_mode;
> + ? ? ? evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
> + ? ? ? evt->rating = 450;
> +
> + ? ? ? clockevents_calc_mult_shift(evt, clk_rate / 2, 5);
> + ? ? ? evt->max_delta_ns =
> + ? ? ? ? ? ? ? clockevent_delta2ns(0x7fffffff, evt);
> + ? ? ? evt->min_delta_ns =
> + ? ? ? ? ? ? ? clockevent_delta2ns(0xf, evt);
> +
> + ? ? ? clockevents_register_device(evt);
> +
> + ? ? ? exynos4_mct_write(0x1, mct_tick[cpu].base + MCT_L_TCNTB_OFFSET);
> +
> + ? ? ? if (cpu == 0) {
> + ? ? ? ? ? ? ? mct_tick0_event_irq.dev_id = &mct_tick[cpu];
> + ? ? ? ? ? ? ? setup_irq(IRQ_MCT_L0, &mct_tick0_event_irq);
> + ? ? ? } else {
> + ? ? ? ? ? ? ? mct_tick1_event_irq.dev_id = &mct_tick[cpu];
> + ? ? ? ? ? ? ? irq_set_affinity(IRQ_MCT1, cpumask_of(1));
> + ? ? ? ? ? ? ? setup_irq(IRQ_MCT_L1, &mct_tick1_event_irq);
> + ? ? ? }
> +}
> +
> +/* Setup the local clock events for a CPU */
> +void __cpuinit local_timer_setup(struct clock_event_device *evt)
> +{
> + ? ? ? exynos4_mct_tick_init(evt);
> +}
> +
> +int local_timer_ack(void)
> +{
> + ? ? ? return 0;
> +}
> +
> +#endif /* CONFIG_LOCAL_TIMERS */
> +
> +static void __init exynos4_timer_resources(void)
> +{
> + ? ? ? struct clk *mct_clk;
> + ? ? ? mct_clk = clk_get(NULL, "xtal");
> +
> + ? ? ? clk_rate = clk_get_rate(mct_clk);
> +}
> +
> +static void __init exynos4_timer_init(void)
> +{
> + ? ? ? exynos4_timer_resources();
> + ? ? ? exynos4_clocksource_init();
> + ? ? ? exynos4_clockevent_init();
> +}
> +
> +struct sys_timer exynos4_timer = {
> + ? ? ? .init ? ? ? ? ? = exynos4_timer_init,
> +};
> --
> 1.7.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* [PATCH 0/4] Support for device-tree appended to zImage
From: John Bonesio @ 2011-03-01 3:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110301025836.GA3920@S2100-06.ap.freescale.net>
Hi Shawn,
I'm using Grant's tree with Nicolas Pitre's patch to the compressed
image wrapper. His patches went out to the ARM list and I'm told they
were accepted. These patches may not yet be in Grant's tree. These
patches are titled:
[PATCH 1/2] ARM: improvements to compressed/head.S
[PATCH 2/2] ARM: remove the 4x expansion presumption while decompressing
the kernel
Grant, is there a branch in your tree that people should be using, or
should be they applying both sets of patches?
- John
On 02/28/2011 06:58 PM, Shawn Guo wrote:
> Hi John,
>
> On Mon, Feb 28, 2011 at 03:33:18PM -0800, John Bonesio wrote:
>> The following series support for device tree binary blobs (dtb) that are
>> appended to the compressed kernel image (zImage).
>>
>> Having appended dtb data is not required to boot with a device tree. If no dtb
>> data is appended to zImage, the kernel will boot using prior methods.
>>
>> ---
>>
>> John Bonesio (4):
>> ARM:boot:device tree: Allow the device tree binary to be appended to zImage
>> ARM:boot:device tree: Merge specific atags into the device tree
>> ARM:boot:device tree: Add puthex routine for use in the boot wrapper
>> ARM:boot:device tree: Allow multiple device trees to be appended to zImage
>>
>>
>> arch/arm/Kconfig | 7 ++
>> arch/arm/boot/compressed/Makefile | 31 +++++++-
>> arch/arm/boot/compressed/atags.c | 70 +++++++++++++++++++
>> arch/arm/boot/compressed/head.S | 136 +++++++++++++++++++++++++++++++++++--
>> arch/arm/boot/compressed/misc.c | 134 ++++++++++++++++++++++++++++++++++++
>> 5 files changed, 365 insertions(+), 13 deletions(-)
>> create mode 100644 arch/arm/boot/compressed/atags.c
>>
> I'm trying to test and use it. But it does not apply against any tree
> that I can find, neither mainline nor Grant's tree. Need rebasing?
>
^ permalink raw reply
* [PATCH 4/4] msm: scm: Get cacheline size from CTR
From: Stephen Boyd @ 2011-03-01 4:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.LFD.2.00.1102242056010.2701@localhost6.localdomain6>
On 02/24/2011 11:56 AM, Thomas Gleixner wrote:
> On Thu, 24 Feb 2011, Stephen Boyd wrote:
>
>>
>> I definitely don't want to do it for every loop. I'm fine with getting
>> it every scm_call() invocation though.
>>
>> For now, I'll pull the end and cacheline_size variables out of the
>> do-while loop.
>
> Why not do it correct right away and retrieve it in an __init
> function?
That would require an early_initcall, so hopefully that is fine.
I wonder why the generic arm v7 cache operations don't do the same thing
and store the dcache line size somewhere. Every dma operation is
essentially calling dcache_line_size(). Perhaps some generic arm code
should be determining the dcache line size really early on and storing
it in the proc_info_list? Then both the dma code and scm code could
query the processor for the dcache line size with something like
cpu_dcache_line_size?
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
^ permalink raw reply
* [RFC] device.h: add device_set_platdata routine
From: Viresh Kumar @ 2011-03-01 4:33 UTC (permalink / raw)
To: linux-arm-kernel
device.h supports device_get_platdata but doesn't support device_set_platdata.
This routine is required by platforms in which device structure is declared
in a machine specific file and platform data comes from board specific file.
This will be used by SPEAr patches sent in separate patch series.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
include/linux/device.h | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/include/linux/device.h b/include/linux/device.h
index 1bf5cf0..6ce0f20 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -576,6 +576,11 @@ static inline void *dev_get_platdata(const struct device *dev)
return dev->platform_data;
}
+static inline void dev_set_platdata(struct device *dev, void *platdata)
+{
+ dev->platform_data = platdata;
+}
+
/*
* Manual binding of a device to driver. See drivers/base/bus.c
* for information on use.
--
1.7.2.2
^ permalink raw reply related
* [PATCH v6 1/1] PRUSS UIO driver support
From: TK, Pratheesh Gangadhar @ 2011-03-01 4:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228212638.GB16806@local>
Hi,
> -----Original Message-----
> From: Hans J. Koch [mailto:hjk at hansjkoch.de]
> Sent: Tuesday, March 01, 2011 2:57 AM
> To: TK, Pratheesh Gangadhar
> Cc: linux-kernel at vger.kernel.org; hjk at hansjkoch.de; gregkh at suse.de;
> tglx at linutronix.de; sshtylyov at mvista.com; arnd at arndb.de; Chatterjee, Amit;
> davinci-linux-open-source at linux.davincidsp.com; linux-arm-
> kernel at lists.infradead.org
> Subject: Re: [PATCH v6 1/1] PRUSS UIO driver support
>
> On Tue, Mar 01, 2011 at 02:31:35AM +0530, Pratheesh Gangadhar wrote:
> > +
> > + /* Register PRUSS IRQ lines */
> > + p->irq = IRQ_DA8XX_EVTOUT0 + cnt;
> > + p->handler = pruss_handler;
> > +
> > + ret = uio_register_device(&dev->dev, p);
> > +
> > + if (ret < 0)
> > + goto out_free;
> > + }
> > +
> > + spin_lock_init(&lock);
>
> That's too late. uio_register_device() enables the irq, and your spin_lock
> is not ready at that time.
This is ok in this context as "modprobe uio_pruss" is pre-requisite for
running PRUSS firmware and without firmware running PRUSS won't
generate interrupts. Actually PRUSS INTC is not setup till we start
user application.
Thanks,
Pratheesh
^ permalink raw reply
* [PATCHv5 0/3] Introduce the /proc/socinfo and use it to export OMAP data
From: Saravana Kannan @ 2011-03-01 4:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4D6B78BF.1020102@stericsson.com>
On 02/28/2011 02:28 AM, Maxime Coquelin wrote:
> Hello Eduardo,
>
> On 02/16/2011 12:57 PM, Eduardo Valentin wrote:
>>> Eduardo, what has happened to this patchset?
>> Got forgotten :-(. Unfortunately I didn't pushed it hard enough.
> I propose to refactor your patchset, moving from procfs to sysfs.
>>> Do you want help in picking it up and try to polish it up?
>> Yeah, but it would need a refactoring. IIRC, result of last discussion
>> was that we should not mess with /proc. So, maybe moving back
>> to something under sysfs. Perhaps /sys/devices/soc or so?
> About the location of this new sysfs entry, where do you think it should
> be?
> I propose to create a new directory named "soc" in /sys/devices/system/.
>
> As platform vendors have several/different kind of IDs to export to
> sysfs, I propose each vendor to create file entries related to their IDs
> (eg. /sys/devices/system/soc/idcode for OMAP platforms).
I think the path /sys/devices/system/soc/ will work for the MSM too. I
would have ideally liked it to be /sys/devices/system/soc/msm,
/sys/devices/system/soc/omap, etc, but we can't get to pick names for
devices under a class. So, we can make do with /sys/devices/system/soc/.
> However, I think we should have a common file entry to export the unique
> ID of the platforms. Indeed, user-space applications should have a
> unified way to get this kind of ID, regardless of the platform (eg.
> /sys/devices/system/soc/unique_id).
I like the idea of have a common file across all implementations that
will let user space identify what implementation is exporting the other
files and how to interpret them.
I would like to propose an "arch" file to identify the arch the soc info
file are for. I'm guessing within an arch, the soc files would mostly be
the same? If there are other minor differences, we can let the arch
specific code deal with how the files are interpreted.
Does "arch" work for everyone?
Thanks,
Saravana
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
^ permalink raw reply
* [PATCH 2/5] ARM: gic: Add distributor and interface enable/disable accessory api
From: Santosh Shilimkar @ 2011-03-01 5:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1295859080-15259-3-git-send-email-santosh.shilimkar@ti.com>
> -----Original Message-----
> From: Santosh Shilimkar [mailto:santosh.shilimkar at ti.com]
> Sent: Monday, January 24, 2011 2:21 PM
> To: linux-arm-kernel at lists.infradead.org
> Cc: linux-omap at vger.kernel.org; ccross at android.com;
> catalin.marinas at arm.com; linux at arm.linux.org.uk;
> linus.ml.walleij at gmail.com; Santosh Shilimkar; Russell King
> Subject: [PATCH 2/5] ARM: gic: Add distributor and interface
> enable/disable accessory api
>
> The power management code needs to have access to enable/disable the
> gic cpu interface and distributor based on targetted low power
> states.
>
> This patch adds and exports one API each for distributor and cpu
> interface enable/disable.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
> ---
As per off-the list discussion with Russell, I am going to drop
this patch for time being and handle this in OMAP code instead
till common GIC code refactoring is sorted out.
^ permalink raw reply
* [PATCH resend] omap: Fix linker error in drivers/video/omap/lcd_2430sdp.c
From: Tomi Valkeinen @ 2011-03-01 6:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110301013928.GL20560@atomide.com>
On Mon, 2011-02-28 at 19:39 -0600, Tony Lindgren wrote:
> * Tomi Valkeinen <tomi.valkeinen@ti.com> [110228 07:07]:
> >
> > Well, it's a bit ugly, but I'm fine with it. It's for the old omapfb,
> > which hopefully nobody uses anymore (right =), and there's no simple way
> > to make it modular and neat.
>
> How about let's make mach-omap2 boards all use the new code?
> That way the old code can be omap1 only.
That has been my long term plan, but I've never had time to start
working on it. Some (many?) of the old panel drivers are trivial to
port, needs just copying the panel timings.
Some are much more complex, and porting them without having the hardware
may be a bit of a guesswork. But perhaps we can find testers for those
after the code has been ported.
Tomi
^ permalink raw reply
* [PATCH 1/2] ARM imx53: add pwm devices support
From: Jason Chen @ 2011-03-01 6:30 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Jason Chen <b02280@freescale.com>
---
arch/arm/mach-mx5/clock-mx51-mx53.c | 2 ++
arch/arm/mach-mx5/devices-imx53.h | 4 ++++
arch/arm/mach-mx5/devices.c | 10 ++++++++++
arch/arm/mach-mx5/devices.h | 2 ++
arch/arm/plat-mxc/devices/Kconfig | 1 +
arch/arm/plat-mxc/devices/platform-mxc_pwm.c | 9 +++++++++
arch/arm/plat-mxc/pwm.c | 3 ++-
7 files changed, 30 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 8164b1d..e18807b 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1338,6 +1338,8 @@ static struct clk_lookup mx53_lookups[] = {
_REGISTER_CLOCK("imx53-cspi.0", NULL, cspi_clk)
_REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk)
_REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk)
+ _REGISTER_CLOCK("mxc_pwm.0", "pwm", pwm1_clk)
+ _REGISTER_CLOCK("mxc_pwm.1", "pwm", pwm2_clk)
};
static void clk_tree_init(void)
diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h
index 9251008..5a1d6c9 100644
--- a/arch/arm/mach-mx5/devices-imx53.h
+++ b/arch/arm/mach-mx5/devices-imx53.h
@@ -33,3 +33,7 @@ extern const struct imx_spi_imx_data imx53_ecspi_data[] __initconst;
extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[] __initconst;
#define imx53_add_imx2_wdt(id, pdata) \
imx_add_imx2_wdt(&imx53_imx2_wdt_data[id])
+
+extern const struct imx_mxc_pwm_data imx53_mxc_pwm_data[] __initconst;
+#define imx53_add_mxc_pwm(id) \
+ imx_add_mxc_pwm(&imx53_mxc_pwm_data[id])
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c
index 153ada5..74aec2b 100644
--- a/arch/arm/mach-mx5/devices.c
+++ b/arch/arm/mach-mx5/devices.c
@@ -120,6 +120,16 @@ struct platform_device mxc_usbh2_device = {
},
};
+struct platform_device mxc_pwm1_backlight_device = {
+ .name = "pwm-backlight",
+ .id = 0,
+};
+
+struct platform_device mxc_pwm2_backlight_device = {
+ .name = "pwm-backlight",
+ .id = 1,
+};
+
static struct mxc_gpio_port mxc_gpio_ports[] = {
{
.chip.label = "gpio-0",
diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h
index 55a5129..a74cd97 100644
--- a/arch/arm/mach-mx5/devices.h
+++ b/arch/arm/mach-mx5/devices.h
@@ -3,3 +3,5 @@ extern struct platform_device mxc_usbh1_device;
extern struct platform_device mxc_usbh2_device;
extern struct platform_device mxc_usbdr_udc_device;
extern struct platform_device mxc_hsi2c_device;
+extern struct platform_device mxc_pwm1_backlight_device;
+extern struct platform_device mxc_pwm2_backlight_device;
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig
index b9ab1d5..aee9f4b 100644
--- a/arch/arm/plat-mxc/devices/Kconfig
+++ b/arch/arm/plat-mxc/devices/Kconfig
@@ -58,6 +58,7 @@ config IMX_HAVE_PLATFORM_MXC_NAND
config IMX_HAVE_PLATFORM_MXC_PWM
bool
+ default y if ARCH_MX21 || ARCH_MX25 || SOC_IMX27 || SOC_IMX51 || SOC_IMX53
config IMX_HAVE_PLATFORM_MXC_RNGA
bool
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
index b0c4ae2..18cfd07 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
+++ b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
@@ -49,6 +49,15 @@ const struct imx_mxc_pwm_data imx51_mxc_pwm_data[] __initconst = {
};
#endif /* ifdef CONFIG_SOC_IMX51 */
+#ifdef CONFIG_SOC_IMX53
+const struct imx_mxc_pwm_data imx53_mxc_pwm_data[] __initconst = {
+#define imx53_mxc_pwm_data_entry(_id, _hwid) \
+ imx_mxc_pwm_data_entry(MX53, _id, _hwid, SZ_16K)
+ imx53_mxc_pwm_data_entry(0, 1),
+ imx53_mxc_pwm_data_entry(1, 2),
+};
+#endif /* ifdef CONFIG_SOC_IMX53 */
+
struct platform_device *__init imx_add_mxc_pwm(
const struct imx_mxc_pwm_data *data)
{
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 7a61ef8..61dd8fb 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -57,7 +57,8 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
if (pwm == NULL || period_ns == 0 || duty_ns > period_ns)
return -EINVAL;
- if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) {
+ if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51() ||
+ cpu_is_mx53()) {
unsigned long long c;
unsigned long period_cycles, duty_cycles, prescale;
u32 cr;
--
1.7.1
^ permalink raw reply related
* [PATCH 2/2] ARM MX53_LOCO: add pwm backlight device
From: Jason Chen @ 2011-03-01 6:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298961018-8988-1-git-send-email-b02280@freescale.com>
Signed-off-by: Jason Chen <b02280@freescale.com>
---
arch/arm/mach-mx5/board-mx53_loco.c | 13 +++++++++++++
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 160899e..6c42185 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -23,6 +23,7 @@
#include <linux/fec.h>
#include <linux/delay.h>
#include <linux/gpio.h>
+#include <linux/pwm_backlight.h>
#include <mach/common.h>
#include <mach/hardware.h>
@@ -35,6 +36,7 @@
#include "crm_regs.h"
#include "devices-imx53.h"
+#include "devices.h"
#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6)
@@ -203,6 +205,13 @@ static const struct imxi2c_platform_data mx53_loco_i2c_data __initconst = {
.bitrate = 100000,
};
+static struct platform_pwm_backlight_data loco_pwm_backlight_data = {
+ .pwm_id = 1,
+ .max_brightness = 255,
+ .dft_brightness = 128,
+ .pwm_period_ns = 50000,
+};
+
static void __init mx53_loco_board_init(void)
{
mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads,
@@ -213,6 +222,10 @@ static void __init mx53_loco_board_init(void)
imx53_add_imx2_wdt(0, NULL);
imx53_add_imx_i2c(0, &mx53_loco_i2c_data);
imx53_add_imx_i2c(1, &mx53_loco_i2c_data);
+
+ imx53_add_mxc_pwm(1);
+ mxc_register_device(&mxc_pwm1_backlight_device,
+ &loco_pwm_backlight_data);
}
static void __init mx53_loco_timer_init(void)
--
1.7.1
^ permalink raw reply related
* [PATCH 1/1] GPIO support for WM8505
From: Tony Prisk @ 2011-03-01 6:38 UTC (permalink / raw)
To: linux-arm-kernel
This patch is to correct the GPIO support for WM8505.
Current version was written for VT8500, but the WM8505 registers are located in different locations.
Signed-off-by: Tony Prisk (linux at prisktech.co.nz)
diff --git a/arch/arm/mach-vt8500/Makefile b/arch/arm/mach-vt8500/Makefile
index c0ae083..7422e8a 100644
--- a/arch/arm/mach-vt8500/Makefile
+++ b/arch/arm/mach-vt8500/Makefile
@@ -1,7 +1,7 @@
-obj-y += clock.o devices.o gpio.o irq.o timer.o
+obj-y += clock.o devices.o irq.o timer.o
-obj-$(CONFIG_VTWM_VERSION_VT8500) += devices-vt8500.o clocks-vt8500.o
-obj-$(CONFIG_VTWM_VERSION_WM8505) += devices-wm8505.o clocks-wm8505.o
+obj-$(CONFIG_VTWM_VERSION_VT8500) += devices-vt8500.o clocks-vt8500.o gpio.o
+obj-$(CONFIG_VTWM_VERSION_WM8505) += devices-wm8505.o clocks-wm8505.o gpio-wm8505.o
obj-$(CONFIG_MACH_BV07) += bv07.o
obj-$(CONFIG_MACH_WM8505_7IN_NETBOOK) += wm8505_7in.o
diff --git a/arch/arm/mach-vt8500/gpio-wm8505.c b/arch/arm/mach-vt8500/gpio-wm8505.c
new file mode 100644
index 0000000..cd2eee9
--- /dev/null
+++ b/arch/arm/mach-vt8500/gpio-wm8505.c
@@ -0,0 +1,246 @@
+/* linux/arch/arm/mach-wm8505/gpio-wm8505.c
+ *
+ * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
+ * Copyright (C) 2011 Tony Prisk <linux@prisktech.co.nz>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/gpio.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include "devices.h"
+
+#define to_wm8505(__chip) container_of(__chip, struct wm8505_gpio_chip, chip)
+
+#define WM8505_ENABLE_REGS 0x40
+#define WM8505_DIRECTION_REGS 0x68
+#define WM8505_OUTVALUE_REGS 0x90
+#define WM8505_INVALUE_REGS 0xB8
+
+#define WM8505_EXT_REGOFF 0x24
+
+static void __iomem *regbase;
+
+struct wm8505_gpio_chip {
+ struct gpio_chip chip;
+ unsigned int shift;
+ unsigned int regoff;
+};
+
+static int gpio_to_irq_map[8];
+
+static int wm8505_muxed_gpio_request(struct gpio_chip *chip,
+ unsigned offset)
+{
+ struct wm8505_gpio_chip *wm8505_chip = to_wm8505(chip);
+ unsigned val = readl(regbase + WM8505_ENABLE_REGS + \
+ wm8505_chip->regoff);
+
+ val |= (1 << wm8505_chip->shift << offset);
+ writel(val, regbase + WM8505_ENABLE_REGS + wm8505_chip->regoff);
+
+ return 0;
+}
+
+static void wm8505_muxed_gpio_free(struct gpio_chip *chip,
+ unsigned offset)
+{
+ struct wm8505_gpio_chip *wm8505_chip = to_wm8505(chip);
+ unsigned val = readl(regbase + WM8505_ENABLE_REGS + \
+ wm8505_chip->regoff);
+
+ val &= ~(1 << wm8505_chip->shift << offset);
+ writel(val, regbase + WM8505_ENABLE_REGS + wm8505_chip->regoff);
+}
+
+static int wm8505_muxed_gpio_direction_input(struct gpio_chip *chip,
+ unsigned offset)
+{
+ struct wm8505_gpio_chip *wm8505_chip = to_wm8505(chip);
+ unsigned val = readl(regbase + WM8505_DIRECTION_REGS + \
+ wm8505_chip->regoff);
+
+ val &= ~(1 << wm8505_chip->shift << offset);
+ writel(val, regbase + WM8505_DIRECTION_REGS + wm8505_chip->regoff);
+
+ return 0;
+}
+
+static int wm8505_muxed_gpio_direction_output(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ struct wm8505_gpio_chip *wm8505_chip = to_wm8505(chip);
+ unsigned val = readl(regbase + WM8505_DIRECTION_REGS + \
+ wm8505_chip->regoff);
+
+ val |= (1 << wm8505_chip->shift << offset);
+ writel(val, regbase + WM8505_DIRECTION_REGS + wm8505_chip->regoff);
+
+ if (value) {
+ val = readl(regbase + WM8505_OUTVALUE_REGS + \
+ wm8505_chip->regoff);
+ val |= (1 << wm8505_chip->shift << offset);
+ writel(val, regbase + WM8505_OUTVALUE_REGS + \
+ wm8505_chip->regoff);
+ }
+ return 0;
+}
+
+static int wm8505_muxed_gpio_get_value(struct gpio_chip *chip,
+ unsigned offset)
+{
+ struct wm8505_gpio_chip *wm8505_chip = to_wm8505(chip);
+
+ return (readl(regbase + WM8505_INVALUE_REGS + wm8505_chip->regoff)
+ >> wm8505_chip->shift >> offset) & 1;
+}
+
+static void wm8505_muxed_gpio_set_value(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ struct wm8505_gpio_chip *wm8505_chip = to_wm8505(chip);
+ unsigned val = readl(regbase + WM8505_INVALUE_REGS + \
+ wm8505_chip->regoff);
+
+ if (value)
+ val |= (1 << wm8505_chip->shift << offset);
+ else
+ val &= ~(1 << wm8505_chip->shift << offset);
+
+ writel(val, regbase + WM8505_INVALUE_REGS + wm8505_chip->regoff);
+}
+
+#define WM8505_GPIO_BANK(__name, __shift, __off, __base, __num) \
+{ \
+ .chip = { \
+ .label = __name, \
+ .request = wm8505_muxed_gpio_request, \
+ .free = wm8505_muxed_gpio_free, \
+ .direction_input = wm8505_muxed_gpio_direction_input, \
+ .direction_output = wm8505_muxed_gpio_direction_output, \
+ .get = wm8505_muxed_gpio_get_value, \
+ .set = wm8505_muxed_gpio_set_value, \
+ .can_sleep = 0, \
+ .base = __base, \
+ .ngpio = __num, \
+ }, \
+ .shift = __shift, \
+ .regoff = __off, \
+}
+
+static struct wm8505_gpio_chip wm8505_muxed_gpios[] = {
+ WM8505_GPIO_BANK("uart0", 0, 0x20, 8, 4),
+ WM8505_GPIO_BANK("uart1", 4, 0x20, 12, 4),
+
+ WM8505_GPIO_BANK("spi0", 0, 0x1C, 16, 4),
+ WM8505_GPIO_BANK("spi1", 12, 0x1C, 20, 4),
+ WM8505_GPIO_BANK("spi2", 16, 0x1C, 24, 4),
+ WM8505_GPIO_BANK("sdmmc", 0, 0x0, 30, 8),
+
+ WM8505_GPIO_BANK("uart2", 8, 0x20, 38, 4),
+ WM8505_GPIO_BANK("uart3", 12, 0x20, 42, 4),
+ WM8505_GPIO_BANK("ac97", 0, 0x14, 48, 5),
+ WM8505_GPIO_BANK("spiflash", 0, 0x18, 53, 5),
+};
+
+static int wm8505_gpio_direction_input(struct gpio_chip *chip,
+ unsigned offset)
+{
+ unsigned val = readl(regbase + WM8505_DIRECTION_REGS + \
+ WM8505_EXT_REGOFF);
+
+ val &= ~(1 << offset);
+ writel(val, regbase + WM8505_DIRECTION_REGS + WM8505_EXT_REGOFF);
+ return 0;
+}
+
+static int wm8505_gpio_direction_output(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ unsigned val = readl(regbase + WM8505_DIRECTION_REGS + \
+ WM8505_EXT_REGOFF);
+
+ val |= (1 << offset);
+ writel(val, regbase + WM8505_DIRECTION_REGS + WM8505_EXT_REGOFF);
+
+ if (value) {
+ val = readl(regbase + WM8505_OUTVALUE_REGS + \
+ WM8505_EXT_REGOFF);
+ val |= (1 << offset);
+ writel(val, regbase + WM8505_OUTVALUE_REGS + \
+ WM8505_EXT_REGOFF);
+ }
+ return 0;
+}
+
+static int wm8505_gpio_get_value(struct gpio_chip *chip,
+ unsigned offset)
+{
+ u32 reg_tmp;
+ reg_tmp = readl(regbase + WM8505_INVALUE_REGS + WM8505_EXT_REGOFF);
+ return (reg_tmp >> offset) & 1;
+}
+
+static void wm8505_gpio_set_value(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ unsigned val = readl(regbase + WM8505_OUTVALUE_REGS + \
+ WM8505_EXT_REGOFF);
+
+ if (value)
+ val |= (1 << offset);
+ else
+ val &= ~(1 << offset);
+
+ writel(val, regbase + WM8505_OUTVALUE_REGS + WM8505_EXT_REGOFF);
+}
+
+static int wm8505_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+ if (offset > 7)
+ return -EINVAL;
+
+ return gpio_to_irq_map[offset];
+}
+
+static struct gpio_chip wm8505_external_gpios = {
+ .label = "extgpio",
+ .direction_input = wm8505_gpio_direction_input,
+ .direction_output = wm8505_gpio_direction_output,
+ .get = wm8505_gpio_get_value,
+ .set = wm8505_gpio_set_value,
+ .to_irq = wm8505_gpio_to_irq,
+ .can_sleep = 0,
+ .base = 0,
+ .ngpio = 8,
+};
+
+void __init wm8505_gpio_init(void)
+{
+ int i;
+
+ for (i = 0; i < 8; i++)
+ gpio_to_irq_map[i] = wmt_gpio_ext_irq[i];
+
+ regbase = ioremap(wmt_gpio_base, SZ_64K);
+ if (!regbase) {
+ printk(KERN_ERR "Failed to map MMIO registers for GPIO\n");
+ return;
+ }
+
+ gpiochip_add(&wm8505_external_gpios);
+
+ for (i = 0; i < ARRAY_SIZE(wm8505_muxed_gpios); i++)
+ gpiochip_add(&wm8505_muxed_gpios[i].chip);
+}
^ permalink raw reply related
* [PATCH 1/4] ARM:boot:device tree: Allow the device tree binary to be appended to zImage
From: Nicolas Pitre @ 2011-03-01 6:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228233327.24836.94530.stgit@riker>
On Mon, 28 Feb 2011, John Bonesio wrote:
> This patch provides the ability to boot using a device tree that is appended
> to the raw binary zImage (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
>
> Signed-off-by: John Bonesio <bones@secretlab.ca>
Comments below.
> ---
>
> arch/arm/Kconfig | 7 +++
> arch/arm/boot/compressed/head.S | 93 ++++++++++++++++++++++++++++++++++++---
> 2 files changed, 94 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index d8a330f..68fc640 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -1593,6 +1593,13 @@ config USE_OF
> help
> Include support for flattened device tree machine descriptions.
>
> +config ARM_APPENDED_DTB
> + bool "Use appended device tree blob" if OF
> + default n
The default is n by default, so you don't need to mention it.
Also this should depend on OF (CONFIG_OF).
> + help
> + With this option, the boot code will look for a dtb bianry
s/bianry/binary/
Since this is an help text for people who might not have a clue about
"dtb", it would be better to spell it out.
> + appended to zImage.
> +
> # Compressed boot loader in ROM. Yes, we really want to ask about
> # TEXT and BSS so we preserve their values in the config files.
> config ZBOOT_ROM_TEXT
> diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
> index 200625c..ae9f8c6 100644
> --- a/arch/arm/boot/compressed/head.S
> +++ b/arch/arm/boot/compressed/head.S
> @@ -210,6 +210,46 @@ restart: adr r0, LC0
> */
> mov r10, r6
> #endif
> +#ifdef CONFIG_ARM_APPENDED_DTB
> +/*
> + * r0 = delta
> + * r2 = BSS start
> + * r3 = BSS end
> + * r4 = final kernel address
> + * r5 = start of this image
> + * r6 = _edata
> + * r7 = architecture ID
> + * r8 = atags/device tree pointer
> + * r9 = size of decompressed image
> + * r10 = end of this image, including bss/stack/malloc space if non XIP
> + * r11 = GOT start
> + * r12 = GOT end
> + *
> + * if there are device trees (dtb) appended to zImage, advance r10 so that the
> + * dtb data will get relocated along with the kernel if necessary.
> + */
> +
> + ldr r12, [r6, #0]
> + ldr r1, =0xedfe0dd0 @ sig is 0xdoodfeed big endian
> + cmp r12, r1
> + bne dtb_check_done
> +
> + /* Get the dtb's size */
> + ldr r12, [r6, #4] @ device tree size
> +
> + /* convert r12 (dtb size) to little endian */
> + eor r1, r12, r12, ror #16
> + bic r1, r1, #0x00ff0000
> + mov r12, r12, ror #8
> + eor r12, r12, r1, lsr #8
> +
> + add r10, r10, r12
> + add r6, r6, r12
> +
> +dtb_check_done:
> + adr r1, LC0
> + ldr r12, [r1, #28] @ restore r12 (GOT end)
> +#endif
Instead of clobbering r12, you could use lr instead.
The byte swap on the size should be done only if __ARMEB__ is not
defined i.e. #ifndef __ARMEB__ ...
Also the DT signature should be endian aware.
> /*
> * Check to see if we will overwrite ourselves.
> @@ -223,8 +263,8 @@ restart: adr r0, LC0
> */
> cmp r4, r10
> bhs wont_overwrite
> - add r10, r4, r9
> - cmp r10, r5
> + add r1, r4, r9
> + cmp r1, r5
> bls wont_overwrite
>
> /*
> @@ -272,8 +312,10 @@ wont_overwrite:
> * r12 = GOT end
> * sp = stack pointer
> */
> - teq r0, #0
> - beq not_relocated
> + adr r1, LC0
> + ldr r6, [r1, #16] @ reload _edata value
Why?
> +
> + add r6, r6, r0
> add r11, r11, r0
> add r12, r12, r0
>
> @@ -288,12 +330,34 @@ wont_overwrite:
>
> /*
> * Relocate all entries in the GOT table.
> + * Bump bss entries to past image end (r10)
> */
> + sub r5, r10, r6 @ delta of image end and _edata
> + add r5, r5, #7 @ ... rounded up to a multiple
> + bic r5, r5, #7 @ ... of 8 bytes, so misaligned
> + @ ... GOT entry doesn't
> + @ ... overwrite end of image
This is wrong. You are going to displace the .bss pointers even if they
don't need that in the case where no dtb was found. And if a dtb was
found the displacement is going to be the size of the dtb _plus_ the
size of the .bss_stack instead of only the dtb size.
At this point you should only keep track of the .bss displacement in
addition to the delta offset in r0. And if both are equal to zero then
skip over the fixup loop as before.
> 1: ldr r1, [r11, #0] @ relocate entries in the GOT
> add r1, r1, r0 @ table. This fixes up the
> + cmp r1, r2
> + movcc r9, #0 @ r9 = entry < bss_start ? 0 :
> + movcs r9, #1 @ 1;
> + cmp r1, r3
> + movcs r9, #0 @ r9 = entry >= end ? 0 : t1;
> + cmp r9, #0
> + addne r1, r5 @ entry += r9 ? bss delta : 0;
The above would be much more elegant if written like this:
cmp r1, r2
cmphs r3, r1
addhi r1, r5
> str r1, [r11], #4 @ C references.
> cmp r11, r12
> blo 1b
> +
> + /* bump our bss registers too */
> + add r2, r2, r5
> + add r3, r3, r5
> +
> + /* bump the stack pinter, if at or above _edata */
> + cmp sp, r6
> + addcs sp, sp, r5
This will always be true as this is within #ifndef CONFIG_ZBOOT_ROM.
> #else
>
> /*
> @@ -309,7 +373,7 @@ wont_overwrite:
> blo 1b
> #endif
>
> -not_relocated: mov r0, #0
> + mov r0, #0
> 1: str r0, [r2], #4 @ clear bss
> str r0, [r2], #4
> str r0, [r2], #4
> @@ -317,8 +381,25 @@ not_relocated: mov r0, #0
> cmp r2, r3
> blo 1b
>
> +#ifdef CONFIG_ARM_APPENDED_DTB
> +/*
> + * The C runtime environment should now be set up sufficiently.
> + * r4 = kernel execution address
> + * r6 = _edata
> + * r7 = architecture ID
> + * r8 = atags pointer
> + *
> + * if there is a device tree (dtb) appended to zImage, set up to use this dtb.
> + */
> + ldr r0, [r6, #0]
> + ldr r1, =0xedfe0dd0 @ sig is 0xdoodfeed big endian
> + cmp r0, r1
> + bne keep_atags
> +
> + mov r8, r6 @ use the appended device tree
You should have updated r8 the moment you knew you have a valid dtb
earlier instead of duplicating this test here.
> +keep_atags:
> +#endif
> /*
> - * The C runtime environment should now be setup sufficiently.
> * Set up some pointers, and start decompressing.
> * r4 = kernel execution address
> * r7 = architecture ID
>
^ permalink raw reply
* [PATCH 2/4] ARM:boot:device tree: Merge specific atags into the device tree
From: Nicolas Pitre @ 2011-03-01 6:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228233337.24836.54594.stgit@riker>
On Mon, 28 Feb 2011, John Bonesio wrote:
> This patch is to merge in key atags into the appended device tree. An appended
> device tree is where the zImage has a dtb binary appended at the end of it. The
> boot code looks for an appended device tree, then looks for a few key atags
> passed in by the bootloader.
>
> The bootargs and memory size settings, if they exist, override existing values
> in the appended device tree. If these values don't currently exist in the
> appended device tree, they are added.
>
> Signed-off-by: John Bonesio <bones@secretlab.ca>
Is this really useful?
I understand this might be handy for testing purposes. But if your
bootloader does ATAG only then your hardware is likely to have support
in the kernel without device tree support just fine.
IOW I don't think this would be of much value in upstream.
> ---
>
> arch/arm/boot/compressed/Makefile | 31 ++++++++++++++--
> arch/arm/boot/compressed/atags.c | 70 +++++++++++++++++++++++++++++++++++++
> arch/arm/boot/compressed/head.S | 15 ++++++++
> arch/arm/boot/compressed/misc.c | 58 ++++++++++++++++++++++++++++++-
> 4 files changed, 167 insertions(+), 7 deletions(-)
> create mode 100644 arch/arm/boot/compressed/atags.c
>
> diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
> index 9d328be..7a2fe22 100644
> --- a/arch/arm/boot/compressed/Makefile
> +++ b/arch/arm/boot/compressed/Makefile
> @@ -49,6 +49,10 @@ ifeq ($(CONFIG_ARCH_SHMOBILE),y)
> OBJS += head-shmobile.o
> endif
>
> +ifeq ($(CONFIG_ARM_APPENDED_DTB),y)
> +OBJS += atags.o libfdt.a
> +endif
> +
> #
> # We now have a PIC decompressor implementation. Decompressors running
> # from RAM should not define ZTEXTADDR. Decompressors running directly
> @@ -80,7 +84,9 @@ ORIG_CFLAGS := $(KBUILD_CFLAGS)
> KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
> endif
>
> -EXTRA_CFLAGS := -fpic -fno-builtin
> +fdttree := $(srctree)/scripts/dtc/libfdt
> +
> +EXTRA_CFLAGS := -fpic -fno-builtin -I$(fdttree) -I$(obj)
> EXTRA_AFLAGS := -Wa,-march=all
>
> # Provide size of uncompressed kernel to the decompressor via a linker symbol.
> @@ -102,13 +108,28 @@ LDFLAGS_vmlinux += -X
> LDFLAGS_vmlinux += -T
>
> # For __aeabi_uidivmod
> -lib1funcs = $(obj)/lib1funcs.o
> +libfuncs = $(obj)/lib1funcs.o
>
> -$(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S FORCE
> - $(call cmd,shipped)
> +ifeq ($(CONFIG_ARM_APPENDED_DTB),y)
> +# For memchr, memmove, etc
> +libfuncs += $(obj)/memchr.o $(obj)/strchr.o $(obj)/memmove.o $(obj)/memzero.o
> +endif
> +
> +
> +libfdtheader := $(fdttree)/fdt.h $(fdttree)/libfdt.h $(fdttree)/libfdt_internal.h
> +libfdtobj := $(obj)/fdt.o $(obj)/fdt_ro.o $(obj)/fdt_wip.o $(obj)/fdt_sw.o $(obj)/fdt_rw.o $(obj)/fdt_strerror.o
> +
> +$(libfdtobj): $(obj)/%.o: $(srctree)/scripts/dtc/libfdt/%.c $(libfdtheader)
> + $(call cmd_cc_o_c)
> +
> +$(obj)/libfdt.a: $(libfdtobj)
> + $(AR) rcs $@ $^
> +
> +$(libfuncs): $(obj)/%.o: $(srctree)/arch/$(SRCARCH)/lib/%.S
> + $(call cmd_as_o_S)
>
> $(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \
> - $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) FORCE
> + $(addprefix $(obj)/, $(OBJS)) $(libfuncs) FORCE
> $(call if_changed,ld)
> @:
>
> diff --git a/arch/arm/boot/compressed/atags.c b/arch/arm/boot/compressed/atags.c
> new file mode 100644
> index 0000000..d19d53d
> --- /dev/null
> +++ b/arch/arm/boot/compressed/atags.c
> @@ -0,0 +1,70 @@
> +#include <stddef.h>
> +#include <asm/byteorder.h>
> +#include <asm/setup.h>
> +#include <fdt.h>
> +#include <libfdt.h>
> +
> +int dt_setprop(void *fdt, const char *node_path, const char *property,
> + uint32_t *val_array, int size)
> +{
> + int offset;
> +
> + offset = fdt_path_offset(fdt, node_path);
> + if (offset < 0)
> + return offset;
> +
> + return fdt_setprop(fdt, offset, property, val_array, size);
> +}
> +
> +int dt_setprop_string(void *fdt, const char *node_path,
> + const char *property, const char *string)
> +{
> + int offset;
> +
> + offset = fdt_path_offset(fdt, node_path);
> + if (offset < 0)
> + return offset;
> +
> + return fdt_setprop_string(fdt, offset, property, string);
> +}
> +
> +int dt_setprop_cell(void *fdt, const char *node_path,
> + const char *property, uint32_t val)
> +{
> + int offset;
> +
> + offset = fdt_path_offset(fdt, node_path);
> + if (offset < 0)
> + return offset;
> +
> + return fdt_setprop_cell(fdt, offset, property, val);
> +}
> +
> +void dt_merge_atags(void *dt, void *ataglist)
> +{
> + struct tag *atag = ataglist;
> + uint32_t mem_reg_property[2];
> + uint32_t initrd_start, initrd_size;
> + int rc;
> +
> + while (atag && atag->hdr.tag != 0) {
> + if (atag->hdr.tag == ATAG_CMDLINE) {
> + dt_setprop_string(dt, "/chosen", "bootargs",
> + atag->u.cmdline.cmdline);
> + } else if (atag->hdr.tag == ATAG_MEM) {
> + mem_reg_property[0] = cpu_to_fdt32(atag->u.mem.start);
> + mem_reg_property[1] = cpu_to_fdt32(atag->u.mem.size);
> + dt_setprop(dt, "/memory", "reg", mem_reg_property,
> + sizeof(mem_reg_property));
> + } else if (atag->hdr.tag == ATAG_INITRD2) {
> + initrd_start = atag->u.initrd.start;
> + initrd_size = atag->u.initrd.size;
> + dt_setprop_cell(dt, "/chosen", "linux,initrd-start",
> + initrd_start);
> + dt_setprop_cell(dt, "/chosen", "linux,initrd-end",
> + initrd_start + initrd_size);
> + }
> + atag = tag_next(atag);
> + }
> +}
> +
> diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
> index ae9f8c6..c2cdc5f 100644
> --- a/arch/arm/boot/compressed/head.S
> +++ b/arch/arm/boot/compressed/head.S
> @@ -211,6 +211,7 @@ restart: adr r0, LC0
> mov r10, r6
> #endif
> #ifdef CONFIG_ARM_APPENDED_DTB
> +#define MERGE_SPACE 1024
> /*
> * r0 = delta
> * r2 = BSS start
> @@ -243,6 +244,8 @@ restart: adr r0, LC0
> mov r12, r12, ror #8
> eor r12, r12, r1, lsr #8
>
> + add r12, r12, #MERGE_SPACE @ extra space to merge in atags
> +
> add r10, r10, r12
> add r6, r6, r12
>
> @@ -338,6 +341,8 @@ wont_overwrite:
> @ ... GOT entry doesn't
> @ ... overwrite end of image
>
> + add r5, r5, #MERGE_SPACE @ extra space to merge in atags
> +
> 1: ldr r1, [r11, #0] @ relocate entries in the GOT
> add r1, r1, r0 @ table. This fixes up the
> cmp r1, r2
> @@ -396,6 +401,16 @@ wont_overwrite:
> cmp r0, r1
> bne keep_atags
>
> +#ifndef CONFIG_ZBOOT_ROM
> + ldr r0, [r6, #4]
> + add r0, r0, #MERGE_SPACE
> + str r0, [r6, #4] @ increase device tree size
> +
> + /* merge in some key atags into the dtb */
> + mov r0, r6
> + mov r1, r8
> + bl dt_merge_atags
> +#endif
> mov r8, r6 @ use the appended device tree
> keep_atags:
> #endif
> diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
> index e653a6d..2d4da4c 100644
> --- a/arch/arm/boot/compressed/misc.c
> +++ b/arch/arm/boot/compressed/misc.c
> @@ -29,7 +29,7 @@ unsigned int __machine_arch_type;
> #include <asm/unaligned.h>
>
>
> -static void putstr(const char *ptr);
> +void putstr(const char *ptr);
> extern void error(char *x);
>
> #include <mach/uncompress.h>
> @@ -100,7 +100,7 @@ static void icedcc_putc(int ch)
> #define putc(ch) icedcc_putc(ch)
> #endif
>
> -static void putstr(const char *ptr)
> +void putstr(const char *ptr)
> {
> char c;
>
> @@ -114,6 +114,60 @@ static void putstr(const char *ptr)
> }
>
>
> +#ifdef CONFIG_ARM_APPENDED_DTB
> +/**
> + * strlen - Find the length of a string
> + * @s: The string to be sized
> + */
> +size_t strlen(const char *s)
> +{
> + const char *sc;
> +
> + for (sc = s; *sc != '\0'; ++sc)
> + /* nothing */;
> + return sc - s;
> +}
> +
> +/**
> + * strcmp - Compare two strings
> + * @cs: One string
> + * @ct: Another string
> + */
> +#undef strcmp
> +int strcmp(const char *cs, const char *ct)
> +{
> + unsigned char c1, c2;
> +
> + while (1) {
> + c1 = *cs++;
> + c2 = *ct++;
> + if (c1 != c2)
> + return c1 < c2 ? -1 : 1;
> + if (!c1)
> + break;
> + }
> + return 0;
> +}
> +
> +/**
> + * memcmp - Compare two areas of memory
> + * @cs: One area of memory
> + * @ct: Another area of memory
> + * @count: The size of the area.
> + */
> +#undef memcmp
> +int memcmp(const void *cs, const void *ct, size_t count)
> +{
> + const unsigned char *su1, *su2;
> + int res = 0;
> +
> + for (su1 = cs, su2 = ct; 0 < count; ++su1, ++su2, count--)
> + if ((res = *su1 - *su2) != 0)
> + break;
> + return res;
> +}
> +#endif
> +
> void *memcpy(void *__dest, __const void *__src, size_t __n)
> {
> int i = 0;
>
^ permalink raw reply
* [PATCH 4/4] ARM:boot:device tree: Allow multiple device trees to be appended to zImage
From: Nicolas Pitre @ 2011-03-01 6:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228233355.24836.7740.stgit@riker>
On Mon, 28 Feb 2011, John Bonesio wrote:
> This patch allows mutliple device tree binaries to be appended to zImage.
Huh? Why would you do that?
Nicolas
^ permalink raw reply
* [PATCH v2 5/9] OMAP2+: hwmod: rename some init functions
From: DebBarma, Tarun Kanti @ 2011-03-01 6:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228211217.15286.26420.stgit@twilight.localdomain>
[...]
/**
- * omap_hwmod_late_init - do some post-clock framework initialization
+ * omap_hwmod_setup - do some post-clock framework initialization
Very minor comment: omap_hwmod_setup_all
--
Tarun
*
* Must be called after omap2_clk_init(). Resolves the struct clk names
* to struct clk pointers for each registered omap_hwmod. Also calls
* _setup() on each hwmod. Returns 0.
*/
-static int __init omap_hwmod_late_init(void)
+static int __init omap_hwmod_setup_all(void)
{
int r;
^ permalink raw reply
* [PATCH v2 02/13] da850: pruss platform specific additions.
From: Subhasish Ghosh @ 2011-03-01 6:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <B85A65D85D7EB246BE421B3FB0FBB593024BF35DEE@dbde02.ent.ti.com>
Hello,
Can we not have the PRU UIO also as a part of the MFD framework.
I know that the UIO is not really a device, but I feel its incorrect to
register the same device twice.
Instead we can have a single entry as the MFD framework and the UIO, as a
child device, based upon the MFD driver APIs.
All that we need to do is add an entry into the da8xx_pruss_devices
structure
and the MFD driver will do the rest to get the UIO probe called.
--------------------------------------------------
From: "TK, Pratheesh Gangadhar" <pratheesh@ti.com>
Sent: Monday, February 28, 2011 6:34 PM
To: "Subhasish Ghosh" <subhasish@mistralsolutions.com>;
<davinci-linux-open-source@linux.davincidsp.com>
Cc: <sachi@mistralsolutions.com>; "Russell King" <linux@arm.linux.org.uk>;
"Kevin Hilman" <khilman@deeprootsystems.com>; "open list"
<linux-kernel@vger.kernel.org>; "Watkins, Melissa" <m-watkins@ti.com>;
<linux-arm-kernel@lists.infradead.org>
Subject: RE: [PATCH v2 02/13] da850: pruss platform specific additions.
> Hi,
>
>> -----Original Message-----
>> From: davinci-linux-open-source-bounces at linux.davincidsp.com
>> [mailto:davinci-linux-open-source-bounces at linux.davincidsp.com] On Behalf
>> Of Subhasish Ghosh
>> Sent: Friday, February 11, 2011 8:21 PM
>> To: davinci-linux-open-source at linux.davincidsp.com
>> Cc: sachi at mistralsolutions.com; Russell King; Kevin Hilman; Subhasish
>> Ghosh; open list; Watkins, Melissa; linux-arm-kernel at lists.infradead.org
>> Subject: [PATCH v2 02/13] da850: pruss platform specific additions.
>>
>> This patch adds the platform device and assignes the platform resources
>> for the PRUSS mfd driver.
>>
>> Signed-off-by: Subhasish Ghosh <subhasish@mistralsolutions.com>
>> ---
>> +struct platform_device da8xx_pruss_dev = {
> Can you please rename this to da8xx_pruss_mfddev?
>> + .name = "da8xx_pruss",
> Can you please rename name string as pruss_mfd? This will help to
> base my UIO patches on top of yours.
>> + .id = -1,
>> + .num_resources = ARRAY_SIZE(da8xx_pruss_resources),
>> + .resource = da8xx_pruss_resources,
>> +};
>> +
>> +int __init da8xx_register_pruss(struct da8xx_pruss_devices
>> *pruss_device)
> Please rename this to da8xx_register_pruss_mfd
>
> Thanks,
> Pratheesh
^ permalink raw reply
* [PATCH v2 2/4] msm: iommu: Rework clock logic and add IOMMU bus clock control
From: Trilok Soni @ 2011-03-01 7:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298937782-28725-1-git-send-email-stepanm@codeaurora.org>
Hi Steve,
On 3/1/2011 5:33 AM, Stepan Moskovchenko wrote:
> Clean up the clock control code in the probe calls, and add
> support for controlling the clock for the IOMMU bus
> interconnect. With the (proper) clock driver in place, the
> clock control logic in the probe function can be made much
> cleaner since it does not have to deal with the placeholder
> driver anymore.
>
> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
> ---
> v2: Use resource_size.
Looks good to me.
Reviewed-by: Trilok Soni <tsoni@codeaurora.org>
---Trilok Soni
--
Sent by a consultant of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
^ permalink raw reply
* [PATCH 1/2] ARM imx53: add pwm devices support
From: Eric Miao @ 2011-03-01 7:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298961018-8988-1-git-send-email-b02280@freescale.com>
On Tue, Mar 1, 2011 at 2:30 PM, Jason Chen <b02280@freescale.com> wrote:
> Signed-off-by: Jason Chen <b02280@freescale.com>
Looks perfect to me. Sascha?
> ---
> ?arch/arm/mach-mx5/clock-mx51-mx53.c ? ? ? ? ?| ? ?2 ++
> ?arch/arm/mach-mx5/devices-imx53.h ? ? ? ? ? ?| ? ?4 ++++
> ?arch/arm/mach-mx5/devices.c ? ? ? ? ? ? ? ? ?| ? 10 ++++++++++
> ?arch/arm/mach-mx5/devices.h ? ? ? ? ? ? ? ? ?| ? ?2 ++
> ?arch/arm/plat-mxc/devices/Kconfig ? ? ? ? ? ?| ? ?1 +
> ?arch/arm/plat-mxc/devices/platform-mxc_pwm.c | ? ?9 +++++++++
> ?arch/arm/plat-mxc/pwm.c ? ? ? ? ? ? ? ? ? ? ?| ? ?3 ++-
> ?7 files changed, 30 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
> index 8164b1d..e18807b 100644
> --- a/arch/arm/mach-mx5/clock-mx51-mx53.c
> +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
> @@ -1338,6 +1338,8 @@ static struct clk_lookup mx53_lookups[] = {
> ? ? ? ?_REGISTER_CLOCK("imx53-cspi.0", NULL, cspi_clk)
> ? ? ? ?_REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk)
> ? ? ? ?_REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk)
> + ? ? ? _REGISTER_CLOCK("mxc_pwm.0", "pwm", pwm1_clk)
> + ? ? ? _REGISTER_CLOCK("mxc_pwm.1", "pwm", pwm2_clk)
> ?};
>
> ?static void clk_tree_init(void)
> diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h
> index 9251008..5a1d6c9 100644
> --- a/arch/arm/mach-mx5/devices-imx53.h
> +++ b/arch/arm/mach-mx5/devices-imx53.h
> @@ -33,3 +33,7 @@ extern const struct imx_spi_imx_data imx53_ecspi_data[] __initconst;
> ?extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[] __initconst;
> ?#define imx53_add_imx2_wdt(id, pdata) ?\
> ? ? ? ?imx_add_imx2_wdt(&imx53_imx2_wdt_data[id])
> +
> +extern const struct imx_mxc_pwm_data imx53_mxc_pwm_data[] __initconst;
> +#define imx53_add_mxc_pwm(id) ?\
> + ? ? ? imx_add_mxc_pwm(&imx53_mxc_pwm_data[id])
> diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c
> index 153ada5..74aec2b 100644
> --- a/arch/arm/mach-mx5/devices.c
> +++ b/arch/arm/mach-mx5/devices.c
> @@ -120,6 +120,16 @@ struct platform_device mxc_usbh2_device = {
> ? ? ? ?},
> ?};
>
> +struct platform_device mxc_pwm1_backlight_device = {
> + ? ? ? .name = "pwm-backlight",
> + ? ? ? .id = 0,
> +};
> +
> +struct platform_device mxc_pwm2_backlight_device = {
> + ? ? ? .name = "pwm-backlight",
> + ? ? ? .id = 1,
> +};
> +
> ?static struct mxc_gpio_port mxc_gpio_ports[] = {
> ? ? ? ?{
> ? ? ? ? ? ? ? ?.chip.label = "gpio-0",
> diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h
> index 55a5129..a74cd97 100644
> --- a/arch/arm/mach-mx5/devices.h
> +++ b/arch/arm/mach-mx5/devices.h
> @@ -3,3 +3,5 @@ extern struct platform_device mxc_usbh1_device;
> ?extern struct platform_device mxc_usbh2_device;
> ?extern struct platform_device mxc_usbdr_udc_device;
> ?extern struct platform_device mxc_hsi2c_device;
> +extern struct platform_device mxc_pwm1_backlight_device;
> +extern struct platform_device mxc_pwm2_backlight_device;
> diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig
> index b9ab1d5..aee9f4b 100644
> --- a/arch/arm/plat-mxc/devices/Kconfig
> +++ b/arch/arm/plat-mxc/devices/Kconfig
> @@ -58,6 +58,7 @@ config IMX_HAVE_PLATFORM_MXC_NAND
>
> ?config IMX_HAVE_PLATFORM_MXC_PWM
> ? ? ? ?bool
> + ? ? ? default y if ARCH_MX21 || ARCH_MX25 || SOC_IMX27 || SOC_IMX51 || SOC_IMX53
>
> ?config IMX_HAVE_PLATFORM_MXC_RNGA
> ? ? ? ?bool
> diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
> index b0c4ae2..18cfd07 100644
> --- a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
> +++ b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
> @@ -49,6 +49,15 @@ const struct imx_mxc_pwm_data imx51_mxc_pwm_data[] __initconst = {
> ?};
> ?#endif /* ifdef CONFIG_SOC_IMX51 */
>
> +#ifdef CONFIG_SOC_IMX53
> +const struct imx_mxc_pwm_data imx53_mxc_pwm_data[] __initconst = {
> +#define imx53_mxc_pwm_data_entry(_id, _hwid) ? ? ? ? ? ? ? ? ? ? ? ? ? \
> + ? ? ? imx_mxc_pwm_data_entry(MX53, _id, _hwid, SZ_16K)
> + ? ? ? imx53_mxc_pwm_data_entry(0, 1),
> + ? ? ? imx53_mxc_pwm_data_entry(1, 2),
> +};
> +#endif /* ifdef CONFIG_SOC_IMX53 */
> +
> ?struct platform_device *__init imx_add_mxc_pwm(
> ? ? ? ? ? ? ? ?const struct imx_mxc_pwm_data *data)
> ?{
> diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
> index 7a61ef8..61dd8fb 100644
> --- a/arch/arm/plat-mxc/pwm.c
> +++ b/arch/arm/plat-mxc/pwm.c
> @@ -57,7 +57,8 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
> ? ? ? ?if (pwm == NULL || period_ns == 0 || duty_ns > period_ns)
> ? ? ? ? ? ? ? ?return -EINVAL;
>
> - ? ? ? if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) {
> + ? ? ? if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51() ||
> + ? ? ? ? ? ? ? cpu_is_mx53()) {
This might be improved in the future by using platform_device_id,
or by introducing some flags from platform_data, or when registering
the pwm devices.
> ? ? ? ? ? ? ? ?unsigned long long c;
> ? ? ? ? ? ? ? ?unsigned long period_cycles, duty_cycles, prescale;
> ? ? ? ? ? ? ? ?u32 cr;
> --
> 1.7.1
>
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
^ permalink raw reply
* [PATCH] plat-mxc: Provide irq_chip name for GPIO IRQs
From: Alexander Stein @ 2011-03-01 7:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1296489624-21355-1-git-send-email-alexander.stein@systec-electronic.com>
Hello,
On Monday 31 January 2011, 17:00:24 Alexander Stein wrote:
> Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
> ---
> arch/arm/plat-mxc/gpio.c | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
> index d17b3c9..e396df8 100644
> --- a/arch/arm/plat-mxc/gpio.c
> +++ b/arch/arm/plat-mxc/gpio.c
> @@ -233,6 +233,7 @@ static int gpio_set_wake_irq(struct irq_data *d, u32
> enable) }
>
> static struct irq_chip gpio_irq_chip = {
> + .name = "GPIO",
> .irq_ack = gpio_ack_irq,
> .irq_mask = gpio_mask_irq,
> .irq_unmask = gpio_unmask_irq,
Did this get overlooked?
Regards,
Alexander
^ permalink raw reply
* [PATCH 1/4] ASoC: Add TI tlv320aic32x4 codec support.
From: javier Martin @ 2011-03-01 7:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110228150014.GI13869@opensource.wolfsonmicro.com>
Hi Mark,
thank you for your review. I will try to solve every issue you pointed out.
Regarding non-default configurations:
>> +static const struct aic32x4_configs aic32x4_reg_init[] = {
>> + ? ? {AIC32X4_PWRCFG, AIC32X4_AVDDWEAKDISABLE},
>
> What are these "aic32x4_configs" all about? ?They look like you're
> setting non-default configurations...
This tlv320aic32x4 codec is kind of a huge monster; it has more than
200 registers which provide more flexibility than it is needed.
For example, BCLK and MCLK are forced here to derive from internal PLL
which is needed for frequency calculation table to be valid. Bypassing
this PLL doesn't provide new or better functionality.
The same happens regarding DAC internal connections. I don't think
allowing the user to swap left and right channels makes sense here.
--
Javier Martin
Vista Silicon S.L.
CDTUC - FASE C - Oficina S-345
Avda de los Castros s/n
39005- Santander. Cantabria. Spain
+34 942 25 32 60
www.vista-silicon.com
^ permalink raw reply
* [RFC] device.h: add device_set_platdata routine
From: Uwe Kleine-König @ 2011-03-01 7:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5c561db378360ad1763da41f8350c7be816daa06.1298953633.git.viresh.kumar@st.com>
[added gregkh and lkml to Cc:]
Hi Viresh,
On Tue, Mar 01, 2011 at 10:03:20AM +0530, Viresh Kumar wrote:
> device.h supports device_get_platdata but doesn't support device_set_platdata.
> This routine is required by platforms in which device structure is declared
> in a machine specific file and platform data comes from board specific file.
>
> This will be used by SPEAr patches sent in separate patch series.
>
> Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
> ---
> include/linux/device.h | 5 +++++
> 1 files changed, 5 insertions(+), 0 deletions(-)
>
> diff --git a/include/linux/device.h b/include/linux/device.h
> index 1bf5cf0..6ce0f20 100644
> --- a/include/linux/device.h
> +++ b/include/linux/device.h
> @@ -576,6 +576,11 @@ static inline void *dev_get_platdata(const struct device *dev)
> return dev->platform_data;
> }
>
> +static inline void dev_set_platdata(struct device *dev, void *platdata)
> +{
> + dev->platform_data = platdata;
> +}
> +
Note that dev->platform_data was designed to hold dynamically allocated
memory, at least it's kfreed in platform_device_release. And note there
is platform_device_add_data that kmemdups its argument into
pdev->dev.platform_data.
Compared to your dev_set_platdata platform_device_add_data only works
for platform_devices, don't know if it's worth to change that.
And regarding platform_device_add_data I wonder if it wouldn't be more
consistent to set platform_data = NULL if (!data)? Greg?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [PATCH 1/2] ARM imx53: add pwm devices support
From: Uwe Kleine-König @ 2011-03-01 8:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1298961018-8988-1-git-send-email-b02280@freescale.com>
On Tue, Mar 01, 2011 at 02:30:17PM +0800, Jason Chen wrote:
> Signed-off-by: Jason Chen <b02280@freescale.com>
> ---
> arch/arm/mach-mx5/clock-mx51-mx53.c | 2 ++
> arch/arm/mach-mx5/devices-imx53.h | 4 ++++
> arch/arm/mach-mx5/devices.c | 10 ++++++++++
> arch/arm/mach-mx5/devices.h | 2 ++
> arch/arm/plat-mxc/devices/Kconfig | 1 +
> arch/arm/plat-mxc/devices/platform-mxc_pwm.c | 9 +++++++++
> arch/arm/plat-mxc/pwm.c | 3 ++-
> 7 files changed, 30 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
> index 8164b1d..e18807b 100644
> --- a/arch/arm/mach-mx5/clock-mx51-mx53.c
> +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
> @@ -1338,6 +1338,8 @@ static struct clk_lookup mx53_lookups[] = {
> _REGISTER_CLOCK("imx53-cspi.0", NULL, cspi_clk)
> _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk)
> _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk)
> + _REGISTER_CLOCK("mxc_pwm.0", "pwm", pwm1_clk)
> + _REGISTER_CLOCK("mxc_pwm.1", "pwm", pwm2_clk)
Do you really need "pwm"? I think NULL should do the job.
> };
>
> static void clk_tree_init(void)
> diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h
> index 9251008..5a1d6c9 100644
> --- a/arch/arm/mach-mx5/devices-imx53.h
> +++ b/arch/arm/mach-mx5/devices-imx53.h
> @@ -33,3 +33,7 @@ extern const struct imx_spi_imx_data imx53_ecspi_data[] __initconst;
> extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[] __initconst;
> #define imx53_add_imx2_wdt(id, pdata) \
> imx_add_imx2_wdt(&imx53_imx2_wdt_data[id])
> +
> +extern const struct imx_mxc_pwm_data imx53_mxc_pwm_data[] __initconst;
> +#define imx53_add_mxc_pwm(id) \
> + imx_add_mxc_pwm(&imx53_mxc_pwm_data[id])
> diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c
> index 153ada5..74aec2b 100644
> --- a/arch/arm/mach-mx5/devices.c
> +++ b/arch/arm/mach-mx5/devices.c
> @@ -120,6 +120,16 @@ struct platform_device mxc_usbh2_device = {
> },
> };
>
> +struct platform_device mxc_pwm1_backlight_device = {
> + .name = "pwm-backlight",
> + .id = 0,
> +};
> +
> +struct platform_device mxc_pwm2_backlight_device = {
> + .name = "pwm-backlight",
> + .id = 1,
> +};
> +
IMHO these should go into a seperate patch and preferably dynamically
allocated.
> static struct mxc_gpio_port mxc_gpio_ports[] = {
> {
> .chip.label = "gpio-0",
> diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h
> index 55a5129..a74cd97 100644
> --- a/arch/arm/mach-mx5/devices.h
> +++ b/arch/arm/mach-mx5/devices.h
> @@ -3,3 +3,5 @@ extern struct platform_device mxc_usbh1_device;
> extern struct platform_device mxc_usbh2_device;
> extern struct platform_device mxc_usbdr_udc_device;
> extern struct platform_device mxc_hsi2c_device;
> +extern struct platform_device mxc_pwm1_backlight_device;
> +extern struct platform_device mxc_pwm2_backlight_device;
> diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig
> index b9ab1d5..aee9f4b 100644
> --- a/arch/arm/plat-mxc/devices/Kconfig
> +++ b/arch/arm/plat-mxc/devices/Kconfig
> @@ -58,6 +58,7 @@ config IMX_HAVE_PLATFORM_MXC_NAND
>
> config IMX_HAVE_PLATFORM_MXC_PWM
> bool
> + default y if ARCH_MX21 || ARCH_MX25 || SOC_IMX27 || SOC_IMX51 || SOC_IMX53
If you do this, can you please use SOC_IMX21 and SOC_IMX25? Or maybe
even def_bool y?
> config IMX_HAVE_PLATFORM_MXC_RNGA
> bool
> diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
> index b0c4ae2..18cfd07 100644
> --- a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
> +++ b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
> @@ -49,6 +49,15 @@ const struct imx_mxc_pwm_data imx51_mxc_pwm_data[] __initconst = {
> };
> #endif /* ifdef CONFIG_SOC_IMX51 */
>
> +#ifdef CONFIG_SOC_IMX53
> +const struct imx_mxc_pwm_data imx53_mxc_pwm_data[] __initconst = {
> +#define imx53_mxc_pwm_data_entry(_id, _hwid) \
> + imx_mxc_pwm_data_entry(MX53, _id, _hwid, SZ_16K)
> + imx53_mxc_pwm_data_entry(0, 1),
> + imx53_mxc_pwm_data_entry(1, 2),
> +};
> +#endif /* ifdef CONFIG_SOC_IMX53 */
> +
> struct platform_device *__init imx_add_mxc_pwm(
> const struct imx_mxc_pwm_data *data)
> {
> diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
> index 7a61ef8..61dd8fb 100644
> --- a/arch/arm/plat-mxc/pwm.c
> +++ b/arch/arm/plat-mxc/pwm.c
> @@ -57,7 +57,8 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
> if (pwm == NULL || period_ns == 0 || duty_ns > period_ns)
> return -EINVAL;
>
> - if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) {
> + if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51() ||
> + cpu_is_mx53()) {
> unsigned long long c;
> unsigned long period_cycles, duty_cycles, prescale;
> u32 cr;
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [PATCH 1/2] ARM imx53: add pwm devices support
From: Eric Miao @ 2011-03-01 8:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110301081043.GS22310@pengutronix.de>
>> ?config IMX_HAVE_PLATFORM_MXC_PWM
>> ? ? ? bool
>> + ? ? default y if ARCH_MX21 || ARCH_MX25 || SOC_IMX27 || SOC_IMX51 || SOC_IMX53
> If you do this, can you please use SOC_IMX21 and SOC_IMX25? ?Or maybe
> even def_bool y?
>
Or the other way, in config SOC_IMX53, select IMX_HAVE_PLATFORM_MXC_PWM?
^ permalink raw reply
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