* [PATCH] OMAP2+: hwmod: remove OMAP_CHIP*
From: Paul Walmsley @ 2011-09-14 11:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CANOLnOOkz2ZkhPSafTLxUUH2bSVoRrYA44-C1+yku8naYaRz3w@mail.gmail.com>
Hello Gra?vydas,
On Mon, 5 Sep 2011, Grazvydas Ignotas wrote:
> On Mon, Sep 5, 2011 at 5:43 AM, Paul Walmsley <paul@pwsan.com> wrote:
> > diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
> > index 84cc0bd..d7138070 100644
> > --- a/arch/arm/mach-omap2/omap_hwmod.c
> > +++ b/arch/arm/mach-omap2/omap_hwmod.c
> <snip>
>
> >
> > ?int __init omap3xxx_hwmod_init(void)
> > ?{
> > - ? ? ? return omap_hwmod_register(omap3xxx_hwmods);
> > + ? ? ? int r;
> > + ? ? ? struct omap_hwmod **h = NULL;
> > +
> > + ? ? ? /* Register hwmods common to all OMAP3 */
> > + ? ? ? r = omap_hwmod_register(omap3xxx_hwmods);
> > + ? ? ? if (!r)
> > + ? ? ? ? ? ? ? return r;
> > +
> > + ? ? ? /*
> > + ? ? ? ?* Register hwmods common to individual OMAP3 families, all
> > + ? ? ? ?* silicon revisions (e.g., 34xx, or AM3505/3517, or 36xx)
> > + ? ? ? ?* All possible revisions should be included in this conditional.
> > + ? ? ? ?*/
> > + ? ? ? if (omap_rev() == OMAP3430_REV_ES1_0 ||
> > + ? ? ? ? ? omap_rev() == OMAP3430_REV_ES2_0 ||
> > + ? ? ? ? ? omap_rev() == OMAP3430_REV_ES2_1 ||
> > + ? ? ? ? ? omap_rev() == OMAP3430_REV_ES3_0 ||
> > + ? ? ? ? ? omap_rev() == OMAP3430_REV_ES3_1 ||
> > + ? ? ? ? ? omap_rev() == OMAP3430_REV_ES3_1_2) {
> > + ? ? ? ? ? ? ? h = omap34xx_hwmods;
> > + ? ? ? } else if (omap_rev() & OMAP3505_REV(0)) {
> > + ? ? ? ? ? ? ? h = am35xx_hwmods;
>
> This check will be always true I think?
Thanks for the review; you are absolutely right and this will be fixed.
> Why not just use cpu_is_omap3xxx() for these tests, since it does same
> omap_rev() call but only once per family?
cpu_is_omap*() doesn't do what one would expect :-(
For example, cpu_is_omap34xx() returns 1 on not only 34xx, but also 36xx
and 3517/3505. Unfortunately, we don't currently do a good job of
separating SoC family detection from individual SoC detection.
If your objection is to the multiple calls to omap_rev(), those do indeed
appear in the source to be potentially expensive function calls --
although the compiler should inline them. Just to be sure, the
next revision will use a variable.
regards
- Paul
^ permalink raw reply
* [PATCH 3/6] OMAP3: id: use explicit omap_revision codes for 3505/3517 ES levels
From: Igor Grinberg @ 2011-09-14 12:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110913212803.26161.31753.stgit@dusk>
Hi Paul,
This patch does not apply, after the v2 of 1_6, see below:
On 09/14/11 00:28, Paul Walmsley wrote:
> Use explicit revision codes for OMAP/AM 3505/3517 ES levels, as the rest
> of the OMAP2+ SoCs do in mach-omap2/cpu.c.
>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> Cc: Sanjeev Premi <premi@ti.com>
> ---
> arch/arm/mach-omap2/id.c | 10 +++++++++-
> arch/arm/plat-omap/include/plat/cpu.h | 3 ++-
> 2 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
> index 46bc2f9..6810c52 100644
> --- a/arch/arm/mach-omap2/id.c
> +++ b/arch/arm/mach-omap2/id.c
> @@ -312,7 +312,15 @@ static void __init omap3_check_revision(void)
> *
> * REVISIT: AM3505/AM3517 should have their own CHIP_IS
> */
> - omap_revision = OMAP3517_REV(rev);
> + switch (rev) {
> + case 0:
> + omap_revision = OMAP3517_REV_ES1_0;
> + break;
> + case 1:
> + /* FALLTHROUGH */
> + default:
> + omap_revision = OMAP3517_REV_ES1_1;
> + }
> omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
> break;
> case 0xb891:
> diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
> index b6bd8f7..566975c 100644
> --- a/arch/arm/plat-omap/include/plat/cpu.h
> +++ b/arch/arm/plat-omap/include/plat/cpu.h
> @@ -398,7 +398,8 @@ IS_OMAP_TYPE(3517, 0x3517)
> #define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (OMAP_REVBITS_02 << 8))
>
> #define OMAP3517_CLASS 0x35170000
After applying the v2 of 1_6, the above value should be 0x35170034
> -#define OMAP3517_REV(v) (OMAP3517_CLASS | (v << 8))
> +#define OMAP3517_REV_ES1_0 OMAP3517_CLASS
> +#define OMAP3517_REV_ES1_1 (OMAP3517_CLASS | (OMAP_REVBITS_01 << 8))
>
> #define TI816X_CLASS 0x81600034
> #define TI8168_REV_ES1_0 TI816X_CLASS
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
Regards,
Igor.
^ permalink raw reply
* [PATCH 6/6] OMAP2+: id: remove OMAP_REVBITS_* macros
From: Igor Grinberg @ 2011-09-14 12:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110913212806.26161.37867.stgit@dusk>
Hi Paul,
Same problem (as with 3_6) here...
On 09/14/11 00:28, Paul Walmsley wrote:
> The OMAP_REVBITS_* macros are just used as otherwise meaningless
> aliases for the numbers zero through five, so remove these macros.
>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> ---
> arch/arm/plat-omap/include/plat/cpu.h | 33 ++++++++++-----------------------
> 1 files changed, 10 insertions(+), 23 deletions(-)
>
> diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
> index 566975c..0ec90cf 100644
> --- a/arch/arm/plat-omap/include/plat/cpu.h
> +++ b/arch/arm/plat-omap/include/plat/cpu.h
> @@ -60,19 +60,6 @@ struct omap_chip_id {
> unsigned int omap_rev(void);
>
> /*
> - * Define CPU revision bits
> - *
> - * Verbose meaning of the revision bits may be different for a silicon
> - * family. This difference can be handled separately.
> - */
> -#define OMAP_REVBITS_00 0x00
> -#define OMAP_REVBITS_01 0x01
> -#define OMAP_REVBITS_02 0x02
> -#define OMAP_REVBITS_03 0x03
> -#define OMAP_REVBITS_04 0x04
> -#define OMAP_REVBITS_05 0x05
> -
> -/*
> * Get the CPU revision for OMAP devices
> */
> #define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff)
> @@ -379,31 +366,31 @@ IS_OMAP_TYPE(3517, 0x3517)
> /* Various silicon revisions for omap2 */
> #define OMAP242X_CLASS 0x24200024
> #define OMAP2420_REV_ES1_0 OMAP242X_CLASS
> -#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (OMAP_REVBITS_01 << 8))
> +#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (0x1 << 8))
>
> #define OMAP243X_CLASS 0x24300024
> #define OMAP2430_REV_ES1_0 OMAP243X_CLASS
>
> #define OMAP343X_CLASS 0x34300034
> #define OMAP3430_REV_ES1_0 OMAP343X_CLASS
> -#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (OMAP_REVBITS_01 << 8))
> -#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (OMAP_REVBITS_02 << 8))
> -#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (OMAP_REVBITS_03 << 8))
> -#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (OMAP_REVBITS_04 << 8))
> -#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (OMAP_REVBITS_05 << 8))
> +#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (0x1 << 8))
> +#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (0x2 << 8))
> +#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (0x3 << 8))
> +#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (0x4 << 8))
> +#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (0x5 << 8))
>
> #define OMAP363X_CLASS 0x36300034
> #define OMAP3630_REV_ES1_0 OMAP363X_CLASS
> -#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (OMAP_REVBITS_01 << 8))
> -#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (OMAP_REVBITS_02 << 8))
> +#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8))
> +#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8))
>
> #define OMAP3517_CLASS 0x35170000
> #define OMAP3517_REV_ES1_0 OMAP3517_CLASS
> -#define OMAP3517_REV_ES1_1 (OMAP3517_CLASS | (OMAP_REVBITS_01 << 8))
> +#define OMAP3517_REV_ES1_1 (OMAP3517_CLASS | (0x1 << 8))
>
> #define TI816X_CLASS 0x81600034
> #define TI8168_REV_ES1_0 TI816X_CLASS
> -#define TI8168_REV_ES1_1 (TI816X_CLASS | (OMAP_REVBITS_01 << 8))
> +#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
>
> #define OMAP443X_CLASS 0x44300044
> #define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
Regards,
Igor.
^ permalink raw reply
* [PATCH 6/6] OMAP2+: id: remove OMAP_REVBITS_* macros
From: Paul Walmsley @ 2011-09-14 12:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4E709D13.1080908@compulab.co.il>
On Wed, 14 Sep 2011, Igor Grinberg wrote:
> Hi Paul,
>
> Same problem (as with 3_6) here...
Thanks, I'll repost those. In the meantime, maybe try pulling the branch
'id_3517_cleanup_3.2' from git://git.pwsan.com/linux-2.6 ?
- Paul
^ permalink raw reply
* [PATCH v2 0/6] OMAP2+: id: cleanup for 3.2
From: Paul Walmsley @ 2011-09-14 12:39 UTC (permalink / raw)
To: linux-arm-kernel
Clean up the SoC detection code for some OMAP3 devices. The main goal
is to make the AM3517 family detection code work like the rest of the
OMAP3 SoCs, although this series does some other cleanup of this code
at the same time. This patch series will be a prerequisite for the
OMAP_CHIP removal series.
Tested on an OMAP3530ES2 BeagleBoard C2 and a OMAP3730ES1 BeagleBoard A2.
These are the only OMAP3 boards I have access to right now - testing welcomed
from people with other OMAP3 families or ES levels.
This second version fixes a bug in the first patch, which requires the
later patches to be updated to apply without rejects. Thanks to Igor
Grinberg <grinberg@compulab.co.il> for comments about this.
- Paul
---
id_3517_cleanup_3.2
text data bss dec hex filename
6330180 656956 5591124 12578260 bfedd4 vmlinux.omap2plus_defconfig.orig
6329884 656964 5591124 12577972 bfecb4 vmlinux.omap2plus_defconfig.patched
Paul Walmsley (6):
OMAP3: id: remove identification codes that only correspond to marketing names
OMAP3: id: remove useless strcpy()s
OMAP3: id: use explicit omap_revision codes for 3505/3517 ES levels
OMAP3: id: add fallthrough warning; fix some CodingStyle issues
OMAP3: id: remove duplicate code for testing SoC ES level
OMAP2+: id: remove OMAP_REVBITS_* macros
arch/arm/mach-omap2/id.c | 134 ++++++++++++---------------------
arch/arm/plat-omap/include/plat/cpu.h | 46 ++++-------
2 files changed, 65 insertions(+), 115 deletions(-)
^ permalink raw reply
* [PATCH v2 1/6] OMAP3: id: remove identification codes that only correspond to marketing names
From: Paul Walmsley @ 2011-09-14 12:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110914123708.25282.78122.stgit@dusk>
The OMAP3505/AM3505 appears to be based on the same silicon as the
OMAP3517/AM3517, with some features disabled via eFuse bits. Follow
the same practice as OMAP3430 and identify these devices internally as
part of the OMAP3517/AM3517 family.
The OMAP3503/3515/3525/3530 chips appear to be based on the same silicon
as the OMAP3430, with some features disabled via eFuse bits. Identify
these devices internally as part of the OMAP3430 family.
Remove the old OMAP35XX_CLASS, which actually covered two very different
chip families. The OMAP3503/3515/3525/3530 chips will now be covered by
OMAP343X_CLASS, since the silicon appears to be identical. For the
OMAP3517/AM3517 family, create a new class, OMAP3517_CLASS.
Thanks to Tony Lindgren <tony@atomide.com> for some help with the second
revision of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Sanjeev Premi <premi@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/id.c | 17 ++++++-----------
arch/arm/plat-omap/include/plat/cpu.h | 14 +++++---------
2 files changed, 11 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 37efb86..723e2f8 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -304,14 +304,15 @@ static void __init omap3_check_revision(void)
}
break;
case 0xb868:
- /* Handle OMAP35xx/AM35xx devices
+ /*
+ * Handle OMAP/AM 3505/3517 devices
*
- * Set the device to be OMAP3505 here. Actual device
+ * Set the device to be OMAP3517 here. Actual device
* is identified later based on the features.
*
* REVISIT: AM3505/AM3517 should have their own CHIP_IS
*/
- omap_revision = OMAP3505_REV(rev);
+ omap_revision = OMAP3517_REV(rev);
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
break;
case 0xb891:
@@ -442,26 +443,20 @@ static void __init omap3_cpuinfo(void)
/*
* AM35xx devices
*/
- if (omap3_has_sgx()) {
- omap_revision = OMAP3517_REV(rev);
+ if (omap3_has_sgx())
strcpy(cpu_name, "AM3517");
- } else {
- /* Already set in omap3_check_revision() */
+ else
strcpy(cpu_name, "AM3505");
- }
} else if (cpu_is_ti816x()) {
strcpy(cpu_name, "TI816X");
} else if (omap3_has_iva() && omap3_has_sgx()) {
/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
strcpy(cpu_name, "OMAP3430/3530");
} else if (omap3_has_iva()) {
- omap_revision = OMAP3525_REV(rev);
strcpy(cpu_name, "OMAP3525");
} else if (omap3_has_sgx()) {
- omap_revision = OMAP3515_REV(rev);
strcpy(cpu_name, "OMAP3515");
} else {
- omap_revision = OMAP3503_REV(rev);
strcpy(cpu_name, "OMAP3503");
}
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 67b3d75..34df171 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -262,7 +262,7 @@ IS_OMAP_TYPE(2422, 0x2422)
IS_OMAP_TYPE(2423, 0x2423)
IS_OMAP_TYPE(2430, 0x2430)
IS_OMAP_TYPE(3430, 0x3430)
-IS_OMAP_TYPE(3505, 0x3505)
+IS_OMAP_TYPE(3505, 0x3517)
IS_OMAP_TYPE(3517, 0x3517)
#define cpu_is_omap310() 0
@@ -354,8 +354,9 @@ IS_OMAP_TYPE(3517, 0x3517)
(!omap3_has_sgx()) && \
(omap3_has_iva()))
# define cpu_is_omap3530() (cpu_is_omap3430())
-# define cpu_is_omap3505() is_omap3505()
# define cpu_is_omap3517() is_omap3517()
+# define cpu_is_omap3505() (cpu_is_omap3517() && \
+ !omap3_has_sgx())
# undef cpu_is_omap3630
# define cpu_is_omap3630() is_omap363x()
# define cpu_is_ti816x() is_ti816x()
@@ -397,13 +398,8 @@ IS_OMAP_TYPE(3517, 0x3517)
#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (OMAP_REVBITS_01 << 8))
#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (OMAP_REVBITS_02 << 8))
-#define OMAP35XX_CLASS 0x35000034
-#define OMAP3503_REV(v) (OMAP35XX_CLASS | (0x3503 << 16) | (v << 8))
-#define OMAP3515_REV(v) (OMAP35XX_CLASS | (0x3515 << 16) | (v << 8))
-#define OMAP3525_REV(v) (OMAP35XX_CLASS | (0x3525 << 16) | (v << 8))
-#define OMAP3530_REV(v) (OMAP35XX_CLASS | (0x3530 << 16) | (v << 8))
-#define OMAP3505_REV(v) (OMAP35XX_CLASS | (0x3505 << 16) | (v << 8))
-#define OMAP3517_REV(v) (OMAP35XX_CLASS | (0x3517 << 16) | (v << 8))
+#define OMAP3517_CLASS 0x35170034
+#define OMAP3517_REV(v) (OMAP3517_CLASS | (v << 8))
#define TI816X_CLASS 0x81600034
#define TI8168_REV_ES1_0 TI816X_CLASS
^ permalink raw reply related
* [PATCH v2 2/6] OMAP3: id: remove useless strcpy()s
From: Paul Walmsley @ 2011-09-14 12:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110914123708.25282.78122.stgit@dusk>
omap3_cpuinfo() is filled with useless strcpy() calls; remove them.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Sanjeev Premi <premi@ti.com>
---
arch/arm/mach-omap2/id.c | 48 +++++++++++++++++++++-------------------------
1 files changed, 22 insertions(+), 26 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 723e2f8..46bc2f9 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -429,84 +429,80 @@ static void __init omap4_check_revision(void)
static void __init omap3_cpuinfo(void)
{
u8 rev = GET_OMAP_REVISION();
- char cpu_name[16], cpu_rev[16];
+ const char *cpu_name, *cpu_rev;
- /* OMAP3430 and OMAP3530 are assumed to be same.
+ /*
+ * OMAP3430 and OMAP3530 are assumed to be same.
*
* OMAP3525, OMAP3515 and OMAP3503 can be detected only based
* on available features. Upon detection, update the CPU id
* and CPU class bits.
*/
if (cpu_is_omap3630()) {
- strcpy(cpu_name, "OMAP3630");
+ cpu_name = "OMAP3630";
} else if (cpu_is_omap3505()) {
- /*
- * AM35xx devices
- */
- if (omap3_has_sgx())
- strcpy(cpu_name, "AM3517");
- else
- strcpy(cpu_name, "AM3505");
+ /* AM35xx devices */
+ cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
} else if (cpu_is_ti816x()) {
- strcpy(cpu_name, "TI816X");
+ cpu_name = "TI816X";
} else if (omap3_has_iva() && omap3_has_sgx()) {
/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
- strcpy(cpu_name, "OMAP3430/3530");
+ cpu_name = "OMAP3430/3530";
} else if (omap3_has_iva()) {
- strcpy(cpu_name, "OMAP3525");
+ cpu_name = "OMAP3525";
} else if (omap3_has_sgx()) {
- strcpy(cpu_name, "OMAP3515");
+ cpu_name = "OMAP3515";
} else {
- strcpy(cpu_name, "OMAP3503");
+ cpu_name = "OMAP3503";
}
if (cpu_is_omap3630() || cpu_is_ti816x()) {
switch (rev) {
case OMAP_REVBITS_00:
- strcpy(cpu_rev, "1.0");
+ cpu_rev = "1.0";
break;
case OMAP_REVBITS_01:
- strcpy(cpu_rev, "1.1");
+ cpu_rev = "1.1";
break;
case OMAP_REVBITS_02:
/* FALLTHROUGH */
default:
/* Use the latest known revision as default */
- strcpy(cpu_rev, "1.2");
+ cpu_rev = "1.2";
}
} else if (cpu_is_omap3505() || cpu_is_omap3517()) {
switch (rev) {
case OMAP_REVBITS_00:
- strcpy(cpu_rev, "1.0");
+ cpu_rev = "1.0";
break;
case OMAP_REVBITS_01:
/* FALLTHROUGH */
default:
/* Use the latest known revision as default */
- strcpy(cpu_rev, "1.1");
+ cpu_rev = "1.1";
}
} else {
switch (rev) {
case OMAP_REVBITS_00:
- strcpy(cpu_rev, "1.0");
+ cpu_rev = "1.0";
break;
case OMAP_REVBITS_01:
- strcpy(cpu_rev, "2.0");
+ cpu_rev = "2.0";
break;
case OMAP_REVBITS_02:
- strcpy(cpu_rev, "2.1");
+ cpu_rev = "2.1";
break;
case OMAP_REVBITS_03:
- strcpy(cpu_rev, "3.0");
+ cpu_rev = "3.0";
break;
case OMAP_REVBITS_04:
- strcpy(cpu_rev, "3.1");
+ cpu_rev = "3.1";
break;
case OMAP_REVBITS_05:
/* FALLTHROUGH */
default:
/* Use the latest known revision as default */
- strcpy(cpu_rev, "3.1.2");
+ cpu_rev = "3.1.2";
}
}
^ permalink raw reply related
* [PATCH v2 3/6] OMAP3: id: use explicit omap_revision codes for 3505/3517 ES levels
From: Paul Walmsley @ 2011-09-14 12:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110914123708.25282.78122.stgit@dusk>
Use explicit revision codes for OMAP/AM 3505/3517 ES levels, as the rest
of the OMAP2+ SoCs do in mach-omap2/cpu.c.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Sanjeev Premi <premi@ti.com>
---
arch/arm/mach-omap2/id.c | 10 +++++++++-
arch/arm/plat-omap/include/plat/cpu.h | 3 ++-
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 46bc2f9..6810c52 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -312,7 +312,15 @@ static void __init omap3_check_revision(void)
*
* REVISIT: AM3505/AM3517 should have their own CHIP_IS
*/
- omap_revision = OMAP3517_REV(rev);
+ switch (rev) {
+ case 0:
+ omap_revision = OMAP3517_REV_ES1_0;
+ break;
+ case 1:
+ /* FALLTHROUGH */
+ default:
+ omap_revision = OMAP3517_REV_ES1_1;
+ }
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
break;
case 0xb891:
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 34df171..1debee9 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -399,7 +399,8 @@ IS_OMAP_TYPE(3517, 0x3517)
#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (OMAP_REVBITS_02 << 8))
#define OMAP3517_CLASS 0x35170034
-#define OMAP3517_REV(v) (OMAP3517_CLASS | (v << 8))
+#define OMAP3517_REV_ES1_0 OMAP3517_CLASS
+#define OMAP3517_REV_ES1_1 (OMAP3517_CLASS | (OMAP_REVBITS_01 << 8))
#define TI816X_CLASS 0x81600034
#define TI8168_REV_ES1_0 TI816X_CLASS
^ permalink raw reply related
* [PATCH v2 4/6] OMAP3: id: add fallthrough warning; fix some CodingStyle issues
From: Paul Walmsley @ 2011-09-14 12:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110914123708.25282.78122.stgit@dusk>
Emit a warning to the console in omap3_check_revision() if that code
cannot determine what type of SoC the system is currently running on.
Remove some extra whitespace, remove some duplicate code, and
add an appropriate comment to a fallthrough case.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Hemant Pedanekar <hemantp@ti.com>
---
arch/arm/mach-omap2/id.c | 11 ++++++-----
1 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 6810c52..18c3797 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -336,8 +336,9 @@ static void __init omap3_check_revision(void)
omap_chip.oc |= CHIP_IS_OMAP3630ES1_1;
break;
case 2:
+ /* FALLTHROUGH */
default:
- omap_revision = OMAP3630_REV_ES1_2;
+ omap_revision = OMAP3630_REV_ES1_2;
omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
}
break;
@@ -349,16 +350,16 @@ static void __init omap3_check_revision(void)
omap_revision = TI8168_REV_ES1_0;
break;
case 1:
- omap_revision = TI8168_REV_ES1_1;
- break;
+ /* FALLTHROUGH */
default:
- omap_revision = TI8168_REV_ES1_1;
+ omap_revision = TI8168_REV_ES1_1;
}
break;
default:
- /* Unknown default to latest silicon rev as default*/
+ /* Unknown default to latest silicon rev as default */
omap_revision = OMAP3630_REV_ES1_2;
omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
+ pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
}
}
^ permalink raw reply related
* [PATCH v2 5/6] OMAP3: id: remove duplicate code for testing SoC ES level
From: Paul Walmsley @ 2011-09-14 12:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110914123708.25282.78122.stgit@dusk>
omap3_cpuinfo() contains essentially duplicated code from
omap3_check_revision(), just for the purpose of determining the chip ES level.
Set the cpu_rev char array pointer in omap3_check_revision() instead,
and drop the now-useless code from omap3_cpuinfo().
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/id.c | 80 +++++++++++++---------------------------------
1 files changed, 23 insertions(+), 57 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 18c3797..307e186 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -242,7 +242,7 @@ static void __init ti816x_check_features(void)
omap_features = OMAP3_HAS_NEON;
}
-static void __init omap3_check_revision(void)
+static void __init omap3_check_revision(const char **cpu_rev)
{
u32 cpuid, idcode;
u16 hawkeye;
@@ -259,6 +259,7 @@ static void __init omap3_check_revision(void)
if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
omap_revision = OMAP3430_REV_ES1_0;
omap_chip.oc |= CHIP_IS_OMAP3430ES1;
+ *cpu_rev = "1.0";
return;
}
@@ -280,18 +281,22 @@ static void __init omap3_check_revision(void)
case 1:
omap_revision = OMAP3430_REV_ES2_0;
omap_chip.oc |= CHIP_IS_OMAP3430ES2;
+ *cpu_rev = "2.0";
break;
case 2:
omap_revision = OMAP3430_REV_ES2_1;
omap_chip.oc |= CHIP_IS_OMAP3430ES2;
+ *cpu_rev = "2.1";
break;
case 3:
omap_revision = OMAP3430_REV_ES3_0;
omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
+ *cpu_rev = "3.0";
break;
case 4:
omap_revision = OMAP3430_REV_ES3_1;
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
+ *cpu_rev = "3.1";
break;
case 7:
/* FALLTHROUGH */
@@ -301,6 +306,7 @@ static void __init omap3_check_revision(void)
/* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
+ *cpu_rev = "3.1.2";
}
break;
case 0xb868:
@@ -315,11 +321,13 @@ static void __init omap3_check_revision(void)
switch (rev) {
case 0:
omap_revision = OMAP3517_REV_ES1_0;
+ *cpu_rev = "1.0";
break;
case 1:
/* FALLTHROUGH */
default:
omap_revision = OMAP3517_REV_ES1_1;
+ *cpu_rev = "1.1";
}
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
break;
@@ -330,16 +338,19 @@ static void __init omap3_check_revision(void)
switch(rev) {
case 0: /* Take care of early samples */
omap_revision = OMAP3630_REV_ES1_0;
+ *cpu_rev = "1.0";
break;
case 1:
omap_revision = OMAP3630_REV_ES1_1;
omap_chip.oc |= CHIP_IS_OMAP3630ES1_1;
+ *cpu_rev = "1.1";
break;
case 2:
/* FALLTHROUGH */
default:
omap_revision = OMAP3630_REV_ES1_2;
omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
+ *cpu_rev = "1.2";
}
break;
case 0xb81e:
@@ -348,17 +359,21 @@ static void __init omap3_check_revision(void)
switch (rev) {
case 0:
omap_revision = TI8168_REV_ES1_0;
+ *cpu_rev = "1.0";
break;
case 1:
/* FALLTHROUGH */
default:
omap_revision = TI8168_REV_ES1_1;
+ *cpu_rev = "1.1";
+ break;
}
break;
default:
/* Unknown default to latest silicon rev as default */
- omap_revision = OMAP3630_REV_ES1_2;
+ omap_revision = OMAP3630_REV_ES1_2;
omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
+ *cpu_rev = "1.2";
pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
}
}
@@ -435,10 +450,9 @@ static void __init omap4_check_revision(void)
if (omap3_has_ ##feat()) \
printk(#feat" ");
-static void __init omap3_cpuinfo(void)
+static void __init omap3_cpuinfo(const char *cpu_rev)
{
- u8 rev = GET_OMAP_REVISION();
- const char *cpu_name, *cpu_rev;
+ const char *cpu_name;
/*
* OMAP3430 and OMAP3530 are assumed to be same.
@@ -465,56 +479,6 @@ static void __init omap3_cpuinfo(void)
cpu_name = "OMAP3503";
}
- if (cpu_is_omap3630() || cpu_is_ti816x()) {
- switch (rev) {
- case OMAP_REVBITS_00:
- cpu_rev = "1.0";
- break;
- case OMAP_REVBITS_01:
- cpu_rev = "1.1";
- break;
- case OMAP_REVBITS_02:
- /* FALLTHROUGH */
- default:
- /* Use the latest known revision as default */
- cpu_rev = "1.2";
- }
- } else if (cpu_is_omap3505() || cpu_is_omap3517()) {
- switch (rev) {
- case OMAP_REVBITS_00:
- cpu_rev = "1.0";
- break;
- case OMAP_REVBITS_01:
- /* FALLTHROUGH */
- default:
- /* Use the latest known revision as default */
- cpu_rev = "1.1";
- }
- } else {
- switch (rev) {
- case OMAP_REVBITS_00:
- cpu_rev = "1.0";
- break;
- case OMAP_REVBITS_01:
- cpu_rev = "2.0";
- break;
- case OMAP_REVBITS_02:
- cpu_rev = "2.1";
- break;
- case OMAP_REVBITS_03:
- cpu_rev = "3.0";
- break;
- case OMAP_REVBITS_04:
- cpu_rev = "3.1";
- break;
- case OMAP_REVBITS_05:
- /* FALLTHROUGH */
- default:
- /* Use the latest known revision as default */
- cpu_rev = "3.1.2";
- }
- }
-
/* Print verbose information */
pr_info("%s ES%s (", cpu_name, cpu_rev);
@@ -533,6 +497,8 @@ static void __init omap3_cpuinfo(void)
*/
void __init omap2_check_revision(void)
{
+ const char *cpu_rev;
+
/*
* At this point we have an idea about the processor revision set
* earlier with omap2_set_globals_tap().
@@ -540,7 +506,7 @@ void __init omap2_check_revision(void)
if (cpu_is_omap24xx()) {
omap24xx_check_revision();
} else if (cpu_is_omap34xx()) {
- omap3_check_revision();
+ omap3_check_revision(&cpu_rev);
/* TI816X doesn't have feature register */
if (!cpu_is_ti816x())
@@ -548,7 +514,7 @@ void __init omap2_check_revision(void)
else
ti816x_check_features();
- omap3_cpuinfo();
+ omap3_cpuinfo(cpu_rev);
return;
} else if (cpu_is_omap44xx()) {
omap4_check_revision();
^ permalink raw reply related
* [PATCH v2 6/6] OMAP2+: id: remove OMAP_REVBITS_* macros
From: Paul Walmsley @ 2011-09-14 12:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110914123708.25282.78122.stgit@dusk>
The OMAP_REVBITS_* macros are just used as otherwise meaningless
aliases for the numbers zero through five, so remove these macros.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/plat-omap/include/plat/cpu.h | 33 ++++++++++-----------------------
1 files changed, 10 insertions(+), 23 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 1debee9..ddbc025 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -60,19 +60,6 @@ struct omap_chip_id {
unsigned int omap_rev(void);
/*
- * Define CPU revision bits
- *
- * Verbose meaning of the revision bits may be different for a silicon
- * family. This difference can be handled separately.
- */
-#define OMAP_REVBITS_00 0x00
-#define OMAP_REVBITS_01 0x01
-#define OMAP_REVBITS_02 0x02
-#define OMAP_REVBITS_03 0x03
-#define OMAP_REVBITS_04 0x04
-#define OMAP_REVBITS_05 0x05
-
-/*
* Get the CPU revision for OMAP devices
*/
#define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff)
@@ -380,31 +367,31 @@ IS_OMAP_TYPE(3517, 0x3517)
/* Various silicon revisions for omap2 */
#define OMAP242X_CLASS 0x24200024
#define OMAP2420_REV_ES1_0 OMAP242X_CLASS
-#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (OMAP_REVBITS_01 << 8))
+#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (0x1 << 8))
#define OMAP243X_CLASS 0x24300024
#define OMAP2430_REV_ES1_0 OMAP243X_CLASS
#define OMAP343X_CLASS 0x34300034
#define OMAP3430_REV_ES1_0 OMAP343X_CLASS
-#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (OMAP_REVBITS_01 << 8))
-#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (OMAP_REVBITS_02 << 8))
-#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (OMAP_REVBITS_03 << 8))
-#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (OMAP_REVBITS_04 << 8))
-#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (OMAP_REVBITS_05 << 8))
+#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (0x1 << 8))
+#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (0x2 << 8))
+#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (0x3 << 8))
+#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (0x4 << 8))
+#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (0x5 << 8))
#define OMAP363X_CLASS 0x36300034
#define OMAP3630_REV_ES1_0 OMAP363X_CLASS
-#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (OMAP_REVBITS_01 << 8))
-#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (OMAP_REVBITS_02 << 8))
+#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8))
+#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8))
#define OMAP3517_CLASS 0x35170034
#define OMAP3517_REV_ES1_0 OMAP3517_CLASS
-#define OMAP3517_REV_ES1_1 (OMAP3517_CLASS | (OMAP_REVBITS_01 << 8))
+#define OMAP3517_REV_ES1_1 (OMAP3517_CLASS | (0x1 << 8))
#define TI816X_CLASS 0x81600034
#define TI8168_REV_ES1_0 TI816X_CLASS
-#define TI8168_REV_ES1_1 (TI816X_CLASS | (OMAP_REVBITS_01 << 8))
+#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
#define OMAP443X_CLASS 0x44300044
#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
^ permalink raw reply related
* [PATCH 6/6] OMAP2+: id: remove OMAP_REVBITS_* macros
From: Igor Grinberg @ 2011-09-14 12:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.DEB.2.00.1109140628520.27954@utopia.booyaka.com>
On 09/14/11 15:29, Paul Walmsley wrote:
> On Wed, 14 Sep 2011, Igor Grinberg wrote:
>
>> Hi Paul,
>>
>> Same problem (as with 3_6) here...
>
> Thanks, I'll repost those. In the meantime, maybe try pulling the branch
> 'id_3517_cleanup_3.2' from git://git.pwsan.com/linux-2.6 ?
I've applied those manually on top of v3.1-rc3:
--------------cut--------------------
[ 0.000000] Linux version 3.1.0-rc3-00006-ga942f6de (grinberg at grinberg-linux) (gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202) ) #1 SMP Wed Sep 14 15:35:32 IDT 2011
[ 0.000000] CPU: ARMv7 Processor [411fc087] revision 7 (ARMv7), cr=10c53c7f
[ 0.000000] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
[ 0.000000] Machine: Compulab CM-T3517
[ 0.000000] Reserving 8388608 bytes SDRAM for VRAM
[ 0.000000] Memory policy: ECC disabled, Data cache writeback
[ 0.000000] OMAP3430/3530 ES1.0 (l2cache iva sgx neon isp )
----------cut----------------------------
^^^^^^^^^^^^^^^^^^^
While U-Boot says:
------------cut---------------------
U-Boot 2009.11-cm-t3517-1 (Dec 10 2010 - 23:25:02)
AM35xx-GP ES1.0, L3-165MHz
------------cut---------------------
Do I miss something, that should be in your tree?
Pulling it in right now, should be available shortly...
--
Regards,
Igor.
^ permalink raw reply
* [PATCH 1/4] AM3517 : support for suspend/resume
From: Koyamangalath, Abhilash @ 2011-09-14 13:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <8739g0b8sa.fsf@ti.com>
hi Kevin
On Tue, Sep 13, 2011 at 11:54 PM, Hilman, Kevin wrote:
> Hi Abhilash,
>
> "Koyamangalath, Abhilash" <abhilash.kv@ti.com> writes:
>
>> Hi
>>
>> On Wed, Aug 31, 2011 at 4:28 AM, Hilman, Kevin wrote:
>>>
>>> Abhilash K V <abhilash.kv@ti.com> writes:
>>>
<snip>
>>>
>>> In addition to Russell's comments about using the latest code from
>>> mainline, I have some comments below.
>> [Abhilash K V] I have reworked the patch against the tip (as suggested by
>> Russell).
>> And I've incorporated all of Kevin's comments too.
>
> Great, thanks!
>
>> There is one "known" issue left which needs to be closed before I can submit v2 of this patch.
>> With no_console_suspend, suspend to RAM hangs right now on AM3517, after
>> the message:
>> Disabling non-boot CPUs ...
>> There is no error message or dump.
>> I found that this crash is happening in a call to pr_warning(), from _omap_device_deactivate().
>> The same code does not produce this issue on omap34xx due to this snippet from omap_sram_idle() :
>> /* PER */
>> if (per_next_state < PWRDM_POWER_ON) {
>> per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
>> omap_uart_prepare_idle(2);
>> omap_uart_prepare_idle(3);
>> omap2_gpio_prepare_for_idle(per_going_off);
>> if (per_next_state == PWRDM_POWER_OFF)
>> omap3_per_save_context();
>> }
>> /* CORE */
>> if (core_next_state < PWRDM_POWER_ON) {
>> omap_uart_prepare_idle(0);
>> omap_uart_prepare_idle(1);
>> if (core_next_state == PWRDM_POWER_OFF) {
>> omap3_core_save_context();
>> omap3_cm_save_context();
>> }
>> }
>> This happens in preparation to the suspend operation (I,e. the WFI).
>> As seen here, on 34xx the sequence in which the uarts are disabled is 2, 3, 0 and 1.The console-uart, which is uart-1 here (starting from uart-0) is disabled last.
>
>> For AM3517 EVM, the console-uart is uart-2 and this ought to be
>> disabled at the last to prevent this crash from occurring.
>
> There are several other OMAP3 platforms (n900, Beagle, etc.) where the
> UART console is also UART2, so console ordering is not the problem.
[Abhilash K V] OK. Yet changing the order so that uart-2 is disabled at the last
seems to rid me of the crash on AM35x.
I understand that holding the console_sem before suspend (your fix below) is the
way to go, but I'm just curious over what's happening here.
Simply put what is the rationale behind choosing this order of UART-disables ?
>
> The fact that that pr_warning is making it to the console suggests that
> the console is not locked. In the idle path, we take the console lock
> (using console_trylock(), just above the code you showed above.)
>
> But during suspend, there was an assumption (by me[2]) that the console
> would always be locked in the suspend path. During no_console_suspend,
> it appears that is not the case.
>
> Can you try the patch below[1] to see if that fixes your problem? I
> think it should.
[Abhilash K V] Yes it does, thanks.
>
> Kevin
>
>
> [1]
> From 5b5a73101fcfa042d53828c017ee3149eae44b50 Mon Sep 17 00:00:00 2001
> From: Kevin Hilman <khilman@ti.com>
> Date: Tue, 13 Sep 2011 11:18:44 -0700
> Subject: [PATCH] OMAP3: PM: fix UART handling when using no_console_suspend
>
> During the idle/suspend path, we expect the console lock to be held so
> that no console output is done during/after the UARTs are idled.
>
> However, when using the no_console_suspend argument on the
> command-line, the console driver does not take the console lock. This
> allows the possibility of console activity after UARTs have been
> disabled.
>
> To fix, update the current is_suspending() to also check the
> console_suspend_enabled flag.
>
> NOTE: this is short-term workaround until the OMAP serial driver
> is fully converted to use runtime PM.
>
> Signed-off-by: Kevin Hilman <khilman@ti.com>
> ---
> arch/arm/mach-omap2/pm34xx.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
> index 7255d9b..c8cbd00 100644
> --- a/arch/arm/mach-omap2/pm34xx.c
> +++ b/arch/arm/mach-omap2/pm34xx.c
> @@ -55,7 +55,7 @@
> static suspend_state_t suspend_state = PM_SUSPEND_ON;
> static inline bool is_suspending(void)
> {
> - return (suspend_state != PM_SUSPEND_ON);
> + return (suspend_state != PM_SUSPEND_ON) && console_suspend_enabled;
> }
> #else
> static inline bool is_suspending(void)
> --
> 1.7.6
>
>
>
> [2]
> commit e83df17f178360a8e7874441bca04a710c869e42
> Author: Kevin Hilman <khilman@deeprootsystems.com>
> Date: Wed Dec 8 22:40:40 2010 +0000
>
> OMAP2+: PM/serial: fix console semaphore acquire during suspend
>
> commit 0d8e2d0dad98a693bad88aea6876ac8b94ad95c6 (OMAP2+: PM/serial:
> hold console semaphore while OMAP UARTs are disabled) added use of the
> console semaphore to protect UARTs from being accessed after disabled
> during idle, but this causes problems in suspend.
>
> During suspend, the console semaphore is acquired by the console
> suspend method (console_suspend()) so the try_acquire_console_sem()
> will always fail and suspend will be aborted.
>
> To fix, introduce a check so the console semaphore is only attempted
> during idle, and not during suspend. Also use the same check so that
> the console semaphore is not prematurely released during resume.
>
> Thanks to Paul Walmsley for suggesting adding the same check during
> resume.
>
> Cc: Paul Walmsley <paul@pwsan.com>
> Tested-by: Jean Pihet <j-pihet@ti.com>
> Tested-by: Paul Walmsley <paul@pwsan.com>
> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
> Signed-off-by: Tony Lindgren <tony@atomide.com>
>
>
>
^ permalink raw reply
* [PATCH] test patch for Igor
From: Paul Walmsley @ 2011-09-14 13:04 UTC (permalink / raw)
To: linux-arm-kernel
---
arch/arm/mach-omap2/clock3xxx_data.c | 8 ++++----
arch/arm/mach-omap2/id.c | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index b9b8446..078a40a 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3472,12 +3472,12 @@ int __init omap3xxx_clk_init(void)
struct omap_clk *c;
u32 cpu_clkflg = 0;
- if (cpu_is_omap3517()) {
- cpu_mask = RATE_IN_34XX;
- cpu_clkflg = CK_3517;
- } else if (cpu_is_omap3505()) {
+ if (cpu_is_omap3505()) {
cpu_mask = RATE_IN_34XX;
cpu_clkflg = CK_3505;
+ } else if (cpu_is_omap3517()) {
+ cpu_mask = RATE_IN_34XX;
+ cpu_clkflg = CK_3517;
} else if (cpu_is_omap3630()) {
cpu_mask = (RATE_IN_34XX | RATE_IN_36XX);
cpu_clkflg = CK_36XX;
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 307e186..ed1d439 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -463,7 +463,7 @@ static void __init omap3_cpuinfo(const char *cpu_rev)
*/
if (cpu_is_omap3630()) {
cpu_name = "OMAP3630";
- } else if (cpu_is_omap3505()) {
+ } else if (cpu_is_omap3517()) {
/* AM35xx devices */
cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
} else if (cpu_is_ti816x()) {
--
1.7.5.4
^ permalink raw reply related
* [PATCH V4 5/6] ARM: S5P6440: Add LCD-LTE480 and enable Framebuffer support
From: Kukjin Kim @ 2011-09-14 13:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1315591301-17166-6-git-send-email-ajaykumar.rs@samsung.com>
Ajay Kumar wrote:
>
> This patch:
> -- Adds platform device support for LCD-LTE480.
> -- Adds platform data for FB with win_mode and default_bpp.
> -- Enables FB device support and platform-lcd support.
> -- Adds SPCON settings for LCD.
>
> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
> ---
> arch/arm/mach-s5p64x0/Kconfig | 2 +
> arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | 4 +
> arch/arm/mach-s5p64x0/mach-smdk6440.c | 75
> ++++++++++++++++++++++++
> 3 files changed, 81 insertions(+), 0 deletions(-)
>
(snip)
> +#include <plat/regs-fb.h>
Should be <plat/regs-fb-v4.h>?
(snip)
> +/* Frame Buffer */
> +static struct s3c_fb_pd_win smdk6440_fb_win0 = {
> + .win_mode = {
> + .left_margin = 8,
> + .right_margin = 13,
> + .upper_margin = 7,
> + .lower_margin = 5,
> + .hsync_len = 3,
> + .vsync_len = 1,
> + .xres = 800,
> + .yres = 480,
> + .refresh = 60,
if its value is 60, we don't need .refresh here.
(snip)
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply
* [PATCH v7 14/26] gpio/omap: remove unnecessary bit-masking for read access
From: DebBarma, Tarun Kanti @ 2011-09-14 13:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4E708DCA.3090606@ru.mvista.com>
On Wed, Sep 14, 2011 at 4:49 PM, Sergei Shtylyov <sshtylyov@mvista.com> wrote:
> Hello.
>
> On 13-09-2011 17:02, Tarun Kanti DebBarma wrote:
>
>> Remove un-necessary bit masking. Since the register are 4 byte aligned
>> and readl would work as is. The 'enabled' mask is already taking care
>> to mask for bank width.
>
>> Signed-off-by: Charulatha V<charu@ti.com>
>> Signed-off-by: Tarun Kanti DebBarma<tarun.kanti@ti.com>
>> Reviewed-by: Santosh Shilimkar<santosh.shilimkar@ti.com>
>> ---
>> ?drivers/gpio/gpio-omap.c | ? ?2 --
>> ?1 files changed, 0 insertions(+), 2 deletions(-)
>
>> diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
>> index 876e387..d614c6d 100644
>> --- a/drivers/gpio/gpio-omap.c
>> +++ b/drivers/gpio/gpio-omap.c
>> @@ -571,8 +571,6 @@ static void gpio_irq_handler(unsigned int irq, struct
>> irq_desc *desc)
>> ? ? ? ? ? ? ? ?enabled = _get_gpio_irqbank_mask(bank);
>> ? ? ? ? ? ? ? ?isr_saved = isr = __raw_readl(isr_reg)& ?enabled;
>>
>> - ? ? ? ? ? ? ? if (cpu_is_omap15xx()&& ?(bank->method == METHOD_MPUIO))
>> - ? ? ? ? ? ? ? ? ? ? ? isr&= 0x0000ffff;
>>
>
> ? Should have removed the now unneeded empty line too.
Sure... I will remove.
--
Tarun
>
>> ? ? ? ? ? ? ? ?if (bank->level_mask)
>> ? ? ? ? ? ? ? ? ? ? ? ?level_mask = bank->level_mask& ?enabled;
>
> WBR, Sergei
>
^ permalink raw reply
* [PATCH 6/6] OMAP2+: id: remove OMAP_REVBITS_* macros
From: Paul Walmsley @ 2011-09-14 13:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4E70A337.6090400@compulab.co.il>
Hi Igor,
On Wed, 14 Sep 2011, Igor Grinberg wrote:
> I've applied those manually on top of v3.1-rc3:
>
> --------------cut--------------------
> [ 0.000000] Linux version 3.1.0-rc3-00006-ga942f6de (grinberg at grinberg-linux) (gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202) ) #1 SMP Wed Sep 14 15:35:32 IDT 2011
> [ 0.000000] CPU: ARMv7 Processor [411fc087] revision 7 (ARMv7), cr=10c53c7f
> [ 0.000000] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
> [ 0.000000] Machine: Compulab CM-T3517
> [ 0.000000] Reserving 8388608 bytes SDRAM for VRAM
> [ 0.000000] Memory policy: ECC disabled, Data cache writeback
> [ 0.000000] OMAP3430/3530 ES1.0 (l2cache iva sgx neon isp )
> ----------cut----------------------------
> ^^^^^^^^^^^^^^^^^^^
>
> While U-Boot says:
>
> ------------cut---------------------
> U-Boot 2009.11-cm-t3517-1 (Dec 10 2010 - 23:25:02)
>
> AM35xx-GP ES1.0, L3-165MHz
> ------------cut---------------------
>
> Do I miss something, that should be in your tree?
> Pulling it in right now, should be available shortly...
Could you try this patch on top of the ones that you are testing?
thanks for the testing help,
- Paul
^ permalink raw reply
* [PATCH 4/6] ARM: zImage: gather some string functions into string.c
From: Dave Martin @ 2011-09-14 13:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1315978906-15829-5-git-send-email-nico@fluxnic.net>
On Wed, Sep 14, 2011 at 01:41:44AM -0400, Nicolas Pitre wrote:
> From: Nicolas Pitre <nicolas.pitre@linaro.org>
>
> This is a small subset of string functions needed by commits to come.
> Except for memcpy() which is unchanged from its original location, their
> implementation is meant to be small, and -Os is enforced to prevent gcc
> from doing pointless loop unrolling.
>
> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
> ---
> arch/arm/boot/compressed/Makefile | 4 +
> arch/arm/boot/compressed/misc.c | 42 +------------
> arch/arm/boot/compressed/string.c | 127 +++++++++++++++++++++++++++++++++++++
> 3 files changed, 132 insertions(+), 41 deletions(-)
> create mode 100644 arch/arm/boot/compressed/string.c
>
> diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
> index 4867647b97..c20ddc69d9 100644
> --- a/arch/arm/boot/compressed/Makefile
> +++ b/arch/arm/boot/compressed/Makefile
> @@ -26,6 +26,10 @@ HEAD = head.o
> OBJS += misc.o decompress.o
> FONTC = $(srctree)/drivers/video/console/font_acorn_8x8.c
>
> +# string library code (-Os is enforced to keep it much smaller)
> +OBJS += string.o
> +CFLAGS_string.o := -Os
> +
> #
> # Architecture dependencies
> #
> diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
> index 832d37236c..8e2a8fca5e 100644
> --- a/arch/arm/boot/compressed/misc.c
> +++ b/arch/arm/boot/compressed/misc.c
> @@ -18,14 +18,9 @@
>
> unsigned int __machine_arch_type;
>
> -#define _LINUX_STRING_H_
> -
> #include <linux/compiler.h> /* for inline */
> -#include <linux/types.h> /* for size_t */
> -#include <linux/stddef.h> /* for NULL */
> +#include <linux/types.h>
> #include <linux/linkage.h>
> -#include <asm/string.h>
> -
>
> static void putstr(const char *ptr);
> extern void error(char *x);
> @@ -101,41 +96,6 @@ static void putstr(const char *ptr)
> flush();
> }
>
> -
> -void *memcpy(void *__dest, __const void *__src, size_t __n)
> -{
> - int i = 0;
> - unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src;
> -
> - for (i = __n >> 3; i > 0; i--) {
> - *d++ = *s++;
> - *d++ = *s++;
> - *d++ = *s++;
> - *d++ = *s++;
> - *d++ = *s++;
> - *d++ = *s++;
> - *d++ = *s++;
> - *d++ = *s++;
> - }
> -
> - if (__n & 1 << 2) {
> - *d++ = *s++;
> - *d++ = *s++;
> - *d++ = *s++;
> - *d++ = *s++;
> - }
> -
> - if (__n & 1 << 1) {
> - *d++ = *s++;
> - *d++ = *s++;
> - }
> -
> - if (__n & 1)
> - *d++ = *s++;
> -
> - return __dest;
> -}
Have you seen this?
http://en.wikipedia.org/wiki/Duff%27s_device
Once I finished vomiting, this actually struck be as rather neat.
If I've understood right, it seems a good fit for the manual unrolling
you do here.
Cheers
---Dave
^ permalink raw reply
* [PATCH 0/6] zImage improvements with DTB append and ATAG compatibility
From: Dave Martin @ 2011-09-14 13:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1315978906-15829-1-git-send-email-nico@fluxnic.net>
On Wed, Sep 14, 2011 at 01:41:40AM -0400, Nicolas Pitre wrote:
> This is the latest incarnation of my patch series allowing a DTB
> to be appended to zImage, including the ATAG conversion wrapper and
> other minor cleanups.
>
> This can also be pulled from:
>
> git://git.linaro.org/people/nico/linux zImage_DTB_append
>
> This works for me on the test setup I have.
> ACKs/Tested-By's would be appreciated.
For the series:
Tested-by: Dave Martin <dave.martin@linaro.org>
Tested in Thumb-2 with my almost-ready vexpress DT patches,
including the ATAG merging support.
Cheers
---Dave
^ permalink raw reply
* [PATCH v2] ARM: mach-mxs/mx28evk: Only register devices if their GPIO requests succeeded
From: Fabio Estevam @ 2011-09-14 13:20 UTC (permalink / raw)
To: linux-arm-kernel
Currently framebuffer and MMC devices are registered even if their associated
GPIO pins fail to be requested.
Change the logic so that the registration of such devices only occurs if their
GPIO requests succeeded.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes since v1:
- Use gpio_request_array for requesting multiple LCD GPIOs
- Pass GPIOF_OUT_INIT_HIGH as the init gpio value so that gpio_set_value calls can be ommited
arch/arm/mach-mxs/mach-mx28evk.c | 27 +++++++++++++--------------
1 files changed, 13 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index 3f86e7a..5753a74 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -351,6 +351,11 @@ static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
},
};
+static struct gpio mx28evk_lcd_gpios[] = {
+ { MX28EVK_LCD_ENABLE, GPIOF_OUT_INIT_HIGH, "lcd-enable" },
+ { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" },
+};
+
static void __init mx28evk_init(void)
{
int ret;
@@ -377,19 +382,12 @@ static void __init mx28evk_init(void)
mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]);
}
- ret = gpio_request_one(MX28EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable");
- if (ret)
- pr_warn("failed to request gpio lcd-enable: %d\n", ret);
- else
- gpio_set_value(MX28EVK_LCD_ENABLE, 1);
-
- ret = gpio_request_one(MX28EVK_BL_ENABLE, GPIOF_DIR_OUT, "bl-enable");
+ ret = gpio_request_array(mx28evk_lcd_gpios,
+ ARRAY_SIZE(mx28evk_lcd_gpios));
if (ret)
- pr_warn("failed to request gpio bl-enable: %d\n", ret);
+ pr_warn("failed to request gpio pins for lcd: %d\n", ret);
else
- gpio_set_value(MX28EVK_BL_ENABLE, 1);
-
- mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
+ mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
/* power on mmc slot by writing 0 to the gpio */
ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW,
@@ -401,9 +399,10 @@ static void __init mx28evk_init(void)
ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW,
"mmc1-slot-power");
if (ret)
- pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret);
- mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
-
+ pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret);
+ else
+ mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
+
gpio_led_register_device(0, &mx28evk_led_data);
}
--
1.7.1
^ permalink raw reply related
* [PATCH] ARM: mach-mxs/mx28evk: Only register devices if their GPIO requests succeeded
From: Fabio Estevam @ 2011-09-14 13:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110914065501.GR28624@pengutronix.de>
2011/9/14 Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>:
> Hello,
>
> On Tue, Sep 13, 2011 at 05:25:19PM -0300, Fabio Estevam wrote:
>> Currently framebuffer and MMC devices are registered even if their associated
>> GPIO pins fail to be requested.
> Is this a real or only theoretic problem? (For me (or later Sascha) to
> judge if it should go in before 3.2.)
I haven't seen this to happen, but it is the safe thing to do here.
I think this can wait 3.2 cycle.
>
>> diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
>> index 3f86e7a..e5c66a2 100644
>> --- a/arch/arm/mach-mxs/mach-mx28evk.c
>> +++ b/arch/arm/mach-mxs/mach-mx28evk.c
>> @@ -353,7 +353,7 @@ static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
>>
>> ?static void __init mx28evk_init(void)
>> ?{
>> - ? ? int ret;
>> + ? ? int ret, gpio_lcd_error;
>>
>> ? ? ? mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads));
>>
>> @@ -378,18 +378,23 @@ static void __init mx28evk_init(void)
>> ? ? ? }
>>
>> ? ? ? ret = gpio_request_one(MX28EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable");
>> - ? ? if (ret)
>> + ? ? if (ret) {
>> ? ? ? ? ? ? ? pr_warn("failed to request gpio lcd-enable: %d\n", ret);
>> + ? ? ? ? ? ? gpio_lcd_error = 1;
>> + ? ? }
>> ? ? ? else
>> ? ? ? ? ? ? ? gpio_set_value(MX28EVK_LCD_ENABLE, 1);
>>
>> ? ? ? ret = gpio_request_one(MX28EVK_BL_ENABLE, GPIOF_DIR_OUT, "bl-enable");
>> - ? ? if (ret)
>> + ? ? if (ret) {
>> ? ? ? ? ? ? ? pr_warn("failed to request gpio bl-enable: %d\n", ret);
>> + ? ? ? ? ? ? gpio_lcd_error = 1;
>> + ? ? }
>> ? ? ? else
>> ? ? ? ? ? ? ? gpio_set_value(MX28EVK_BL_ENABLE, 1);
> If it's not important which gpio failed, you can do:
>
> ? ? ? ?ret = gpio_request_array(...)
> ? ? ? ?if (ret)
> ? ? ? ? ? ? ? ?pr_warn("failed to request gpio for lcd\n");
> ? ? ? ?else
> ? ? ? ? ? ? ? ?mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
>
> (Apart from the different message this differs in semantic when the 2nd
> request fails. With my suggestion the first gpio is freed then which
> seems cleaner.) I don't care much though.
Ok, looks better. I did like you suggested in v2.
Regards,
Fabio Estevam
^ permalink raw reply
* [PATCH v15 11/12 REPOST] OMAP: dmtimer: extend spinlock in request functions
From: Tarun Kanti DebBarma @ 2011-09-14 13:28 UTC (permalink / raw)
To: linux-arm-kernel
The request functions now verify the success of omap_dm_timer_prepare() call
after a timer is acquired. If *_prepare() fails then we have to release the
timer. In order to avoid race condition during this time, include *_prepare()
within lock.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/plat-omap/dmtimer.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 15fe01a..7c915e8 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -174,7 +174,6 @@ struct omap_dm_timer *omap_dm_timer_request(void)
timer->reserved = 1;
break;
}
- spin_unlock_irqrestore(&dm_timer_lock, flags);
if (timer) {
ret = omap_dm_timer_prepare(timer);
@@ -183,6 +182,7 @@ struct omap_dm_timer *omap_dm_timer_request(void)
timer = NULL;
}
}
+ spin_unlock_irqrestore(&dm_timer_lock, flags);
if (!timer)
pr_debug("%s: timer request failed!\n", __func__);
@@ -205,7 +205,6 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
break;
}
}
- spin_unlock_irqrestore(&dm_timer_lock, flags);
if (timer) {
ret = omap_dm_timer_prepare(timer);
@@ -214,6 +213,7 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
timer = NULL;
}
}
+ spin_unlock_irqrestore(&dm_timer_lock, flags);
if (!timer)
pr_debug("%s: timer%d request failed!\n", __func__, id);
--
1.7.0.4
^ permalink raw reply related
* [PATCH v15 12/12 REPOST] OMAP: dmtimer: add error handling to export APIs
From: Tarun Kanti DebBarma @ 2011-09-14 13:29 UTC (permalink / raw)
To: linux-arm-kernel
Add error handling code to export APIs.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/plat-omap/dmtimer.c | 101 ++++++++++++++++++++++-------
arch/arm/plat-omap/include/plat/dmtimer.h | 24 ++++----
2 files changed, 88 insertions(+), 37 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 7c915e8..e513637 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -222,12 +222,16 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
}
EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
-void omap_dm_timer_free(struct omap_dm_timer *timer)
+int omap_dm_timer_free(struct omap_dm_timer *timer)
{
+ if (unlikely(!timer))
+ return -EINVAL;
+
clk_put(timer->fclk);
WARN_ON(!timer->reserved);
timer->reserved = 0;
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_free);
@@ -245,7 +249,9 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
{
- return timer->irq;
+ if (timer)
+ return timer->irq;
+ return -EINVAL;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
@@ -289,7 +295,9 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
{
- return timer->fclk;
+ if (timer)
+ return timer->fclk;
+ return NULL;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
@@ -303,21 +311,25 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
#endif
-void omap_dm_timer_trigger(struct omap_dm_timer *timer)
+int omap_dm_timer_trigger(struct omap_dm_timer *timer)
{
- if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) {
- pr_err("%s: timer%d not enabled.\n", __func__, timer->id);
- return;
+ if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
+ pr_err("%s: timer not available or enabled.\n", __func__);
+ return -EINVAL;
}
omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
-void omap_dm_timer_start(struct omap_dm_timer *timer)
+int omap_dm_timer_start(struct omap_dm_timer *timer)
{
u32 l;
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
if (timer->loses_context) {
@@ -335,15 +347,19 @@ void omap_dm_timer_start(struct omap_dm_timer *timer)
/* Save the context */
timer->context.tclr = l;
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_start);
-void omap_dm_timer_stop(struct omap_dm_timer *timer)
+int omap_dm_timer_stop(struct omap_dm_timer *timer)
{
unsigned long rate = 0;
struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
bool is_omap2 = true;
+ if (unlikely(!timer))
+ return -EINVAL;
+
if (pdata->needs_manual_reset)
is_omap2 = false;
else
@@ -368,13 +384,19 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer)
timer->context.tisr =
omap_dm_timer_read_reg(timer, OMAP_TIMER_STAT_REG);
omap_dm_timer_disable(timer);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
{
int ret;
- struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
+ struct dmtimer_platform_data *pdata;
+
+ if (unlikely(!timer))
+ return -EINVAL;
+
+ pdata = timer->pdev->dev.platform_data;
if (source < 0 || source >= 3)
return -EINVAL;
@@ -385,11 +407,14 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
-void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
+int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
unsigned int load)
{
u32 l;
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
if (autoreload)
@@ -404,15 +429,19 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
timer->context.tclr = l;
timer->context.tldr = load;
omap_dm_timer_disable(timer);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
/* Optimized set_load which removes costly spin wait in timer_start */
-void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
+int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
unsigned int load)
{
u32 l;
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
if (timer->loses_context) {
@@ -438,14 +467,18 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
timer->context.tclr = l;
timer->context.tldr = load;
timer->context.tcrr = load;
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
-void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
+int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
unsigned int match)
{
u32 l;
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
if (enable)
@@ -459,14 +492,18 @@ void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
timer->context.tclr = l;
timer->context.tmar = match;
omap_dm_timer_disable(timer);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
-void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
+int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
int toggle, int trigger)
{
u32 l;
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM |
@@ -481,13 +518,17 @@ void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
/* Save the context */
timer->context.tclr = l;
omap_dm_timer_disable(timer);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
-void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
+int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
{
u32 l;
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2));
@@ -500,12 +541,16 @@ void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
/* Save the context */
timer->context.tclr = l;
omap_dm_timer_disable(timer);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
-void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
+int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
unsigned int value)
{
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
__omap_dm_timer_int_enable(timer->io_base, value,
timer->intr_offset, timer->func_offset);
@@ -514,6 +559,7 @@ void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
timer->context.tier = value;
timer->context.twer = value;
omap_dm_timer_disable(timer);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
@@ -521,8 +567,8 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
{
unsigned int l;
- if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) {
- pr_err("%s: timer%d not enabled.\n", __func__, timer->id);
+ if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
+ pr_err("%s: timer not available or enabled.\n", __func__);
return 0;
}
@@ -532,19 +578,23 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
}
EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
-void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
+int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
{
+ if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev)))
+ return -EINVAL;
+
__omap_dm_timer_write_status(timer->io_base, value,
timer->intr_offset, timer->func_offset);
/* Save the context */
timer->context.tisr = value;
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
{
- if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) {
- pr_err("%s: timer%d not enabled.\n", __func__, timer->id);
+ if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
+ pr_err("%s: timer not iavailable or enabled.\n", __func__);
return 0;
}
@@ -553,17 +603,18 @@ unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
}
EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
-void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
+int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
{
- if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) {
- pr_err("%s: timer%d not enabled.\n", __func__, timer->id);
- return;
+ if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
+ pr_err("%s: timer not available or enabled.\n", __func__);
+ return -EINVAL;
}
omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
/* Save the context */
timer->context.tcrr = value;
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index 8c0fbb6..110a649 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -93,7 +93,7 @@ struct dmtimer_platform_data {
struct omap_dm_timer *omap_dm_timer_request(void);
struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id);
-void omap_dm_timer_free(struct omap_dm_timer *timer);
+int omap_dm_timer_free(struct omap_dm_timer *timer);
void omap_dm_timer_enable(struct omap_dm_timer *timer);
void omap_dm_timer_disable(struct omap_dm_timer *timer);
@@ -102,23 +102,23 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer);
u32 omap_dm_timer_modify_idlect_mask(u32 inputmask);
struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer);
-void omap_dm_timer_trigger(struct omap_dm_timer *timer);
-void omap_dm_timer_start(struct omap_dm_timer *timer);
-void omap_dm_timer_stop(struct omap_dm_timer *timer);
+int omap_dm_timer_trigger(struct omap_dm_timer *timer);
+int omap_dm_timer_start(struct omap_dm_timer *timer);
+int omap_dm_timer_stop(struct omap_dm_timer *timer);
int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source);
-void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value);
-void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value);
-void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match);
-void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger);
-void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler);
+int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value);
+int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value);
+int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match);
+int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger);
+int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler);
-void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value);
unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer);
-void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value);
unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer);
-void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value);
int omap_dm_timers_active(void);
--
1.7.0.4
^ permalink raw reply related
* [PATCH 6/6] OMAP2+: id: remove OMAP_REVBITS_* macros
From: Igor Grinberg @ 2011-09-14 13:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.DEB.2.00.1109140708590.27954@utopia.booyaka.com>
On 09/14/11 16:10, Paul Walmsley wrote:
> Hi Igor,
>
> Could you try this patch on top of the ones that you are testing?
After applying the patch to your id_3517_cleanup_3.2 branch:
--------------cut-------------------
[ 0.000000] Linux version 3.1.0-rc4-00014-gbe89163 (grinberg at grinberg-linux) (gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202) ) #2 SMP Wed Sep 14 16:21:47 IDT 2011
[ 0.000000] CPU: ARMv7 Processor [411fc087] revision 7 (ARMv7), cr=10c53c7f
[ 0.000000] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
[ 0.000000] Machine: Compulab CM-T3517
[ 0.000000] Reserving 8388608 bytes SDRAM for VRAM
[ 0.000000] Memory policy: ECC disabled, Data cache writeback
[ 0.000000] AM3517 ES1.0 (l2cache iva sgx neon isp )
-------------cut--------------------
The SoC is really AM3517. I have no AM3505 available right now, sorry...
Feel free to add:
Tested-by: Igor Grinberg <grinberg@compulab.co.il>
>
> thanks for the testing help,
No problem ;)
--
Regards,
Igor.
^ permalink raw reply
* [PATCH 2/6] ARM: zImage: Allow the appending of a device tree binary
From: Dave Martin @ 2011-09-14 13:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1315978906-15829-3-git-send-email-nico@fluxnic.net>
On Wed, Sep 14, 2011 at 01:41:42AM -0400, Nicolas Pitre wrote:
> From: Nicolas Pitre <nicolas.pitre@linaro.org>
>
> This patch provides the ability to boot using a device tree that is appended
> to the raw binary zImage (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
>
> Signed-off-by: John Bonesio <bones@secretlab.ca>
> [nico: adjusted to latest zImage changes plus additional cleanups]
> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
> Acked-by: Grant Likely <grant.likely@secretlab.ca>
> Acked-by: Tony Lindgren <tony@atomide.com>
> ---
> arch/arm/Kconfig | 8 ++++
> arch/arm/boot/compressed/head.S | 70 +++++++++++++++++++++++++++++++++++++--
> 2 files changed, 75 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 5ebc5d922e..83323c2b1f 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -1781,6 +1781,14 @@ config ZBOOT_ROM_SH_MOBILE_SDHI
>
> endchoice
>
> +config ARM_APPENDED_DTB
> + bool "Use appended device tree blob to zImage"
> + depends on OF && !ZBOOT_ROM
> + help
> + With this option, the boot code will look for a device tree binary
> + (dtb) appended to zImage
> + (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
> +
> config CMDLINE
> string "Default kernel command string"
> default ""
> diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
> index e95a598960..3ce5738ddb 100644
> --- a/arch/arm/boot/compressed/head.S
> +++ b/arch/arm/boot/compressed/head.S
> @@ -216,6 +216,59 @@ restart: adr r0, LC0
> mov r10, r6
> #endif
>
> + mov r5, #0 @ init dtb size to 0
> +#ifdef CONFIG_ARM_APPENDED_DTB
> +/*
> + * r0 = delta
> + * r2 = BSS start
> + * r3 = BSS end
> + * r4 = final kernel address
> + * r5 = appended dtb size (still unknown)
> + * r6 = _edata
> + * r7 = architecture ID
> + * r8 = atags/device tree pointer
> + * r9 = size of decompressed image
> + * r10 = end of this image, including bss/stack/malloc space if non XIP
> + * r11 = GOT start
> + * r12 = GOT end
> + * sp = stack pointer
> + *
> + * if there are device trees (dtb) appended to zImage, advance r10 so that the
> + * dtb data will get relocated along with the kernel if necessary.
> + */
> +
> + ldr lr, [r6, #0]
> +#ifndef __ARMEB__
> + ldr r1, =0xedfe0dd0 @ sig is 0xd00dfeed big endian
> +#else
> + ldr r1, =0xd00dfeed
> +#endif
Do we worry that garbage in memory after the zImage might match this
magic number?
For example, if an ordinary userspace program allocates a huge number
of pages and fills them with bogus device tree headers, is there a chance
that the those headers could remain in memory across a reboot?
In principle this could lead to a security hole on platforms where the
boot images don't append a device tree, by allowing an attacker to
override the bootargs etc.
I don't know whether this is exploitable in practice, but it's worth
thinking about (apologies if it's already been discussed)
A possible workaround is to put a relative pointer or a flag at the
start of the zImage, which we can poke with a non-zero value when
the device tree is appended.
This makes appending the device tree non-trivial, but it's still pretty
simple to do; something like:
$ echo 'boo' | dd bs=4 count=1 seek=4 conv=notrunc of=zImage
$ cat dtb >>zImage
(Where I assume that the affected word in the zImage is initially not
'boo').
Cheers
---Dave
^ permalink raw reply
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