* [PATCH v16 10/12] OMAP: dmtimer: extend spinlock in request functions
From: Tarun Kanti DebBarma @ 2011-09-20 11:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316518227-28116-1-git-send-email-tarun.kanti@ti.com>
The request functions now verify the success of omap_dm_timer_prepare() call
after a timer is acquired. If *_prepare() fails then we have to release the
timer. In order to avoid race condition during this time, include *_prepare()
within lock.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/plat-omap/dmtimer.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index f549c63..631b6af 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -166,7 +166,6 @@ struct omap_dm_timer *omap_dm_timer_request(void)
timer->reserved = 1;
break;
}
- spin_unlock_irqrestore(&dm_timer_lock, flags);
if (timer) {
ret = omap_dm_timer_prepare(timer);
@@ -175,6 +174,7 @@ struct omap_dm_timer *omap_dm_timer_request(void)
timer = NULL;
}
}
+ spin_unlock_irqrestore(&dm_timer_lock, flags);
if (!timer)
pr_debug("%s: timer request failed!\n", __func__);
@@ -197,7 +197,6 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
break;
}
}
- spin_unlock_irqrestore(&dm_timer_lock, flags);
if (timer) {
ret = omap_dm_timer_prepare(timer);
@@ -206,6 +205,7 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
timer = NULL;
}
}
+ spin_unlock_irqrestore(&dm_timer_lock, flags);
if (!timer)
pr_debug("%s: timer%d request failed!\n", __func__, id);
--
1.7.0.4
^ permalink raw reply related
* [PATCH v16 11/12] OMAP: dmtimer: add error handling to export APIs
From: Tarun Kanti DebBarma @ 2011-09-20 11:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316518227-28116-1-git-send-email-tarun.kanti@ti.com>
Add error handling code to export APIs.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/plat-omap/dmtimer.c | 101 ++++++++++++++++++++++-------
arch/arm/plat-omap/include/plat/dmtimer.h | 24 ++++----
2 files changed, 88 insertions(+), 37 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 631b6af..41755ff 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -214,12 +214,16 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
}
EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
-void omap_dm_timer_free(struct omap_dm_timer *timer)
+int omap_dm_timer_free(struct omap_dm_timer *timer)
{
+ if (unlikely(!timer))
+ return -EINVAL;
+
clk_put(timer->fclk);
WARN_ON(!timer->reserved);
timer->reserved = 0;
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_free);
@@ -237,7 +241,9 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
{
- return timer->irq;
+ if (timer)
+ return timer->irq;
+ return -EINVAL;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
@@ -281,7 +287,9 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
{
- return timer->fclk;
+ if (timer)
+ return timer->fclk;
+ return NULL;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
@@ -295,21 +303,25 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
#endif
-void omap_dm_timer_trigger(struct omap_dm_timer *timer)
+int omap_dm_timer_trigger(struct omap_dm_timer *timer)
{
- if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) {
- pr_err("%s: timer%d not enabled.\n", __func__, timer->id);
- return;
+ if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
+ pr_err("%s: timer not available or enabled.\n", __func__);
+ return -EINVAL;
}
omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
-void omap_dm_timer_start(struct omap_dm_timer *timer)
+int omap_dm_timer_start(struct omap_dm_timer *timer)
{
u32 l;
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
if (timer->loses_context) {
@@ -327,15 +339,19 @@ void omap_dm_timer_start(struct omap_dm_timer *timer)
/* Save the context */
timer->context.tclr = l;
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_start);
-void omap_dm_timer_stop(struct omap_dm_timer *timer)
+int omap_dm_timer_stop(struct omap_dm_timer *timer)
{
unsigned long rate = 0;
struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
bool is_omap2 = true;
+ if (unlikely(!timer))
+ return -EINVAL;
+
if (pdata->needs_manual_reset)
is_omap2 = false;
else
@@ -358,13 +374,19 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer)
omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
timer->context.tisr = __raw_readl(timer->irq_stat);
omap_dm_timer_disable(timer);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
{
int ret;
- struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
+ struct dmtimer_platform_data *pdata;
+
+ if (unlikely(!timer))
+ return -EINVAL;
+
+ pdata = timer->pdev->dev.platform_data;
if (source < 0 || source >= 3)
return -EINVAL;
@@ -375,11 +397,14 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
-void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
+int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
unsigned int load)
{
u32 l;
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
if (autoreload)
@@ -394,15 +419,19 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
timer->context.tclr = l;
timer->context.tldr = load;
omap_dm_timer_disable(timer);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
/* Optimized set_load which removes costly spin wait in timer_start */
-void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
+int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
unsigned int load)
{
u32 l;
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
if (timer->loses_context) {
@@ -427,14 +456,18 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
timer->context.tclr = l;
timer->context.tldr = load;
timer->context.tcrr = load;
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
-void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
+int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
unsigned int match)
{
u32 l;
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
if (enable)
@@ -448,14 +481,18 @@ void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
timer->context.tclr = l;
timer->context.tmar = match;
omap_dm_timer_disable(timer);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
-void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
+int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
int toggle, int trigger)
{
u32 l;
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM |
@@ -470,13 +507,17 @@ void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
/* Save the context */
timer->context.tclr = l;
omap_dm_timer_disable(timer);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
-void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
+int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
{
u32 l;
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2));
@@ -489,12 +530,16 @@ void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
/* Save the context */
timer->context.tclr = l;
omap_dm_timer_disable(timer);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
-void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
+int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
unsigned int value)
{
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
__omap_dm_timer_int_enable(timer, value);
@@ -502,6 +547,7 @@ void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
timer->context.tier = value;
timer->context.twer = value;
omap_dm_timer_disable(timer);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
@@ -509,8 +555,8 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
{
unsigned int l;
- if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) {
- pr_err("%s: timer%d not enabled.\n", __func__, timer->id);
+ if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
+ pr_err("%s: timer not available or enabled.\n", __func__);
return 0;
}
@@ -520,18 +566,22 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
}
EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
-void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
+int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
{
+ if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev)))
+ return -EINVAL;
+
__omap_dm_timer_write_status(timer, value);
/* Save the context */
timer->context.tisr = value;
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
{
- if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) {
- pr_err("%s: timer%d not enabled.\n", __func__, timer->id);
+ if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
+ pr_err("%s: timer not iavailable or enabled.\n", __func__);
return 0;
}
@@ -539,17 +589,18 @@ unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
}
EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
-void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
+int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
{
- if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) {
- pr_err("%s: timer%d not enabled.\n", __func__, timer->id);
- return;
+ if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
+ pr_err("%s: timer not available or enabled.\n", __func__);
+ return -EINVAL;
}
omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
/* Save the context */
timer->context.tcrr = value;
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index 577a7a6..639957f 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -86,7 +86,7 @@ struct dmtimer_platform_data {
struct omap_dm_timer *omap_dm_timer_request(void);
struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id);
-void omap_dm_timer_free(struct omap_dm_timer *timer);
+int omap_dm_timer_free(struct omap_dm_timer *timer);
void omap_dm_timer_enable(struct omap_dm_timer *timer);
void omap_dm_timer_disable(struct omap_dm_timer *timer);
@@ -95,23 +95,23 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer);
u32 omap_dm_timer_modify_idlect_mask(u32 inputmask);
struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer);
-void omap_dm_timer_trigger(struct omap_dm_timer *timer);
-void omap_dm_timer_start(struct omap_dm_timer *timer);
-void omap_dm_timer_stop(struct omap_dm_timer *timer);
+int omap_dm_timer_trigger(struct omap_dm_timer *timer);
+int omap_dm_timer_start(struct omap_dm_timer *timer);
+int omap_dm_timer_stop(struct omap_dm_timer *timer);
int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source);
-void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value);
-void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value);
-void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match);
-void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger);
-void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler);
+int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value);
+int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value);
+int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match);
+int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger);
+int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler);
-void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value);
unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer);
-void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value);
unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer);
-void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value);
int omap_dm_timers_active(void);
--
1.7.0.4
^ permalink raw reply related
* [PATCH v16 12/12] OMAP: dmtimer: get rid of timer_ip_version field
From: Tarun Kanti DebBarma @ 2011-09-20 11:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316518227-28116-1-git-send-email-tarun.kanti@ti.com>
We do not need this field in dmtimer_platform_data{} anymore.
Instead, read "tidr" register to identify the ip version now.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 1 -
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 --
arch/arm/mach-omap2/timer.c | 8 +++++---
arch/arm/plat-omap/dmtimer.c | 2 ++
arch/arm/plat-omap/include/plat/dmtimer.h | 7 -------
5 files changed, 7 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index 177dee2..dc6ec15 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -43,7 +43,6 @@ static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = {
struct omap_hwmod_class omap2xxx_timer_hwmod_class = {
.name = "timer",
.sysc = &omap2xxx_timer_sysc,
- .rev = OMAP_TIMER_IP_VERSION_1,
};
/*
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 2e4852d..463ad78 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -545,7 +545,6 @@ static struct omap_hwmod_class_sysconfig omap3xxx_timer_1ms_sysc = {
static struct omap_hwmod_class omap3xxx_timer_1ms_hwmod_class = {
.name = "timer",
.sysc = &omap3xxx_timer_1ms_sysc,
- .rev = OMAP_TIMER_IP_VERSION_1,
};
static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = {
@@ -561,7 +560,6 @@ static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = {
static struct omap_hwmod_class omap3xxx_timer_hwmod_class = {
.name = "timer",
.sysc = &omap3xxx_timer_sysc,
- .rev = OMAP_TIMER_IP_VERSION_1,
};
/* secure timers dev attribute */
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 041fed9..c784eda 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -356,9 +356,10 @@ OMAP_SYS_TIMER(4)
static int omap2_dm_timer_set_src(struct platform_device *pdev, int source)
{
int ret;
- struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
+ struct omap_dm_timer *timer = platform_get_drvdata(pdev);
struct clk *fclk, *parent;
char *parent_name = NULL;
+ u32 tidr;
fclk = clk_get(&pdev->dev, "fck");
if (IS_ERR_OR_NULL(fclk)) {
@@ -377,10 +378,12 @@ static int omap2_dm_timer_set_src(struct platform_device *pdev, int source)
break;
case OMAP_TIMER_SRC_EXT_CLK:
- if (pdata->timer_ip_version == OMAP_TIMER_IP_VERSION_1) {
+ tidr = __raw_readl(timer->io_base);
+ if (!(tidr >> 16)) {
parent_name = "alt_ck";
break;
}
+
dev_err(&pdev->dev, "%s: %d: invalid clk src.\n",
__func__, __LINE__);
clk_put(fclk);
@@ -465,7 +468,6 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
sscanf(oh->name, "timer%2d", &id);
pdata->set_timer_src = omap2_dm_timer_set_src;
- pdata->timer_ip_version = oh->class->rev;
pwrdm = omap_hwmod_get_pwrdm(oh);
pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm);
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 41755ff..b66f93f 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -700,6 +700,8 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
pm_runtime_put(&pdev->dev);
}
+ platform_set_drvdata(pdev, timer);
+
/* add the timer element to the list */
spin_lock_irqsave(&dm_timer_lock, flags);
list_add_tail(&timer->node, &omap_timer_list);
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index 639957f..5025c2d 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -57,12 +57,6 @@
#define OMAP_TIMER_TRIGGER_OVERFLOW 0x01
#define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02
-/*
- * IP revision identifier so that Highlander IP
- * in OMAP4 can be distinguished.
- */
-#define OMAP_TIMER_IP_VERSION_1 0x1
-
/* timer capabilities used in hwmod database */
#define OMAP_TIMER_SECURE 0x80000000
#define OMAP_TIMER_ALWON 0x40000000
@@ -77,7 +71,6 @@ struct clk;
struct dmtimer_platform_data {
int (*set_timer_src)(struct platform_device *pdev, int source);
- int timer_ip_version;
u32 needs_manual_reset:1;
bool loses_context;
--
1.7.0.4
^ permalink raw reply related
* [PATCH 00/25] OMAP4: PM: suspend, CPU-hotplug and CPUilde support
From: Santosh @ 2011-09-20 11:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <9fa567d07831a1de1d0700151331b5c7@mail.gmail.com>
On Tuesday 20 September 2011 04:54 PM, Vishwanath Sripathy wrote:
>> -----Original Message-----
>> From: linux-arm-kernel-bounces at lists.infradead.org [mailto:linux-
>> arm-kernel-bounces at lists.infradead.org] On Behalf Of Santosh
>> Shilimkar
>> Sent: Sunday, September 04, 2011 7:24 PM
>> To: linux-omap at vger.kernel.org
>> Cc: khilman at ti.com; Santosh Shilimkar; rnayak at ti.com;
>> linux at arm.linux.org.uk; linux-arm-kernel at lists.infradead.org
>> Subject: [PATCH 00/25] OMAP4: PM: suspend, CPU-hotplug and CPUilde
>> support
>>
[...]
>> The series is tested on OMAP4430 SDP for suspend, hotplug and
>> CPUidle
>> with OMAP4 GP and HS (secure) devices.
>>
>> The following changes since commit
>> c6a389f123b9f68d605bb7e0f9b32ec1e3e14132:
>>
>> Linux 3.1-rc4 (2011-08-28 21:16:01 -0700)
>>
>> are available in the git repository at:
>> git://gitorious.org/omap-sw-develoment/linux-omap-dev.git v3.1-
>> rc4-omap4-mpuss-pm
> I have tested these patch series after adding core retention support (In
> suspend/resume path)[1] and it worked Fine. I do see that Core and MPU are
> entering CSWR upon suspend and able to wake up via uart.
>
> You could add tested-by: Vishwanath BS < Vishwanath.bs@ti.com> if you
> want.
>
Yes I want tested-by and will add your tested-by on the series.
Thanks for testing
Regards
Santosh
^ permalink raw reply
* [RFC PATCH] ARM ASoC: add sound driver for imx27pdk using mc13783 codec
From: Philippe Rétornaz @ 2011-09-20 11:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAPPnRU2LyJdHfA9W2porz_mWNo0fxAD+RSxrViNSK0Auinwpaw@mail.gmail.com>
Le vendredi 29 juillet 2011 21:14:47, J?rgen Lambrecht a ?crit :
> 2011/7/27 Philippe R?tornaz <philippe.retornaz@epfl.ch>:
> > Hi
> >
> > Le vendredi 8 juillet 2011 16:19:22, Lambrecht J?rgen a ?crit :
> >> indeed, doesn't work at all. I know it used to work on 2.6.34.
> >> We also have a fsl linux 2.6.22 were it works.
> >> I must say: when i use aplay to play a mono file, then there is no
> >> error, it just never ends, and no sound also.
> >> For a stereo file, it gives the error.
> >> Mark also that when I use madplay (v0.15.2) (or mp3play) to play a mono
> >> or stereo mp3, it allocates 3 DMA channels, but only frees one after the
> >> error.
> >
> > Did you made any progress on this ?
>
> Yes. Sascha fixed it, and will commit it.
> Regards,
> J?rgen
Do you know if there is any public git tree containing this code ?
Regards,
Philippe
^ permalink raw reply
* [PATCH 0/7] Add L2 cache cleaning to generic CPU suspend
From: Lorenzo Pieralisi @ 2011-09-20 11:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110919163741.GE16591@n2100.arm.linux.org.uk>
On Mon, Sep 19, 2011 at 05:37:41PM +0100, Russell King - ARM Linux wrote:
> This is a re-post of the previous patch series, but with an additional
> TLB flush to ensure that hte global TLB entry in the page tables is
> flushed out. This is a flush of all TLB entries, but it could probably
> be more targetted if we need to.
>
> Original cover mail follows:
>
> Some systems (such as OMAP) preserve the L2 cache across a suspend/
> resume cycle. This means they do not perform L2 cache maintanence
> in their suspend finisher function.
>
> However, the side effect is that the saved CPU state is not readable
> by the resume code because it is sitting in the L2 cache.
>
> This patch series adds L2 cache cleaning to the generic CPU suspend/
> resume support code, making it possible to use this on systems with
> L2 cache enabled without having to clean/invalidate the entire L2
> cache.
>
> We also add a separate page table, allocated at boot time, for the
> resume process to use so we don't have to fiddle about with tweaking
> entries in the current processes page table. Moreover, the current
> processes page table may be in use by another CPU in the system if
> these paths are used from cpuidle or hotplug, so changing the page
> table is technically unsound.
>
> Overall, this makes it possible for OMAP4 systems to use this code.
>
>
Thanks Russell for this.
As expected, it does fix the issue. Tested on ARM internal platforms
and Origen with both suspend and cpuidle. So, on the whole series:
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
^ permalink raw reply
* DT vs ARM static mappings
From: Pawel Moll @ 2011-09-20 11:51 UTC (permalink / raw)
To: linux-arm-kernel
Hi All,
Apologies for the length of the text below, but the problem is
complex... (or at least it seems to be)
While working on DT support for ARM Versatile Express I faced an
interesting problem... Some background first, to set a common ground and
test my understanding of the problem ;-)
ARM machine description contains a "map_io" method, which is used to
create static memory mappings (using iotable_init() function) for things
like peripherals or SRAMs. At least that's the theory, because most of
the platforms are doing much more stuff there, like clocking/GPIOs/UARTs
initialization, hardware probing etc.
Now the Versatile Express platform: it consists of a motherboard with a
set of peripherals and a processor daughterboard (core tile), both
connected via a static memory bus, which is mapped into processor's
physical address space. The motherboard can be shared between different
types of the tiles (eg. A9, A5, A15 etc.). The present one is probed byt
he motherboard firmware and exposed in "system registers".
Everything is fine so far. The interesting part starts here:
http://infocenter.arm.com/help/topic/com.arm.doc.dui0447e/CACIHGFE.html
In brief, depending on the configuration, the system can have one of
two, totally different, memory maps (please, do spare me the "but why
did they do that" comments - not my idea nor decision, I just have to
live with this ;-), depending on the core tile being used.
In result, the static mapping as defined currently in
arch/arm/mach-vexpress/v2m.c for A9 variant:
#define V2M_PA_CS7 0x10000000
static struct map_desc v2m_io_desc[] __initdata = {
{
.virtual = __MMIO_P2V(V2M_PA_CS7),
.pfn = __phys_to_pfn(V2M_PA_CS7),
.length = SZ_128K,
.type = MT_DEVICE,
},
};
is no longer valid for A5/A15. It would rather look like this:
#define V2M_PA_CS3 0x1c000000
static struct map_desc v2m_io_desc[] __initdata = {
{
.virtual = __MMIO_P2V(V2M_PA_CS3),
.pfn = __phys_to_pfn(V2M_PA_CS3),
.length = SZ_2M,
.type = MT_DEVICE,
},
};
Not only the peripherals base address is changed but also "internal"
alignment, thus offsets to peripherals. Some of them are not being
ioremap()ed, but directly used via the static mapping and MMIO_P2V macro
(like "readl(MMIO_P2V(V2M_SYS_PROCID0))" in v2m_populate_ct_desc(void)
function). For example, these two:
#define V2M_SYSREGS (V2M_PA_CS7 + 0x00000000)
#define V2M_SYSCTL (V2M_PA_CS7 + 0x00001000)
would have to become:
#define V2M_SYSREGS (V2M_PA_CS3 + 0x00010000)
#define V2M_SYSCTL (V2M_PA_CS3 + 0x00020000)
My current DTS for the original memory map looks like that (fragments):
{
motherboard {
ranges = <7 0 0x10000000 0x00020000>;
#address-cells = <2>; // SMB chipselect number and offset
#size-cells = <1>;
peripherals at 7 {
ranges = <0 7 0 0x20000>;
#address-cells = <1>;
#size-cells = <1>;
sysreg at 00000 {
reg = <0x00000 0x1000>;
};
sysctl at 01000 {
reg = <0x01000 0x1000>;
};
}
}
}
DTS for the second memory map would just have the addresses changed.
Unfortunately, because of the static mappings being hardcoded in the
board support file, one kernel won't Just Work (TM) with different DTBs.
Of course the simplest solution would be to define two different
compatible values, eg. "arm,vexpress-legacy" would execute the current
map_io implementation, while "arm,vexpress-rs1" would use different one,
setting up the other map_desc (the MMIO_P2V macro must die of course,
replaced with a runtime-defined virtual base address for the
peripherals).
If you believe that's what I should do, say it and stop reading :-)
To my mind it looked like the whole mechanism was not flexible enough,
so I wanted to explore other options...
The obvious one was to describe the required static mapping in the DTS.
I don't like this idea, though. It can hardly be called "hardware
description". Besides, what node would carry such data? "chosen"?
Hardly...
Would it contain a "regs" property with the physical address and
"virtual-reg" with the virtual one? Again, doesn't sound right to me
(especially the virtual bit, however the virtual address could be common
between different variants and be defined in the board support code, not
the DTS).
I have considered a reference (phandle or an alias?) to the node to be
mapped ("peripherals" in my case), but where to define this reference?
Any ideas?
There is an additional problem here... The "map_io" is executed before
the tree is un-flattened, so:
1. One can't simply use "of_find_matching_node()" (as in the latest l2x0
patches) to find the interesting nodes - the only way of going through
the tree is raw of_scan_flat_dt() function. Therefore any conditions
more complex then string comparison with the (full) node name are
problematic.
2. The tree mappings (ranges) are not resolved yet, so one can't simply
get the effective address of a node. Only "raw" properties are
available, so all one can get scanning for "peripherals at 7" node is "0 7
0 0x20000" array, instead of the "0x10000000 0x00020000" that is really
important.
Initially I wanted to find the mentioned devices and create individual
mappings for them, so the MMIO_P2V would be still valid (if slightly
"abused"), but I failed due to the problems mentioned above. And I can't
delay this operation till the tree is un-flattened, as the core tile
must be probed (via sysreg) in map_io (tile's specific code must be able
to create its own mappings):
static void __init v2m_map_io(void)
{
iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
v2m_populate_ct_desc();
ct_desc->map_io();
}
Any comments, ideas and suggestions how to tackle this situation are
more than welcome.
Cheers!
Pawe?
^ permalink raw reply
* [PATCH 00/25] OMAP4: PM: suspend, CPU-hotplug and CPUilde support
From: Santosh @ 2011-09-20 11:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1315144466-9395-1-git-send-email-santosh.shilimkar@ti.com>
On Sunday 04 September 2011 07:24 PM, Santosh Shilimkar wrote:
> This series adds OMAP4 MPUSS (MPU SubSystem) power management support for
> suspend (S2R), CPU hotplug and CPUidle.
>
Thanks all for your review's and testing of this series. Have addressed
all the concerns/comments as part of the next post which I am holding
for couple of days more.
Reason is mainly to ensure that dependent patches(series) are merged or
on the way for 3.2, and the patches are re-based against the
right tree for the merge.
As documented earlier, there are 3 dependencies for this series.
1) Russell's L2 cache update to generic suspend which seems to be
be ready now since Lorenzo confirmed that pending issue is fixed.
http://www.spinics.net/lists/linux-omap/msg57625.html
2) CPU PM notifier series for which I have pull request ready
to be send.
https://lkml.org/lkml/2011/9/3/49
3) IRQ subystem patch which is already in Thomas's irq/core for 3.2
http://www.mail-archive.com/linux-omap at vger.kernel.org/msg55483.html
Regards
Santosh
^ permalink raw reply
* [PATCH V2] ARM: kdump: copy kernel relocation code at the kexec prepare stage
From: Lei Wen @ 2011-09-20 12:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316151129-30491-1-git-send-email-leiwen@marvell.com>
This copy really don't need to do at the very second before the kernel
would crash.
Signed-off-by: Lei Wen <leiwen@marvell.com>
Acked-by: Simon Horman <horms@verge.net.au>
---
Changelog:
V2: move the flush_icache_range after the memcpy operation to ensure I/D cache
coherency for the relocation code
arch/arm/kernel/machine_kexec.c | 35 ++++++++++++++++++-----------------
1 files changed, 18 insertions(+), 17 deletions(-)
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index e59bbd4..c1b4463 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -32,6 +32,24 @@ static atomic_t waiting_for_crash_ipi;
int machine_kexec_prepare(struct kimage *image)
{
+ unsigned long page_list;
+ void *reboot_code_buffer;
+ page_list = image->head & PAGE_MASK;
+
+ reboot_code_buffer = page_address(image->control_code_page);
+
+ /* Prepare parameters for reboot_code_buffer*/
+ kexec_start_address = image->start;
+ kexec_indirection_page = page_list;
+ kexec_mach_type = machine_arch_type;
+ kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
+
+ /* copy our kernel relocation code to the control code page */
+ memcpy(reboot_code_buffer,
+ relocate_new_kernel, relocate_new_kernel_size);
+
+ flush_icache_range((unsigned long) reboot_code_buffer,
+ (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
return 0;
}
@@ -82,31 +100,14 @@ void (*kexec_reinit)(void);
void machine_kexec(struct kimage *image)
{
- unsigned long page_list;
unsigned long reboot_code_buffer_phys;
void *reboot_code_buffer;
-
- page_list = image->head & PAGE_MASK;
-
/* we need both effective and real address here */
reboot_code_buffer_phys =
page_to_pfn(image->control_code_page) << PAGE_SHIFT;
reboot_code_buffer = page_address(image->control_code_page);
- /* Prepare parameters for reboot_code_buffer*/
- kexec_start_address = image->start;
- kexec_indirection_page = page_list;
- kexec_mach_type = machine_arch_type;
- kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
-
- /* copy our kernel relocation code to the control code page */
- memcpy(reboot_code_buffer,
- relocate_new_kernel, relocate_new_kernel_size);
-
-
- flush_icache_range((unsigned long) reboot_code_buffer,
- (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
printk(KERN_INFO "Bye!\n");
if (kexec_reinit)
--
1.7.0.4
^ permalink raw reply related
* [PATCH] i.MX: use CONFIG_MULTI_IRQ_HANDLER
From: Sascha Hauer @ 2011-09-20 12:49 UTC (permalink / raw)
To: linux-arm-kernel
The following series switches the i.MX architecture to use
CONFIG_MULTI_IRQ_HANDLER. This allows us to compile a kernel
with i.MX3 and i.MX5 support in a later series. Also, it will
help with the i.MX6 support which has a different irq controller.
Tested on i.MX27, i.MX35 and i.MX51.
Sascha
Sascha Hauer (4):
ARM i.MX avic: add handle_irq function
ARM i.MX tzic: add handle_irq function
ARM i.MX boards: use CONFIG_MULTI_IRQ_HANDLER
ARM i.MX entry-macro.S: remove now unused code
arch/arm/Kconfig | 1 +
arch/arm/mach-imx/mach-apf9328.c | 1 +
arch/arm/mach-imx/mach-armadillo5x0.c | 1 +
arch/arm/mach-imx/mach-bug.c | 1 +
arch/arm/mach-imx/mach-cpuimx27.c | 1 +
arch/arm/mach-imx/mach-cpuimx35.c | 1 +
arch/arm/mach-imx/mach-eukrea_cpuimx25.c | 1 +
arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 1 +
arch/arm/mach-imx/mach-imx27ipcam.c | 1 +
arch/arm/mach-imx/mach-imx27lite.c | 1 +
arch/arm/mach-imx/mach-kzm_arm11_01.c | 1 +
arch/arm/mach-imx/mach-mx1ads.c | 2 +
arch/arm/mach-imx/mach-mx21ads.c | 1 +
arch/arm/mach-imx/mach-mx25_3ds.c | 1 +
arch/arm/mach-imx/mach-mx27_3ds.c | 1 +
arch/arm/mach-imx/mach-mx27ads.c | 1 +
arch/arm/mach-imx/mach-mx31_3ds.c | 1 +
arch/arm/mach-imx/mach-mx31ads.c | 1 +
arch/arm/mach-imx/mach-mx31lilly.c | 1 +
arch/arm/mach-imx/mach-mx31lite.c | 1 +
arch/arm/mach-imx/mach-mx31moboard.c | 1 +
arch/arm/mach-imx/mach-mx35_3ds.c | 1 +
arch/arm/mach-imx/mach-mxt_td60.c | 1 +
arch/arm/mach-imx/mach-pca100.c | 1 +
arch/arm/mach-imx/mach-pcm037.c | 1 +
arch/arm/mach-imx/mach-pcm038.c | 1 +
arch/arm/mach-imx/mach-pcm043.c | 1 +
arch/arm/mach-imx/mach-qong.c | 1 +
arch/arm/mach-imx/mach-scb9328.c | 1 +
arch/arm/mach-imx/mach-vpr200.c | 1 +
arch/arm/mach-mx5/board-cpuimx51.c | 1 +
arch/arm/mach-mx5/board-cpuimx51sd.c | 1 +
arch/arm/mach-mx5/board-mx50_rdp.c | 1 +
arch/arm/mach-mx5/board-mx51_3ds.c | 1 +
arch/arm/mach-mx5/board-mx51_babbage.c | 1 +
arch/arm/mach-mx5/board-mx51_efikamx.c | 1 +
arch/arm/mach-mx5/board-mx51_efikasb.c | 1 +
arch/arm/mach-mx5/board-mx53_ard.c | 1 +
arch/arm/mach-mx5/board-mx53_evk.c | 1 +
arch/arm/mach-mx5/board-mx53_loco.c | 1 +
arch/arm/mach-mx5/board-mx53_smd.c | 1 +
arch/arm/plat-mxc/avic.c | 13 ++++++
arch/arm/plat-mxc/include/mach/common.h | 14 ++++++
arch/arm/plat-mxc/include/mach/entry-macro.S | 58 +-------------------------
arch/arm/plat-mxc/tzic.c | 24 ++++++++++-
45 files changed, 93 insertions(+), 58 deletions(-)
^ permalink raw reply
* [PATCH 1/4] ARM i.MX avic: add handle_irq function
From: Sascha Hauer @ 2011-09-20 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316522956-28530-1-git-send-email-s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/plat-mxc/avic.c | 13 +++++++++++++
arch/arm/plat-mxc/include/mach/common.h | 10 ++++++++++
2 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c
index 55d2534..4d68c5a 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/plat-mxc/avic.c
@@ -116,6 +116,19 @@ static struct mxc_irq_chip mxc_avic_chip = {
#endif
};
+asmlinkage void __exception_irq_entry avic_handle_irq(struct pt_regs *regs)
+{
+ u32 nivector;
+
+ do {
+ nivector = __raw_readl(avic_base + AVIC_NIVECSR) >> 16;
+ if (nivector == 0xffff)
+ break;
+
+ handle_IRQ(nivector, regs);
+ } while (1);
+}
+
/*
* This function initializes the AVIC hardware and disables all the
* interrupts. It registers the interrupt enable and disable functions
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 4e3d978..8de0d0c 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -72,4 +72,14 @@ extern void mxc_arch_reset_init(void __iomem *);
extern void mx51_efikamx_reset(void);
extern int mx53_revision(void);
extern int mx53_display_revision(void);
+
+void avic_handle_irq(struct pt_regs *);
+
+#define mx1_handle_irq avic_handle_irq
+#define mx21_handle_irq avic_handle_irq
+#define mx25_handle_irq avic_handle_irq
+#define mx27_handle_irq avic_handle_irq
+#define mx31_handle_irq avic_handle_irq
+#define mx35_handle_irq avic_handle_irq
+
#endif
--
1.7.6.3
^ permalink raw reply related
* [PATCH 2/4] ARM i.MX tzic: add handle_irq function
From: Sascha Hauer @ 2011-09-20 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316522956-28530-1-git-send-email-s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/plat-mxc/include/mach/common.h | 4 ++++
arch/arm/plat-mxc/tzic.c | 24 +++++++++++++++++++++++-
2 files changed, 27 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 8de0d0c..2e8802b 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -74,6 +74,7 @@ extern int mx53_revision(void);
extern int mx53_display_revision(void);
void avic_handle_irq(struct pt_regs *);
+void tzic_handle_irq(struct pt_regs *);
#define mx1_handle_irq avic_handle_irq
#define mx21_handle_irq avic_handle_irq
@@ -81,5 +82,8 @@ void avic_handle_irq(struct pt_regs *);
#define mx27_handle_irq avic_handle_irq
#define mx31_handle_irq avic_handle_irq
#define mx35_handle_irq avic_handle_irq
+#define mx50_handle_irq tzic_handle_irq
+#define mx51_handle_irq tzic_handle_irq
+#define mx53_handle_irq tzic_handle_irq
#endif
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index f257fcc..b7a272d 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -42,7 +42,7 @@
#define TZIC_SRCCLAR0 0x0280 /* Source Clear Register 0 */
#define TZIC_PRIORITY0 0x0400 /* Priority Register 0 */
#define TZIC_PND0 0x0D00 /* Pending Register 0 */
-#define TZIC_HIPND0 0x0D80 /* High Priority Pending Register */
+#define TZIC_HIPND(i) (0x0D80+ ((i) << 2)) /* High Priority Pending Register */
#define TZIC_WAKEUP0(i) (0x0E00 + ((i) << 2)) /* Wakeup Config Register */
#define TZIC_SWINT 0x0F00 /* Software Interrupt Rigger Register */
#define TZIC_ID0 0x0FD0 /* Indentification Register 0 */
@@ -96,6 +96,28 @@ static __init void tzic_init_gc(unsigned int irq_start)
irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0);
}
+asmlinkage void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs)
+{
+ u32 stat;
+ int i, irqofs, handled;
+
+ do {
+ handled = 0;
+
+ for (i = 0; i < 4; i++) {
+ stat = __raw_readl(tzic_base + TZIC_HIPND(i)) &
+ __raw_readl(tzic_base + TZIC_INTSEC0(i));
+
+ while (stat) {
+ handled = 1;
+ irqofs = fls(stat) - 1;
+ handle_IRQ(irqofs + i * 32, regs);
+ stat &= ~(1 << irqofs);
+ }
+ }
+ } while (handled);
+}
+
/*
* This function initializes the TZIC hardware and disables all the
* interrupts. It registers the interrupt enable and disable functions
--
1.7.6.3
^ permalink raw reply related
* [PATCH 3/4] ARM i.MX boards: use CONFIG_MULTI_IRQ_HANDLER
From: Sascha Hauer @ 2011-09-20 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316522956-28530-1-git-send-email-s.hauer@pengutronix.de>
Also, add handle_irq callbacks to machine descriptors.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-imx/mach-apf9328.c | 1 +
arch/arm/mach-imx/mach-armadillo5x0.c | 1 +
arch/arm/mach-imx/mach-bug.c | 1 +
arch/arm/mach-imx/mach-cpuimx27.c | 1 +
arch/arm/mach-imx/mach-cpuimx35.c | 1 +
arch/arm/mach-imx/mach-eukrea_cpuimx25.c | 1 +
arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 1 +
arch/arm/mach-imx/mach-imx27ipcam.c | 1 +
arch/arm/mach-imx/mach-imx27lite.c | 1 +
arch/arm/mach-imx/mach-kzm_arm11_01.c | 1 +
arch/arm/mach-imx/mach-mx1ads.c | 2 ++
arch/arm/mach-imx/mach-mx21ads.c | 1 +
arch/arm/mach-imx/mach-mx25_3ds.c | 1 +
arch/arm/mach-imx/mach-mx27_3ds.c | 1 +
arch/arm/mach-imx/mach-mx27ads.c | 1 +
arch/arm/mach-imx/mach-mx31_3ds.c | 1 +
arch/arm/mach-imx/mach-mx31ads.c | 1 +
arch/arm/mach-imx/mach-mx31lilly.c | 1 +
arch/arm/mach-imx/mach-mx31lite.c | 1 +
arch/arm/mach-imx/mach-mx31moboard.c | 1 +
arch/arm/mach-imx/mach-mx35_3ds.c | 1 +
arch/arm/mach-imx/mach-mxt_td60.c | 1 +
arch/arm/mach-imx/mach-pca100.c | 1 +
arch/arm/mach-imx/mach-pcm037.c | 1 +
arch/arm/mach-imx/mach-pcm038.c | 1 +
arch/arm/mach-imx/mach-pcm043.c | 1 +
arch/arm/mach-imx/mach-qong.c | 1 +
arch/arm/mach-imx/mach-scb9328.c | 1 +
arch/arm/mach-imx/mach-vpr200.c | 1 +
arch/arm/mach-mx5/board-cpuimx51.c | 1 +
arch/arm/mach-mx5/board-cpuimx51sd.c | 1 +
arch/arm/mach-mx5/board-mx50_rdp.c | 1 +
arch/arm/mach-mx5/board-mx51_3ds.c | 1 +
arch/arm/mach-mx5/board-mx51_babbage.c | 1 +
arch/arm/mach-mx5/board-mx51_efikamx.c | 1 +
arch/arm/mach-mx5/board-mx51_efikasb.c | 1 +
arch/arm/mach-mx5/board-mx53_ard.c | 1 +
arch/arm/mach-mx5/board-mx53_evk.c | 1 +
arch/arm/mach-mx5/board-mx53_loco.c | 1 +
arch/arm/mach-mx5/board-mx53_smd.c | 1 +
41 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5ebc5d9..975b5dd 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -397,6 +397,7 @@ config ARCH_MXC
select CLKSRC_MMIO
select GENERIC_IRQ_CHIP
select HAVE_SCHED_CLOCK
+ select MULTI_IRQ_HANDLER
help
Support for Freescale MXC/iMX-based family of processors
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index a404c89..e5154f5 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -136,6 +136,7 @@ MACHINE_START(APF9328, "Armadeus APF9328")
.map_io = mx1_map_io,
.init_early = imx1_init_early,
.init_irq = mx1_init_irq,
+ .handle_irq = mx1_handle_irq,
.timer = &apf9328_timer,
.init_machine = apf9328_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index ede2710..88c77f5 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -562,6 +562,7 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500")
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
+ .handle_irq = mx31_handle_irq,
.timer = &armadillo5x0_timer,
.init_machine = armadillo5x0_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c
index f494705..c44b236 100644
--- a/arch/arm/mach-imx/mach-bug.c
+++ b/arch/arm/mach-imx/mach-bug.c
@@ -62,6 +62,7 @@ MACHINE_START(BUG, "BugLabs BUGBase")
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
+ .handle_irq = mx31_handle_irq,
.timer = &bug_timer,
.init_machine = bug_board_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index 87887ac..21d3d81 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -315,6 +315,7 @@ MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
.map_io = mx27_map_io,
.init_early = imx27_init_early,
.init_irq = mx27_init_irq,
+ .handle_irq = mx27_handle_irq,
.timer = &eukrea_cpuimx27_timer,
.init_machine = eukrea_cpuimx27_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index f39a478b..251830b 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -198,6 +198,7 @@ MACHINE_START(EUKREA_CPUIMX35, "Eukrea CPUIMX35")
.map_io = mx35_map_io,
.init_early = imx35_init_early,
.init_irq = mx35_init_irq,
+ .handle_irq = mx35_handle_irq,
.timer = &eukrea_cpuimx35_timer,
.init_machine = eukrea_cpuimx35_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index da36da5..c192f2a 100644
--- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -167,6 +167,7 @@ MACHINE_START(EUKREA_CPUIMX25, "Eukrea CPUIMX25")
.map_io = mx25_map_io,
.init_early = imx25_init_early,
.init_irq = mx25_init_irq,
+ .handle_irq = mx25_handle_irq,
.timer = &eukrea_cpuimx25_timer,
.init_machine = eukrea_cpuimx25_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 6778f81..8edbdde 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -279,6 +279,7 @@ MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
.map_io = mx27_map_io,
.init_early = imx27_init_early,
.init_irq = mx27_init_irq,
+ .handle_irq = mx27_handle_irq,
.timer = &visstrim_m10_timer,
.init_machine = visstrim_m10_board_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c
index 272f793..9a8cc1d 100644
--- a/arch/arm/mach-imx/mach-imx27ipcam.c
+++ b/arch/arm/mach-imx/mach-imx27ipcam.c
@@ -75,6 +75,7 @@ MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM")
.map_io = mx27_map_io,
.init_early = imx27_init_early,
.init_irq = mx27_init_irq,
+ .handle_irq = mx27_handle_irq,
.timer = &mx27ipcam_timer,
.init_machine = mx27ipcam_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c
index d81a769..4d78b0e 100644
--- a/arch/arm/mach-imx/mach-imx27lite.c
+++ b/arch/arm/mach-imx/mach-imx27lite.c
@@ -81,6 +81,7 @@ MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
.map_io = mx27_map_io,
.init_early = imx27_init_early,
.init_irq = mx27_init_irq,
+ .handle_irq = mx27_handle_irq,
.timer = &mx27lite_timer,
.init_machine = mx27lite_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index e472a1d..5bce476 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -275,6 +275,7 @@ MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
.map_io = kzm_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
+ .handle_irq = mx31_handle_irq,
.timer = &kzm_timer,
.init_machine = kzm_board_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
index 5cd8bee..dbfe645 100644
--- a/arch/arm/mach-imx/mach-mx1ads.c
+++ b/arch/arm/mach-imx/mach-mx1ads.c
@@ -149,6 +149,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
.map_io = mx1_map_io,
.init_early = imx1_init_early,
.init_irq = mx1_init_irq,
+ .handle_irq = mx1_handle_irq,
.timer = &mx1ads_timer,
.init_machine = mx1ads_init,
MACHINE_END
@@ -158,6 +159,7 @@ MACHINE_START(MXLADS, "Freescale MXLADS")
.map_io = mx1_map_io,
.init_early = imx1_init_early,
.init_irq = mx1_init_irq,
+ .handle_irq = mx1_handle_irq,
.timer = &mx1ads_timer,
.init_machine = mx1ads_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index d389ecf..9955c2a 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -309,6 +309,7 @@ MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
.map_io = mx21ads_map_io,
.init_early = imx21_init_early,
.init_irq = mx21_init_irq,
+ .handle_irq = mx21_handle_irq,
.timer = &mx21ads_timer,
.init_machine = mx21ads_board_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index 7f66a91..1d06af1 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -257,6 +257,7 @@ MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
.map_io = mx25_map_io,
.init_early = imx25_init_early,
.init_irq = mx25_init_irq,
+ .handle_irq = mx25_handle_irq,
.timer = &mx25pdk_timer,
.init_machine = mx25pdk_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index 6fa6934..01e4994 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -425,6 +425,7 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK")
.map_io = mx27_map_io,
.init_early = imx27_init_early,
.init_irq = mx27_init_irq,
+ .handle_irq = mx27_handle_irq,
.timer = &mx27pdk_timer,
.init_machine = mx27pdk_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index fc26ed7..f85fb61 100644
--- a/arch/arm/mach-imx/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -349,6 +349,7 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
.map_io = mx27ads_map_io,
.init_early = imx27_init_early,
.init_irq = mx27_init_irq,
+ .handle_irq = mx27_handle_irq,
.timer = &mx27ads_timer,
.init_machine = mx27ads_board_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index c20be75..644a787 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -768,6 +768,7 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
+ .handle_irq = mx31_handle_irq,
.timer = &mx31_3ds_timer,
.init_machine = mx31_3ds_init,
.reserve = mx31_3ds_reserve,
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index 29ca890..463cdcf 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -539,6 +539,7 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS")
.map_io = mx31ads_map_io,
.init_early = imx31_init_early,
.init_irq = mx31ads_init_irq,
+ .handle_irq = mx31_handle_irq,
.timer = &mx31ads_timer,
.init_machine = mx31ads_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index 126913a..659de08cd 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -299,6 +299,7 @@ MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
+ .handle_irq = mx31_handle_irq,
.timer = &mx31lilly_timer,
.init_machine = mx31lilly_board_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index 4b47fd9..225fa56 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -284,6 +284,7 @@ MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
.map_io = mx31lite_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
+ .handle_irq = mx31_handle_irq,
.timer = &mx31lite_timer,
.init_machine = mx31lite_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c
index b358383..91aed2b 100644
--- a/arch/arm/mach-imx/mach-mx31moboard.c
+++ b/arch/arm/mach-imx/mach-mx31moboard.c
@@ -572,6 +572,7 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
+ .handle_irq = mx31_handle_irq,
.timer = &mx31moboard_timer,
.init_machine = mx31moboard_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index b3b9bd8..912b1bc 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -221,6 +221,7 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK")
.map_io = mx35_map_io,
.init_early = imx35_init_early,
.init_irq = mx35_init_irq,
+ .handle_irq = mx35_handle_irq,
.timer = &mx35pdk_timer,
.init_machine = mx35_3ds_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
index c85876f..40f573f 100644
--- a/arch/arm/mach-imx/mach-mxt_td60.c
+++ b/arch/arm/mach-imx/mach-mxt_td60.c
@@ -271,6 +271,7 @@ MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
.map_io = mx27_map_io,
.init_early = imx27_init_early,
.init_irq = mx27_init_irq,
+ .handle_irq = mx27_handle_irq,
.timer = &mxt_td60_timer,
.init_machine = mxt_td60_board_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index 71083aa..945d2e2 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -439,6 +439,7 @@ MACHINE_START(PCA100, "phyCARD-i.MX27")
.map_io = mx27_map_io,
.init_early = imx27_init_early,
.init_irq = mx27_init_irq,
+ .handle_irq = mx27_handle_irq,
.init_machine = pca100_init,
.timer = &pca100_timer,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c
index f45b7cd..05b2077 100644
--- a/arch/arm/mach-imx/mach-pcm037.c
+++ b/arch/arm/mach-imx/mach-pcm037.c
@@ -693,6 +693,7 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037")
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
+ .handle_irq = mx31_handle_irq,
.timer = &pcm037_timer,
.init_machine = pcm037_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 2d6a64b..5da3c4f 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -353,6 +353,7 @@ MACHINE_START(PCM038, "phyCORE-i.MX27")
.map_io = mx27_map_io,
.init_early = imx27_init_early,
.init_irq = mx27_init_irq,
+ .handle_irq = mx27_handle_irq,
.timer = &pcm038_timer,
.init_machine = pcm038_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c
index 660ec3e..ad28006 100644
--- a/arch/arm/mach-imx/mach-pcm043.c
+++ b/arch/arm/mach-imx/mach-pcm043.c
@@ -422,6 +422,7 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043")
.map_io = mx35_map_io,
.init_early = imx35_init_early,
.init_irq = mx35_init_irq,
+ .handle_irq = mx35_handle_irq,
.timer = &pcm043_timer,
.init_machine = pcm043_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c
index 3626f48..9afcdb6 100644
--- a/arch/arm/mach-imx/mach-qong.c
+++ b/arch/arm/mach-imx/mach-qong.c
@@ -266,6 +266,7 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
+ .handle_irq = mx31_handle_irq,
.timer = &qong_timer,
.init_machine = qong_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index db2d604..f6d3b73 100644
--- a/arch/arm/mach-imx/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -141,6 +141,7 @@ MACHINE_START(SCB9328, "Synertronixx scb9328")
.map_io = mx1_map_io,
.init_early = imx1_init_early,
.init_irq = mx1_init_irq,
+ .handle_irq = mx1_handle_irq,
.timer = &scb9328_timer,
.init_machine = scb9328_init,
MACHINE_END
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c
index 7d8e012..4c577a5 100644
--- a/arch/arm/mach-imx/mach-vpr200.c
+++ b/arch/arm/mach-imx/mach-vpr200.c
@@ -319,6 +319,7 @@ MACHINE_START(VPR200, "VPR200")
.map_io = mx35_map_io,
.init_early = imx35_init_early,
.init_irq = mx35_init_irq,
+ .handle_irq = mx35_handle_irq,
.timer = &vpr200_timer,
.init_machine = vpr200_board_init,
MACHINE_END
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
index 68934ea..e6d919e 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-mx5/board-cpuimx51.c
@@ -297,6 +297,7 @@ MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module")
.map_io = mx51_map_io,
.init_early = imx51_init_early,
.init_irq = mx51_init_irq,
+ .handle_irq = mx51_handle_irq,
.timer = &mxc_timer,
.init_machine = eukrea_cpuimx51_init,
MACHINE_END
diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c
index ff096d5..32e07d6 100644
--- a/arch/arm/mach-mx5/board-cpuimx51sd.c
+++ b/arch/arm/mach-mx5/board-cpuimx51sd.c
@@ -335,6 +335,7 @@ MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD")
.map_io = mx51_map_io,
.init_early = imx51_init_early,
.init_irq = mx51_init_irq,
+ .handle_irq = mx51_handle_irq,
.timer = &mxc_timer,
.init_machine = eukrea_cpuimx51sd_init,
MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c
index 7de25c6..bef945e 100644
--- a/arch/arm/mach-mx5/board-mx50_rdp.c
+++ b/arch/arm/mach-mx5/board-mx50_rdp.c
@@ -219,6 +219,7 @@ MACHINE_START(MX50_RDP, "Freescale MX50 Reference Design Platform")
.map_io = mx50_map_io,
.init_early = imx50_init_early,
.init_irq = mx50_init_irq,
+ .handle_irq = mx50_handle_irq,
.timer = &mx50_rdp_timer,
.init_machine = mx50_rdp_board_init,
MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c
index 07a3815..cf9537e 100644
--- a/arch/arm/mach-mx5/board-mx51_3ds.c
+++ b/arch/arm/mach-mx5/board-mx51_3ds.c
@@ -173,6 +173,7 @@ MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board")
.map_io = mx51_map_io,
.init_early = imx51_init_early,
.init_irq = mx51_init_irq,
+ .handle_irq = mx51_handle_irq,
.timer = &mx51_3ds_timer,
.init_machine = mx51_3ds_init,
MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 11b0ff6..16db947 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -420,6 +420,7 @@ MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
.map_io = mx51_map_io,
.init_early = imx51_init_early,
.init_irq = mx51_init_irq,
+ .handle_irq = mx51_handle_irq,
.timer = &mx51_babbage_timer,
.init_machine = mx51_babbage_init,
MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
index 551daf8..c8415cc 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -284,6 +284,7 @@ MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")
.map_io = mx51_map_io,
.init_early = imx51_init_early,
.init_irq = mx51_init_irq,
+ .handle_irq = mx51_handle_irq,
.timer = &mx51_efikamx_timer,
.init_machine = mx51_efikamx_init,
MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c
index 8a9bca2..e720f32 100644
--- a/arch/arm/mach-mx5/board-mx51_efikasb.c
+++ b/arch/arm/mach-mx5/board-mx51_efikasb.c
@@ -270,6 +270,7 @@ MACHINE_START(MX51_EFIKASB, "Genesi Efika Smartbook")
.map_io = mx51_map_io,
.init_early = imx51_init_early,
.init_irq = mx51_init_irq,
+ .handle_irq = mx51_handle_irq,
.init_machine = efikasb_board_init,
.timer = &mx51_efikasb_timer,
MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c
index 76a67c4..9d8aa8c 100644
--- a/arch/arm/mach-mx5/board-mx53_ard.c
+++ b/arch/arm/mach-mx5/board-mx53_ard.c
@@ -249,6 +249,7 @@ MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board")
.map_io = mx53_map_io,
.init_early = imx53_init_early,
.init_irq = mx53_init_irq,
+ .handle_irq = mx53_handle_irq,
.timer = &mx53_ard_timer,
.init_machine = mx53_ard_board_init,
MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 1b417b0..c74a608 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -167,6 +167,7 @@ MACHINE_START(MX53_EVK, "Freescale MX53 EVK Board")
.map_io = mx53_map_io,
.init_early = imx53_init_early,
.init_irq = mx53_init_irq,
+ .handle_irq = mx53_handle_irq,
.timer = &mx53_evk_timer,
.init_machine = mx53_evk_board_init,
MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 4e1d51d..e43493d 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -288,6 +288,7 @@ MACHINE_START(MX53_LOCO, "Freescale MX53 LOCO Board")
.map_io = mx53_map_io,
.init_early = imx53_init_early,
.init_irq = mx53_init_irq,
+ .handle_irq = mx53_handle_irq,
.timer = &mx53_loco_timer,
.init_machine = mx53_loco_board_init,
MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c
index bc02894..25f686a 100644
--- a/arch/arm/mach-mx5/board-mx53_smd.c
+++ b/arch/arm/mach-mx5/board-mx53_smd.c
@@ -140,6 +140,7 @@ MACHINE_START(MX53_SMD, "Freescale MX53 SMD Board")
.map_io = mx53_map_io,
.init_early = imx53_init_early,
.init_irq = mx53_init_irq,
+ .handle_irq = mx53_handle_irq,
.timer = &mx53_smd_timer,
.init_machine = mx53_smd_board_init,
MACHINE_END
--
1.7.6.3
^ permalink raw reply related
* [PATCH 4/4] ARM i.MX entry-macro.S: remove now unused code
From: Sascha Hauer @ 2011-09-20 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316522956-28530-1-git-send-email-s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/plat-mxc/include/mach/entry-macro.S | 58 +-------------------------
1 files changed, 1 insertions(+), 57 deletions(-)
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index 066d464..842fbcb 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -9,72 +9,16 @@
* published by the Free Software Foundation.
*/
-#include <mach/hardware.h>
+/* Unused, we use CONFIG_MULTI_IRQ_HANDLER */
-#define AVIC_NIMASK 0x04
-
- @ this macro disables fast irq (not implemented)
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
-#ifndef CONFIG_MXC_TZIC
- ldr \base, =avic_base
- ldr \base, [\base]
-#ifdef CONFIG_MXC_IRQ_PRIOR
- ldr r4, [\base, #AVIC_NIMASK]
-#endif
-#elif defined CONFIG_MXC_TZIC
- ldr \base, =tzic_base
- ldr \base, [\base]
-#endif /* CONFIG_MXC_TZIC */
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
- @ this macro checks which interrupt occurred
- @ and returns its number in irqnr
- @ and returns if an interrupt occurred in irqstat
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
-#ifndef CONFIG_MXC_TZIC
- @ Load offset & priority of the highest priority
- @ interrupt pending from AVIC_NIVECSR
- ldr \irqstat, [\base, #0x40]
- @ Shift to get the decoded IRQ number, using ASR so
- @ 'no interrupt pending' becomes 0xffffffff
- mov \irqnr, \irqstat, asr #16
- @ set zero flag if IRQ + 1 == 0
- adds \tmp, \irqnr, #1
-#ifdef CONFIG_MXC_IRQ_PRIOR
- bicne \tmp, \irqstat, #0xFFFFFFE0
- strne \tmp, [\base, #AVIC_NIMASK]
- streq r4, [\base, #AVIC_NIMASK]
-#endif
-#elif defined CONFIG_MXC_TZIC
- @ Load offset & priority of the highest priority
- @ interrupt pending.
- @ 0x080 is INTSEC0 register
- @ 0xD80 is HIPND0 register
- mov \irqnr, #0
-1000: add \irqstat, \base, \irqnr, lsr #3
- ldr \tmp, [\irqstat, #0xd80]
- ldr \irqstat, [\irqstat, #0x080]
- ands \tmp, \tmp, \irqstat
- bne 1001f
- add \irqnr, \irqnr, #32
- cmp \irqnr, #128
- blo 1000b
- b 2001f
-1001: mov \irqstat, #1
-1002: tst \tmp, \irqstat
- bne 2002f
- movs \tmp, \tmp, lsr #1
- addne \irqnr, \irqnr, #1
- bne 1002b
-2001:
- mov \irqnr, #0
-2002:
- movs \irqnr, \irqnr
-#endif
.endm
--
1.7.6.3
^ permalink raw reply related
* DT vs ARM static mappings
From: Rob Herring @ 2011-09-20 12:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316519479.4611.150.camel@hornet.cambridge.arm.com>
Pawel,
On 09/20/2011 06:51 AM, Pawel Moll wrote:
> Hi All,
>
> Apologies for the length of the text below, but the problem is
> complex... (or at least it seems to be)
>
> While working on DT support for ARM Versatile Express I faced an
> interesting problem... Some background first, to set a common ground and
> test my understanding of the problem ;-)
>
> ARM machine description contains a "map_io" method, which is used to
> create static memory mappings (using iotable_init() function) for things
> like peripherals or SRAMs. At least that's the theory, because most of
> the platforms are doing much more stuff there, like clocking/GPIOs/UARTs
> initialization, hardware probing etc.
>
> Now the Versatile Express platform: it consists of a motherboard with a
> set of peripherals and a processor daughterboard (core tile), both
> connected via a static memory bus, which is mapped into processor's
> physical address space. The motherboard can be shared between different
> types of the tiles (eg. A9, A5, A15 etc.). The present one is probed byt
> he motherboard firmware and exposed in "system registers".
>
> Everything is fine so far. The interesting part starts here:
>
> http://infocenter.arm.com/help/topic/com.arm.doc.dui0447e/CACIHGFE.html
>
> In brief, depending on the configuration, the system can have one of
> two, totally different, memory maps (please, do spare me the "but why
> did they do that" comments - not my idea nor decision, I just have to
> live with this ;-), depending on the core tile being used.
>
> In result, the static mapping as defined currently in
> arch/arm/mach-vexpress/v2m.c for A9 variant:
>
> #define V2M_PA_CS7 0x10000000
>
> static struct map_desc v2m_io_desc[] __initdata = {
> {
> .virtual = __MMIO_P2V(V2M_PA_CS7),
> .pfn = __phys_to_pfn(V2M_PA_CS7),
> .length = SZ_128K,
> .type = MT_DEVICE,
> },
> };
>
> is no longer valid for A5/A15. It would rather look like this:
>
> #define V2M_PA_CS3 0x1c000000
>
> static struct map_desc v2m_io_desc[] __initdata = {
> {
> .virtual = __MMIO_P2V(V2M_PA_CS3),
> .pfn = __phys_to_pfn(V2M_PA_CS3),
> .length = SZ_2M,
> .type = MT_DEVICE,
> },
> };
>
> Not only the peripherals base address is changed but also "internal"
> alignment, thus offsets to peripherals. Some of them are not being
> ioremap()ed, but directly used via the static mapping and MMIO_P2V macro
> (like "readl(MMIO_P2V(V2M_SYS_PROCID0))" in v2m_populate_ct_desc(void)
> function). For example, these two:
>
> #define V2M_SYSREGS (V2M_PA_CS7 + 0x00000000)
> #define V2M_SYSCTL (V2M_PA_CS7 + 0x00001000)
>
> would have to become:
>
> #define V2M_SYSREGS (V2M_PA_CS3 + 0x00010000)
> #define V2M_SYSCTL (V2M_PA_CS3 + 0x00020000)
>
> My current DTS for the original memory map looks like that (fragments):
>
> {
> motherboard {
> ranges = <7 0 0x10000000 0x00020000>;
> #address-cells = <2>; // SMB chipselect number and offset
> #size-cells = <1>;
>
> peripherals at 7 {
> ranges = <0 7 0 0x20000>;
> #address-cells = <1>;
> #size-cells = <1>;
>
> sysreg at 00000 {
> reg = <0x00000 0x1000>;
> };
>
> sysctl at 01000 {
> reg = <0x01000 0x1000>;
> };
> }
> }
> }
>
> DTS for the second memory map would just have the addresses changed.
> Unfortunately, because of the static mappings being hardcoded in the
> board support file, one kernel won't Just Work (TM) with different DTBs.
>
> Of course the simplest solution would be to define two different
> compatible values, eg. "arm,vexpress-legacy" would execute the current
> map_io implementation, while "arm,vexpress-rs1" would use different one,
> setting up the other map_desc (the MMIO_P2V macro must die of course,
> replaced with a runtime-defined virtual base address for the
> peripherals).
>
> If you believe that's what I should do, say it and stop reading :-)
>
Yes. Different tiles are fundamentally different boards, so they should
have different DTs. Using includes should help minimize duplication though.
Think about it this way. How would you solve this without DT? You would
have a bunch of duplicated data in the kernel for the different configs.
So you're not any worse off in this regard and still have the other
advantages of DT.
> To my mind it looked like the whole mechanism was not flexible enough,
> so I wanted to explore other options...
>
> The obvious one was to describe the required static mapping in the DTS.
> I don't like this idea, though. It can hardly be called "hardware
> description". Besides, what node would carry such data? "chosen"?
> Hardly...
>
> Would it contain a "regs" property with the physical address and
> "virtual-reg" with the virtual one? Again, doesn't sound right to me
> (especially the virtual bit, however the virtual address could be common
> between different variants and be defined in the board support code, not
> the DTS).
>
> I have considered a reference (phandle or an alias?) to the node to be
> mapped ("peripherals" in my case), but where to define this reference?
> Any ideas?
In "chosen" like the kernel command line would be the place, but I don't
think that is the right approach. Chosen is really for things that
change frequently and this doesn't really fall in that category.
>
> There is an additional problem here... The "map_io" is executed before
> the tree is un-flattened, so:
>
> 1. One can't simply use "of_find_matching_node()" (as in the latest l2x0
> patches) to find the interesting nodes - the only way of going through
> the tree is raw of_scan_flat_dt() function. Therefore any conditions
> more complex then string comparison with the (full) node name are
> problematic.
>
> 2. The tree mappings (ranges) are not resolved yet, so one can't simply
> get the effective address of a node. Only "raw" properties are
> available, so all one can get scanning for "peripherals at 7" node is "0 7
> 0 0x20000" array, instead of the "0x10000000 0x00020000" that is really
> important.
>
If you add a compatible field to "motherboard" node, then you can read
the ranges.
> Initially I wanted to find the mentioned devices and create individual
> mappings for them, so the MMIO_P2V would be still valid (if slightly
> "abused"), but I failed due to the problems mentioned above. And I can't
> delay this operation till the tree is un-flattened, as the core tile
> must be probed (via sysreg) in map_io (tile's specific code must be able
> to create its own mappings):
Do you really need MMIO_P2V? If you have fixed virtual addresses in the
kernel and can pull the phys addresses from DT to populate the iotable,
is that sufficient?
>
> static void __init v2m_map_io(void)
> {
> iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
> v2m_populate_ct_desc();
> ct_desc->map_io();
> }
>
> Any comments, ideas and suggestions how to tackle this situation are
> more than welcome.
>
Generally, the trend is to get rid of static mappings as much as
possible. Doing that first might simplify things.
Rob
> Cheers!
>
> Pawe?
>
>
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH] gpio/mxc: make it work with imx6q
From: Jamie Iles @ 2011-09-20 13:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316423432-18333-1-git-send-email-shawn.guo@linaro.org>
Hi Shawn,
On Mon, Sep 19, 2011 at 05:10:32PM +0800, Shawn Guo wrote:
> The imx6q is a Cortex-A9 Quad Core SoC, which has GIC as the primary
> interrupt controller. GIC requires gpio irq handler to signal EOI,
> otherwise system will hang whenever there is a gpio irq triggered.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
> drivers/gpio/gpio-mxc.c | 3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
> index 4340aca..00b4c9c 100644
> --- a/drivers/gpio/gpio-mxc.c
> +++ b/drivers/gpio/gpio-mxc.c
> @@ -233,6 +233,9 @@ static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc)
> u32 irq_stat;
> struct mxc_gpio_port *port = irq_get_handler_data(irq);
>
> + if (desc->irq_data.chip->irq_eoi)
> + desc->irq_data.chip->irq_eoi(&desc->irq_data);
> +
> irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR);
>
> mxc_gpio_irq_handler(port, irq_stat);
> --
> 1.7.4.1
Could this make use of the chained_irq_enter/chained_irq_exit functions
added in 10a8c38 (ARM: 6806/1: irq: introduce entry and exit functions
for chained handlers)?
Jamie
^ permalink raw reply
* [PATCH] arm: Add unwinding annotations for 64bit division functions
From: Nicolas Pitre @ 2011-09-20 13:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2285dff3fee56758b6279062a5a30dc7.squirrel@www.codeaurora.org>
On Mon, 19 Sep 2011, Laura Abbott wrote:
>
> On Mon, September 19, 2011 4:22 pm, Nicolas Pitre wrote:
> > On Mon, 19 Sep 2011, Laura Abbott wrote:
> >
> >> The 64bit division functions never had unwinding annotations
> >> added. This prevents a backtrace from being printed within
> >> the function and if a division by 0 occurs. Add the annotations.
> >>
> >> Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
> >> ---
> >> arch/arm/lib/div64.S | 8 ++++++++
> >> 1 files changed, 8 insertions(+), 0 deletions(-)
> >>
> >> diff --git a/arch/arm/lib/div64.S b/arch/arm/lib/div64.S
> >> index faa7748..e55c484 100644
> >> --- a/arch/arm/lib/div64.S
> >> +++ b/arch/arm/lib/div64.S
> >> @@ -13,6 +13,7 @@
> >> */
> >>
> >> #include <linux/linkage.h>
> >> +#include <asm/unwind.h>
> >>
> >> #ifdef __ARMEB__
> >> #define xh r0
> >> @@ -44,6 +45,7 @@
> >> */
> >>
> >> ENTRY(__do_div64)
> >> +UNWIND(.fnstart)
> >>
> >> @ Test for easy paths first.
> >> subs ip, r4, #1
> >> @@ -189,7 +191,12 @@ ENTRY(__do_div64)
> >> moveq yh, xh
> >> moveq xh, #0
> >> moveq pc, lr
> >> +UNWIND(.fnend)
> >>
> >> +UNWIND(.fnstart)
> >> +UNWIND(.pad #4)
> >> +UNWIND(.save {lr})
> >> +Ldiv0_64:
> >
> > Why this phony fnend+fnstart here?
> >
> If a division by 0 occurs, we need to be able to access the saved LR on
> the stack which is setup right before calling the __div0 function. This
> can't go at the top of __do_div64 because if we try to do a backtrace from
> within __do_div64 the annotation won't be correct as the LR was never
> saved on the stack.
I suppose the debug infrastructure always assume the same stack frame
for the whole function, hence you can't put that .pad and .save right
before the call to __div0 without the .fnstart and have it effective
only there?
If so then:
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Nicolas
^ permalink raw reply
* [PATCH] ARM: pl330: Fix a race condition
From: Javi Merino @ 2011-09-20 13:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CABb+yY0BGHSMA08uDMNkdSehFkQ_9afzzbkdpPkD0cz3owVWBQ@mail.gmail.com>
On 19/09/11 19:07, Jassi Brar wrote:
> On Mon, Sep 19, 2011 at 10:41 PM, Javi Merino <javi.merino@arm.com> wrote:
>> If two requests have been submitted and one of them is running, if you
>> call pl330_chan_ctrl(ch_id, PL330_OP_START), there's a window of time
>> between the spin_lock_irqsave() and the _state() check in which the
>> running transaction may finish. In that case, we don't receive the
>> interrupt (because they are disabled), but _start() sees that the DMA
>> is stopped, so it starts it. The problem is that it sends the
>> transaction that has just finished again, because pl330_update()
>> hasn't mark it as done yet.
>>
>> This patch moves the _state() check out of the critical section, which
>> removes the race condition. It also treats PL330_STATE_COMPLETING as
>> still executing, because that introduces another race condition now
>> that we call _state() with interrupts enabled. Namely, if we read the
>> state as "completing" and the DMA sends the interrupt before we
>> disable interrupts, pl330_update() starts the next transaction and
>> returns. Then the _start() in pl330_chan_ctrl() will patiently wait
>> until the just issued transaction finishes (because the state we read
>> was PL330_STATE_COMPLETING) and when it does, it _trigger()s the same
>> transaction again.
>>
>> Signed-off-by: Javi Merino <javi.merino@arm.com>
>> Cc: Jassi Brar <jassi.brar@samsung.com>
>> ---
>> arch/arm/common/pl330.c | 12 +++++++-----
>> 1 files changed, 7 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
>> index 97912fa..26b5615 100644
>> --- a/arch/arm/common/pl330.c
>> +++ b/arch/arm/common/pl330.c
>> @@ -936,9 +936,9 @@ static bool _trigger(struct pl330_thread *thrd)
>> return true;
>> }
>>
>> -static bool _start(struct pl330_thread *thrd)
>> +static bool _start(struct pl330_thread *thrd, u32 state)
>> {
>> - switch (_state(thrd)) {
>> + switch (state) {
>> case PL330_STATE_FAULT_COMPLETING:
>> UNTIL(thrd, PL330_STATE_FAULTING | PL330_STATE_KILLING);
>>
>> @@ -949,7 +949,6 @@ static bool _start(struct pl330_thread *thrd)
>> _stop(thrd);
>>
>> case PL330_STATE_KILLING:
>> - case PL330_STATE_COMPLETING:
>> UNTIL(thrd, PL330_STATE_STOPPED)
>>
>> case PL330_STATE_STOPPED:
>> @@ -961,6 +960,7 @@ static bool _start(struct pl330_thread *thrd)
>> case PL330_STATE_UPDTPC:
>> case PL330_STATE_CACHEMISS:
>> case PL330_STATE_EXECUTING:
>> + case PL330_STATE_COMPLETING:
>> return true;
>>
>> case PL330_STATE_WFE: /* For RESUME, nothing yet */
>> @@ -1471,7 +1471,7 @@ int pl330_update(const struct pl330_info *pi)
>> MARK_FREE(rqdone);
>>
>> /* Get going again ASAP */
>> - _start(thrd);
>> + _start(thrd, _state(thrd));
>>
>> /* For now, just make a list of callbacks to be done */
>> list_add_tail(&rqdone->rqd, &pl330->req_done);
>> @@ -1510,12 +1510,14 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
>> struct pl330_dmac *pl330;
>> unsigned long flags;
>> int ret = 0, active;
>> + u32 dma_state;
>>
>> if (!thrd || thrd->free || thrd->dmac->state == DYING)
>> return -EINVAL;
>>
>> pl330 = thrd->dmac;
>>
>> + dma_state = _state(thrd);
>> spin_lock_irqsave(&pl330->lock, flags);
>>
>> switch (op) {
>> @@ -1546,7 +1548,7 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
>>
>> /* Start the next */
>> case PL330_OP_START:
>> - if (!_start(thrd))
>> + if (!_start(thrd, dma_state))
>> ret = -EIO;
>> break;
>>
>> --
>
> IIUIC your race scenario should be taken care of simply by doing...
>
> diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
> index 97912fa..7129cfb 100644
> --- a/arch/arm/common/pl330.c
> +++ b/arch/arm/common/pl330.c
> @@ -1546,7 +1546,7 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
>
> /* Start the next */
> case PL330_OP_START:
> - if (!_start(thrd))
> + if (!_thrd_active(thrd) && !_start(thrd))
> ret = -EIO;
> break;
>
My first reaction was this was just moving the race condition, but
thinking about it carefully, it looks like a better (simpler) solution.
> Could you please test if it fixes the issue?
Yes, I'll kick off runs later today and see how it goes. I don't have a
way to reproduce the bug consistently, I just do lots of DMA
transactions and eventually, I end up hitting it. I'll run it overnight
and see if it fixes it or not.
Cheers,
Javi
^ permalink raw reply
* DT vs ARM static mappings
From: Pawel Moll @ 2011-09-20 14:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4E788E12.8000801@gmail.com>
> > Of course the simplest solution would be to define two different
> > compatible values, eg. "arm,vexpress-legacy" would execute the current
> > map_io implementation, while "arm,vexpress-rs1" would use different one,
> > setting up the other map_desc (the MMIO_P2V macro must die of course,
> > replaced with a runtime-defined virtual base address for the
> > peripherals).
> >
> > If you believe that's what I should do, say it and stop reading :-)
>
> Yes. Different tiles are fundamentally different boards, so they should
> have different DTs. Using includes should help minimize duplication though.
You've misunderstood me or (most likely ;-) probably I wasn't clear
enough.
There is no doubt the DTs will be different across the "portfolio".
We already have (patches soon) vexpress-v2p-ca9.dts that includes
vexpress-v2m-legacy.dtsi.
A5 will be vexpress-v2p-ca5p.dts+vexpress-v2m-rs1.dtsi, A15
vexpress-v2p-ca15.dts+vexpress-v2m-rs1.dtsi (notice that the A5/A15 are
sharing the v2m bit, as the motherboard is common).
My point is that we should be able to handle _all_ of them using one
DT_MACHINE_START with a single compat value "arm,vexpress". The only
problem with this (so far) is the mapping.
> Think about it this way. How would you solve this without DT? You
> would have a bunch of duplicated data in the kernel for the different
> configs. So you're not any worse off in this regard and still have the
> other advantages of DT.
Exactly my point :-) I want to have as little duplication as possible.
And the static mapping issue is in the way.
> > To my mind it looked like the whole mechanism was not flexible enough,
> > so I wanted to explore other options...
> >
> > The obvious one was to describe the required static mapping in the DTS.
> > I don't like this idea, though. It can hardly be called "hardware
> > description". Besides, what node would carry such data? "chosen"?
> > Hardly...
> >
> > Would it contain a "regs" property with the physical address and
> > "virtual-reg" with the virtual one? Again, doesn't sound right to me
> > (especially the virtual bit, however the virtual address could be common
> > between different variants and be defined in the board support code, not
> > the DTS).
> >
> > I have considered a reference (phandle or an alias?) to the node to be
> > mapped ("peripherals" in my case), but where to define this reference?
> > Any ideas?
>
> In "chosen" like the kernel command line would be the place, but I don't
> think that is the right approach. Chosen is really for things that
> change frequently and this doesn't really fall in that category.
Again, no argument from me here :-)
The question is - where should it be?
> > There is an additional problem here... The "map_io" is executed before
> > the tree is un-flattened, so:
> >
> > 1. One can't simply use "of_find_matching_node()" (as in the latest l2x0
> > patches) to find the interesting nodes - the only way of going through
> > the tree is raw of_scan_flat_dt() function. Therefore any conditions
> > more complex then string comparison with the (full) node name are
> > problematic.
> >
> > 2. The tree mappings (ranges) are not resolved yet, so one can't simply
> > get the effective address of a node. Only "raw" properties are
> > available, so all one can get scanning for "peripherals at 7" node is "0 7
> > 0 0x20000" array, instead of the "0x10000000 0x00020000" that is really
> > important.
>
> If you add a compatible field to "motherboard" node, then you can read
> the ranges.
... and then and then scan for the sysregs, and add the offset and base
together... Sounds to me like duplication of the of_translate_*()?
> > Initially I wanted to find the mentioned devices and create individual
> > mappings for them, so the MMIO_P2V would be still valid (if slightly
> > "abused"), but I failed due to the problems mentioned above. And I can't
> > delay this operation till the tree is un-flattened, as the core tile
> > must be probed (via sysreg) in map_io (tile's specific code must be able
> > to create its own mappings):
>
> Do you really need MMIO_P2V? If you have fixed virtual addresses in the
> kernel and can pull the phys addresses from DT to populate the iotable,
> is that sufficient?
For the third time, 100% agree :-) Well, 90%.
What I need is:
1. Get the phys address from DT. But how? This is getting as back to my
complaints about still-flat tree and ranges, the node to be used to
describe the mapping.
2. The offset inside the mapping will be different (for sysregs it will
be 0 for old mapping, 0x10000 for the new one), so I have to work it out
from the tree as well. And as we are in map_io, the tree is still flat
and... read 1 :-)
> Generally, the trend is to get rid of static mappings as much as
> possible. Doing that first might simplify things.
You can't do ioremap() before kmalloc() is up and running (correct me if
I am wrong), at least you can't do this in map_io. So the static mapping
is a must sometimes. And actually, with the latest Nico's changes:
http://thread.gmane.org/gmane.linux.ports.arm.kernel/132762
it may even be preferred for peripherals (one mapping shared across all
users).
Cheers!
Pawe?
^ permalink raw reply
* [PATCH] usb: musb: OMAP4430: Remove a redundant omap4430_phy_init call in usb_musb_init
From: Bjarne Steinsbo @ 2011-09-20 14:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1316508629.14514.2.camel@phoenix>
Ref thread starting at http://marc.info/?l=linux-omap&m=131316289211258&w=2
Bjarne Steinsbo
On Tue, Sep 20, 2011 at 10:50 AM, Axel Lin <axel.lin@gmail.com> wrote:
> Current code calls omap4430_phy_init() twice in usb_musb_init().
> Calling omap4430_phy_init() once is enough.
> This patch removes the first omap4430_phy_init() call, which using an
> uninitialized pointer as parameter.
>
> This patch elimates below build warning:
> arch/arm/mach-omap2/usb-musb.c: In function 'usb_musb_init':
> arch/arm/mach-omap2/usb-musb.c:141: warning: 'dev' may be used uninitialized in this function
>
> Signed-off-by: Axel Lin <axel.lin@gmail.com>
> ---
> ?arch/arm/mach-omap2/usb-musb.c | ? ?3 ---
> ?1 files changed, 0 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
> index a65145b..19e4dac 100644
> --- a/arch/arm/mach-omap2/usb-musb.c
> +++ b/arch/arm/mach-omap2/usb-musb.c
> @@ -137,9 +137,6 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
> ? ? ? ?musb_plat.mode = board_data->mode;
> ? ? ? ?musb_plat.extvbus = board_data->extvbus;
>
> - ? ? ? if (cpu_is_omap44xx())
> - ? ? ? ? ? ? ? omap4430_phy_init(dev);
> -
> ? ? ? ?if (cpu_is_omap3517() || cpu_is_omap3505()) {
> ? ? ? ? ? ? ? ?oh_name = "am35x_otg_hs";
> ? ? ? ? ? ? ? ?name = "musb-am35x";
> --
> 1.7.4.1
>
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* [PATCH-V3 0/4] Introducing TI's New SoC/board AM335XEVM
From: hvaibhav at ti.com @ 2011-09-20 14:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Vaibhav Hiremath <hvaibhav@ti.com>
This patch set adds support for AM335x device having
Cortex-A8 MPU.
AM335X is treated as another OMAP3 variant, where,
along with existing cpu class OMAP34XX, new cpu class AM33XX is created
and the respective type is AM335X, which is newly added device in the family.
This means, cpu_is_omap34xx(), cpu_is_am33xx() and
cpu_is_am335x() checks return success for AM335X.
Also, I have validated OMAP3 boot test with this patch-series on OMAP3EVM.
Changes from V1(RFC):
- Created separate cpu/SoC class for AM33XX family of devices,
due to all known facts. This is been mentioned in main-chain
https://patchwork.kernel.org/patch/1056312/
- BUG Fix in debug-macro.S, which was leading to build failure.
https://patchwork.kernel.org/patch/1056302/
Changes from V2(RFC):
- Rebased against Paul's OMAP_CHIP* cleanup patches
git://git.pwsan.com/linux-2.6 omap_chip_remove_cleanup_3.2
- Removed dependancy on Hemant's submitted patches for TI814X
support, in order to get it upstream.
Afzal Mohammed (4):
arm:omap:am33xx: Update common omap platform files
arm:omap:am33xx: Update common OMAP machine specific sources
arm:omap:am33xx: Create board support and enable build for AM335XEVM
arm:omap:am33xx: Add low level debugging support
arch/arm/mach-omap2/Kconfig | 10 ++++
arch/arm/mach-omap2/Makefile | 2 +
arch/arm/mach-omap2/board-am335xevm.c | 57 ++++++++++++++++++++++++
arch/arm/mach-omap2/clock.c | 2 +-
arch/arm/mach-omap2/clock.h | 2 +-
arch/arm/mach-omap2/clock3xxx_data.c | 6 ++-
arch/arm/mach-omap2/common.c | 16 +++++++
arch/arm/mach-omap2/id.c | 10 +++-
arch/arm/mach-omap2/include/mach/debug-macro.S | 22 +++++++++
arch/arm/mach-omap2/io.c | 25 ++++++++++
arch/arm/mach-omap2/opp2xxx.h | 2 +-
arch/arm/mach-omap2/serial.c | 6 +-
arch/arm/plat-omap/include/plat/am33xx.h | 25 ++++++++++
arch/arm/plat-omap/include/plat/clkdev_omap.h | 1 +
arch/arm/plat-omap/include/plat/clock.h | 3 +-
arch/arm/plat-omap/include/plat/common.h | 1 +
arch/arm/plat-omap/include/plat/cpu.h | 25 ++++++++++
arch/arm/plat-omap/include/plat/hardware.h | 1 +
arch/arm/plat-omap/include/plat/io.h | 20 ++++++++
arch/arm/plat-omap/include/plat/omap34xx.h | 2 +
arch/arm/plat-omap/include/plat/serial.h | 4 ++
arch/arm/plat-omap/include/plat/uncompress.h | 6 +++
arch/arm/plat-omap/io.c | 5 ++
23 files changed, 243 insertions(+), 10 deletions(-)
create mode 100644 arch/arm/mach-omap2/board-am335xevm.c
create mode 100644 arch/arm/plat-omap/include/plat/am33xx.h
^ permalink raw reply
* [PATCH-V3 1/4] arm:omap:am33xx: Update common omap platform files
From: hvaibhav at ti.com @ 2011-09-20 14:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Afzal Mohammed <afzal@ti.com>
This patch updates the common platform files with AM335X device
support (AM33XX family).
The approach taken in this patch is,
AM33XX device will be considered as OMAP3 variant, and a separate
SoC class created for AM33XX family of devices with a subclass type
for AM335X device, which is newly added device in the family.
This means, cpu_is_omap34xx(), cpu_is_am33xx() and cpu_is_am335x()
checks will return success on AM335X device.
A kernel config option CONFIG_SOC_OMAPAM33XX is added under OMAP3
to include support for AM33XX build.
Also, cpu_mask and RATE_IN_XXX flags have crossed 8 bit hence
struct clksel_rate.flags, struct prcm_config.flags and cpu_mask
are changed to u16 from u8.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Hemant Pedanekar <hemantp@ti.com>
---
arch/arm/mach-omap2/Kconfig | 5 +++++
arch/arm/mach-omap2/clock.c | 2 +-
arch/arm/mach-omap2/clock.h | 2 +-
arch/arm/mach-omap2/opp2xxx.h | 2 +-
arch/arm/plat-omap/include/plat/clkdev_omap.h | 1 +
arch/arm/plat-omap/include/plat/clock.h | 3 ++-
arch/arm/plat-omap/include/plat/cpu.h | 25 +++++++++++++++++++++++++
7 files changed, 36 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 57b66d5..12ab835 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -78,6 +78,11 @@ config SOC_OMAPTI816X
depends on ARCH_OMAP3
default y
+config SOC_OMAPAM33XX
+ bool "AM33XX support"
+ depends on ARCH_OMAP3
+ default y
+
config OMAP_PACKAGE_ZAF
bool
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 1f3481f..f57ed5b 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -35,7 +35,7 @@
#include "cm-regbits-24xx.h"
#include "cm-regbits-34xx.h"
-u8 cpu_mask;
+u16 cpu_mask;
/*
* clkdm_control: if true, then when a clock is enabled in the
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 48ac568..687d3d3 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -130,7 +130,7 @@ void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
const char *core_ck_name,
const char *mpu_ck_name);
-extern u8 cpu_mask;
+extern u16 cpu_mask;
extern const struct clkops clkops_omap2_dflt_wait;
extern const struct clkops clkops_dummy;
diff --git a/arch/arm/mach-omap2/opp2xxx.h b/arch/arm/mach-omap2/opp2xxx.h
index 8affc66..8fae534 100644
--- a/arch/arm/mach-omap2/opp2xxx.h
+++ b/arch/arm/mach-omap2/opp2xxx.h
@@ -51,7 +51,7 @@ struct prcm_config {
unsigned long cm_clksel2_pll; /* dpllx1 or x2 out */
unsigned long cm_clksel_mdm; /* modem dividers 2430 only */
unsigned long base_sdrc_rfr; /* base refresh timing for a set */
- unsigned char flags;
+ unsigned short flags;
};
diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h
index 387a963..6d84c0c 100644
--- a/arch/arm/plat-omap/include/plat/clkdev_omap.h
+++ b/arch/arm/plat-omap/include/plat/clkdev_omap.h
@@ -40,6 +40,7 @@ struct omap_clk {
#define CK_443X (1 << 11)
#define CK_TI816X (1 << 12)
#define CK_446X (1 << 13)
+#define CK_AM33XX (1 << 14) /* AM33xx specific clocks */
#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS)
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 197ca03..168c54e 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -59,6 +59,7 @@ struct clkops {
#define RATE_IN_4430 (1 << 5)
#define RATE_IN_TI816X (1 << 6)
#define RATE_IN_4460 (1 << 7)
+#define RATE_IN_AM33XX (1 << 8)
#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
@@ -84,7 +85,7 @@ struct clkops {
struct clksel_rate {
u32 val;
u8 div;
- u8 flags;
+ u16 flags;
};
/**
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 2f90269..9f4d5c3 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -78,6 +78,14 @@ static inline int is_omap ##class (void) \
return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
}
+#define GET_AM_CLASS ((omap_rev() >> 24) & 0xff)
+
+#define IS_AM_CLASS(class, id) \
+static inline int is_am ##class (void) \
+{ \
+ return (GET_AM_CLASS == (id)) ? 1 : 0; \
+}
+
#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
#define IS_OMAP_SUBCLASS(subclass, id) \
@@ -92,12 +100,19 @@ static inline int is_ti ##subclass (void) \
return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
}
+#define IS_AM_SUBCLASS(subclass, id) \
+static inline int is_am ##subclass (void) \
+{ \
+ return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
+}
+
IS_OMAP_CLASS(7xx, 0x07)
IS_OMAP_CLASS(15xx, 0x15)
IS_OMAP_CLASS(16xx, 0x16)
IS_OMAP_CLASS(24xx, 0x24)
IS_OMAP_CLASS(34xx, 0x34)
IS_OMAP_CLASS(44xx, 0x44)
+IS_AM_CLASS(33xx, 0x33)
IS_OMAP_SUBCLASS(242x, 0x242)
IS_OMAP_SUBCLASS(243x, 0x243)
@@ -107,6 +122,7 @@ IS_OMAP_SUBCLASS(443x, 0x443)
IS_OMAP_SUBCLASS(446x, 0x446)
IS_TI_SUBCLASS(816x, 0x816)
+IS_AM_SUBCLASS(335x, 0x335)
#define cpu_is_omap7xx() 0
#define cpu_is_omap15xx() 0
@@ -117,6 +133,8 @@ IS_TI_SUBCLASS(816x, 0x816)
#define cpu_is_omap34xx() 0
#define cpu_is_omap343x() 0
#define cpu_is_ti816x() 0
+#define cpu_is_am33xx() 0
+#define cpu_is_am335x() 0
#define cpu_is_omap44xx() 0
#define cpu_is_omap443x() 0
#define cpu_is_omap446x() 0
@@ -323,6 +341,8 @@ IS_OMAP_TYPE(3517, 0x3517)
# undef cpu_is_omap3505
# undef cpu_is_omap3517
# undef cpu_is_ti816x
+# undef cpu_is_am33xx
+# undef cpu_is_am335x
# define cpu_is_omap3430() is_omap3430()
# define cpu_is_omap3503() (cpu_is_omap3430() && \
(!omap3_has_iva()) && \
@@ -340,6 +360,8 @@ IS_OMAP_TYPE(3517, 0x3517)
# undef cpu_is_omap3630
# define cpu_is_omap3630() is_omap363x()
# define cpu_is_ti816x() is_ti816x()
+# define cpu_is_am33xx() is_am33xx()
+# define cpu_is_am335x() is_am335x()
#endif
# if defined(CONFIG_ARCH_OMAP4)
@@ -386,6 +408,9 @@ IS_OMAP_TYPE(3517, 0x3517)
#define TI8168_REV_ES1_0 TI816X_CLASS
#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
+#define AM335X_CLASS 0x33500034
+#define AM335X_REV_ES1_0 AM335X_CLASS
+
#define OMAP443X_CLASS 0x44300044
#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8))
--
1.7.0.4
^ permalink raw reply related
* [PATCH-V3 2/4] arm:omap:am33xx: Update common OMAP machine specific sources
From: hvaibhav at ti.com @ 2011-09-20 14:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Afzal Mohammed <afzal@ti.com>
This patch updates the common machine specific source files for
support for AM33XX/AM335x with cpu type, macros for identification of
AM33XX/AM335X device.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
---
arch/arm/mach-omap2/clock3xxx_data.c | 6 +++++-
arch/arm/mach-omap2/common.c | 16 ++++++++++++++++
arch/arm/mach-omap2/id.c | 10 ++++++++--
arch/arm/mach-omap2/io.c | 25 +++++++++++++++++++++++++
arch/arm/mach-omap2/serial.c | 6 +++---
arch/arm/plat-omap/include/plat/am33xx.h | 25 +++++++++++++++++++++++++
arch/arm/plat-omap/include/plat/common.h | 1 +
arch/arm/plat-omap/include/plat/hardware.h | 1 +
arch/arm/plat-omap/include/plat/io.h | 20 ++++++++++++++++++++
arch/arm/plat-omap/include/plat/omap34xx.h | 2 ++
arch/arm/plat-omap/io.c | 5 +++++
11 files changed, 111 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/plat-omap/include/plat/am33xx.h
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index dadb8c6..2ee472c 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3493,6 +3493,9 @@ int __init omap3xxx_clk_init(void)
} else if (cpu_is_ti816x()) {
cpu_mask = RATE_IN_TI816X;
cpu_clkflg = CK_TI816X;
+ } else if (cpu_is_am33xx()) {
+ cpu_mask = RATE_IN_AM33XX;
+ cpu_clkflg = CK_AM33XX;
} else if (cpu_is_omap34xx()) {
if (omap_rev() == OMAP3430_REV_ES1_0) {
cpu_mask = RATE_IN_3430ES1;
@@ -3576,7 +3579,8 @@ int __init omap3xxx_clk_init(void)
* Lock DPLL5 -- here only until other device init code can
* handle this
*/
- if (!cpu_is_ti816x() && (omap_rev() >= OMAP3430_REV_ES2_0))
+ if (!cpu_is_ti816x() && !cpu_is_am33xx() &&
+ (omap_rev() >= OMAP3430_REV_ES2_0))
omap3_clk_lock_dpll5();
/* Avoid sleeping during omap3_core_dpll_m2_set_rate() */
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 3f20cbb..395a9b6 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -119,6 +119,22 @@ void __init omap2_set_globals_ti816x(void)
{
__omap2_set_globals(&ti816x_globals);
}
+
+#define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \
+ TI816X_CONTROL_DEVICE_ID - 0x204)
+
+static struct omap_globals am33xx_globals = {
+ .class = OMAP343X_CLASS,
+ .tap = OMAP2_L4_IO_ADDRESS(AM33XX_TAP_BASE),
+ .ctrl = AM33XX_CTRL_BASE,
+ .prm = AM33XX_PRCM_BASE,
+ .cm = AM33XX_PRCM_BASE,
+};
+
+void __init omap2_set_globals_am33xx(void)
+{
+ __omap2_set_globals(&am33xx_globals);
+}
#endif
#if defined(CONFIG_ARCH_OMAP4)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index d27daf9..540b6f1 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -337,6 +337,10 @@ static void __init omap3_check_revision(const char **cpu_rev)
break;
}
break;
+ case 0xb944:
+ omap_revision = AM335X_REV_ES1_0;
+ *cpu_rev = "1.0";
+ break;
default:
/* Unknown default to latest silicon rev as default */
omap_revision = OMAP3630_REV_ES1_2;
@@ -429,6 +433,8 @@ static void __init omap3_cpuinfo(const char *cpu_rev)
cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
} else if (cpu_is_ti816x()) {
cpu_name = "TI816X";
+ } else if (cpu_is_am335x()) {
+ cpu_name = "AM335X";
} else if (omap3_has_iva() && omap3_has_sgx()) {
/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
cpu_name = "OMAP3430/3530";
@@ -469,8 +475,8 @@ void __init omap2_check_revision(void)
} else if (cpu_is_omap34xx()) {
omap3_check_revision(&cpu_rev);
- /* TI816X doesn't have feature register */
- if (!cpu_is_ti816x())
+ /* TI816X/AM335X doesn't have feature register */
+ if (!cpu_is_ti816x() && !cpu_is_am33xx())
omap3_check_features();
else
ti816x_check_features();
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 40b6d47..ccd50de 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -182,7 +182,24 @@ static struct map_desc omapti816x_io_desc[] __initdata = {
.pfn = __phys_to_pfn(L4_34XX_PHYS),
.length = L4_34XX_SIZE,
.type = MT_DEVICE
+ }
+};
+#endif
+
+#ifdef CONFIG_SOC_OMAPAM33XX
+static struct map_desc omapam33xx_io_desc[] __initdata = {
+ {
+ .virtual = L4_34XX_VIRT,
+ .pfn = __phys_to_pfn(L4_34XX_PHYS),
+ .length = L4_34XX_SIZE,
+ .type = MT_DEVICE
},
+ {
+ .virtual = L4_WK_AM33XX_VIRT,
+ .pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS),
+ .length = L4_WK_AM33XX_SIZE,
+ .type = MT_DEVICE
+ }
};
#endif
@@ -286,6 +303,14 @@ void __init omapti816x_map_common_io(void)
}
#endif
+#ifdef CONFIG_SOC_OMAPAM33XX
+void __init omapam33xx_map_common_io(void)
+{
+ iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
+ _omap2_map_common_io();
+}
+#endif
+
#ifdef CONFIG_ARCH_OMAP4
void __init omap44xx_map_common_io(void)
{
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 466fc72..b7782ee 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -486,7 +486,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
mod_timer(&uart->timer, jiffies + uart->timeout);
omap_uart_smart_idle_enable(uart, 0);
- if (cpu_is_omap34xx() && !cpu_is_ti816x()) {
+ if (cpu_is_omap34xx() && !(cpu_is_ti816x() || cpu_is_am33xx())) {
u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
u32 wk_mask = 0;
u32 padconf = 0;
@@ -768,7 +768,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
*/
uart->regshift = p->regshift;
uart->membase = p->membase;
- if (cpu_is_omap44xx() || cpu_is_ti816x())
+ if (cpu_is_omap44xx() || cpu_is_ti816x() || cpu_is_am33xx())
uart->errata |= UART_ERRATA_FIFO_FULL_ABORT;
else if ((serial_read_reg(uart, UART_OMAP_MVER) & 0xFF)
>= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV)
@@ -851,7 +851,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
}
/* Enable the MDR1 errata for OMAP3 */
- if (cpu_is_omap34xx() && !cpu_is_ti816x())
+ if (cpu_is_omap34xx() && !(cpu_is_ti816x() || cpu_is_am33xx()))
uart->errata |= UART_ERRATA_i202_MDR1_ACCESS;
}
diff --git a/arch/arm/plat-omap/include/plat/am33xx.h b/arch/arm/plat-omap/include/plat/am33xx.h
new file mode 100644
index 0000000..06c19bb
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/am33xx.h
@@ -0,0 +1,25 @@
+/*
+ * This file contains the address info for various AM33XX modules.
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_AM33XX_H
+#define __ASM_ARCH_AM33XX_H
+
+#define L4_SLOW_AM33XX_BASE 0x48000000
+
+#define AM33XX_SCM_BASE 0x44E10000
+#define AM33XX_CTRL_BASE AM33XX_SCM_BASE
+#define AM33XX_PRCM_BASE 0x44E00000
+
+#endif /* __ASM_ARCH_AM33XX_H */
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 4564cc6..6827e34 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -67,6 +67,7 @@ void omap2_set_globals_243x(void);
void omap2_set_globals_3xxx(void);
void omap2_set_globals_443x(void);
void omap2_set_globals_ti816x(void);
+void omap2_set_globals_am33xx(void);
/* These get called from omap2_set_globals_xxxx(), do not call these */
void omap2_set_globals_tap(struct omap_globals *);
diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h
index e87efe1..e6521e1 100644
--- a/arch/arm/plat-omap/include/plat/hardware.h
+++ b/arch/arm/plat-omap/include/plat/hardware.h
@@ -287,5 +287,6 @@
#include <plat/omap34xx.h>
#include <plat/omap44xx.h>
#include <plat/ti816x.h>
+#include <plat/am33xx.h>
#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index d72ec85..0c54a00 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -73,6 +73,9 @@
#define OMAP4_L3_IO_OFFSET 0xb4000000
#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
+#define AM33XX_L4_WK_IO_OFFSET 0xb5000000
+#define AM33XX_L4_WK_IO_ADDRESS(pa) IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET)
+
#define OMAP4_L3_PER_IO_OFFSET 0xb1100000
#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
@@ -154,6 +157,15 @@
#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
/*
+ * ----------------------------------------------------------------------------
+ * AM33XX specific IO mapping
+ * ----------------------------------------------------------------------------
+ */
+#define L4_WK_AM33XX_PHYS L4_WK_AM33XX_BASE
+#define L4_WK_AM33XX_VIRT (L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET)
+#define L4_WK_AM33XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
+
+/*
* Need to look at the Size 4M for L4.
* VPOM3430 was not working for Int controller
*/
@@ -291,6 +303,14 @@ static inline void omapti816x_map_common_io(void)
}
#endif
+#ifdef CONFIG_SOC_OMAPAM33XX
+extern void omapam33xx_map_common_io(void);
+#else
+static inline void omapam33xx_map_common_io(void)
+{
+}
+#endif
+
#ifdef CONFIG_ARCH_OMAP4
extern void omap44xx_map_common_io(void);
#else
diff --git a/arch/arm/plat-omap/include/plat/omap34xx.h b/arch/arm/plat-omap/include/plat/omap34xx.h
index b9e8588..0d818ac 100644
--- a/arch/arm/plat-omap/include/plat/omap34xx.h
+++ b/arch/arm/plat-omap/include/plat/omap34xx.h
@@ -35,6 +35,8 @@
#define L4_EMU_34XX_BASE 0x54000000
#define L3_34XX_BASE 0x68000000
+#define L4_WK_AM33XX_BASE 0x44C00000
+
#define OMAP3430_32KSYNCT_BASE 0x48320000
#define OMAP3430_CM_BASE 0x48004800
#define OMAP3430_PRM_BASE 0x48306800
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
index f1ecfa9..25a32b2 100644
--- a/arch/arm/plat-omap/io.c
+++ b/arch/arm/plat-omap/io.c
@@ -88,6 +88,11 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
if (cpu_is_ti816x()) {
if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
+ } else if (cpu_is_am33xx()) {
+ if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
+ return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
+ if (BETWEEN(p, L4_WK_AM33XX_PHYS, L4_WK_AM33XX_SIZE))
+ return XLATE(p, L4_WK_AM33XX_PHYS, L4_WK_AM33XX_VIRT);
} else if (cpu_is_omap34xx()) {
if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE))
return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT);
--
1.7.0.4
^ permalink raw reply related
* [PATCH-V3 3/4] arm:omap:am33xx: Create board support and enable build for AM335XEVM
From: hvaibhav at ti.com @ 2011-09-20 14:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Afzal Mohammed <afzal@ti.com>
This patch adds minimal support and build configuration for
AM335X EVM.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
---
arch/arm/mach-omap2/Kconfig | 5 +++
arch/arm/mach-omap2/Makefile | 2 +
arch/arm/mach-omap2/board-am335xevm.c | 57 +++++++++++++++++++++++++++++++++
3 files changed, 64 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/board-am335xevm.c
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 12ab835..8533008 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -315,6 +315,11 @@ config MACH_TI8168EVM
depends on SOC_OMAPTI816X
default y
+config MACH_AM335XEVM
+ bool "AM335X Evaluation Module"
+ depends on SOC_OMAPAM33XX
+ default y
+
config MACH_OMAP_4430SDP
bool "OMAP 4430 SDP board"
default y
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 5a6fe73..47d8de1 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -259,6 +259,8 @@ obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o
obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o \
hsmmc.o
obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o
+obj-$(CONFIG_MACH_AM335XEVM) += board-am335xevm.o
+
# Platform specific device init code
usbfs-$(CONFIG_ARCH_OMAP_OTG) := usb-fs.o
obj-y += $(usbfs-m) $(usbfs-y)
diff --git a/arch/arm/mach-omap2/board-am335xevm.c b/arch/arm/mach-omap2/board-am335xevm.c
new file mode 100644
index 0000000..afa3f26
--- /dev/null
+++ b/arch/arm/mach-omap2/board-am335xevm.c
@@ -0,0 +1,57 @@
+/*
+ * Code for AM335X EVM.
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <plat/irqs.h>
+#include <plat/board.h>
+#include <plat/common.h>
+
+static struct omap_board_config_kernel am335x_evm_config[] __initdata = {
+};
+
+static void __init am335x_init_early(void)
+{
+ omap2_init_common_infrastructure();
+ omap2_init_common_devices(NULL, NULL);
+}
+
+static void __init am335x_evm_init(void)
+{
+ omap_serial_init();
+ omap_board_config = am335x_evm_config;
+ omap_board_config_size = ARRAY_SIZE(am335x_evm_config);
+}
+
+static void __init am335x_evm_map_io(void)
+{
+ omap2_set_globals_am33xx();
+ omapam33xx_map_common_io();
+}
+
+MACHINE_START(AM335XEVM, "am335xevm")
+ /* Maintainer: Texas Instruments */
+ .boot_params = 0x80000100,
+ .map_io = am335x_evm_map_io,
+ .init_early = am335x_init_early,
+ .init_irq = ti816x_init_irq,
+ .timer = &omap3_timer,
+ .init_machine = am335x_evm_init,
+MACHINE_END
--
1.7.0.4
^ permalink raw reply related
* [PATCH-V3 4/4] arm:omap:am33xx: Add low level debugging support
From: hvaibhav at ti.com @ 2011-09-20 14:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Afzal Mohammed <afzal@ti.com>
Add support for low level debugging on AM335X EVM (AM33XX family).
Currently only support for UART1 console, which is used on AM335X EVM
is added.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
---
arch/arm/mach-omap2/include/mach/debug-macro.S | 22 ++++++++++++++++++++++
arch/arm/plat-omap/include/plat/serial.h | 4 ++++
arch/arm/plat-omap/include/plat/uncompress.h | 6 ++++++
3 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
index 48adfe9..f649973 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -78,6 +78,8 @@ omap_uart_lsr: .word 0
beq 82f @ configure UART2
cmp \rp, #TI816XUART3 @ ti816x UART offsets different
beq 83f @ configure UART3
+ cmp \rp, #AM33XXUART1 @ AM33XX UART offsets different
+ beq 84f @ configure UART1
cmp \rp, #ZOOM_UART @ only on zoom2/3
beq 95f @ configure ZOOM_UART
@@ -106,6 +108,9 @@ omap_uart_lsr: .word 0
b 98f
83: mov \rp, #UART_OFFSET(TI816X_UART3_BASE)
b 98f
+84: ldr \rp, =AM33XX_UART1_BASE
+ and \rp, \rp, #0x00ffffff
+ b 97f
95: ldr \rp, =ZOOM_UART_BASE
mrc p15, 0, \rv, c1, c0
tst \rv, #1 @ MMU enabled?
@@ -121,6 +126,23 @@ omap_uart_lsr: .word 0
b 10b
/* Store both phys and virt address for the uart */
+97: add \rp, \rp, #0x44000000 @ phys base
+ mrc p15, 0, \rv, c1, c0
+ tst \rv, #1 @ MMU enabled?
+ ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
+ ldrne \rv, =omap_uart_phys @ MMU enabled
+ str \rp, [\rv, #0]
+ sub \rp, \rp, #0x44000000 @ phys base
+ add \rp, \rp, #0xf9000000 @ virt base
+ add \rv, \rv, #4 @ omap_uart_virt
+ str \rp, [\rv, #0]
+ mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
+ add \rv, \rv, #4 @ omap_uart_lsr
+ str \rp, [\rv, #0]
+
+ b 10b
+
+ /* Store both phys and virt address for the uart */
98: add \rp, \rp, #0x48000000 @ phys base
mrc p15, 0, \rv, c1, c0
tst \rv, #1 @ MMU enabled?
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index de3b10c..ad19377 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -59,6 +59,9 @@
/* AM3505/3517 UART4 */
#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
+/* AM33XX serial port */
+#define AM33XX_UART1_BASE 0x44E09000
+
/* External port on Zoom2/3 */
#define ZOOM_UART_BASE 0x10000000
#define ZOOM_UART_VIRT 0xfa400000
@@ -92,6 +95,7 @@
#define TI816XUART1 81
#define TI816XUART2 82
#define TI816XUART3 83
+#define AM33XXUART1 84
#define ZOOM_UART 95 /* Only on zoom2/3 */
/* This is only used by 8250.c for omap1510 */
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index a067484..bd1e051 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -97,6 +97,10 @@ static inline void flush(void)
_DEBUG_LL_ENTRY(mach, TI816X_UART##p##_BASE, OMAP_PORT_SHIFT, \
TI816XUART##p)
+#define DEBUG_LL_AM33XX(p, mach) \
+ _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
+ AM33XXUART##p)
+
static inline void __arch_decomp_setup(unsigned long arch_id)
{
int port = 0;
@@ -173,6 +177,8 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
/* TI8168 base boards using UART3 */
DEBUG_LL_TI816X(3, ti8168evm);
+ /* AM33XX base boards using UART1 */
+ DEBUG_LL_AM33XX(1, am335xevm);
} while (0);
}
--
1.7.0.4
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