* [PATCH 4/4] ARM: S5PV210: Add SPI clkdev support
From: Padmavathi Venna @ 2011-09-30 11:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317381753-2845-1-git-send-email-padma.v@samsung.com>
Registered the SPI bus clocks with clkdev using generic
connection id.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
arch/arm/mach-s5pv210/clock.c | 58 ++++++++++++++++++++++++++--------------
1 files changed, 38 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index 4c5ac7a..3edf034 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -983,26 +983,6 @@ static struct clksrc_clk clksrcs[] = {
.reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 },
}, {
.clk = {
- .name = "sclk_spi",
- .devname = "s3c64xx-spi.0",
- .enable = s5pv210_clk_mask0_ctrl,
- .ctrlbit = (1 << 16),
- },
- .sources = &clkset_group2,
- .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
- .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
- }, {
- .clk = {
- .name = "sclk_spi",
- .devname = "s3c64xx-spi.1",
- .enable = s5pv210_clk_mask0_ctrl,
- .ctrlbit = (1 << 17),
- },
- .sources = &clkset_group2,
- .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
- .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
- }, {
- .clk = {
.name = "sclk_pwi",
.enable = s5pv210_clk_mask0_ctrl,
.ctrlbit = (1 << 29),
@@ -1022,6 +1002,39 @@ static struct clksrc_clk clksrcs[] = {
},
};
+static struct clksrc_clk sclk_spi0 = {
+ .clk = {
+ .name = "sclk_spi",
+ .enable = s5pv210_clk_mask0_ctrl,
+ .ctrlbit = (1 << 16),
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
+ .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk sclk_spi1 = {
+ .clk = {
+ .name = "sclk_spi",
+ .enable = s5pv210_clk_mask0_ctrl,
+ .ctrlbit = (1 << 17),
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
+ .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
+};
+
+static struct clk_lookup clk_lookup_table[] = {
+ CLKDEV_INIT(NULL, "spi_busclk0", clk_p)
+ CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", sclk_spi0.clk)
+ CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", sclk_spi1.clk)
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+ &sclk_spi0,
+ &sclk_spi1,
+};
+
/* Clock initialisation code */
static struct clksrc_clk *sysclks[] = {
&clk_mout_apll,
@@ -1273,6 +1286,9 @@ void __init s5pv210_register_clocks(void)
for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++)
s3c_register_clksrc(sclk_tv[ptr], 1);
+ for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+ s3c_register_clksrc(clksrc_cdev[ptr], 1);
+
s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
@@ -1281,4 +1297,6 @@ void __init s5pv210_register_clocks(void)
s3c24xx_register_clock(&dummy_apb_pclk);
s3c_pwmclk_init();
+
+ clkdev_add_table(clk_lookup_table, ARRAY_SIZE(clk_lookup_table));
}
--
1.7.4.4
^ permalink raw reply related
* [PATCH 2/2] ARM: Switch to using CLKDEV_INIT macro for creating clk_lookup instance
From: Hans J. Koch @ 2011-09-30 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317381097-2691-3-git-send-email-padma.v@samsung.com>
On Fri, Sep 30, 2011 at 04:41:37PM +0530, Padmavathi Venna wrote:
> Replace platform specific macros that creates struct clk_lookup
> instance with the new common CLKDEV_INIT macro
Well, for mach-tcc8k, it only saves 7 lines, but it's surely a good idea to
have one common macro for all arm subarchs.
>
> Suggested by: Russell King <rmk+kernel@arm.linux.org.uk>
> Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
For the tcc8k part:
Acked-by: "Hans J. Koch" <hjk@hansjkoch.de>
> ---
> arch/arm/mach-davinci/board-dm646x-evm.c | 5 +-
> arch/arm/mach-davinci/clock.h | 7 --
> arch/arm/mach-davinci/da830.c | 101 +++++++++++----------
> arch/arm/mach-davinci/da850.c | 95 ++++++++++----------
> arch/arm/mach-davinci/dm355.c | 86 +++++++++---------
> arch/arm/mach-davinci/dm365.c | 112 ++++++++++++------------
> arch/arm/mach-davinci/dm644x.c | 77 ++++++++--------
> arch/arm/mach-davinci/dm646x.c | 81 +++++++++--------
> arch/arm/mach-davinci/tnetv107x.c | 134 ++++++++++++++--------------
> arch/arm/mach-ep93xx/clock.c | 61 ++++++-------
> arch/arm/mach-imx/clock-imx1.c | 38 ++++-----
> arch/arm/mach-imx/clock-imx21.c | 91 +++++++++----------
> arch/arm/mach-imx/clock-imx25.c | 77 +++++++---------
> arch/arm/mach-imx/clock-imx27.c | 111 +++++++++++------------
> arch/arm/mach-imx/clock-imx31.c | 103 ++++++++++-----------
> arch/arm/mach-imx/clock-imx35.c | 117 +++++++++++-------------
> arch/arm/mach-lpc32xx/clock.c | 75 +++++++---------
> arch/arm/mach-mx5/clock-mx51-mx53.c | 145 ++++++++++++++----------------
> arch/arm/mach-mxs/clock-mx23.c | 39 ++++-----
> arch/arm/mach-mxs/clock-mx28.c | 67 ++++++--------
> arch/arm/mach-tcc8k/clock.c | 107 ++++++++++------------
> 21 files changed, 825 insertions(+), 904 deletions(-)
[...]
> diff --git a/arch/arm/mach-tcc8k/clock.c b/arch/arm/mach-tcc8k/clock.c
> index e7cdae5..086a9b4 100644
> --- a/arch/arm/mach-tcc8k/clock.c
> +++ b/arch/arm/mach-tcc8k/clock.c
> @@ -468,64 +468,57 @@ DEFINE_BCLOCK(gdma2, BCLKCTR1, 17, NULL, NULL)
> DEFINE_BCLOCK(gdma3, BCLKCTR1, 18, NULL, NULL)
> DEFINE_BCLOCK(ddrc, BCLKCTR1, 19, NULL, NULL)
>
> -#define _REGISTER_CLOCK(d, n, c) \
> - { \
> - .dev_id = d, \
> - .con_id = n, \
> - .clk = &c, \
> - },
> -
> static struct clk_lookup lookups[] = {
> - _REGISTER_CLOCK(NULL, "bus", bus)
> - _REGISTER_CLOCK(NULL, "cpu", cpu)
> - _REGISTER_CLOCK(NULL, "tct", tct)
> - _REGISTER_CLOCK(NULL, "tcx", tcx)
> - _REGISTER_CLOCK(NULL, "tcz", tcz)
> - _REGISTER_CLOCK(NULL, "ref", ref)
> - _REGISTER_CLOCK(NULL, "dai0", dai0)
> - _REGISTER_CLOCK(NULL, "pic", pic)
> - _REGISTER_CLOCK(NULL, "tc", tc)
> - _REGISTER_CLOCK(NULL, "gpio", gpio)
> - _REGISTER_CLOCK(NULL, "usbd", usbd)
> - _REGISTER_CLOCK("tcc-uart.0", NULL, uart0)
> - _REGISTER_CLOCK("tcc-uart.2", NULL, uart2)
> - _REGISTER_CLOCK("tcc-i2c", NULL, i2c)
> - _REGISTER_CLOCK("tcc-uart.3", NULL, uart3)
> - _REGISTER_CLOCK(NULL, "ecc", ecc)
> - _REGISTER_CLOCK(NULL, "adc", adc)
> - _REGISTER_CLOCK("tcc-usbh.0", "usb", usbh0)
> - _REGISTER_CLOCK(NULL, "gdma0", gdma0)
> - _REGISTER_CLOCK(NULL, "lcd", lcd)
> - _REGISTER_CLOCK(NULL, "rtc", rtc)
> - _REGISTER_CLOCK(NULL, "nfc", nfc)
> - _REGISTER_CLOCK("tcc-mmc.0", NULL, sd0)
> - _REGISTER_CLOCK(NULL, "g2d", g2d)
> - _REGISTER_CLOCK(NULL, "gdma1", gdma1)
> - _REGISTER_CLOCK("tcc-uart.1", NULL, uart1)
> - _REGISTER_CLOCK("tcc-spi.0", NULL, spi0)
> - _REGISTER_CLOCK(NULL, "mscl", mscl)
> - _REGISTER_CLOCK("tcc-spi.1", NULL, spi1)
> - _REGISTER_CLOCK(NULL, "bdma", bdma)
> - _REGISTER_CLOCK(NULL, "adma0", adma0)
> - _REGISTER_CLOCK(NULL, "spdif", spdif)
> - _REGISTER_CLOCK(NULL, "scfg", scfg)
> - _REGISTER_CLOCK(NULL, "cid", cid)
> - _REGISTER_CLOCK("tcc-mmc.1", NULL, sd1)
> - _REGISTER_CLOCK("tcc-uart.4", NULL, uart4)
> - _REGISTER_CLOCK(NULL, "dai1", dai1)
> - _REGISTER_CLOCK(NULL, "adma1", adma1)
> - _REGISTER_CLOCK(NULL, "c3dec", c3dec)
> - _REGISTER_CLOCK("tcc-can.0", NULL, can0)
> - _REGISTER_CLOCK("tcc-can.1", NULL, can1)
> - _REGISTER_CLOCK(NULL, "gps", gps)
> - _REGISTER_CLOCK("tcc-gsb.0", NULL, gsb0)
> - _REGISTER_CLOCK("tcc-gsb.1", NULL, gsb1)
> - _REGISTER_CLOCK("tcc-gsb.2", NULL, gsb2)
> - _REGISTER_CLOCK("tcc-gsb.3", NULL, gsb3)
> - _REGISTER_CLOCK(NULL, "gdma2", gdma2)
> - _REGISTER_CLOCK(NULL, "gdma3", gdma3)
> - _REGISTER_CLOCK(NULL, "ddrc", ddrc)
> - _REGISTER_CLOCK("tcc-usbh.1", "usb", usbh1)
> + CLKDEV_INIT(NULL, "bus", bus)
> + CLKDEV_INIT(NULL, "cpu", cpu)
> + CLKDEV_INIT(NULL, "tct", tct)
> + CLKDEV_INIT(NULL, "tcx", tcx)
> + CLKDEV_INIT(NULL, "tcz", tcz)
> + CLKDEV_INIT(NULL, "ref", ref)
> + CLKDEV_INIT(NULL, "dai0", dai0)
> + CLKDEV_INIT(NULL, "pic", pic)
> + CLKDEV_INIT(NULL, "tc", tc)
> + CLKDEV_INIT(NULL, "gpio", gpio)
> + CLKDEV_INIT(NULL, "usbd", usbd)
> + CLKDEV_INIT("tcc-uart.0", NULL, uart0)
> + CLKDEV_INIT("tcc-uart.2", NULL, uart2)
> + CLKDEV_INIT("tcc-i2c", NULL, i2c)
> + CLKDEV_INIT("tcc-uart.3", NULL, uart3)
> + CLKDEV_INIT(NULL, "ecc", ecc)
> + CLKDEV_INIT(NULL, "adc", adc)
> + CLKDEV_INIT("tcc-usbh.0", "usb", usbh0)
> + CLKDEV_INIT(NULL, "gdma0", gdma0)
> + CLKDEV_INIT(NULL, "lcd", lcd)
> + CLKDEV_INIT(NULL, "rtc", rtc)
> + CLKDEV_INIT(NULL, "nfc", nfc)
> + CLKDEV_INIT("tcc-mmc.0", NULL, sd0)
> + CLKDEV_INIT(NULL, "g2d", g2d)
> + CLKDEV_INIT(NULL, "gdma1", gdma1)
> + CLKDEV_INIT("tcc-uart.1", NULL, uart1)
> + CLKDEV_INIT("tcc-spi.0", NULL, spi0)
> + CLKDEV_INIT(NULL, "mscl", mscl)
> + CLKDEV_INIT("tcc-spi.1", NULL, spi1)
> + CLKDEV_INIT(NULL, "bdma", bdma)
> + CLKDEV_INIT(NULL, "adma0", adma0)
> + CLKDEV_INIT(NULL, "spdif", spdif)
> + CLKDEV_INIT(NULL, "scfg", scfg)
> + CLKDEV_INIT(NULL, "cid", cid)
> + CLKDEV_INIT("tcc-mmc.1", NULL, sd1)
> + CLKDEV_INIT("tcc-uart.4", NULL, uart4)
> + CLKDEV_INIT(NULL, "dai1", dai1)
> + CLKDEV_INIT(NULL, "adma1", adma1)
> + CLKDEV_INIT(NULL, "c3dec", c3dec)
> + CLKDEV_INIT("tcc-can.0", NULL, can0)
> + CLKDEV_INIT("tcc-can.1", NULL, can1)
> + CLKDEV_INIT(NULL, "gps", gps)
> + CLKDEV_INIT("tcc-gsb.0", NULL, gsb0)
> + CLKDEV_INIT("tcc-gsb.1", NULL, gsb1)
> + CLKDEV_INIT("tcc-gsb.2", NULL, gsb2)
> + CLKDEV_INIT("tcc-gsb.3", NULL, gsb3)
> + CLKDEV_INIT(NULL, "gdma2", gdma2)
> + CLKDEV_INIT(NULL, "gdma3", gdma3)
> + CLKDEV_INIT(NULL, "ddrc", ddrc)
> + CLKDEV_INIT("tcc-usbh.1", "usb", usbh1)
> };
>
> static struct clk *root_clk_by_index(enum root_clks src)
> --
> 1.7.4.4
>
>
^ permalink raw reply
* [PATCH 2/9] regulator: helper routine to extract regulator_init_data
From: Cousson, Benoit @ 2011-09-30 11:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4E85A34E.9070203@ti.com>
On 9/30/2011 1:09 PM, Nayak, Rajendra wrote:
> On Friday 30 September 2011 04:18 PM, Mark Brown wrote:
>> On Fri, Sep 30, 2011 at 11:28:49AM +0100, Mark Brown wrote:
>>> On Fri, Sep 30, 2011 at 09:57:30AM +0530, Rajendra Nayak wrote:
>>
>>>>>> + init_data->supply_regulator = (char *)of_get_property(dev->of_node,
>>>>>> + "regulator-supplies", NULL);
>>
>>>> Mark, I still seem to be a little confused with this one as to why
>>>> we would need a phandle *and* a supply-name to reference a parent
>>>> regulator/supply.
>>>> The phandle would point to a regulator dt node and that node internally
>>>> would have just one name associated with it.
>>
>>> To repeat: the supply name is for the consumer. It is needed so that
>>> the consumer can tell which supply is provided by which regulator.
>>> Almost all devices have more than one supply and if the device does
>>> anything more complicated than just turning on all the supplies when the
>>> device is active it's going to need to figure out which supply is which.
>>
>> Hang on, I now have no idea what this is supposed to be doing. Later on
>> in the series you had examples in your commit logs with perfectly
>> sensible bindings for supplies:
>>
>> vmmc-supply =<®ulator1>;
>> vpll-supply =<®ulator1>;
>>
>> which have both a unique name and a direct reference to the supplying
>> regulator. What are these "regulator-supplies" properties supposed to
>> be?
>
> :-), yes, I was confused for a while as well after reading your response.
>
> The "regulator-supplies" is used to specific the regulator *parent*.
> Same as what was earlier passed by using the
> "supply_regulator" field of regulator_init_data structure.
> Grant wanted the bindings to support specifying multiple parents
> and hence I was thinking of either a list of names *or*
> a list of phandles to specify multiple parents to a regulator.
I'm confused too now :-)
You can not have multiple to one kind of connection from a power supply
to a single power rail of an IP (vmmc, vpll...).
So I do not see the need for more any other binding that the one you did:
vmmc-supply = <®ulator1>;
That kind of binding does not really exist in the real world:
vmmc-supply = <®ulator1 ®ulator2>;
At least not without a power switch in between.
Regards,
Benoit
^ permalink raw reply
* [PATCH 0/2]: Add SPI Support on Exynos4
From: Padmavathi Venna @ 2011-09-30 11:39 UTC (permalink / raw)
To: linux-arm-kernel
This patchset adds SPI support and register the SPI bus clock
with clkdev using generic connection ID on EXYNOS4. This patch
set is depend on the following patches as it uses a common macro
CLKDEV_INIT to create clk_lookup structure and it also avoids
passing clock names through platform data.
ARM: CLKDEV: Add Common Macro for clk_lookup
ARM: SAMSUNG: Remove SPI bus clocks from platform data
Padmavathi Venna (2):
ARM: EXYNOS4: Add SPI support to EXYNOS4
SPI: EXYNOS4: Enable the SPI driver for EXYNOS4
arch/arm/mach-exynos4/Kconfig | 1 +
arch/arm/mach-exynos4/Makefile | 1 +
arch/arm/mach-exynos4/clock.c | 82 +++++---
arch/arm/mach-exynos4/dev-spi.c | 225 ++++++++++++++++++++++
arch/arm/mach-exynos4/include/mach/irqs.h | 3 +
arch/arm/mach-exynos4/include/mach/map.h | 3 +
arch/arm/mach-exynos4/include/mach/spi-clocks.h | 16 ++
arch/arm/mach-exynos4/mach-smdkv310.c | 127 ++++++++++++-
arch/arm/plat-samsung/include/plat/devs.h | 3 +
arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | 1 +
drivers/spi/Kconfig | 2 +-
11 files changed, 432 insertions(+), 32 deletions(-)
create mode 100644 arch/arm/mach-exynos4/dev-spi.c
create mode 100644 arch/arm/mach-exynos4/include/mach/spi-clocks.h
--
1.7.4.4
^ permalink raw reply
* [PATCH 1/2] ARM: EXYNOS4: Add SPI support
From: Padmavathi Venna @ 2011-09-30 11:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317382780-3083-1-git-send-email-padma.v@samsung.com>
Define SPI platform devices.
Register SPI bus clock with clkdev using generic
connection id.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
arch/arm/mach-exynos4/Kconfig | 1 +
arch/arm/mach-exynos4/Makefile | 1 +
arch/arm/mach-exynos4/clock.c | 82 +++++---
arch/arm/mach-exynos4/dev-spi.c | 225 ++++++++++++++++++++++
arch/arm/mach-exynos4/include/mach/irqs.h | 3 +
arch/arm/mach-exynos4/include/mach/map.h | 3 +
arch/arm/mach-exynos4/include/mach/spi-clocks.h | 16 ++
arch/arm/plat-samsung/include/plat/devs.h | 3 +
arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | 1 +
9 files changed, 305 insertions(+), 30 deletions(-)
create mode 100644 arch/arm/mach-exynos4/dev-spi.c
create mode 100644 arch/arm/mach-exynos4/include/mach/spi-clocks.h
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index d0491c2..96b2511 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -154,6 +154,7 @@ config MACH_SMDKV310
select EXYNOS4_SETUP_KEYPAD
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
+ select S3C64XX_DEV_SPI
help
Machine support for Samsung SMDKV310
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index e19cd12..7376869 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o
obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o
obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
+obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o
obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index a25c818..2497176 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -1152,36 +1152,6 @@ static struct clksrc_clk clksrcs[] = {
.reg_div = { .reg = S5P_CLKDIV_LCD0, .shift = 0, .size = 4 },
}, {
.clk = {
- .name = "sclk_spi",
- .devname = "s3c64xx-spi.0",
- .enable = exynos4_clksrc_mask_peril1_ctrl,
- .ctrlbit = (1 << 16),
- },
- .sources = &clkset_group,
- .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 16, .size = 4 },
- .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 0, .size = 4 },
- }, {
- .clk = {
- .name = "sclk_spi",
- .devname = "s3c64xx-spi.1",
- .enable = exynos4_clksrc_mask_peril1_ctrl,
- .ctrlbit = (1 << 20),
- },
- .sources = &clkset_group,
- .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 20, .size = 4 },
- .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 16, .size = 4 },
- }, {
- .clk = {
- .name = "sclk_spi",
- .devname = "s3c64xx-spi.2",
- .enable = exynos4_clksrc_mask_peril1_ctrl,
- .ctrlbit = (1 << 24),
- },
- .sources = &clkset_group,
- .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 24, .size = 4 },
- .reg_div = { .reg = S5P_CLKDIV_PERIL2, .shift = 0, .size = 4 },
- }, {
- .clk = {
.name = "sclk_fimg2d",
},
.sources = &clkset_mout_g2d,
@@ -1242,6 +1212,53 @@ static struct clksrc_clk clksrcs[] = {
}
};
+static struct clksrc_clk sclk_spi0 = {
+ .clk = {
+ .name = "sclk_spi",
+ .devname = "s3c64xx-spi.0",
+ .enable = exynos4_clksrc_mask_peril1_ctrl,
+ .ctrlbit = (1 << 16),
+ },
+ .sources = &clkset_group,
+ .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 16, .size = 4 },
+ .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk sclk_spi1 = {
+ .clk = {
+ .name = "sclk_spi",
+ .devname = "s3c64xx-spi.1",
+ .enable = exynos4_clksrc_mask_peril1_ctrl,
+ .ctrlbit = (1 << 20),
+ },
+ .sources = &clkset_group,
+ .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 20, .size = 4 },
+ .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 16, .size = 4 },
+};
+static struct clksrc_clk sclk_spi2 = {
+ .clk = {
+ .name = "sclk_spi",
+ .devname = "s3c64xx-spi.2",
+ .enable = exynos4_clksrc_mask_peril1_ctrl,
+ .ctrlbit = (1 << 24),
+ },
+ .sources = &clkset_group,
+ .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 24, .size = 4 },
+ .reg_div = { .reg = S5P_CLKDIV_PERIL2, .shift = 0, .size = 4 },
+};
+
+static struct clk_lookup clk_lookup_table[] = {
+ CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk0", sclk_spi0.clk)
+ CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk0", sclk_spi1.clk)
+ CLKDEV_INIT("s3c64xx-spi.2", "spi_busclk0", sclk_spi2.clk)
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+ &sclk_spi0,
+ &sclk_spi1,
+ &sclk_spi2,
+};
+
/* Clock initialization code */
static struct clksrc_clk *sysclks[] = {
&clk_mout_apll,
@@ -1480,6 +1497,9 @@ void __init exynos4_register_clocks(void)
for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
s3c_register_clksrc(sysclks[ptr], 1);
+ for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+ s3c_register_clksrc(clksrc_cdev[ptr], 1);
+
for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++)
s3c_register_clksrc(sclk_tv[ptr], 1);
@@ -1493,4 +1513,6 @@ void __init exynos4_register_clocks(void)
s3c24xx_register_clock(&dummy_apb_pclk);
s3c_pwmclk_init();
+
+ clkdev_add_table(clk_lookup_table, ARRAY_SIZE(clk_lookup_table));
}
diff --git a/arch/arm/mach-exynos4/dev-spi.c b/arch/arm/mach-exynos4/dev-spi.c
new file mode 100644
index 0000000..0c9704d
--- /dev/null
+++ b/arch/arm/mach-exynos4/dev-spi.c
@@ -0,0 +1,225 @@
+/* linux/arch/arm/mach-exynos4/dev-spi.c
+ *
+ * Copyright (C) 2011 Samsung Electronics Co. Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/gpio.h>
+
+#include <mach/dma.h>
+#include <mach/map.h>
+#include <mach/irqs.h>
+#include <mach/spi-clocks.h>
+
+#include <plat/s3c64xx-spi.h>
+#include <plat/gpio-cfg.h>
+
+/* SPI Controller platform_devices */
+
+/* Since we emulate multi-cs capability, we do not touch the CS.
+ * The emulated CS is toggled by board specific mechanism, as it can
+ * be either some immediate GPIO or some signal out of some other
+ * chip in between ... or some yet another way.
+ * We simply do not assume anything about CS.
+ */
+static int exynos4_spi_cfg_gpio(struct platform_device *pdev)
+{
+ switch (pdev->id) {
+ case 0:
+ s3c_gpio_cfgpin(EXYNOS4_GPB(0), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(EXYNOS4_GPB(0), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgall_range(EXYNOS4_GPB(2), 2,
+ S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+ break;
+
+ case 1:
+ s3c_gpio_cfgpin(EXYNOS4_GPB(4), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(EXYNOS4_GPB(4), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgall_range(EXYNOS4_GPB(6), 2,
+ S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+ break;
+
+ case 2:
+ s3c_gpio_cfgpin(EXYNOS4_GPC1(1), S3C_GPIO_SFN(5));
+ s3c_gpio_setpull(EXYNOS4_GPC1(1), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgall_range(EXYNOS4_GPC1(3), 2,
+ S3C_GPIO_SFN(5), S3C_GPIO_PULL_UP);
+ break;
+
+ default:
+ dev_err(&pdev->dev, "Invalid SPI Controller number!");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static struct resource exynos4_spi0_resource[] = {
+ [0] = {
+ .start = EXYNOS4_PA_SPI0,
+ .end = EXYNOS4_PA_SPI0 + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMACH_SPI0_TX,
+ .end = DMACH_SPI0_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMACH_SPI0_RX,
+ .end = DMACH_SPI0_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .start = IRQ_SPI0,
+ .end = IRQ_SPI0,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct s3c64xx_spi_info exynos4_spi0_pdata = {
+ .cfg_gpio = exynos4_spi_cfg_gpio,
+ .fifo_lvl_mask = 0x1ff,
+ .rx_lvl_offset = 15,
+ .high_speed = 1,
+ .clk_from_cmu = true,
+ .tx_st_done = 25,
+};
+
+static u64 spi_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device exynos4_device_spi0 = {
+ .name = "s3c64xx-spi",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(exynos4_spi0_resource),
+ .resource = exynos4_spi0_resource,
+ .dev = {
+ .dma_mask = &spi_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &exynos4_spi0_pdata,
+ },
+};
+
+static struct resource exynos4_spi1_resource[] = {
+ [0] = {
+ .start = EXYNOS4_PA_SPI1,
+ .end = EXYNOS4_PA_SPI1 + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMACH_SPI1_TX,
+ .end = DMACH_SPI1_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMACH_SPI1_RX,
+ .end = DMACH_SPI1_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .start = IRQ_SPI1,
+ .end = IRQ_SPI1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct s3c64xx_spi_info exynos4_spi1_pdata = {
+ .cfg_gpio = exynos4_spi_cfg_gpio,
+ .fifo_lvl_mask = 0x7f,
+ .rx_lvl_offset = 15,
+ .high_speed = 1,
+ .clk_from_cmu = true,
+ .tx_st_done = 25,
+};
+
+struct platform_device exynos4_device_spi1 = {
+ .name = "s3c64xx-spi",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(exynos4_spi1_resource),
+ .resource = exynos4_spi1_resource,
+ .dev = {
+ .dma_mask = &spi_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &exynos4_spi1_pdata,
+ },
+};
+
+static struct resource exynos4_spi2_resource[] = {
+ [0] = {
+ .start = EXYNOS4_PA_SPI2,
+ .end = EXYNOS4_PA_SPI2 + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMACH_SPI2_TX,
+ .end = DMACH_SPI2_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMACH_SPI2_RX,
+ .end = DMACH_SPI2_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .start = IRQ_SPI2,
+ .end = IRQ_SPI2,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct s3c64xx_spi_info exynos4_spi2_pdata = {
+ .cfg_gpio = exynos4_spi_cfg_gpio,
+ .fifo_lvl_mask = 0x7f,
+ .rx_lvl_offset = 15,
+ .high_speed = 1,
+ .clk_from_cmu = true,
+ .tx_st_done = 25,
+};
+
+struct platform_device exynos4_device_spi2 = {
+ .name = "s3c64xx-spi",
+ .id = 2,
+ .num_resources = ARRAY_SIZE(exynos4_spi2_resource),
+ .resource = exynos4_spi2_resource,
+ .dev = {
+ .dma_mask = &spi_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &exynos4_spi2_pdata,
+ },
+};
+
+void __init exynos4_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
+{
+ struct s3c64xx_spi_info *pd;
+
+ /* Reject invalid configuration */
+ if (!num_cs || src_clk_nr < 0
+ || src_clk_nr > EXYNOS4_SPI_SRCCLK_SCLK) {
+ printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
+ return;
+ }
+
+ switch (cntrlr) {
+ case 0:
+ pd = &exynos4_spi0_pdata;
+ break;
+ case 1:
+ pd = &exynos4_spi1_pdata;
+ break;
+ case 2:
+ pd = &exynos4_spi2_pdata;
+ break;
+ default:
+ printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
+ __func__, cntrlr);
+ return;
+ }
+
+ pd->num_cs = num_cs;
+ pd->src_clk_nr = src_clk_nr;
+}
diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h
index 62093b9..a9f0341 100644
--- a/arch/arm/mach-exynos4/include/mach/irqs.h
+++ b/arch/arm/mach-exynos4/include/mach/irqs.h
@@ -70,6 +70,9 @@
#define IRQ_IIC5 IRQ_SPI(63)
#define IRQ_IIC6 IRQ_SPI(64)
#define IRQ_IIC7 IRQ_SPI(65)
+#define IRQ_SPI0 IRQ_SPI(66)
+#define IRQ_SPI1 IRQ_SPI(67)
+#define IRQ_SPI2 IRQ_SPI(68)
#define IRQ_USB_HOST IRQ_SPI(70)
#define IRQ_USB_HSOTG IRQ_SPI(71)
diff --git a/arch/arm/mach-exynos4/include/mach/map.h b/arch/arm/mach-exynos4/include/mach/map.h
index 1bea7d1..8dd509e 100644
--- a/arch/arm/mach-exynos4/include/mach/map.h
+++ b/arch/arm/mach-exynos4/include/mach/map.h
@@ -88,6 +88,9 @@
#define EXYNOS4_PA_SYSMMU_TV 0x12E20000
#define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000
#define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000
+#define EXYNOS4_PA_SPI0 0x13920000
+#define EXYNOS4_PA_SPI1 0x13930000
+#define EXYNOS4_PA_SPI2 0x13940000
#define EXYNOS4_PA_GPIO1 0x11400000
#define EXYNOS4_PA_GPIO2 0x11000000
diff --git a/arch/arm/mach-exynos4/include/mach/spi-clocks.h b/arch/arm/mach-exynos4/include/mach/spi-clocks.h
new file mode 100644
index 0000000..576efdf
--- /dev/null
+++ b/arch/arm/mach-exynos4/include/mach/spi-clocks.h
@@ -0,0 +1,16 @@
+/* linux/arch/arm/mach-exynos4/include/mach/spi-clocks.h
+ *
+ * Copyright (C) 2011 Samsung Electronics Co. Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_SPI_CLKS_H
+#define __ASM_ARCH_SPI_CLKS_H __FILE__
+
+/* Must source from SCLK_SPI */
+#define EXYNOS4_SPI_SRCCLK_SCLK 0
+
+#endif /* __ASM_ARCH_SPI_CLKS_H */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index ee5014a..7949131 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -84,6 +84,9 @@ extern struct platform_device s5pv210_device_spi0;
extern struct platform_device s5pv210_device_spi1;
extern struct platform_device s5p64x0_device_spi0;
extern struct platform_device s5p64x0_device_spi1;
+extern struct platform_device exynos4_device_spi0;
+extern struct platform_device exynos4_device_spi1;
+extern struct platform_device exynos4_device_spi2;
extern struct platform_device s3c_device_hwmon;
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index c3d82a5..1ec1ea3 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -69,5 +69,6 @@ extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
extern void s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
+extern void exynos4_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
#endif /* __S3C64XX_PLAT_SPI_H */
--
1.7.4.4
^ permalink raw reply related
* [PATCH 2/2] SPI: EXYNOS4: Enable the SPI driver for EXYNOS4
From: Padmavathi Venna @ 2011-09-30 11:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317382780-3083-1-git-send-email-padma.v@samsung.com>
The SPI module on EXYNOS4 is similar to the earlier Samsung SoCs like
S3C64XX. Enable the existing SPI driver for use on EXYNOS4.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
drivers/spi/Kconfig | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 52e2900..f3649f6 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -300,7 +300,7 @@ config SPI_S3C24XX_FIQ
config SPI_S3C64XX
tristate "Samsung S3C64XX series type SPI"
- depends on (ARCH_S3C64XX || ARCH_S5P64X0)
+ depends on ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS4
select S3C64XX_DMA if ARCH_S3C64XX
help
SPI driver for Samsung S3C64XX and newer SoCs.
--
1.7.4.4
^ permalink raw reply related
* [PATCH 02/13] gpio/omap: Adapt GPIO driver to DT
From: Cousson, Benoit @ 2011-09-30 11:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4E8161C7.7020404@ti.com>
Second thought... I was too fast to say OK :-)
On 9/27/2011 7:40 AM, Nayak, Rajendra wrote:
> On Monday 26 September 2011 10:20 PM, Benoit Cousson wrote:
[...]
>> + if (match) {
>> + of_property_read_u32(node, "bank-width",&bank->width);
>
> Bank width should be u32.
I guess you meant bank->width, and it appears that bank->width is
already a u32.
Regards,
Benoit
^ permalink raw reply
* [PATCH] arm/imx: rename MX51_MXC_INT_ATA to MX51_INT_ATA
From: Shawn Guo @ 2011-09-30 12:05 UTC (permalink / raw)
To: linux-arm-kernel
This change is to fix the compile error below.
CC arch/arm/plat-mxc/devices/platform-pata_imx.o
arch/arm/plat-mxc/devices/platform-pata_imx.c:33:1: error: ?MX51_INT_ATA? undeclared here (not in a function)
make[3]: *** [arch/arm/plat-mxc/devices/platform-pata_imx.o] Error 1
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
Sascha,
This is a compile error seen on your imx-features branch.
arch/arm/plat-mxc/include/mach/mx51.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index dede19a..0d4aa9e 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -311,7 +311,7 @@
#define MX51_MXC_INT_SIM_IPB 67
#define MX51_MXC_INT_SIM_DAT 68
#define MX51_MXC_INT_IIM 69
-#define MX51_MXC_INT_ATA 70
+#define MX51_INT_ATA 70
#define MX51_MXC_INT_CCM1 71
#define MX51_MXC_INT_CCM2 72
#define MX51_MXC_INT_GPC1 73
--
1.7.4.1
^ permalink raw reply related
* [PATCH v2 3/5] iommu/exynos: Add iommu driver for Exynos4 Platforms
From: Roedel, Joerg @ 2011-09-30 12:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <016e01cc7f42$f92bfb40$eb83f1c0$%kim@samsung.com>
On Fri, Sep 30, 2011 at 03:31:30AM -0400, Kukjin Kim wrote:
> From: KyongHo Cho <pullip.cho@samsung.com>
>
> This is the System MMU driver and IOMMU API implementation for
> Exynos4 SOC platforms. Exynos4 platforms has more than 10 System
> MMUs dedicated for each multimedia accellerators.
>
> Signed-off-by: KyongHo Cho <pullip.cho@samsung.com>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
First comment: Pleas remove the 'inline' annotations in this patch. It
is better to let the compiler decide what to inline and what not.
> ---
> drivers/iommu/Kconfig | 14 +
> drivers/iommu/Makefile | 1 +
> drivers/iommu/exynos_iommu.c | 914 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 929 insertions(+), 0 deletions(-)
> create mode 100644 drivers/iommu/exynos_iommu.c
> +
> +static inline struct sysmmu_drvdata *get_sysmmu_data(struct device *owner,
> + struct sysmmu_drvdata *start)
> +{
> + struct list_head *pos, *head;
> +
> + head = (start) ? &start->node : &sysmmu_list;
> +
> + list_for_each(pos, head) {
> + struct sysmmu_drvdata *data =
> + container_of(pos, struct sysmmu_drvdata, node);
> +
> + if (pos == &sysmmu_list)
> + return NULL;
> +
> + if (data->owner == owner)
> + return data;
> + }
> +
> + return NULL;
> +}
Hmm, may it make sense to store data directly in dev->arch.iommu? This
will save you the list traversals to get the information.
> +
> +static inline bool set_sysmmu_active(struct sysmmu_drvdata *data)
> +{
> + /* return true if the System MMU was not active previously
> + and it needs to be initialized */
> +
> + data->activations++;
Is this variable only accessed under a lock? If not it should be an
atomic.
> + return data->activations == 1;
Is that right? Shouldn't it be 'data->activations > 0'?
> +}
> +
> +static inline bool set_sysmmu_inactive(struct sysmmu_drvdata *data)
> +{
> + /* return true if the System MMU is needed to be disabled */
> + data->activations--;
> +
> + if (data->activations == 0)
> + return true;
> +
> + if (WARN_ON(data->activations < 0))
> + /* System MMU is already disabled */
> + data->activations = 0;
> +
> + return false;
> +}
> +
> +static inline bool is_sysmmu_active(struct sysmmu_drvdata *data)
> +{
> + return data->activations != 0;
> +}
> +
> +static inline void sysmmu_block(void __iomem *sfrbase)
> +{
> + __raw_writel(CTRL_BLOCK, sfrbase + S5P_MMU_CTRL);
> +}
> +
> +static inline void sysmmu_unblock(void __iomem *sfrbase)
> +{
> + __raw_writel(CTRL_ENABLE, sfrbase + S5P_MMU_CTRL);
> +}
> +
> +static inline void __sysmmu_tlb_invalidate(void __iomem *sfrbase)
> +{
> + __raw_writel(0x1, sfrbase + S5P_MMU_FLUSH);
> +}
> +
> +static inline void __sysmmu_set_ptbase(void __iomem *sfrbase,
> + unsigned long pgd)
> +{
> + if (unlikely(pgd == 0)) {
> + pgd = (unsigned long)ZERO_PAGE(0);
> + __raw_writel(0x20, sfrbase + S5P_MMU_CFG); /* 4KB LV1 */
> + } else {
> + __raw_writel(0x0, sfrbase + S5P_MMU_CFG); /* 16KB LV1 */
> + }
> +
> + __raw_writel(pgd, sfrbase + S5P_PT_BASE_ADDR);
> +
> + __sysmmu_tlb_invalidate(sfrbase);
> +}
> +
> +static inline void __set_fault_handler(struct sysmmu_drvdata *data,
> + int (*handler)(enum S5P_SYSMMU_INTERRUPT_TYPE itype,
> + unsigned long pgtable_base,
> + unsigned long fault_addr))
Please typedef the function signature.
> +{
> + data->fault_handler = handler;
> +}
> +
> +void s5p_sysmmu_set_fault_handler(struct device *owner,
> + int (*handler)(enum S5P_SYSMMU_INTERRUPT_TYPE itype,
> + unsigned long pgtable_base,
> + unsigned long fault_addr))
> +{
> + struct sysmmu_drvdata *data = NULL;
> +
> + while ((data = get_sysmmu_data(owner, data)))
> + __set_fault_handler(data, handler);
> +}
> +
> +static int default_fault_handler(enum S5P_SYSMMU_INTERRUPT_TYPE itype,
> + unsigned long pgtable_base, unsigned long fault_addr)
> +{
> + if ((itype > SYSMMU_FAULTS_NUM) || (itype < SYSMMU_PAGEFAULT))
> + itype = SYSMMU_FAULTS_NUM;
> +
> + pr_err("%s occured at 0x%08lx(Page table base: 0x%08lx)\n",
> + sysmmu_fault_name[itype], fault_addr, pgtable_base);
> + pr_err("\t\tGenerating Kernel OOPS... because it is unrecoverable.\n");
> +
> + BUG();
> +
> + return 0;
> +}
> +
> +static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id)
> +{
> + /* SYSMMU is in blocked when interrupt occurred. */
> + struct sysmmu_drvdata *data = dev_id;
> + enum S5P_SYSMMU_INTERRUPT_TYPE itype;
> + bool handled = false;
> +
> + WARN_ON(!is_sysmmu_active(data));
> +
> + itype = (enum S5P_SYSMMU_INTERRUPT_TYPE)
> + __ffs(__raw_readl(data->sfrbase + S5P_INT_STATUS));
> +
> + if (WARN_ON((itype < 0) && (itype >= 8))) {
> + itype = SYSMMU_FAULT_UNKNOWN;
> + } else if (data->fault_handler) {
> + unsigned long base;
> + unsigned long addr;
> + addr = __raw_readl(data->sfrbase + fault_reg_offset[itype]);
> + base = __raw_readl(data->sfrbase + S5P_PT_BASE_ADDR);
> +
> + if (!data->fault_handler(itype, base, addr))
> + handled = true;
> + }
> +
> + if (handled)
> + __raw_writel(1 << itype, data->sfrbase + S5P_INT_CLEAR);
> + else
> + dev_dbg(data->dev, "%s is not handled.\n",
> + sysmmu_fault_name[itype]);
> +
> + sysmmu_unblock(data->sfrbase);
> +
> + return IRQ_HANDLED;
> +}
> +
> +void exynos_sysmmu_set_tablebase_pgd(struct device *owner, unsigned long pgd)
> +{
> + struct sysmmu_drvdata *data = NULL;
> +
> + while ((data = get_sysmmu_data(owner, data))) {
> + if (is_sysmmu_active(data)) {
> + sysmmu_block(data->sfrbase);
> + __sysmmu_set_ptbase(data->sfrbase, pgd);
> + sysmmu_unblock(data->sfrbase);
> + dev_dbg(data->dev,
> + "New page table base is 0x%08lx\n", pgd);
> + } else {
> + dev_dbg(data->dev,
> + "Disabled: Skipping setting page table base.\n");
> + }
> + }
> +}
> +
> +static int __exynos_sysmmu_enable(struct device *owner, unsigned long pgtable,
> + struct iommu_domain *domain)
> +{
> + struct sysmmu_drvdata *data = NULL;
> + bool enabled = false;
> +
> + /* There are some devices that control more System MMUs than one such
> + * as MFC.
> + */
> + while ((data = get_sysmmu_data(owner, data))) {
> + enabled = true;
> +
> + if (!set_sysmmu_active(data)) {
> + dev_dbg(data->dev, "Already enabled.\n");
> + continue;
> + }
> +
> + pm_runtime_get_sync(data->dev);
> +
> + clk_enable(data->clk);
> +
> + __sysmmu_set_ptbase(data->sfrbase, pgtable);
> +
> + __raw_writel(CTRL_ENABLE, data->sfrbase + S5P_MMU_CTRL);
> +
> + data->domain = domain;
> +
> + dev_dbg(data->dev, "Enabled.\n");
> + }
> +
> + return (enabled) ? 0 : -ENODEV;
> +}
> +
> +static inline int exynos_iommu_enable(struct iommu_domain *domain)
> +{
> + struct exynos_iommu_domain *priv = domain->priv;
> +
> + if (!priv || !priv->dev)
> + return -EINVAL;
> +
> + return __exynos_sysmmu_enable(priv->dev, __pa(priv->pgtable), domain);
> +}
> +
> +int exynos_sysmmu_enable(struct device *owner, unsigned long pgtable)
> +{
> + return __exynos_sysmmu_enable(owner, pgtable, NULL);
> +}
> +
> +void exynos_sysmmu_disable(struct device *owner)
> +{
> + struct sysmmu_drvdata *data = NULL;
> + bool disabled = false;
> +
> + while ((data = get_sysmmu_data(owner, data))) {
> + disabled = true;
> +
> + if (!set_sysmmu_inactive(data)) {
> + dev_dbg(data->dev, "Inactivation request ignorred\n");
> + continue;
> + }
> +
> + __raw_writel(CTRL_DISABLE, data->sfrbase + S5P_MMU_CTRL);
> +
> + clk_disable(data->clk);
> +
> + pm_runtime_put_sync(data->dev);
> +
> + data->domain = NULL;
> +
> + dev_dbg(data->dev, "Disabled.\n");
> + }
> +
> + BUG_ON(!disabled);
> +}
> +
> +static inline void exynos_iommu_disable(struct iommu_domain *domain)
> +{
> + struct exynos_iommu_domain *priv = domain->priv;
> +
> + if (priv && priv->dev)
> + exynos_sysmmu_disable(priv->dev);
> +}
> +
> +void exynos_sysmmu_tlb_invalidate(struct device *owner)
> +{
> + struct sysmmu_drvdata *data = NULL;
> +
> + while ((data = get_sysmmu_data(owner, data))) {
> + if (is_sysmmu_active(data)) {
> + sysmmu_block(data->sfrbase);
> + __sysmmu_tlb_invalidate(data->sfrbase);
> + sysmmu_unblock(data->sfrbase);
> + } else {
> + dev_dbg(data->dev,
> + "Disabled: Skipping invalidating TLB.\n");
> + }
> + }
> +}
> +
> +static int exynos_sysmmu_probe(struct platform_device *pdev)
> +{
> + struct resource *res, *ioarea;
> + int ret = 0;
> + int irq;
> + struct device *dev;
> + void *sfr;
> + struct sysmmu_drvdata *data;
> + struct clk *clk;
> +
> + dev = &pdev->dev;
> +
> + data = kzalloc(GFP_KERNEL, sizeof(*data));
> + if (!data) {
> + dev_err(dev, "Failed to probing System MMU: "
> + "Not enough memory");
> + return -ENOMEM;
> + }
> +
> + if (!dev_get_platdata(dev)) {
> + dev_err(dev, "Failed to probing system MMU: "
> + "Owner device is not set.");
> +
> + ret = -ENODEV;
> + goto err_init;
> + }
> +
> + ret = dev_set_drvdata(dev, data);
> + if (ret) {
> + dev_err(dev, "Failed to probing system MMU: "
> + "Unable to set driver data.");
> + goto err_init;
> + }
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!res) {
> + dev_err(dev,
> + "Failed probing system MMU: failed to get resource.");
> + ret = -ENOENT;
> + goto err_init;
> + }
> +
> + ioarea = request_mem_region(res->start, resource_size(res), pdev->name);
> + if (ioarea == NULL) {
> + dev_err(dev, "Failed probing system MMU: "
> + "failed to request memory region.");
> + ret = -ENOENT;
> + goto err_init;
> + }
> +
> + sfr = ioremap(res->start, resource_size(res));
> + if (!sfr) {
> + dev_err(dev, "Failed probing system MMU: "
> + "failed to call ioremap().");
> + ret = -ENOENT;
> + goto err_ioremap;
> + }
> +
> + irq = platform_get_irq(pdev, 0);
> + if (irq <= 0) {
> + dev_err(dev, "Failed probing system MMU: "
> + "failed to get irq resource.");
> + ret = irq;
> + goto err_irq;
> + }
> +
> + ret = request_irq(irq, exynos_sysmmu_irq, 0, dev_name(dev), data);
> + if (ret) {
> + dev_err(dev, "Failed probing system MMU: "
> + "failed to request irq.");
> + goto err_irq;
> + }
> +
> + clk = clk_get(dev, "sysmmu");
> + if (IS_ERR(clk)) {
> + dev_err(dev, "Failed to probing System MMU: "
> + "failed to get clock descriptor");
> + ret = PTR_ERR(clk);
> + goto err_clk;
> + }
> +
> + data->dev = dev;
> + data->owner = dev_get_platdata(dev);
> + data->clk = clk;
> + data->sfrbase = sfr;
> + data->fault_handler = &default_fault_handler;
> + INIT_LIST_HEAD(&data->node);
> +
> + list_add(&data->node, &sysmmu_list);
> +
> + if (dev->parent)
> + pm_runtime_enable(dev);
> +
> + dev_dbg(dev, "Initialized for %s.\n", dev_name(data->owner));
> + return 0;
> +err_clk:
> + free_irq(irq, data);
> +err_irq:
> + iounmap(sfr);
> +err_ioremap:
> + release_resource(ioarea);
> + kfree(ioarea);
> +err_init:
> + kfree(data);
> + dev_err(dev, "Probing system MMU failed.");
> + return ret;
> +}
> +
> +int exynos_sysmmu_runtime_suspend(struct device *dev)
> +{
> + if (WARN_ON(is_sysmmu_active(dev_get_drvdata(dev))))
> + return -EFAULT;
> +
> + return 0;
> +}
> +
> +int exynos_sysmmu_runtime_resume(struct device *dev)
> +{
> + if (WARN_ON(is_sysmmu_active(dev_get_drvdata(dev))))
> + return -EFAULT;
> +
> + return 0;
> +}
> +
> +const struct dev_pm_ops exynos_sysmmu_pm_ops = {
> + .runtime_suspend = exynos_sysmmu_runtime_suspend,
> + .runtime_resume = exynos_sysmmu_runtime_resume,
> +};
> +
> +static struct platform_driver exynos_sysmmu_driver = {
> + .probe = exynos_sysmmu_probe,
> + .driver = {
> + .owner = THIS_MODULE,
> + .name = "s5p-sysmmu",
> + .pm = &exynos_sysmmu_pm_ops,
> + }
> +};
> +
> +static int __init exynos_sysmmu_init(void)
> +{
> + return platform_driver_register(&exynos_sysmmu_driver);
> +}
> +arch_initcall(exynos_sysmmu_init);
> +
> +/* We does not consider super section mapping (16MB) */
> +#define S5P_SPAGE_SHIFT 12
> +#define S5P_LPAGE_SHIFT 16
> +#define S5P_SECTION_SHIFT 20
> +
> +#define S5P_SPAGE_SIZE (1 << S5P_SPAGE_SHIFT)
> +#define S5P_LPAGE_SIZE (1 << S5P_LPAGE_SHIFT)
> +#define S5P_SECTION_SIZE (1 << S5P_SECTION_SHIFT)
> +
> +#define S5P_SPAGE_MASK (~(S5P_SPAGE_SIZE - 1))
> +#define S5P_LPAGE_MASK (~(S5P_LPAGE_SIZE - 1))
> +#define S5P_SECTION_MASK (~(S5P_SECTION_SIZE - 1))
> +
> +#define S5P_SPAGE_ORDER (S5P_SPAGE_SHIFT - PAGE_SHIFT)
> +#define S5P_LPAGE_ORDER (S5P_LPAGE_SHIFT - S5P_SPAGE_SHIFT)
> +#define S5P_SECTION_ORDER (S5P_SECTION_SHIFT - S5P_SPAGE_SHIFT)
> +
> +#define S5P_LV1TABLE_ENTRIES (1 << (BITS_PER_LONG - S5P_SECTION_SHIFT))
> +
> +#define S5P_LV2TABLE_ENTRIES (1 << S5P_SECTION_ORDER)
> +#define S5P_LV2TABLE_SIZE (S5P_LV2TABLE_ENTRIES * sizeof(long))
> +#define S5P_LV2TABLE_MASK (~(S5P_LV2TABLE_SIZE - 1)) /* 0xFFFFFC00 */
> +
> +#define S5P_SECTION_LV1_ENTRY(entry) ((entry & 0x40003) == 2)
> +#define S5P_SUPSECT_LV1_ENTRY(entry) ((entry & 0x40003) == 0x40002)
> +#define S5P_PAGE_LV1_ENTRY(entry) ((entry & 3) == 1)
> +#define S5P_FAULT_LV1_ENTRY(entry) (((entry & 3) == 0) || (entry & 3) == 3)
> +
> +#define S5P_LPAGE_LV2_ENTRY(entry) ((entry & 3) == 1)
> +#define S5P_SPAGE_LV2_ENTRY(entry) ((entry & 2) == 2)
> +#define S5P_FAULT_LV2_ENTRY(entry) ((entry & 3) == 0)
> +
> +#define MAKE_FAULT_ENTRY(entry) do { entry = 0; } while (0)
> +#define MAKE_SECTION_ENTRY(entry, pa) do { entry = pa | 2; } while (0)
> +#define MAKE_SUPSECT_ENTRY(entry, pa) do { entry = pa | 0x40002; } while (0)
> +#define MAKE_LV2TABLE_ENTRY(entry, pa) do { entry = pa | 1; } while (0)
> +
> +#define MAKE_LPAGE_ENTRY(entry, pa) do { entry = pa | 1; } while (0)
> +#define MAKE_SPAGE_ENTRY(entry, pa) do { entry = pa | 3; } while (0)
> +
> +#define GET_LV2ENTRY(entry, iova) (\
> + (unsigned long *)phys_to_virt(entry & S5P_LV2TABLE_MASK) +\
> + ((iova & (~S5P_SECTION_MASK)) >> S5P_SPAGE_SHIFT))
> +
> +/* slab cache for level 2 page tables */
> +static struct kmem_cache *l2table_cachep;
> +
> +static inline void pgtable_flush(void *vastart, void *vaend)
> +{
> + dmac_flush_range(vastart, vaend);
> + outer_flush_range(virt_to_phys(vastart),
> + virt_to_phys(vaend));
> +}
> +
> +static int exynos_iommu_domain_init(struct iommu_domain *domain)
> +{
> + struct exynos_iommu_domain *priv;
> +
> + priv = kzalloc(sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + priv->pgtable = (unsigned long *)__get_free_pages(GFP_KERNEL,
> + (S5P_LV1TABLE_ENTRIES * sizeof(unsigned long)) >> PAGE_SHIFT);
For __get_free_pages you can't just pass in the number of pages, you
need the order. Please use get_order.
> + if (!priv->pgtable) {
> + kfree(priv);
> + return -ENOMEM;
> + }
> +
> + memset(priv->pgtable, 0, S5P_LV1TABLE_ENTRIES * sizeof(unsigned long));
> + pgtable_flush(priv->pgtable, priv->pgtable + S5P_LV1TABLE_ENTRIES);
> +
> + spin_lock_init(&priv->lock);
No init for the page-table lock?
> +
> + domain->priv = priv;
> +
> + iommu_set_fault_handler(domain, &exynos_iommu_fault_handler);
> +
> + return 0;
> +}
> +
> +static void exynos_iommu_domain_destroy(struct iommu_domain *domain)
> +{
> + struct exynos_iommu_domain *priv = domain->priv;
> +
> + free_pages((unsigned long)priv->pgtable,
> + (S5P_LV1TABLE_ENTRIES * sizeof(unsigned long)) >> PAGE_SHIFT);
Same here, please use get_order.
> +
> + kfree(priv);
> +
> + domain->priv = NULL;
> +}
> +
> +static int exynos_iommu_attach_device(struct iommu_domain *domain,
> + struct device *dev)
> +{
> + struct exynos_iommu_domain *priv = domain->priv;
> + int ret;
> +
> + spin_lock(&priv->lock);
> +
> + priv->dev = dev;
> +
> + ret = exynos_iommu_enable(domain);
> +
> + spin_unlock(&priv->lock);
> +
> + return ret;
> +}
> +
> +static void exynos_iommu_detach_device(struct iommu_domain *domain,
> + struct device *dev)
> +{
> + struct exynos_iommu_domain *priv = domain->priv;
> +
> + spin_lock(&priv->lock);
> +
> + if (priv->dev == dev) {
> + exynos_iommu_disable(domain);
> + priv->dev = NULL;
> + }
> +
> + spin_unlock(&priv->lock);
> +}
> +
> +static bool section_available(struct iommu_domain *domain,
> + unsigned long *lv1entry)
> +{
> + struct exynos_iommu_domain *priv = domain->priv;
> +
> + if (S5P_SECTION_LV1_ENTRY(*lv1entry)) {
> + dev_err(priv->dev, "1MB entry alread exists at 0x%08x\n",
> + (lv1entry - priv->pgtable) * SZ_1M);
> + return false;
> + }
> +
> + if (S5P_PAGE_LV1_ENTRY(*lv1entry)) {
> + unsigned long *lv2end, *lv2base;
> +
> + lv2base = phys_to_virt(*lv1entry & S5P_LV2TABLE_MASK);
> + lv2end = lv2base + S5P_LV2TABLE_ENTRIES;
> + while (lv2base != lv2end) {
> + if (!S5P_FAULT_LV2_ENTRY(*lv2base)) {
> + dev_err(priv->dev, "Failed to free L2 page "
> + "table for section mapping.\n");
> + return false;
> + }
> + lv2base++;
> + }
> +
> + kmem_cache_free(l2table_cachep,
> + phys_to_virt(*lv1entry & S5P_LV2TABLE_MASK));
> +
> + MAKE_FAULT_ENTRY(*lv1entry);
> + }
> +
> + return true;
> +}
> +
> +static bool write_lpage(unsigned long *head_entry, unsigned long phys_addr)
> +{
> + unsigned long *entry, *end;
> +
> + entry = head_entry;
> + end = entry + (1 << S5P_LPAGE_ORDER);
> +
> + while (entry != end) {
> + if (!S5P_FAULT_LV2_ENTRY(*entry))
> + break;
> +
> + MAKE_LPAGE_ENTRY(*entry, phys_addr);
> +
> + entry++;
> + }
> +
> + if (entry != end) {
> + end = entry;
> + while (entry != head_entry)
> + MAKE_FAULT_ENTRY(*(--entry));
> +
> + return false;
> + }
> +
> + return true;
> +}
> +
> +static int exynos_iommu_map(struct iommu_domain *domain, unsigned long iova,
> + phys_addr_t paddr, int gfp_order, int prot)
> +{
> + struct exynos_iommu_domain *priv = domain->priv;
> + unsigned long *start_entry, *entry, *end_entry;
> + int num_entry;
> + int ret = 0;
> + unsigned long flags;
> +
> + BUG_ON(priv->pgtable == NULL);
> +
> + spin_lock_irqsave(&priv->pgtablelock, flags);
> +
> + start_entry = entry = priv->pgtable + (iova >> S5P_SECTION_SHIFT);
> +
> + if (gfp_order >= S5P_SECTION_ORDER) {
> + BUG_ON((paddr | iova) & ~S5P_SECTION_MASK);
> + /* 1MiB mapping */
> +
> + num_entry = 1 << (gfp_order - S5P_SECTION_ORDER);
> + end_entry = entry + num_entry;
> +
> + while (entry != end_entry) {
> + if (!section_available(domain, entry))
> + break;
> +
> + MAKE_SECTION_ENTRY(*entry, paddr);
> +
> + paddr += S5P_SECTION_SIZE;
> + entry++;
> + }
> +
> + if (entry != end_entry)
> + goto mapping_error;
> +
> + pgtable_flush(start_entry, entry);
> + goto mapping_done;
> + }
> +
> + if (S5P_FAULT_LV1_ENTRY(*entry)) {
> + unsigned long *l2table;
> +
> + l2table = kmem_cache_zalloc(l2table_cachep, GFP_KERNEL);
> + if (!l2table) {
> + ret = -ENOMEM;
> + goto nomem_error;
> + }
> +
> + pgtable_flush(entry, entry + S5P_LV2TABLE_ENTRIES);
> +
> + MAKE_LV2TABLE_ENTRY(*entry, virt_to_phys(l2table));
> + pgtable_flush(entry, entry + 1);
> + }
> +
> + /* 'entry' points level 2 entries, hereafter */
> + entry = GET_LV2ENTRY(*entry, iova);
> +
> + start_entry = entry;
> + num_entry = 1 << gfp_order;
> + end_entry = entry + num_entry;
> +
> + if (gfp_order >= S5P_LPAGE_ORDER) {
> + /* large page(64KiB) mapping */
> + BUG_ON((paddr | iova) & ~S5P_LPAGE_MASK);
> +
> + while (entry != end_entry) {
> + if (!write_lpage(entry, paddr)) {
> + pr_err("%s: "
> + "Failed to allocate large page entry."
> + "\n", __func__);
> + break;
> + }
> +
> + paddr += S5P_LPAGE_SIZE;
> + entry += (1 << S5P_LPAGE_ORDER);
> + }
> +
> + if (entry != end_entry) {
> + entry -= 1 << S5P_LPAGE_ORDER;
> + goto mapping_error;
> + }
> + } else {
> + /* page (4KiB) mapping */
> + while (entry != end_entry && S5P_FAULT_LV2_ENTRY(*entry)) {
> +
> + MAKE_SPAGE_ENTRY(*entry, paddr);
> +
> + entry++;
> + paddr += S5P_SPAGE_SIZE;
> + }
> +
> + if (entry != end_entry) {
> + pr_err("%s: Failed to allocate small page entry.\n",
> + __func__);
> + goto mapping_error;
> + }
> + }
> +
> + pgtable_flush(start_entry, entry);
> +mapping_error:
> + if (entry != end_entry) {
> + unsigned long *current_entry = entry;
> + while (entry != start_entry)
> + MAKE_FAULT_ENTRY(*(--entry));
> + pgtable_flush(start_entry, current_entry);
> + ret = -EADDRINUSE;
> + }
> +
> +nomem_error:
> +mapping_done:
> + spin_unlock_irqrestore(&priv->pgtablelock, flags);
> +
> + return 0;
> +}
> +
> +static int exynos_iommu_unmap(struct iommu_domain *domain, unsigned long iova,
> + int gfp_order)
> +{
> + struct exynos_iommu_domain *priv = domain->priv;
> + unsigned long *entry;
> + int num_entry;
> + unsigned long flags;
> +
> + BUG_ON(priv->pgtable == NULL);
> +
> + spin_lock_irqsave(&priv->pgtablelock, flags);
> +
> + entry = priv->pgtable + (iova >> S5P_SECTION_SHIFT);
> +
> + if (gfp_order >= S5P_SECTION_ORDER) {
> + gfp_order -= S5P_SECTION_ORDER;
> + num_entry = 1 << (gfp_order - S5P_SECTION_ORDER);
> + while (num_entry--) {
> + if (S5P_SECTION_LV1_ENTRY(*entry)) {
> + MAKE_FAULT_ENTRY(*entry);
> + } else if (S5P_PAGE_LV1_ENTRY(*entry)) {
> + unsigned long *lv2beg, *lv2end;
> + lv2beg = phys_to_virt(
> + *entry & S5P_LV2TABLE_MASK);
> + lv2end = lv2beg + S5P_LV2TABLE_ENTRIES;
> + while (lv2beg != lv2end) {
> + MAKE_FAULT_ENTRY(*lv2beg);
> + lv2beg++;
> + }
> + }
> + entry++;
> + }
> + } else {
> + entry = GET_LV2ENTRY(*entry, iova);
> +
> + BUG_ON(S5P_LPAGE_LV2_ENTRY(*entry) &&
> + (gfp_order < S5P_LPAGE_ORDER));
> +
> + num_entry = 1 << gfp_order;
> +
> + while (num_entry--) {
> + MAKE_FAULT_ENTRY(*entry);
> + entry++;
> + }
> + }
> +
> + if (priv->dev)
> + exynos_sysmmu_tlb_invalidate(priv->dev);
> +
> + spin_unlock_irqrestore(&priv->pgtablelock, flags);
> +
> + return 0;
> +}
> +
> +static phys_addr_t exynos_iommu_iova_to_phys(struct iommu_domain *domain,
> + unsigned long iova)
> +{
> + struct exynos_iommu_domain *priv = domain->priv;
> + unsigned long *entry;
> + unsigned long offset;
> +
> + entry = priv->pgtable + (iova >> S5P_SECTION_SHIFT);
> +
> + if (S5P_FAULT_LV1_ENTRY(*entry))
> + return 0;
> +
> + offset = iova & ~S5P_SECTION_MASK;
> +
> + if (S5P_SECTION_LV1_ENTRY(*entry))
> + return (*entry & S5P_SECTION_MASK) + offset;
> +
> + entry = GET_LV2ENTRY(*entry, iova);
> +
> + if (S5P_SPAGE_LV2_ENTRY(*entry))
> + return (*entry & S5P_SPAGE_MASK) + (iova & ~S5P_SPAGE_MASK);
> +
> + if (S5P_LPAGE_LV2_ENTRY(*entry))
> + return (*entry & S5P_LPAGE_MASK) + (iova & ~S5P_LPAGE_MASK);
> +
> + return 0;
> +}
> +
> +static int exynos_iommu_domain_has_cap(struct iommu_domain *domain,
> + unsigned long cap)
> +{
> + return 0;
> +}
> +
> +static struct iommu_ops exynos_iommu_ops = {
> + .domain_init = &exynos_iommu_domain_init,
> + .domain_destroy = &exynos_iommu_domain_destroy,
> + .attach_dev = &exynos_iommu_attach_device,
> + .detach_dev = &exynos_iommu_detach_device,
> + .map = &exynos_iommu_map,
> + .unmap = &exynos_iommu_unmap,
> + .iova_to_phys = &exynos_iommu_iova_to_phys,
> + .domain_has_cap = &exynos_iommu_domain_has_cap,
> +};
> +
> +static int __init exynos_iommu_init(void)
> +{
> + l2table_cachep = kmem_cache_create("SysMMU Lv2 Tables",
> + S5P_LV2TABLE_SIZE, S5P_LV2TABLE_SIZE, 0, NULL);
Any reason you allocate a seperate slab-cache? It doesn't have a
constructor so it would be merged into the kmalloc-slabs anyway (at
least with SLUB).
> + if (!l2table_cachep)
> + return -ENOMEM;
> +
> + register_iommu(&exynos_iommu_ops);
> +
> + return 0;
> +}
> +arch_initcall(exynos_iommu_init);
> --
> 1.7.1
>
>
--
AMD Operating System Research Center
Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach
General Managers: Alberto Bozzo, Andrew Bowd
Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632
^ permalink raw reply
* [PATCH] arm/mx5: remove the magic reference to '__NA_' from board-mx51_efikasb.c
From: Shawn Guo @ 2011-09-30 12:07 UTC (permalink / raw)
To: linux-arm-kernel
This change is to fix the compile error below.
CC arch/arm/mach-mx5/board-mx51_efikasb.o
arch/arm/mach-mx5/board-mx51_efikasb.c:102:2: error: ?__NA_? undeclared here (not in a function)
make[2]: *** [arch/arm/mach-mx5/board-mx51_efikasb.o] Error 1
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
Sascha,
This is a compile error seen on your imx-features branch.
arch/arm/mach-mx5/board-mx51_efikasb.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c
index b491513..46eac80 100644
--- a/arch/arm/mach-mx5/board-mx51_efikasb.c
+++ b/arch/arm/mach-mx5/board-mx51_efikasb.c
@@ -56,7 +56,7 @@
#define EFIKASB_RFKILL IMX_GPIO_NR(3, 1)
#define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE)
-#define MX51_PAD_SD1_CD IOMUX_PAD(0x47c, 0x0e8, 1, __NA_, 0, MX51_ESDHC_PAD_CTRL)
+#define MX51_PAD_SD1_CD IOMUX_PAD(0x47c, 0x0e8, 1, 0x0, 0, MX51_ESDHC_PAD_CTRL)
static iomux_v3_cfg_t mx51efikasb_pads[] = {
/* USB HOST2 */
--
1.7.4.1
^ permalink raw reply related
* [PATCH-V3 2/4] arm:omap:am33xx: Update common OMAP machine specific sources
From: Premi, Sanjeev @ 2011-09-30 12:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87fwjjcfbt.fsf@ti.com>
> -----Original Message-----
> From: linux-omap-owner at vger.kernel.org
> [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of Hilman, Kevin
> Sent: Tuesday, September 27, 2011 12:16 AM
> To: Hiremath, Vaibhav
> Cc: linux-omap at vger.kernel.org; paul at pwsan.com;
> tony at atomide.com; linux-arm-kernel at lists.infradead.org;
> Mohammed, Afzal
> Subject: Re: [PATCH-V3 2/4] arm:omap:am33xx: Update common
> OMAP machine specific sources
>
> <hvaibhav@ti.com> writes:
>
> > From: Afzal Mohammed <afzal@ti.com>
> >
> > This patch updates the common machine specific source files for
> > support for AM33XX/AM335x with cpu type, macros for
> identification of
> > AM33XX/AM335X device.
> >
> > Signed-off-by: Afzal Mohammed <afzal@ti.com>
> > Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
>
> [...]
>
> > @@ -3576,7 +3579,8 @@ int __init omap3xxx_clk_init(void)
> > * Lock DPLL5 -- here only until other device init code can
> > * handle this
> > */
> > - if (!cpu_is_ti816x() && (omap_rev() >= OMAP3430_REV_ES2_0))
> > + if (!cpu_is_ti816x() && !cpu_is_am33xx() &&
> > + (omap_rev() >= OMAP3430_REV_ES2_0))
> > omap3_clk_lock_dpll5();
>
> This is getting ugly.
>
> Instead of continuing to expand this if-list, I think it's time for a
> new feature-flag for whether or not an SoC has DPLL5 instead.
I agree that the code is really getting ugly here. But, isn't
feature-flag going to be over-used with this and similar features?
Just thinking ahead, for these possible cases:
1) An soc adds DPLL6.
2) An soc uses DPLL5, but mechanism to lock is different.
Wouldn't it be better to have a scheme like this:
1) Define a simple structure for DPLLs.
2) Initialize the unused DPLLs to be null/ -1 early
in arch/soc specific init.
3) The DPLL functions check for corresponding flag on
entry.
~sanjeev
>
> Kevin
>
> --
> To unsubscribe from this list: send the line "unsubscribe
> linux-omap" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* [PATCH 2/9] regulator: helper routine to extract regulator_init_data
From: Mark Brown @ 2011-09-30 12:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4E85A34E.9070203@ti.com>
On Fri, Sep 30, 2011 at 04:39:02PM +0530, Rajendra Nayak wrote:
> The "regulator-supplies" is used to specific the regulator *parent*.
> Same as what was earlier passed by using the
> "supply_regulator" field of regulator_init_data structure.
> Grant wanted the bindings to support specifying multiple parents
> and hence I was thinking of either a list of names *or*
> a list of phandles to specify multiple parents to a regulator.
So, as I'm fairly sure I said last time these are just standard
supplies. It just happens to be that the consumer is a regulator. The
fact that Linux chooses to have core framework handling for this is an
implementation detail of Linux (and indeed many devices ignore this for
their on board regulators).
^ permalink raw reply
* [PATCH] ARM: mxs: Consolidate mm-mx23.c and mm-mx28.c into a single file
From: Fabio Estevam @ 2011-09-30 12:22 UTC (permalink / raw)
To: linux-arm-kernel
Consolidate mm-mx23.c and mm-mx28.c into a single file.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/mach-mxs/Makefile | 6 ++--
arch/arm/mach-mxs/mm-mx23.c | 44 ------------------------------
arch/arm/mach-mxs/mm-mx28.c | 44 ------------------------------
arch/arm/mach-mxs/mm-mxs.c | 63 +++++++++++++++++++++++++++++++++++++++++++
4 files changed, 66 insertions(+), 91 deletions(-)
delete mode 100644 arch/arm/mach-mxs/mm-mx23.c
delete mode 100644 arch/arm/mach-mxs/mm-mx28.c
create mode 100644 arch/arm/mach-mxs/mm-mxs.c
diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile
index 6c38262..7474064 100644
--- a/arch/arm/mach-mxs/Makefile
+++ b/arch/arm/mach-mxs/Makefile
@@ -1,11 +1,11 @@
# Common support
-obj-y := clock.o devices.o icoll.o iomux.o system.o timer.o
+obj-y := clock.o devices.o icoll.o iomux.o system.o timer.o mm-mxs.o
obj-$(CONFIG_MXS_OCOTP) += ocotp.o
obj-$(CONFIG_PM) += pm.o
-obj-$(CONFIG_SOC_IMX23) += clock-mx23.o mm-mx23.o
-obj-$(CONFIG_SOC_IMX28) += clock-mx28.o mm-mx28.o
+obj-$(CONFIG_SOC_IMX23) += clock-mx23.o
+obj-$(CONFIG_SOC_IMX28) += clock-mx28.o
obj-$(CONFIG_MACH_STMP378X_DEVB) += mach-stmp378x_devb.o
obj-$(CONFIG_MACH_MX23EVK) += mach-mx23evk.o
diff --git a/arch/arm/mach-mxs/mm-mx23.c b/arch/arm/mach-mxs/mm-mx23.c
deleted file mode 100644
index 1b2345a..0000000
--- a/arch/arm/mach-mxs/mm-mx23.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- *
- * Create static mapping between physical to virtual memory.
- */
-
-#include <linux/mm.h>
-#include <linux/init.h>
-
-#include <asm/mach/map.h>
-
-#include <mach/mx23.h>
-#include <mach/common.h>
-#include <mach/iomux.h>
-
-/*
- * Define the MX23 memory map.
- */
-static struct map_desc mx23_io_desc[] __initdata = {
- mxs_map_entry(MX23, OCRAM, MT_DEVICE),
- mxs_map_entry(MX23, IO, MT_DEVICE),
-};
-
-/*
- * This function initializes the memory map. It is called during the
- * system startup to create static physical to virtual memory mappings
- * for the IO modules.
- */
-void __init mx23_map_io(void)
-{
- iotable_init(mx23_io_desc, ARRAY_SIZE(mx23_io_desc));
-}
-
-void __init mx23_init_irq(void)
-{
- icoll_init_irq();
-}
diff --git a/arch/arm/mach-mxs/mm-mx28.c b/arch/arm/mach-mxs/mm-mx28.c
deleted file mode 100644
index b6e18dd..0000000
--- a/arch/arm/mach-mxs/mm-mx28.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- *
- * Create static mapping between physical to virtual memory.
- */
-
-#include <linux/mm.h>
-#include <linux/init.h>
-
-#include <asm/mach/map.h>
-
-#include <mach/mx28.h>
-#include <mach/common.h>
-#include <mach/iomux.h>
-
-/*
- * Define the MX28 memory map.
- */
-static struct map_desc mx28_io_desc[] __initdata = {
- mxs_map_entry(MX28, OCRAM, MT_DEVICE),
- mxs_map_entry(MX28, IO, MT_DEVICE),
-};
-
-/*
- * This function initializes the memory map. It is called during the
- * system startup to create static physical to virtual memory mappings
- * for the IO modules.
- */
-void __init mx28_map_io(void)
-{
- iotable_init(mx28_io_desc, ARRAY_SIZE(mx28_io_desc));
-}
-
-void __init mx28_init_irq(void)
-{
- icoll_init_irq();
-}
diff --git a/arch/arm/mach-mxs/mm-mxs.c b/arch/arm/mach-mxs/mm-mxs.c
new file mode 100644
index 0000000..50af5ce
--- /dev/null
+++ b/arch/arm/mach-mxs/mm-mxs.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ * Create static mapping between physical to virtual memory.
+ */
+
+#include <linux/mm.h>
+#include <linux/init.h>
+
+#include <asm/mach/map.h>
+
+#include <mach/mx23.h>
+#include <mach/mx28.h>
+#include <mach/common.h>
+#include <mach/iomux.h>
+
+/*
+ * Define the MX23 memory map.
+ */
+static struct map_desc mx23_io_desc[] __initdata = {
+ mxs_map_entry(MX23, OCRAM, MT_DEVICE),
+ mxs_map_entry(MX23, IO, MT_DEVICE),
+};
+
+/*
+ * Define the MX28 memory map.
+ */
+static struct map_desc mx28_io_desc[] __initdata = {
+ mxs_map_entry(MX28, OCRAM, MT_DEVICE),
+ mxs_map_entry(MX28, IO, MT_DEVICE),
+};
+
+/*
+ * This function initializes the memory map. It is called during the
+ * system startup to create static physical to virtual memory mappings
+ * for the IO modules.
+ */
+void __init mx23_map_io(void)
+{
+ iotable_init(mx23_io_desc, ARRAY_SIZE(mx23_io_desc));
+}
+
+void __init mx23_init_irq(void)
+{
+ icoll_init_irq();
+}
+
+void __init mx28_map_io(void)
+{
+ iotable_init(mx28_io_desc, ARRAY_SIZE(mx28_io_desc));
+}
+
+void __init mx28_init_irq(void)
+{
+ icoll_init_irq();
+}
--
1.7.1
^ permalink raw reply related
* [PATCH 2/2] ARM: Switch to using CLKDEV_INIT macro for creating clk_lookup instance
From: Ryan Mallon @ 2011-09-30 12:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317381097-2691-3-git-send-email-padma.v@samsung.com>
On 30/09/11 21:11, Padmavathi Venna wrote:
> Replace platform specific macros that creates struct clk_lookup
> instance with the new common CLKDEV_INIT macro
>
> Suggested by: Russell King <rmk+kernel@arm.linux.org.uk>
> Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
> ---
> arch/arm/mach-davinci/board-dm646x-evm.c | 5 +-
> arch/arm/mach-davinci/clock.h | 7 --
> arch/arm/mach-davinci/da830.c | 101 +++++++++++----------
> arch/arm/mach-davinci/da850.c | 95 ++++++++++----------
> arch/arm/mach-davinci/dm355.c | 86 +++++++++---------
> arch/arm/mach-davinci/dm365.c | 112 ++++++++++++------------
> arch/arm/mach-davinci/dm644x.c | 77 ++++++++--------
> arch/arm/mach-davinci/dm646x.c | 81 +++++++++--------
> arch/arm/mach-davinci/tnetv107x.c | 134 ++++++++++++++--------------
> arch/arm/mach-ep93xx/clock.c | 61 ++++++-------
> arch/arm/mach-imx/clock-imx1.c | 38 ++++-----
> arch/arm/mach-imx/clock-imx21.c | 91 +++++++++----------
> arch/arm/mach-imx/clock-imx25.c | 77 +++++++---------
> arch/arm/mach-imx/clock-imx27.c | 111 +++++++++++------------
> arch/arm/mach-imx/clock-imx31.c | 103 ++++++++++-----------
> arch/arm/mach-imx/clock-imx35.c | 117 +++++++++++-------------
> arch/arm/mach-lpc32xx/clock.c | 75 +++++++---------
> arch/arm/mach-mx5/clock-mx51-mx53.c | 145 ++++++++++++++----------------
> arch/arm/mach-mxs/clock-mx23.c | 39 ++++-----
> arch/arm/mach-mxs/clock-mx28.c | 67 ++++++--------
> arch/arm/mach-tcc8k/clock.c | 107 ++++++++++------------
> 21 files changed, 825 insertions(+), 904 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
> index 993a314..4a30865 100644
> --- a/arch/arm/mach-davinci/board-dm646x-evm.c
> +++ b/arch/arm/mach-davinci/board-dm646x-evm.c
> @@ -24,6 +24,7 @@
> #include <linux/i2c.h>
> #include <linux/i2c/at24.h>
> #include <linux/i2c/pcf857x.h>
> +#include <linux/clkdev.h>
>
> #include <media/tvp514x.h>
>
> @@ -703,8 +704,8 @@ static struct clk cdce_clk_in = {
> };
>
> static struct clk_lookup cdce_clks[] = {
> - CLK(NULL, "xin", &cdce_clk_in),
> - CLK(NULL, NULL, NULL),
> + CLKDEV_INIT(NULL, "xin", cdce_clk_in)
> + {.dev_id = NULL, .con_id = NULL, .clk = NULL,},
Why not CLKDEV_INIT(NULL, NULL, NULL)? Or create another macro
CLKDEV_NULL (or similar) for the last entry in the list rather than
duplicating this everywhere.
~Ryan
^ permalink raw reply
* [PATCH 2/2] ARM: Switch to using CLKDEV_INIT macro for creating clk_lookup instance
From: Amit Kucheria @ 2011-09-30 12:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317381097-2691-3-git-send-email-padma.v@samsung.com>
On 11 Sep 30, Padmavathi Venna wrote:
> Replace platform specific macros that creates struct clk_lookup
> instance with the new common CLKDEV_INIT macro
>
> Suggested by: Russell King <rmk+kernel@arm.linux.org.uk>
> Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
For mach-mx5 part,
Acked-by: Amit Kucheria <amit.kucheria@canonical.com>
> ---
> arch/arm/mach-davinci/board-dm646x-evm.c | 5 +-
> arch/arm/mach-davinci/clock.h | 7 --
> arch/arm/mach-davinci/da830.c | 101 +++++++++++----------
> arch/arm/mach-davinci/da850.c | 95 ++++++++++----------
> arch/arm/mach-davinci/dm355.c | 86 +++++++++---------
> arch/arm/mach-davinci/dm365.c | 112 ++++++++++++------------
> arch/arm/mach-davinci/dm644x.c | 77 ++++++++--------
> arch/arm/mach-davinci/dm646x.c | 81 +++++++++--------
> arch/arm/mach-davinci/tnetv107x.c | 134 ++++++++++++++--------------
> arch/arm/mach-ep93xx/clock.c | 61 ++++++-------
> arch/arm/mach-imx/clock-imx1.c | 38 ++++-----
> arch/arm/mach-imx/clock-imx21.c | 91 +++++++++----------
> arch/arm/mach-imx/clock-imx25.c | 77 +++++++---------
> arch/arm/mach-imx/clock-imx27.c | 111 +++++++++++------------
> arch/arm/mach-imx/clock-imx31.c | 103 ++++++++++-----------
> arch/arm/mach-imx/clock-imx35.c | 117 +++++++++++-------------
> arch/arm/mach-lpc32xx/clock.c | 75 +++++++---------
> arch/arm/mach-mx5/clock-mx51-mx53.c | 145 ++++++++++++++----------------
> arch/arm/mach-mxs/clock-mx23.c | 39 ++++-----
> arch/arm/mach-mxs/clock-mx28.c | 67 ++++++--------
> arch/arm/mach-tcc8k/clock.c | 107 ++++++++++------------
> 21 files changed, 825 insertions(+), 904 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
> index 993a314..4a30865 100644
> --- a/arch/arm/mach-davinci/board-dm646x-evm.c
> +++ b/arch/arm/mach-davinci/board-dm646x-evm.c
> @@ -24,6 +24,7 @@
> #include <linux/i2c.h>
> #include <linux/i2c/at24.h>
> #include <linux/i2c/pcf857x.h>
> +#include <linux/clkdev.h>
>
> #include <media/tvp514x.h>
>
> @@ -703,8 +704,8 @@ static struct clk cdce_clk_in = {
> };
>
> static struct clk_lookup cdce_clks[] = {
> - CLK(NULL, "xin", &cdce_clk_in),
> - CLK(NULL, NULL, NULL),
> + CLKDEV_INIT(NULL, "xin", cdce_clk_in)
> + {.dev_id = NULL, .con_id = NULL, .clk = NULL,},
> };
>
> static void __init cdce_clk_init(void)
> diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
> index a705f36..df153d5 100644
> --- a/arch/arm/mach-davinci/clock.h
> +++ b/arch/arm/mach-davinci/clock.h
> @@ -113,13 +113,6 @@ struct clk {
> #define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */
> #define PSC_FORCE BIT(7) /* Force module state transtition */
>
> -#define CLK(dev, con, ck) \
> - { \
> - .dev_id = dev, \
> - .con_id = con, \
> - .clk = ck, \
> - } \
> -
> int davinci_clk_init(struct clk_lookup *clocks);
> int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
> unsigned int mult, unsigned int postdiv);
> diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
> index 2ed2f82..e431565 100644
> --- a/arch/arm/mach-davinci/da830.c
> +++ b/arch/arm/mach-davinci/da830.c
> @@ -10,6 +10,7 @@
> */
> #include <linux/init.h>
> #include <linux/clk.h>
> +#include <linux/clkdev.h>
>
> #include <asm/mach/map.h>
>
> @@ -373,56 +374,56 @@ static struct clk rmii_clk = {
> };
>
> static struct clk_lookup da830_clks[] = {
> - CLK(NULL, "ref", &ref_clk),
> - CLK(NULL, "pll0", &pll0_clk),
> - CLK(NULL, "pll0_aux", &pll0_aux_clk),
> - CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
> - CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
> - CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
> - CLK(NULL, "pll0_sysclk5", &pll0_sysclk5),
> - CLK(NULL, "pll0_sysclk6", &pll0_sysclk6),
> - CLK(NULL, "pll0_sysclk7", &pll0_sysclk7),
> - CLK("i2c_davinci.1", NULL, &i2c0_clk),
> - CLK(NULL, "timer0", &timerp64_0_clk),
> - CLK("watchdog", NULL, &timerp64_1_clk),
> - CLK(NULL, "arm_rom", &arm_rom_clk),
> - CLK(NULL, "scr0_ss", &scr0_ss_clk),
> - CLK(NULL, "scr1_ss", &scr1_ss_clk),
> - CLK(NULL, "scr2_ss", &scr2_ss_clk),
> - CLK(NULL, "dmax", &dmax_clk),
> - CLK(NULL, "tpcc", &tpcc_clk),
> - CLK(NULL, "tptc0", &tptc0_clk),
> - CLK(NULL, "tptc1", &tptc1_clk),
> - CLK("davinci_mmc.0", NULL, &mmcsd_clk),
> - CLK(NULL, "uart0", &uart0_clk),
> - CLK(NULL, "uart1", &uart1_clk),
> - CLK(NULL, "uart2", &uart2_clk),
> - CLK("spi_davinci.0", NULL, &spi0_clk),
> - CLK("spi_davinci.1", NULL, &spi1_clk),
> - CLK(NULL, "ecap0", &ecap0_clk),
> - CLK(NULL, "ecap1", &ecap1_clk),
> - CLK(NULL, "ecap2", &ecap2_clk),
> - CLK(NULL, "pwm0", &pwm0_clk),
> - CLK(NULL, "pwm1", &pwm1_clk),
> - CLK(NULL, "pwm2", &pwm2_clk),
> - CLK("eqep.0", NULL, &eqep0_clk),
> - CLK("eqep.1", NULL, &eqep1_clk),
> - CLK("da8xx_lcdc.0", NULL, &lcdc_clk),
> - CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
> - CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
> - CLK("davinci-mcasp.2", NULL, &mcasp2_clk),
> - CLK(NULL, "usb20", &usb20_clk),
> - CLK(NULL, "aemif", &aemif_clk),
> - CLK(NULL, "aintc", &aintc_clk),
> - CLK(NULL, "secu_mgr", &secu_mgr_clk),
> - CLK("davinci_emac.1", NULL, &emac_clk),
> - CLK(NULL, "gpio", &gpio_clk),
> - CLK("i2c_davinci.2", NULL, &i2c1_clk),
> - CLK(NULL, "usb11", &usb11_clk),
> - CLK(NULL, "emif3", &emif3_clk),
> - CLK(NULL, "arm", &arm_clk),
> - CLK(NULL, "rmii", &rmii_clk),
> - CLK(NULL, NULL, NULL),
> + CLKDEV_INIT(NULL, "ref", ref_clk)
> + CLKDEV_INIT(NULL, "pll0", pll0_clk)
> + CLKDEV_INIT(NULL, "pll0_aux", pll0_aux_clk)
> + CLKDEV_INIT(NULL, "pll0_sysclk2", pll0_sysclk2)
> + CLKDEV_INIT(NULL, "pll0_sysclk3", pll0_sysclk3)
> + CLKDEV_INIT(NULL, "pll0_sysclk4", pll0_sysclk4)
> + CLKDEV_INIT(NULL, "pll0_sysclk5", pll0_sysclk5)
> + CLKDEV_INIT(NULL, "pll0_sysclk6", pll0_sysclk6)
> + CLKDEV_INIT(NULL, "pll0_sysclk7", pll0_sysclk7)
> + CLKDEV_INIT("i2c_davinci.1", NULL, i2c0_clk)
> + CLKDEV_INIT(NULL, "timer0", timerp64_0_clk)
> + CLKDEV_INIT("watchdog", NULL, timerp64_1_clk)
> + CLKDEV_INIT(NULL, "arm_rom", arm_rom_clk)
> + CLKDEV_INIT(NULL, "scr0_ss", scr0_ss_clk)
> + CLKDEV_INIT(NULL, "scr1_ss", scr1_ss_clk)
> + CLKDEV_INIT(NULL, "scr2_ss", scr2_ss_clk)
> + CLKDEV_INIT(NULL, "dmax", dmax_clk)
> + CLKDEV_INIT(NULL, "tpcc", tpcc_clk)
> + CLKDEV_INIT(NULL, "tptc0", tptc0_clk)
> + CLKDEV_INIT(NULL, "tptc1", tptc1_clk)
> + CLKDEV_INIT("davinci_mmc.0", NULL, mmcsd_clk)
> + CLKDEV_INIT(NULL, "uart0", uart0_clk)
> + CLKDEV_INIT(NULL, "uart1", uart1_clk)
> + CLKDEV_INIT(NULL, "uart2", uart2_clk)
> + CLKDEV_INIT("spi_davinci.0", NULL, spi0_clk)
> + CLKDEV_INIT("spi_davinci.1", NULL, spi1_clk)
> + CLKDEV_INIT(NULL, "ecap0", ecap0_clk)
> + CLKDEV_INIT(NULL, "ecap1", ecap1_clk)
> + CLKDEV_INIT(NULL, "ecap2", ecap2_clk)
> + CLKDEV_INIT(NULL, "pwm0", pwm0_clk)
> + CLKDEV_INIT(NULL, "pwm1", pwm1_clk)
> + CLKDEV_INIT(NULL, "pwm2", pwm2_clk)
> + CLKDEV_INIT("eqep.0", NULL, eqep0_clk)
> + CLKDEV_INIT("eqep.1", NULL, eqep1_clk)
> + CLKDEV_INIT("da8xx_lcdc.0", NULL, lcdc_clk)
> + CLKDEV_INIT("davinci-mcasp.0", NULL, mcasp0_clk)
> + CLKDEV_INIT("davinci-mcasp.1", NULL, mcasp1_clk)
> + CLKDEV_INIT("davinci-mcasp.2", NULL, mcasp2_clk)
> + CLKDEV_INIT(NULL, "usb20", usb20_clk)
> + CLKDEV_INIT(NULL, "aemif", aemif_clk)
> + CLKDEV_INIT(NULL, "aintc", aintc_clk)
> + CLKDEV_INIT(NULL, "secu_mgr", secu_mgr_clk)
> + CLKDEV_INIT("davinci_emac.1", NULL, emac_clk)
> + CLKDEV_INIT(NULL, "gpio", gpio_clk)
> + CLKDEV_INIT("i2c_davinci.2", NULL, i2c1_clk)
> + CLKDEV_INIT(NULL, "usb11", usb11_clk)
> + CLKDEV_INIT(NULL, "emif3", emif3_clk)
> + CLKDEV_INIT(NULL, "arm", arm_clk)
> + CLKDEV_INIT(NULL, "rmii", rmii_clk)
> + {.dev_id = NULL, .con_id = NULL, .clk = NULL,},
> };
>
> /*
> diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
> index 935dbed..166e90e 100644
> --- a/arch/arm/mach-davinci/da850.c
> +++ b/arch/arm/mach-davinci/da850.c
> @@ -16,6 +16,7 @@
> #include <linux/platform_device.h>
> #include <linux/cpufreq.h>
> #include <linux/regulator/consumer.h>
> +#include <linux/clkdev.h>
>
> #include <asm/mach/map.h>
>
> @@ -383,53 +384,53 @@ static struct clk sata_clk = {
> };
>
> static struct clk_lookup da850_clks[] = {
> - CLK(NULL, "ref", &ref_clk),
> - CLK(NULL, "pll0", &pll0_clk),
> - CLK(NULL, "pll0_aux", &pll0_aux_clk),
> - CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
> - CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
> - CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
> - CLK(NULL, "pll0_sysclk5", &pll0_sysclk5),
> - CLK(NULL, "pll0_sysclk6", &pll0_sysclk6),
> - CLK(NULL, "pll0_sysclk7", &pll0_sysclk7),
> - CLK(NULL, "pll1", &pll1_clk),
> - CLK(NULL, "pll1_aux", &pll1_aux_clk),
> - CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
> - CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
> - CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
> - CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
> - CLK(NULL, "pll1_sysclk6", &pll1_sysclk6),
> - CLK(NULL, "pll1_sysclk7", &pll1_sysclk7),
> - CLK("i2c_davinci.1", NULL, &i2c0_clk),
> - CLK(NULL, "timer0", &timerp64_0_clk),
> - CLK("watchdog", NULL, &timerp64_1_clk),
> - CLK(NULL, "arm_rom", &arm_rom_clk),
> - CLK(NULL, "tpcc0", &tpcc0_clk),
> - CLK(NULL, "tptc0", &tptc0_clk),
> - CLK(NULL, "tptc1", &tptc1_clk),
> - CLK(NULL, "tpcc1", &tpcc1_clk),
> - CLK(NULL, "tptc2", &tptc2_clk),
> - CLK(NULL, "uart0", &uart0_clk),
> - CLK(NULL, "uart1", &uart1_clk),
> - CLK(NULL, "uart2", &uart2_clk),
> - CLK(NULL, "aintc", &aintc_clk),
> - CLK(NULL, "gpio", &gpio_clk),
> - CLK("i2c_davinci.2", NULL, &i2c1_clk),
> - CLK(NULL, "emif3", &emif3_clk),
> - CLK(NULL, "arm", &arm_clk),
> - CLK(NULL, "rmii", &rmii_clk),
> - CLK("davinci_emac.1", NULL, &emac_clk),
> - CLK("davinci-mcasp.0", NULL, &mcasp_clk),
> - CLK("da8xx_lcdc.0", NULL, &lcdc_clk),
> - CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
> - CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
> - CLK(NULL, "aemif", &aemif_clk),
> - CLK(NULL, "usb11", &usb11_clk),
> - CLK(NULL, "usb20", &usb20_clk),
> - CLK("spi_davinci.0", NULL, &spi0_clk),
> - CLK("spi_davinci.1", NULL, &spi1_clk),
> - CLK("ahci", NULL, &sata_clk),
> - CLK(NULL, NULL, NULL),
> + CLKDEV_INIT(NULL, "ref", ref_clk)
> + CLKDEV_INIT(NULL, "pll0", pll0_clk)
> + CLKDEV_INIT(NULL, "pll0_aux", pll0_aux_clk)
> + CLKDEV_INIT(NULL, "pll0_sysclk2", pll0_sysclk2)
> + CLKDEV_INIT(NULL, "pll0_sysclk3", pll0_sysclk3)
> + CLKDEV_INIT(NULL, "pll0_sysclk4", pll0_sysclk4)
> + CLKDEV_INIT(NULL, "pll0_sysclk5", pll0_sysclk5)
> + CLKDEV_INIT(NULL, "pll0_sysclk6", pll0_sysclk6)
> + CLKDEV_INIT(NULL, "pll0_sysclk7", pll0_sysclk7)
> + CLKDEV_INIT(NULL, "pll1", pll1_clk)
> + CLKDEV_INIT(NULL, "pll1_aux", pll1_aux_clk)
> + CLKDEV_INIT(NULL, "pll1_sysclk2", pll1_sysclk2)
> + CLKDEV_INIT(NULL, "pll1_sysclk3", pll1_sysclk3)
> + CLKDEV_INIT(NULL, "pll1_sysclk4", pll1_sysclk4)
> + CLKDEV_INIT(NULL, "pll1_sysclk5", pll1_sysclk5)
> + CLKDEV_INIT(NULL, "pll1_sysclk6", pll1_sysclk6)
> + CLKDEV_INIT(NULL, "pll1_sysclk7", pll1_sysclk7)
> + CLKDEV_INIT("i2c_davinci.1", NULL, i2c0_clk)
> + CLKDEV_INIT(NULL, "timer0", timerp64_0_clk)
> + CLKDEV_INIT("watchdog", NULL, timerp64_1_clk)
> + CLKDEV_INIT(NULL, "arm_rom", arm_rom_clk)
> + CLKDEV_INIT(NULL, "tpcc0", tpcc0_clk)
> + CLKDEV_INIT(NULL, "tptc0", tptc0_clk)
> + CLKDEV_INIT(NULL, "tptc1", tptc1_clk)
> + CLKDEV_INIT(NULL, "tpcc1", tpcc1_clk)
> + CLKDEV_INIT(NULL, "tptc2", tptc2_clk)
> + CLKDEV_INIT(NULL, "uart0", uart0_clk)
> + CLKDEV_INIT(NULL, "uart1", uart1_clk)
> + CLKDEV_INIT(NULL, "uart2", uart2_clk)
> + CLKDEV_INIT(NULL, "aintc", aintc_clk)
> + CLKDEV_INIT(NULL, "gpio", gpio_clk)
> + CLKDEV_INIT("i2c_davinci.2", NULL, i2c1_clk)
> + CLKDEV_INIT(NULL, "emif3", emif3_clk)
> + CLKDEV_INIT(NULL, "arm", arm_clk)
> + CLKDEV_INIT(NULL, "rmii", rmii_clk)
> + CLKDEV_INIT("davinci_emac.1", NULL, emac_clk)
> + CLKDEV_INIT("davinci-mcasp.0", NULL, mcasp_clk)
> + CLKDEV_INIT("da8xx_lcdc.0", NULL, lcdc_clk)
> + CLKDEV_INIT("davinci_mmc.0", NULL, mmcsd0_clk)
> + CLKDEV_INIT("davinci_mmc.1", NULL, mmcsd1_clk)
> + CLKDEV_INIT(NULL, "aemif", aemif_clk)
> + CLKDEV_INIT(NULL, "usb11", usb11_clk)
> + CLKDEV_INIT(NULL, "usb20", usb20_clk)
> + CLKDEV_INIT("spi_davinci.0", NULL, spi0_clk)
> + CLKDEV_INIT("spi_davinci.1", NULL, spi1_clk)
> + CLKDEV_INIT("ahci", NULL, sata_clk)
> + {.dev_id = NULL, .con_id = NULL, .clk = NULL,},
> };
>
> /*
> diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
> index a3a94e9..9e03595 100644
> --- a/arch/arm/mach-davinci/dm355.c
> +++ b/arch/arm/mach-davinci/dm355.c
> @@ -336,49 +336,49 @@ static struct clk usb_clk = {
> };
>
> static struct clk_lookup dm355_clks[] = {
> - CLK(NULL, "ref", &ref_clk),
> - CLK(NULL, "pll1", &pll1_clk),
> - CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
> - CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
> - CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
> - CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
> - CLK(NULL, "pll1_aux", &pll1_aux_clk),
> - CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
> - CLK(NULL, "vpss_dac", &vpss_dac_clk),
> - CLK(NULL, "vpss_master", &vpss_master_clk),
> - CLK(NULL, "vpss_slave", &vpss_slave_clk),
> - CLK(NULL, "clkout1", &clkout1_clk),
> - CLK(NULL, "clkout2", &clkout2_clk),
> - CLK(NULL, "pll2", &pll2_clk),
> - CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
> - CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
> - CLK(NULL, "clkout3", &clkout3_clk),
> - CLK(NULL, "arm", &arm_clk),
> - CLK(NULL, "mjcp", &mjcp_clk),
> - CLK(NULL, "uart0", &uart0_clk),
> - CLK(NULL, "uart1", &uart1_clk),
> - CLK(NULL, "uart2", &uart2_clk),
> - CLK("i2c_davinci.1", NULL, &i2c_clk),
> - CLK("davinci-mcbsp.0", NULL, &asp0_clk),
> - CLK("davinci-mcbsp.1", NULL, &asp1_clk),
> - CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
> - CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
> - CLK("spi_davinci.0", NULL, &spi0_clk),
> - CLK("spi_davinci.1", NULL, &spi1_clk),
> - CLK("spi_davinci.2", NULL, &spi2_clk),
> - CLK(NULL, "gpio", &gpio_clk),
> - CLK(NULL, "aemif", &aemif_clk),
> - CLK(NULL, "pwm0", &pwm0_clk),
> - CLK(NULL, "pwm1", &pwm1_clk),
> - CLK(NULL, "pwm2", &pwm2_clk),
> - CLK(NULL, "pwm3", &pwm3_clk),
> - CLK(NULL, "timer0", &timer0_clk),
> - CLK(NULL, "timer1", &timer1_clk),
> - CLK("watchdog", NULL, &timer2_clk),
> - CLK(NULL, "timer3", &timer3_clk),
> - CLK(NULL, "rto", &rto_clk),
> - CLK(NULL, "usb", &usb_clk),
> - CLK(NULL, NULL, NULL),
> + CLKDEV_INIT(NULL, "ref", ref_clk)
> + CLKDEV_INIT(NULL, "pll1", pll1_clk)
> + CLKDEV_INIT(NULL, "pll1_sysclk1", pll1_sysclk1)
> + CLKDEV_INIT(NULL, "pll1_sysclk2", pll1_sysclk2)
> + CLKDEV_INIT(NULL, "pll1_sysclk3", pll1_sysclk3)
> + CLKDEV_INIT(NULL, "pll1_sysclk4", pll1_sysclk4)
> + CLKDEV_INIT(NULL, "pll1_aux", pll1_aux_clk)
> + CLKDEV_INIT(NULL, "pll1_sysclkbp", pll1_sysclkbp)
> + CLKDEV_INIT(NULL, "vpss_dac", vpss_dac_clk)
> + CLKDEV_INIT(NULL, "vpss_master", vpss_master_clk)
> + CLKDEV_INIT(NULL, "vpss_slave", vpss_slave_clk)
> + CLKDEV_INIT(NULL, "clkout1", clkout1_clk)
> + CLKDEV_INIT(NULL, "clkout2", clkout2_clk)
> + CLKDEV_INIT(NULL, "pll2", pll2_clk)
> + CLKDEV_INIT(NULL, "pll2_sysclk1", pll2_sysclk1)
> + CLKDEV_INIT(NULL, "pll2_sysclkbp", pll2_sysclkbp)
> + CLKDEV_INIT(NULL, "clkout3", clkout3_clk)
> + CLKDEV_INIT(NULL, "arm", arm_clk)
> + CLKDEV_INIT(NULL, "mjcp", mjcp_clk)
> + CLKDEV_INIT(NULL, "uart0", uart0_clk)
> + CLKDEV_INIT(NULL, "uart1", uart1_clk)
> + CLKDEV_INIT(NULL, "uart2", uart2_clk)
> + CLKDEV_INIT("i2c_davinci.1", NULL, i2c_clk)
> + CLKDEV_INIT("davinci-mcbsp.0", NULL, asp0_clk)
> + CLKDEV_INIT("davinci-mcbsp.1", NULL, asp1_clk)
> + CLKDEV_INIT("davinci_mmc.0", NULL, mmcsd0_clk)
> + CLKDEV_INIT("davinci_mmc.1", NULL, mmcsd1_clk)
> + CLKDEV_INIT("spi_davinci.0", NULL, spi0_clk)
> + CLKDEV_INIT("spi_davinci.1", NULL, spi1_clk)
> + CLKDEV_INIT("spi_davinci.2", NULL, spi2_clk)
> + CLKDEV_INIT(NULL, "gpio", gpio_clk)
> + CLKDEV_INIT(NULL, "aemif", aemif_clk)
> + CLKDEV_INIT(NULL, "pwm0", pwm0_clk)
> + CLKDEV_INIT(NULL, "pwm1", pwm1_clk)
> + CLKDEV_INIT(NULL, "pwm2", pwm2_clk)
> + CLKDEV_INIT(NULL, "pwm3", pwm3_clk)
> + CLKDEV_INIT(NULL, "timer0", timer0_clk)
> + CLKDEV_INIT(NULL, "timer1", timer1_clk)
> + CLKDEV_INIT("watchdog", NULL, timer2_clk)
> + CLKDEV_INIT(NULL, "timer3", timer3_clk)
> + CLKDEV_INIT(NULL, "rto", rto_clk)
> + CLKDEV_INIT(NULL, "usb", usb_clk)
> + {.dev_id = NULL, .con_id = NULL, .clk = NULL,},
> };
>
> /*----------------------------------------------------------------------*/
> diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
> index 4604e72..682dc3d 100644
> --- a/arch/arm/mach-davinci/dm365.c
> +++ b/arch/arm/mach-davinci/dm365.c
> @@ -407,62 +407,62 @@ static struct clk mjcp_clk = {
> };
>
> static struct clk_lookup dm365_clks[] = {
> - CLK(NULL, "ref", &ref_clk),
> - CLK(NULL, "pll1", &pll1_clk),
> - CLK(NULL, "pll1_aux", &pll1_aux_clk),
> - CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
> - CLK(NULL, "clkout0", &clkout0_clk),
> - CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
> - CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
> - CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
> - CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
> - CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
> - CLK(NULL, "pll1_sysclk6", &pll1_sysclk6),
> - CLK(NULL, "pll1_sysclk7", &pll1_sysclk7),
> - CLK(NULL, "pll1_sysclk8", &pll1_sysclk8),
> - CLK(NULL, "pll1_sysclk9", &pll1_sysclk9),
> - CLK(NULL, "pll2", &pll2_clk),
> - CLK(NULL, "pll2_aux", &pll2_aux_clk),
> - CLK(NULL, "clkout1", &clkout1_clk),
> - CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
> - CLK(NULL, "pll2_sysclk2", &pll2_sysclk2),
> - CLK(NULL, "pll2_sysclk3", &pll2_sysclk3),
> - CLK(NULL, "pll2_sysclk4", &pll2_sysclk4),
> - CLK(NULL, "pll2_sysclk5", &pll2_sysclk5),
> - CLK(NULL, "pll2_sysclk6", &pll2_sysclk6),
> - CLK(NULL, "pll2_sysclk7", &pll2_sysclk7),
> - CLK(NULL, "pll2_sysclk8", &pll2_sysclk8),
> - CLK(NULL, "pll2_sysclk9", &pll2_sysclk9),
> - CLK(NULL, "vpss_dac", &vpss_dac_clk),
> - CLK(NULL, "vpss_master", &vpss_master_clk),
> - CLK(NULL, "arm", &arm_clk),
> - CLK(NULL, "uart0", &uart0_clk),
> - CLK(NULL, "uart1", &uart1_clk),
> - CLK("i2c_davinci.1", NULL, &i2c_clk),
> - CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
> - CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
> - CLK("spi_davinci.0", NULL, &spi0_clk),
> - CLK("spi_davinci.1", NULL, &spi1_clk),
> - CLK("spi_davinci.2", NULL, &spi2_clk),
> - CLK("spi_davinci.3", NULL, &spi3_clk),
> - CLK("spi_davinci.4", NULL, &spi4_clk),
> - CLK(NULL, "gpio", &gpio_clk),
> - CLK(NULL, "aemif", &aemif_clk),
> - CLK(NULL, "pwm0", &pwm0_clk),
> - CLK(NULL, "pwm1", &pwm1_clk),
> - CLK(NULL, "pwm2", &pwm2_clk),
> - CLK(NULL, "pwm3", &pwm3_clk),
> - CLK(NULL, "timer0", &timer0_clk),
> - CLK(NULL, "timer1", &timer1_clk),
> - CLK("watchdog", NULL, &timer2_clk),
> - CLK(NULL, "timer3", &timer3_clk),
> - CLK(NULL, "usb", &usb_clk),
> - CLK("davinci_emac.1", NULL, &emac_clk),
> - CLK("davinci_voicecodec", NULL, &voicecodec_clk),
> - CLK("davinci-mcbsp", NULL, &asp0_clk),
> - CLK(NULL, "rto", &rto_clk),
> - CLK(NULL, "mjcp", &mjcp_clk),
> - CLK(NULL, NULL, NULL),
> + CLKDEV_INIT(NULL, "ref", ref_clk)
> + CLKDEV_INIT(NULL, "pll1", pll1_clk)
> + CLKDEV_INIT(NULL, "pll1_aux", pll1_aux_clk)
> + CLKDEV_INIT(NULL, "pll1_sysclkbp", pll1_sysclkbp)
> + CLKDEV_INIT(NULL, "clkout0", clkout0_clk)
> + CLKDEV_INIT(NULL, "pll1_sysclk1", pll1_sysclk1)
> + CLKDEV_INIT(NULL, "pll1_sysclk2", pll1_sysclk2)
> + CLKDEV_INIT(NULL, "pll1_sysclk3", pll1_sysclk3)
> + CLKDEV_INIT(NULL, "pll1_sysclk4", pll1_sysclk4)
> + CLKDEV_INIT(NULL, "pll1_sysclk5", pll1_sysclk5)
> + CLKDEV_INIT(NULL, "pll1_sysclk6", pll1_sysclk6)
> + CLKDEV_INIT(NULL, "pll1_sysclk7", pll1_sysclk7)
> + CLKDEV_INIT(NULL, "pll1_sysclk8", pll1_sysclk8)
> + CLKDEV_INIT(NULL, "pll1_sysclk9", pll1_sysclk9)
> + CLKDEV_INIT(NULL, "pll2", pll2_clk)
> + CLKDEV_INIT(NULL, "pll2_aux", pll2_aux_clk)
> + CLKDEV_INIT(NULL, "clkout1", clkout1_clk)
> + CLKDEV_INIT(NULL, "pll2_sysclk1", pll2_sysclk1)
> + CLKDEV_INIT(NULL, "pll2_sysclk2", pll2_sysclk2)
> + CLKDEV_INIT(NULL, "pll2_sysclk3", pll2_sysclk3)
> + CLKDEV_INIT(NULL, "pll2_sysclk4", pll2_sysclk4)
> + CLKDEV_INIT(NULL, "pll2_sysclk5", pll2_sysclk5)
> + CLKDEV_INIT(NULL, "pll2_sysclk6", pll2_sysclk6)
> + CLKDEV_INIT(NULL, "pll2_sysclk7", pll2_sysclk7)
> + CLKDEV_INIT(NULL, "pll2_sysclk8", pll2_sysclk8)
> + CLKDEV_INIT(NULL, "pll2_sysclk9", pll2_sysclk9)
> + CLKDEV_INIT(NULL, "vpss_dac", vpss_dac_clk)
> + CLKDEV_INIT(NULL, "vpss_master", vpss_master_clk)
> + CLKDEV_INIT(NULL, "arm", arm_clk)
> + CLKDEV_INIT(NULL, "uart0", uart0_clk)
> + CLKDEV_INIT(NULL, "uart1", uart1_clk)
> + CLKDEV_INIT("i2c_davinci.1", NULL, i2c_clk)
> + CLKDEV_INIT("davinci_mmc.0", NULL, mmcsd0_clk)
> + CLKDEV_INIT("davinci_mmc.1", NULL, mmcsd1_clk)
> + CLKDEV_INIT("spi_davinci.0", NULL, spi0_clk)
> + CLKDEV_INIT("spi_davinci.1", NULL, spi1_clk)
> + CLKDEV_INIT("spi_davinci.2", NULL, spi2_clk)
> + CLKDEV_INIT("spi_davinci.3", NULL, spi3_clk)
> + CLKDEV_INIT("spi_davinci.4", NULL, spi4_clk)
> + CLKDEV_INIT(NULL, "gpio", gpio_clk)
> + CLKDEV_INIT(NULL, "aemif", aemif_clk)
> + CLKDEV_INIT(NULL, "pwm0", pwm0_clk)
> + CLKDEV_INIT(NULL, "pwm1", pwm1_clk)
> + CLKDEV_INIT(NULL, "pwm2", pwm2_clk)
> + CLKDEV_INIT(NULL, "pwm3", pwm3_clk)
> + CLKDEV_INIT(NULL, "timer0", timer0_clk)
> + CLKDEV_INIT(NULL, "timer1", timer1_clk)
> + CLKDEV_INIT("watchdog", NULL, timer2_clk)
> + CLKDEV_INIT(NULL, "timer3", timer3_clk)
> + CLKDEV_INIT(NULL, "usb", usb_clk)
> + CLKDEV_INIT("davinci_emac.1", NULL, emac_clk)
> + CLKDEV_INIT("davinci_voicecodec", NULL, voicecodec_clk)
> + CLKDEV_INIT("davinci-mcbsp", NULL, asp0_clk)
> + CLKDEV_INIT(NULL, "rto", rto_clk)
> + CLKDEV_INIT(NULL, "mjcp", mjcp_clk)
> + {.dev_id = NULL, .con_id = NULL, .clk = NULL,},
> };
>
> /*----------------------------------------------------------------------*/
> diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
> index 4c82c27..7d9ac24 100644
> --- a/arch/arm/mach-davinci/dm644x.c
> +++ b/arch/arm/mach-davinci/dm644x.c
> @@ -13,6 +13,7 @@
> #include <linux/serial_8250.h>
> #include <linux/platform_device.h>
> #include <linux/gpio.h>
> +#include <linux/clkdev.h>
>
> #include <asm/mach/map.h>
>
> @@ -278,44 +279,44 @@ static struct clk timer2_clk = {
> };
>
> static struct clk_lookup dm644x_clks[] = {
> - CLK(NULL, "ref", &ref_clk),
> - CLK(NULL, "pll1", &pll1_clk),
> - CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
> - CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
> - CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
> - CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
> - CLK(NULL, "pll1_aux", &pll1_aux_clk),
> - CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
> - CLK(NULL, "pll2", &pll2_clk),
> - CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
> - CLK(NULL, "pll2_sysclk2", &pll2_sysclk2),
> - CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
> - CLK(NULL, "dsp", &dsp_clk),
> - CLK(NULL, "arm", &arm_clk),
> - CLK(NULL, "vicp", &vicp_clk),
> - CLK(NULL, "vpss_master", &vpss_master_clk),
> - CLK(NULL, "vpss_slave", &vpss_slave_clk),
> - CLK(NULL, "arm", &arm_clk),
> - CLK(NULL, "uart0", &uart0_clk),
> - CLK(NULL, "uart1", &uart1_clk),
> - CLK(NULL, "uart2", &uart2_clk),
> - CLK("davinci_emac.1", NULL, &emac_clk),
> - CLK("i2c_davinci.1", NULL, &i2c_clk),
> - CLK("palm_bk3710", NULL, &ide_clk),
> - CLK("davinci-mcbsp", NULL, &asp_clk),
> - CLK("davinci_mmc.0", NULL, &mmcsd_clk),
> - CLK(NULL, "spi", &spi_clk),
> - CLK(NULL, "gpio", &gpio_clk),
> - CLK(NULL, "usb", &usb_clk),
> - CLK(NULL, "vlynq", &vlynq_clk),
> - CLK(NULL, "aemif", &aemif_clk),
> - CLK(NULL, "pwm0", &pwm0_clk),
> - CLK(NULL, "pwm1", &pwm1_clk),
> - CLK(NULL, "pwm2", &pwm2_clk),
> - CLK(NULL, "timer0", &timer0_clk),
> - CLK(NULL, "timer1", &timer1_clk),
> - CLK("watchdog", NULL, &timer2_clk),
> - CLK(NULL, NULL, NULL),
> + CLKDEV_INIT(NULL, "ref", ref_clk)
> + CLKDEV_INIT(NULL, "pll1", pll1_clk)
> + CLKDEV_INIT(NULL, "pll1_sysclk1", pll1_sysclk1)
> + CLKDEV_INIT(NULL, "pll1_sysclk2", pll1_sysclk2)
> + CLKDEV_INIT(NULL, "pll1_sysclk3", pll1_sysclk3)
> + CLKDEV_INIT(NULL, "pll1_sysclk5", pll1_sysclk5)
> + CLKDEV_INIT(NULL, "pll1_aux", pll1_aux_clk)
> + CLKDEV_INIT(NULL, "pll1_sysclkbp", pll1_sysclkbp)
> + CLKDEV_INIT(NULL, "pll2", pll2_clk)
> + CLKDEV_INIT(NULL, "pll2_sysclk1", pll2_sysclk1)
> + CLKDEV_INIT(NULL, "pll2_sysclk2", pll2_sysclk2)
> + CLKDEV_INIT(NULL, "pll2_sysclkbp", pll2_sysclkbp)
> + CLKDEV_INIT(NULL, "dsp", dsp_clk)
> + CLKDEV_INIT(NULL, "arm", arm_clk)
> + CLKDEV_INIT(NULL, "vicp", vicp_clk)
> + CLKDEV_INIT(NULL, "vpss_master", vpss_master_clk)
> + CLKDEV_INIT(NULL, "vpss_slave", vpss_slave_clk)
> + CLKDEV_INIT(NULL, "arm", arm_clk)
> + CLKDEV_INIT(NULL, "uart0", uart0_clk)
> + CLKDEV_INIT(NULL, "uart1", uart1_clk)
> + CLKDEV_INIT(NULL, "uart2", uart2_clk)
> + CLKDEV_INIT("davinci_emac.1", NULL, emac_clk)
> + CLKDEV_INIT("i2c_davinci.1", NULL, i2c_clk)
> + CLKDEV_INIT("palm_bk3710", NULL, ide_clk)
> + CLKDEV_INIT("davinci-mcbsp", NULL, asp_clk)
> + CLKDEV_INIT("davinci_mmc.0", NULL, mmcsd_clk)
> + CLKDEV_INIT(NULL, "spi", spi_clk)
> + CLKDEV_INIT(NULL, "gpio", gpio_clk)
> + CLKDEV_INIT(NULL, "usb", usb_clk)
> + CLKDEV_INIT(NULL, "vlynq", vlynq_clk)
> + CLKDEV_INIT(NULL, "aemif", aemif_clk)
> + CLKDEV_INIT(NULL, "pwm0", pwm0_clk)
> + CLKDEV_INIT(NULL, "pwm1", pwm1_clk)
> + CLKDEV_INIT(NULL, "pwm2", pwm2_clk)
> + CLKDEV_INIT(NULL, "timer0", timer0_clk)
> + CLKDEV_INIT(NULL, "timer1", timer1_clk)
> + CLKDEV_INIT("watchdog", NULL, timer2_clk)
> + {.dev_id = NULL, .con_id = NULL, .clk = NULL,},
> };
>
> static struct emac_platform_data dm644x_emac_pdata = {
> diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
> index 1802e71..e5458e4 100644
> --- a/arch/arm/mach-davinci/dm646x.c
> +++ b/arch/arm/mach-davinci/dm646x.c
> @@ -14,6 +14,7 @@
> #include <linux/serial_8250.h>
> #include <linux/platform_device.h>
> #include <linux/gpio.h>
> +#include <linux/clkdev.h>
>
> #include <asm/mach/map.h>
>
> @@ -316,46 +317,46 @@ static struct clk vpif1_clk = {
> };
>
> static struct clk_lookup dm646x_clks[] = {
> - CLK(NULL, "ref", &ref_clk),
> - CLK(NULL, "aux", &aux_clkin),
> - CLK(NULL, "pll1", &pll1_clk),
> - CLK(NULL, "pll1_sysclk", &pll1_sysclk1),
> - CLK(NULL, "pll1_sysclk", &pll1_sysclk2),
> - CLK(NULL, "pll1_sysclk", &pll1_sysclk3),
> - CLK(NULL, "pll1_sysclk", &pll1_sysclk4),
> - CLK(NULL, "pll1_sysclk", &pll1_sysclk5),
> - CLK(NULL, "pll1_sysclk", &pll1_sysclk6),
> - CLK(NULL, "pll1_sysclk", &pll1_sysclk8),
> - CLK(NULL, "pll1_sysclk", &pll1_sysclk9),
> - CLK(NULL, "pll1_sysclk", &pll1_sysclkbp),
> - CLK(NULL, "pll1_aux", &pll1_aux_clk),
> - CLK(NULL, "pll2", &pll2_clk),
> - CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
> - CLK(NULL, "dsp", &dsp_clk),
> - CLK(NULL, "arm", &arm_clk),
> - CLK(NULL, "edma_cc", &edma_cc_clk),
> - CLK(NULL, "edma_tc0", &edma_tc0_clk),
> - CLK(NULL, "edma_tc1", &edma_tc1_clk),
> - CLK(NULL, "edma_tc2", &edma_tc2_clk),
> - CLK(NULL, "edma_tc3", &edma_tc3_clk),
> - CLK(NULL, "uart0", &uart0_clk),
> - CLK(NULL, "uart1", &uart1_clk),
> - CLK(NULL, "uart2", &uart2_clk),
> - CLK("i2c_davinci.1", NULL, &i2c_clk),
> - CLK(NULL, "gpio", &gpio_clk),
> - CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
> - CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
> - CLK(NULL, "aemif", &aemif_clk),
> - CLK("davinci_emac.1", NULL, &emac_clk),
> - CLK(NULL, "pwm0", &pwm0_clk),
> - CLK(NULL, "pwm1", &pwm1_clk),
> - CLK(NULL, "timer0", &timer0_clk),
> - CLK(NULL, "timer1", &timer1_clk),
> - CLK("watchdog", NULL, &timer2_clk),
> - CLK("palm_bk3710", NULL, &ide_clk),
> - CLK(NULL, "vpif0", &vpif0_clk),
> - CLK(NULL, "vpif1", &vpif1_clk),
> - CLK(NULL, NULL, NULL),
> + CLKDEV_INIT(NULL, "ref", ref_clk)
> + CLKDEV_INIT(NULL, "aux", aux_clkin)
> + CLKDEV_INIT(NULL, "pll1", pll1_clk)
> + CLKDEV_INIT(NULL, "pll1_sysclk", pll1_sysclk1)
> + CLKDEV_INIT(NULL, "pll1_sysclk", pll1_sysclk2)
> + CLKDEV_INIT(NULL, "pll1_sysclk", pll1_sysclk3)
> + CLKDEV_INIT(NULL, "pll1_sysclk", pll1_sysclk4)
> + CLKDEV_INIT(NULL, "pll1_sysclk", pll1_sysclk5)
> + CLKDEV_INIT(NULL, "pll1_sysclk", pll1_sysclk6)
> + CLKDEV_INIT(NULL, "pll1_sysclk", pll1_sysclk8)
> + CLKDEV_INIT(NULL, "pll1_sysclk", pll1_sysclk9)
> + CLKDEV_INIT(NULL, "pll1_sysclk", pll1_sysclkbp)
> + CLKDEV_INIT(NULL, "pll1_aux", pll1_aux_clk)
> + CLKDEV_INIT(NULL, "pll2", pll2_clk)
> + CLKDEV_INIT(NULL, "pll2_sysclk1", pll2_sysclk1)
> + CLKDEV_INIT(NULL, "dsp", dsp_clk)
> + CLKDEV_INIT(NULL, "arm", arm_clk)
> + CLKDEV_INIT(NULL, "edma_cc", edma_cc_clk)
> + CLKDEV_INIT(NULL, "edma_tc0", edma_tc0_clk)
> + CLKDEV_INIT(NULL, "edma_tc1", edma_tc1_clk)
> + CLKDEV_INIT(NULL, "edma_tc2", edma_tc2_clk)
> + CLKDEV_INIT(NULL, "edma_tc3", edma_tc3_clk)
> + CLKDEV_INIT(NULL, "uart0", uart0_clk)
> + CLKDEV_INIT(NULL, "uart1", uart1_clk)
> + CLKDEV_INIT(NULL, "uart2", uart2_clk)
> + CLKDEV_INIT("i2c_davinci.1", NULL, i2c_clk)
> + CLKDEV_INIT(NULL, "gpio", gpio_clk)
> + CLKDEV_INIT("davinci-mcasp.0", NULL, mcasp0_clk)
> + CLKDEV_INIT("davinci-mcasp.1", NULL, mcasp1_clk)
> + CLKDEV_INIT(NULL, "aemif", aemif_clk)
> + CLKDEV_INIT("davinci_emac.1", NULL, emac_clk)
> + CLKDEV_INIT(NULL, "pwm0", pwm0_clk)
> + CLKDEV_INIT(NULL, "pwm1", pwm1_clk)
> + CLKDEV_INIT(NULL, "timer0", timer0_clk)
> + CLKDEV_INIT(NULL, "timer1", timer1_clk)
> + CLKDEV_INIT("watchdog", NULL, timer2_clk)
> + CLKDEV_INIT("palm_bk3710", NULL, ide_clk)
> + CLKDEV_INIT(NULL, "vpif0", vpif0_clk)
> + CLKDEV_INIT(NULL, "vpif1", vpif1_clk)
> + {.dev_id = NULL, .con_id = NULL, .clk = NULL,},
> };
>
> static struct emac_platform_data dm646x_emac_pdata = {
> diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c
> index 1b28fdd..0a069a0 100644
> --- a/arch/arm/mach-davinci/tnetv107x.c
> +++ b/arch/arm/mach-davinci/tnetv107x.c
> @@ -18,6 +18,7 @@
> #include <linux/io.h>
> #include <linux/err.h>
> #include <linux/platform_device.h>
> +#include <linux/clkdev.h>
>
> #include <asm/mach/map.h>
>
> @@ -229,74 +230,75 @@ static struct clk clk_rng = { .name = "rng", .parent = &clk_pktsec };
> static struct clk clk_pka = { .name = "pka", .parent = &clk_pktsec };
>
> static struct clk_lookup clks[] = {
> - CLK(NULL, "pll_sys_clk", &pll_sys_clk),
> - CLK(NULL, "pll_eth_clk", &pll_eth_clk),
> - CLK(NULL, "pll_tdm_clk", &pll_tdm_clk),
> - CLK(NULL, "sys_arm1176_clk", &sys_arm1176_clk),
> - CLK(NULL, "sys_dsp_clk", &sys_dsp_clk),
> - CLK(NULL, "sys_ddr_clk", &sys_ddr_clk),
> - CLK(NULL, "sys_full_clk", &sys_full_clk),
> - CLK(NULL, "sys_lcd_clk", &sys_lcd_clk),
> - CLK(NULL, "sys_vlynq_ref_clk", &sys_vlynq_ref_clk),
> - CLK(NULL, "sys_tsc_clk", &sys_tsc_clk),
> - CLK(NULL, "sys_half_clk", &sys_half_clk),
> - CLK(NULL, "eth_5mhz_clk", ð_5mhz_clk),
> - CLK(NULL, "eth_50mhz_clk", ð_50mhz_clk),
> - CLK(NULL, "eth_125mhz_clk", ð_125mhz_clk),
> - CLK(NULL, "eth_250mhz_clk", ð_250mhz_clk),
> - CLK(NULL, "eth_25mhz_clk", ð_25mhz_clk),
> - CLK(NULL, "tdm_0_clk", &tdm_0_clk),
> - CLK(NULL, "tdm_extra_clk", &tdm_extra_clk),
> - CLK(NULL, "tdm_1_clk", &tdm_1_clk),
> - CLK(NULL, "clk_arm", &clk_arm),
> - CLK(NULL, "clk_gem", &clk_gem),
> - CLK(NULL, "clk_ddr2_phy", &clk_ddr2_phy),
> - CLK(NULL, "clk_tpcc", &clk_tpcc),
> - CLK(NULL, "clk_tptc0", &clk_tptc0),
> - CLK(NULL, "clk_tptc1", &clk_tptc1),
> - CLK(NULL, "clk_ram", &clk_ram),
> - CLK(NULL, "clk_mbx_lite", &clk_mbx_lite),
> - CLK("tnetv107x-fb.0", NULL, &clk_lcd),
> - CLK(NULL, "clk_ethss", &clk_ethss),
> - CLK(NULL, "aemif", &clk_aemif),
> - CLK(NULL, "clk_chipcfg", &clk_chipcfg),
> - CLK("tnetv107x-ts.0", NULL, &clk_tsc),
> - CLK(NULL, "clk_rom", &clk_rom),
> - CLK(NULL, "uart2", &clk_uart2),
> - CLK(NULL, "clk_pktsec", &clk_pktsec),
> - CLK("tnetv107x-rng.0", NULL, &clk_rng),
> - CLK("tnetv107x-pka.0", NULL, &clk_pka),
> - CLK(NULL, "clk_secctl", &clk_secctl),
> - CLK(NULL, "clk_keymgr", &clk_keymgr),
> - CLK("tnetv107x-keypad.0", NULL, &clk_keypad),
> - CLK(NULL, "clk_gpio", &clk_gpio),
> - CLK(NULL, "clk_mdio", &clk_mdio),
> - CLK("davinci_mmc.0", NULL, &clk_sdio0),
> - CLK(NULL, "uart0", &clk_uart0),
> - CLK(NULL, "uart1", &clk_uart1),
> - CLK(NULL, "timer0", &clk_timer0),
> - CLK(NULL, "timer1", &clk_timer1),
> - CLK("tnetv107x_wdt.0", NULL, &clk_wdt_arm),
> - CLK(NULL, "clk_wdt_dsp", &clk_wdt_dsp),
> - CLK("ti-ssp", NULL, &clk_ssp),
> - CLK(NULL, "clk_tdm0", &clk_tdm0),
> - CLK(NULL, "clk_vlynq", &clk_vlynq),
> - CLK(NULL, "clk_mcdma", &clk_mcdma),
> - CLK(NULL, "clk_usbss", &clk_usbss),
> - CLK(NULL, "clk_usb0", &clk_usb0),
> - CLK(NULL, "clk_usb1", &clk_usb1),
> - CLK(NULL, "clk_tdm1", &clk_tdm1),
> - CLK(NULL, "clk_debugss", &clk_debugss),
> - CLK(NULL, "clk_ethss_rgmii", &clk_ethss_rgmii),
> - CLK(NULL, "clk_system", &clk_system),
> - CLK(NULL, "clk_imcop", &clk_imcop),
> - CLK(NULL, "clk_spare", &clk_spare),
> - CLK("davinci_mmc.1", NULL, &clk_sdio1),
> - CLK(NULL, "clk_ddr2_vrst", &clk_ddr2_vrst),
> - CLK(NULL, "clk_ddr2_vctl_rst", &clk_ddr2_vctl_rst),
> - CLK(NULL, NULL, NULL),
> + CLKDEV_INIT(NULL, "pll_sys_clk", pll_sys_clk)
> + CLKDEV_INIT(NULL, "pll_eth_clk", pll_eth_clk)
> + CLKDEV_INIT(NULL, "pll_tdm_clk", pll_tdm_clk)
> + CLKDEV_INIT(NULL, "sys_arm1176_clk", sys_arm1176_clk)
> + CLKDEV_INIT(NULL, "sys_dsp_clk", sys_dsp_clk)
> + CLKDEV_INIT(NULL, "sys_ddr_clk", sys_ddr_clk)
> + CLKDEV_INIT(NULL, "sys_full_clk", sys_full_clk)
> + CLKDEV_INIT(NULL, "sys_lcd_clk", sys_lcd_clk)
> + CLKDEV_INIT(NULL, "sys_vlynq_ref_clk", sys_vlynq_ref_clk)
> + CLKDEV_INIT(NULL, "sys_tsc_clk", sys_tsc_clk)
> + CLKDEV_INIT(NULL, "sys_half_clk", sys_half_clk)
> + CLKDEV_INIT(NULL, "eth_5mhz_clk", eth_5mhz_clk)
> + CLKDEV_INIT(NULL, "eth_50mhz_clk", eth_50mhz_clk)
> + CLKDEV_INIT(NULL, "eth_125mhz_clk", eth_125mhz_clk)
> + CLKDEV_INIT(NULL, "eth_250mhz_clk", eth_250mhz_clk)
> + CLKDEV_INIT(NULL, "eth_25mhz_clk", eth_25mhz_clk)
> + CLKDEV_INIT(NULL, "tdm_0_clk", tdm_0_clk)
> + CLKDEV_INIT(NULL, "tdm_extra_clk", tdm_extra_clk)
> + CLKDEV_INIT(NULL, "tdm_1_clk", tdm_1_clk)
> + CLKDEV_INIT(NULL, "clk_arm", clk_arm)
> + CLKDEV_INIT(NULL, "clk_gem", clk_gem)
> + CLKDEV_INIT(NULL, "clk_ddr2_phy", clk_ddr2_phy)
> + CLKDEV_INIT(NULL, "clk_tpcc", clk_tpcc)
> + CLKDEV_INIT(NULL, "clk_tptc0", clk_tptc0)
> + CLKDEV_INIT(NULL, "clk_tptc1", clk_tptc1)
> + CLKDEV_INIT(NULL, "clk_ram", clk_ram)
> + CLKDEV_INIT(NULL, "clk_mbx_lite", clk_mbx_lite)
> + CLKDEV_INIT("tnetv107x-fb.0", NULL, clk_lcd)
> + CLKDEV_INIT(NULL, "clk_ethss", clk_ethss)
> + CLKDEV_INIT(NULL, "aemif", clk_aemif)
> + CLKDEV_INIT(NULL, "clk_chipcfg", clk_chipcfg)
> + CLKDEV_INIT("tnetv107x-ts.0", NULL, clk_tsc)
> + CLKDEV_INIT(NULL, "clk_rom", clk_rom)
> + CLKDEV_INIT(NULL, "uart2", clk_uart2)
> + CLKDEV_INIT(NULL, "clk_pktsec", clk_pktsec)
> + CLKDEV_INIT("tnetv107x-rng.0", NULL, clk_rng)
> + CLKDEV_INIT("tnetv107x-pka.0", NULL, clk_pka)
> + CLKDEV_INIT(NULL, "clk_secctl", clk_secctl)
> + CLKDEV_INIT(NULL, "clk_keymgr", clk_keymgr)
> + CLKDEV_INIT("tnetv107x-keypad.0", NULL, clk_keypad)
> + CLKDEV_INIT(NULL, "clk_gpio", clk_gpio)
> + CLKDEV_INIT(NULL, "clk_mdio", clk_mdio)
> + CLKDEV_INIT("davinci_mmc.0", NULL, clk_sdio0)
> + CLKDEV_INIT(NULL, "uart0", clk_uart0)
> + CLKDEV_INIT(NULL, "uart1", clk_uart1)
> + CLKDEV_INIT(NULL, "timer0", clk_timer0)
> + CLKDEV_INIT(NULL, "timer1", clk_timer1)
> + CLKDEV_INIT("tnetv107x_wdt.0", NULL, clk_wdt_arm)
> + CLKDEV_INIT(NULL, "clk_wdt_dsp", clk_wdt_dsp)
> + CLKDEV_INIT("ti-ssp", NULL, clk_ssp)
> + CLKDEV_INIT(NULL, "clk_tdm0", clk_tdm0)
> + CLKDEV_INIT(NULL, "clk_vlynq", clk_vlynq)
> + CLKDEV_INIT(NULL, "clk_mcdma", clk_mcdma)
> + CLKDEV_INIT(NULL, "clk_usbss", clk_usbss)
> + CLKDEV_INIT(NULL, "clk_usb0", clk_usb0)
> + CLKDEV_INIT(NULL, "clk_usb1", clk_usb1)
> + CLKDEV_INIT(NULL, "clk_tdm1", clk_tdm1)
> + CLKDEV_INIT(NULL, "clk_debugss", clk_debugss)
> + CLKDEV_INIT(NULL, "clk_ethss_rgmii", clk_ethss_rgmii)
> + CLKDEV_INIT(NULL, "clk_system", clk_system)
> + CLKDEV_INIT(NULL, "clk_imcop", clk_imcop)
> + CLKDEV_INIT(NULL, "clk_spare", clk_spare)
> + CLKDEV_INIT("davinci_mmc.1", NULL, clk_sdio1)
> + CLKDEV_INIT(NULL, "clk_ddr2_vrst", clk_ddr2_vrst)
> + CLKDEV_INIT(NULL, "clk_ddr2_vctl_rst", clk_ddr2_vctl_rst)
> + {.dev_id = NULL, .con_id = NULL, .clk = NULL,},
> };
>
> +
> static const struct mux_config pins[] = {
> #ifdef CONFIG_DAVINCI_MUX
> MUX_CFG(TNETV107X, ASR_A00, 0, 0, 0x1f, 0x00, false)
> diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
> index ca4de71..118c905 100644
> --- a/arch/arm/mach-ep93xx/clock.c
> +++ b/arch/arm/mach-ep93xx/clock.c
> @@ -198,39 +198,36 @@ static struct clk clk_m2m1 = {
> .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M1,
> };
>
> -#define INIT_CK(dev,con,ck) \
> - { .dev_id = dev, .con_id = con, .clk = ck }
> -
> static struct clk_lookup clocks[] = {
> - INIT_CK(NULL, "xtali", &clk_xtali),
> - INIT_CK("apb:uart1", NULL, &clk_uart1),
> - INIT_CK("apb:uart2", NULL, &clk_uart2),
> - INIT_CK("apb:uart3", NULL, &clk_uart3),
> - INIT_CK(NULL, "pll1", &clk_pll1),
> - INIT_CK(NULL, "fclk", &clk_f),
> - INIT_CK(NULL, "hclk", &clk_h),
> - INIT_CK(NULL, "apb_pclk", &clk_p),
> - INIT_CK(NULL, "pll2", &clk_pll2),
> - INIT_CK("ep93xx-ohci", NULL, &clk_usb_host),
> - INIT_CK("ep93xx-keypad", NULL, &clk_keypad),
> - INIT_CK("ep93xx-fb", NULL, &clk_video),
> - INIT_CK("ep93xx-spi.0", NULL, &clk_spi),
> - INIT_CK("ep93xx-i2s", "mclk", &clk_i2s_mclk),
> - INIT_CK("ep93xx-i2s", "sclk", &clk_i2s_sclk),
> - INIT_CK("ep93xx-i2s", "lrclk", &clk_i2s_lrclk),
> - INIT_CK(NULL, "pwm_clk", &clk_pwm),
> - INIT_CK(NULL, "m2p0", &clk_m2p0),
> - INIT_CK(NULL, "m2p1", &clk_m2p1),
> - INIT_CK(NULL, "m2p2", &clk_m2p2),
> - INIT_CK(NULL, "m2p3", &clk_m2p3),
> - INIT_CK(NULL, "m2p4", &clk_m2p4),
> - INIT_CK(NULL, "m2p5", &clk_m2p5),
> - INIT_CK(NULL, "m2p6", &clk_m2p6),
> - INIT_CK(NULL, "m2p7", &clk_m2p7),
> - INIT_CK(NULL, "m2p8", &clk_m2p8),
> - INIT_CK(NULL, "m2p9", &clk_m2p9),
> - INIT_CK(NULL, "m2m0", &clk_m2m0),
> - INIT_CK(NULL, "m2m1", &clk_m2m1),
> + CLKDEV_INIT(NULL, "xtali", clk_xtali)
> + CLKDEV_INIT("apb:uart1", NULL, clk_uart1)
> + CLKDEV_INIT("apb:uart2", NULL, clk_uart2)
> + CLKDEV_INIT("apb:uart3", NULL, clk_uart3)
> + CLKDEV_INIT(NULL, "pll1", clk_pll1)
> + CLKDEV_INIT(NULL, "fclk", clk_f)
> + CLKDEV_INIT(NULL, "hclk", clk_h)
> + CLKDEV_INIT(NULL, "apb_pclk", clk_p)
> + CLKDEV_INIT(NULL, "pll2", clk_pll2)
> + CLKDEV_INIT("ep93xx-ohci", NULL, clk_usb_host)
> + CLKDEV_INIT("ep93xx-keypad", NULL, clk_keypad)
> + CLKDEV_INIT("ep93xx-fb", NULL, clk_video)
> + CLKDEV_INIT("ep93xx-spi.0", NULL, clk_spi)
> + CLKDEV_INIT("ep93xx-i2s", "mclk", clk_i2s_mclk)
> + CLKDEV_INIT("ep93xx-i2s", "sclk", clk_i2s_sclk)
> + CLKDEV_INIT("ep93xx-i2s", "lrclk", clk_i2s_lrclk)
> + CLKDEV_INIT(NULL, "pwm_clk", clk_pwm)
> + CLKDEV_INIT(NULL, "m2p0", clk_m2p0)
> + CLKDEV_INIT(NULL, "m2p1", clk_m2p1)
> + CLKDEV_INIT(NULL, "m2p2", clk_m2p2)
> + CLKDEV_INIT(NULL, "m2p3", clk_m2p3)
> + CLKDEV_INIT(NULL, "m2p4", clk_m2p4)
> + CLKDEV_INIT(NULL, "m2p5", clk_m2p5)
> + CLKDEV_INIT(NULL, "m2p6", clk_m2p6)
> + CLKDEV_INIT(NULL, "m2p7", clk_m2p7)
> + CLKDEV_INIT(NULL, "m2p8", clk_m2p8)
> + CLKDEV_INIT(NULL, "m2p9", clk_m2p9)
> + CLKDEV_INIT(NULL, "m2m0", clk_m2m0)
> + CLKDEV_INIT(NULL, "m2m1", clk_m2m1)
> };
>
> static DEFINE_SPINLOCK(clk_lock);
> diff --git a/arch/arm/mach-imx/clock-imx1.c b/arch/arm/mach-imx/clock-imx1.c
> index 4aabeb2..bb22c33 100644
> --- a/arch/arm/mach-imx/clock-imx1.c
> +++ b/arch/arm/mach-imx/clock-imx1.c
> @@ -575,29 +575,23 @@ static struct clk rtc_clk = {
> .parent = &clk32,
> };
>
> -#define _REGISTER_CLOCK(d, n, c) \
> - { \
> - .dev_id = d, \
> - .con_id = n, \
> - .clk = &c, \
> - },
> static struct clk_lookup lookups[] __initdata = {
> - _REGISTER_CLOCK(NULL, "dma", dma_clk)
> - _REGISTER_CLOCK("mx1-camera.0", NULL, csi_clk)
> - _REGISTER_CLOCK(NULL, "mma", mma_clk)
> - _REGISTER_CLOCK("imx_udc.0", NULL, usbd_clk)
> - _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
> - _REGISTER_CLOCK("imx1-uart.0", NULL, uart_clk)
> - _REGISTER_CLOCK("imx1-uart.1", NULL, uart_clk)
> - _REGISTER_CLOCK("imx1-uart.2", NULL, uart_clk)
> - _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
> - _REGISTER_CLOCK("imx1-cspi.0", NULL, spi_clk)
> - _REGISTER_CLOCK("imx1-cspi.1", NULL, spi_clk)
> - _REGISTER_CLOCK("imx-mmc.0", NULL, sdhc_clk)
> - _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
> - _REGISTER_CLOCK(NULL, "mshc", mshc_clk)
> - _REGISTER_CLOCK(NULL, "ssi", ssi_clk)
> - _REGISTER_CLOCK("mxc_rtc.0", NULL, rtc_clk)
> + CLKDEV_INIT(NULL, "dma", dma_clk)
> + CLKDEV_INIT("mx1-camera.0", NULL, csi_clk)
> + CLKDEV_INIT(NULL, "mma", mma_clk)
> + CLKDEV_INIT("imx_udc.0", NULL, usbd_clk)
> + CLKDEV_INIT(NULL, "gpt", gpt_clk)
> + CLKDEV_INIT("imx1-uart.0", NULL, uart_clk)
> + CLKDEV_INIT("imx1-uart.1", NULL, uart_clk)
> + CLKDEV_INIT("imx1-uart.2", NULL, uart_clk)
> + CLKDEV_INIT("imx-i2c.0", NULL, i2c_clk)
> + CLKDEV_INIT("imx1-cspi.0", NULL, spi_clk)
> + CLKDEV_INIT("imx1-cspi.1", NULL, spi_clk)
> + CLKDEV_INIT("imx-mmc.0", NULL, sdhc_clk)
> + CLKDEV_INIT("imx-fb.0", NULL, lcdc_clk)
> + CLKDEV_INIT(NULL, "mshc", mshc_clk)
> + CLKDEV_INIT(NULL, "ssi", ssi_clk)
> + CLKDEV_INIT("mxc_rtc.0", NULL, rtc_clk)
> };
>
> int __init mx1_clocks_init(unsigned long fref)
> diff --git a/arch/arm/mach-imx/clock-imx21.c b/arch/arm/mach-imx/clock-imx21.c
> index ee15d8c..87fd48e 100644
> --- a/arch/arm/mach-imx/clock-imx21.c
> +++ b/arch/arm/mach-imx/clock-imx21.c
> @@ -1139,58 +1139,51 @@ static struct clk clko_clk = {
> .set_parent = _clk_clko_set_parent,
> };
>
> -
> -#define _REGISTER_CLOCK(d, n, c) \
> - { \
> - .dev_id = d, \
> - .con_id = n, \
> - .clk = &c, \
> - },
> static struct clk_lookup lookups[] = {
> /* It's unlikely that any driver wants one of them directly:
> - _REGISTER_CLOCK(NULL, "ckih", ckih_clk)
> - _REGISTER_CLOCK(NULL, "ckil", ckil_clk)
> - _REGISTER_CLOCK(NULL, "fpm", fpm_clk)
> - _REGISTER_CLOCK(NULL, "mpll", mpll_clk)
> - _REGISTER_CLOCK(NULL, "spll", spll_clk)
> - _REGISTER_CLOCK(NULL, "fclk", fclk_clk)
> - _REGISTER_CLOCK(NULL, "hclk", hclk_clk)
> - _REGISTER_CLOCK(NULL, "ipg", ipg_clk)
> + CLKDEV_INIT(NULL, "ckih", ckih_clk)
> + CLKDEV_INIT(NULL, "ckil", ckil_clk)
> + CLKDEV_INIT(NULL, "fpm", fpm_clk)
> + CLKDEV_INIT(NULL, "mpll", mpll_clk)
> + CLKDEV_INIT(NULL, "spll", spll_clk)
> + CLKDEV_INIT(NULL, "fclk", fclk_clk)
> + CLKDEV_INIT(NULL, "hclk", hclk_clk)
> + CLKDEV_INIT(NULL, "ipg", ipg_clk)
> */
> - _REGISTER_CLOCK(NULL, "perclk1", per_clk[0])
> - _REGISTER_CLOCK(NULL, "perclk2", per_clk[1])
> - _REGISTER_CLOCK(NULL, "perclk3", per_clk[2])
> - _REGISTER_CLOCK(NULL, "perclk4", per_clk[3])
> - _REGISTER_CLOCK(NULL, "clko", clko_clk)
> - _REGISTER_CLOCK("imx21-uart.0", NULL, uart_clk[0])
> - _REGISTER_CLOCK("imx21-uart.1", NULL, uart_clk[1])
> - _REGISTER_CLOCK("imx21-uart.2", NULL, uart_clk[2])
> - _REGISTER_CLOCK("imx21-uart.3", NULL, uart_clk[3])
> - _REGISTER_CLOCK(NULL, "gpt1", gpt_clk[0])
> - _REGISTER_CLOCK(NULL, "gpt1", gpt_clk[1])
> - _REGISTER_CLOCK(NULL, "gpt1", gpt_clk[2])
> - _REGISTER_CLOCK(NULL, "pwm", pwm_clk[0])
> - _REGISTER_CLOCK(NULL, "sdhc1", sdhc_clk[0])
> - _REGISTER_CLOCK(NULL, "sdhc2", sdhc_clk[1])
> - _REGISTER_CLOCK("imx21-cspi.0", NULL, cspi_clk[0])
> - _REGISTER_CLOCK("imx21-cspi.1", NULL, cspi_clk[1])
> - _REGISTER_CLOCK("imx21-cspi.2", NULL, cspi_clk[2])
> - _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk[0])
> - _REGISTER_CLOCK(NULL, "csi", csi_clk[0])
> - _REGISTER_CLOCK("imx21-hcd.0", NULL, usb_clk[0])
> - _REGISTER_CLOCK(NULL, "ssi1", ssi_clk[0])
> - _REGISTER_CLOCK(NULL, "ssi2", ssi_clk[1])
> - _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
> - _REGISTER_CLOCK(NULL, "dma", dma_clk[0])
> - _REGISTER_CLOCK(NULL, "brom", brom_clk)
> - _REGISTER_CLOCK(NULL, "emma", emma_clk[0])
> - _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk[0])
> - _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
> - _REGISTER_CLOCK(NULL, "gpio", gpio_clk)
> - _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
> - _REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk)
> - _REGISTER_CLOCK(NULL, "owire", owire_clk)
> - _REGISTER_CLOCK(NULL, "rtc", rtc_clk)
> + CLKDEV_INIT(NULL, "perclk1", per_clk[0])
> + CLKDEV_INIT(NULL, "perclk2", per_clk[1])
> + CLKDEV_INIT(NULL, "perclk3", per_clk[2])
> + CLKDEV_INIT(NULL, "perclk4", per_clk[3])
> + CLKDEV_INIT(NULL, "clko", clko_clk)
> + CLKDEV_INIT("imx21-uart.0", NULL, uart_clk[0])
> + CLKDEV_INIT("imx21-uart.1", NULL, uart_clk[1])
> + CLKDEV_INIT("imx21-uart.2", NULL, uart_clk[2])
> + CLKDEV_INIT("imx21-uart.3", NULL, uart_clk[3])
> + CLKDEV_INIT(NULL, "gpt1", gpt_clk[0])
> + CLKDEV_INIT(NULL, "gpt1", gpt_clk[1])
> + CLKDEV_INIT(NULL, "gpt1", gpt_clk[2])
> + CLKDEV_INIT(NULL, "pwm", pwm_clk[0])
> + CLKDEV_INIT(NULL, "sdhc1", sdhc_clk[0])
> + CLKDEV_INIT(NULL, "sdhc2", sdhc_clk[1])
> + CLKDEV_INIT("imx21-cspi.0", NULL, cspi_clk[0])
> + CLKDEV_INIT("imx21-cspi.1", NULL, cspi_clk[1])
> + CLKDEV_INIT("imx21-cspi.2", NULL, cspi_clk[2])
> + CLKDEV_INIT("imx-fb.0", NULL, lcdc_clk[0])
> + CLKDEV_INIT(NULL, "csi", csi_clk[0])
> + CLKDEV_INIT("imx21-hcd.0", NULL, usb_clk[0])
> + CLKDEV_INIT(NULL, "ssi1", ssi_clk[0])
> + CLKDEV_INIT(NULL, "ssi2", ssi_clk[1])
> + CLKDEV_INIT("mxc_nand.0", NULL, nfc_clk)
> + CLKDEV_INIT(NULL, "dma", dma_clk[0])
> + CLKDEV_INIT(NULL, "brom", brom_clk)
> + CLKDEV_INIT(NULL, "emma", emma_clk[0])
> + CLKDEV_INIT(NULL, "slcdc", slcdc_clk[0])
> + CLKDEV_INIT("imx2-wdt.0", NULL, wdog_clk)
> + CLKDEV_INIT(NULL, "gpio", gpio_clk)
> + CLKDEV_INIT("imx-i2c.0", NULL, i2c_clk)
> + CLKDEV_INIT("mxc-keypad", NULL, kpp_clk)
> + CLKDEV_INIT(NULL, "owire", owire_clk)
> + CLKDEV_INIT(NULL, "rtc", rtc_clk)
> };
>
> /*
> diff --git a/arch/arm/mach-imx/clock-imx25.c b/arch/arm/mach-imx/clock-imx25.c
> index e63e235..993e4fc 100644
> --- a/arch/arm/mach-imx/clock-imx25.c
> +++ b/arch/arm/mach-imx/clock-imx25.c
> @@ -264,52 +264,45 @@ DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk);
> DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL);
> DEFINE_CLOCK(can2_clk, 1, CCM_CGCR1, 3, get_rate_ipg, NULL, NULL);
>
> -#define _REGISTER_CLOCK(d, n, c) \
> - { \
> - .dev_id = d, \
> - .con_id = n, \
> - .clk = &c, \
> - },
> -
> static struct clk_lookup lookups[] = {
> /* i.mx25 has the i.mx21 type uart */
> - _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)
> - _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)
> - _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)
> - _REGISTER_CLOCK("imx21-uart.3", NULL, uart4_clk)
> - _REGISTER_CLOCK("imx21-uart.4", NULL, uart5_clk)
> - _REGISTER_CLOCK("mxc-ehci.0", "usb", usbotg_clk)
> - _REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk)
> - _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk)
> - _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk)
> - _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
> + CLKDEV_INIT("imx21-uart.0", NULL, uart1_clk)
> + CLKDEV_INIT("imx21-uart.1", NULL, uart2_clk)
> + CLKDEV_INIT("imx21-uart.2", NULL, uart3_clk)
> + CLKDEV_INIT("imx21-uart.3", NULL, uart4_clk)
> + CLKDEV_INIT("imx21-uart.4", NULL, uart5_clk)
> + CLKDEV_INIT("mxc-ehci.0", "usb", usbotg_clk)
> + CLKDEV_INIT("mxc-ehci.1", "usb", usbotg_clk)
> + CLKDEV_INIT("mxc-ehci.2", "usb", usbotg_clk)
> + CLKDEV_INIT("fsl-usb2-udc", "usb", usbotg_clk)
> + CLKDEV_INIT("mxc_nand.0", NULL, nfc_clk)
> /* i.mx25 has the i.mx35 type cspi */
> - _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi1_clk)
> - _REGISTER_CLOCK("imx35-cspi.1", NULL, cspi2_clk)
> - _REGISTER_CLOCK("imx35-cspi.2", NULL, cspi3_clk)
> - _REGISTER_CLOCK("mxc_pwm.0", NULL, pwm1_clk)
> - _REGISTER_CLOCK("mxc_pwm.1", NULL, pwm2_clk)
> - _REGISTER_CLOCK("mxc_pwm.2", NULL, pwm3_clk)
> - _REGISTER_CLOCK("mxc_pwm.3", NULL, pwm4_clk)
> - _REGISTER_CLOCK("imx-keypad", NULL, kpp_clk)
> - _REGISTER_CLOCK("mx25-adc", NULL, tsc_clk)
> - _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
> - _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
> - _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
> - _REGISTER_CLOCK("imx25-fec.0", NULL, fec_clk)
> - _REGISTER_CLOCK("imxdi_rtc.0", NULL, dryice_clk)
> - _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
> - _REGISTER_CLOCK("imx2-wdt.0", NULL, wdt_clk)
> - _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
> - _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
> - _REGISTER_CLOCK("sdhci-esdhc-imx25.0", NULL, esdhc1_clk)
> - _REGISTER_CLOCK("sdhci-esdhc-imx25.1", NULL, esdhc2_clk)
> - _REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk)
> - _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
> - _REGISTER_CLOCK("flexcan.0", NULL, can1_clk)
> - _REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
> + CLKDEV_INIT("imx35-cspi.0", NULL, cspi1_clk)
> + CLKDEV_INIT("imx35-cspi.1", NULL, cspi2_clk)
> + CLKDEV_INIT("imx35-cspi.2", NULL, cspi3_clk)
> + CLKDEV_INIT("mxc_pwm.0", NULL, pwm1_clk)
> + CLKDEV_INIT("mxc_pwm.1", NULL, pwm2_clk)
> + CLKDEV_INIT("mxc_pwm.2", NULL, pwm3_clk)
> + CLKDEV_INIT("mxc_pwm.3", NULL, pwm4_clk)
> + CLKDEV_INIT("imx-keypad", NULL, kpp_clk)
> + CLKDEV_INIT("mx25-adc", NULL, tsc_clk)
> + CLKDEV_INIT("imx-i2c.0", NULL, i2c_clk)
> + CLKDEV_INIT("imx-i2c.1", NULL, i2c_clk)
> + CLKDEV_INIT("imx-i2c.2", NULL, i2c_clk)
> + CLKDEV_INIT("imx25-fec.0", NULL, fec_clk)
> + CLKDEV_INIT("imxdi_rtc.0", NULL, dryice_clk)
> + CLKDEV_INIT("imx-fb.0", NULL, lcdc_clk)
> + CLKDEV_INIT("imx2-wdt.0", NULL, wdt_clk)
> + CLKDEV_INIT("imx-ssi.0", NULL, ssi1_clk)
> + CLKDEV_INIT("imx-ssi.1", NULL, ssi2_clk)
> + CLKDEV_INIT("sdhci-esdhc-imx25.0", NULL, esdhc1_clk)
> + CLKDEV_INIT("sdhci-esdhc-imx25.1", NULL, esdhc2_clk)
> + CLKDEV_INIT("mx2-camera.0", NULL, csi_clk)
> + CLKDEV_INIT(NULL, "audmux", audmux_clk)
> + CLKDEV_INIT("flexcan.0", NULL, can1_clk)
> + CLKDEV_INIT("flexcan.1", NULL, can2_clk)
> /* i.mx25 has the i.mx35 type sdma */
> - _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
> + CLKDEV_INIT("imx35-sdma", NULL, sdma_clk)
> };
>
> int __init mx25_clocks_init(void)
> diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c
> index 6912b82..e802326 100644
> --- a/arch/arm/mach-imx/clock-imx27.c
> +++ b/arch/arm/mach-imx/clock-imx27.c
> @@ -616,67 +616,60 @@ DEFINE_CLOCK(uart6_clk, 5, NULL, 0, NULL, &uart6_clk1, &per1_clk);
> DEFINE_CLOCK1(lcdc_clk, 0, NULL, 0, parent, &lcdc_clk1, &per3_clk);
> DEFINE_CLOCK1(csi_clk, 0, NULL, 0, parent, &csi_clk1, &per4_clk);
>
> -#define _REGISTER_CLOCK(d, n, c) \
> - { \
> - .dev_id = d, \
> - .con_id = n, \
> - .clk = &c, \
> - },
> -
> static struct clk_lookup lookups[] = {
> /* i.mx27 has the i.mx21 type uart */
> - _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)
> - _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)
> - _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)
> - _REGISTER_CLOCK("imx21-uart.3", NULL, uart4_clk)
> - _REGISTER_CLOCK("imx21-uart.4", NULL, uart5_clk)
> - _REGISTER_CLOCK("imx21-uart.5", NULL, uart6_clk)
> - _REGISTER_CLOCK(NULL, "gpt1", gpt1_clk)
> - _REGISTER_CLOCK(NULL, "gpt2", gpt2_clk)
> - _REGISTER_CLOCK(NULL, "gpt3", gpt3_clk)
> - _REGISTER_CLOCK(NULL, "gpt4", gpt4_clk)
> - _REGISTER_CLOCK(NULL, "gpt5", gpt5_clk)
> - _REGISTER_CLOCK(NULL, "gpt6", gpt6_clk)
> - _REGISTER_CLOCK("mxc_pwm.0", NULL, pwm_clk)
> - _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk)
> - _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk)
> - _REGISTER_CLOCK("mxc-mmc.2", NULL, sdhc3_clk)
> - _REGISTER_CLOCK("imx27-cspi.0", NULL, cspi1_clk)
> - _REGISTER_CLOCK("imx27-cspi.1", NULL, cspi2_clk)
> - _REGISTER_CLOCK("imx27-cspi.2", NULL, cspi3_clk)
> - _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
> - _REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk)
> - _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk)
> - _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk1)
> - _REGISTER_CLOCK("mxc-ehci.0", "usb", usb_clk)
> - _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_clk1)
> - _REGISTER_CLOCK("mxc-ehci.1", "usb", usb_clk)
> - _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_clk1)
> - _REGISTER_CLOCK("mxc-ehci.2", "usb", usb_clk)
> - _REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_clk1)
> - _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
> - _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
> - _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
> - _REGISTER_CLOCK(NULL, "vpu", vpu_clk)
> - _REGISTER_CLOCK(NULL, "dma", dma_clk)
> - _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
> - _REGISTER_CLOCK(NULL, "brom", brom_clk)
> - _REGISTER_CLOCK(NULL, "emma", emma_clk)
> - _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk)
> - _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)
> - _REGISTER_CLOCK(NULL, "emi", emi_clk)
> - _REGISTER_CLOCK(NULL, "sahara2", sahara2_clk)
> - _REGISTER_CLOCK(NULL, "ata", ata_clk)
> - _REGISTER_CLOCK(NULL, "mstick", mstick_clk)
> - _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
> - _REGISTER_CLOCK(NULL, "gpio", gpio_clk)
> - _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
> - _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
> - _REGISTER_CLOCK(NULL, "iim", iim_clk)
> - _REGISTER_CLOCK(NULL, "kpp", kpp_clk)
> - _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk)
> - _REGISTER_CLOCK(NULL, "rtc", rtc_clk)
> - _REGISTER_CLOCK(NULL, "scc", scc_clk)
> + CLKDEV_INIT("imx21-uart.0", NULL, uart1_clk)
> + CLKDEV_INIT("imx21-uart.1", NULL, uart2_clk)
> + CLKDEV_INIT("imx21-uart.2", NULL, uart3_clk)
> + CLKDEV_INIT("imx21-uart.3", NULL, uart4_clk)
> + CLKDEV_INIT("imx21-uart.4", NULL, uart5_clk)
> + CLKDEV_INIT("imx21-uart.5", NULL, uart6_clk)
> + CLKDEV_INIT(NULL, "gpt1", gpt1_clk)
> + CLKDEV_INIT(NULL, "gpt2", gpt2_clk)
> + CLKDEV_INIT(NULL, "gpt3", gpt3_clk)
> + CLKDEV_INIT(NULL, "gpt4", gpt4_clk)
> + CLKDEV_INIT(NULL, "gpt5", gpt5_clk)
> + CLKDEV_INIT(NULL, "gpt6", gpt6_clk)
> + CLKDEV_INIT("mxc_pwm.0", NULL, pwm_clk)
> + CLKDEV_INIT("mxc-mmc.0", NULL, sdhc1_clk)
> + CLKDEV_INIT("mxc-mmc.1", NULL, sdhc2_clk)
> + CLKDEV_INIT("mxc-mmc.2", NULL, sdhc3_clk)
> + CLKDEV_INIT("imx27-cspi.0", NULL, cspi1_clk)
> + CLKDEV_INIT("imx27-cspi.1", NULL, cspi2_clk)
> + CLKDEV_INIT("imx27-cspi.2", NULL, cspi3_clk)
> + CLKDEV_INIT("imx-fb.0", NULL, lcdc_clk)
> + CLKDEV_INIT("mx2-camera.0", NULL, csi_clk)
> + CLKDEV_INIT("fsl-usb2-udc", "usb", usb_clk)
> + CLKDEV_INIT("fsl-usb2-udc", "usb_ahb", usb_clk1)
> + CLKDEV_INIT("mxc-ehci.0", "usb", usb_clk)
> + CLKDEV_INIT("mxc-ehci.0", "usb_ahb", usb_clk1)
> + CLKDEV_INIT("mxc-ehci.1", "usb", usb_clk)
> + CLKDEV_INIT("mxc-ehci.1", "usb_ahb", usb_clk1)
> + CLKDEV_INIT("mxc-ehci.2", "usb", usb_clk)
> + CLKDEV_INIT("mxc-ehci.2", "usb_ahb", usb_clk1)
> + CLKDEV_INIT("imx-ssi.0", NULL, ssi1_clk)
> + CLKDEV_INIT("imx-ssi.1", NULL, ssi2_clk)
> + CLKDEV_INIT("mxc_nand.0", NULL, nfc_clk)
> + CLKDEV_INIT(NULL, "vpu", vpu_clk)
> + CLKDEV_INIT(NULL, "dma", dma_clk)
> + CLKDEV_INIT(NULL, "rtic", rtic_clk)
> + CLKDEV_INIT(NULL, "brom", brom_clk)
> + CLKDEV_INIT(NULL, "emma", emma_clk)
> + CLKDEV_INIT(NULL, "slcdc", slcdc_clk)
> + CLKDEV_INIT("imx27-fec.0", NULL, fec_clk)
> + CLKDEV_INIT(NULL, "emi", emi_clk)
> + CLKDEV_INIT(NULL, "sahara2", sahara2_clk)
> + CLKDEV_INIT(NULL, "ata", ata_clk)
> + CLKDEV_INIT(NULL, "mstick", mstick_clk)
> + CLKDEV_INIT("imx2-wdt.0", NULL, wdog_clk)
> + CLKDEV_INIT(NULL, "gpio", gpio_clk)
> + CLKDEV_INIT("imx-i2c.0", NULL, i2c1_clk)
> + CLKDEV_INIT("imx-i2c.1", NULL, i2c2_clk)
> + CLKDEV_INIT(NULL, "iim", iim_clk)
> + CLKDEV_INIT(NULL, "kpp", kpp_clk)
> + CLKDEV_INIT("mxc_w1.0", NULL, owire_clk)
> + CLKDEV_INIT(NULL, "rtc", rtc_clk)
> + CLKDEV_INIT(NULL, "scc", scc_clk)
> };
>
> /* Adjust the clock path for TO2 and later */
> diff --git a/arch/arm/mach-imx/clock-imx31.c b/arch/arm/mach-imx/clock-imx31.c
> index d973770..0fd156f 100644
> --- a/arch/arm/mach-imx/clock-imx31.c
> +++ b/arch/arm/mach-imx/clock-imx31.c
> @@ -516,63 +516,56 @@ DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk);
> DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk);
> DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk);
>
> -#define _REGISTER_CLOCK(d, n, c) \
> - { \
> - .dev_id = d, \
> - .con_id = n, \
> - .clk = &c, \
> - },
> -
> static struct clk_lookup lookups[] = {
> - _REGISTER_CLOCK(NULL, "emi", emi_clk)
> - _REGISTER_CLOCK("imx31-cspi.0", NULL, cspi1_clk)
> - _REGISTER_CLOCK("imx31-cspi.1", NULL, cspi2_clk)
> - _REGISTER_CLOCK("imx31-cspi.2", NULL, cspi3_clk)
> - _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
> - _REGISTER_CLOCK(NULL, "pwm", pwm_clk)
> - _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
> - _REGISTER_CLOCK(NULL, "rtc", rtc_clk)
> - _REGISTER_CLOCK(NULL, "epit", epit1_clk)
> - _REGISTER_CLOCK(NULL, "epit", epit2_clk)
> - _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
> - _REGISTER_CLOCK("ipu-core", NULL, ipu_clk)
> - _REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk)
> - _REGISTER_CLOCK(NULL, "kpp", kpp_clk)
> - _REGISTER_CLOCK("mxc-ehci.0", "usb", usb_clk1)
> - _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_clk2)
> - _REGISTER_CLOCK("mxc-ehci.1", "usb", usb_clk1)
> - _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_clk2)
> - _REGISTER_CLOCK("mxc-ehci.2", "usb", usb_clk1)
> - _REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_clk2)
> - _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1)
> - _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2)
> - _REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk)
> + CLKDEV_INIT(NULL, "emi", emi_clk)
> + CLKDEV_INIT("imx31-cspi.0", NULL, cspi1_clk)
> + CLKDEV_INIT("imx31-cspi.1", NULL, cspi2_clk)
> + CLKDEV_INIT("imx31-cspi.2", NULL, cspi3_clk)
> + CLKDEV_INIT(NULL, "gpt", gpt_clk)
> + CLKDEV_INIT(NULL, "pwm", pwm_clk)
> + CLKDEV_INIT("imx2-wdt.0", NULL, wdog_clk)
> + CLKDEV_INIT(NULL, "rtc", rtc_clk)
> + CLKDEV_INIT(NULL, "epit", epit1_clk)
> + CLKDEV_INIT(NULL, "epit", epit2_clk)
> + CLKDEV_INIT("mxc_nand.0", NULL, nfc_clk)
> + CLKDEV_INIT("ipu-core", NULL, ipu_clk)
> + CLKDEV_INIT("mx3_sdc_fb", NULL, ipu_clk)
> + CLKDEV_INIT(NULL, "kpp", kpp_clk)
> + CLKDEV_INIT("mxc-ehci.0", "usb", usb_clk1)
> + CLKDEV_INIT("mxc-ehci.0", "usb_ahb", usb_clk2)
> + CLKDEV_INIT("mxc-ehci.1", "usb", usb_clk1)
> + CLKDEV_INIT("mxc-ehci.1", "usb_ahb", usb_clk2)
> + CLKDEV_INIT("mxc-ehci.2", "usb", usb_clk1)
> + CLKDEV_INIT("mxc-ehci.2", "usb_ahb", usb_clk2)
> + CLKDEV_INIT("fsl-usb2-udc", "usb", usb_clk1)
> + CLKDEV_INIT("fsl-usb2-udc", "usb_ahb", usb_clk2)
> + CLKDEV_INIT("mx3-camera.0", NULL, csi_clk)
> /* i.mx31 has the i.mx21 type uart */
> - _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)
> - _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)
> - _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)
> - _REGISTER_CLOCK("imx21-uart.3", NULL, uart4_clk)
> - _REGISTER_CLOCK("imx21-uart.4", NULL, uart5_clk)
> - _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
> - _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
> - _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk)
> - _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk)
> - _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk)
> - _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk)
> - _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
> - _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
> - _REGISTER_CLOCK(NULL, "firi", firi_clk)
> - _REGISTER_CLOCK(NULL, "ata", ata_clk)
> - _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
> - _REGISTER_CLOCK(NULL, "rng", rng_clk)
> - _REGISTER_CLOCK("imx31-sdma", NULL, sdma_clk1)
> - _REGISTER_CLOCK(NULL, "sdma_ipg", sdma_clk2)
> - _REGISTER_CLOCK(NULL, "mstick", mstick1_clk)
> - _REGISTER_CLOCK(NULL, "mstick", mstick2_clk)
> - _REGISTER_CLOCK(NULL, "scc", scc_clk)
> - _REGISTER_CLOCK(NULL, "iim", iim_clk)
> - _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk)
> - _REGISTER_CLOCK(NULL, "mbx", mbx_clk)
> + CLKDEV_INIT("imx21-uart.0", NULL, uart1_clk)
> + CLKDEV_INIT("imx21-uart.1", NULL, uart2_clk)
> + CLKDEV_INIT("imx21-uart.2", NULL, uart3_clk)
> + CLKDEV_INIT("imx21-uart.3", NULL, uart4_clk)
> + CLKDEV_INIT("imx21-uart.4", NULL, uart5_clk)
> + CLKDEV_INIT("imx-i2c.0", NULL, i2c1_clk)
> + CLKDEV_INIT("imx-i2c.1", NULL, i2c2_clk)
> + CLKDEV_INIT("imx-i2c.2", NULL, i2c3_clk)
> + CLKDEV_INIT("mxc_w1.0", NULL, owire_clk)
> + CLKDEV_INIT("mxc-mmc.0", NULL, sdhc1_clk)
> + CLKDEV_INIT("mxc-mmc.1", NULL, sdhc2_clk)
> + CLKDEV_INIT("imx-ssi.0", NULL, ssi1_clk)
> + CLKDEV_INIT("imx-ssi.1", NULL, ssi2_clk)
> + CLKDEV_INIT(NULL, "firi", firi_clk)
> + CLKDEV_INIT(NULL, "ata", ata_clk)
> + CLKDEV_INIT(NULL, "rtic", rtic_clk)
> + CLKDEV_INIT(NULL, "rng", rng_clk)
> + CLKDEV_INIT("imx31-sdma", NULL, sdma_clk1)
> + CLKDEV_INIT(NULL, "sdma_ipg", sdma_clk2)
> + CLKDEV_INIT(NULL, "mstick", mstick1_clk)
> + CLKDEV_INIT(NULL, "mstick", mstick2_clk)
> + CLKDEV_INIT(NULL, "scc", scc_clk)
> + CLKDEV_INIT(NULL, "iim", iim_clk)
> + CLKDEV_INIT(NULL, "mpeg4", mpeg4_clk)
> + CLKDEV_INIT(NULL, "mbx", mbx_clk)
> };
>
> int __init mx31_clocks_init(unsigned long fref)
> diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
> index 88b62a0..8bcce3a 100644
> --- a/arch/arm/mach-imx/clock-imx35.c
> +++ b/arch/arm/mach-imx/clock-imx35.c
> @@ -438,71 +438,64 @@ static struct clk nfc_clk = {
> .disable = clk_dummy_disable
> };
>
> -#define _REGISTER_CLOCK(d, n, c) \
> - { \
> - .dev_id = d, \
> - .con_id = n, \
> - .clk = &c, \
> - },
> -
> static struct clk_lookup lookups[] = {
> - _REGISTER_CLOCK(NULL, "asrc", asrc_clk)
> - _REGISTER_CLOCK(NULL, "ata", ata_clk)
> - _REGISTER_CLOCK("flexcan.0", NULL, can1_clk)
> - _REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
> - _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi1_clk)
> - _REGISTER_CLOCK("imx35-cspi.1", NULL, cspi2_clk)
> - _REGISTER_CLOCK(NULL, "ect", ect_clk)
> - _REGISTER_CLOCK(NULL, "edio", edio_clk)
> - _REGISTER_CLOCK(NULL, "emi", emi_clk)
> - _REGISTER_CLOCK("imx-epit.0", NULL, epit1_clk)
> - _REGISTER_CLOCK("imx-epit.1", NULL, epit2_clk)
> - _REGISTER_CLOCK(NULL, "esai", esai_clk)
> - _REGISTER_CLOCK("sdhci-esdhc-imx35.0", NULL, esdhc1_clk)
> - _REGISTER_CLOCK("sdhci-esdhc-imx35.1", NULL, esdhc2_clk)
> - _REGISTER_CLOCK("sdhci-esdhc-imx35.2", NULL, esdhc3_clk)
> + CLKDEV_INIT(NULL, "asrc", asrc_clk)
> + CLKDEV_INIT(NULL, "ata", ata_clk)
> + CLKDEV_INIT("flexcan.0", NULL, can1_clk)
> + CLKDEV_INIT("flexcan.1", NULL, can2_clk)
> + CLKDEV_INIT("imx35-cspi.0", NULL, cspi1_clk)
> + CLKDEV_INIT("imx35-cspi.1", NULL, cspi2_clk)
> + CLKDEV_INIT(NULL, "ect", ect_clk)
> + CLKDEV_INIT(NULL, "edio", edio_clk)
> + CLKDEV_INIT(NULL, "emi", emi_clk)
> + CLKDEV_INIT("imx-epit.0", NULL, epit1_clk)
> + CLKDEV_INIT("imx-epit.1", NULL, epit2_clk)
> + CLKDEV_INIT(NULL, "esai", esai_clk)
> + CLKDEV_INIT("sdhci-esdhc-imx35.0", NULL, esdhc1_clk)
> + CLKDEV_INIT("sdhci-esdhc-imx35.1", NULL, esdhc2_clk)
> + CLKDEV_INIT("sdhci-esdhc-imx35.2", NULL, esdhc3_clk)
> /* i.mx35 has the i.mx27 type fec */
> - _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)
> - _REGISTER_CLOCK(NULL, "gpio", gpio1_clk)
> - _REGISTER_CLOCK(NULL, "gpio", gpio2_clk)
> - _REGISTER_CLOCK(NULL, "gpio", gpio3_clk)
> - _REGISTER_CLOCK("gpt.0", NULL, gpt_clk)
> - _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
> - _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
> - _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk)
> - _REGISTER_CLOCK(NULL, "iomuxc", iomuxc_clk)
> - _REGISTER_CLOCK("ipu-core", NULL, ipu_clk)
> - _REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk)
> - _REGISTER_CLOCK(NULL, "kpp", kpp_clk)
> - _REGISTER_CLOCK(NULL, "mlb", mlb_clk)
> - _REGISTER_CLOCK(NULL, "mshc", mshc_clk)
> - _REGISTER_CLOCK("mxc_w1", NULL, owire_clk)
> - _REGISTER_CLOCK(NULL, "pwm", pwm_clk)
> - _REGISTER_CLOCK(NULL, "rngc", rngc_clk)
> - _REGISTER_CLOCK(NULL, "rtc", rtc_clk)
> - _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
> - _REGISTER_CLOCK(NULL, "scc", scc_clk)
> - _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
> - _REGISTER_CLOCK(NULL, "spba", spba_clk)
> - _REGISTER_CLOCK(NULL, "spdif", spdif_clk)
> - _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
> - _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
> + CLKDEV_INIT("imx27-fec.0", NULL, fec_clk)
> + CLKDEV_INIT(NULL, "gpio", gpio1_clk)
> + CLKDEV_INIT(NULL, "gpio", gpio2_clk)
> + CLKDEV_INIT(NULL, "gpio", gpio3_clk)
> + CLKDEV_INIT("gpt.0", NULL, gpt_clk)
> + CLKDEV_INIT("imx-i2c.0", NULL, i2c1_clk)
> + CLKDEV_INIT("imx-i2c.1", NULL, i2c2_clk)
> + CLKDEV_INIT("imx-i2c.2", NULL, i2c3_clk)
> + CLKDEV_INIT(NULL, "iomuxc", iomuxc_clk)
> + CLKDEV_INIT("ipu-core", NULL, ipu_clk)
> + CLKDEV_INIT("mx3_sdc_fb", NULL, ipu_clk)
> + CLKDEV_INIT(NULL, "kpp", kpp_clk)
> + CLKDEV_INIT(NULL, "mlb", mlb_clk)
> + CLKDEV_INIT(NULL, "mshc", mshc_clk)
> + CLKDEV_INIT("mxc_w1", NULL, owire_clk)
> + CLKDEV_INIT(NULL, "pwm", pwm_clk)
> + CLKDEV_INIT(NULL, "rngc", rngc_clk)
> + CLKDEV_INIT(NULL, "rtc", rtc_clk)
> + CLKDEV_INIT(NULL, "rtic", rtic_clk)
> + CLKDEV_INIT(NULL, "scc", scc_clk)
> + CLKDEV_INIT("imx35-sdma", NULL, sdma_clk)
> + CLKDEV_INIT(NULL, "spba", spba_clk)
> + CLKDEV_INIT(NULL, "spdif", spdif_clk)
> + CLKDEV_INIT("imx-ssi.0", NULL, ssi1_clk)
> + CLKDEV_INIT("imx-ssi.1", NULL, ssi2_clk)
> /* i.mx35 has the i.mx21 type uart */
> - _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)
> - _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)
> - _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)
> - _REGISTER_CLOCK("mxc-ehci.0", "usb", usbotg_clk)
> - _REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk)
> - _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk)
> - _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk)
> - _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usbahb_clk)
> - _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
> - _REGISTER_CLOCK(NULL, "max", max_clk)
> - _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
> - _REGISTER_CLOCK(NULL, "csi", csi_clk)
> - _REGISTER_CLOCK(NULL, "iim", iim_clk)
> - _REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk)
> - _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
> + CLKDEV_INIT("imx21-uart.0", NULL, uart1_clk)
> + CLKDEV_INIT("imx21-uart.1", NULL, uart2_clk)
> + CLKDEV_INIT("imx21-uart.2", NULL, uart3_clk)
> + CLKDEV_INIT("mxc-ehci.0", "usb", usbotg_clk)
> + CLKDEV_INIT("mxc-ehci.1", "usb", usbotg_clk)
> + CLKDEV_INIT("mxc-ehci.2", "usb", usbotg_clk)
> + CLKDEV_INIT("fsl-usb2-udc", "usb", usbotg_clk)
> + CLKDEV_INIT("fsl-usb2-udc", "usb_ahb", usbahb_clk)
> + CLKDEV_INIT("imx2-wdt.0", NULL, wdog_clk)
> + CLKDEV_INIT(NULL, "max", max_clk)
> + CLKDEV_INIT(NULL, "audmux", audmux_clk)
> + CLKDEV_INIT(NULL, "csi", csi_clk)
> + CLKDEV_INIT(NULL, "iim", iim_clk)
> + CLKDEV_INIT(NULL, "gpu2d", gpu2d_clk)
> + CLKDEV_INIT("mxc_nand.0", NULL, nfc_clk)
> };
>
> int __init mx35_clocks_init()
> diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c
> index 1e02751..7098f7e 100644
> --- a/arch/arm/mach-lpc32xx/clock.c
> +++ b/arch/arm/mach-lpc32xx/clock.c
> @@ -1041,48 +1041,41 @@ struct clk *clk_get_parent(struct clk *clk)
> }
> EXPORT_SYMBOL(clk_get_parent);
>
> -#define _REGISTER_CLOCK(d, n, c) \
> - { \
> - .dev_id = (d), \
> - .con_id = (n), \
> - .clk = &(c), \
> - },
> -
> static struct clk_lookup lookups[] = {
> - _REGISTER_CLOCK(NULL, "osc_32KHz", osc_32KHz)
> - _REGISTER_CLOCK(NULL, "osc_pll397", osc_pll397)
> - _REGISTER_CLOCK(NULL, "osc_main", osc_main)
> - _REGISTER_CLOCK(NULL, "sys_ck", clk_sys)
> - _REGISTER_CLOCK(NULL, "arm_pll_ck", clk_armpll)
> - _REGISTER_CLOCK(NULL, "ck_pll5", clk_usbpll)
> - _REGISTER_CLOCK(NULL, "hclk_ck", clk_hclk)
> - _REGISTER_CLOCK(NULL, "pclk_ck", clk_pclk)
> - _REGISTER_CLOCK(NULL, "timer0_ck", clk_timer0)
> - _REGISTER_CLOCK(NULL, "timer1_ck", clk_timer1)
> - _REGISTER_CLOCK(NULL, "timer2_ck", clk_timer2)
> - _REGISTER_CLOCK(NULL, "timer3_ck", clk_timer3)
> - _REGISTER_CLOCK(NULL, "vfp9_ck", clk_vfp9)
> - _REGISTER_CLOCK(NULL, "clk_dmac", clk_dma)
> - _REGISTER_CLOCK("pnx4008-watchdog", NULL, clk_wdt)
> - _REGISTER_CLOCK(NULL, "uart3_ck", clk_uart3)
> - _REGISTER_CLOCK(NULL, "uart4_ck", clk_uart4)
> - _REGISTER_CLOCK(NULL, "uart5_ck", clk_uart5)
> - _REGISTER_CLOCK(NULL, "uart6_ck", clk_uart6)
> - _REGISTER_CLOCK("pnx-i2c.0", NULL, clk_i2c0)
> - _REGISTER_CLOCK("pnx-i2c.1", NULL, clk_i2c1)
> - _REGISTER_CLOCK("pnx-i2c.2", NULL, clk_i2c2)
> - _REGISTER_CLOCK("dev:ssp0", NULL, clk_ssp0)
> - _REGISTER_CLOCK("dev:ssp1", NULL, clk_ssp1)
> - _REGISTER_CLOCK("lpc32xx_keys.0", NULL, clk_kscan)
> - _REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand)
> - _REGISTER_CLOCK("tbd", "i2s0_ck", clk_i2s0)
> - _REGISTER_CLOCK("tbd", "i2s1_ck", clk_i2s1)
> - _REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc)
> - _REGISTER_CLOCK("dev:mmc0", "MCLK", clk_mmc)
> - _REGISTER_CLOCK("lpc-net.0", NULL, clk_net)
> - _REGISTER_CLOCK("dev:clcd", NULL, clk_lcd)
> - _REGISTER_CLOCK("lpc32xx_udc", "ck_usbd", clk_usbd)
> - _REGISTER_CLOCK("lpc32xx_rtc", NULL, clk_rtc)
> + CLKDEV_INIT(NULL, "osc_32KHz", osc_32KHz)
> + CLKDEV_INIT(NULL, "osc_pll397", osc_pll397)
> + CLKDEV_INIT(NULL, "osc_main", osc_main)
> + CLKDEV_INIT(NULL, "sys_ck", clk_sys)
> + CLKDEV_INIT(NULL, "arm_pll_ck", clk_armpll)
> + CLKDEV_INIT(NULL, "ck_pll5", clk_usbpll)
> + CLKDEV_INIT(NULL, "hclk_ck", clk_hclk)
> + CLKDEV_INIT(NULL, "pclk_ck", clk_pclk)
> + CLKDEV_INIT(NULL, "timer0_ck", clk_timer0)
> + CLKDEV_INIT(NULL, "timer1_ck", clk_timer1)
> + CLKDEV_INIT(NULL, "timer2_ck", clk_timer2)
> + CLKDEV_INIT(NULL, "timer3_ck", clk_timer3)
> + CLKDEV_INIT(NULL, "vfp9_ck", clk_vfp9)
> + CLKDEV_INIT(NULL, "clk_dmac", clk_dma)
> + CLKDEV_INIT("pnx4008-watchdog", NULL, clk_wdt)
> + CLKDEV_INIT(NULL, "uart3_ck", clk_uart3)
> + CLKDEV_INIT(NULL, "uart4_ck", clk_uart4)
> + CLKDEV_INIT(NULL, "uart5_ck", clk_uart5)
> + CLKDEV_INIT(NULL, "uart6_ck", clk_uart6)
> + CLKDEV_INIT("pnx-i2c.0", NULL, clk_i2c0)
> + CLKDEV_INIT("pnx-i2c.1", NULL, clk_i2c1)
> + CLKDEV_INIT("pnx-i2c.2", NULL, clk_i2c2)
> + CLKDEV_INIT("dev:ssp0", NULL, clk_ssp0)
> + CLKDEV_INIT("dev:ssp1", NULL, clk_ssp1)
> + CLKDEV_INIT("lpc32xx_keys.0", NULL, clk_kscan)
> + CLKDEV_INIT("lpc32xx-nand.0", "nand_ck", clk_nand)
> + CLKDEV_INIT("tbd", "i2s0_ck", clk_i2s0)
> + CLKDEV_INIT("tbd", "i2s1_ck", clk_i2s1)
> + CLKDEV_INIT("ts-lpc32xx", NULL, clk_tsc)
> + CLKDEV_INIT("dev:mmc0", "MCLK", clk_mmc)
> + CLKDEV_INIT("lpc-net.0", NULL, clk_net)
> + CLKDEV_INIT("dev:clcd", NULL, clk_lcd)
> + CLKDEV_INIT("lpc32xx_udc", "ck_usbd", clk_usbd)
> + CLKDEV_INIT("lpc32xx_rtc", NULL, clk_rtc)
> };
>
> static int __init clk_init(void)
> diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
> index f7bf996..2ac9841 100644
> --- a/arch/arm/mach-mx5/clock-mx51-mx53.c
> +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
> @@ -1418,95 +1418,88 @@ DEFINE_CLOCK(ipu_di0_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG5_OFFSET,
> DEFINE_CLOCK(ipu_di1_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG6_OFFSET,
> NULL, NULL, &pll3_sw_clk, NULL);
>
> -#define _REGISTER_CLOCK(d, n, c) \
> - { \
> - .dev_id = d, \
> - .con_id = n, \
> - .clk = &c, \
> - },
> -
> static struct clk_lookup mx51_lookups[] = {
> /* i.mx51 has the i.mx21 type uart */
> - _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)
> - _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)
> - _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)
> - _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
> + CLKDEV_INIT("imx21-uart.0", NULL, uart1_clk)
> + CLKDEV_INIT("imx21-uart.1", NULL, uart2_clk)
> + CLKDEV_INIT("imx21-uart.2", NULL, uart3_clk)
> + CLKDEV_INIT(NULL, "gpt", gpt_clk)
> /* i.mx51 has the i.mx27 type fec */
> - _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)
> - _REGISTER_CLOCK("mxc_pwm.0", "pwm", pwm1_clk)
> - _REGISTER_CLOCK("mxc_pwm.1", "pwm", pwm2_clk)
> - _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
> - _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
> - _REGISTER_CLOCK("imx-i2c.2", NULL, hsi2c_clk)
> - _REGISTER_CLOCK("mxc-ehci.0", "usb", usboh3_clk)
> - _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_ahb_clk)
> - _REGISTER_CLOCK("mxc-ehci.0", "usb_phy1", usb_phy1_clk)
> - _REGISTER_CLOCK("mxc-ehci.1", "usb", usboh3_clk)
> - _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_ahb_clk)
> - _REGISTER_CLOCK("mxc-ehci.2", "usb", usboh3_clk)
> - _REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_ahb_clk)
> - _REGISTER_CLOCK("fsl-usb2-udc", "usb", usboh3_clk)
> - _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", ahb_clk)
> - _REGISTER_CLOCK("imx-keypad", NULL, dummy_clk)
> - _REGISTER_CLOCK("mxc_nand", NULL, nfc_clk)
> - _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
> - _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
> - _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk)
> + CLKDEV_INIT("imx27-fec.0", NULL, fec_clk)
> + CLKDEV_INIT("mxc_pwm.0", "pwm", pwm1_clk)
> + CLKDEV_INIT("mxc_pwm.1", "pwm", pwm2_clk)
> + CLKDEV_INIT("imx-i2c.0", NULL, i2c1_clk)
> + CLKDEV_INIT("imx-i2c.1", NULL, i2c2_clk)
> + CLKDEV_INIT("imx-i2c.2", NULL, hsi2c_clk)
> + CLKDEV_INIT("mxc-ehci.0", "usb", usboh3_clk)
> + CLKDEV_INIT("mxc-ehci.0", "usb_ahb", usb_ahb_clk)
> + CLKDEV_INIT("mxc-ehci.0", "usb_phy1", usb_phy1_clk)
> + CLKDEV_INIT("mxc-ehci.1", "usb", usboh3_clk)
> + CLKDEV_INIT("mxc-ehci.1", "usb_ahb", usb_ahb_clk)
> + CLKDEV_INIT("mxc-ehci.2", "usb", usboh3_clk)
> + CLKDEV_INIT("mxc-ehci.2", "usb_ahb", usb_ahb_clk)
> + CLKDEV_INIT("fsl-usb2-udc", "usb", usboh3_clk)
> + CLKDEV_INIT("fsl-usb2-udc", "usb_ahb", ahb_clk)
> + CLKDEV_INIT("imx-keypad", NULL, dummy_clk)
> + CLKDEV_INIT("mxc_nand", NULL, nfc_clk)
> + CLKDEV_INIT("imx-ssi.0", NULL, ssi1_clk)
> + CLKDEV_INIT("imx-ssi.1", NULL, ssi2_clk)
> + CLKDEV_INIT("imx-ssi.2", NULL, ssi3_clk)
> /* i.mx51 has the i.mx35 type sdma */
> - _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
> - _REGISTER_CLOCK(NULL, "ckih", ckih_clk)
> - _REGISTER_CLOCK(NULL, "ckih2", ckih2_clk)
> - _REGISTER_CLOCK(NULL, "gpt_32k", gpt_32k_clk)
> - _REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk)
> - _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk)
> + CLKDEV_INIT("imx35-sdma", NULL, sdma_clk)
> + CLKDEV_INIT(NULL, "ckih", ckih_clk)
> + CLKDEV_INIT(NULL, "ckih2", ckih2_clk)
> + CLKDEV_INIT(NULL, "gpt_32k", gpt_32k_clk)
> + CLKDEV_INIT("imx51-ecspi.0", NULL, ecspi1_clk)
> + CLKDEV_INIT("imx51-ecspi.1", NULL, ecspi2_clk)
> /* i.mx51 has the i.mx35 type cspi */
> - _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi_clk)
> - _REGISTER_CLOCK("sdhci-esdhc-imx51.0", NULL, esdhc1_clk)
> - _REGISTER_CLOCK("sdhci-esdhc-imx51.1", NULL, esdhc2_clk)
> - _REGISTER_CLOCK("sdhci-esdhc-imx51.2", NULL, esdhc3_clk)
> - _REGISTER_CLOCK("sdhci-esdhc-imx51.3", NULL, esdhc4_clk)
> - _REGISTER_CLOCK(NULL, "cpu_clk", cpu_clk)
> - _REGISTER_CLOCK(NULL, "iim_clk", iim_clk)
> - _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk)
> - _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk)
> - _REGISTER_CLOCK(NULL, "mipi_hsp", mipi_hsp_clk)
> - _REGISTER_CLOCK("imx-ipuv3", NULL, ipu_clk)
> - _REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk)
> - _REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk)
> - _REGISTER_CLOCK(NULL, "gpc_dvfs", gpc_dvfs_clk)
> + CLKDEV_INIT("imx35-cspi.0", NULL, cspi_clk)
> + CLKDEV_INIT("sdhci-esdhc-imx51.0", NULL, esdhc1_clk)
> + CLKDEV_INIT("sdhci-esdhc-imx51.1", NULL, esdhc2_clk)
> + CLKDEV_INIT("sdhci-esdhc-imx51.2", NULL, esdhc3_clk)
> + CLKDEV_INIT("sdhci-esdhc-imx51.3", NULL, esdhc4_clk)
> + CLKDEV_INIT(NULL, "cpu_clk", cpu_clk)
> + CLKDEV_INIT(NULL, "iim_clk", iim_clk)
> + CLKDEV_INIT("imx2-wdt.0", NULL, dummy_clk)
> + CLKDEV_INIT("imx2-wdt.1", NULL, dummy_clk)
> + CLKDEV_INIT(NULL, "mipi_hsp", mipi_hsp_clk)
> + CLKDEV_INIT("imx-ipuv3", NULL, ipu_clk)
> + CLKDEV_INIT("imx-ipuv3", "di0", ipu_di0_clk)
> + CLKDEV_INIT("imx-ipuv3", "di1", ipu_di1_clk)
> + CLKDEV_INIT(NULL, "gpc_dvfs", gpc_dvfs_clk)
> };
>
> static struct clk_lookup mx53_lookups[] = {
> /* i.mx53 has the i.mx21 type uart */
> - _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)
> - _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)
> - _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)
> - _REGISTER_CLOCK("imx21-uart.3", NULL, uart4_clk)
> - _REGISTER_CLOCK("imx21-uart.4", NULL, uart5_clk)
> - _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
> + CLKDEV_INIT("imx21-uart.0", NULL, uart1_clk)
> + CLKDEV_INIT("imx21-uart.1", NULL, uart2_clk)
> + CLKDEV_INIT("imx21-uart.2", NULL, uart3_clk)
> + CLKDEV_INIT("imx21-uart.3", NULL, uart4_clk)
> + CLKDEV_INIT("imx21-uart.4", NULL, uart5_clk)
> + CLKDEV_INIT(NULL, "gpt", gpt_clk)
> /* i.mx53 has the i.mx25 type fec */
> - _REGISTER_CLOCK("imx25-fec.0", NULL, fec_clk)
> - _REGISTER_CLOCK(NULL, "iim_clk", iim_clk)
> - _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
> - _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
> - _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_mx53_clk)
> + CLKDEV_INIT("imx25-fec.0", NULL, fec_clk)
> + CLKDEV_INIT(NULL, "iim_clk", iim_clk)
> + CLKDEV_INIT("imx-i2c.0", NULL, i2c1_clk)
> + CLKDEV_INIT("imx-i2c.1", NULL, i2c2_clk)
> + CLKDEV_INIT("imx-i2c.2", NULL, i2c3_mx53_clk)
> /* i.mx53 has the i.mx51 type ecspi */
> - _REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk)
> - _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk)
> + CLKDEV_INIT("imx51-ecspi.0", NULL, ecspi1_clk)
> + CLKDEV_INIT("imx51-ecspi.1", NULL, ecspi2_clk)
> /* i.mx53 has the i.mx25 type cspi */
> - _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi_clk)
> - _REGISTER_CLOCK("sdhci-esdhc-imx53.0", NULL, esdhc1_clk)
> - _REGISTER_CLOCK("sdhci-esdhc-imx53.1", NULL, esdhc2_mx53_clk)
> - _REGISTER_CLOCK("sdhci-esdhc-imx53.2", NULL, esdhc3_mx53_clk)
> - _REGISTER_CLOCK("sdhci-esdhc-imx53.3", NULL, esdhc4_mx53_clk)
> - _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk)
> - _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk)
> + CLKDEV_INIT("imx35-cspi.0", NULL, cspi_clk)
> + CLKDEV_INIT("sdhci-esdhc-imx53.0", NULL, esdhc1_clk)
> + CLKDEV_INIT("sdhci-esdhc-imx53.1", NULL, esdhc2_mx53_clk)
> + CLKDEV_INIT("sdhci-esdhc-imx53.2", NULL, esdhc3_mx53_clk)
> + CLKDEV_INIT("sdhci-esdhc-imx53.3", NULL, esdhc4_mx53_clk)
> + CLKDEV_INIT("imx2-wdt.0", NULL, dummy_clk)
> + CLKDEV_INIT("imx2-wdt.1", NULL, dummy_clk)
> /* i.mx53 has the i.mx35 type sdma */
> - _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
> - _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
> - _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
> - _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk)
> - _REGISTER_CLOCK("imx-keypad", NULL, dummy_clk)
> + CLKDEV_INIT("imx35-sdma", NULL, sdma_clk)
> + CLKDEV_INIT("imx-ssi.0", NULL, ssi1_clk)
> + CLKDEV_INIT("imx-ssi.1", NULL, ssi2_clk)
> + CLKDEV_INIT("imx-ssi.2", NULL, ssi3_clk)
> + CLKDEV_INIT("imx-keypad", NULL, dummy_clk)
> };
>
> static void clk_tree_init(void)
> diff --git a/arch/arm/mach-mxs/clock-mx23.c b/arch/arm/mach-mxs/clock-mx23.c
> index 0163b6d..bb8c6162 100644
> --- a/arch/arm/mach-mxs/clock-mx23.c
> +++ b/arch/arm/mach-mxs/clock-mx23.c
> @@ -430,32 +430,25 @@ _DEFINE_CLOCK(audio_clk, XTAL, FILT_CLK24M_GATE, &ref_xtal_clk);
> _DEFINE_CLOCK(pwm_clk, XTAL, PWM_CLK24M_GATE, &ref_xtal_clk);
> _DEFINE_CLOCK(clk32k_clk, XTAL, TIMROT_CLK32K_GATE, &ref_xtal_clk);
>
> -#define _REGISTER_CLOCK(d, n, c) \
> - { \
> - .dev_id = d, \
> - .con_id = n, \
> - .clk = &c, \
> - },
> -
> static struct clk_lookup lookups[] = {
> /* for amba bus driver */
> - _REGISTER_CLOCK("duart", "apb_pclk", xbus_clk)
> + CLKDEV_INIT("duart", "apb_pclk", xbus_clk)
> /* for amba-pl011 driver */
> - _REGISTER_CLOCK("duart", NULL, uart_clk)
> - _REGISTER_CLOCK("mxs-auart.0", NULL, uart_clk)
> - _REGISTER_CLOCK("rtc", NULL, rtc_clk)
> - _REGISTER_CLOCK("mxs-dma-apbh", NULL, hbus_clk)
> - _REGISTER_CLOCK("mxs-dma-apbx", NULL, xbus_clk)
> - _REGISTER_CLOCK("mxs-mmc.0", NULL, ssp_clk)
> - _REGISTER_CLOCK("mxs-mmc.1", NULL, ssp_clk)
> - _REGISTER_CLOCK(NULL, "usb", usb_clk)
> - _REGISTER_CLOCK(NULL, "audio", audio_clk)
> - _REGISTER_CLOCK("mxs-pwm.0", NULL, pwm_clk)
> - _REGISTER_CLOCK("mxs-pwm.1", NULL, pwm_clk)
> - _REGISTER_CLOCK("mxs-pwm.2", NULL, pwm_clk)
> - _REGISTER_CLOCK("mxs-pwm.3", NULL, pwm_clk)
> - _REGISTER_CLOCK("mxs-pwm.4", NULL, pwm_clk)
> - _REGISTER_CLOCK("imx23-fb", NULL, lcdif_clk)
> + CLKDEV_INIT("duart", NULL, uart_clk)
> + CLKDEV_INIT("mxs-auart.0", NULL, uart_clk)
> + CLKDEV_INIT("rtc", NULL, rtc_clk)
> + CLKDEV_INIT("mxs-dma-apbh", NULL, hbus_clk)
> + CLKDEV_INIT("mxs-dma-apbx", NULL, xbus_clk)
> + CLKDEV_INIT("mxs-mmc.0", NULL, ssp_clk)
> + CLKDEV_INIT("mxs-mmc.1", NULL, ssp_clk)
> + CLKDEV_INIT(NULL, "usb", usb_clk)
> + CLKDEV_INIT(NULL, "audio", audio_clk)
> + CLKDEV_INIT("mxs-pwm.0", NULL, pwm_clk)
> + CLKDEV_INIT("mxs-pwm.1", NULL, pwm_clk)
> + CLKDEV_INIT("mxs-pwm.2", NULL, pwm_clk)
> + CLKDEV_INIT("mxs-pwm.3", NULL, pwm_clk)
> + CLKDEV_INIT("mxs-pwm.4", NULL, pwm_clk)
> + CLKDEV_INIT("imx23-fb", NULL, lcdif_clk)
> };
>
> static int clk_misc_init(void)
> diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
> index 5dcc59d..2365fe2 100644
> --- a/arch/arm/mach-mxs/clock-mx28.c
> +++ b/arch/arm/mach-mxs/clock-mx28.c
> @@ -600,46 +600,39 @@ _DEFINE_CLOCK(clk32k_clk, XTAL, TIMROT_CLK32K_GATE, &ref_xtal_clk);
> _DEFINE_CLOCK(spdif_clk, SPDIF, CLKGATE, &pll0_clk);
> _DEFINE_CLOCK(fec_clk, ENET, DISABLE, &hbus_clk);
>
> -#define _REGISTER_CLOCK(d, n, c) \
> - { \
> - .dev_id = d, \
> - .con_id = n, \
> - .clk = &c, \
> - },
> -
> static struct clk_lookup lookups[] = {
> /* for amba bus driver */
> - _REGISTER_CLOCK("duart", "apb_pclk", xbus_clk)
> + CLKDEV_INIT("duart", "apb_pclk", xbus_clk)
> /* for amba-pl011 driver */
> - _REGISTER_CLOCK("duart", NULL, uart_clk)
> - _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk)
> - _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk)
> - _REGISTER_CLOCK("mxs-auart.0", NULL, uart_clk)
> - _REGISTER_CLOCK("mxs-auart.1", NULL, uart_clk)
> - _REGISTER_CLOCK("mxs-auart.2", NULL, uart_clk)
> - _REGISTER_CLOCK("mxs-auart.3", NULL, uart_clk)
> - _REGISTER_CLOCK("mxs-auart.4", NULL, uart_clk)
> - _REGISTER_CLOCK("rtc", NULL, rtc_clk)
> - _REGISTER_CLOCK("pll2", NULL, pll2_clk)
> - _REGISTER_CLOCK("mxs-dma-apbh", NULL, hbus_clk)
> - _REGISTER_CLOCK("mxs-dma-apbx", NULL, xbus_clk)
> - _REGISTER_CLOCK("mxs-mmc.0", NULL, ssp0_clk)
> - _REGISTER_CLOCK("mxs-mmc.1", NULL, ssp1_clk)
> - _REGISTER_CLOCK("flexcan.0", NULL, can0_clk)
> - _REGISTER_CLOCK("flexcan.1", NULL, can1_clk)
> - _REGISTER_CLOCK(NULL, "usb0", usb0_clk)
> - _REGISTER_CLOCK(NULL, "usb1", usb1_clk)
> - _REGISTER_CLOCK("mxs-pwm.0", NULL, pwm_clk)
> - _REGISTER_CLOCK("mxs-pwm.1", NULL, pwm_clk)
> - _REGISTER_CLOCK("mxs-pwm.2", NULL, pwm_clk)
> - _REGISTER_CLOCK("mxs-pwm.3", NULL, pwm_clk)
> - _REGISTER_CLOCK("mxs-pwm.4", NULL, pwm_clk)
> - _REGISTER_CLOCK("mxs-pwm.5", NULL, pwm_clk)
> - _REGISTER_CLOCK("mxs-pwm.6", NULL, pwm_clk)
> - _REGISTER_CLOCK("mxs-pwm.7", NULL, pwm_clk)
> - _REGISTER_CLOCK(NULL, "lradc", lradc_clk)
> - _REGISTER_CLOCK(NULL, "spdif", spdif_clk)
> - _REGISTER_CLOCK("imx28-fb", NULL, lcdif_clk)
> + CLKDEV_INIT("duart", NULL, uart_clk)
> + CLKDEV_INIT("imx28-fec.0", NULL, fec_clk)
> + CLKDEV_INIT("imx28-fec.1", NULL, fec_clk)
> + CLKDEV_INIT("mxs-auart.0", NULL, uart_clk)
> + CLKDEV_INIT("mxs-auart.1", NULL, uart_clk)
> + CLKDEV_INIT("mxs-auart.2", NULL, uart_clk)
> + CLKDEV_INIT("mxs-auart.3", NULL, uart_clk)
> + CLKDEV_INIT("mxs-auart.4", NULL, uart_clk)
> + CLKDEV_INIT("rtc", NULL, rtc_clk)
> + CLKDEV_INIT("pll2", NULL, pll2_clk)
> + CLKDEV_INIT("mxs-dma-apbh", NULL, hbus_clk)
> + CLKDEV_INIT("mxs-dma-apbx", NULL, xbus_clk)
> + CLKDEV_INIT("mxs-mmc.0", NULL, ssp0_clk)
> + CLKDEV_INIT("mxs-mmc.1", NULL, ssp1_clk)
> + CLKDEV_INIT("flexcan.0", NULL, can0_clk)
> + CLKDEV_INIT("flexcan.1", NULL, can1_clk)
> + CLKDEV_INIT(NULL, "usb0", usb0_clk)
> + CLKDEV_INIT(NULL, "usb1", usb1_clk)
> + CLKDEV_INIT("mxs-pwm.0", NULL, pwm_clk)
> + CLKDEV_INIT("mxs-pwm.1", NULL, pwm_clk)
> + CLKDEV_INIT("mxs-pwm.2", NULL, pwm_clk)
> + CLKDEV_INIT("mxs-pwm.3", NULL, pwm_clk)
> + CLKDEV_INIT("mxs-pwm.4", NULL, pwm_clk)
> + CLKDEV_INIT("mxs-pwm.5", NULL, pwm_clk)
> + CLKDEV_INIT("mxs-pwm.6", NULL, pwm_clk)
> + CLKDEV_INIT("mxs-pwm.7", NULL, pwm_clk)
> + CLKDEV_INIT(NULL, "lradc", lradc_clk)
> + CLKDEV_INIT(NULL, "spdif", spdif_clk)
> + CLKDEV_INIT("imx28-fb", NULL, lcdif_clk)
> };
>
> static int clk_misc_init(void)
> diff --git a/arch/arm/mach-tcc8k/clock.c b/arch/arm/mach-tcc8k/clock.c
> index e7cdae5..086a9b4 100644
> --- a/arch/arm/mach-tcc8k/clock.c
> +++ b/arch/arm/mach-tcc8k/clock.c
> @@ -468,64 +468,57 @@ DEFINE_BCLOCK(gdma2, BCLKCTR1, 17, NULL, NULL)
> DEFINE_BCLOCK(gdma3, BCLKCTR1, 18, NULL, NULL)
> DEFINE_BCLOCK(ddrc, BCLKCTR1, 19, NULL, NULL)
>
> -#define _REGISTER_CLOCK(d, n, c) \
> - { \
> - .dev_id = d, \
> - .con_id = n, \
> - .clk = &c, \
> - },
> -
> static struct clk_lookup lookups[] = {
> - _REGISTER_CLOCK(NULL, "bus", bus)
> - _REGISTER_CLOCK(NULL, "cpu", cpu)
> - _REGISTER_CLOCK(NULL, "tct", tct)
> - _REGISTER_CLOCK(NULL, "tcx", tcx)
> - _REGISTER_CLOCK(NULL, "tcz", tcz)
> - _REGISTER_CLOCK(NULL, "ref", ref)
> - _REGISTER_CLOCK(NULL, "dai0", dai0)
> - _REGISTER_CLOCK(NULL, "pic", pic)
> - _REGISTER_CLOCK(NULL, "tc", tc)
> - _REGISTER_CLOCK(NULL, "gpio", gpio)
> - _REGISTER_CLOCK(NULL, "usbd", usbd)
> - _REGISTER_CLOCK("tcc-uart.0", NULL, uart0)
> - _REGISTER_CLOCK("tcc-uart.2", NULL, uart2)
> - _REGISTER_CLOCK("tcc-i2c", NULL, i2c)
> - _REGISTER_CLOCK("tcc-uart.3", NULL, uart3)
> - _REGISTER_CLOCK(NULL, "ecc", ecc)
> - _REGISTER_CLOCK(NULL, "adc", adc)
> - _REGISTER_CLOCK("tcc-usbh.0", "usb", usbh0)
> - _REGISTER_CLOCK(NULL, "gdma0", gdma0)
> - _REGISTER_CLOCK(NULL, "lcd", lcd)
> - _REGISTER_CLOCK(NULL, "rtc", rtc)
> - _REGISTER_CLOCK(NULL, "nfc", nfc)
> - _REGISTER_CLOCK("tcc-mmc.0", NULL, sd0)
> - _REGISTER_CLOCK(NULL, "g2d", g2d)
> - _REGISTER_CLOCK(NULL, "gdma1", gdma1)
> - _REGISTER_CLOCK("tcc-uart.1", NULL, uart1)
> - _REGISTER_CLOCK("tcc-spi.0", NULL, spi0)
> - _REGISTER_CLOCK(NULL, "mscl", mscl)
> - _REGISTER_CLOCK("tcc-spi.1", NULL, spi1)
> - _REGISTER_CLOCK(NULL, "bdma", bdma)
> - _REGISTER_CLOCK(NULL, "adma0", adma0)
> - _REGISTER_CLOCK(NULL, "spdif", spdif)
> - _REGISTER_CLOCK(NULL, "scfg", scfg)
> - _REGISTER_CLOCK(NULL, "cid", cid)
> - _REGISTER_CLOCK("tcc-mmc.1", NULL, sd1)
> - _REGISTER_CLOCK("tcc-uart.4", NULL, uart4)
> - _REGISTER_CLOCK(NULL, "dai1", dai1)
> - _REGISTER_CLOCK(NULL, "adma1", adma1)
> - _REGISTER_CLOCK(NULL, "c3dec", c3dec)
> - _REGISTER_CLOCK("tcc-can.0", NULL, can0)
> - _REGISTER_CLOCK("tcc-can.1", NULL, can1)
> - _REGISTER_CLOCK(NULL, "gps", gps)
> - _REGISTER_CLOCK("tcc-gsb.0", NULL, gsb0)
> - _REGISTER_CLOCK("tcc-gsb.1", NULL, gsb1)
> - _REGISTER_CLOCK("tcc-gsb.2", NULL, gsb2)
> - _REGISTER_CLOCK("tcc-gsb.3", NULL, gsb3)
> - _REGISTER_CLOCK(NULL, "gdma2", gdma2)
> - _REGISTER_CLOCK(NULL, "gdma3", gdma3)
> - _REGISTER_CLOCK(NULL, "ddrc", ddrc)
> - _REGISTER_CLOCK("tcc-usbh.1", "usb", usbh1)
> + CLKDEV_INIT(NULL, "bus", bus)
> + CLKDEV_INIT(NULL, "cpu", cpu)
> + CLKDEV_INIT(NULL, "tct", tct)
> + CLKDEV_INIT(NULL, "tcx", tcx)
> + CLKDEV_INIT(NULL, "tcz", tcz)
> + CLKDEV_INIT(NULL, "ref", ref)
> + CLKDEV_INIT(NULL, "dai0", dai0)
> + CLKDEV_INIT(NULL, "pic", pic)
> + CLKDEV_INIT(NULL, "tc", tc)
> + CLKDEV_INIT(NULL, "gpio", gpio)
> + CLKDEV_INIT(NULL, "usbd", usbd)
> + CLKDEV_INIT("tcc-uart.0", NULL, uart0)
> + CLKDEV_INIT("tcc-uart.2", NULL, uart2)
> + CLKDEV_INIT("tcc-i2c", NULL, i2c)
> + CLKDEV_INIT("tcc-uart.3", NULL, uart3)
> + CLKDEV_INIT(NULL, "ecc", ecc)
> + CLKDEV_INIT(NULL, "adc", adc)
> + CLKDEV_INIT("tcc-usbh.0", "usb", usbh0)
> + CLKDEV_INIT(NULL, "gdma0", gdma0)
> + CLKDEV_INIT(NULL, "lcd", lcd)
> + CLKDEV_INIT(NULL, "rtc", rtc)
> + CLKDEV_INIT(NULL, "nfc", nfc)
> + CLKDEV_INIT("tcc-mmc.0", NULL, sd0)
> + CLKDEV_INIT(NULL, "g2d", g2d)
> + CLKDEV_INIT(NULL, "gdma1", gdma1)
> + CLKDEV_INIT("tcc-uart.1", NULL, uart1)
> + CLKDEV_INIT("tcc-spi.0", NULL, spi0)
> + CLKDEV_INIT(NULL, "mscl", mscl)
> + CLKDEV_INIT("tcc-spi.1", NULL, spi1)
> + CLKDEV_INIT(NULL, "bdma", bdma)
> + CLKDEV_INIT(NULL, "adma0", adma0)
> + CLKDEV_INIT(NULL, "spdif", spdif)
> + CLKDEV_INIT(NULL, "scfg", scfg)
> + CLKDEV_INIT(NULL, "cid", cid)
> + CLKDEV_INIT("tcc-mmc.1", NULL, sd1)
> + CLKDEV_INIT("tcc-uart.4", NULL, uart4)
> + CLKDEV_INIT(NULL, "dai1", dai1)
> + CLKDEV_INIT(NULL, "adma1", adma1)
> + CLKDEV_INIT(NULL, "c3dec", c3dec)
> + CLKDEV_INIT("tcc-can.0", NULL, can0)
> + CLKDEV_INIT("tcc-can.1", NULL, can1)
> + CLKDEV_INIT(NULL, "gps", gps)
> + CLKDEV_INIT("tcc-gsb.0", NULL, gsb0)
> + CLKDEV_INIT("tcc-gsb.1", NULL, gsb1)
> + CLKDEV_INIT("tcc-gsb.2", NULL, gsb2)
> + CLKDEV_INIT("tcc-gsb.3", NULL, gsb3)
> + CLKDEV_INIT(NULL, "gdma2", gdma2)
> + CLKDEV_INIT(NULL, "gdma3", gdma3)
> + CLKDEV_INIT(NULL, "ddrc", ddrc)
> + CLKDEV_INIT("tcc-usbh.1", "usb", usbh1)
> };
>
> static struct clk *root_clk_by_index(enum root_clks src)
> --
> 1.7.4.4
>
--
----------------------------------------------------------------------
Amit Kucheria, Kernel Engineer || amit.kucheria at canonical.com
----------------------------------------------------------------------
^ permalink raw reply
* S3C6410 synchronous mode
From: Tomasz Figa @ 2011-09-30 12:46 UTC (permalink / raw)
To: linux-arm-kernel
List,
I am working on porting mainline kernel for S3C6410-based Samsung phone
(Galaxy Spica GT-i5700). The SoC is mostly well documented, but some aspects
of it unfortunately are not. So I would like to ask some questions, especially
targetted at Samsung people.
SoC variant used in this phone seems to be operating in so called synchronous
mode, where both bus and ARM clocks are generated from the same PLL. I would be
interested in getting more information on this operating mode, especially how
it differs from asynchronous mode (except that ARM and buses run synchronously,
of course), what are performance aspects of both modes and whether synchronous
mode introduces some additional constraints to include, for example, in ARM
frequency scaling.
One more thing that I found is that the AHB bus is horribly slow, running at
133 MHz it maxes out at about 472 MB/s when using STM8 to write to uncached
memory and with STR it drops to 80 MB/s, while with STRB it really drops below
any reasonable level, to 20 MB/s. Might it be related to synchronous mode or
it is just a bug or feature of S3C6410?
Best regards,
Tom
^ permalink raw reply
* [PATCH 1/3] ARM: SAMSUNG: Moving each SoC support header files
From: Kukjin Kim @ 2011-09-30 12:55 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves SoC header files for supporting each SoCs to
plat-samsung directory. This is required to make one plat-
directory for Samsung SoCs.
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/mach-s3c64xx/cpu.c | 4 ++--
arch/arm/mach-s3c64xx/mach-anw6410.c | 2 +-
arch/arm/mach-s3c64xx/mach-crag6410.c | 2 +-
arch/arm/mach-s3c64xx/mach-hmt.c | 2 +-
arch/arm/mach-s3c64xx/mach-mini6410.c | 2 +-
arch/arm/mach-s3c64xx/mach-ncp.c | 2 +-
arch/arm/mach-s3c64xx/mach-real6410.c | 2 +-
arch/arm/mach-s3c64xx/mach-smartq5.c | 2 +-
arch/arm/mach-s3c64xx/mach-smartq7.c | 2 +-
arch/arm/mach-s3c64xx/mach-smdk6400.c | 2 +-
arch/arm/mach-s3c64xx/mach-smdk6410.c | 2 +-
arch/arm/mach-s3c64xx/s3c6400.c | 2 +-
arch/arm/mach-s3c64xx/s3c6410.c | 4 ++--
.../include/plat/exynos4.h | 2 +-
.../include/plat/s3c2410.h | 2 +-
.../include/plat/s3c2412.h | 2 +-
.../include/plat/s3c2416.h | 2 +-
.../include/plat/s3c2443.h | 2 +-
.../include/plat/s3c244x.h | 2 +-
.../mach => plat-samsung/include/plat}/s3c6400.h | 2 +-
.../mach => plat-samsung/include/plat}/s3c6410.h | 2 +-
.../include/plat/s5p6440.h | 2 +-
.../include/plat/s5p6450.h | 2 +-
.../include/plat/s5pc100.h | 2 +-
.../include/plat/s5pv210.h | 2 +-
25 files changed, 27 insertions(+), 27 deletions(-)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/exynos4.h (94%)
rename arch/arm/{plat-s3c24xx => plat-samsung}/include/plat/s3c2410.h (93%)
rename arch/arm/{plat-s3c24xx => plat-samsung}/include/plat/s3c2412.h (92%)
rename arch/arm/{plat-s3c24xx => plat-samsung}/include/plat/s3c2416.h (92%)
rename arch/arm/{plat-s3c24xx => plat-samsung}/include/plat/s3c2443.h (96%)
rename arch/arm/{plat-s3c24xx => plat-samsung}/include/plat/s3c244x.h (94%)
rename arch/arm/{mach-s3c64xx/include/mach => plat-samsung/include/plat}/s3c6400.h (94%)
rename arch/arm/{mach-s3c64xx/include/mach => plat-samsung/include/plat}/s3c6410.h (93%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/s5p6440.h (94%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/s5p6450.h (94%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/s5pc100.h (94%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/s5pv210.h (94%)
diff --git a/arch/arm/mach-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c
index 374e45e..f06f33c 100644
--- a/arch/arm/mach-s3c64xx/cpu.c
+++ b/arch/arm/mach-s3c64xx/cpu.c
@@ -33,8 +33,8 @@
#include <plat/devs.h>
#include <plat/clock.h>
-#include <mach/s3c6400.h>
-#include <mach/s3c6410.h>
+#include <plat/s3c6400.h>
+#include <plat/s3c6410.h>
/* table of supported CPUs */
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index cb88643..d2a68d2 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -45,7 +45,7 @@
#include <plat/fb.h>
#include <plat/regs-fb-v4.h>
-#include <mach/s3c6410.h>
+#include <plat/s3c6410.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index af0c2fe..45ae2a2 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -43,13 +43,13 @@
#include <mach/hardware.h>
#include <mach/map.h>
-#include <mach/s3c6410.h>
#include <mach/regs-sys.h>
#include <mach/regs-gpio.h>
#include <mach/regs-modem.h>
#include <mach/regs-gpio-memport.h>
+#include <plat/s3c6410.h>
#include <plat/regs-serial.h>
#include <plat/regs-fb-v4.h>
#include <plat/fb.h>
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index b3d93cc..61f4fde 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -37,7 +37,7 @@
#include <plat/fb.h>
#include <plat/nand.h>
-#include <mach/s3c6410.h>
+#include <plat/s3c6410.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 527f49b..5233a27 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -32,8 +32,8 @@
#include <mach/regs-gpio.h>
#include <mach/regs-modem.h>
#include <mach/regs-srom.h>
-#include <mach/s3c6410.h>
+#include <plat/s3c6410.h>
#include <plat/adc.h>
#include <plat/cpu.h>
#include <plat/devs.h>
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index 01c6857..0f4316a 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -39,7 +39,7 @@
#include <plat/iic.h>
#include <plat/fb.h>
-#include <mach/s3c6410.h>
+#include <plat/s3c6410.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 95b04b1..56b5852 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -33,8 +33,8 @@
#include <mach/regs-gpio.h>
#include <mach/regs-modem.h>
#include <mach/regs-srom.h>
-#include <mach/s3c6410.h>
+#include <plat/s3c6410.h>
#include <plat/adc.h>
#include <plat/cpu.h>
#include <plat/devs.h>
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index 342e8df..30e906b 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -22,8 +22,8 @@
#include <mach/map.h>
#include <mach/regs-gpio.h>
-#include <mach/s3c6410.h>
+#include <plat/s3c6410.h>
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/fb.h>
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index 5796397..9a71c2b 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -22,8 +22,8 @@
#include <mach/map.h>
#include <mach/regs-gpio.h>
-#include <mach/s3c6410.h>
+#include <plat/s3c6410.h>
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/fb.h>
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index 3cca642..fc7cb03 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -31,7 +31,7 @@
#include <plat/regs-serial.h>
-#include <mach/s3c6400.h>
+#include <plat/s3c6400.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index a9f3183..227f414 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -63,7 +63,7 @@
#include <plat/fb.h>
#include <plat/gpio-cfg.h>
-#include <mach/s3c6410.h>
+#include <plat/s3c6410.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index 5e93fe3..7a3bc32 100644
--- a/arch/arm/mach-s3c64xx/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -38,7 +38,7 @@
#include <plat/sdhci.h>
#include <plat/iic-core.h>
#include <plat/onenand-core.h>
-#include <mach/s3c6400.h>
+#include <plat/s3c6400.h>
void __init s3c6400_map_io(void)
{
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c
index 312aa6b..4117003 100644
--- a/arch/arm/mach-s3c64xx/s3c6410.c
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -41,8 +41,8 @@
#include <plat/adc-core.h>
#include <plat/iic-core.h>
#include <plat/onenand-core.h>
-#include <mach/s3c6400.h>
-#include <mach/s3c6410.h>
+#include <plat/s3c6400.h>
+#include <plat/s3c6410.h>
void __init s3c6410_map_io(void)
{
diff --git a/arch/arm/plat-s5p/include/plat/exynos4.h b/arch/arm/plat-samsung/include/plat/exynos4.h
similarity index 94%
rename from arch/arm/plat-s5p/include/plat/exynos4.h
rename to arch/arm/plat-samsung/include/plat/exynos4.h
index 907caab..691a711 100644
--- a/arch/arm/plat-s5p/include/plat/exynos4.h
+++ b/arch/arm/plat-samsung/include/plat/exynos4.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s5p/include/plat/exynos4.h
+/* linux/arch/arm/plat-samsung/include/plat/exynos4.h
*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2410.h b/arch/arm/plat-samsung/include/plat/s3c2410.h
similarity index 93%
rename from arch/arm/plat-s3c24xx/include/plat/s3c2410.h
rename to arch/arm/plat-samsung/include/plat/s3c2410.h
index 82ab4aa..3986497 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2410.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2410.h
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c24xx/s3c2410.h
+/* linux/arch/arm/plat-samsung/include/plat/s3c2410.h
*
* Copyright (c) 2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2412.h b/arch/arm/plat-samsung/include/plat/s3c2412.h
similarity index 92%
rename from arch/arm/plat-s3c24xx/include/plat/s3c2412.h
rename to arch/arm/plat-samsung/include/plat/s3c2412.h
index bb15d3b..5bcfd14 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2412.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2412.h
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c24xx/s3c2412.h
+/* linux/arch/arm/plat-samsung/include/plat/s3c2412.h
*
* Copyright (c) 2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2416.h b/arch/arm/plat-samsung/include/plat/s3c2416.h
similarity index 92%
rename from arch/arm/plat-s3c24xx/include/plat/s3c2416.h
rename to arch/arm/plat-samsung/include/plat/s3c2416.h
index dc3c090..a764f85 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2416.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2416.h
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c24xx/s3c2443.h
+/* linux/arch/arm/plat-samsung/include/plat/s3c2416.h
*
* Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>
*
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2443.h b/arch/arm/plat-samsung/include/plat/s3c2443.h
similarity index 96%
rename from arch/arm/plat-s3c24xx/include/plat/s3c2443.h
rename to arch/arm/plat-samsung/include/plat/s3c2443.h
index a19715f..4b2ac9a 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2443.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2443.h
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c24xx/s3c2443.h
+/* linux/arch/arm/plat-samsung/include/plat/s3c2443.h
*
* Copyright (c) 2004-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c244x.h b/arch/arm/plat-samsung/include/plat/s3c244x.h
similarity index 94%
rename from arch/arm/plat-s3c24xx/include/plat/s3c244x.h
rename to arch/arm/plat-samsung/include/plat/s3c244x.h
index 89e8d0a..ea0c961 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
+++ b/arch/arm/plat-samsung/include/plat/s3c244x.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
+/* linux/arch/arm/plat-samsung/include/plat/s3c244x.h
*
* Copyright (c) 2004-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/mach-s3c64xx/include/mach/s3c6400.h b/arch/arm/plat-samsung/include/plat/s3c6400.h
similarity index 94%
rename from arch/arm/mach-s3c64xx/include/mach/s3c6400.h
rename to arch/arm/plat-samsung/include/plat/s3c6400.h
index f86958d..37d428a 100644
--- a/arch/arm/mach-s3c64xx/include/mach/s3c6400.h
+++ b/arch/arm/plat-samsung/include/plat/s3c6400.h
@@ -1,4 +1,4 @@
-/* arch/arm/mach-s3c64xx/include/macht/s3c6400.h
+/* linux/arch/arm/plat-samsung/include/plat/s3c6400.h
*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
diff --git a/arch/arm/mach-s3c64xx/include/mach/s3c6410.h b/arch/arm/plat-samsung/include/plat/s3c6410.h
similarity index 93%
rename from arch/arm/mach-s3c64xx/include/mach/s3c6410.h
rename to arch/arm/plat-samsung/include/plat/s3c6410.h
index 24f1141..20a6675 100644
--- a/arch/arm/mach-s3c64xx/include/mach/s3c6410.h
+++ b/arch/arm/plat-samsung/include/plat/s3c6410.h
@@ -1,4 +1,4 @@
-/* arch/arm/mach-s3c64xx/include/mach/s3c6410.h
+/* linux/arch/arm/plat-samsung/include/plat/s3c6410.h
*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s5p/include/plat/s5p6440.h b/arch/arm/plat-samsung/include/plat/s5p6440.h
similarity index 94%
rename from arch/arm/plat-s5p/include/plat/s5p6440.h
rename to arch/arm/plat-samsung/include/plat/s5p6440.h
index 528585d..bf85ebb 100644
--- a/arch/arm/plat-s5p/include/plat/s5p6440.h
+++ b/arch/arm/plat-samsung/include/plat/s5p6440.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s5p/include/plat/s5p6440.h
+/* linux/arch/arm/plat-samsung/include/plat/s5p6440.h
*
* Copyright (c) 2009 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
diff --git a/arch/arm/plat-s5p/include/plat/s5p6450.h b/arch/arm/plat-samsung/include/plat/s5p6450.h
similarity index 94%
rename from arch/arm/plat-s5p/include/plat/s5p6450.h
rename to arch/arm/plat-samsung/include/plat/s5p6450.h
index 640a41c..da25f9a 100644
--- a/arch/arm/plat-s5p/include/plat/s5p6450.h
+++ b/arch/arm/plat-samsung/include/plat/s5p6450.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s5p/include/plat/s5p6450.h
+/* linux/arch/arm/plat-samsung/include/plat/s5p6450.h
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
diff --git a/arch/arm/plat-s5p/include/plat/s5pc100.h b/arch/arm/plat-samsung/include/plat/s5pc100.h
similarity index 94%
rename from arch/arm/plat-s5p/include/plat/s5pc100.h
rename to arch/arm/plat-samsung/include/plat/s5pc100.h
index 5f6099d..9a21aea 100644
--- a/arch/arm/plat-s5p/include/plat/s5pc100.h
+++ b/arch/arm/plat-samsung/include/plat/s5pc100.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s5p/include/plat/s5pc100.h
+/* linux/arch/arm/plat-samsung/include/plat/s5pc100.h
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
diff --git a/arch/arm/plat-s5p/include/plat/s5pv210.h b/arch/arm/plat-samsung/include/plat/s5pv210.h
similarity index 94%
rename from arch/arm/plat-s5p/include/plat/s5pv210.h
rename to arch/arm/plat-samsung/include/plat/s5pv210.h
index 6c93a0c..b4bc6be 100644
--- a/arch/arm/plat-s5p/include/plat/s5pv210.h
+++ b/arch/arm/plat-samsung/include/plat/s5pv210.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s5p/include/plat/s5pv210.h
+/* linux/arch/arm/plat-samsung/include/plat/s5pv210.h
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
--
1.7.1
^ permalink raw reply related
* [PATCH 2/3] ARM: SAMSUNG: Move S3C24XX header files to plat-samsung
From: Kukjin Kim @ 2011-09-30 12:55 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves header files from plat-s3c24xx to plat-samsung to
remove plat-s3c24xx directory to make one plat-samsung directory for
Samsung SoCs. And this patch includes fixing coding style, too.
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/plat-s3c24xx/include/plat/regs-iis.h | 68 ----------
arch/arm/plat-s3c24xx/include/plat/regs-spi.h | 81 ------------
.../include/plat/audio-simtec.h | 2 +-
.../include/plat/common-smdk.h | 2 +-
.../include/plat/cpu-freq-core.h | 5 +-
.../include/plat/fiq.h | 2 +-
.../include/plat/irq.h | 25 ++--
.../include/plat/mci.h | 10 +-
.../include/plat/regs-dma.h | 112 +++++++++--------
arch/arm/plat-samsung/include/plat/regs-iis.h | 70 +++++++++++
arch/arm/plat-samsung/include/plat/regs-spi.h | 48 +++++++
.../include/plat/regs-udc.h | 132 ++++++++++----------
.../include/plat/udc.h | 4 +-
13 files changed, 268 insertions(+), 293 deletions(-)
delete mode 100644 arch/arm/plat-s3c24xx/include/plat/regs-iis.h
delete mode 100644 arch/arm/plat-s3c24xx/include/plat/regs-spi.h
rename arch/arm/{plat-s3c24xx => plat-samsung}/include/plat/audio-simtec.h (95%)
rename arch/arm/{plat-s3c24xx => plat-samsung}/include/plat/common-smdk.h (87%)
rename arch/arm/{plat-s3c24xx => plat-samsung}/include/plat/cpu-freq-core.h (98%)
rename arch/arm/{plat-s3c24xx => plat-samsung}/include/plat/fiq.h (88%)
rename arch/arm/{plat-s3c24xx => plat-samsung}/include/plat/irq.h (81%)
rename arch/arm/{plat-s3c24xx => plat-samsung}/include/plat/mci.h (90%)
rename arch/arm/{plat-s3c24xx => plat-samsung}/include/plat/regs-dma.h (58%)
create mode 100644 arch/arm/plat-samsung/include/plat/regs-iis.h
create mode 100644 arch/arm/plat-samsung/include/plat/regs-spi.h
rename arch/arm/{plat-s3c24xx => plat-samsung}/include/plat/regs-udc.h (51%)
rename arch/arm/{plat-s3c24xx => plat-samsung}/include/plat/udc.h (95%)
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-iis.h b/arch/arm/plat-s3c24xx/include/plat/regs-iis.h
deleted file mode 100644
index cc44e0e..0000000
--- a/arch/arm/plat-s3c24xx/include/plat/regs-iis.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-iis.h
- *
- * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
- * http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 IIS register definition
-*/
-
-#ifndef __ASM_ARCH_REGS_IIS_H
-#define __ASM_ARCH_REGS_IIS_H
-
-#define S3C2410_IISCON (0x00)
-
-#define S3C2410_IISCON_LRINDEX (1<<8)
-#define S3C2410_IISCON_TXFIFORDY (1<<7)
-#define S3C2410_IISCON_RXFIFORDY (1<<6)
-#define S3C2410_IISCON_TXDMAEN (1<<5)
-#define S3C2410_IISCON_RXDMAEN (1<<4)
-#define S3C2410_IISCON_TXIDLE (1<<3)
-#define S3C2410_IISCON_RXIDLE (1<<2)
-#define S3C2410_IISCON_PSCEN (1<<1)
-#define S3C2410_IISCON_IISEN (1<<0)
-
-#define S3C2410_IISMOD (0x04)
-
-#define S3C2440_IISMOD_MPLL (1<<9)
-#define S3C2410_IISMOD_SLAVE (1<<8)
-#define S3C2410_IISMOD_NOXFER (0<<6)
-#define S3C2410_IISMOD_RXMODE (1<<6)
-#define S3C2410_IISMOD_TXMODE (2<<6)
-#define S3C2410_IISMOD_TXRXMODE (3<<6)
-#define S3C2410_IISMOD_LR_LLOW (0<<5)
-#define S3C2410_IISMOD_LR_RLOW (1<<5)
-#define S3C2410_IISMOD_IIS (0<<4)
-#define S3C2410_IISMOD_MSB (1<<4)
-#define S3C2410_IISMOD_8BIT (0<<3)
-#define S3C2410_IISMOD_16BIT (1<<3)
-#define S3C2410_IISMOD_BITMASK (1<<3)
-#define S3C2410_IISMOD_256FS (0<<2)
-#define S3C2410_IISMOD_384FS (1<<2)
-#define S3C2410_IISMOD_16FS (0<<0)
-#define S3C2410_IISMOD_32FS (1<<0)
-#define S3C2410_IISMOD_48FS (2<<0)
-#define S3C2410_IISMOD_FS_MASK (3<<0)
-
-#define S3C2410_IISPSR (0x08)
-#define S3C2410_IISPSR_INTMASK (31<<5)
-#define S3C2410_IISPSR_INTSHIFT (5)
-#define S3C2410_IISPSR_EXTMASK (31<<0)
-#define S3C2410_IISPSR_EXTSHFIT (0)
-
-#define S3C2410_IISFCON (0x0c)
-
-#define S3C2410_IISFCON_TXDMA (1<<15)
-#define S3C2410_IISFCON_RXDMA (1<<14)
-#define S3C2410_IISFCON_TXENABLE (1<<13)
-#define S3C2410_IISFCON_RXENABLE (1<<12)
-#define S3C2410_IISFCON_TXMASK (0x3f << 6)
-#define S3C2410_IISFCON_TXSHIFT (6)
-#define S3C2410_IISFCON_RXMASK (0x3f)
-#define S3C2410_IISFCON_RXSHIFT (0)
-
-#define S3C2410_IISFIFO (0x10)
-#endif /* __ASM_ARCH_REGS_IIS_H */
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-spi.h b/arch/arm/plat-s3c24xx/include/plat/regs-spi.h
deleted file mode 100644
index 892e2f6..0000000
--- a/arch/arm/plat-s3c24xx/include/plat/regs-spi.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-spi.h
- *
- * Copyright (c) 2004 Fetron GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 SPI register definition
-*/
-
-#ifndef __ASM_ARCH_REGS_SPI_H
-#define __ASM_ARCH_REGS_SPI_H
-
-#define S3C2410_SPI1 (0x20)
-#define S3C2412_SPI1 (0x100)
-
-#define S3C2410_SPCON (0x00)
-
-#define S3C2412_SPCON_RXFIFO_RB2 (0<<14)
-#define S3C2412_SPCON_RXFIFO_RB4 (1<<14)
-#define S3C2412_SPCON_RXFIFO_RB12 (2<<14)
-#define S3C2412_SPCON_RXFIFO_RB14 (3<<14)
-#define S3C2412_SPCON_TXFIFO_RB2 (0<<12)
-#define S3C2412_SPCON_TXFIFO_RB4 (1<<12)
-#define S3C2412_SPCON_TXFIFO_RB12 (2<<12)
-#define S3C2412_SPCON_TXFIFO_RB14 (3<<12)
-#define S3C2412_SPCON_RXFIFO_RESET (1<<11) /* RxFIFO reset */
-#define S3C2412_SPCON_TXFIFO_RESET (1<<10) /* TxFIFO reset */
-#define S3C2412_SPCON_RXFIFO_EN (1<<9) /* RxFIFO Enable */
-#define S3C2412_SPCON_TXFIFO_EN (1<<8) /* TxFIFO Enable */
-
-#define S3C2412_SPCON_DIRC_RX (1<<7)
-
-#define S3C2410_SPCON_SMOD_DMA (2<<5) /* DMA mode */
-#define S3C2410_SPCON_SMOD_INT (1<<5) /* interrupt mode */
-#define S3C2410_SPCON_SMOD_POLL (0<<5) /* polling mode */
-#define S3C2410_SPCON_ENSCK (1<<4) /* Enable SCK */
-#define S3C2410_SPCON_MSTR (1<<3) /* Master/Slave select
- 0: slave, 1: master */
-#define S3C2410_SPCON_CPOL_HIGH (1<<2) /* Clock polarity select */
-#define S3C2410_SPCON_CPOL_LOW (0<<2) /* Clock polarity select */
-
-#define S3C2410_SPCON_CPHA_FMTB (1<<1) /* Clock Phase Select */
-#define S3C2410_SPCON_CPHA_FMTA (0<<1) /* Clock Phase Select */
-
-#define S3C2410_SPCON_TAGD (1<<0) /* Tx auto garbage data mode */
-
-
-#define S3C2410_SPSTA (0x04)
-
-#define S3C2412_SPSTA_RXFIFO_AE (1<<11)
-#define S3C2412_SPSTA_TXFIFO_AE (1<<10)
-#define S3C2412_SPSTA_RXFIFO_ERROR (1<<9)
-#define S3C2412_SPSTA_TXFIFO_ERROR (1<<8)
-#define S3C2412_SPSTA_RXFIFO_FIFO (1<<7)
-#define S3C2412_SPSTA_RXFIFO_EMPTY (1<<6)
-#define S3C2412_SPSTA_TXFIFO_NFULL (1<<5)
-#define S3C2412_SPSTA_TXFIFO_EMPTY (1<<4)
-
-#define S3C2410_SPSTA_DCOL (1<<2) /* Data Collision Error */
-#define S3C2410_SPSTA_MULD (1<<1) /* Multi Master Error */
-#define S3C2410_SPSTA_READY (1<<0) /* Data Tx/Rx ready */
-#define S3C2412_SPSTA_READY_ORG (1<<3)
-
-#define S3C2410_SPPIN (0x08)
-
-#define S3C2410_SPPIN_ENMUL (1<<2) /* Multi Master Error detect */
-#define S3C2410_SPPIN_RESERVED (1<<1)
-#define S3C2410_SPPIN_KEEP (1<<0) /* Master Out keep */
-
-#define S3C2410_SPPRE (0x0C)
-#define S3C2410_SPTDAT (0x10)
-#define S3C2410_SPRDAT (0x14)
-
-#define S3C2412_TXFIFO (0x18)
-#define S3C2412_RXFIFO (0x18)
-#define S3C2412_SPFIC (0x24)
-
-
-#endif /* __ASM_ARCH_REGS_SPI_H */
diff --git a/arch/arm/plat-s3c24xx/include/plat/audio-simtec.h b/arch/arm/plat-samsung/include/plat/audio-simtec.h
similarity index 95%
rename from arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
rename to arch/arm/plat-samsung/include/plat/audio-simtec.h
index de5e88f..5345364 100644
--- a/arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
+++ b/arch/arm/plat-samsung/include/plat/audio-simtec.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
+/* arch/arm/plat-samsung/include/plat/audio-simtec.h
*
* Copyright 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c24xx/include/plat/common-smdk.h b/arch/arm/plat-samsung/include/plat/common-smdk.h
similarity index 87%
rename from arch/arm/plat-s3c24xx/include/plat/common-smdk.h
rename to arch/arm/plat-samsung/include/plat/common-smdk.h
index 58d9094..ba028f1 100644
--- a/arch/arm/plat-s3c24xx/include/plat/common-smdk.h
+++ b/arch/arm/plat-samsung/include/plat/common-smdk.h
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c24xx/common-smdk.h
+/* linux/arch/arm/plat-samsung/include/plat/common-smdk.h
*
* Copyright (c) 2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
similarity index 98%
rename from arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
rename to arch/arm/plat-samsung/include/plat/cpu-freq-core.h
index d623235..dac4760 100644
--- a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/cpu-freq.h
+/* arch/arm/plat-samsung/include/plat/cpu-freq-core.h
*
* Copyright (c) 2006-2009 Simtec Electronics
* http://armlinux.simtec.co.uk/
@@ -195,7 +195,8 @@ struct s3c_cpufreq_info {
extern int s3c_cpufreq_register(struct s3c_cpufreq_info *info);
-extern int s3c_plltab_register(struct cpufreq_frequency_table *plls, unsigned int plls_no);
+extern int s3c_plltab_register(struct cpufreq_frequency_table *plls,
+ unsigned int plls_no);
/* exports and utilities for debugfs */
extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void);
diff --git a/arch/arm/plat-s3c24xx/include/plat/fiq.h b/arch/arm/plat-samsung/include/plat/fiq.h
similarity index 88%
rename from arch/arm/plat-s3c24xx/include/plat/fiq.h
rename to arch/arm/plat-samsung/include/plat/fiq.h
index 8521b83..535d06a 100644
--- a/arch/arm/plat-s3c24xx/include/plat/fiq.h
+++ b/arch/arm/plat-samsung/include/plat/fiq.h
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c24xx/fiq.h
+/* linux/arch/arm/plat-samsung/include/plat/fiq.h
*
* Copyright (c) 2009 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/plat-s3c24xx/include/plat/irq.h b/arch/arm/plat-samsung/include/plat/irq.h
similarity index 81%
rename from arch/arm/plat-s3c24xx/include/plat/irq.h
rename to arch/arm/plat-samsung/include/plat/irq.h
index ec087d6..e21a89b 100644
--- a/arch/arm/plat-s3c24xx/include/plat/irq.h
+++ b/arch/arm/plat-samsung/include/plat/irq.h
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c24xx/irq.h
+/* linux/arch/arm/plat-samsung/include/plat/irq.h
*
* Copyright (c) 2004-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
@@ -25,9 +25,9 @@
extern struct irq_chip s3c_irq_level_chip;
extern struct irq_chip s3c_irq_chip;
-static inline void
-s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
- int subcheck)
+static inline void s3c_irqsub_mask(unsigned int irqno,
+ unsigned int parentbit,
+ int subcheck)
{
unsigned long mask;
unsigned long submask;
@@ -39,17 +39,16 @@ s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
/* check to see if we need to mask the parent IRQ */
- if ((submask & subcheck) == subcheck) {
+ if ((submask & subcheck) == subcheck)
__raw_writel(mask | parentbit, S3C2410_INTMSK);
- }
/* write back masks */
__raw_writel(submask, S3C2410_INTSUBMSK);
}
-static inline void
-s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
+static inline void s3c_irqsub_unmask(unsigned int irqno,
+ unsigned int parentbit)
{
unsigned long mask;
unsigned long submask;
@@ -66,8 +65,9 @@ s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
}
-static inline void
-s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group)
+static inline void s3c_irqsub_maskack(unsigned int irqno,
+ unsigned int parentmask,
+ unsigned int group)
{
unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
@@ -86,8 +86,9 @@ s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int gro
}
}
-static inline void
-s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
+static inline void s3c_irqsub_ack(unsigned int irqno,
+ unsigned int parentmask,
+ unsigned int group)
{
unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
diff --git a/arch/arm/plat-s3c24xx/include/plat/mci.h b/arch/arm/plat-samsung/include/plat/mci.h
similarity index 90%
rename from arch/arm/plat-s3c24xx/include/plat/mci.h
rename to arch/arm/plat-samsung/include/plat/mci.h
index 2ac2b21..c42d317 100644
--- a/arch/arm/plat-s3c24xx/include/plat/mci.h
+++ b/arch/arm/plat-samsung/include/plat/mci.h
@@ -27,11 +27,11 @@
* to a non-zero value, otherwise the default of 3.2-3.4V is used.
*/
struct s3c24xx_mci_pdata {
- unsigned int no_wprotect : 1;
- unsigned int no_detect : 1;
- unsigned int wprotect_invert : 1;
- unsigned int detect_invert : 1; /* set => detect active high. */
- unsigned int use_dma : 1;
+ unsigned int no_wprotect:1;
+ unsigned int no_detect:1;
+ unsigned int wprotect_invert:1;
+ unsigned int detect_invert:1; /* set => detect active high */
+ unsigned int use_dma:1;
unsigned int gpio_detect;
unsigned int gpio_wprotect;
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-dma.h b/arch/arm/plat-samsung/include/plat/regs-dma.h
similarity index 58%
rename from arch/arm/plat-s3c24xx/include/plat/regs-dma.h
rename to arch/arm/plat-samsung/include/plat/regs-dma.h
index 1b0f4c3..178bccb 100644
--- a/arch/arm/plat-s3c24xx/include/plat/regs-dma.h
+++ b/arch/arm/plat-samsung/include/plat/regs-dma.h
@@ -1,4 +1,4 @@
-/* arch/arm/mach-s3c2410/include/mach/dma.h
+/* arch/arm/plat-samsung/include/plat/regs-dma.h
*
* Copyright (C) 2003-2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
@@ -10,7 +10,8 @@
* published by the Free Software Foundation.
*/
-/* DMA Register definitions */
+#ifndef __ASM_PLAT_REGS_DMA_H
+#define __ASM_PLAT_REGS_DMA_H __FILE__
#define S3C2410_DMA_DISRC (0x00)
#define S3C2410_DMA_DISRCC (0x04)
@@ -24,74 +25,75 @@
#define S3C2412_DMA_DMAREQSEL (0x24)
#define S3C2443_DMA_DMAREQSEL (0x24)
-#define S3C2410_DISRCC_INC (1<<0)
-#define S3C2410_DISRCC_APB (1<<1)
+#define S3C2410_DISRCC_INC (1 << 0)
+#define S3C2410_DISRCC_APB (1 << 1)
-#define S3C2410_DMASKTRIG_STOP (1<<2)
-#define S3C2410_DMASKTRIG_ON (1<<1)
-#define S3C2410_DMASKTRIG_SWTRIG (1<<0)
+#define S3C2410_DMASKTRIG_STOP (1 << 2)
+#define S3C2410_DMASKTRIG_ON (1 << 1)
+#define S3C2410_DMASKTRIG_SWTRIG (1 << 0)
-#define S3C2410_DCON_DEMAND (0<<31)
-#define S3C2410_DCON_HANDSHAKE (1<<31)
-#define S3C2410_DCON_SYNC_PCLK (0<<30)
-#define S3C2410_DCON_SYNC_HCLK (1<<30)
+#define S3C2410_DCON_DEMAND (0 << 31)
+#define S3C2410_DCON_HANDSHAKE (1 << 31)
+#define S3C2410_DCON_SYNC_PCLK (0 << 30)
+#define S3C2410_DCON_SYNC_HCLK (1 << 30)
-#define S3C2410_DCON_INTREQ (1<<29)
+#define S3C2410_DCON_INTREQ (1 << 29)
-#define S3C2410_DCON_CH0_XDREQ0 (0<<24)
-#define S3C2410_DCON_CH0_UART0 (1<<24)
-#define S3C2410_DCON_CH0_SDI (2<<24)
-#define S3C2410_DCON_CH0_TIMER (3<<24)
-#define S3C2410_DCON_CH0_USBEP1 (4<<24)
+#define S3C2410_DCON_CH0_XDREQ0 (0 << 24)
+#define S3C2410_DCON_CH0_UART0 (1 << 24)
+#define S3C2410_DCON_CH0_SDI (2 << 24)
+#define S3C2410_DCON_CH0_TIMER (3 << 24)
+#define S3C2410_DCON_CH0_USBEP1 (4 << 24)
-#define S3C2410_DCON_CH1_XDREQ1 (0<<24)
-#define S3C2410_DCON_CH1_UART1 (1<<24)
-#define S3C2410_DCON_CH1_I2SSDI (2<<24)
-#define S3C2410_DCON_CH1_SPI (3<<24)
-#define S3C2410_DCON_CH1_USBEP2 (4<<24)
+#define S3C2410_DCON_CH1_XDREQ1 (0 << 24)
+#define S3C2410_DCON_CH1_UART1 (1 << 24)
+#define S3C2410_DCON_CH1_I2SSDI (2 << 24)
+#define S3C2410_DCON_CH1_SPI (3 << 24)
+#define S3C2410_DCON_CH1_USBEP2 (4 << 24)
-#define S3C2410_DCON_CH2_I2SSDO (0<<24)
-#define S3C2410_DCON_CH2_I2SSDI (1<<24)
-#define S3C2410_DCON_CH2_SDI (2<<24)
-#define S3C2410_DCON_CH2_TIMER (3<<24)
-#define S3C2410_DCON_CH2_USBEP3 (4<<24)
+#define S3C2410_DCON_CH2_I2SSDO (0 << 24)
+#define S3C2410_DCON_CH2_I2SSDI (1 << 24)
+#define S3C2410_DCON_CH2_SDI (2 << 24)
+#define S3C2410_DCON_CH2_TIMER (3 << 24)
+#define S3C2410_DCON_CH2_USBEP3 (4 << 24)
-#define S3C2410_DCON_CH3_UART2 (0<<24)
-#define S3C2410_DCON_CH3_SDI (1<<24)
-#define S3C2410_DCON_CH3_SPI (2<<24)
-#define S3C2410_DCON_CH3_TIMER (3<<24)
-#define S3C2410_DCON_CH3_USBEP4 (4<<24)
+#define S3C2410_DCON_CH3_UART2 (0 << 24)
+#define S3C2410_DCON_CH3_SDI (1 << 24)
+#define S3C2410_DCON_CH3_SPI (2 << 24)
+#define S3C2410_DCON_CH3_TIMER (3 << 24)
+#define S3C2410_DCON_CH3_USBEP4 (4 << 24)
#define S3C2410_DCON_SRCSHIFT (24)
-#define S3C2410_DCON_SRCMASK (7<<24)
+#define S3C2410_DCON_SRCMASK (7 << 24)
-#define S3C2410_DCON_BYTE (0<<20)
-#define S3C2410_DCON_HALFWORD (1<<20)
-#define S3C2410_DCON_WORD (2<<20)
+#define S3C2410_DCON_BYTE (0 << 20)
+#define S3C2410_DCON_HALFWORD (1 << 20)
+#define S3C2410_DCON_WORD (2 << 20)
-#define S3C2410_DCON_AUTORELOAD (0<<22)
-#define S3C2410_DCON_NORELOAD (1<<22)
-#define S3C2410_DCON_HWTRIG (1<<23)
+#define S3C2410_DCON_AUTORELOAD (0 << 22)
+#define S3C2410_DCON_NORELOAD (1 << 22)
+#define S3C2410_DCON_HWTRIG (1 << 23)
#ifdef CONFIG_CPU_S3C2440
-#define S3C2440_DIDSTC_CHKINT (1<<2)
-#define S3C2440_DCON_CH0_I2SSDO (5<<24)
-#define S3C2440_DCON_CH0_PCMIN (6<<24)
+#define S3C2440_DIDSTC_CHKINT (1 << 2)
-#define S3C2440_DCON_CH1_PCMOUT (5<<24)
-#define S3C2440_DCON_CH1_SDI (6<<24)
+#define S3C2440_DCON_CH0_I2SSDO (5 << 24)
+#define S3C2440_DCON_CH0_PCMIN (6 << 24)
-#define S3C2440_DCON_CH2_PCMIN (5<<24)
-#define S3C2440_DCON_CH2_MICIN (6<<24)
+#define S3C2440_DCON_CH1_PCMOUT (5 << 24)
+#define S3C2440_DCON_CH1_SDI (6 << 24)
-#define S3C2440_DCON_CH3_MICIN (5<<24)
-#define S3C2440_DCON_CH3_PCMOUT (6<<24)
-#endif
+#define S3C2440_DCON_CH2_PCMIN (5 << 24)
+#define S3C2440_DCON_CH2_MICIN (6 << 24)
+
+#define S3C2440_DCON_CH3_MICIN (5 << 24)
+#define S3C2440_DCON_CH3_PCMOUT (6 << 24)
+#endif /* CONFIG_CPU_S3C2440 */
#ifdef CONFIG_CPU_S3C2412
-#define S3C2412_DMAREQSEL_SRC(x) ((x)<<1)
+#define S3C2412_DMAREQSEL_SRC(x) ((x) << 1)
#define S3C2412_DMAREQSEL_HW (1)
@@ -115,10 +117,11 @@
#define S3C2412_DMAREQSEL_UART1_1 S3C2412_DMAREQSEL_SRC(22)
#define S3C2412_DMAREQSEL_UART2_0 S3C2412_DMAREQSEL_SRC(23)
#define S3C2412_DMAREQSEL_UART2_1 S3C2412_DMAREQSEL_SRC(24)
+#endif /* CONFIG_CPU_S3C2412 */
-#endif
+#ifdef CONFIG_CPU_S3C2443
-#define S3C2443_DMAREQSEL_SRC(x) ((x)<<1)
+#define S3C2443_DMAREQSEL_SRC(x) ((x) << 1)
#define S3C2443_DMAREQSEL_HW (1)
@@ -141,5 +144,8 @@
#define S3C2443_DMAREQSEL_UART3_0 S3C2443_DMAREQSEL_SRC(25)
#define S3C2443_DMAREQSEL_UART3_1 S3C2443_DMAREQSEL_SRC(26)
#define S3C2443_DMAREQSEL_PCMOUT S3C2443_DMAREQSEL_SRC(27)
-#define S3C2443_DMAREQSEL_PCMIN S3C2443_DMAREQSEL_SRC(28)
+#define S3C2443_DMAREQSEL_PCMIN S3C2443_DMAREQSEL_SRC(28)
#define S3C2443_DMAREQSEL_MICIN S3C2443_DMAREQSEL_SRC(29)
+#endif /* CONFIG_CPU_S3C2443 */
+
+#endif /* __ASM_PLAT_REGS_DMA_H */
diff --git a/arch/arm/plat-samsung/include/plat/regs-iis.h b/arch/arm/plat-samsung/include/plat/regs-iis.h
new file mode 100644
index 0000000..a18d35e
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/regs-iis.h
@@ -0,0 +1,70 @@
+/* arch/arm/plat-samsung/include/plat/regs-iis.h
+ *
+ * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
+ * http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 IIS register definition
+*/
+
+#ifndef __ASM_ARCH_REGS_IIS_H
+#define __ASM_ARCH_REGS_IIS_H
+
+#define S3C2410_IISCON (0x00)
+
+#define S3C2410_IISCON_LRINDEX (1 << 8)
+#define S3C2410_IISCON_TXFIFORDY (1 << 7)
+#define S3C2410_IISCON_RXFIFORDY (1 << 6)
+#define S3C2410_IISCON_TXDMAEN (1 << 5)
+#define S3C2410_IISCON_RXDMAEN (1 << 4)
+#define S3C2410_IISCON_TXIDLE (1 << 3)
+#define S3C2410_IISCON_RXIDLE (1 << 2)
+#define S3C2410_IISCON_PSCEN (1 << 1)
+#define S3C2410_IISCON_IISEN (1 << 0)
+
+#define S3C2410_IISMOD (0x04)
+
+#define S3C2440_IISMOD_MPLL (1 << 9)
+#define S3C2410_IISMOD_SLAVE (1 << 8)
+#define S3C2410_IISMOD_NOXFER (0 << 6)
+#define S3C2410_IISMOD_RXMODE (1 << 6)
+#define S3C2410_IISMOD_TXMODE (2 << 6)
+#define S3C2410_IISMOD_TXRXMODE (3 << 6)
+#define S3C2410_IISMOD_LR_LLOW (0 << 5)
+#define S3C2410_IISMOD_LR_RLOW (1 << 5)
+#define S3C2410_IISMOD_IIS (0 << 4)
+#define S3C2410_IISMOD_MSB (1 << 4)
+#define S3C2410_IISMOD_8BIT (0 << 3)
+#define S3C2410_IISMOD_16BIT (1 << 3)
+#define S3C2410_IISMOD_BITMASK (1 << 3)
+#define S3C2410_IISMOD_256FS (0 << 2)
+#define S3C2410_IISMOD_384FS (1 << 2)
+#define S3C2410_IISMOD_16FS (0 << 0)
+#define S3C2410_IISMOD_32FS (1 << 0)
+#define S3C2410_IISMOD_48FS (2 << 0)
+#define S3C2410_IISMOD_FS_MASK (3 << 0)
+
+#define S3C2410_IISPSR (0x08)
+
+#define S3C2410_IISPSR_INTMASK (31 << 5)
+#define S3C2410_IISPSR_INTSHIFT (5)
+#define S3C2410_IISPSR_EXTMASK (31 << 0)
+#define S3C2410_IISPSR_EXTSHFIT (0)
+
+#define S3C2410_IISFCON (0x0c)
+
+#define S3C2410_IISFCON_TXDMA (1 << 15)
+#define S3C2410_IISFCON_RXDMA (1 << 14)
+#define S3C2410_IISFCON_TXENABLE (1 << 13)
+#define S3C2410_IISFCON_RXENABLE (1 << 12)
+#define S3C2410_IISFCON_TXMASK (0x3f << 6)
+#define S3C2410_IISFCON_TXSHIFT (6)
+#define S3C2410_IISFCON_RXMASK (0x3f)
+#define S3C2410_IISFCON_RXSHIFT (0)
+
+#define S3C2410_IISFIFO (0x10)
+
+#endif /* __ASM_ARCH_REGS_IIS_H */
diff --git a/arch/arm/plat-samsung/include/plat/regs-spi.h b/arch/arm/plat-samsung/include/plat/regs-spi.h
new file mode 100644
index 0000000..552fe7c
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/regs-spi.h
@@ -0,0 +1,48 @@
+/* arch/arm/plat-samsung/include/plat/regs-spi.h
+ *
+ * Copyright (c) 2004 Fetron GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 SPI register definition
+*/
+
+#ifndef __ASM_ARCH_REGS_SPI_H
+#define __ASM_ARCH_REGS_SPI_H
+
+#define S3C2410_SPI1 (0x20)
+#define S3C2412_SPI1 (0x100)
+
+#define S3C2410_SPCON (0x00)
+
+#define S3C2410_SPCON_SMOD_DMA (2 << 5) /* DMA mode */
+#define S3C2410_SPCON_SMOD_INT (1 << 5) /* interrupt mode */
+#define S3C2410_SPCON_SMOD_POLL (0 << 5) /* polling mode */
+#define S3C2410_SPCON_ENSCK (1 << 4) /* Enable SCK */
+#define S3C2410_SPCON_MSTR (1 << 3) /* Master:1, Slave:0 select */
+#define S3C2410_SPCON_CPOL_HIGH (1 << 2) /* Clock polarity select */
+#define S3C2410_SPCON_CPOL_LOW (0 << 2) /* Clock polarity select */
+
+#define S3C2410_SPCON_CPHA_FMTB (1 << 1) /* Clock Phase Select */
+#define S3C2410_SPCON_CPHA_FMTA (0 << 1) /* Clock Phase Select */
+
+#define S3C2410_SPSTA (0x04)
+
+#define S3C2410_SPSTA_DCOL (1 << 2) /* Data Collision Error */
+#define S3C2410_SPSTA_MULD (1 << 1) /* Multi Master Error */
+#define S3C2410_SPSTA_READY (1 << 0) /* Data Tx/Rx ready */
+#define S3C2412_SPSTA_READY_ORG (1 << 3)
+
+#define S3C2410_SPPIN (0x08)
+
+#define S3C2410_SPPIN_ENMUL (1 << 2) /* Multi Master Error detect */
+#define S3C2410_SPPIN_RESERVED (1 << 1)
+#define S3C2410_SPPIN_KEEP (1 << 0) /* Master Out keep */
+
+#define S3C2410_SPPRE (0x0C)
+#define S3C2410_SPTDAT (0x10)
+#define S3C2410_SPRDAT (0x14)
+
+#endif /* __ASM_ARCH_REGS_SPI_H */
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-udc.h b/arch/arm/plat-samsung/include/plat/regs-udc.h
similarity index 51%
rename from arch/arm/plat-s3c24xx/include/plat/regs-udc.h
rename to arch/arm/plat-samsung/include/plat/regs-udc.h
index f0dd4a4..4003d3d 100644
--- a/arch/arm/plat-s3c24xx/include/plat/regs-udc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-udc.h
@@ -1,4 +1,4 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-udc.h
+/* arch/arm/plat-samsung/include/plat/regs-udc.h
*
* Copyright (C) 2004 Herbert Poetzl <herbert@13thfloor.at>
*
@@ -75,79 +75,77 @@
#define S3C2410_UDC_OUT_FIFO_CNT1_REG S3C2410_USBDREG(0x0198)
#define S3C2410_UDC_OUT_FIFO_CNT2_REG S3C2410_USBDREG(0x019c)
-#define S3C2410_UDC_FUNCADDR_UPDATE (1<<7)
+#define S3C2410_UDC_FUNCADDR_UPDATE (1 << 7)
-#define S3C2410_UDC_PWR_ISOUP (1<<7) // R/W
-#define S3C2410_UDC_PWR_RESET (1<<3) // R
-#define S3C2410_UDC_PWR_RESUME (1<<2) // R/W
-#define S3C2410_UDC_PWR_SUSPEND (1<<1) // R
-#define S3C2410_UDC_PWR_ENSUSPEND (1<<0) // R/W
+#define S3C2410_UDC_PWR_ISOUP (1 << 7) /* R/W */
+#define S3C2410_UDC_PWR_RESET (1 << 3) /* R */
+#define S3C2410_UDC_PWR_RESUME (1 << 2) /* R/W */
+#define S3C2410_UDC_PWR_SUSPEND (1 << 1) /* R */
+#define S3C2410_UDC_PWR_ENSUSPEND (1 << 0) /* R/W */
-#define S3C2410_UDC_PWR_DEFAULT 0x00
+#define S3C2410_UDC_PWR_DEFAULT (0x00)
-#define S3C2410_UDC_INT_EP4 (1<<4) // R/W (clear only)
-#define S3C2410_UDC_INT_EP3 (1<<3) // R/W (clear only)
-#define S3C2410_UDC_INT_EP2 (1<<2) // R/W (clear only)
-#define S3C2410_UDC_INT_EP1 (1<<1) // R/W (clear only)
-#define S3C2410_UDC_INT_EP0 (1<<0) // R/W (clear only)
+#define S3C2410_UDC_INT_EP4 (1 << 4) /* R/W (clear only) */
+#define S3C2410_UDC_INT_EP3 (1 << 3) /* R/W (clear only) */
+#define S3C2410_UDC_INT_EP2 (1 << 2) /* R/W (clear only) */
+#define S3C2410_UDC_INT_EP1 (1 << 1) /* R/W (clear only) */
+#define S3C2410_UDC_INT_EP0 (1 << 0) /* R/W (clear only) */
-#define S3C2410_UDC_USBINT_RESET (1<<2) // R/W (clear only)
-#define S3C2410_UDC_USBINT_RESUME (1<<1) // R/W (clear only)
-#define S3C2410_UDC_USBINT_SUSPEND (1<<0) // R/W (clear only)
+#define S3C2410_UDC_USBINT_RESET (1 << 2) /* R/W (clear only) */
+#define S3C2410_UDC_USBINT_RESUME (1 << 1) /* R/W (clear only) */
+#define S3C2410_UDC_USBINT_SUSPEND (1 << 0) /* R/W (clear only) */
-#define S3C2410_UDC_INTE_EP4 (1<<4) // R/W
-#define S3C2410_UDC_INTE_EP3 (1<<3) // R/W
-#define S3C2410_UDC_INTE_EP2 (1<<2) // R/W
-#define S3C2410_UDC_INTE_EP1 (1<<1) // R/W
-#define S3C2410_UDC_INTE_EP0 (1<<0) // R/W
-
-#define S3C2410_UDC_USBINTE_RESET (1<<2) // R/W
-#define S3C2410_UDC_USBINTE_SUSPEND (1<<0) // R/W
+#define S3C2410_UDC_INTE_EP4 (1 << 4) /* R/W */
+#define S3C2410_UDC_INTE_EP3 (1 << 3) /* R/W */
+#define S3C2410_UDC_INTE_EP2 (1 << 2) /* R/W */
+#define S3C2410_UDC_INTE_EP1 (1 << 1) /* R/W */
+#define S3C2410_UDC_INTE_EP0 (1 << 0) /* R/W */
+#define S3C2410_UDC_USBINTE_RESET (1 << 2) /* R/W */
+#define S3C2410_UDC_USBINTE_SUSPEND (1 << 0) /* R/W */
#define S3C2410_UDC_INDEX_EP0 (0x00)
-#define S3C2410_UDC_INDEX_EP1 (0x01) // ??
-#define S3C2410_UDC_INDEX_EP2 (0x02) // ??
-#define S3C2410_UDC_INDEX_EP3 (0x03) // ??
-#define S3C2410_UDC_INDEX_EP4 (0x04) // ??
-
-#define S3C2410_UDC_ICSR1_CLRDT (1<<6) // R/W
-#define S3C2410_UDC_ICSR1_SENTSTL (1<<5) // R/W (clear only)
-#define S3C2410_UDC_ICSR1_SENDSTL (1<<4) // R/W
-#define S3C2410_UDC_ICSR1_FFLUSH (1<<3) // W (set only)
-#define S3C2410_UDC_ICSR1_UNDRUN (1<<2) // R/W (clear only)
-#define S3C2410_UDC_ICSR1_PKTRDY (1<<0) // R/W (set only)
-
-#define S3C2410_UDC_ICSR2_AUTOSET (1<<7) // R/W
-#define S3C2410_UDC_ICSR2_ISO (1<<6) // R/W
-#define S3C2410_UDC_ICSR2_MODEIN (1<<5) // R/W
-#define S3C2410_UDC_ICSR2_DMAIEN (1<<4) // R/W
-
-#define S3C2410_UDC_OCSR1_CLRDT (1<<7) // R/W
-#define S3C2410_UDC_OCSR1_SENTSTL (1<<6) // R/W (clear only)
-#define S3C2410_UDC_OCSR1_SENDSTL (1<<5) // R/W
-#define S3C2410_UDC_OCSR1_FFLUSH (1<<4) // R/W
-#define S3C2410_UDC_OCSR1_DERROR (1<<3) // R
-#define S3C2410_UDC_OCSR1_OVRRUN (1<<2) // R/W (clear only)
-#define S3C2410_UDC_OCSR1_PKTRDY (1<<0) // R/W (clear only)
-
-#define S3C2410_UDC_OCSR2_AUTOCLR (1<<7) // R/W
-#define S3C2410_UDC_OCSR2_ISO (1<<6) // R/W
-#define S3C2410_UDC_OCSR2_DMAIEN (1<<5) // R/W
-
-#define S3C2410_UDC_EP0_CSR_OPKRDY (1<<0)
-#define S3C2410_UDC_EP0_CSR_IPKRDY (1<<1)
-#define S3C2410_UDC_EP0_CSR_SENTSTL (1<<2)
-#define S3C2410_UDC_EP0_CSR_DE (1<<3)
-#define S3C2410_UDC_EP0_CSR_SE (1<<4)
-#define S3C2410_UDC_EP0_CSR_SENDSTL (1<<5)
-#define S3C2410_UDC_EP0_CSR_SOPKTRDY (1<<6)
-#define S3C2410_UDC_EP0_CSR_SSE (1<<7)
-
-#define S3C2410_UDC_MAXP_8 (1<<0)
-#define S3C2410_UDC_MAXP_16 (1<<1)
-#define S3C2410_UDC_MAXP_32 (1<<2)
-#define S3C2410_UDC_MAXP_64 (1<<3)
-
+#define S3C2410_UDC_INDEX_EP1 (0x01)
+#define S3C2410_UDC_INDEX_EP2 (0x02)
+#define S3C2410_UDC_INDEX_EP3 (0x03)
+#define S3C2410_UDC_INDEX_EP4 (0x04)
+
+#define S3C2410_UDC_ICSR1_CLRDT (1 << 6) /* R/W */
+#define S3C2410_UDC_ICSR1_SENTSTL (1 << 5) /* R/W (clear only) */
+#define S3C2410_UDC_ICSR1_SENDSTL (1 << 4) /* R/W */
+#define S3C2410_UDC_ICSR1_FFLUSH (1 << 3) /* W (set only) */
+#define S3C2410_UDC_ICSR1_UNDRUN (1 << 2) /* R/W (clear only) */
+#define S3C2410_UDC_ICSR1_PKTRDY (1 << 0) /* R/W (set only) */
+
+#define S3C2410_UDC_ICSR2_AUTOSET (1 << 7) /* R/W */
+#define S3C2410_UDC_ICSR2_ISO (1 << 6) /* R/W */
+#define S3C2410_UDC_ICSR2_MODEIN (1 << 5) /* R/W */
+#define S3C2410_UDC_ICSR2_DMAIEN (1 << 4) /* R/W */
+
+#define S3C2410_UDC_OCSR1_CLRDT (1 << 7) /* R/W */
+#define S3C2410_UDC_OCSR1_SENTSTL (1 << 6) /* R/W (clear only) */
+#define S3C2410_UDC_OCSR1_SENDSTL (1 << 5) /* R/W */
+#define S3C2410_UDC_OCSR1_FFLUSH (1 << 4) /* R/W */
+#define S3C2410_UDC_OCSR1_DERROR (1 << 3) /* R */
+#define S3C2410_UDC_OCSR1_OVRRUN (1 << 2) /* R/W (clear only) */
+#define S3C2410_UDC_OCSR1_PKTRDY (1 << 0) /* R/W (clear only) */
+
+#define S3C2410_UDC_OCSR2_AUTOCLR (1 << 7) /* R/W */
+#define S3C2410_UDC_OCSR2_ISO (1 << 6) /* R/W */
+#define S3C2410_UDC_OCSR2_DMAIEN (1 << 5) /* R/W */
+
+#define S3C2410_UDC_EP0_CSR_OPKRDY (1 << 0)
+#define S3C2410_UDC_EP0_CSR_IPKRDY (1 << 1)
+#define S3C2410_UDC_EP0_CSR_SENTSTL (1 << 2)
+#define S3C2410_UDC_EP0_CSR_DE (1 << 3)
+#define S3C2410_UDC_EP0_CSR_SE (1 << 4)
+#define S3C2410_UDC_EP0_CSR_SENDSTL (1 << 5)
+#define S3C2410_UDC_EP0_CSR_SOPKTRDY (1 << 6)
+#define S3C2410_UDC_EP0_CSR_SSE (1 << 7)
+
+#define S3C2410_UDC_MAXP_8 (1 << 0)
+#define S3C2410_UDC_MAXP_16 (1 << 1)
+#define S3C2410_UDC_MAXP_32 (1 << 2)
+#define S3C2410_UDC_MAXP_64 (1 << 3)
#endif
diff --git a/arch/arm/plat-s3c24xx/include/plat/udc.h b/arch/arm/plat-samsung/include/plat/udc.h
similarity index 95%
rename from arch/arm/plat-s3c24xx/include/plat/udc.h
rename to arch/arm/plat-samsung/include/plat/udc.h
index f638842..8c22d58 100644
--- a/arch/arm/plat-s3c24xx/include/plat/udc.h
+++ b/arch/arm/plat-samsung/include/plat/udc.h
@@ -1,4 +1,4 @@
-/* arch/arm/mach-s3c2410/include/mach/udc.h
+/* arch/arm/plat-samsung/include/plat/udc.h
*
* Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org>
*
@@ -26,7 +26,7 @@ enum s3c2410_udc_cmd_e {
struct s3c2410_udc_mach_info {
void (*udc_command)(enum s3c2410_udc_cmd_e);
- void (*vbus_draw)(unsigned int ma);
+ void (*vbus_draw)(unsigned int ma);
unsigned int pullup_pin;
unsigned int pullup_pin_inverted;
--
1.7.1
^ permalink raw reply related
* [PATCH 3/3] ARM: SAMSUNG: Move S5P header files to plat-samsung
From: Kukjin Kim @ 2011-09-30 12:55 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves header files from plat-s5p to plat-samsung to
remove plat-s5p directory to make one plat-samsung directory
for Samsung SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
.../include/plat/camport.h | 6 +++---
.../{plat-s5p => plat-samsung}/include/plat/ehci.h | 6 +++---
.../{plat-s5p => plat-samsung}/include/plat/irqs.h | 8 ++++----
.../{plat-s5p => plat-samsung}/include/plat/mfc.h | 6 +++---
.../include/plat/mipi_csis.h | 6 +++---
.../include/plat/regs-srom.h | 8 ++++----
.../include/plat/reset.h | 8 ++++----
.../include/plat/s5p-clock.h | 2 +-
.../include/plat/s5p-time.h | 2 +-
.../include/plat/sysmmu.h | 6 +++---
.../include/plat/system-reset.h | 2 +-
.../include/plat/usb-phy.h | 6 +++---
12 files changed, 33 insertions(+), 33 deletions(-)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/camport.h (87%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/ehci.h (86%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/irqs.h (96%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/mfc.h (91%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/mipi_csis.h (91%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/regs-srom.h (89%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/reset.h (67%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/s5p-clock.h (96%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/s5p-time.h (94%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/sysmmu.h (96%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/system-reset.h (92%)
rename arch/arm/{plat-s5p => plat-samsung}/include/plat/usb-phy.h (85%)
diff --git a/arch/arm/plat-s5p/include/plat/camport.h b/arch/arm/plat-samsung/include/plat/camport.h
similarity index 87%
rename from arch/arm/plat-s5p/include/plat/camport.h
rename to arch/arm/plat-samsung/include/plat/camport.h
index 71688c8..9db617d 100644
--- a/arch/arm/plat-s5p/include/plat/camport.h
+++ b/arch/arm/plat-samsung/include/plat/camport.h
@@ -8,8 +8,8 @@
* published by the Free Software Foundation.
*/
-#ifndef PLAT_S5P_CAMPORT_H_
-#define PLAT_S5P_CAMPORT_H_ __FILE__
+#ifndef __PLAT_SAMSUNG_CAMPORT_H_
+#define __PLAT_SAMSUNG_CAMPORT_H_ __FILE__
enum s5p_camport_id {
S5P_CAMPORT_A,
@@ -25,4 +25,4 @@ enum s5p_camport_id {
int s5pv210_fimc_setup_gpio(enum s5p_camport_id id);
int exynos4_fimc_setup_gpio(enum s5p_camport_id id);
-#endif
+#endif /* __PLAT_SAMSUNG_CAMPORT_H */
diff --git a/arch/arm/plat-s5p/include/plat/ehci.h b/arch/arm/plat-samsung/include/plat/ehci.h
similarity index 86%
rename from arch/arm/plat-s5p/include/plat/ehci.h
rename to arch/arm/plat-samsung/include/plat/ehci.h
index 6ae6810..c284d84 100644
--- a/arch/arm/plat-s5p/include/plat/ehci.h
+++ b/arch/arm/plat-samsung/include/plat/ehci.h
@@ -8,8 +8,8 @@
* option) any later version.
*/
-#ifndef __PLAT_S5P_EHCI_H
-#define __PLAT_S5P_EHCI_H
+#ifndef __PLAT_SAMSUNG_EHCI_H
+#define __PLAT_SAMSUNG_EHCI_H __FILE__
struct s5p_ehci_platdata {
int (*phy_init)(struct platform_device *pdev, int type);
@@ -18,4 +18,4 @@ struct s5p_ehci_platdata {
extern void s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd);
-#endif /* __PLAT_S5P_EHCI_H */
+#endif /* __PLAT_SAMSUNG_EHCI_H */
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
similarity index 96%
rename from arch/arm/plat-s5p/include/plat/irqs.h
rename to arch/arm/plat-samsung/include/plat/irqs.h
index ba9121c..3c62a7a 100644
--- a/arch/arm/plat-s5p/include/plat/irqs.h
+++ b/arch/arm/plat-samsung/include/plat/irqs.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s5p/include/plat/irqs.h
+/* linux/arch/arm/plat-samsung/include/plat/irqs.h
*
* Copyright (c) 2009 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
@@ -10,8 +10,8 @@
* published by the Free Software Foundation.
*/
-#ifndef __ASM_PLAT_S5P_IRQS_H
-#define __ASM_PLAT_S5P_IRQS_H __FILE__
+#ifndef __PLAT_SAMSUNG_IRQS_H
+#define __PLAT_SAMSUNG_IRQS_H __FILE__
/* we keep the first set of CPU IRQs out of the range of
* the ISA space, so that the PC104 has them to itself
@@ -112,4 +112,4 @@
#define S5P_IRQ_TYPE_EDGE_RISING (0x03)
#define S5P_IRQ_TYPE_EDGE_BOTH (0x04)
-#endif /* __ASM_PLAT_S5P_IRQS_H */
+#endif /* __PLAT_SAMSUNG_IRQS_H */
diff --git a/arch/arm/plat-s5p/include/plat/mfc.h b/arch/arm/plat-samsung/include/plat/mfc.h
similarity index 91%
rename from arch/arm/plat-s5p/include/plat/mfc.h
rename to arch/arm/plat-samsung/include/plat/mfc.h
index 6697f8c..08d14c3 100644
--- a/arch/arm/plat-s5p/include/plat/mfc.h
+++ b/arch/arm/plat-samsung/include/plat/mfc.h
@@ -7,8 +7,8 @@
* option) any later version.
*/
-#ifndef __PLAT_S5P_MFC_H
-#define __PLAT_S5P_MFC_H
+#ifndef __PLAT_SAMSUNG_MFC_H
+#define __PLAT_SAMSUNG_MFC_H __FILE__
/**
* s5p_mfc_reserve_mem - function to early reserve memory for MFC driver
@@ -24,4 +24,4 @@
void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize,
phys_addr_t lbase, unsigned int lsize);
-#endif /* __PLAT_S5P_MFC_H */
+#endif /* __PLAT_SAMSUNG_MFC_H */
diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-samsung/include/plat/mipi_csis.h
similarity index 91%
rename from arch/arm/plat-s5p/include/plat/mipi_csis.h
rename to arch/arm/plat-samsung/include/plat/mipi_csis.h
index 9bd254c..b02c076 100644
--- a/arch/arm/plat-s5p/include/plat/mipi_csis.h
+++ b/arch/arm/plat-samsung/include/plat/mipi_csis.h
@@ -8,8 +8,8 @@
* published by the Free Software Foundation.
*/
-#ifndef PLAT_S5P_MIPI_CSIS_H_
-#define PLAT_S5P_MIPI_CSIS_H_ __FILE__
+#ifndef __PLAT_SAMSUNG_MIPI_CSIS_H_
+#define __PLAT_SAMSUNG_MIPI_CSIS_H_ __FILE__
struct platform_device;
@@ -40,4 +40,4 @@ struct s5p_platform_mipi_csis {
*/
int s5p_csis_phy_enable(struct platform_device *pdev, bool on);
-#endif /* PLAT_S5P_MIPI_CSIS_H_ */
+#endif /* __PLAT_SAMSUNG_MIPI_CSIS_H_ */
diff --git a/arch/arm/plat-s5p/include/plat/regs-srom.h b/arch/arm/plat-samsung/include/plat/regs-srom.h
similarity index 89%
rename from arch/arm/plat-s5p/include/plat/regs-srom.h
rename to arch/arm/plat-samsung/include/plat/regs-srom.h
index f121ab5..cf6a998 100644
--- a/arch/arm/plat-s5p/include/plat/regs-srom.h
+++ b/arch/arm/plat-samsung/include/plat/regs-srom.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s5p/include/plat/regs-srom.h
+/* linux/arch/arm/plat-samsung/include/plat/regs-srom.h
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
@@ -10,8 +10,8 @@
* published by the Free Software Foundation.
*/
-#ifndef __ASM_PLAT_S5P_REGS_SROM_H
-#define __ASM_PLAT_S5P_REGS_SROM_H __FILE__
+#ifndef __PLAT_SAMSUNG_REGS_SROM_H
+#define __PLAT_SAMSUNG_REGS_SROM_H __FILE__
#include <mach/map.h>
@@ -51,4 +51,4 @@
#define S5P_SROM_BCX__TCOS__SHIFT 24
#define S5P_SROM_BCX__TACS__SHIFT 28
-#endif /* __ASM_PLAT_S5P_REGS_SROM_H */
+#endif /* __PLAT_SAMSUNG_REGS_SROM_H */
diff --git a/arch/arm/plat-s5p/include/plat/reset.h b/arch/arm/plat-samsung/include/plat/reset.h
similarity index 67%
rename from arch/arm/plat-s5p/include/plat/reset.h
rename to arch/arm/plat-samsung/include/plat/reset.h
index 335e978..b674415 100644
--- a/arch/arm/plat-s5p/include/plat/reset.h
+++ b/arch/arm/plat-samsung/include/plat/reset.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s5p/include/plat/reset.h
+/* linux/arch/arm/plat-samsung/include/plat/reset.h
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
@@ -8,9 +8,9 @@
* published by the Free Software Foundation.
*/
-#ifndef __ASM_PLAT_S5P_RESET_H
-#define __ASM_PLAT_S5P_RESET_H __FILE__
+#ifndef __PLAT_SAMSUNG_RESET_H
+#define __PLAT_SAMSUNG_RESET_H __FILE__
extern void (*s5p_reset_hook)(void);
-#endif /* __ASM_PLAT_S5P_RESET_H */
+#endif /* __PLAT_SAMSUNG_RESET_H */
diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-samsung/include/plat/s5p-clock.h
similarity index 96%
rename from arch/arm/plat-s5p/include/plat/s5p-clock.h
rename to arch/arm/plat-samsung/include/plat/s5p-clock.h
index 769b5bd..984bf9e 100644
--- a/arch/arm/plat-s5p/include/plat/s5p-clock.h
+++ b/arch/arm/plat-samsung/include/plat/s5p-clock.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s5p/include/plat/s5p-clock.h
+/* linux/arch/arm/plat-samsung/include/plat/s5p-clock.h
*
* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
diff --git a/arch/arm/plat-s5p/include/plat/s5p-time.h b/arch/arm/plat-samsung/include/plat/s5p-time.h
similarity index 94%
rename from arch/arm/plat-s5p/include/plat/s5p-time.h
rename to arch/arm/plat-samsung/include/plat/s5p-time.h
index 575e881..3a70aeb 100644
--- a/arch/arm/plat-s5p/include/plat/s5p-time.h
+++ b/arch/arm/plat-samsung/include/plat/s5p-time.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s5p/include/plat/s5p-time.h
+/* linux/arch/arm/plat-samsung/include/plat/s5p-time.h
*
* Copyright 2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
diff --git a/arch/arm/plat-s5p/include/plat/sysmmu.h b/arch/arm/plat-samsung/include/plat/sysmmu.h
similarity index 96%
rename from arch/arm/plat-s5p/include/plat/sysmmu.h
rename to arch/arm/plat-samsung/include/plat/sysmmu.h
index bf5283c..a05b9e2 100644
--- a/arch/arm/plat-s5p/include/plat/sysmmu.h
+++ b/arch/arm/plat-samsung/include/plat/sysmmu.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s5p/include/plat/sysmmu.h
+/* linux/arch/arm/plat-samsung/include/plat/sysmmu.h
*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
@@ -10,8 +10,8 @@
* published by the Free Software Foundation.
*/
-#ifndef __ASM__PLAT_SYSMMU_H
-#define __ASM__PLAT_SYSMMU_H __FILE__
+#ifndef __PLAT_SAMSUNG_SYSMMU_H
+#define __PLAT_SAMSUNG_SYSMMU_H __FILE__
enum S5P_SYSMMU_INTERRUPT_TYPE {
SYSMMU_PAGEFAULT,
diff --git a/arch/arm/plat-s5p/include/plat/system-reset.h b/arch/arm/plat-samsung/include/plat/system-reset.h
similarity index 92%
rename from arch/arm/plat-s5p/include/plat/system-reset.h
rename to arch/arm/plat-samsung/include/plat/system-reset.h
index f307f34..a448e99 100644
--- a/arch/arm/plat-s5p/include/plat/system-reset.h
+++ b/arch/arm/plat-samsung/include/plat/system-reset.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s5p/include/plat/system-reset.h
+/* linux/arch/arm/plat-samsung/include/plat/system-reset.h
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
diff --git a/arch/arm/plat-s5p/include/plat/usb-phy.h b/arch/arm/plat-samsung/include/plat/usb-phy.h
similarity index 85%
rename from arch/arm/plat-s5p/include/plat/usb-phy.h
rename to arch/arm/plat-samsung/include/plat/usb-phy.h
index 6dd6bcf..9934f18 100644
--- a/arch/arm/plat-s5p/include/plat/usb-phy.h
+++ b/arch/arm/plat-samsung/include/plat/usb-phy.h
@@ -8,8 +8,8 @@
* option) any later version.
*/
-#ifndef __PLAT_S5P_USB_PHY_H
-#define __PLAT_S5P_USB_PHY_H
+#ifndef __PLAT_SAMSUNG_USB_PHY_H
+#define __PLAT_SAMSUNG_USB_PHY_H __FILE__
enum s5p_usb_phy_type {
S5P_USB_PHY_DEVICE,
@@ -19,4 +19,4 @@ enum s5p_usb_phy_type {
extern int s5p_usb_phy_init(struct platform_device *pdev, int type);
extern int s5p_usb_phy_exit(struct platform_device *pdev, int type);
-#endif /* __PLAT_S5P_REGS_USB_PHY_H */
+#endif /* __PLAT_SAMSUNG_USB_PHY_H */
--
1.7.1
^ permalink raw reply related
* [RFC] Need help deciphering reboot modes!
From: Will Deacon @ 2011-09-30 12:57 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
As part of my kexec work, I've been looking at the machine_restart path on ARM
and, more specifically, the use of the reboot_mode character that gets passed
around and ultimately ignored.
It seems that the following mode characters are used:
0 -> Currently used by kexec as a dummy argument given that it is
ignored anyway.
'h' -> The default assignment to reboot_mode and that used by
machine_restart. For some reason, reboot_mode can also be
overridden on the command line. I would guess that this means
"hard".
's' -> A supported option by mioa701 (mach-pxa) and mach-s3c24xx. I
would guess that this means "soft".
'g' -> A supported option by spitz and tosa (both mach-pxa). I can't
begin to imagine what it might stand for.
I would like to update this so that only 'h' and 's' are used, with the
following definitions:
- A hard reboot is made by poking something like a power controller and
results in a complete platform reset. For this, we need to keep
kernelspace mapped so that we can access the killer peripheral.
- A soft reboot is made by turning off the MMU and branching to some
reset code (for example, the kexec reboot buffer). For this, we need
to identity map as much memory as possible, including some of
kernelspace.
Anyway, if anybody can enlighten me on the 'g' option, the reboot= parameter
and/or point out holes in my plan, please do! Failing that, I'll start
working on an RFC patch series next week.
Cheers,
Will
^ permalink raw reply
* [PATCH v5 0/2] Add device tree support for i.mx51/53 boards
From: Shawn Guo @ 2011-09-30 13:35 UTC (permalink / raw)
To: linux-arm-kernel
Hi Sascha,
This is an update of the patch series below, which had gone through the
review and almost hit the v3.1 (it missed the last pull request Arnd
sent to Linus just for one day or so).
[PATCH v4 0/2] Add device tree support for i.mx51/53 boards
http://thread.gmane.org/gmane.linux.drivers.devicetree/7048
I was planning to hold the series until we have a iomuxc binding to
totally remove the dependency on non-dt board files. But as a cross
platform topic, it needs to take more time to get it settled down,
while I'm concerned by that people keep adding stuff into non-dt board
files with ignoring DT support. I'm here to revisit the series and
trying to get it merged in the coming merge window, so that we have
a base to ask people to move to DT.
Changes since v4:
* Rebase onto imx-features branch
* Have devices in soc dtsi as "disabled" and explicitly enable the
ones in board dts as "okay"
* Utilize of_irq_init() infrastructure added by Rob Herring recently
Shawn Guo (2):
arm/mx5: add device tree support for imx53 boards
arm/mx5: add device tree support for imx51 babbage
Documentation/devicetree/bindings/arm/fsl.txt | 19 ++
arch/arm/boot/dts/imx51-babbage.dts | 135 ++++++++++++
arch/arm/boot/dts/imx51.dtsi | 221 ++++++++++++++++++++
arch/arm/boot/dts/imx53-ard.dts | 113 ++++++++++
arch/arm/boot/dts/imx53-evk.dts | 120 +++++++++++
arch/arm/boot/dts/imx53-qsb.dts | 125 +++++++++++
arch/arm/boot/dts/imx53-smd.dts | 169 +++++++++++++++
arch/arm/boot/dts/imx53.dtsi | 276 +++++++++++++++++++++++++
arch/arm/mach-mx5/Kconfig | 21 ++
arch/arm/mach-mx5/Makefile | 3 +
arch/arm/mach-mx5/board-mx51_babbage.c | 9 +-
arch/arm/mach-mx5/board-mx53_ard.c | 12 +-
arch/arm/mach-mx5/board-mx53_evk.c | 9 +-
arch/arm/mach-mx5/board-mx53_loco.c | 9 +-
arch/arm/mach-mx5/board-mx53_smd.c | 9 +-
arch/arm/mach-mx5/imx51-dt.c | 116 +++++++++++
arch/arm/mach-mx5/imx53-dt.c | 126 +++++++++++
arch/arm/plat-mxc/include/mach/common.h | 5 +
18 files changed, 1485 insertions(+), 12 deletions(-)
^ permalink raw reply
* [PATCH 1/2] arm/mx5: add device tree support for imx53 boards
From: Shawn Guo @ 2011-09-30 13:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317389747-24589-1-git-send-email-shawn.guo@linaro.org>
From: Shawn Guo <shawn.guo@freescale.com>
It adds device tree support for imx53 boards.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
---
Documentation/devicetree/bindings/arm/fsl.txt | 15 ++
arch/arm/boot/dts/imx53-ard.dts | 113 ++++++++++
arch/arm/boot/dts/imx53-evk.dts | 120 +++++++++++
arch/arm/boot/dts/imx53-qsb.dts | 125 +++++++++++
arch/arm/boot/dts/imx53-smd.dts | 169 +++++++++++++++
arch/arm/boot/dts/imx53.dtsi | 276 +++++++++++++++++++++++++
arch/arm/mach-mx5/Kconfig | 12 +
arch/arm/mach-mx5/Makefile | 2 +
arch/arm/mach-mx5/board-mx53_ard.c | 12 +-
arch/arm/mach-mx5/board-mx53_evk.c | 9 +-
arch/arm/mach-mx5/board-mx53_loco.c | 9 +-
arch/arm/mach-mx5/board-mx53_smd.c | 9 +-
arch/arm/mach-mx5/imx53-dt.c | 126 +++++++++++
arch/arm/plat-mxc/include/mach/common.h | 4 +
14 files changed, 991 insertions(+), 10 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/fsl.txt
create mode 100644 arch/arm/boot/dts/imx53-ard.dts
create mode 100644 arch/arm/boot/dts/imx53-evk.dts
create mode 100644 arch/arm/boot/dts/imx53-qsb.dts
create mode 100644 arch/arm/boot/dts/imx53-smd.dts
create mode 100644 arch/arm/boot/dts/imx53.dtsi
create mode 100644 arch/arm/mach-mx5/imx53-dt.c
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
new file mode 100644
index 0000000..d1e8d6f
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -0,0 +1,15 @@
+i.MX53 Automotive Reference Design Board
+Required root node properties:
+ - compatible = "fsl,imx53-ard", "fsl,imx53";
+
+i.MX53 Evaluation Kit
+Required root node properties:
+ - compatible = "fsl,imx53-evk", "fsl,imx53";
+
+i.MX53 Quick Start Board
+Required root node properties:
+ - compatible = "fsl,imx53-qsb", "fsl,imx53";
+
+i.MX53 Smart Mobile Reference Design Board
+Required root node properties:
+ - compatible = "fsl,imx53-smd", "fsl,imx53";
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
new file mode 100644
index 0000000..2ab7f80
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -0,0 +1,113 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx53.dtsi"
+
+/ {
+ model = "Freescale i.MX53 Automotive Reference Design Board";
+ compatible = "fsl,imx53-ard", "fsl,imx53";
+
+ chosen {
+ bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
+ };
+
+ memory {
+ reg = <0x70000000 0x40000000>;
+ };
+
+ soc {
+ aips at 50000000 { /* AIPS1 */
+ spba at 50000000 {
+ esdhc at 50004000 { /* ESDHC1 */
+ cd-gpios = <&gpio0 1 0>; /* GPIO1_1 */
+ wp-gpios = <&gpio0 9 0>; /* GPIO1_9 */
+ status = "okay";
+ };
+ };
+
+ wdog at 53f98000 { /* WDOG1 */
+ status = "okay";
+ };
+
+ iomuxc at 53fa8000 {
+ compatible = "fsl,imx53-iomuxc-ard";
+ reg = <0x53fa8000 0x4000>;
+ };
+
+ uart0: uart at 53fbc000 { /* UART1 */
+ status = "okay";
+ };
+ };
+
+ aips at 60000000 { /* AIPS2 */
+ sdma at 63fb0000 {
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
+ };
+ };
+ };
+
+ eim-cs1 at f4000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,eim-bus", "simple-bus";
+ reg = <0xf4000000 0x3ff0000>;
+ ranges;
+
+ lan9220 at f4000000 {
+ compatible = "smsc,lan9220", "smsc,lan9115";
+ reg = <0xf4000000 0x2000000>;
+ phy-mode = "mii";
+ interrupt-parent = <&gpio1>;
+ interrupts = <31>;
+ reg-io-width = <4>;
+ smsc,irq-push-pull;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ home {
+ label = "Home";
+ gpios = <&gpio4 10 0>; /* GPIO5_10 */
+ linux,code = <102>; /* KEY_HOME */
+ gpio-key,wakeup;
+ };
+
+ back {
+ label = "Back";
+ gpios = <&gpio4 11 0>; /* GPIO5_11 */
+ linux,code = <158>; /* KEY_BACK */
+ gpio-key,wakeup;
+ };
+
+ program {
+ label = "Program";
+ gpios = <&gpio4 12 0>; /* GPIO5_12 */
+ linux,code = <362>; /* KEY_PROGRAM */
+ gpio-key,wakeup;
+ };
+
+ volume-up {
+ label = "Volume Up";
+ gpios = <&gpio4 13 0>; /* GPIO5_13 */
+ linux,code = <115>; /* KEY_VOLUMEUP */
+ };
+
+ volume-down {
+ label = "Volume Down";
+ gpios = <&gpio3 0 0>; /* GPIO4_0 */
+ linux,code = <114>; /* KEY_VOLUMEDOWN */
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts
new file mode 100644
index 0000000..3f3a881
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-evk.dts
@@ -0,0 +1,120 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx53.dtsi"
+
+/ {
+ model = "Freescale i.MX53 Evaluation Kit";
+ compatible = "fsl,imx53-evk", "fsl,imx53";
+
+ chosen {
+ bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
+ };
+
+ memory {
+ reg = <0x70000000 0x80000000>;
+ };
+
+ soc {
+ aips at 50000000 { /* AIPS1 */
+ spba at 50000000 {
+ esdhc at 50004000 { /* ESDHC1 */
+ cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
+ wp-gpios = <&gpio2 14 0>; /* GPIO3_14 */
+ status = "okay";
+ };
+
+ ecspi at 50010000 { /* ECSPI1 */
+ fsl,spi-num-chipselects = <2>;
+ cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */
+ <&gpio2 19 0>; /* GPIO3_19 */
+ status = "okay";
+
+ flash: at45db321d at 1 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
+ spi-max-frequency = <25000000>;
+ reg = <1>;
+
+ partition at 0 {
+ label = "U-Boot";
+ reg = <0x0 0x40000>;
+ read-only;
+ };
+
+ partition at 40000 {
+ label = "Kernel";
+ reg = <0x40000 0x3c0000>;
+ };
+ };
+ };
+
+ esdhc at 50020000 { /* ESDHC3 */
+ cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */
+ wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */
+ status = "okay";
+ };
+ };
+
+ wdog at 53f98000 { /* WDOG1 */
+ status = "okay";
+ };
+
+ iomuxc at 53fa8000 {
+ compatible = "fsl,imx53-iomuxc-evk";
+ reg = <0x53fa8000 0x4000>;
+ };
+
+ uart0: uart at 53fbc000 { /* UART1 */
+ status = "okay";
+ };
+ };
+
+ aips at 60000000 { /* AIPS2 */
+ sdma at 63fb0000 {
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
+ };
+
+ i2c at 63fc4000 { /* I2C2 */
+ status = "okay";
+
+ pmic: mc13892 at 08 {
+ compatible = "fsl,mc13892", "fsl,mc13xxx";
+ reg = <0x08>;
+ };
+
+ codec: sgtl5000 at 0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ };
+ };
+
+ fec at 63fec000 {
+ phy-mode = "rmii";
+ phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
+ status = "okay";
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ green {
+ label = "Heartbeat";
+ gpios = <&gpio6 7 0>; /* GPIO7_7 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
new file mode 100644
index 0000000..ae6de6d
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -0,0 +1,125 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx53.dtsi"
+
+/ {
+ model = "Freescale i.MX53 Quick Start Board";
+ compatible = "fsl,imx53-qsb", "fsl,imx53";
+
+ chosen {
+ bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
+ };
+
+ memory {
+ reg = <0x70000000 0x40000000>;
+ };
+
+ soc {
+ aips at 50000000 { /* AIPS1 */
+ spba at 50000000 {
+ esdhc at 50004000 { /* ESDHC1 */
+ cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
+ status = "okay";
+ };
+
+ esdhc at 50020000 { /* ESDHC3 */
+ cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */
+ wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */
+ status = "okay";
+ };
+ };
+
+ wdog at 53f98000 { /* WDOG1 */
+ status = "okay";
+ };
+
+ iomuxc at 53fa8000 {
+ compatible = "fsl,imx53-iomuxc-qsb";
+ reg = <0x53fa8000 0x4000>;
+ };
+
+ uart0: uart at 53fbc000 { /* UART1 */
+ status = "okay";
+ };
+ };
+
+ aips at 60000000 { /* AIPS2 */
+ sdma at 63fb0000 {
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
+ };
+
+ i2c at 63fc4000 { /* I2C2 */
+ status = "okay";
+
+ codec: sgtl5000 at 0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ };
+ };
+
+ i2c at 63fc8000 { /* I2C1 */
+ status = "okay";
+
+ accelerometer: mma8450 at 1c {
+ compatible = "fsl,mma8450";
+ reg = <0x1c>;
+ };
+
+ pmic: dialog at 48 {
+ compatible = "dialog,da9053", "dialog,da9052";
+ reg = <0x48>;
+ };
+ };
+
+ fec at 63fec000 {
+ phy-mode = "rmii";
+ phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
+ status = "okay";
+ };
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ power {
+ label = "Power Button";
+ gpios = <&gpio0 8 0>; /* GPIO1_8 */
+ linux,code = <116>; /* KEY_POWER */
+ gpio-key,wakeup;
+ };
+
+ volume-up {
+ label = "Volume Up";
+ gpios = <&gpio1 14 0>; /* GPIO2_14 */
+ linux,code = <115>; /* KEY_VOLUMEUP */
+ };
+
+ volume-down {
+ label = "Volume Down";
+ gpios = <&gpio1 15 0>; /* GPIO2_15 */
+ linux,code = <114>; /* KEY_VOLUMEDOWN */
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ user {
+ label = "Heartbeat";
+ gpios = <&gpio6 7 0>; /* GPIO7_7 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
new file mode 100644
index 0000000..b1c062e
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -0,0 +1,169 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx53.dtsi"
+
+/ {
+ model = "Freescale i.MX53 Smart Mobile Reference Design Board";
+ compatible = "fsl,imx53-smd", "fsl,imx53";
+
+ chosen {
+ bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
+ };
+
+ memory {
+ reg = <0x70000000 0x40000000>;
+ };
+
+ soc {
+ aips at 50000000 { /* AIPS1 */
+ spba at 50000000 {
+ esdhc at 50004000 { /* ESDHC1 */
+ cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
+ wp-gpios = <&gpio3 11 0>; /* GPIO4_11 */
+ status = "okay";
+ };
+
+ esdhc at 50008000 { /* ESDHC2 */
+ fsl,card-wired;
+ status = "okay";
+ };
+
+ uart2: uart at 5000c000 { /* UART3 */
+ fsl,uart-has-rtscts;
+ status = "okay";
+ };
+
+ ecspi at 50010000 { /* ECSPI1 */
+ fsl,spi-num-chipselects = <2>;
+ cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */
+ <&gpio2 19 0>; /* GPIO3_19 */
+ status = "okay";
+
+ zigbee: mc1323 at 0 {
+ compatible = "fsl,mc1323";
+ spi-max-frequency = <8000000>;
+ reg = <0>;
+ };
+
+ flash: m25p32 at 1 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "st,m25p32", "st,m25p";
+ spi-max-frequency = <20000000>;
+ reg = <1>;
+
+ partition at 0 {
+ label = "U-Boot";
+ reg = <0x0 0x40000>;
+ read-only;
+ };
+
+ partition at 40000 {
+ label = "Kernel";
+ reg = <0x40000 0x3c0000>;
+ };
+ };
+ };
+
+ esdhc at 50020000 { /* ESDHC3 */
+ fsl,card-wired;
+ status = "okay";
+ };
+ };
+
+ wdog at 53f98000 { /* WDOG1 */
+ status = "okay";
+ };
+
+ iomuxc at 53fa8000 {
+ compatible = "fsl,imx53-iomuxc-smd";
+ reg = <0x53fa8000 0x4000>;
+ };
+
+ uart0: uart at 53fbc000 { /* UART1 */
+ status = "okay";
+ };
+
+ uart1: uart at 53fc0000 { /* UART2 */
+ status = "okay";
+ };
+ };
+
+ aips at 60000000 { /* AIPS2 */
+ sdma at 63fb0000 {
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
+ };
+
+ i2c at 63fc4000 { /* I2C2 */
+ status = "okay";
+
+ codec: sgtl5000 at 0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ };
+
+ magnetometer: mag3110 at 0e {
+ compatible = "fsl,mag3110";
+ reg = <0x0e>;
+ };
+
+ touchkey: mpr121 at 5a {
+ compatible = "fsl,mpr121";
+ reg = <0x5a>;
+ };
+ };
+
+ i2c at 63fc8000 { /* I2C1 */
+ status = "okay";
+
+ accelerometer: mma8450 at 1c {
+ compatible = "fsl,mma8450";
+ reg = <0x1c>;
+ };
+
+ camera: ov5642 at 3c {
+ compatible = "ovti,ov5642";
+ reg = <0x3c>;
+ };
+
+ pmic: dialog at 48 {
+ compatible = "dialog,da9053", "dialog,da9052";
+ reg = <0x48>;
+ };
+ };
+
+ fec at 63fec000 {
+ phy-mode = "rmii";
+ phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
+ status = "okay";
+ };
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ volume-up {
+ label = "Volume Up";
+ gpios = <&gpio1 14 0>; /* GPIO2_14 */
+ linux,code = <115>; /* KEY_VOLUMEUP */
+ };
+
+ volume-down {
+ label = "Volume Down";
+ gpios = <&gpio1 15 0>; /* GPIO2_15 */
+ linux,code = <114>; /* KEY_VOLUMEDOWN */
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
new file mode 100644
index 0000000..a909549
--- /dev/null
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -0,0 +1,276 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ serial4 = &uart4;
+ };
+
+ tzic: tz-interrupt-controller at 0fffc000 {
+ compatible = "fsl,imx53-tzic", "fsl,tzic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x0fffc000 0x4000>;
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ interrupt-parent = <&tzic>;
+ ranges;
+
+ aips at 50000000 { /* AIPS1 */
+ compatible = "fsl,aips-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x50000000 0x10000000>;
+ ranges;
+
+ spba at 50000000 {
+ compatible = "fsl,spba-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x50000000 0x40000>;
+ ranges;
+
+ esdhc at 50004000 { /* ESDHC1 */
+ compatible = "fsl,imx53-esdhc";
+ reg = <0x50004000 0x4000>;
+ interrupts = <1>;
+ status = "disabled";
+ };
+
+ esdhc at 50008000 { /* ESDHC2 */
+ compatible = "fsl,imx53-esdhc";
+ reg = <0x50008000 0x4000>;
+ interrupts = <2>;
+ status = "disabled";
+ };
+
+ uart2: uart at 5000c000 { /* UART3 */
+ compatible = "fsl,imx53-uart", "fsl,imx21-uart";
+ reg = <0x5000c000 0x4000>;
+ interrupts = <33>;
+ status = "disabled";
+ };
+
+ ecspi at 50010000 { /* ECSPI1 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
+ reg = <0x50010000 0x4000>;
+ interrupts = <36>;
+ status = "disabled";
+ };
+
+ esdhc at 50020000 { /* ESDHC3 */
+ compatible = "fsl,imx53-esdhc";
+ reg = <0x50020000 0x4000>;
+ interrupts = <3>;
+ status = "disabled";
+ };
+
+ esdhc at 50024000 { /* ESDHC4 */
+ compatible = "fsl,imx53-esdhc";
+ reg = <0x50024000 0x4000>;
+ interrupts = <4>;
+ status = "disabled";
+ };
+ };
+
+ gpio0: gpio at 53f84000 { /* GPIO1 */
+ compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
+ reg = <0x53f84000 0x4000>;
+ interrupts = <50 51>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio1: gpio at 53f88000 { /* GPIO2 */
+ compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
+ reg = <0x53f88000 0x4000>;
+ interrupts = <52 53>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio2: gpio at 53f8c000 { /* GPIO3 */
+ compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
+ reg = <0x53f8c000 0x4000>;
+ interrupts = <54 55>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio3: gpio at 53f90000 { /* GPIO4 */
+ compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
+ reg = <0x53f90000 0x4000>;
+ interrupts = <56 57>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ wdog at 53f98000 { /* WDOG1 */
+ compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
+ reg = <0x53f98000 0x4000>;
+ interrupts = <58>;
+ status = "disabled";
+ };
+
+ wdog at 53f9c000 { /* WDOG2 */
+ compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
+ reg = <0x53f9c000 0x4000>;
+ interrupts = <59>;
+ status = "disabled";
+ };
+
+ uart0: uart at 53fbc000 { /* UART1 */
+ compatible = "fsl,imx53-uart", "fsl,imx21-uart";
+ reg = <0x53fbc000 0x4000>;
+ interrupts = <31>;
+ status = "disabled";
+ };
+
+ uart1: uart at 53fc0000 { /* UART2 */
+ compatible = "fsl,imx53-uart", "fsl,imx21-uart";
+ reg = <0x53fc0000 0x4000>;
+ interrupts = <32>;
+ status = "disabled";
+ };
+
+ gpio4: gpio at 53fdc000 { /* GPIO5 */
+ compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
+ reg = <0x53fdc000 0x4000>;
+ interrupts = <103 104>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio5: gpio at 53fe0000 { /* GPIO6 */
+ compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
+ reg = <0x53fe0000 0x4000>;
+ interrupts = <105 106>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio6: gpio at 53fe4000 { /* GPIO7 */
+ compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
+ reg = <0x53fe4000 0x4000>;
+ interrupts = <107 108>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ i2c at 53fec000 { /* I2C3 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
+ reg = <0x53fec000 0x4000>;
+ interrupts = <64>;
+ status = "disabled";
+ };
+
+ uart3: uart at 53ff0000 { /* UART4 */
+ compatible = "fsl,imx53-uart", "fsl,imx21-uart";
+ reg = <0x53ff0000 0x4000>;
+ interrupts = <13>;
+ status = "disabled";
+ };
+ };
+
+ aips at 60000000 { /* AIPS2 */
+ compatible = "fsl,aips-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x60000000 0x10000000>;
+ ranges;
+
+ uart4: uart at 63f90000 { /* UART5 */
+ compatible = "fsl,imx53-uart", "fsl,imx21-uart";
+ reg = <0x63f90000 0x4000>;
+ interrupts = <86>;
+ status = "disabled";
+ };
+
+ ecspi at 63fac000 { /* ECSPI2 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
+ reg = <0x63fac000 0x4000>;
+ interrupts = <37>;
+ status = "disabled";
+ };
+
+ sdma at 63fb0000 {
+ compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
+ reg = <0x63fb0000 0x4000>;
+ interrupts = <6>;
+ };
+
+ cspi at 63fc0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
+ reg = <0x63fc0000 0x4000>;
+ interrupts = <38>;
+ status = "disabled";
+ };
+
+ i2c at 63fc4000 { /* I2C2 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
+ reg = <0x63fc4000 0x4000>;
+ interrupts = <63>;
+ status = "disabled";
+ };
+
+ i2c at 63fc8000 { /* I2C1 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
+ reg = <0x63fc8000 0x4000>;
+ interrupts = <62>;
+ status = "disabled";
+ };
+
+ fec at 63fec000 {
+ compatible = "fsl,imx53-fec", "fsl,imx25-fec";
+ reg = <0x63fec000 0x4000>;
+ interrupts = <87>;
+ status = "disabled";
+ };
+ };
+ };
+};
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index fb4c503..6600742 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -165,6 +165,18 @@ config MACH_MX51_EFIKASB
comment "i.MX53 machines:"
+config MACH_IMX53_DT
+ bool "Support i.MX53 platforms from device tree"
+ select SOC_IMX53
+ select USE_OF
+ select MACH_MX53_ARD
+ select MACH_MX53_EVK
+ select MACH_MX53_LOCO
+ select MACH_MX53_SMD
+ help
+ Include support for Freescale i.MX53 based platforms
+ using the device tree for discovery
+
config MACH_MX53_EVK
bool "Support MX53 EVK platforms"
select SOC_IMX53
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 383e7cd..3dbe5e2 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -22,3 +22,5 @@ obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o
obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o
obj-$(CONFIG_MACH_MX51_EFIKASB) += board-mx51_efikasb.o
obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o
+
+obj-$(CONFIG_MACH_IMX53_DT) += imx53-dt.o
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c
index f58ac83..63e2d02 100644
--- a/arch/arm/mach-mx5/board-mx53_ard.c
+++ b/arch/arm/mach-mx5/board-mx53_ard.c
@@ -171,9 +171,6 @@ static struct imxi2c_platform_data mx53_ard_i2c3_data = {
static void __init mx53_ard_io_init(void)
{
- mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads,
- ARRAY_SIZE(mx53_ard_pads));
-
gpio_request(ARD_ETHERNET_INT_B, "eth-int-b");
gpio_direction_input(ARD_ETHERNET_INT_B);
@@ -216,6 +213,13 @@ static int weim_cs_config(void)
return 0;
}
+void __init imx53_ard_common_init(void)
+{
+ mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads,
+ ARRAY_SIZE(mx53_ard_pads));
+ weim_cs_config();
+}
+
static struct platform_device *devices[] __initdata = {
&ard_smsc_lan9220_device,
};
@@ -225,8 +229,8 @@ static void __init mx53_ard_board_init(void)
imx53_soc_init();
imx53_add_imx_uart(0, NULL);
+ imx53_ard_common_init();
mx53_ard_io_init();
- weim_cs_config();
platform_add_devices(devices, ARRAY_SIZE(devices));
imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data);
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 6a3e616..6bea31a 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -131,12 +131,17 @@ static const struct spi_imx_master mx53_evk_spi_data __initconst = {
.num_chipselect = ARRAY_SIZE(mx53_evk_spi_cs),
};
+void __init imx53_evk_common_init(void)
+{
+ mxc_iomux_v3_setup_multiple_pads(mx53_evk_pads,
+ ARRAY_SIZE(mx53_evk_pads));
+}
+
static void __init mx53_evk_board_init(void)
{
imx53_soc_init();
+ imx53_evk_common_init();
- mxc_iomux_v3_setup_multiple_pads(mx53_evk_pads,
- ARRAY_SIZE(mx53_evk_pads));
mx53_evk_init_uart();
mx53_evk_fec_reset();
imx53_add_fec(&mx53_evk_fec_pdata);
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 7149416..7cbb0d5 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -269,13 +269,18 @@ static struct i2c_board_info mx53loco_i2c_devices[] = {
},
};
+void __init imx53_qsb_common_init(void)
+{
+ mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads,
+ ARRAY_SIZE(mx53_loco_pads));
+}
+
static void __init mx53_loco_board_init(void)
{
int ret;
imx53_soc_init();
+ imx53_qsb_common_init();
- mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads,
- ARRAY_SIZE(mx53_loco_pads));
imx53_add_imx_uart(0, NULL);
mx53_loco_fec_reset();
imx53_add_fec(&mx53_loco_fec_data);
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c
index e64fd2c..9a895a2 100644
--- a/arch/arm/mach-mx5/board-mx53_smd.c
+++ b/arch/arm/mach-mx5/board-mx53_smd.c
@@ -111,12 +111,17 @@ static const struct imxi2c_platform_data mx53_smd_i2c_data __initconst = {
.bitrate = 100000,
};
+void __init imx53_smd_common_init(void)
+{
+ mxc_iomux_v3_setup_multiple_pads(mx53_smd_pads,
+ ARRAY_SIZE(mx53_smd_pads));
+}
+
static void __init mx53_smd_board_init(void)
{
imx53_soc_init();
+ imx53_smd_common_init();
- mxc_iomux_v3_setup_multiple_pads(mx53_smd_pads,
- ARRAY_SIZE(mx53_smd_pads));
mx53_smd_init_uart();
mx53_smd_fec_reset();
imx53_add_fec(&mx53_smd_fec_data);
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c
new file mode 100644
index 0000000..8ed76f6
--- /dev/null
+++ b/arch/arm/mach-mx5/imx53-dt.c
@@ -0,0 +1,126 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include <mach/common.h>
+#include <mach/mx53.h>
+
+/*
+ * Lookup table for attaching a specific name and platform_data pointer to
+ * devices as they get created by of_platform_populate(). Ideally this table
+ * would not exist, but the current clock implementation depends on some devices
+ * having a specific name.
+ */
+static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
+ OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART1_BASE_ADDR, "imx21-uart.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART2_BASE_ADDR, "imx21-uart.1", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART3_BASE_ADDR, "imx21-uart.2", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART4_BASE_ADDR, "imx21-uart.3", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART5_BASE_ADDR, "imx21-uart.4", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-fec", MX53_FEC_BASE_ADDR, "imx25-fec.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx53.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx53.1", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx53.2", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx53.3", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx-i2c.2", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL),
+ OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
+ { /* sentinel */ }
+};
+
+static void __init imx53_tzic_add_irq_domain(struct device_node *np,
+ struct device_node *interrupt_parent)
+{
+ irq_domain_add_simple(np, 0);
+}
+
+static void __init imx53_gpio_add_irq_domain(struct device_node *np,
+ struct device_node *interrupt_parent)
+{
+ static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
+ 32 * 7; /* imx53 gets 7 gpio ports */
+
+ irq_domain_add_simple(np, gpio_irq_base);
+ gpio_irq_base += 32;
+}
+
+static const struct of_device_id imx53_irq_match[] __initconst = {
+ { .compatible = "fsl,imx53-tzic", .data = imx53_tzic_add_irq_domain, },
+ { .compatible = "fsl,imx53-gpio", .data = imx53_gpio_add_irq_domain, },
+ { /* sentinel */ }
+};
+
+static const struct of_device_id imx53_iomuxc_of_match[] __initconst = {
+ { .compatible = "fsl,imx53-iomuxc-ard", .data = imx53_ard_common_init, },
+ { .compatible = "fsl,imx53-iomuxc-evk", .data = imx53_evk_common_init, },
+ { .compatible = "fsl,imx53-iomuxc-qsb", .data = imx53_qsb_common_init, },
+ { .compatible = "fsl,imx53-iomuxc-smd", .data = imx53_smd_common_init, },
+ { /* sentinel */ }
+};
+
+static void __init imx53_dt_init(void)
+{
+ struct device_node *node;
+ const struct of_device_id *of_id;
+ void (*func)(void);
+
+ of_irq_init(imx53_irq_match);
+
+ node = of_find_matching_node(NULL, imx53_iomuxc_of_match);
+ if (node) {
+ of_id = of_match_node(imx53_iomuxc_of_match, node);
+ func = of_id->data;
+ func();
+ of_node_put(node);
+ }
+
+ of_platform_populate(NULL, of_default_bus_match_table,
+ imx53_auxdata_lookup, NULL);
+}
+
+static void __init imx53_timer_init(void)
+{
+ mx53_clocks_init(32768, 24000000, 22579200, 0);
+}
+
+static struct sys_timer imx53_timer = {
+ .init = imx53_timer_init,
+};
+
+static const char *imx53_dt_board_compat[] __initdata = {
+ "fsl,imx53-ard",
+ "fsl,imx53-evk",
+ "fsl,imx53-qsb",
+ "fsl,imx53-smd",
+ NULL
+};
+
+DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
+ .map_io = mx53_map_io,
+ .init_early = imx53_init_early,
+ .init_irq = mx53_init_irq,
+ .handle_irq = imx53_handle_irq,
+ .timer = &imx53_timer,
+ .init_machine = imx53_dt_init,
+ .dt_compat = imx53_dt_board_compat,
+MACHINE_END
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 5bee446..2bd8f84 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -72,6 +72,10 @@ extern void mxc_arch_reset_init(void __iomem *);
extern void mx51_efikamx_reset(void);
extern int mx53_revision(void);
extern int mx53_display_revision(void);
+extern void imx53_ard_common_init(void);
+extern void imx53_evk_common_init(void);
+extern void imx53_qsb_common_init(void);
+extern void imx53_smd_common_init(void);
extern void imx_print_silicon_rev(const char *cpu, int srev);
void avic_handle_irq(struct pt_regs *);
--
1.7.4.1
^ permalink raw reply related
* [PATCH 2/2] arm/mx5: add device tree support for imx51 babbage
From: Shawn Guo @ 2011-09-30 13:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317389747-24589-1-git-send-email-shawn.guo@linaro.org>
It adds device tree support for imx51 babbage board.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
---
Documentation/devicetree/bindings/arm/fsl.txt | 4 +
arch/arm/boot/dts/imx51-babbage.dts | 135 +++++++++++++++
arch/arm/boot/dts/imx51.dtsi | 221 +++++++++++++++++++++++++
arch/arm/mach-mx5/Kconfig | 9 +
arch/arm/mach-mx5/Makefile | 1 +
arch/arm/mach-mx5/board-mx51_babbage.c | 9 +-
arch/arm/mach-mx5/imx51-dt.c | 116 +++++++++++++
arch/arm/plat-mxc/include/mach/common.h | 1 +
8 files changed, 494 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/boot/dts/imx51-babbage.dts
create mode 100644 arch/arm/boot/dts/imx51.dtsi
create mode 100644 arch/arm/mach-mx5/imx51-dt.c
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index d1e8d6f..e2401cd 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -1,3 +1,7 @@
+i.MX51 Babbage Board
+Required root node properties:
+ - compatible = "fsl,imx51-babbage", "fsl,imx51";
+
i.MX53 Automotive Reference Design Board
Required root node properties:
- compatible = "fsl,imx53-ard", "fsl,imx53";
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
new file mode 100644
index 0000000..f8766af
--- /dev/null
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -0,0 +1,135 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx51.dtsi"
+
+/ {
+ model = "Freescale i.MX51 Babbage Board";
+ compatible = "fsl,imx51-babbage", "fsl,imx51";
+
+ chosen {
+ bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
+ };
+
+ memory {
+ reg = <0x90000000 0x20000000>;
+ };
+
+ soc {
+ aips at 70000000 { /* aips-1 */
+ spba at 70000000 {
+ esdhc at 70004000 { /* ESDHC1 */
+ fsl,cd-internal;
+ fsl,wp-internal;
+ status = "okay";
+ };
+
+ esdhc at 70008000 { /* ESDHC2 */
+ cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */
+ wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */
+ status = "okay";
+ };
+
+ uart2: uart at 7000c000 { /* UART3 */
+ fsl,uart-has-rtscts;
+ status = "okay";
+ };
+
+ ecspi at 70010000 { /* ECSPI1 */
+ fsl,spi-num-chipselects = <2>;
+ cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */
+ <&gpio3 25 0>; /* GPIO4_25 */
+ status = "okay";
+
+ pmic: mc13892 at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mc13892";
+ spi-max-frequency = <6000000>;
+ reg = <0>;
+ mc13xxx-irq-gpios = <&gpio0 8 0>; /* GPIO1_8 */
+ fsl,mc13xxx-uses-regulator;
+ };
+
+ flash: at45db321d at 1 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
+ spi-max-frequency = <25000000>;
+ reg = <1>;
+
+ partition at 0 {
+ label = "U-Boot";
+ reg = <0x0 0x40000>;
+ read-only;
+ };
+
+ partition at 40000 {
+ label = "Kernel";
+ reg = <0x40000 0x3c0000>;
+ };
+ };
+ };
+ };
+
+ wdog at 73f98000 { /* WDOG1 */
+ status = "okay";
+ };
+
+ iomuxc at 73fa8000 {
+ compatible = "fsl,imx51-iomuxc-babbage";
+ reg = <0x73fa8000 0x4000>;
+ };
+
+ uart0: uart at 73fbc000 {
+ fsl,uart-has-rtscts;
+ status = "okay";
+ };
+
+ uart1: uart at 73fc0000 {
+ status = "okay";
+ };
+ };
+
+ aips at 80000000 { /* aips-2 */
+ sdma at 83fb0000 {
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
+ };
+
+ i2c at 83fc4000 { /* I2C2 */
+ status = "okay";
+
+ codec: sgtl5000 at 0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ };
+ };
+
+ fec at 83fec000 {
+ phy-mode = "mii";
+ status = "okay";
+ };
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ power {
+ label = "Power Button";
+ gpios = <&gpio1 21 0>;
+ linux,code = <116>; /* KEY_POWER */
+ gpio-key,wakeup;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
new file mode 100644
index 0000000..dfef00f
--- /dev/null
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -0,0 +1,221 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ };
+
+ tzic: tz-interrupt-controller at e0000000 {
+ compatible = "fsl,imx51-tzic", "fsl,tzic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0xe0000000 0x4000>;
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ interrupt-parent = <&tzic>;
+ ranges;
+
+ aips at 70000000 { /* AIPS1 */
+ compatible = "fsl,aips-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x70000000 0x10000000>;
+ ranges;
+
+ spba at 70000000 {
+ compatible = "fsl,spba-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x70000000 0x40000>;
+ ranges;
+
+ esdhc at 70004000 { /* ESDHC1 */
+ compatible = "fsl,imx51-esdhc";
+ reg = <0x70004000 0x4000>;
+ interrupts = <1>;
+ status = "disabled";
+ };
+
+ esdhc at 70008000 { /* ESDHC2 */
+ compatible = "fsl,imx51-esdhc";
+ reg = <0x70008000 0x4000>;
+ interrupts = <2>;
+ status = "disabled";
+ };
+
+ uart2: uart at 7000c000 { /* UART3 */
+ compatible = "fsl,imx51-uart", "fsl,imx21-uart";
+ reg = <0x7000c000 0x4000>;
+ interrupts = <33>;
+ status = "disabled";
+ };
+
+ ecspi at 70010000 { /* ECSPI1 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx51-ecspi";
+ reg = <0x70010000 0x4000>;
+ interrupts = <36>;
+ status = "disabled";
+ };
+
+ esdhc at 70020000 { /* ESDHC3 */
+ compatible = "fsl,imx51-esdhc";
+ reg = <0x70020000 0x4000>;
+ interrupts = <3>;
+ status = "disabled";
+ };
+
+ esdhc at 70024000 { /* ESDHC4 */
+ compatible = "fsl,imx51-esdhc";
+ reg = <0x70024000 0x4000>;
+ interrupts = <4>;
+ status = "disabled";
+ };
+ };
+
+ gpio0: gpio at 73f84000 { /* GPIO1 */
+ compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
+ reg = <0x73f84000 0x4000>;
+ interrupts = <50 51>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio1: gpio at 73f88000 { /* GPIO2 */
+ compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
+ reg = <0x73f88000 0x4000>;
+ interrupts = <52 53>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio2: gpio at 73f8c000 { /* GPIO3 */
+ compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
+ reg = <0x73f8c000 0x4000>;
+ interrupts = <54 55>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio3: gpio at 73f90000 { /* GPIO4 */
+ compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
+ reg = <0x73f90000 0x4000>;
+ interrupts = <56 57>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ wdog at 73f98000 { /* WDOG1 */
+ compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
+ reg = <0x73f98000 0x4000>;
+ interrupts = <58>;
+ status = "disabled";
+ };
+
+ wdog at 73f9c000 { /* WDOG2 */
+ compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
+ reg = <0x73f9c000 0x4000>;
+ interrupts = <59>;
+ status = "disabled";
+ };
+
+ uart0: uart at 73fbc000 {
+ compatible = "fsl,imx51-uart", "fsl,imx21-uart";
+ reg = <0x73fbc000 0x4000>;
+ interrupts = <31>;
+ status = "disabled";
+ };
+
+ uart1: uart at 73fc0000 {
+ compatible = "fsl,imx51-uart", "fsl,imx21-uart";
+ reg = <0x73fc0000 0x4000>;
+ interrupts = <32>;
+ status = "disabled";
+ };
+ };
+
+ aips at 80000000 { /* AIPS2 */
+ compatible = "fsl,aips-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x80000000 0x10000000>;
+ ranges;
+
+ ecspi at 83fac000 { /* ECSPI2 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx51-ecspi";
+ reg = <0x83fac000 0x4000>;
+ interrupts = <37>;
+ status = "disabled";
+ };
+
+ sdma at 83fb0000 {
+ compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
+ reg = <0x83fb0000 0x4000>;
+ interrupts = <6>;
+ };
+
+ cspi at 83fc0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
+ reg = <0x83fc0000 0x4000>;
+ interrupts = <38>;
+ status = "disabled";
+ };
+
+ i2c at 83fc4000 { /* I2C2 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
+ reg = <0x83fc4000 0x4000>;
+ interrupts = <63>;
+ status = "disabled";
+ };
+
+ i2c at 83fc8000 { /* I2C1 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
+ reg = <0x83fc8000 0x4000>;
+ interrupts = <62>;
+ status = "disabled";
+ };
+
+ fec at 83fec000 {
+ compatible = "fsl,imx51-fec", "fsl,imx27-fec";
+ reg = <0x83fec000 0x4000>;
+ interrupts = <87>;
+ status = "disabled";
+ };
+ };
+ };
+};
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index 6600742..d48f78a 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -57,6 +57,15 @@ config MACH_MX50_RDP
comment "i.MX51 machines:"
+config MACH_IMX51_DT
+ bool "Support i.MX51 platforms from device tree"
+ select SOC_IMX51
+ select USE_OF
+ select MACH_MX51_BABBAGE
+ help
+ Include support for Freescale i.MX51 based platforms
+ using the device tree for discovery
+
config MACH_MX51_BABBAGE
bool "Support MX51 BABBAGE platforms"
select SOC_IMX51
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 3dbe5e2..a3c75f3 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -23,4 +23,5 @@ obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o
obj-$(CONFIG_MACH_MX51_EFIKASB) += board-mx51_efikasb.o
obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o
+obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
obj-$(CONFIG_MACH_IMX53_DT) += imx53-dt.o
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 4bd5e87..df6f0f1 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -351,6 +351,12 @@ static const struct esdhc_platform_data mx51_babbage_sd2_data __initconst = {
.wp_type = ESDHC_WP_GPIO,
};
+void __init imx51_babbage_common_init(void)
+{
+ mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
+ ARRAY_SIZE(mx51babbage_pads));
+}
+
/*
* Board specific initialization.
*/
@@ -365,8 +371,7 @@ static void __init mx51_babbage_init(void)
#if defined(CONFIG_CPU_FREQ_IMX)
get_cpu_op = mx51_get_cpu_op;
#endif
- mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
- ARRAY_SIZE(mx51babbage_pads));
+ imx51_babbage_common_init();
imx51_add_imx_uart(0, &uart_pdata);
imx51_add_imx_uart(1, NULL);
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c
new file mode 100644
index 0000000..0878441
--- /dev/null
+++ b/arch/arm/mach-mx5/imx51-dt.c
@@ -0,0 +1,116 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include <mach/common.h>
+#include <mach/mx51.h>
+
+/*
+ * Lookup table for attaching a specific name and platform_data pointer to
+ * devices as they get created by of_platform_populate(). Ideally this table
+ * would not exist, but the current clock implementation depends on some devices
+ * having a specific name.
+ */
+static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
+ OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART1_BASE_ADDR, "imx21-uart.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART2_BASE_ADDR, "imx21-uart.1", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART3_BASE_ADDR, "imx21-uart.2", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-fec", MX51_FEC_BASE_ADDR, "imx27-fec.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx51.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx51.1", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx51.2", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx51.3", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL),
+ OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
+ { /* sentinel */ }
+};
+
+static void __init imx51_tzic_add_irq_domain(struct device_node *np,
+ struct device_node *interrupt_parent)
+{
+ irq_domain_add_simple(np, 0);
+}
+
+static void __init imx51_gpio_add_irq_domain(struct device_node *np,
+ struct device_node *interrupt_parent)
+{
+ static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
+ 32 * 4; /* imx51 gets 4 gpio ports */
+
+ irq_domain_add_simple(np, gpio_irq_base);
+ gpio_irq_base += 32;
+}
+
+static const struct of_device_id imx51_irq_match[] __initconst = {
+ { .compatible = "fsl,imx51-tzic", .data = imx51_tzic_add_irq_domain, },
+ { .compatible = "fsl,imx51-gpio", .data = imx51_gpio_add_irq_domain, },
+ { /* sentinel */ }
+};
+
+static const struct of_device_id imx51_iomuxc_of_match[] __initconst = {
+ { .compatible = "fsl,imx51-iomuxc-babbage", .data = imx51_babbage_common_init, },
+ { /* sentinel */ }
+};
+
+static void __init imx51_dt_init(void)
+{
+ struct device_node *node;
+ const struct of_device_id *of_id;
+ void (*func)(void);
+
+ of_irq_init(imx51_irq_match);
+
+ node = of_find_matching_node(NULL, imx51_iomuxc_of_match);
+ if (node) {
+ of_id = of_match_node(imx51_iomuxc_of_match, node);
+ func = of_id->data;
+ func();
+ of_node_put(node);
+ }
+
+ of_platform_populate(NULL, of_default_bus_match_table,
+ imx51_auxdata_lookup, NULL);
+}
+
+static void __init imx51_timer_init(void)
+{
+ mx51_clocks_init(32768, 24000000, 22579200, 0);
+}
+
+static struct sys_timer imx51_timer = {
+ .init = imx51_timer_init,
+};
+
+static const char *imx51_dt_board_compat[] __initdata = {
+ "fsl,imx51-babbage",
+ NULL
+};
+
+DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
+ .map_io = mx51_map_io,
+ .init_early = imx51_init_early,
+ .init_irq = mx51_init_irq,
+ .handle_irq = imx51_handle_irq,
+ .timer = &imx51_timer,
+ .init_machine = imx51_dt_init,
+ .dt_compat = imx51_dt_board_compat,
+MACHINE_END
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 2bd8f84..4a42d84 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -72,6 +72,7 @@ extern void mxc_arch_reset_init(void __iomem *);
extern void mx51_efikamx_reset(void);
extern int mx53_revision(void);
extern int mx53_display_revision(void);
+extern void imx51_babbage_common_init(void);
extern void imx53_ard_common_init(void);
extern void imx53_evk_common_init(void);
extern void imx53_qsb_common_init(void);
--
1.7.4.1
^ permalink raw reply related
* [PATCH 2/2 v7] pinmux: add a driver for the U300 pinmux
From: Linus Walleij @ 2011-09-30 13:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20110930021239.GL12606@ponder.secretlab.ca>
On Fri, Sep 30, 2011 at 4:12 AM, Grant Likely <grant.likely@secretlab.ca> wrote:
>> ?config MACH_U300
>> ? ? ? bool "U300"
>> + ? ? select PINCTRL
>> + ? ? select PINMUX_U300
>
> Shouldn't PINMUX_U300 select PINCTRL?
It selects PINMUX which is inside the if-clause for the
subsystem:
if PINCTRL
config PINMUX
bool "Support pinmux controllers"
(...)
config PINMUX_U300
bool "U300 pinmux driver"
depends on ARCH_U300
select PINMUX
(...)
endif
Having PINMUX or PINMUX_U300 select PINCTRL doesn'
work because it is deemed a circular dependency (indeed).
And Kconfig apparently does not resolve dependencies like
this, so it says:
# CONFIG_PINCTRL is not set
CONFIG_PINMUX_U300=y
And:
warning: (MACH_U300) selects PINMUX_U300 which has unmet direct
dependencies (PINCTRL && ARCH_U300)
warning: (MACH_U300) selects PINMUX_U300 which has unmet direct
dependencies (PINCTRL && ARCH_U300)
And then it breaks in the compile.
Actually the same thing seems to go for say this:
select ARCH_REQUIRE_GPIOLIB
select GPIO_FOO
You have to select both from your machine to get that driver,
just selecting GPIO_FOO is unable to auto-select GPIOLIB.
If you like this design pattern I can introduce
ARCH_REQUIRE_PINCTRL
In the same style as GPIOLIB, but it looks a bit
superfluous to me, select PINCTRL should be
fine?
>> +#include "pinmux-u300.h"
>
> There is only one file that uses this header data. ?Just put it into
> the .c file.
OK!
>> +static int __init u300_pmx_probe(struct platform_device *pdev)
>> +{
>> + ? ? int ret;
>> + ? ? struct u300_pmx *upmx;
>> + ? ? struct resource *res;
>> +
>> + ? ? /* Create state holders etc for this driver */
>> + ? ? upmx = kzalloc(sizeof(struct u300_pmx), GFP_KERNEL);
>
> devm_kzalloc()
OK, replaced kfree() with devm_kfree() too for consistency.
>> +static int __exit u300_pmx_remove(struct platform_device *pdev)
> __devexit
(...)
>> + ? ? .remove = __exit_p(u300_pmx_remove),
> __devexit_p
But notice, no .probe member and:
>> static int __init u300_pmx_init(void)
>> {
>> return platform_driver_probe(&u300_pmx_driver, u300_pmx_probe);
>> }
See drivers/base/platform.c:platform_driver_probe():
/**
* platform_driver_probe - register driver for non-hotpluggable device
* @drv: platform driver structure
* @probe: the driver probe routine, probably from an __init section
*
* Use this instead of platform_driver_register() when you know the device
* is not hotpluggable and has already been registered, and you want to
* remove its run-once probe() infrastructure from memory after the driver
* has bound to the device.
*
* One typical use for this would be with drivers for controllers integrated
* into system-on-chip processors, where the controller devices have been
* configured as part of board setup.
This driver won't ever load as a module, and new ones will never be
discovered after boot.
So I kind of like it that way...
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v2 2/5] ARM: S5P: Remove system MMU driver from arm/plat-s5p
From: Roedel, Joerg @ 2011-09-30 13:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <016d01cc7f42$e58a0aa0$b09e1fe0$%kim@samsung.com>
On Fri, Sep 30, 2011 at 03:30:57AM -0400, Kukjin Kim wrote:
> From: KyongHo Cho <pullip.cho@samsung.com>
>
> Due to Ohad Ben-Cohen gathered IOMMU drivers in drivers/iommu directory,
> System MMU driver is moved to drivers/iommu directory and removed
> from arch/arm/plat-s5p directory.
>
> Please see
> https://lkml.org/lkml/2011/6/8/69
>
> Signed-off-by: KyongHo Cho <pullip.cho@samsung.com>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
> arch/arm/plat-s5p/Kconfig | 8 -
> arch/arm/plat-s5p/Makefile | 1 -
> arch/arm/plat-s5p/include/plat/sysmmu.h | 95 ----------
> arch/arm/plat-s5p/sysmmu.c | 312 -------------------------------
You can use 'git mv' to just move the file. This ensures bisectability
of your patches. No need to delete the code in one patch and re-add it
in the next one (which breaks bisectability).
Joerg
--
AMD Operating System Research Center
Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach
General Managers: Alberto Bozzo, Andrew Bowd
Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632
^ permalink raw reply
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