* [PATCH v2 08/14] ARM: tegra: tegra_init_cache should be static
From: Olof Johansson @ 2011-10-10 5:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318224484-2090-1-git-send-email-olof@lixom.net>
Not exported and not used externally.
Signed-off-by: Olof Johansson <olof@lixom.net>
---
arch/arm/mach-tegra/common.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index d5e3f89..690b888 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -61,7 +61,7 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
{ NULL, NULL, 0, 0},
};
-void __init tegra_init_cache(void)
+static void __init tegra_init_cache(void)
{
#ifdef CONFIG_CACHE_L2X0
void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
--
1.7.4.1
^ permalink raw reply related
* [PATCH v2 07/14] ARM: tegra: pcie: 0 -> NULL changes
From: Olof Johansson @ 2011-10-10 5:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318224484-2090-1-git-send-email-olof@lixom.net>
Fixes:
arch/arm/mach-tegra/pcie.c:465:10: warning: Using plain integer as NULL pointer
Signed-off-by: Olof Johansson <olof@lixom.net>
---
arch/arm/mach-tegra/pcie.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index f7c89ee..f5aa173 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -462,7 +462,7 @@ static struct pci_bus __init *tegra_pcie_scan_bus(int nr,
struct tegra_pcie_port *pp;
if (nr >= tegra_pcie.num_ports)
- return 0;
+ return NULL;
pp = tegra_pcie.port + nr;
pp->root_bus_nr = sys->busnr;
--
1.7.4.1
^ permalink raw reply related
* [PATCH v2 06/14] ARM: tegra: pcie: include board.h
From: Olof Johansson @ 2011-10-10 5:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318224484-2090-1-git-send-email-olof@lixom.net>
Fixes:
arch/arm/mach-tegra/pcie.c:908:12: warning: symbol 'tegra_pcie_init' was not declared. Should it be static?
Signed-off-by: Olof Johansson <olof@lixom.net>
---
arch/arm/mach-tegra/pcie.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 6b0c235..f7c89ee 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -41,6 +41,8 @@
#include <mach/clk.h>
#include <mach/powergate.h>
+#include "board.h"
+
/* register definitions */
#define AFI_OFFSET 0x3800
#define PADS_OFFSET 0x3000
--
1.7.4.1
^ permalink raw reply related
* [PATCH v2 05/14] ARM: tegra: pcie: don't cast __iomem pointers
From: Olof Johansson @ 2011-10-10 5:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318224484-2090-1-git-send-email-olof@lixom.net>
Fixes a lot of:
arch/arm/mach-tegra/pcie.c:678:8: warning: cast removes address space of expression
arch/arm/mach-tegra/pcie.c:678:8: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/pcie.c:678:8: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/pcie.c:678:8: got unsigned int
arch/arm/mach-tegra/pcie.c:678:8: warning: cast removes address space of expression
Signed-off-by: Olof Johansson <olof@lixom.net>
---
arch/arm/mach-tegra/pcie.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index f1f699d..6b0c235 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -150,9 +150,9 @@
static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE);
#define pmc_writel(value, reg) \
- __raw_writel(value, (u32)reg_pmc_base + (reg))
+ __raw_writel(value, reg_pmc_base + (reg))
#define pmc_readl(reg) \
- __raw_readl((u32)reg_pmc_base + (reg))
+ __raw_readl(reg_pmc_base + (reg))
/*
* Tegra2 defines 1GB in the AXI address map for PCIe.
--
1.7.4.1
^ permalink raw reply related
* [PATCH v2 04/14] ARM: tegra: tegra2_clocks: 0 -> NULL changes
From: Olof Johansson @ 2011-10-10 5:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318224484-2090-1-git-send-email-olof@lixom.net>
Fixes a lot of:
arch/arm/mach-tegra/tegra2_clocks.c:921:34: warning: Using plain integer as NULL pointer
arch/arm/mach-tegra/tegra2_clocks.c:1462:4: warning: Using plain integer as NULL pointer
arch/arm/mach-tegra/tegra2_clocks.c:1864:4: warning: Using plain integer as NULL pointer
Signed-off-by: Olof Johansson <olof@lixom.net>
---
arch/arm/mach-tegra/tegra2_clocks.c | 34 +++++++++++++++++-----------------
1 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index 3325cd6..6dd5133 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -918,7 +918,7 @@ static struct clk_ops tegra_pll_div_ops = {
static void tegra2_periph_clk_init(struct clk *c)
{
u32 val = clk_readl(c->reg);
- const struct clk_mux_sel *mux = 0;
+ const struct clk_mux_sel *mux = NULL;
const struct clk_mux_sel *sel;
if (c->flags & MUX) {
for (sel = c->inputs; sel->input != NULL; sel++) {
@@ -1459,7 +1459,7 @@ static struct clk tegra_pll_s = {
static struct clk_mux_sel tegra_clk_m_sel[] = {
{ .input = &tegra_clk_32k, .value = 0},
{ .input = &tegra_pll_s, .value = 1},
- { 0, 0},
+ { NULL , 0},
};
static struct clk tegra_clk_m = {
@@ -1861,7 +1861,7 @@ static const struct audio_sources {
{ .name = "ext_audio_clk1", .value = 6 },
{ .name = "ext_vimclk", .value = 7 },
#endif
- { 0, 0 }
+ { NULL, 0 }
};
static struct clk tegra_clk_audio = {
@@ -1926,7 +1926,7 @@ static struct clk_mux_sel mux_cclk[] = {
{ .input = &tegra_pll_p_out3, .value = 6},
{ .input = &tegra_clk_d, .value = 7},
{ .input = &tegra_pll_x, .value = 8},
- { 0, 0},
+ { NULL, 0},
};
static struct clk_mux_sel mux_sclk[] = {
@@ -1938,7 +1938,7 @@ static struct clk_mux_sel mux_sclk[] = {
{ .input = &tegra_clk_d, .value = 5},
{ .input = &tegra_clk_32k, .value = 6},
{ .input = &tegra_pll_m_out1, .value = 7},
- { 0, 0},
+ { NULL, 0},
};
static struct clk tegra_clk_cclk = {
@@ -2009,7 +2009,7 @@ static struct clk_mux_sel mux_pllm_pllc_pllp_plla[] = {
{ .input = &tegra_pll_c, .value = 1},
{ .input = &tegra_pll_p, .value = 2},
{ .input = &tegra_pll_a_out0, .value = 3},
- { 0, 0},
+ { NULL, 0},
};
static struct clk_mux_sel mux_pllm_pllc_pllp_clkm[] = {
@@ -2017,7 +2017,7 @@ static struct clk_mux_sel mux_pllm_pllc_pllp_clkm[] = {
{ .input = &tegra_pll_c, .value = 1},
{ .input = &tegra_pll_p, .value = 2},
{ .input = &tegra_clk_m, .value = 3},
- { 0, 0},
+ { NULL, 0},
};
static struct clk_mux_sel mux_pllp_pllc_pllm_clkm[] = {
@@ -2025,7 +2025,7 @@ static struct clk_mux_sel mux_pllp_pllc_pllm_clkm[] = {
{ .input = &tegra_pll_c, .value = 1},
{ .input = &tegra_pll_m, .value = 2},
{ .input = &tegra_clk_m, .value = 3},
- { 0, 0},
+ { NULL, 0},
};
static struct clk_mux_sel mux_pllaout0_audio2x_pllp_clkm[] = {
@@ -2033,7 +2033,7 @@ static struct clk_mux_sel mux_pllaout0_audio2x_pllp_clkm[] = {
{.input = &tegra_clk_audio_2x, .value = 1},
{.input = &tegra_pll_p, .value = 2},
{.input = &tegra_clk_m, .value = 3},
- { 0, 0},
+ { NULL, 0},
};
static struct clk_mux_sel mux_pllp_plld_pllc_clkm[] = {
@@ -2041,7 +2041,7 @@ static struct clk_mux_sel mux_pllp_plld_pllc_clkm[] = {
{.input = &tegra_pll_d_out0, .value = 1},
{.input = &tegra_pll_c, .value = 2},
{.input = &tegra_clk_m, .value = 3},
- { 0, 0},
+ { NULL, 0},
};
static struct clk_mux_sel mux_pllp_pllc_audio_clkm_clk32[] = {
@@ -2050,39 +2050,39 @@ static struct clk_mux_sel mux_pllp_pllc_audio_clkm_clk32[] = {
{.input = &tegra_clk_audio, .value = 2},
{.input = &tegra_clk_m, .value = 3},
{.input = &tegra_clk_32k, .value = 4},
- { 0, 0},
+ { NULL, 0},
};
static struct clk_mux_sel mux_pllp_pllc_pllm[] = {
{.input = &tegra_pll_p, .value = 0},
{.input = &tegra_pll_c, .value = 1},
{.input = &tegra_pll_m, .value = 2},
- { 0, 0},
+ { NULL, 0},
};
static struct clk_mux_sel mux_clk_m[] = {
{ .input = &tegra_clk_m, .value = 0},
- { 0, 0},
+ { NULL, 0},
};
static struct clk_mux_sel mux_pllp_out3[] = {
{ .input = &tegra_pll_p_out3, .value = 0},
- { 0, 0},
+ { NULL, 0},
};
static struct clk_mux_sel mux_plld[] = {
{ .input = &tegra_pll_d, .value = 0},
- { 0, 0},
+ { NULL, 0},
};
static struct clk_mux_sel mux_clk_32k[] = {
{ .input = &tegra_clk_32k, .value = 0},
- { 0, 0},
+ { NULL, 0},
};
static struct clk_mux_sel mux_pclk[] = {
{ .input = &tegra_clk_pclk, .value = 0},
- { 0, 0},
+ { NULL, 0},
};
static struct clk tegra_clk_emc = {
--
1.7.4.1
^ permalink raw reply related
* [PATCH v2 03/14] ARM: tegra: tegra2_clocks: don't cast __iomem pointers
From: Olof Johansson @ 2011-10-10 5:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318224484-2090-1-git-send-email-olof@lixom.net>
Fixes a lot of:
arch/arm/mach-tegra/tegra2_clocks.c:180:2: warning: cast removes address space of expression
arch/arm/mach-tegra/tegra2_clocks.c:180:2: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/tegra2_clocks.c:180:2: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/tegra2_clocks.c:180:2: got unsigned int
arch/arm/mach-tegra/tegra2_clocks.c:180:2: warning: cast removes address space of expression
Signed-off-by: Olof Johansson <olof@lixom.net>
---
arch/arm/mach-tegra/tegra2_clocks.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index 0fe9b3e..3325cd6 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -166,13 +166,13 @@ static DEFINE_SPINLOCK(clock_register_lock);
static int tegra_periph_clk_enable_refcount[3 * 32];
#define clk_writel(value, reg) \
- __raw_writel(value, (u32)reg_clk_base + (reg))
+ __raw_writel(value, reg_clk_base + (reg))
#define clk_readl(reg) \
- __raw_readl((u32)reg_clk_base + (reg))
+ __raw_readl(reg_clk_base + (reg))
#define pmc_writel(value, reg) \
- __raw_writel(value, (u32)reg_pmc_base + (reg))
+ __raw_writel(value, reg_pmc_base + (reg))
#define pmc_readl(reg) \
- __raw_readl((u32)reg_pmc_base + (reg))
+ __raw_readl(reg_pmc_base + (reg))
unsigned long clk_measure_input_freq(void)
{
--
1.7.4.1
^ permalink raw reply related
* [PATCH v2 02/14] ARM: tegra: timer: don't cast __iomem pointers
From: Olof Johansson @ 2011-10-10 5:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318224484-2090-1-git-send-email-olof@lixom.net>
Fixes a lot of:
arch/arm/mach-tegra/timer.c:75:2: warning: cast removes address space of expression
arch/arm/mach-tegra/timer.c:75:2: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/timer.c:75:2: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/timer.c:75:2: got unsigned int
arch/arm/mach-tegra/timer.c:75:2: warning: cast removes address space of expression
Signed-off-by: Olof Johansson <olof@lixom.net>
---
arch/arm/mach-tegra/timer.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index 9035042..4d6759a 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -62,9 +62,9 @@ static struct timespec persistent_ts;
static u64 persistent_ms, last_persistent_ms;
#define timer_writel(value, reg) \
- __raw_writel(value, (u32)timer_reg_base + (reg))
+ __raw_writel(value, timer_reg_base + (reg))
#define timer_readl(reg) \
- __raw_readl((u32)timer_reg_base + (reg))
+ __raw_readl(timer_reg_base + (reg))
static int tegra_timer_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
--
1.7.4.1
^ permalink raw reply related
* [PATCH v2 01/14] ARM: tegra: annotate IO_*_VIRT pointers
From: Olof Johansson @ 2011-10-10 5:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318224484-2090-1-git-send-email-olof@lixom.net>
Provide __iomem annotation for IO_*_VIRT pointers, which will propagate
up through IO_TO_VIRT(). Also fixes a 0 to NULL conversion of the base
case to silence sparse.
Unfortunately map_desc takes an unsigned long for the pointer instead of
a void __iomem *. For now, cast explicitly for those cases.
Signed-off-by: Olof Johansson <olof@lixom.net>
---
arch/arm/mach-tegra/include/mach/io.h | 18 ++++++++++++------
arch/arm/mach-tegra/io.c | 8 ++++----
2 files changed, 16 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h
index 4cea2230..971be4b 100644
--- a/arch/arm/mach-tegra/include/mach/io.h
+++ b/arch/arm/mach-tegra/include/mach/io.h
@@ -33,20 +33,26 @@
*
*/
+#ifdef __ASSEMBLY__
+#define __IOVADDR(x) (x)
+#else
+#define __IOVADDR(x) ((void __force __iomem *)(x))
+#endif
+
#define IO_IRAM_PHYS 0x40000000
-#define IO_IRAM_VIRT 0xFE400000
+#define IO_IRAM_VIRT __IOVADDR(0xFE400000)
#define IO_IRAM_SIZE SZ_256K
#define IO_CPU_PHYS 0x50040000
-#define IO_CPU_VIRT 0xFE000000
+#define IO_CPU_VIRT __IOVADDR(0xFE000000)
#define IO_CPU_SIZE SZ_16K
#define IO_PPSB_PHYS 0x60000000
-#define IO_PPSB_VIRT 0xFE200000
+#define IO_PPSB_VIRT __IOVADDR(0xFE200000)
#define IO_PPSB_SIZE SZ_1M
#define IO_APB_PHYS 0x70000000
-#define IO_APB_VIRT 0xFE300000
+#define IO_APB_VIRT __IOVADDR(0xFE300000)
#define IO_APB_SIZE SZ_1M
#define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz)))
@@ -61,7 +67,7 @@
IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \
IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \
IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \
- 0)
+ NULL)
#ifndef __ASSEMBLER__
@@ -71,7 +77,7 @@
void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type);
void tegra_iounmap(volatile void __iomem *addr);
-#define IO_ADDRESS(n) ((void __iomem *) IO_TO_VIRT(n))
+#define IO_ADDRESS(n) (IO_TO_VIRT(n))
#ifdef CONFIG_TEGRA_PCI
extern void __iomem *tegra_pcie_io_base;
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index ea50fe2..5489f8b 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -31,25 +31,25 @@
static struct map_desc tegra_io_desc[] __initdata = {
{
- .virtual = IO_PPSB_VIRT,
+ .virtual = (unsigned long)IO_PPSB_VIRT,
.pfn = __phys_to_pfn(IO_PPSB_PHYS),
.length = IO_PPSB_SIZE,
.type = MT_DEVICE,
},
{
- .virtual = IO_APB_VIRT,
+ .virtual = (unsigned long)IO_APB_VIRT,
.pfn = __phys_to_pfn(IO_APB_PHYS),
.length = IO_APB_SIZE,
.type = MT_DEVICE,
},
{
- .virtual = IO_CPU_VIRT,
+ .virtual = (unsigned long)IO_CPU_VIRT,
.pfn = __phys_to_pfn(IO_CPU_PHYS),
.length = IO_CPU_SIZE,
.type = MT_DEVICE,
},
{
- .virtual = IO_IRAM_VIRT,
+ .virtual = (unsigned long)IO_IRAM_VIRT,
.pfn = __phys_to_pfn(IO_IRAM_PHYS),
.length = IO_IRAM_SIZE,
.type = MT_DEVICE,
--
1.7.4.1
^ permalink raw reply related
* [PATCH v2 00/14] Sparse fixes for tegra
From: Olof Johansson @ 2011-10-10 5:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317956064-17650-1-git-send-email-olof@lixom.net>
Some trivial fixes removing sparse warnings on tegra code.
Changes since v1:
* Implemented Arnd's suggestion to push annotation all the way down to IO_*_VIRT defines
* Based on above, no longer needed IO_TO_VIRT() -> IO_ADDRESS() changes
* Added two more fixes for cpu-tegra.
Stephen; I didn't explicitly apply your Acked-by lines to this batch yet,
I will do so when I collect final acks before pushing a branch.
-Olof
^ permalink raw reply
* [PATCH] ARM: EXYNOS4: Add support for M-5MOLS camera on Nuri board
From: Kukjin Kim @ 2011-10-10 4:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1317995590-2289-1-git-send-email-s.nawrocki@samsung.com>
Sylwester Nawrocki wrote:
>
> Add voltage regulator and platform data definition for M-5MOLS sensor
> and MIPI-CSI receiver drivers. Add CAM power domain dependencies for
> FIMC device and set up camera port A GPIO. Configure I2C0 bus timings.
>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
> This is to enable M-5MOLS camera on Exynos4 Nuri board. The patch is
> based of off git://github.com/kgene/linux-samsung.git for-next.
>
> Thanks,
> Sylwester
> ---
> arch/arm/mach-exynos4/Kconfig | 8 ++
> arch/arm/mach-exynos4/mach-nuri.c | 158
> +++++++++++++++++++++++++++++++++++++
> 2 files changed, 166 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
> index dd660eb..afa6cb5 100644
> --- a/arch/arm/mach-exynos4/Kconfig
> +++ b/arch/arm/mach-exynos4/Kconfig
> @@ -215,9 +215,15 @@ config MACH_UNIVERSAL_C210
> config MACH_NURI
> bool "Mobile NURI Board"
> select CPU_EXYNOS4210
> + select S5P_GPIO_INT
> select S3C_DEV_WDT
> select S3C_DEV_RTC
> select S5P_DEV_FIMD0
> + select S5P_DEV_FIMC0
> + select S5P_DEV_FIMC1
> + select S5P_DEV_FIMC2
> + select S5P_DEV_FIMC3
> + select S5P_DEV_CSIS0
> select S3C_DEV_HSMMC
> select S3C_DEV_HSMMC2
> select S3C_DEV_HSMMC3
> @@ -233,6 +239,8 @@ config MACH_NURI
> select EXYNOS4_SETUP_I2C5
> select EXYNOS4_SETUP_SDHCI
> select EXYNOS4_SETUP_USB_PHY
> + select EXYNOS4_SETUP_FIMC
> + select S5P_SETUP_MIPIPHY
> select SAMSUNG_DEV_PWM
> select SAMSUNG_DEV_ADC
> help
> diff --git a/arch/arm/mach-exynos4/mach-nuri.c
b/arch/arm/mach-exynos4/mach-
> nuri.c
> index bbd13f4..62c18ab 100644
> --- a/arch/arm/mach-exynos4/mach-nuri.c
> +++ b/arch/arm/mach-exynos4/mach-nuri.c
> @@ -45,9 +45,16 @@
> #include <plat/iic.h>
> #include <plat/mfc.h>
> #include <plat/pd.h>
> +#include <plat/fimc-core.h>
> +#include <plat/camport.h>
> +#include <plat/mipi_csis.h>
>
> #include <mach/map.h>
>
> +#include <media/m5mols.h>
> +#include <media/s5p_fimc.h>
> +#include <media/v4l2-mediabus.h>
> +
> /* Following are default values for UCON, ULCON and UFCON UART registers
*/
> #define NURI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
> S3C2410_UCON_RXILEVEL | \
> @@ -65,6 +72,8 @@
> enum fixed_regulator_id {
> FIXED_REG_ID_MMC = 0,
> FIXED_REG_ID_MAX8903,
> + FIXED_REG_ID_CAM_A28V,
> + FIXED_REG_ID_CAM_12V,
> };
>
> static struct s3c2410_uartcfg nuri_uartcfgs[] __initdata = {
> @@ -1117,10 +1126,146 @@ static void __init nuri_ehci_init(void)
> s5p_ehci_set_platdata(pdata);
> }
>
> +/* CAMERA */
> +static struct regulator_consumer_supply cam_vdda_supply[] = {
> + REGULATOR_SUPPLY("a_sensor", "0-001f"),
> +};
> +
> +static struct regulator_init_data cam_vdda_reg_init_data = {
> + .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
> + .num_consumer_supplies = ARRAY_SIZE(cam_vdda_supply),
> + .consumer_supplies = cam_vdda_supply,
> +};
> +
> +static struct fixed_voltage_config cam_vdda_fixed_voltage_cfg = {
> + .supply_name = "CAM_IO_EN",
> + .microvolts = 2800000,
> + .gpio = EXYNOS4_GPE2(1), /* CAM_IO_EN */
> + .enable_high = 1,
> + .init_data = &cam_vdda_reg_init_data,
> +};
> +
> +static struct platform_device cam_vdda_fixed_rdev = {
> + .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_A28V,
> + .dev = { .platform_data = &cam_vdda_fixed_voltage_cfg },
> +};
> +
> +static struct regulator_consumer_supply camera_8m_12v_supply =
> + REGULATOR_SUPPLY("dig_12", "0-001f");
> +
> +static struct regulator_init_data cam_8m_12v_reg_init_data = {
> + .num_consumer_supplies = 1,
> + .consumer_supplies = &camera_8m_12v_supply,
> + .constraints = {
> + .valid_ops_mask = REGULATOR_CHANGE_STATUS
> + },
> +};
> +
> +static struct fixed_voltage_config cam_8m_12v_fixed_voltage_cfg = {
> + .supply_name = "8M_1.2V",
> + .microvolts = 1200000,
> + .gpio = EXYNOS4_GPE2(5), /* 8M_1.2V_EN */
> + .enable_high = 1,
> + .init_data = &cam_8m_12v_reg_init_data,
> +};
> +
> +static struct platform_device cam_8m_12v_fixed_rdev = {
> + .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_12V,
> + .dev = { .platform_data = &cam_8m_12v_fixed_voltage_cfg },
> +};
> +
> +static struct s5p_platform_mipi_csis mipi_csis_platdata = {
> + .clk_rate = 166000000UL,
> + .lanes = 2,
> + .alignment = 32,
> + .hs_settle = 12,
> + .phy_enable = s5p_csis_phy_enable,
> +};
> +
> +#define GPIO_CAM_MEGA_RST EXYNOS4_GPY3(7) /* ISP_RESET */
> +#define GPIO_CAM_8M_ISP_INT EXYNOS4_GPL2(5)
> +
> +static struct m5mols_platform_data m5mols_platdata = {
> + .gpio_reset = GPIO_CAM_MEGA_RST,
> +};
> +
> +static struct i2c_board_info m5mols_board_info = {
> + I2C_BOARD_INFO("M5MOLS", 0x1F),
> + .platform_data = &m5mols_platdata,
> +};
> +
> +static struct s5p_fimc_isp_info nuri_camera_sensors[] = {
> + {
> + .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
> + V4L2_MBUS_VSYNC_ACTIVE_LOW,
> + .bus_type = FIMC_MIPI_CSI2,
> + .board_info = &m5mols_board_info,
> + .clk_frequency = 24000000UL,
> + .csi_data_align = 32,
> + },
> +};
> +
> +static struct s5p_platform_fimc fimc_md_platdata = {
> + .isp_info = nuri_camera_sensors,
> + .num_clients = ARRAY_SIZE(nuri_camera_sensors),
> +};
> +
> +struct platform_device s5p_device_fimc_md = {
> + .name = "s5p-fimc-md",
> + .id = -1,
> +};
> +
> +static struct gpio nuri_camera_gpios[] = {
> + { GPIO_CAM_8M_ISP_INT, GPIOF_IN,
> "8M_ISP_INT" },
> + { GPIO_CAM_MEGA_RST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
> +};
> +
> +static void nuri_camera_init(void)
> +{
> + s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
> + &s5p_device_mipi_csis0);
> + s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
> + &s5p_device_fimc_md);
> +
> + if (gpio_request_array(nuri_camera_gpios,
> + ARRAY_SIZE(nuri_camera_gpios))) {
> + pr_err("%s: GPIO request failed\n", __func__);
> + return;
> + }
> +
> + m5mols_board_info.irq =
> s5p_register_gpio_interrupt(GPIO_CAM_8M_ISP_INT);
> + if (!IS_ERR_VALUE(m5mols_board_info.irq))
> + s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT,
> S3C_GPIO_SFN(0xF));
> + else
> + pr_err("%s: Failed to configure 8M_ISP_INT GPIO\n",
__func__);
> +
> + /* Free GPIOs controlled directly by the sensor drivers. */
> + gpio_free(GPIO_CAM_MEGA_RST);
> + gpio_free(GPIO_CAM_8M_ISP_INT);
> +
> + if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A)) {
> + pr_err("%s: Camera port A setup failed\n", __func__);
> + return;
> + }
> + /* Increase drive strength of the sensor clock output */
> + s5p_gpio_set_drvstr(EXYNOS4_GPJ1(3), S5P_GPIO_DRVSTR_LV4);
> +}
> +
> +static struct s3c2410_platform_i2c nuri_i2c0_platdata __initdata = {
> + .frequency = 400000U,
> + .sda_delay = 200,
> +};
> +
> static struct platform_device *nuri_devices[] __initdata = {
> /* Samsung Platform Devices */
> &s3c_device_i2c5, /* PMIC should initialize first */
> + &s3c_device_i2c0,
> &emmc_fixed_voltage,
> + &s5p_device_mipi_csis0,
> + &s5p_device_fimc0,
> + &s5p_device_fimc1,
> + &s5p_device_fimc2,
> + &s5p_device_fimc3,
> &s5p_device_fimd0,
> &s3c_device_hsmmc0,
> &s3c_device_hsmmc2,
> @@ -1137,6 +1282,8 @@ static struct platform_device *nuri_devices[]
__initdata =
> {
> &s5p_device_mfc_r,
> &exynos4_device_pd[PD_MFC],
> &exynos4_device_pd[PD_LCD0],
> + &exynos4_device_pd[PD_CAM],
> + &s5p_device_fimc_md,
>
> /* NURI Devices */
> &nuri_gpio_keys,
> @@ -1144,6 +1291,8 @@ static struct platform_device *nuri_devices[]
__initdata =
> {
> &nuri_backlight_device,
> &max8903_fixed_reg_dev,
> &nuri_max8903_device,
> + &cam_vdda_fixed_rdev,
> + &cam_8m_12v_fixed_rdev,
> };
>
> static void __init nuri_map_io(void)
> @@ -1164,6 +1313,7 @@ static void __init nuri_machine_init(void)
> nuri_tsp_init();
> nuri_power_init();
>
> + s3c_i2c0_set_platdata(&nuri_i2c0_platdata);
> i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
> s3c_i2c3_set_platdata(&i2c3_data);
> i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
> @@ -1175,6 +1325,8 @@ static void __init nuri_machine_init(void)
>
> s5p_fimd0_set_platdata(&nuri_fb_pdata);
>
> + nuri_camera_init();
> +
> nuri_ehci_init();
> clk_xusbxti.rate = 24000000;
>
> @@ -1182,6 +1334,12 @@ static void __init nuri_machine_init(void)
> platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));
> s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
> s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
> +
> + s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
> + s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev;
> + s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev;
> + s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev;
> + s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
> }
>
> MACHINE_START(NURI, "NURI")
> --
> 1.7.6.3
Looks ok but some white spaces are used instead of tab where tab is
better......
If you're ok, I will apply with fixing it.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply
* [patch] ARM: smpboot: Enable interrupts after marking CPU online/active
From: Kukjin Kim @ 2011-10-10 4:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.LFD.2.02.1110071354310.3240@ionos>
Thomas Gleixner wrote:
>
> On Fri, 7 Oct 2011, Kukjin Kim wrote:
> > I think, basically, if SPIs in GIC are used in local timer, the routing
> > interrupt like calling irq_set_affinity() to offline CPUs should be
> > available when boot time before calling set_cpu_online() because as you
know
> > the local_timer_setup() which includes setup interrupt is called in
> > percpu_timer_setup() now...
> >
> > Is there any way to get the flags of struct irqaction from struct
irq_data
> > in gic_set_affinity()? Or?
>
> No, and you should not even think about it at all.
>
OK, I see. Thanks :)
> The problem I can see from all this discussion is related to the early
> enabling of interrupts and the per cpu timer setup before the cpu is
> marked online. I really do not understand at all why this needs to be
> done in order to call calibrate_delay().
>
> calibrate_delay() monitors jiffies, which are updated from the CPU
> which is waiting for the new CPU to set the online bit.
>
> So you simply can call calibrate_delay() on the new CPU just from the
> interrupt disabled region and move the local timer setup after you
> stored the cpu data and before enabling interrupts.
>
> This solves both the cpu_online vs. cpu_active problem and the
> affinity setting of the per cpu timers.
>
Looks good to me......and of course, it works fine on SMDK4210 (EXYNOS4210).
Russell, how about this? If you're ok how this can be handled before v3.1?
As you know, I need to revert regarding one commit and this......or just
fixing it with this?
Anyway, I'd like to know your suggestion about this.
> Thanks,
>
> tglx
> ----
> Index: linux-2.6/arch/arm/kernel/smp.c
> =============================================================
> ======
> --- linux-2.6.orig/arch/arm/kernel/smp.c
> +++ linux-2.6/arch/arm/kernel/smp.c
> @@ -301,17 +301,7 @@ asmlinkage void __cpuinit secondary_star
> */
> platform_secondary_init(cpu);
>
> - /*
> - * Enable local interrupts.
> - */
> notify_cpu_starting(cpu);
> - local_irq_enable();
> - local_fiq_enable();
> -
> - /*
> - * Setup the percpu timer for this CPU.
> - */
> - percpu_timer_setup();
>
> calibrate_delay();
>
> @@ -323,10 +313,23 @@ asmlinkage void __cpuinit secondary_star
> * before we continue.
> */
> set_cpu_online(cpu, true);
> +
> + /*
> + * Setup the percpu timer for this CPU.
> + */
> + percpu_timer_setup();
> +
> while (!cpu_active(cpu))
> cpu_relax();
>
> /*
> + * cpu_active bit is set, so it's safe to enable interrupts
> + * now.
> + */
> + local_irq_enable();
> + local_fiq_enable();
> +
> + /*
> * OK, it's off to the idle thread for us
> */
> cpu_idle();
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply
* [PATCH 2/7] s3c-adc: describe features via quirk constants
From: Kukjin Kim @ 2011-10-10 4:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201110021318.42131.heiko@sntech.de>
Kukjin Kim wrote:
>
> Heiko St?bner wrote:
> >
> > Hi Kgene,
> >
> > Am Sonntag 02 Oktober 2011, 09:38:18 schrieb Kukjin Kim:
> > > How about following? I think following is also not bad...
> > ok, I don't claim to have the right solution, so if keeping the TYPE_xxx
enum
> > is better, I will do a rework of the series according to your solution
and
> > resend it.
> >
> Thanks for your understanding and please re-send it :)
>
Any re-sending?
> > Could I meanwhile interest you in the patches for the S3C2416 armclk and
> hsmmc
> > (from 28 Sep 2011) :-) ?
> >
> Sure, will check it soon, maybe tomorrow?
> Anyway, if any problems, let you know.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply
* [GIT PULL] Samsung devel-2 for v3.2
From: Kukjin Kim @ 2011-10-10 4:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111007191443.GA12004@opensource.wolfsonmicro.com>
Mark Brown wrote:
>
> On Fri, Oct 07, 2011 at 07:56:11PM +0200, Arnd Bergmann wrote:
> > On Monday 03 October 2011, Kukjin Kim wrote:
> > > Mark Brown wrote:
>
> > > > As I reported the other day this change breaks the boot early on on
the
> > > > Cragganmore S3C6410 based systems (I've not actually fired up my
> > > > SMDK6410 but I suspect it may have issues too). I did make some
brief
>
> > > Hmm, I thought it has no problem when I saw Thomas Abraham's 'serial:
> > > samsung' patches because he said it works fine with my for-next plus
his
> > > patches on SMDK6410...Anyway, I need to sort it out.
>
> > > Arnd, please hold this on, will request again soon.
>
> > Any update on this?
>
> We've got a lot closer to working out what's wrong (and got useful
> logging) but not nailed it down yet. Kukjin has confirmed that he can
> see what's likely the same issue on his systems. My suggestion is that
> we go ahead with the pull request for now and then fix incrementally,
> there's a relatively small set of systems affected. If it gets to more
> than a couple of -rcs we know which patches are problematic and so can
> always revert.
Yes I agree with you and I believe we don't need to revert it during next
-rc :)
Arnd, could you please pull that for v3.2?
If any problems, please let me know.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply
* [GIT PULL] Samsung cleanup-2 for v3.2
From: Kukjin Kim @ 2011-10-10 4:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201110072005.49967.arnd@arndb.de>
Arnd Bergmann wrote:
>
> On Tuesday 04 October 2011, Kukjin Kim wrote:
> > This is second cleanup for Samsung stuff for v3.2 and includes cleanup
> > header files in plat-s3c24xx and plat-s5p to merge into one plat-samsung
> > directory.
> >
> > Please pull from:
> > git://github.com/kgene/linux-samsung.git next-samsung-cleanup-2
> >
> > And this is based on previous Samsung cleanup branch,
next-samsung-cleanup
> > which has been merged in arm-soc because of dependency.
> >
> > If any problems, please let me know.
> >
>
> Looks good to me. I think this should go into 3.2 very late during the
merge
> window since it moves around a lot of files that might be touched by other
> patches, and I don't want to break a lot of that stuff, so I'm putting
> it into a separate next/cleanup2 branch, ok?
>
It's ok to me :)
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply
* [PATCH V2 1/2] ARM: S3C2410: Add __init attribute to usb_simtec_init()
From: Tushar Behera @ 2011-10-10 4:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4E905BAB.5060108@ru.mvista.com>
Hi Sergei,
On Saturday 08 October 2011 07:48 PM, Sergei Shtylyov wrote:
> Hello.
>
> On 07-10-2011 15:55, Tushar Behera wrote:
>
>> usb_simtec_init() references s3c_ohci_set_platdata() which is defined
>> with __init attribute. Hence to remove section mismatch warning, __init
>> attribute is added to usb_simtec_init().
>
>> It removes following two warnigs.
>
>> WARNING: vmlinux.o(.text+0x1460c): Section mismatch in reference from
>> the function usb_simtec_init() to the function
>> .init.text:s3c_ohci_set_platdata()
>> The function usb_simtec_init() references the function
>> __init s3c_ohci_set_platdata().
>
>> WARNING: vmlinux.o(.text+0x14650): Section mismatch in reference from
>> the function usb_simtec_init() to the (unknown reference)
>> .init.data:(unknown)
>> The function usb_simtec_init() references the (unknown reference)
>> __initdata (unknown).
>
>> Signed-off-by: Tushar Behera<tushar.behera@linaro.org>
> [...]
>
>> diff --git a/arch/arm/mach-s3c2410/usb-simtec.h
>> b/arch/arm/mach-s3c2410/usb-simtec.h
>> index 03842ed..43cc88f 100644
>> --- a/arch/arm/mach-s3c2410/usb-simtec.h
>> +++ b/arch/arm/mach-s3c2410/usb-simtec.h
>> @@ -12,5 +12,5 @@
>> * published by the Free Software Foundation.
>> */
>>
>> -extern int usb_simtec_init(void);
>> +extern int __init usb_simtec_init(void);
>
> Function prototypes don't need to be annotated with __init.
>
I agree that function prototypes don't require to be annotated.
But, will it not be better to have same annotation for both function
prototypes and the function definitions?
> WBR, Sergei
>
Thanks for your review.
--
Tushar Behera
^ permalink raw reply
* [PATCH 6/9] ARM: SPMP8000: Add pwm driver
From: Linus Walleij @ 2011-10-10 1:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318178172-7965-7-git-send-email-zoss@devai.org>
2011/10/9 Zoltan Devai <zoss@devai.org>:
> Signed-off-by: Zoltan Devai <zoss@devai.org>
> ---
> ?arch/arm/mach-spmp8000/pwm.c | ?246 ++++++++++++++++++++++++++++++++++++++++++
> ?1 files changed, 246 insertions(+), 0 deletions(-)
> ?create mode 100644 arch/arm/mach-spmp8000/pwm.c
Also PWM should have its own subsystem, sadly that is an area
where discussions about the patches for generic PWM in
drivers/pwm/ by Sascha Hauer seem to have stalled recently. :-(
Those we have tend to live in drivers/misc/ and drivers/mfd/
which is not good.
Kudos to Sascha for trying to solve the mess, we need more
subsystems...
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH 9/9] ARM: SPMP8000: Add Kconfig and Makefile entries to build the machine
From: Linus Walleij @ 2011-10-10 1:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318178172-7965-10-git-send-email-zoss@devai.org>
2011/10/9 Zoltan Devai <zoss@devai.org>:
> +config ARCH_SPMP8000
> + ? ? ? bool "Sunplus SPMP8000"
> + ? ? ? select CPU_ARM926T
> + ? ? ? select ARM_VIC
It's quite common for ARM926EJ-S systems to have TCM,
if you don't know whether your system has it just try
select HAVE_TCM for fun and see if it is detected on boot.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v4 3/3] ARM: OMAP: TI814X: Create board support and enable build for TI8148 EVM
From: Hemant Pedanekar @ 2011-10-10 1:40 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds minimal support and build configuration for TI8148 EVM. Also
adds support for low level debugging on UART1 console on the EVM.
Note that existing TI8168 EVM file (board-ti8168evm.c) is updated with machine
info for TI8148 EVM.
Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
---
arch/arm/mach-omap2/Kconfig | 5 +++++
arch/arm/mach-omap2/Makefile | 1 +
arch/arm/mach-omap2/board-ti8168evm.c | 22 ++++++++++++++++------
arch/arm/plat-omap/include/plat/uncompress.h | 3 +++
4 files changed, 25 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index caebeb7..59942b2 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -325,6 +325,11 @@ config MACH_TI8168EVM
depends on SOC_OMAPTI81XX
default y
+config MACH_TI8148EVM
+ bool "TI8148 Evaluation Module"
+ depends on SOC_OMAPTI81XX
+ default y
+
config MACH_OMAP_4430SDP
bool "OMAP 4430 SDP board"
default y
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 5ee4cd6..0e27e43 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -240,6 +240,7 @@ obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o
obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o
obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o
+obj-$(CONFIG_MACH_TI8148EVM) += board-ti8168evm.o
# Platform specific device init code
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index 7935fc9..b858921 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -1,5 +1,5 @@
/*
- * Code for TI8168 EVM.
+ * Code for TI8168/TI8148 EVM.
*
* Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
*
@@ -24,15 +24,15 @@
#include <plat/board.h>
#include <plat/common.h>
-static struct omap_board_config_kernel ti8168_evm_config[] __initdata = {
+static struct omap_board_config_kernel ti81xx_evm_config[] __initdata = {
};
-static void __init ti8168_evm_init(void)
+static void __init ti81xx_evm_init(void)
{
omap_serial_init();
omap_sdrc_init(NULL, NULL);
- omap_board_config = ti8168_evm_config;
- omap_board_config_size = ARRAY_SIZE(ti8168_evm_config);
+ omap_board_config = ti81xx_evm_config;
+ omap_board_config_size = ARRAY_SIZE(ti81xx_evm_config);
}
MACHINE_START(TI8168EVM, "ti8168evm")
@@ -42,5 +42,15 @@ MACHINE_START(TI8168EVM, "ti8168evm")
.init_early = ti81xx_init_early,
.init_irq = ti81xx_init_irq,
.timer = &omap3_timer,
- .init_machine = ti8168_evm_init,
+ .init_machine = ti81xx_evm_init,
+MACHINE_END
+
+MACHINE_START(TI8148EVM, "ti8148evm")
+ /* Maintainer: Texas Instruments */
+ .atag_offset = 0x100,
+ .map_io = ti81xx_map_io,
+ .init_early = ti81xx_init_early,
+ .init_irq = ti81xx_init_irq,
+ .timer = &omap3_timer,
+ .init_machine = ti81xx_evm_init,
MACHINE_END
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index a8e5187..27d9d31 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -181,6 +181,9 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
/* TI8168 base boards using UART3 */
DEBUG_LL_TI81XX(3, ti8168evm);
+ /* TI8148 base boards using UART1 */
+ DEBUG_LL_TI81XX(1, ti8148evm);
+
} while (0);
}
--
1.7.3.5
^ permalink raw reply related
* [PATCH v4 2/3] ARM: OMAP: TI814X: Add cpu type macros and detection support
From: Hemant Pedanekar @ 2011-10-10 1:40 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds cpu type, macros for identification of TI814X device.
Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
---
arch/arm/mach-omap2/clock3xxx_data.c | 3 +++
arch/arm/mach-omap2/id.c | 22 ++++++++++++++++++++++
arch/arm/plat-omap/include/plat/clkdev_omap.h | 1 +
arch/arm/plat-omap/include/plat/clock.h | 1 +
arch/arm/plat-omap/include/plat/cpu.h | 9 +++++++++
5 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 96622b6..4d8e908 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3517,6 +3517,9 @@ int __init omap3xxx_clk_init(void)
} else if (cpu_is_ti816x()) {
cpu_mask = RATE_IN_TI816X;
cpu_clkflg = CK_TI816X;
+ } else if (cpu_is_ti814x()) {
+ cpu_mask = RATE_IN_TI814X;
+ cpu_clkflg = CK_TI814X;
} else if (cpu_is_omap34xx()) {
if (omap_rev() == OMAP3430_REV_ES1_0) {
cpu_mask = RATE_IN_3430ES1;
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index ab2f417..f07faa9 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -337,6 +337,26 @@ static void __init omap3_check_revision(const char **cpu_rev)
break;
}
break;
+ case 0xb8f2:
+ switch (rev) {
+ case 0:
+ /* FALLTHROUGH */
+ case 1:
+ omap_revision = TI8148_REV_ES1_0;
+ *cpu_rev = "1.0";
+ break;
+ case 2:
+ omap_revision = TI8148_REV_ES2_0;
+ *cpu_rev = "2.0";
+ break;
+ case 3:
+ /* FALLTHROUGH */
+ default:
+ omap_revision = TI8148_REV_ES2_1;
+ *cpu_rev = "2.1";
+ break;
+ }
+ break;
default:
/* Unknown default to latest silicon rev as default */
omap_revision = OMAP3630_REV_ES1_2;
@@ -429,6 +449,8 @@ static void __init omap3_cpuinfo(const char *cpu_rev)
cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
} else if (cpu_is_ti816x()) {
cpu_name = "TI816X";
+ } else if (cpu_is_ti814x()) {
+ cpu_name = "TI814X";
} else if (omap3_has_iva() && omap3_has_sgx()) {
/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
cpu_name = "OMAP3430/3530";
diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h
index 6d84c0c..ea61ea2 100644
--- a/arch/arm/plat-omap/include/plat/clkdev_omap.h
+++ b/arch/arm/plat-omap/include/plat/clkdev_omap.h
@@ -41,6 +41,7 @@ struct omap_clk {
#define CK_TI816X (1 << 12)
#define CK_446X (1 << 13)
#define CK_AM33XX (1 << 14) /* AM33xx specific clocks */
+#define CK_TI814X (1 << 15)
#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS)
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 168c54e..739ba23 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -60,6 +60,7 @@ struct clkops {
#define RATE_IN_TI816X (1 << 6)
#define RATE_IN_4460 (1 << 7)
#define RATE_IN_AM33XX (1 << 8)
+#define RATE_IN_TI814X (1 << 9)
#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 03ab390..6bc662e 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -132,6 +132,7 @@ IS_OMAP_SUBCLASS(443x, 0x443)
IS_OMAP_SUBCLASS(446x, 0x446)
IS_TI_SUBCLASS(816x, 0x816)
+IS_TI_SUBCLASS(814x, 0x814)
IS_AM_SUBCLASS(335x, 0x335)
#define cpu_is_omap7xx() 0
@@ -144,6 +145,7 @@ IS_AM_SUBCLASS(335x, 0x335)
#define cpu_is_omap343x() 0
#define cpu_is_ti81xx() 0
#define cpu_is_ti816x() 0
+#define cpu_is_ti814x() 0
#define cpu_is_am33xx() 0
#define cpu_is_am335x() 0
#define cpu_is_omap44xx() 0
@@ -353,6 +355,7 @@ IS_OMAP_TYPE(3517, 0x3517)
# undef cpu_is_omap3517
# undef cpu_is_ti81xx
# undef cpu_is_ti816x
+# undef cpu_is_ti814x
# undef cpu_is_am33xx
# undef cpu_is_am335x
# define cpu_is_omap3430() is_omap3430()
@@ -373,6 +376,7 @@ IS_OMAP_TYPE(3517, 0x3517)
# define cpu_is_omap3630() is_omap363x()
# define cpu_is_ti81xx() is_ti81xx()
# define cpu_is_ti816x() is_ti816x()
+# define cpu_is_ti814x() is_ti814x()
# define cpu_is_am33xx() is_am33xx()
# define cpu_is_am335x() is_am335x()
#endif
@@ -421,6 +425,11 @@ IS_OMAP_TYPE(3517, 0x3517)
#define TI8168_REV_ES1_0 TI816X_CLASS
#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
+#define TI814X_CLASS 0x81400034
+#define TI8148_REV_ES1_0 TI814X_CLASS
+#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
+#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
+
#define AM335X_CLASS 0x33500034
#define AM335X_REV_ES1_0 AM335X_CLASS
--
1.7.3.5
^ permalink raw reply related
* [PATCH v4 1/3] ARM: OMAP: TI81XX: Prepare for addition of TI814X support
From: Hemant Pedanekar @ 2011-10-10 1:39 UTC (permalink / raw)
To: linux-arm-kernel
This patch updates existing macros, functions used for TI816X, to enable
addition of other SoCs belonging to TI81XX family (e.g., TI814X).
The approach taken is to use TI81XX/ti81xx for code/data going to be common
across all TI81XX devices.
cpu_is_ti81xx() is introduced to handle code common across TI81XX devices.
In addition, ti8168_evm_map_io() is now replaced with ti81xx_map_io() and moved
in mach-omap2/common.c as same will be used for TI814X and is not board
specific.
Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
---
arch/arm/mach-omap2/Kconfig | 6 ++--
arch/arm/mach-omap2/board-ti8168evm.c | 11 ++------
arch/arm/mach-omap2/clock3xxx_data.c | 2 +-
arch/arm/mach-omap2/common.c | 27 +++++++++++--------
arch/arm/mach-omap2/control.h | 8 +++---
arch/arm/mach-omap2/id.c | 8 +++---
arch/arm/mach-omap2/include/mach/debug-macro.S | 12 ++++----
arch/arm/mach-omap2/include/mach/entry-macro.S | 4 +-
arch/arm/mach-omap2/io.c | 14 +++++-----
arch/arm/mach-omap2/irq.c | 2 +-
arch/arm/mach-omap2/serial.c | 6 ++--
arch/arm/plat-omap/include/plat/common.h | 6 ++--
arch/arm/plat-omap/include/plat/cpu.h | 13 +++++++++
arch/arm/plat-omap/include/plat/hardware.h | 2 +-
arch/arm/plat-omap/include/plat/io.h | 6 ++--
arch/arm/plat-omap/include/plat/irqs.h | 2 +-
arch/arm/plat-omap/include/plat/serial.h | 14 +++++-----
.../plat-omap/include/plat/{ti816x.h => ti81xx.h} | 18 ++++++------
arch/arm/plat-omap/include/plat/uncompress.h | 8 +++---
arch/arm/plat-omap/io.c | 2 +-
20 files changed, 92 insertions(+), 79 deletions(-)
rename arch/arm/plat-omap/include/plat/{ti816x.h => ti81xx.h} (60%)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 45498c2..caebeb7 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -73,8 +73,8 @@ config SOC_OMAP3430
default y
select ARCH_OMAP_OTG
-config SOC_OMAPTI816X
- bool "TI816X support"
+config SOC_OMAPTI81XX
+ bool "TI81XX support"
depends on ARCH_OMAP3
default y
@@ -322,7 +322,7 @@ config MACH_OMAP_3630SDP
config MACH_TI8168EVM
bool "TI8168 Evaluation Module"
- depends on SOC_OMAPTI816X
+ depends on SOC_OMAPTI81XX
default y
config MACH_OMAP_4430SDP
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index e6ee884..7935fc9 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -35,17 +35,12 @@ static void __init ti8168_evm_init(void)
omap_board_config_size = ARRAY_SIZE(ti8168_evm_config);
}
-static void __init ti8168_evm_map_io(void)
-{
- omapti816x_map_common_io();
-}
-
MACHINE_START(TI8168EVM, "ti8168evm")
/* Maintainer: Texas Instruments */
.atag_offset = 0x100,
- .map_io = ti8168_evm_map_io,
- .init_early = ti816x_init_early,
- .init_irq = ti816x_init_irq,
+ .map_io = ti81xx_map_io,
+ .init_early = ti81xx_init_early,
+ .init_irq = ti81xx_init_irq,
.timer = &omap3_timer,
.init_machine = ti8168_evm_init,
MACHINE_END
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 5d0064a..96622b6 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3600,7 +3600,7 @@ int __init omap3xxx_clk_init(void)
* Lock DPLL5 -- here only until other device init code can
* handle this
*/
- if (!cpu_is_ti816x() && (omap_rev() >= OMAP3430_REV_ES2_0))
+ if (!cpu_is_ti81xx() && (omap_rev() >= OMAP3430_REV_ES2_0))
omap3_clk_lock_dpll5();
/* Avoid sleeping during omap3_core_dpll_m2_set_rate() */
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 110e5b9..7754e16 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -110,23 +110,28 @@ void __init omap3_map_io(void)
/*
* Adjust TAP register base such that omap3_check_revision accesses the correct
- * TI816X register for checking device ID (it adds 0x204 to tap base while
- * TI816X DEVICE ID register is at offset 0x600 from control base).
+ * TI81XX register for checking device ID (it adds 0x204 to tap base while
+ * TI81XX DEVICE ID register is at offset 0x600 from control base).
*/
-#define TI816X_TAP_BASE (TI816X_CTRL_BASE + \
- TI816X_CONTROL_DEVICE_ID - 0x204)
+#define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \
+ TI81XX_CONTROL_DEVICE_ID - 0x204)
-static struct omap_globals ti816x_globals = {
+static struct omap_globals ti81xx_globals = {
.class = OMAP343X_CLASS,
- .tap = OMAP2_L4_IO_ADDRESS(TI816X_TAP_BASE),
- .ctrl = OMAP2_L4_IO_ADDRESS(TI816X_CTRL_BASE),
- .prm = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE),
- .cm = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE),
+ .tap = OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE),
+ .ctrl = OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
+ .prm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
+ .cm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
};
-void __init omap2_set_globals_ti816x(void)
+void __init omap2_set_globals_ti81xx(void)
{
- __omap2_set_globals(&ti816x_globals);
+ __omap2_set_globals(&ti81xx_globals);
+}
+
+void __init ti81xx_map_io(void)
+{
+ omapti81xx_map_common_io();
}
#endif
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index d4ef75d..0ba68d3 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -52,8 +52,8 @@
#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00
#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60
-/* TI816X spefic control submodules */
-#define TI816X_CONTROL_DEVCONF 0x600
+/* TI81XX spefic control submodules */
+#define TI81XX_CONTROL_DEVCONF 0x600
/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */
@@ -244,8 +244,8 @@
#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250
#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254
-/* TI816X CONTROL_DEVCONF register offsets */
-#define TI816X_CONTROL_DEVICE_ID (TI816X_CONTROL_DEVCONF + 0x000)
+/* TI81XX CONTROL_DEVCONF register offsets */
+#define TI81XX_CONTROL_DEVICE_ID (TI81XX_CONTROL_DEVCONF + 0x000)
/*
* REVISIT: This list of registers is not comprehensive - there are more
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index d27daf9..ab2f417 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -223,7 +223,7 @@ static void __init omap4_check_features(void)
}
}
-static void __init ti816x_check_features(void)
+static void __init ti81xx_check_features(void)
{
omap_features = OMAP3_HAS_NEON;
}
@@ -469,11 +469,11 @@ void __init omap2_check_revision(void)
} else if (cpu_is_omap34xx()) {
omap3_check_revision(&cpu_rev);
- /* TI816X doesn't have feature register */
- if (!cpu_is_ti816x())
+ /* TI81XX doesn't have feature register */
+ if (!cpu_is_ti81xx())
omap3_check_features();
else
- ti816x_check_features();
+ ti81xx_check_features();
omap3_cpuinfo(cpu_rev);
return;
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
index 13f98e5..cdfc2a1 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -66,11 +66,11 @@ omap_uart_lsr: .word 0
beq 34f @ configure OMAP3UART4
cmp \rp, #OMAP4UART4 @ only on 44xx
beq 44f @ configure OMAP4UART4
- cmp \rp, #TI816XUART1 @ ti816x UART offsets different
+ cmp \rp, #TI81XXUART1 @ ti81Xx UART offsets different
beq 81f @ configure UART1
- cmp \rp, #TI816XUART2 @ ti816x UART offsets different
+ cmp \rp, #TI81XXUART2 @ ti81Xx UART offsets different
beq 82f @ configure UART2
- cmp \rp, #TI816XUART3 @ ti816x UART offsets different
+ cmp \rp, #TI81XXUART3 @ ti81Xx UART offsets different
beq 83f @ configure UART3
cmp \rp, #ZOOM_UART @ only on zoom2/3
beq 95f @ configure ZOOM_UART
@@ -94,11 +94,11 @@ omap_uart_lsr: .word 0
b 98f
44: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
b 98f
-81: mov \rp, #UART_OFFSET(TI816X_UART1_BASE)
+81: mov \rp, #UART_OFFSET(TI81XX_UART1_BASE)
b 98f
-82: mov \rp, #UART_OFFSET(TI816X_UART2_BASE)
+82: mov \rp, #UART_OFFSET(TI81XX_UART2_BASE)
b 98f
-83: mov \rp, #UART_OFFSET(TI816X_UART3_BASE)
+83: mov \rp, #UART_OFFSET(TI81XX_UART3_BASE)
b 98f
95: ldr \rp, =ZOOM_UART_BASE
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index ceb8b7e..cb2fb98 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -64,7 +64,7 @@
bne 9998f
/*
- * ti816x has additional IRQ pending register. Checking this
+ * ti81xx has additional IRQ pending register. Checking this
* register on omap2 & omap3 has no effect (read as 0).
*/
ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
@@ -141,7 +141,7 @@
bne 9999f
ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
cmp \irqnr, #0x0
-#ifdef CONFIG_SOC_OMAPTI816X
+#ifdef CONFIG_SOC_OMAPTI81XX
bne 9999f
ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
cmp \irqnr, #0x0
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index aa96538..21c144c 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -177,8 +177,8 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
};
#endif
-#ifdef CONFIG_SOC_OMAPTI816X
-static struct map_desc omapti816x_io_desc[] __initdata = {
+#ifdef CONFIG_SOC_OMAPTI81XX
+static struct map_desc omapti81xx_io_desc[] __initdata = {
{
.virtual = L4_34XX_VIRT,
.pfn = __phys_to_pfn(L4_34XX_PHYS),
@@ -264,10 +264,10 @@ void __init omap34xx_map_common_io(void)
}
#endif
-#ifdef CONFIG_SOC_OMAPTI816X
-void __init omapti816x_map_common_io(void)
+#ifdef CONFIG_SOC_OMAPTI81XX
+void __init omapti81xx_map_common_io(void)
{
- iotable_init(omapti816x_io_desc, ARRAY_SIZE(omapti816x_io_desc));
+ iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
}
#endif
@@ -419,9 +419,9 @@ void __init am35xx_init_early(void)
omap3_init_early();
}
-void __init ti816x_init_early(void)
+void __init ti81xx_init_early(void)
{
- omap2_set_globals_ti816x();
+ omap2_set_globals_ti81xx();
omap_common_init_early();
omap3xxx_voltagedomains_init();
omap3xxx_powerdomains_init();
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 65f1be6..95dee1e 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -186,7 +186,7 @@ void __init omap3_init_irq(void)
omap_init_irq(OMAP34XX_IC_BASE, 96);
}
-void __init ti816x_init_irq(void)
+void __init ti81xx_init_irq(void)
{
omap_init_irq(OMAP34XX_IC_BASE, 128);
}
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 9992dbf..6370acd 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -464,7 +464,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
mod_timer(&uart->timer, jiffies + uart->timeout);
omap_uart_smart_idle_enable(uart, 0);
- if (cpu_is_omap34xx() && !cpu_is_ti816x()) {
+ if (cpu_is_omap34xx() && !cpu_is_ti81xx()) {
u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
u32 wk_mask = 0;
u32 padconf = 0;
@@ -746,7 +746,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
*/
uart->regshift = p->regshift;
uart->membase = p->membase;
- if (cpu_is_omap44xx() || cpu_is_ti816x())
+ if (cpu_is_omap44xx() || cpu_is_ti81xx())
uart->errata |= UART_ERRATA_FIFO_FULL_ABORT;
else if ((serial_read_reg(uart, UART_OMAP_MVER) & 0xFF)
>= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV)
@@ -828,7 +828,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
}
/* Enable the MDR1 errata for OMAP3 */
- if (cpu_is_omap34xx() && !cpu_is_ti816x())
+ if (cpu_is_omap34xx() && !cpu_is_ti81xx())
uart->errata |= UART_ERRATA_i202_MDR1_ACCESS;
}
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index c50df48..3c32740 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -52,7 +52,7 @@ void omap35xx_init_early(void);
void omap3630_init_early(void);
void omap3_init_early(void); /* Do not use this one */
void am35xx_init_early(void);
-void ti816x_init_early(void);
+void ti81xx_init_early(void);
void omap4430_init_early(void);
void omap_sram_init(void);
@@ -78,7 +78,7 @@ void omap2_set_globals_242x(void);
void omap2_set_globals_243x(void);
void omap2_set_globals_3xxx(void);
void omap2_set_globals_443x(void);
-void omap2_set_globals_ti816x(void);
+void omap2_set_globals_ti81xx(void);
/* These get called from omap2_set_globals_xxxx(), do not call these */
void omap2_set_globals_tap(struct omap_globals *);
@@ -90,7 +90,7 @@ void omap242x_map_io(void);
void omap243x_map_io(void);
void omap3_map_io(void);
void omap4_map_io(void);
-
+void ti81xx_map_io(void);
/**
* omap_test_timeout - busy-loop, testing a condition
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 649b370..03ab390 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -86,6 +86,14 @@ static inline int is_am ##class (void) \
return (GET_AM_CLASS == (id)) ? 1 : 0; \
}
+#define GET_TI_CLASS ((omap_rev() >> 24) & 0xff)
+
+#define IS_TI_CLASS(class, id) \
+static inline int is_ti ##class (void) \
+{ \
+ return (GET_TI_CLASS == (id)) ? 1 : 0; \
+}
+
#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
#define IS_OMAP_SUBCLASS(subclass, id) \
@@ -114,6 +122,8 @@ IS_OMAP_CLASS(34xx, 0x34)
IS_OMAP_CLASS(44xx, 0x44)
IS_AM_CLASS(33xx, 0x33)
+IS_TI_CLASS(81xx, 0x81)
+
IS_OMAP_SUBCLASS(242x, 0x242)
IS_OMAP_SUBCLASS(243x, 0x243)
IS_OMAP_SUBCLASS(343x, 0x343)
@@ -132,6 +142,7 @@ IS_AM_SUBCLASS(335x, 0x335)
#define cpu_is_omap243x() 0
#define cpu_is_omap34xx() 0
#define cpu_is_omap343x() 0
+#define cpu_is_ti81xx() 0
#define cpu_is_ti816x() 0
#define cpu_is_am33xx() 0
#define cpu_is_am335x() 0
@@ -340,6 +351,7 @@ IS_OMAP_TYPE(3517, 0x3517)
# undef cpu_is_omap3530
# undef cpu_is_omap3505
# undef cpu_is_omap3517
+# undef cpu_is_ti81xx
# undef cpu_is_ti816x
# undef cpu_is_am33xx
# undef cpu_is_am335x
@@ -359,6 +371,7 @@ IS_OMAP_TYPE(3517, 0x3517)
!omap3_has_sgx())
# undef cpu_is_omap3630
# define cpu_is_omap3630() is_omap363x()
+# define cpu_is_ti81xx() is_ti81xx()
# define cpu_is_ti816x() is_ti816x()
# define cpu_is_am33xx() is_am33xx()
# define cpu_is_am335x() is_am335x()
diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h
index e87efe1..1a2f830 100644
--- a/arch/arm/plat-omap/include/plat/hardware.h
+++ b/arch/arm/plat-omap/include/plat/hardware.h
@@ -286,6 +286,6 @@
#include <plat/omap24xx.h>
#include <plat/omap34xx.h>
#include <plat/omap44xx.h>
-#include <plat/ti816x.h>
+#include <plat/ti81xx.h>
#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index 5ffbea6..cf798fc 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -308,10 +308,10 @@ static inline void omap34xx_map_common_io(void)
}
#endif
-#ifdef CONFIG_SOC_OMAPTI816X
-extern void omapti816x_map_common_io(void);
+#ifdef CONFIG_SOC_OMAPTI81XX
+extern void omapti81xx_map_common_io(void);
#else
-static inline void omapti816x_map_common_io(void)
+static inline void omapti81xx_map_common_io(void)
{
}
#endif
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 30e1071..0af9a22 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -441,7 +441,7 @@ extern void __iomem *omap_irq_base;
void omap1_init_irq(void);
void omap2_init_irq(void);
void omap3_init_irq(void);
-void ti816x_init_irq(void);
+void ti81xx_init_irq(void);
extern int omap_irq_pending(void);
void omap_intc_save_context(void);
void omap_intc_restore_context(void);
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index 1ab9fd6..6975ee3 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -51,10 +51,10 @@
#define OMAP4_UART3_BASE 0x48020000
#define OMAP4_UART4_BASE 0x4806e000
-/* TI816X serial ports */
-#define TI816X_UART1_BASE 0x48020000
-#define TI816X_UART2_BASE 0x48022000
-#define TI816X_UART3_BASE 0x48024000
+/* TI81XX serial ports */
+#define TI81XX_UART1_BASE 0x48020000
+#define TI81XX_UART2_BASE 0x48022000
+#define TI81XX_UART3_BASE 0x48024000
/* AM3505/3517 UART4 */
#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
@@ -89,9 +89,9 @@
#define OMAP4UART2 OMAP2UART2
#define OMAP4UART3 43
#define OMAP4UART4 44
-#define TI816XUART1 81
-#define TI816XUART2 82
-#define TI816XUART3 83
+#define TI81XXUART1 81
+#define TI81XXUART2 82
+#define TI81XXUART3 83
#define ZOOM_UART 95 /* Only on zoom2/3 */
/* This is only used by 8250.c for omap1510 */
diff --git a/arch/arm/plat-omap/include/plat/ti816x.h b/arch/arm/plat-omap/include/plat/ti81xx.h
similarity index 60%
rename from arch/arm/plat-omap/include/plat/ti816x.h
rename to arch/arm/plat-omap/include/plat/ti81xx.h
index 50510f5..8f9843f 100644
--- a/arch/arm/plat-omap/include/plat/ti816x.h
+++ b/arch/arm/plat-omap/include/plat/ti81xx.h
@@ -1,5 +1,5 @@
/*
- * This file contains the address data for various TI816X modules.
+ * This file contains the address data for various TI81XX modules.
*
* Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
*
@@ -13,15 +13,15 @@
* GNU General Public License for more details.
*/
-#ifndef __ASM_ARCH_TI816X_H
-#define __ASM_ARCH_TI816X_H
+#ifndef __ASM_ARCH_TI81XX_H
+#define __ASM_ARCH_TI81XX_H
-#define L4_SLOW_TI816X_BASE 0x48000000
+#define L4_SLOW_TI81XX_BASE 0x48000000
-#define TI816X_SCM_BASE 0x48140000
-#define TI816X_CTRL_BASE TI816X_SCM_BASE
-#define TI816X_PRCM_BASE 0x48180000
+#define TI81XX_SCM_BASE 0x48140000
+#define TI81XX_CTRL_BASE TI81XX_SCM_BASE
+#define TI81XX_PRCM_BASE 0x48180000
-#define TI816X_ARM_INTC_BASE 0x48200000
+#define TI81XX_ARM_INTC_BASE 0x48200000
-#endif /* __ASM_ARCH_TI816X_H */
+#endif /* __ASM_ARCH_TI81XX_H */
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index 2d45ea3..a8e5187 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -99,9 +99,9 @@ static inline void flush(void)
#define DEBUG_LL_ZOOM(mach) \
_DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
-#define DEBUG_LL_TI816X(p, mach) \
- _DEBUG_LL_ENTRY(mach, TI816X_UART##p##_BASE, OMAP_PORT_SHIFT, \
- TI816XUART##p)
+#define DEBUG_LL_TI81XX(p, mach) \
+ _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
+ TI81XXUART##p)
static inline void __arch_decomp_setup(unsigned long arch_id)
{
@@ -179,7 +179,7 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
DEBUG_LL_ZOOM(omap_zoom3);
/* TI8168 base boards using UART3 */
- DEBUG_LL_TI816X(3, ti8168evm);
+ DEBUG_LL_TI81XX(3, ti8168evm);
} while (0);
}
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
index 1bbcbde..7bd0d78 100644
--- a/arch/arm/plat-omap/io.c
+++ b/arch/arm/plat-omap/io.c
@@ -90,7 +90,7 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
}
#endif
#ifdef CONFIG_ARCH_OMAP3
- if (cpu_is_ti816x()) {
+ if (cpu_is_ti81xx()) {
if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
} else if (cpu_is_omap34xx()) {
--
1.7.3.5
^ permalink raw reply related
* [PATCH v4 0/3] Add support for TI814X processor series
From: Hemant Pedanekar @ 2011-10-10 1:39 UTC (permalink / raw)
To: linux-arm-kernel
This patch set adds support for DM814x/AM387x device series having Cortex-A8
MPU.
The technical documents are available from following link:
http://focus.ti.com/docs/prod/folders/print/tms320dm8148.html
This series is referred in code as TI814X.
Since these devices share similar architecture as TI816X devices, existing
TI816X code is updated to accomodate TI814X support. The code shared across
TI816X and TI814X devices is updated with TI81XX/ti81xx prefix as applicable,
while maintaining cpu_is_ti816x() and cpu_is_ti814x() to distinguish specific
execution differences.
Changes since v3:
1) Avoid renaming board-ti8168evm.c, just add TI8148 EVM support in it.
2) Drop changes in clock related data variables from u8 to u16 since the same
was incorporated as part of AM33xx addition.
Changes since v2:
1) Incorporate Tony's suggestion about moving ti8168_evm_map_io() to
arch/arm/mach-omap2/common.c to keep common across TI81XX.
2) Keeping single board file (board-ti81xxevm.c) for TI816X and TI814X EVMs
Changes since v1:
1) Rebased and updated after Paul's CHIP_IS removal changes
2) Removed call to omap2_init_common_devices() as per Kevin's comment
Hemant Pedanekar (3):
ARM: OMAP: TI81XX: Prepare for addition of TI814X support
ARM: OMAP: TI814X: Add cpu type macros and detection support
ARM: OMAP: TI814X: Create board support and enable build for TI8148
EVM
arch/arm/mach-omap2/Kconfig | 11 +++++--
arch/arm/mach-omap2/Makefile | 1 +
arch/arm/mach-omap2/board-ti8168evm.c | 33 +++++++++++--------
arch/arm/mach-omap2/clock3xxx_data.c | 5 ++-
arch/arm/mach-omap2/common.c | 27 +++++++++------
arch/arm/mach-omap2/control.h | 8 ++--
arch/arm/mach-omap2/id.c | 30 +++++++++++++++--
arch/arm/mach-omap2/include/mach/debug-macro.S | 12 +++---
arch/arm/mach-omap2/include/mach/entry-macro.S | 4 +-
arch/arm/mach-omap2/io.c | 14 ++++----
arch/arm/mach-omap2/irq.c | 2 +-
arch/arm/mach-omap2/serial.c | 6 ++--
arch/arm/plat-omap/include/plat/clkdev_omap.h | 1 +
arch/arm/plat-omap/include/plat/clock.h | 1 +
arch/arm/plat-omap/include/plat/common.h | 6 ++--
arch/arm/plat-omap/include/plat/cpu.h | 22 +++++++++++++
arch/arm/plat-omap/include/plat/hardware.h | 2 +-
arch/arm/plat-omap/include/plat/io.h | 6 ++--
arch/arm/plat-omap/include/plat/irqs.h | 2 +-
arch/arm/plat-omap/include/plat/serial.h | 14 ++++----
.../plat-omap/include/plat/{ti816x.h => ti81xx.h} | 18 +++++-----
arch/arm/plat-omap/include/plat/uncompress.h | 11 ++++--
arch/arm/plat-omap/io.c | 2 +-
23 files changed, 153 insertions(+), 85 deletions(-)
rename arch/arm/plat-omap/include/plat/{ti816x.h => ti81xx.h} (60%)
--
1.7.3.5
^ permalink raw reply
* [PATCH 1/9] ARM: vic: Don't write to the read-only register VIC_IRQ_STATUS
From: Linus Walleij @ 2011-10-10 1:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318178172-7965-2-git-send-email-zoss@devai.org>
2011/10/9 Zoltan Devai <zoss@devai.org>:
> This is unneeded and causes an abort on the SPMP8000 platform.
>
> Signed-off-by: Zoltan Devai <zoss@devai.org>
> ---
> ?arch/arm/common/vic.c | ? ?1 -
> ?1 files changed, 0 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
> index b22b83d..651c77d 100644
> --- a/arch/arm/common/vic.c
> +++ b/arch/arm/common/vic.c
> @@ -274,7 +274,6 @@ static void __init vic_disable(void __iomem *base)
> ? ? ? ?writel(0, base + VIC_INT_SELECT);
> ? ? ? ?writel(0, base + VIC_INT_ENABLE);
> ? ? ? ?writel(~0, base + VIC_INT_ENABLE_CLEAR);
> - ? ? ? writel(0, base + VIC_IRQ_STATUS);
> ? ? ? ?writel(0, base + VIC_ITCR);
> ? ? ? ?writel(~0, base + VIC_INT_SOFT_CLEAR);
> ?}
Indeed.
This patch stands on its own, please put it into Russell's patch
tracker at http://www.arm.linux.org.uk/developer/patches/
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH 5/9] ARM: SPMP8000: Add pinmux driver
From: Linus Walleij @ 2011-10-10 1:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318178172-7965-6-git-send-email-zoss@devai.org>
2011/10/9 Zoltan Devai <zoss@devai.org>:
> ?arch/arm/mach-spmp8000/pinmux.c | ?131 +++++++++++++++++++++++++++++++++++++++
> ?1 files changed, 131 insertions(+), 0 deletions(-)
> ?create mode 100644 arch/arm/mach-spmp8000/pinmux.c
I'm creating this new pin control and pin mux subsystem,
set for next merge window. Can you check it out and see
if it does what you need?
http://marc.info/?l=linux-kernel&m=131805699106465&w=2
Thanks,
Linus Walleij
^ permalink raw reply
* [PATCH 4/9] ARM: SPMP8000: Add ADC driver
From: Linus Walleij @ 2011-10-10 1:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1318178172-7965-5-git-send-email-zoss@devai.org>
2011/10/9 Zoltan Devai <zoss@devai.org>:
> Signed-off-by: Zoltan Devai <zoss@devai.org>
> ---
> ?arch/arm/mach-spmp8000/adc.c ? ? ? ? ? ? ? ? ? ? ?| ?465 +++++++++++++++++++++
> ?arch/arm/mach-spmp8000/include/mach/spmp8000adc.h | ? 29 ++
I think we stopped stuffing misc drivers under arch/arm/*
And stuffing them under drivers/misc/* won't be popular either.
IIO has some ADCs in drivers/staging/iio/adc
these seem all to be intended to be used from userspace.
There are a few in-kernel ADCs all over the kernel tree
for various specific purposes.
I don't know where we should go with this kind of stuff,
really :-/
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH 1/5] drivercore: add new error value for deferred probe
From: Greg KH @ 2011-10-10 1:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACxGe6t+PfnNGniYUj3pbK22uqjqkbh2+D=7qvvd_-Yd4yR0dw@mail.gmail.com>
On Sun, Oct 09, 2011 at 04:59:31PM -0600, Grant Likely wrote:
> On Fri, Oct 7, 2011 at 6:12 PM, Greg KH <greg@kroah.com> wrote:
> > On Fri, Oct 07, 2011 at 07:28:33PM -0400, Valdis.Kletnieks at vt.edu wrote:
> >> On Fri, 07 Oct 2011 16:12:45 MDT, Grant Likely said:
> >> > On Fri, Oct 7, 2011 at 12:43 AM, Greg KH <greg@kroah.com> wrote:
> >> > > On Fri, Oct 07, 2011 at 10:33:06AM +0500, G, Manjunath Kondaiah wrote:
> >>
> >> > >> +#define EPROBE_DEFER 517 ? ? /* restart probe again after some time */
> >> > >
> >> > > Can we really do this?
> >>
> >> > According to Arnd, yes this is okay.
> >>
> >> > > ?Isn't this some user/kernel api here?
> >>
> >> > > What's wrong with just "overloading" on top of an existing error code?
> >> > > Surely one of the other 516 types could be used here, right?
> >>
> >> > overloading makes it really hard to find the users at a later date.
> >>
> >> Would proposing '#define EPROBE_DEFER EAGAIN' be acceptable to everybody? That
> >> would allow overloading EAGAIN, but still make it easy to tell the usages apart
> >> if we need to separate them later...
> >
> > Yes, please do that, it is what USB does for it's internal error code
> > handling.
>
> Really? When we've only currently used approximately 2^9 of a 2^31
> numberspace? I'm fine with making sure that the number doesn't show
> up in the userspace headers, but it makes no sense to overload the
> #defines. Particularly so in this case where it isn't feasible to
> audit every driver to figure out what probe might possibly return. It
> is well within the realm of possibility that existing drivers are
> already returning -EAGAIN.
I doubt they are, but you are right, it's really hard to tell.
> Besides; linux/errno.h *already* has linux-internal error codes that
> do not get exported out to userspace. There is an #ifdef __KERNEL__
> block around ERESTARTSYS through EIOCBRETRY which is filtered out when
> exporting headers. I can't see any possible reason why we wouldn't
> add Linux internal error codes here.
As long as it stays internal, that's fine, I was worried that this would
be exported to userspace.
Alan, still object to this?
greg k-h
^ permalink raw reply
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