* [PATCH 1/3 v3.1] ARM: S3C64XX: Update for conversion to SAMSUNG_GPIO_EXTRA
From: Mark Brown @ 2011-10-31 18:42 UTC (permalink / raw)
To: linux-arm-kernel
The conversion of the S3C64XX GPIOs to the generic Samsung GPIOs mean that
rather than using the previous S3C24XX_GPIO_EXTRA configuration the driver
now uses SAMSUNG_GPIO_EXTRA.
Since SAMSUNG_GPIO_EXTRA requires the arch to include the extra space in
ARCH_NR_GPIOs add it on to BOARD_NR_GPIOs (in case boards are relying on
the existing reservation).
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
---
arch/arm/mach-s3c64xx/include/mach/gpio.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio.h b/arch/arm/mach-s3c64xx/include/mach/gpio.h
index 6e34c2f..090c497 100644
--- a/arch/arm/mach-s3c64xx/include/mach/gpio.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio.h
@@ -88,6 +88,6 @@ enum s3c_gpio_number {
/* define the number of gpios we need to the one after the GPQ() range */
#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
-#define BOARD_NR_GPIOS 16
+#define BOARD_NR_GPIOS (16 + CONFIG_SAMSUNG_GPIO_EXTRA)
#define ARCH_NR_GPIOS (GPIO_BOARD_START + BOARD_NR_GPIOS)
--
1.7.7.1
^ permalink raw reply related
* [PATCH v2 2/3] arm/dt: tegra: add dts file for paz00
From: Marc Dietrich @ 2011-10-31 18:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <74CDBE0F657A3D45AFBB94109FB122FF173EDAB782@HQMAIL01.nvidia.com>
ok, lets bring this to an end.
On Monday 31 October 2011 09:09:13 Stephen Warren wrote:
> Marc Dietrich wrote at Sunday, October 30, 2011 2:40 PM:
> > On Friday 28 October 2011 09:49:49 Stephen Warren wrote:
> > > Marc Dietrich wrote at Friday, October 28, 2011 4:30 AM:
> > > > Am Donnerstag, 27. Oktober 2011, 09:50:03 schrieb Stephen Warren:
> > > > > Marc Dietrich wrote at Wednesday, October 26, 2011 1:59 PM:
> > > > > > This adds a dts file for paz00. As a side effect, this
> > > > > > also enables the embedded controller which controls the keyboard,
> > > > > > touchpad, power, leds, and some other functions.
> > > > > > ...
> > > > > > +++ b/arch/arm/boot/dts/tegra-paz00.dts
> > > > > > @@ -0,0 +1,70 @@
> > > > > > +/dts-v1/;
> > > > > > +
> > > > > > +/memreserve/ 0x1c000000 0x04000000;
> > > > > > +/include/ "tegra20.dtsi"
> > > > > > +
> > > > > > +/ {
> > > > > > + model = "Toshiba AC100 / Dynabook AZ";
> > > > > > + compatible = "compal,paz00", "nvidia,tegra20";
> > > > > > +
> > > > > > + chosen {
> > > > > > + bootargs = "mem=448 at 0 console=ttyS0,115200n8
> > > > > > root=/dev/mmcblk1p1";
> > > > >
> > > > > You shouldn't need the mem= parameter here; it wasn't in
> > > > > your first patch set.
> > > >
> > > > that's because I forgot it. Sorry, I didn't mentioned it in the
> > > > changelog. I wonder why mem= is still needed.
> > >
> > > I wonder if this is some conflict between ATAGs and the DT-specified
> > > memory node.
> > >
> > > As far as I can tell, the kernel's memory information typically
> > > comes from ATAGs. Some boards override what's in the ATAGs in their
> > > machine descriptor's fixup routine, e.g. see tegra_paz00_fixup().
> > > Presumably, this is because of buggy bootloaders sending incorrect
> > > memory information in the ATAGs. Do you have any way to check the ATAGs
> > > that the bootloader is sending? Probably, you could enable DEBUG_LL
> > > and using the low-level debugging functions to dump some of that
> > > information to the UART early during boot.
> >
> > I got the ATAGS from /proc/atags and there is no memory entry there,
> > only
> > initrd and cmdline (which is the one from nvflash).
> >
> > The machine also has a fixup routine, but it also boots without (I'm
> > sure it was necessary in the past),
>
> ...
>
> > I tested several variations. Without DT, the fixup can compensate a
> > missing mem entry in the kernel command line, but with a mem= from the
> > kernel command line, a fixup is not needed.
>
> OK, that makes sense.
>
> > With DT, the command line specified from nvflash is ignored and the one
> > from DT comes into the game.
>
> I assume you're using CONFIG_ARM_APPENDED_DTB but not
> CONFIG_ARM_ATAG_DTB_COMPAT.
> > If it is also missing there, system detects 512 MB.
correct.
> That makes sense; that's the value in the .dts file you posted.
>
> > (which is physical right, but we cannot reserve memory for the gpu). The
> > fixup is indeed ignored in this case.
>
> It's not "ignored" as such.
>
> When booting without DT, the machine descriptor in board-paz00.c is used,
> since the descriptor is selected based on the machine ID in the descriptor,
> and that descriptor includes:
>
> .fixup = tegra_paz00_fixup,
>
> ... which causes that fixup function to be called.
>
> When booting with DT, the machine descriptor in board-dt.c is used, since
> the descriptor is selected based on the DT's overall compatible property,
> and that descriptor doesn't refer to tegra_paz00_fixup() at all, so it's
> not called.
ok, I think I understood now. Thanks for the detailed explanation.
> > ...
> >
> > > c) Test booting, and check what RAM size the kernel thinks you have.
> >
> > see above. RAM detection works, but it's not what we want ...
>
> At this point, I'd argue that exposing the full 512M to the kernel /is/
> what we want. There is no Tegra GPU support in the mainline kernel at
> present. As such, I'd argue that we should give the entire RAM space to
> the kernel to use. As and when we add GPU support to the kernel, we can
> use an appropriate mechanism to take RAM away from the kernel for that
> purpose.
sound fine. I guess the vmalloc is also due to some gpu requirements...
> So, I'm planning to remove all the /memreserve/ entries from the Tegra
> .dts files as soon as I can find a minute to do so.
>
> But, as Grant mentioned, the /memreserve/ .dts directive should work
> right now to reserve memory. I'm not sure if you'd tried that and it didn't
> work? If so, it'd be good to debug that just to make sure the mechanism
> works, even if we don't intend to use it.
actually, it works as Grant said. For some reasons it didn't worked here when
I tested it. Maybe I just catched a bad setup of linux-next/bootloader/kernel
arguments.
Thanks for you patience with me...
Marc
^ permalink raw reply
* Serious question: How long does it take to get 64bit into ARM?
From: Michelle Konzack @ 2011-10-31 17:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111031101519.GF19187@n2100.arm.linux.org.uk>
Hello Russell King - ARM Linux,
Am 2011-10-31 10:15:19, hacktest Du folgendes herunter:
> It won't happen until there's some concrete technical documentation or
> example implementation publically released, so at the moment it really
> depends on the marketing schedule.
I hope, I can get a Development Kit and some CPUs as fast a possibel and
I hope, I get it very fast running.
The Marvel Discovery MV78100/MV78200 had cost me around 1 year to
complete.
Thanks, Greetings and nice Day/Evening
Michelle Konzack
--
##################### Debian GNU/Linux Consultant ######################
Development of Intranet and Embedded Systems with Debian GNU/Linux
Internet Service Provider, Cloud Computing
<http://www.itsystems.tamay-dogan.net/>
itsystems at tdnet Jabber linux4michelle at jabber.ccc.de
Owner Michelle Konzack
Gewerbe Strasse 3 Tel office: +49-176-86004575
77694 Kehl Tel mobil: +49-177-9351947
Germany Tel mobil: +33-6-61925193 (France)
USt-ID: DE 278 049 239
Linux-User #280138 with the Linux Counter, http://counter.li.org/
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^ permalink raw reply
* Serious question: How long does it take to get 64bit into ARM?
From: Michelle Konzack @ 2011-10-31 17:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAHkRjk47P4BpEWCRAyU_cJ=nA1s+-Xbe2+WAwJ9LMx5-wJ6KkQ@mail.gmail.com>
Hello Catalin Marinas,
Am 2011-10-31 08:48:33, hacktest Du folgendes herunter:
> We are working on this already and will follow the Linux community
> review process to get the ARMv8 support in the mainline kernel. I
> can't mention a timeline at this point as it depends on detailed
> documentation being available and at least some early hardware (FPGA)
> to test on but hopefully we'll complete the process before you can get
> platforms with ARMv8 (even if mainline would not fully support ARMv8,
> I'll make patches available on some Git tree).
Thanks, this ais a great Information.
I am already in contact with APM and like to build a series of new Low-
Energy Servers. I have already requested the NDA to get the FPGA based
versions and waiting for the validation.
Thanks, Greetings and nice Day/Evening
Michelle Konzack
--
##################### Debian GNU/Linux Consultant ######################
Development of Intranet and Embedded Systems with Debian GNU/Linux
Internet Service Provider, Cloud Computing
<http://www.itsystems.tamay-dogan.net/>
itsystems at tdnet Jabber linux4michelle at jabber.ccc.de
Owner Michelle Konzack
Gewerbe Strasse 3 Tel office: +49-176-86004575
77694 Kehl Tel mobil: +49-177-9351947
Germany Tel mobil: +33-6-61925193 (France)
USt-ID: DE 278 049 239
Linux-User #280138 with the Linux Counter, http://counter.li.org/
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^ permalink raw reply
* [PATCH] i2c-gpio.c: correct logic of pdata->scl_is_open_drain
From: Voss, Nikolaus @ 2011-10-31 16:14 UTC (permalink / raw)
To: linux-arm-kernel
If pdata->scl_is_open_drain was set, the driver used push-pull output
for SCL, not open-drain output.
Signed-off-by: Nikolaus Voss <n.voss@weinmann.de>
---
drivers/i2c/busses/i2c-gpio.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
index a651779..b161335 100644
--- a/drivers/i2c/busses/i2c-gpio.c
+++ b/drivers/i2c/busses/i2c-gpio.c
@@ -104,7 +104,7 @@ static int __devinit i2c_gpio_probe(struct platform_device *pdev)
if (ret)
goto err_request_scl;
- if (pdata->sda_is_open_drain) {
+ if (!pdata->sda_is_open_drain) {
gpio_direction_output(pdata->sda_pin, 1);
bit_data->setsda = i2c_gpio_setsda_val;
} else {
@@ -112,7 +112,7 @@ static int __devinit i2c_gpio_probe(struct platform_device *pdev)
bit_data->setsda = i2c_gpio_setsda_dir;
}
- if (pdata->scl_is_open_drain || pdata->scl_is_output_only) {
+ if (!pdata->scl_is_open_drain || pdata->scl_is_output_only) {
gpio_direction_output(pdata->scl_pin, 1);
bit_data->setscl = i2c_gpio_setscl_val;
} else {
--
1.7.4.1
^ permalink raw reply related
* [PATCH] drivers/i2c/busses/i2c-at91.c: fix brokeness
From: Voss, Nikolaus @ 2011-10-31 16:10 UTC (permalink / raw)
To: linux-arm-kernel
This patch contains the following fixes:
1. Support for multiple interfaces (there are usually two of them).
2. Remove busy waiting in favour of interrupt driven io.
3. No repeated start (Sr) was possible. This implementation supports one
repeated start condition which is enough for most real-world applications
including all SMBus transfer types.
Tested on Atmel G45 with BQ20Z80 battery SMBus client.
Signed-off-by: Nikolaus Voss <n.voss@weinmann.de>
---
drivers/i2c/busses/Kconfig | 11 +-
drivers/i2c/busses/i2c-at91.c | 415 +++++++++++++++++++++++++++--------------
2 files changed, 278 insertions(+), 148 deletions(-)
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 646068e..c4b6bdc 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -286,18 +286,15 @@ comment "I2C system bus drivers (mostly embedded / system-on-chip)"
config I2C_AT91
tristate "Atmel AT91 I2C Two-Wire interface (TWI)"
- depends on ARCH_AT91 && EXPERIMENTAL && BROKEN
+ depends on ARCH_AT91 && EXPERIMENTAL
help
This supports the use of the I2C interface on Atmel AT91
processors.
- This driver is BROKEN because the controller which it uses
- will easily trigger RX overrun and TX underrun errors. Using
- low I2C clock rates may partially work around those issues
- on some systems. Another serious problem is that there is no
- documented way to issue repeated START conditions, as needed
+ A serious problem is that there is no documented way to issue
+ repeated START conditions for more than two messages, as needed
to support combined I2C messages. Use the i2c-gpio driver
- unless your system can cope with those limitations.
+ unless your system can cope with this limitation.
config I2C_AU1550
tristate "Au1550/Au1200 SMBus interface"
diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index 305c075..a2c38ff 100644
--- a/drivers/i2c/busses/i2c-at91.c
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -1,6 +1,10 @@
-/*
+/* -*- linux-c -*-
+
i2c Support for Atmel's AT91 Two-Wire Interface (TWI)
+ Copyright (C) 2011 Nikolaus Voss <n.voss@weinmann.de>
+
+ Evolved from original work by:
Copyright (C) 2004 Rick Bronson
Converted to 2.6 by Andrew Victor <andrew@sanpeople.com>
@@ -18,9 +22,9 @@
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/types.h>
-#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/init.h>
+#include <linux/interrupt.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/io.h>
@@ -29,29 +33,47 @@
#include <mach/board.h>
#include <mach/cpu.h>
-#define TWI_CLOCK 100000 /* Hz. max 400 Kbits/sec */
+#define TWI_CLOCK 30000 /* Hz. max 400 Kbits/sec */
+#define AT91_I2C_TIMEOUT (1 * HZ) /* transfer timeout */
+
+struct at91_i2c_dev {
+ struct device *dev;
+ void __iomem *base;
+ struct completion cmd_complete;
+ struct clk *clk;
+ u8 *buf;
+ size_t buf_len;
+ int irq;
+ unsigned transfer_status;
+ struct i2c_adapter adapter;
+};
+#define at91_twi_read(reg) __raw_readl(dev->base + (reg))
+#define at91_twi_write(reg, val) __raw_writel((val), dev->base + (reg))
-static struct clk *twi_clk;
-static void __iomem *twi_base;
-#define at91_twi_read(reg) __raw_readl(twi_base + (reg))
-#define at91_twi_write(reg, val) __raw_writel((val), twi_base + (reg))
+static inline void at91_disable_interrupts(struct at91_i2c_dev *dev)
+{
+ at91_twi_write(AT91_TWI_IDR,
+ AT91_TWI_TXCOMP | AT91_TWI_RXRDY | AT91_TWI_TXRDY);
+}
-/*
- * Initialize the TWI hardware registers.
- */
-static void __devinit at91_twi_hwinit(void)
+static void at91_init_bus(struct at91_i2c_dev *dev)
{
- unsigned long cdiv, ckdiv;
-
- at91_twi_write(AT91_TWI_IDR, 0xffffffff); /* Disable all interrupts */
+ at91_disable_interrupts(dev);
at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST); /* Reset peripheral */
at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN); /* Set Master mode */
+ at91_twi_write(AT91_TWI_CR, AT91_TWI_SVDIS); /* Disable Slave mode */
+}
+
+
+static void at91_set_clock(struct at91_i2c_dev *dev)
+{
+ unsigned long cdiv, ckdiv;
/* Calcuate clock dividers */
- cdiv = (clk_get_rate(twi_clk) / (2 * TWI_CLOCK)) - 3;
+ cdiv = (clk_get_rate(dev->clk) / (2 * TWI_CLOCK)) - 3;
cdiv = cdiv + 1; /* round up */
ckdiv = 0;
while (cdiv > 255) {
@@ -69,108 +91,178 @@ static void __devinit at91_twi_hwinit(void)
at91_twi_write(AT91_TWI_CWGR, (ckdiv << 16) | (cdiv << 8) | cdiv);
}
+
/*
- * Poll the i2c status register until the specified bit is set.
- * Returns 0 if timed out (100 msec).
+ * Initialize the TWI hardware registers.
*/
-static short at91_poll_status(unsigned long bit)
+static void __devinit at91_twi_hwinit(struct at91_i2c_dev *dev)
+{
+ at91_init_bus(dev);
+ at91_set_clock(dev);
+}
+
+
+static void at91_write_next_byte(struct at91_i2c_dev *dev)
+{
+ if (dev->buf_len > 0) {
+
+ const u8 c = *(dev->buf++);
+
+ at91_twi_write(AT91_TWI_THR, c);
+
+ /* send stop when last byte has been written */
+ if (--dev->buf_len == 0)
+ at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP);
+
+ dev_dbg(dev->dev, "wrote 0x%x, to go %d\n", c, dev->buf_len);
+ }
+}
+
+
+static void at91_read_next_byte(struct at91_i2c_dev *dev)
{
- int loop_cntr = 10000;
+ const u8 c = at91_twi_read(AT91_TWI_RHR) & 0xff;
- do {
- udelay(10);
- } while (!(at91_twi_read(AT91_TWI_SR) & bit) && (--loop_cntr > 0));
+ *(dev->buf)++ = c;
- return (loop_cntr > 0);
+ /* send stop if second but last byte has been read */
+ if (--dev->buf_len == 1)
+ at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP);
+
+ dev_dbg(dev->dev, "read 0x%x, to go %d\n", c, dev->buf_len);
}
-static int xfer_read(struct i2c_adapter *adap, unsigned char *buf, int length)
+
+static irqreturn_t atmel_twi_interrupt(int irq, void *dev_id)
{
- /* Send Start */
- at91_twi_write(AT91_TWI_CR, AT91_TWI_START);
+ struct at91_i2c_dev *dev = dev_id;
+ const unsigned status = at91_twi_read(AT91_TWI_SR);
+ const unsigned irqstatus = status & at91_twi_read(AT91_TWI_IMR);
- /* Read data */
- while (length--) {
- if (!length) /* need to send Stop before reading last byte */
- at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP);
- if (!at91_poll_status(AT91_TWI_RXRDY)) {
- dev_dbg(&adap->dev, "RXRDY timeout\n");
- return -ETIMEDOUT;
- }
- *buf++ = (at91_twi_read(AT91_TWI_RHR) & 0xff);
+ if (irqstatus & AT91_TWI_TXCOMP) {
+ at91_disable_interrupts(dev);
+ dev->transfer_status = status;
+
+ complete(&dev->cmd_complete);
}
- return 0;
+ else if (irqstatus & AT91_TWI_RXRDY)
+
+ at91_read_next_byte(dev);
+
+ else if (irqstatus & AT91_TWI_TXRDY)
+
+ at91_write_next_byte(dev);
+
+ else
+ return IRQ_NONE;
+
+ return IRQ_HANDLED;
}
-static int xfer_write(struct i2c_adapter *adap, unsigned char *buf, int length)
+
+int at91_do_transfer(struct at91_i2c_dev *dev, bool is_read)
{
- /* Load first byte into transmitter */
- at91_twi_write(AT91_TWI_THR, *buf++);
+ int ret = 0;
- /* Send Start */
- at91_twi_write(AT91_TWI_CR, AT91_TWI_START);
+ INIT_COMPLETION(dev->cmd_complete);
- do {
- if (!at91_poll_status(AT91_TWI_TXRDY)) {
- dev_dbg(&adap->dev, "TXRDY timeout\n");
- return -ETIMEDOUT;
- }
+ if (is_read) {
+ if (!dev->buf_len)
+ at91_twi_write(AT91_TWI_CR,
+ AT91_TWI_START | AT91_TWI_STOP);
+ else
+ at91_twi_write(AT91_TWI_CR, AT91_TWI_START);
+
+ at91_twi_write(AT91_TWI_IER, AT91_TWI_TXCOMP | AT91_TWI_RXRDY);
- length--; /* byte was transmitted */
+ } else {
- if (length > 0) /* more data to send? */
- at91_twi_write(AT91_TWI_THR, *buf++);
- } while (length);
+ at91_write_next_byte(dev);
- /* Send Stop */
- at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP);
+ at91_twi_write(AT91_TWI_IER, AT91_TWI_TXCOMP | AT91_TWI_TXRDY);
+ }
+
+ ret = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
+ dev->adapter.timeout);
+
+ if (ret == 0) {
+ dev_err(dev->dev, "controller timed out\n");
+ at91_init_bus(dev);
+ return -ETIMEDOUT;
+ }
+
+ if (dev->transfer_status & AT91_TWI_NACK) {
+ dev_dbg(dev->dev, "received nack\n");
+ return -ENODEV;
+ }
+
+ if (dev->transfer_status & AT91_TWI_OVRE) {
+ dev_err(dev->dev, "overrun while reading\n");
+ return -EIO;
+ }
+
+ dev_dbg(dev->dev, "transfer complete\n");
return 0;
}
-/*
- * Generic i2c master transfer entrypoint.
- *
- * Note: We do not use Atmel's feature of storing the "internal device address".
- * Instead the "internal device address" has to be written using a separate
- * i2c message.
- * http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2004-September/024411.html
- */
+
static int at91_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
{
- int i, ret;
+ struct at91_i2c_dev *dev = i2c_get_adapdata(adap);
+ int ret;
+ unsigned int_addr_flag = 0;
+ struct i2c_msg *m0 = pmsg;
+ struct i2c_msg *ma = m0;
dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num);
- for (i = 0; i < num; i++) {
- dev_dbg(&adap->dev, " #%d: %sing %d byte%s %s 0x%02x\n", i,
- pmsg->flags & I2C_M_RD ? "read" : "writ",
- pmsg->len, pmsg->len > 1 ? "s" : "",
- pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
-
- at91_twi_write(AT91_TWI_MMR, (pmsg->addr << 16)
- | ((pmsg->flags & I2C_M_RD) ? AT91_TWI_MREAD : 0));
-
- if (pmsg->len && pmsg->buf) { /* sanity check */
- if (pmsg->flags & I2C_M_RD)
- ret = xfer_read(adap, pmsg->buf, pmsg->len);
- else
- ret = xfer_write(adap, pmsg->buf, pmsg->len);
-
- if (ret)
- return ret;
-
- /* Wait until transfer is finished */
- if (!at91_poll_status(AT91_TWI_TXCOMP)) {
- dev_dbg(&adap->dev, "TXCOMP timeout\n");
- return -ETIMEDOUT;
- }
+ /* the hardware can handle at most two messages concatenated by a
+ repeated start via it's internal address feature */
+
+ if (num > 2) {
+ dev_err(dev->dev,
+ "cannot handle more than two concatenated messages.\n");
+ return 0;
+
+ } else if (num == 2) {
+
+ int internal_address = 0;
+ int i;
+
+ ma = &pmsg[1];
+
+ if (m0->flags & I2C_M_RD) {
+ dev_err(dev->dev, "first transfer must be write.\n");
+ return 0;
}
- dev_dbg(&adap->dev, "transfer complete\n");
- pmsg++; /* next message */
+
+ if (m0->len > 3) {
+ dev_err(dev->dev, "first message size must be <= 3.\n");
+ return 0;
+ }
+
+ for (i = 0; i < m0->len; ++i) {
+ internal_address |= ((unsigned)m0->buf[i]) << (8 * i);
+ int_addr_flag += AT91_TWI_IADRSZ_1;
+ }
+
+ at91_twi_write(AT91_TWI_IADR, internal_address);
}
- return i;
+
+ at91_twi_write(AT91_TWI_MMR, (ma->addr << 16) | int_addr_flag
+ | ((ma->flags & I2C_M_RD) ? AT91_TWI_MREAD : 0));
+
+ dev->buf_len = ma->len;
+ dev->buf = ma->buf;
+
+ ret = at91_do_transfer(dev, ma->flags & I2C_M_RD);
+
+ if (ret < 0)
+ return ret;
+
+ return num;
}
/*
@@ -191,86 +283,115 @@ static struct i2c_algorithm at91_algorithm = {
*/
static int __devinit at91_i2c_probe(struct platform_device *pdev)
{
- struct i2c_adapter *adapter;
- struct resource *res;
+ struct at91_i2c_dev *dev;
+ struct resource *mem, *irq, *ioarea;
int rc;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res)
- return -ENXIO;
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENODEV;
+
+ irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (!irq)
+ return -ENODEV;
- if (!request_mem_region(res->start, resource_size(res), "at91_i2c"))
+ ioarea = request_mem_region(mem->start, resource_size(mem), pdev->name);
+ if (!ioarea)
return -EBUSY;
- twi_base = ioremap(res->start, resource_size(res));
- if (!twi_base) {
+ dev = kzalloc(sizeof(struct at91_i2c_dev), GFP_KERNEL);
+ if (!dev) {
rc = -ENOMEM;
- goto fail0;
+ goto err_release_region;
}
- twi_clk = clk_get(NULL, "twi_clk");
- if (IS_ERR(twi_clk)) {
+ init_completion(&dev->cmd_complete);
+
+ dev->dev = get_device(&pdev->dev);
+ dev->irq = irq->start;
+ platform_set_drvdata(pdev, dev);
+
+ dev->clk = clk_get(&pdev->dev, "twi_clk");
+ if (IS_ERR(dev->clk)) {
dev_err(&pdev->dev, "no clock defined\n");
rc = -ENODEV;
- goto fail1;
+ goto err_free_mem;
}
+ clk_enable(dev->clk);
- adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
- if (adapter == NULL) {
- dev_err(&pdev->dev, "can't allocate inteface!\n");
- rc = -ENOMEM;
- goto fail2;
+ dev->base = ioremap(mem->start, resource_size(mem));
+ if (!dev->base) {
+ rc = -EBUSY;
+ goto err_mem_ioremap;
}
- snprintf(adapter->name, sizeof(adapter->name), "AT91");
- adapter->algo = &at91_algorithm;
- adapter->class = I2C_CLASS_HWMON;
- adapter->dev.parent = &pdev->dev;
- /* adapter->id == 0 ... only one TWI controller for now */
- platform_set_drvdata(pdev, adapter);
+ at91_twi_hwinit(dev);
+
+ rc = request_irq(dev->irq, atmel_twi_interrupt, 0,
+ dev_name(&pdev->dev), dev);
+ if (rc) {
+ dev_err(&pdev->dev, "Cannot get irq %d: %d\n", dev->irq, rc);
+ goto err_unuse_clocks;
+ }
- clk_enable(twi_clk); /* enable peripheral clock */
- at91_twi_hwinit(); /* initialize TWI controller */
+ snprintf(dev->adapter.name, sizeof(dev->adapter.name), "AT91");
+ i2c_set_adapdata(&dev->adapter, dev);
+ dev->adapter.owner = THIS_MODULE;
+ dev->adapter.class = I2C_CLASS_HWMON;
+ dev->adapter.algo = &at91_algorithm;
+ dev->adapter.dev.parent = &pdev->dev;
+ dev->adapter.nr = pdev->id;
+ dev->adapter.timeout = AT91_I2C_TIMEOUT;
- rc = i2c_add_numbered_adapter(adapter);
+ rc = i2c_add_numbered_adapter(&dev->adapter);
if (rc) {
dev_err(&pdev->dev, "Adapter %s registration failed\n",
- adapter->name);
- goto fail3;
+ dev->adapter.name);
+ goto err_free_irq;
}
dev_info(&pdev->dev, "AT91 i2c bus driver.\n");
return 0;
-fail3:
+err_free_irq:
+ free_irq(dev->irq, dev);
+err_unuse_clocks:
+ iounmap(dev->base);
+err_mem_ioremap:
+ clk_disable(dev->clk);
+ clk_put(dev->clk);
+ dev->clk = NULL;
+err_free_mem:
platform_set_drvdata(pdev, NULL);
- kfree(adapter);
- clk_disable(twi_clk);
-fail2:
- clk_put(twi_clk);
-fail1:
- iounmap(twi_base);
-fail0:
- release_mem_region(res->start, resource_size(res));
+ put_device(&pdev->dev);
+ kfree(dev);
+err_release_region:
+ release_mem_region(mem->start, resource_size(mem));
return rc;
}
static int __devexit at91_i2c_remove(struct platform_device *pdev)
{
- struct i2c_adapter *adapter = platform_get_drvdata(pdev);
- struct resource *res;
+ struct at91_i2c_dev *dev = platform_get_drvdata(pdev);
+ struct resource *mem;
int rc;
- rc = i2c_del_adapter(adapter);
platform_set_drvdata(pdev, NULL);
+ rc = i2c_del_adapter(&dev->adapter);
+ put_device(&pdev->dev);
+
+ clk_disable(dev->clk);
+ clk_put(dev->clk);
+ dev->clk = NULL;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- iounmap(twi_base);
- release_mem_region(res->start, resource_size(res));
+ free_irq(dev->irq, dev);
- clk_disable(twi_clk); /* disable peripheral clock */
- clk_put(twi_clk);
+ iounmap(dev->base);
+ kfree(dev);
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ release_mem_region(mem->start, resource_size(mem));
return rc;
}
@@ -279,33 +400,45 @@ static int __devexit at91_i2c_remove(struct platform_device *pdev)
/* NOTE: could save a few mA by keeping clock off outside of at91_xfer... */
-static int at91_i2c_suspend(struct platform_device *pdev, pm_message_t mesg)
+static int at91_i2c_suspend(struct device *dev)
{
- clk_disable(twi_clk);
+ struct platform_device *pdev = to_platform_device(dev);
+ struct at91_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
+
+ clk_disable(i2c_dev->clk);
+
return 0;
}
-static int at91_i2c_resume(struct platform_device *pdev)
+static int at91_i2c_resume(struct device *dev)
{
- return clk_enable(twi_clk);
+ struct platform_device *pdev = to_platform_device(dev);
+ struct at91_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
+
+ return clk_enable(i2c_dev->clk);
}
+static const struct dev_pm_ops at91_i2c_pm = {
+ .suspend = at91_i2c_suspend,
+ .resume = at91_i2c_resume,
+};
+
+#define at91_i2c_pm_ops (&at91_i2c_pm)
#else
-#define at91_i2c_suspend NULL
-#define at91_i2c_resume NULL
+#define at91_i2c_pm_ops NULL
#endif
+
/* work with "modprobe at91_i2c" from hotplugging or coldplugging */
MODULE_ALIAS("platform:at91_i2c");
static struct platform_driver at91_i2c_driver = {
.probe = at91_i2c_probe,
.remove = __devexit_p(at91_i2c_remove),
- .suspend = at91_i2c_suspend,
- .resume = at91_i2c_resume,
.driver = {
.name = "at91_i2c",
.owner = THIS_MODULE,
+ .pm = at91_i2c_pm_ops,
},
};
@@ -322,6 +455,6 @@ static void __exit at91_i2c_exit(void)
module_init(at91_i2c_init);
module_exit(at91_i2c_exit);
-MODULE_AUTHOR("Rick Bronson");
+MODULE_AUTHOR("Nikolaus Voss");
MODULE_DESCRIPTION("I2C (TWI) driver for Atmel AT91");
MODULE_LICENSE("GPL");
--
1.7.4.1
^ permalink raw reply related
* [PATCH v2 2/3] arm/dt: tegra: add dts file for paz00
From: Stephen Warren @ 2011-10-31 16:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4025601.AfFCiixCcK@ax5200p>
Marc Dietrich wrote at Sunday, October 30, 2011 2:40 PM:
> On Friday 28 October 2011 09:49:49 Stephen Warren wrote:
> > Marc Dietrich wrote at Friday, October 28, 2011 4:30 AM:
> > > Am Donnerstag, 27. Oktober 2011, 09:50:03 schrieb Stephen Warren:
> > > > Marc Dietrich wrote at Wednesday, October 26, 2011 1:59 PM:
> > > > > This adds a dts file for paz00. As a side effect, this also
> > > > > enables
> > > > > the embedded controller which controls the keyboard, touchpad,
> > > > > power,
> > > > > leds, and some other functions.
> > > >
> > > > ...
> > > >
> > > > > +++ b/arch/arm/boot/dts/tegra-paz00.dts
> > > > > @@ -0,0 +1,70 @@
> > > > > +/dts-v1/;
> > > > > +
> > > > > +/memreserve/ 0x1c000000 0x04000000;
> > > > > +/include/ "tegra20.dtsi"
> > > > > +
> > > > > +/ {
> > > > > + model = "Toshiba AC100 / Dynabook AZ";
> > > > > + compatible = "compal,paz00", "nvidia,tegra20";
> > > > > +
> > > > > + chosen {
> > > > > + bootargs = "mem=448 at 0 console=ttyS0,115200n8
> > > > > root=/dev/mmcblk1p1";
> > > >
> > > > You shouldn't need the mem= parameter here; it wasn't in your first
> > > > patch set.
> > > that's because I forgot it. Sorry, I didn't mentioned it in the
> > > changelog. I wonder why mem= is still needed.
> >
> > I wonder if this is some conflict between ATAGs and the DT-specified
> > memory node.
> >
> > As far as I can tell, the kernel's memory information typically comes
> > from ATAGs. Some boards override what's in the ATAGs in their machine
> > descriptor's fixup routine, e.g. see tegra_paz00_fixup(). Presumably,
> > this is because of buggy bootloaders sending incorrect memory information
> > in the ATAGs. Do you have any way to check the ATAGs that the bootloader
> > is sending? Probably, you could enable DEBUG_LL and using the low-level
> > debugging functions to dump some of that information to the UART early
> > during boot.
>
> I got the ATAGS from /proc/atags and there is no memory entry there, only
> initrd and cmdline (which is the one from nvflash).
>
> The machine also has a fixup routine, but it also boots without (I'm sure it
> was necessary in the past),
...
> I tested several variations. Without DT, the fixup can compensate a missing
> mem entry in the kernel command line, but with a mem= from the kernel command
> line, a fixup is not needed.
OK, that makes sense.
> With DT, the command line specified from nvflash is ignored and the one from
> DT comes into the game.
I assume you're using CONFIG_ARM_APPENDED_DTB but not CONFIG_ARM_ATAG_DTB_COMPAT.
> If it is also missing there, system detects 512 MB.
That makes sense; that's the value in the .dts file you posted.
> (which is physical right, but we cannot reserve memory for the gpu). The fixup
> is indeed ignored in this case.
It's not "ignored" as such.
When booting without DT, the machine descriptor in board-paz00.c is used,
since the descriptor is selected based on the machine ID in the descriptor,
and that descriptor includes:
.fixup = tegra_paz00_fixup,
... which causes that fixup function to be called.
When booting with DT, the machine descriptor in board-dt.c is used, since
the descriptor is selected based on the DT's overall compatible property,
and that descriptor doesn't refer to tegra_paz00_fixup() at all, so it's
not called.
> > b) Modify arch/arm/kernel/setup.c:parse_tag_mem32() to do nothing;
> > comment out the call to arm_add_memory()
>
> I leave this out because the bootloader does not send memory info in the
> ATAGS.
>
> > c) Test booting, and check what RAM size the kernel thinks you have.
>
> see above. RAM detection works, but it's not what we want ...
At this point, I'd argue that exposing the full 512M to the kernel /is/
what we want. There is no Tegra GPU support in the mainline kernel at
present. As such, I'd argue that we should give the entire RAM space to
the kernel to use. As and when we add GPU support to the kernel, we can
use an appropriate mechanism to take RAM away from the kernel for that
purpose.
So, I'm planning to remove all the /memreserve/ entries from the Tegra
.dts files as soon as I can find a minute to do so.
But, as Grant mentioned, the /memreserve/ .dts directive should work
right now to reserve memory. I'm not sure if you'd tried that and it didn't
work? If so, it'd be good to debug that just to make sure the mechanism
works, even if we don't intend to use it.
--
nvpublic
^ permalink raw reply
* [PATCH v2 3/3] Add picosam9g45 board to Makefile
From: Nicu Pavel @ 2011-10-31 15:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1320076396-6233-1-git-send-email-npavel@mini-box.com>
Signed-off-by: Nicu Pavel <npavel@mini-box.com>
---
arch/arm/mach-at91/Makefile | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index bf57e8b..ad1950d 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -72,6 +72,7 @@ obj-$(CONFIG_MACH_GSIA18S) += board-gsia18s.o board-stamp9g20.o
obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
# AT91SAM9G45 board-specific support
+obj-$(CONFIG_MACH_MINIBOXPICOSAM9G45) += board-picosam9g45.o
obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
# AT91CAP9 board-specific support
--
1.7.1
^ permalink raw reply related
* [PATCH v2 2/3] Add kernel configuration option for picosam9g45 board
From: Nicu Pavel @ 2011-10-31 15:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1320076396-6233-1-git-send-email-npavel@mini-box.com>
Signed-off-by: Nicu Pavel <npavel@mini-box.com>
---
arch/arm/mach-at91/Kconfig | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 2248467..419295a 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -400,6 +400,12 @@ if ARCH_AT91SAM9G45
comment "AT91SAM9G45 Board Type"
+config MACH_MINIBOXPICOSAM9G45
+ bool "Mini-Box.com picoSAM9G45 board"
+ help
+ Select this if you are using Mini-Box.com picoSAM9G45 Board
+ <http://arm.mini-box.com>
+
config MACH_AT91SAM9M10G45EK
bool "Atmel AT91SAM9M10G45-EK Evaluation Kits"
help
--
1.7.1
^ permalink raw reply related
* [PATCH v2 1/3] Add support for mini-box.com picoSAM9G45 board
From: Nicu Pavel @ 2011-10-31 15:53 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds support for picoSAM9G45 board from mini-box.com. This board is
based on Atmel G45 SOC. More details can be found at http://arm.mini-box.com
Signed-off-by: Nicu Pavel <npavel@mini-box.com>
---
arch/arm/mach-at91/board-picosam9g45.c | 436 ++++++++++++++++++++++++++++++++
1 files changed, 436 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-at91/board-picosam9g45.c
diff --git a/arch/arm/mach-at91/board-picosam9g45.c b/arch/arm/mach-at91/board-picosam9g45.c
new file mode 100644
index 0000000..bd746a1
--- /dev/null
+++ b/arch/arm/mach-at91/board-picosam9g45.c
@@ -0,0 +1,436 @@
+/*
+ * Board-specific setup code for the picoSAM9G45 board
+ *
+ * http://www.mini-box.com/pico-SAM9G45-X
+ *
+ * Copyright (C) 2011 Nicu Pavel <npavel@mini-box.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/fb.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/leds.h>
+#include <linux/clk.h>
+#include <linux/atmel-mci.h>
+
+#include <mach/hardware.h>
+#include <video/atmel_lcdc.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/gpio.h>
+
+#include <mach/board.h>
+#include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
+#include <mach/system_rev.h>
+
+#include "sam9_smc.h"
+#include "generic.h"
+
+
+static void __init picosam9g45_init_early(void)
+{
+ /* Initialize processor: 12.000 MHz crystal */
+ at91_initialize(12000000);
+
+ /* DGBU on ttyS0. (Rx & Tx only) */
+ at91_register_uart(0, 0, 0);
+
+ /* USART1 on ttyS1. (Rx, Tx, RTS, CTS) */
+ at91_register_uart(AT91SAM9G45_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
+ /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
+ at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+ /* set serial console to ttyS0 (ie, DBGU) */
+ at91_set_serial_console(0);
+}
+
+/*
+ * USB HS Host port (common to OHCI & EHCI)
+ */
+static struct at91_usbh_data __initdata picosam9g45_usbh_hs_data = {
+ .ports = 2,
+ .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3},
+};
+
+
+/*
+ * USB HS Device port
+ */
+static struct usba_platform_data __initdata picosam9g45_usba_udc_data = {
+ .vbus_pin = AT91_PIN_PB19,
+};
+
+
+/*
+ * SPI devices.
+ */
+static struct spi_board_info picosam9g45_spi_devices[] = {
+ [0] = {/* SPI0 CS0 on right side connector J7*/
+ .modalias= "spidev",
+ .max_speed_hz= 15 * 1000 * 1000,
+ .bus_num= 0,
+ .chip_select= 0,
+ },
+ [1] = {/* SPI1 CS0 on left side connector J9*/
+ .modalias= "spidev",
+ .max_speed_hz= 15 * 1000 * 1000,
+ .bus_num= 1,
+ .chip_select= 0,
+ },
+};
+
+
+/*
+ * MCI (SD/MMC)
+ */
+static struct mci_platform_data __initdata mci0_data = {
+ .slot[0] = {
+ .bus_width = 4,
+ .detect_pin = AT91_PIN_PD10,
+ },
+};
+
+static struct mci_platform_data __initdata mci1_data = {
+ .slot[0] = {
+ .bus_width = 4,
+ .detect_pin = AT91_PIN_PD11,
+ .wp_pin = AT91_PIN_PD29,
+ },
+};
+
+
+/*
+ * MACB Ethernet device
+ */
+static struct at91_eth_data __initdata picosam9g45_macb_data = {
+ .phy_irq_pin = AT91_PIN_PD5,
+ .is_rmii = 1,
+};
+
+
+/*
+ * NAND flash
+ */
+static struct mtd_partition __initdata picosam9g45_nand_partition[] = {
+ {
+ .name = "Bootstrap",
+ .offset = 0,
+ .size = SZ_4M
+ },
+ {
+ .name= "RootFS",
+ .offset= MTDPART_OFS_NXTBLK,
+ .size= 60 * SZ_1M,
+ },
+ {
+ .name= "Space",
+ .offset= MTDPART_OFS_NXTBLK,
+ .size= MTDPART_SIZ_FULL,
+ },
+};
+
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+ *num_partitions = ARRAY_SIZE(picosam9g45_nand_partition);
+ return picosam9g45_nand_partition;
+}
+
+/* det_pin is not connected */
+static struct atmel_nand_data __initdata picosam9g45_nand_data = {
+ .ale = 21,
+ .cle = 22,
+ .rdy_pin = AT91_PIN_PC8,
+ .enable_pin = AT91_PIN_PC14,
+ .partition_info = nand_partitions,
+};
+
+static struct sam9_smc_config __initdata picosam9g45_nand_smc_config = {
+ .ncs_read_setup = 0,
+ .nrd_setup = 2,
+ .ncs_write_setup = 0,
+ .nwe_setup = 2,
+
+ .ncs_read_pulse = 4,
+ .nrd_pulse = 4,
+ .ncs_write_pulse = 4,
+ .nwe_pulse = 4,
+
+ .read_cycle = 7,
+ .write_cycle = 7,
+
+ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+ .tdf_cycles = 3,
+};
+
+static void __init picosam9g45_add_device_nand(void)
+{
+ picosam9g45_nand_data.bus_width_16 = board_have_nand_16bit();
+ /* setup bus-width (8 or 16) */
+ if (picosam9g45_nand_data.bus_width_16)
+ picosam9g45_nand_smc_config.mode |= AT91_SMC_DBW_16;
+ else
+ picosam9g45_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+ /* configure chip-select 3 (NAND) */
+ sam9_smc_configure(3, &picosam9g45_nand_smc_config);
+
+ at91_add_device_nand(&picosam9g45_nand_data);
+}
+
+
+/*
+ * LCD Controller
+ */
+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
+static struct fb_videomode at91_tft_vga_modes[] = {
+ {
+ .name = "HannStar",
+ .refresh = 60,
+ .xres = 480, .yres = 272,
+ .pixclock = KHZ2PICOS(9000),
+
+ .left_margin = 2, .right_margin = 2,
+ .upper_margin = 2, .lower_margin = 2,
+ .hsync_len = 41, .vsync_len = 10,
+
+ .sync = 0,
+ .vmode = FB_VMODE_NONINTERLACED,
+ },
+};
+
+static struct fb_monspecs at91fb_default_monspecs = {
+ .manufacturer = "HNS",
+ .monitor = "HSD043I9W1",
+
+ .modedb = at91_tft_vga_modes,
+ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
+ .hfmin = 15000,
+ .hfmax = 17640,
+ .vfmin = 57,
+ .vfmax = 67,
+};
+
+#define AT91SAM9G45_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
+ | ATMEL_LCDC_DISTYPE_TFT \
+ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
+
+/* Driver datas */
+static struct atmel_lcdfb_info __initdata picosam9g45_lcdc_data = {
+ .lcdcon_is_backlight = true,
+ .default_bpp = 16,
+ .default_dmacon = ATMEL_LCDC_DMAEN,
+ .default_lcdcon2 = AT91SAM9G45_DEFAULT_LCDCON2,
+ .default_monspecs = &at91fb_default_monspecs,
+ .guard_time = 9,
+ .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
+};
+
+#else
+static struct atmel_lcdfb_info __initdata picosam9g45_lcdc_data;
+#endif
+
+
+/*
+ * Touchscreen
+ */
+static struct at91_tsadcc_data picosam9g45_tsadcc_data = {
+ .adc_clock = 300000,
+ .pendet_debounce = 0x0d,
+ .ts_sample_hold_time = 0x0a,
+};
+
+
+/*
+ * GPIO Buttons
+ */
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+static struct gpio_keys_button picosam9g45_buttons[] = {
+ { /* J9 pin 5 gnd + pin 11 */
+ .code = KEY_BACK,
+ .gpio = AT91_PIN_PB6,
+ .active_low = 1,
+ .desc = "Back",
+ .wakeup = 1,
+ },
+ { /* J9 pin 5 gnd + pin 13*/
+ .code = KEY_MENU,
+ .gpio = AT91_PIN_PB7,
+ .active_low = 1,
+ .desc = "Menu",
+ .wakeup = 1,
+ },
+ { /* J9 pin 5 gnd + pin 12 */
+ .code = KEY_HOME,
+ .gpio = AT91_PIN_PB16,
+ .active_low = 1,
+ .desc = "Home",
+ },
+
+};
+
+static struct gpio_keys_platform_data picosam9g45_button_data = {
+ .buttons = picosam9g45_buttons,
+ .nbuttons = ARRAY_SIZE(picosam9g45_buttons),
+};
+
+static struct platform_device picosam9g45_button_device = {
+ .name = "gpio-keys",
+ .id = -1,
+ .num_resources = 0,
+ .dev = {
+ .platform_data = &picosam9g45_button_data,
+ }
+};
+
+static void __init picosam9g45_add_device_buttons(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(picosam9g45_buttons); i++) {
+ at91_set_GPIO_periph(picosam9g45_buttons[i].gpio, 1);
+ at91_set_deglitch(picosam9g45_buttons[i].gpio, 1);
+ }
+
+ platform_device_register(&picosam9g45_button_device);
+}
+#else
+static void __init picosam9g45_add_device_buttons(void) {}
+#endif
+
+
+/*
+ * LEDs ... these could all be PWM-driven, for variable brightness
+ */
+static struct gpio_led picosam9g45_leds[] = {
+ { /* "pwr" led */
+ .name = "pwr",
+ .gpio = AT91_PIN_PD30,
+ .default_trigger = "heartbeat",
+ },
+ { /* "u1" led */
+ .name = "u1",
+ .gpio = AT91_PIN_PD0,
+ .active_low = 1,
+ .default_trigger = "mmc0",
+ },
+#if !(defined(CONFIG_LEDS_ATMEL_PWM) || defined(CONFIG_LEDS_ATMEL_PWM_MODULE))
+ { /* "u2" led */
+ .name = "u2",
+ .gpio = AT91_PIN_PD31,
+ .active_low = 1,
+ .default_trigger = "none",
+ },
+#endif
+};
+
+
+/*
+ * PWM Leds
+ */
+static struct gpio_led picosam9g45_pwm_led[] = {
+#if defined(CONFIG_LEDS_ATMEL_PWM) || defined(CONFIG_LEDS_ATMEL_PWM_MODULE)
+ { /* "right" led, green, userled1, pwm1 */
+ .name = "d7",
+ .gpio = 1, /* is PWM channel number */
+ .active_low = 1,
+ .default_trigger = "none",
+ },
+ { /* picopc buzzer */
+ .name= "buzzer",
+ .gpio= 2, /* is PWM channel number */
+ .active_low= 1,
+ .default_trigger= "none",
+ },
+#endif
+};
+
+
+/*
+ * PWM buzzer
+ */
+static void picosam9g45_setup_device_buzzer(void)
+{
+ at91_set_A_periph(AT91_PIN_PE31, 1);
+}
+
+/*
+ * Capacitive touchscreen
+ */
+#define PICOSAM9G45_CAPTS_IRQ AT91_PIN_PA27
+static struct i2c_board_info __initdata picosam9g45_i2c1_devices[] = {
+ {
+ I2C_BOARD_INFO("ms-msg20xx", 0x60),
+ .irq = PICOSAM9G45_CAPTS_IRQ,
+ },
+};
+
+static void picosam9g45_setup_device_capts(void)
+{
+ at91_set_gpio_input(PICOSAM9G45_CAPTS_IRQ, 0);
+ at91_set_deglitch(PICOSAM9G45_CAPTS_IRQ, 1);
+}
+
+
+static void __init picosam9g45_board_init(void)
+{
+ /* Buzzer PWM pin */
+ picosam9g45_setup_device_buzzer();
+ /* Capacitive Touch Screen IRQ */
+ picosam9g45_setup_device_capts();
+ /* Serial */
+ at91_add_device_serial();
+ /* USB HS Host */
+ at91_add_device_usbh_ohci(&picosam9g45_usbh_hs_data);
+ at91_add_device_usbh_ehci(&picosam9g45_usbh_hs_data);
+ /* USB HS Device */
+ at91_add_device_usba(&picosam9g45_usba_udc_data);
+ /* SPI */
+ at91_add_device_spi(picosam9g45_spi_devices, ARRAY_SIZE(picosam9g45_spi_devices));
+ /* MMC */
+ at91_add_device_mci(0, &mci0_data);
+ at91_add_device_mci(1, &mci1_data);
+ /* Ethernet */
+ at91_add_device_eth(&picosam9g45_macb_data);
+ /* NAND */
+ picosam9g45_add_device_nand();
+ /* I2C */
+ at91_add_device_i2c(0, NULL, 0);
+ at91_add_device_i2c(1, picosam9g45_i2c1_devices, ARRAY_SIZE(picosam9g45_i2c1_devices));
+ /* LCD Controller */
+ at91_add_device_lcdc(&picosam9g45_lcdc_data);
+ /* Resistive Touch Screen */
+ at91_add_device_tsadcc(&picosam9g45_tsadcc_data);
+ /* Push Buttons */
+ picosam9g45_add_device_buttons();
+ /* LEDs */
+ at91_gpio_leds(picosam9g45_leds, ARRAY_SIZE(picosam9g45_leds));
+ at91_pwm_leds(picosam9g45_pwm_led, ARRAY_SIZE(picosam9g45_pwm_led));
+}
+
+MACHINE_START(MINIBOXPICOSAM9G45, "Mini Box picoSAM9 G45 Board")
+ /* Maintainer: Nicu Pavel */
+ .timer = &at91sam926x_timer,
+ .map_io = at91_map_io,
+ .init_early = picosam9g45_init_early,
+ .init_irq = at91_init_irq_default,
+ .init_machine = picosam9g45_board_init,
+MACHINE_END
--
1.7.1
^ permalink raw reply related
* [PATCH v2 2/3] arm/dt: tegra: add dts file for paz00
From: Stephen Warren @ 2011-10-31 15:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111029084330.GW19187@n2100.arm.linux.org.uk>
Russell King wrote at Saturday, October 29, 2011 2:44 AM:
> On Fri, Oct 28, 2011 at 09:49:49AM -0700, Stephen Warren wrote:
> > When boards boot from DT, there is no fixup function to override the
> > bootloader's ATAGs. I also see a bunch of code to set up the memory
> > information from DT e.g. setup_machine_fdt()'s call to:
> >
> > of_scan_flat_dt(early_init_dt_scan_memory, NULL);
> >
> > ... but I assume that happens before the ATAGs are processed, and the
> > buggy ATAGs end up overriding the information in the DT file.
>
> As far as the uncompressed kernel is concerned, there is either ATAG
> or DT information, never both. If the boot loader provides ATAGs and
> the zImage has a DT appended to it, the zImage decompressor merges the
> ATAGs into the appended DT and passes the DT to the kernel.
>
> So anyone who currently 'fixes' their broken boot loader via the fixup
> function by directly manipulating the ATAGS is going to hit the DT
> image instead.
I believe the PAZ00 fixup function runs on the kernel's internal data-
structures, not the ATAGs directly, so the issue you point out isn't
a problem here:
static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline,
struct meminfo *mi)
{
mi->nr_banks = 1;
mi->bank[0].start = PHYS_OFFSET;
mi->bank[0].size = 448 * SZ_1M;
}
--
nvpublic
^ permalink raw reply
* [PATCH] ARM: mark empty gpio.h files empty
From: Linus Walleij @ 2011-10-31 15:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111029110613.GE20132@ponder.secretlab.ca>
On Sat, Oct 29, 2011 at 1:06 PM, Grant Likely <grant.likely@secretlab.ca> wrote:
> On Fri, Oct 28, 2011 at 10:19:02PM +0200, Linus Walleij wrote:
>> It is generally a better idea to make intentionally empty files
>> contain the human-readable /* empty */ comment, also it makes
>> the files play nice with "make distclean".
>>
>> Reported-by: Jeff Garzik <jeff@garzik.org>
>> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
>
> Applied, thanks.
Hm I put that into Russell's patch tracker since it was mainly
touching arch/arm/*
and I think he applied it too.
Well whatever, git will cope.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH 1/3] Add support for mini-box.com picoSAM9G45 board
From: Russell King - ARM Linux @ 2011-10-31 15:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1320073010-19549-1-git-send-email-npavel@mini-box.com>
On Mon, Oct 31, 2011 at 04:56:48PM +0200, Nicu Pavel wrote:
> +#include <mach/hardware.h>
> +#include <video/atmel_lcdc.h>
> +
> +#include <asm/setup.h>
> +#include <asm/mach-types.h>
> +#include <asm/irq.h>
> +
> +#include <asm/mach/arch.h>
> +#include <asm/mach/map.h>
> +#include <asm/mach/irq.h>
> +
> +#include <mach/board.h>
> +#include <mach/gpio.h>
Noooooooo. asm/gpio.h please.
^ permalink raw reply
* [PATCH 3/3] Add picosam9g45 board to Makefile
From: Nicu Pavel @ 2011-10-31 15:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1320074614-19889-1-git-send-email-npavel@mini-box.com>
Signed-off-by: Nicu Pavel <npavel@mini-box.com>
---
arch/arm/mach-at91/Makefile | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index bf57e8b..ad1950d 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -72,6 +72,7 @@ obj-$(CONFIG_MACH_GSIA18S) += board-gsia18s.o board-stamp9g20.o
obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
# AT91SAM9G45 board-specific support
+obj-$(CONFIG_MACH_MINIBOXPICOSAM9G45) += board-picosam9g45.o
obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
# AT91CAP9 board-specific support
--
1.7.1
^ permalink raw reply related
* [PATCH 2/3] Add kernel configuration option for picosam9g45 board
From: Nicu Pavel @ 2011-10-31 15:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1320074614-19889-1-git-send-email-npavel@mini-box.com>
Signed-off-by: Nicu Pavel <npavel@mini-box.com>
---
arch/arm/mach-at91/Kconfig | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 2248467..419295a 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -400,6 +400,12 @@ if ARCH_AT91SAM9G45
comment "AT91SAM9G45 Board Type"
+config MACH_MINIBOXPICOSAM9G45
+ bool "Mini-Box.com picoSAM9G45 board"
+ help
+ Select this if you are using Mini-Box.com picoSAM9G45 Board
+ <http://arm.mini-box.com>
+
config MACH_AT91SAM9M10G45EK
bool "Atmel AT91SAM9M10G45-EK Evaluation Kits"
help
--
1.7.1
^ permalink raw reply related
* [PATCH 1/3] Add support for mini-box.com picoSAM9G45 board
From: Nicu Pavel @ 2011-10-31 15:23 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds support for picoSAM9G45 board from mini-box.com. This board is
based on Atmel G45 SOC. More details can be found at http://arm.mini-box.com
Signed-off-by: Nicu Pavel <npavel@mini-box.com>
---
arch/arm/mach-at91/board-picosam9g45.c | 436 ++++++++++++++++++++++++++++++++
1 files changed, 436 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-at91/board-picosam9g45.c
diff --git a/arch/arm/mach-at91/board-picosam9g45.c b/arch/arm/mach-at91/board-picosam9g45.c
new file mode 100644
index 0000000..84d9dff
--- /dev/null
+++ b/arch/arm/mach-at91/board-picosam9g45.c
@@ -0,0 +1,436 @@
+/*
+ * Board-specific setup code for the picoSAM9G45 board
+ *
+ * http://www.mini-box.com/pico-SAM9G45-X
+ *
+ * Copyright (C) 2011 Nicu Pavel <npavel@mini-box.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/fb.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/leds.h>
+#include <linux/clk.h>
+#include <linux/atmel-mci.h>
+
+#include <mach/hardware.h>
+#include <video/atmel_lcdc.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
+#include <mach/system_rev.h>
+
+#include "sam9_smc.h"
+#include "generic.h"
+
+
+static void __init picosam9g45_init_early(void)
+{
+ /* Initialize processor: 12.000 MHz crystal */
+ at91_initialize(12000000);
+
+ /* DGBU on ttyS0. (Rx & Tx only) */
+ at91_register_uart(0, 0, 0);
+
+ /* USART1 on ttyS1. (Rx, Tx, RTS, CTS) */
+ at91_register_uart(AT91SAM9G45_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
+ /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
+ at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+ /* set serial console to ttyS0 (ie, DBGU) */
+ at91_set_serial_console(0);
+}
+
+/*
+ * USB HS Host port (common to OHCI & EHCI)
+ */
+static struct at91_usbh_data __initdata picosam9g45_usbh_hs_data = {
+ .ports = 2,
+ .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3},
+};
+
+
+/*
+ * USB HS Device port
+ */
+static struct usba_platform_data __initdata picosam9g45_usba_udc_data = {
+ .vbus_pin = AT91_PIN_PB19,
+};
+
+
+/*
+ * SPI devices.
+ */
+static struct spi_board_info picosam9g45_spi_devices[] = {
+ [0] = {/* SPI0 CS0 on right side connector J7*/
+ .modalias= "spidev",
+ .max_speed_hz= 15 * 1000 * 1000,
+ .bus_num= 0,
+ .chip_select= 0,
+ },
+ [1] = {/* SPI1 CS0 on left side connector J9*/
+ .modalias= "spidev",
+ .max_speed_hz= 15 * 1000 * 1000,
+ .bus_num= 1,
+ .chip_select= 0,
+ },
+};
+
+
+/*
+ * MCI (SD/MMC)
+ */
+static struct mci_platform_data __initdata mci0_data = {
+ .slot[0] = {
+ .bus_width = 4,
+ .detect_pin = AT91_PIN_PD10,
+ },
+};
+
+static struct mci_platform_data __initdata mci1_data = {
+ .slot[0] = {
+ .bus_width = 4,
+ .detect_pin = AT91_PIN_PD11,
+ .wp_pin = AT91_PIN_PD29,
+ },
+};
+
+
+/*
+ * MACB Ethernet device
+ */
+static struct at91_eth_data __initdata picosam9g45_macb_data = {
+ .phy_irq_pin = AT91_PIN_PD5,
+ .is_rmii = 1,
+};
+
+
+/*
+ * NAND flash
+ */
+static struct mtd_partition __initdata picosam9g45_nand_partition[] = {
+ {
+ .name = "Bootstrap",
+ .offset = 0,
+ .size = SZ_4M
+ },
+ {
+ .name= "RootFS",
+ .offset= MTDPART_OFS_NXTBLK,
+ .size= 60 * SZ_1M,
+ },
+ {
+ .name= "Space",
+ .offset= MTDPART_OFS_NXTBLK,
+ .size= MTDPART_SIZ_FULL,
+ },
+};
+
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+ *num_partitions = ARRAY_SIZE(picosam9g45_nand_partition);
+ return picosam9g45_nand_partition;
+}
+
+/* det_pin is not connected */
+static struct atmel_nand_data __initdata picosam9g45_nand_data = {
+ .ale = 21,
+ .cle = 22,
+ .rdy_pin = AT91_PIN_PC8,
+ .enable_pin = AT91_PIN_PC14,
+ .partition_info = nand_partitions,
+};
+
+static struct sam9_smc_config __initdata picosam9g45_nand_smc_config = {
+ .ncs_read_setup = 0,
+ .nrd_setup = 2,
+ .ncs_write_setup = 0,
+ .nwe_setup = 2,
+
+ .ncs_read_pulse = 4,
+ .nrd_pulse = 4,
+ .ncs_write_pulse = 4,
+ .nwe_pulse = 4,
+
+ .read_cycle = 7,
+ .write_cycle = 7,
+
+ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+ .tdf_cycles = 3,
+};
+
+static void __init picosam9g45_add_device_nand(void)
+{
+ picosam9g45_nand_data.bus_width_16 = board_have_nand_16bit();
+ /* setup bus-width (8 or 16) */
+ if (picosam9g45_nand_data.bus_width_16)
+ picosam9g45_nand_smc_config.mode |= AT91_SMC_DBW_16;
+ else
+ picosam9g45_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+ /* configure chip-select 3 (NAND) */
+ sam9_smc_configure(3, &picosam9g45_nand_smc_config);
+
+ at91_add_device_nand(&picosam9g45_nand_data);
+}
+
+
+/*
+ * LCD Controller
+ */
+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
+static struct fb_videomode at91_tft_vga_modes[] = {
+ {
+ .name = "HannStar",
+ .refresh = 60,
+ .xres = 480, .yres = 272,
+ .pixclock = KHZ2PICOS(9000),
+
+ .left_margin = 2, .right_margin = 2,
+ .upper_margin = 2, .lower_margin = 2,
+ .hsync_len = 41, .vsync_len = 10,
+
+ .sync = 0,
+ .vmode = FB_VMODE_NONINTERLACED,
+ },
+};
+
+static struct fb_monspecs at91fb_default_monspecs = {
+ .manufacturer = "HNS",
+ .monitor = "HSD043I9W1",
+
+ .modedb = at91_tft_vga_modes,
+ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
+ .hfmin = 15000,
+ .hfmax = 17640,
+ .vfmin = 57,
+ .vfmax = 67,
+};
+
+#define AT91SAM9G45_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
+ | ATMEL_LCDC_DISTYPE_TFT \
+ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
+
+/* Driver datas */
+static struct atmel_lcdfb_info __initdata picosam9g45_lcdc_data = {
+ .lcdcon_is_backlight = true,
+ .default_bpp = 16,
+ .default_dmacon = ATMEL_LCDC_DMAEN,
+ .default_lcdcon2 = AT91SAM9G45_DEFAULT_LCDCON2,
+ .default_monspecs = &at91fb_default_monspecs,
+ .guard_time = 9,
+ .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
+};
+
+#else
+static struct atmel_lcdfb_info __initdata picosam9g45_lcdc_data;
+#endif
+
+
+/*
+ * Touchscreen
+ */
+static struct at91_tsadcc_data picosam9g45_tsadcc_data = {
+ .adc_clock = 300000,
+ .pendet_debounce = 0x0d,
+ .ts_sample_hold_time = 0x0a,
+};
+
+
+/*
+ * GPIO Buttons
+ */
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+static struct gpio_keys_button picosam9g45_buttons[] = {
+ { /* J9 pin 5 gnd + pin 11 */
+ .code = KEY_BACK,
+ .gpio = AT91_PIN_PB6,
+ .active_low = 1,
+ .desc = "Back",
+ .wakeup = 1,
+ },
+ { /* J9 pin 5 gnd + pin 13*/
+ .code = KEY_MENU,
+ .gpio = AT91_PIN_PB7,
+ .active_low = 1,
+ .desc = "Menu",
+ .wakeup = 1,
+ },
+ { /* J9 pin 5 gnd + pin 12 */
+ .code = KEY_HOME,
+ .gpio = AT91_PIN_PB16,
+ .active_low = 1,
+ .desc = "Home",
+ },
+
+};
+
+static struct gpio_keys_platform_data picosam9g45_button_data = {
+ .buttons = picosam9g45_buttons,
+ .nbuttons = ARRAY_SIZE(picosam9g45_buttons),
+};
+
+static struct platform_device picosam9g45_button_device = {
+ .name = "gpio-keys",
+ .id = -1,
+ .num_resources = 0,
+ .dev = {
+ .platform_data = &picosam9g45_button_data,
+ }
+};
+
+static void __init picosam9g45_add_device_buttons(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(picosam9g45_buttons); i++) {
+ at91_set_GPIO_periph(picosam9g45_buttons[i].gpio, 1);
+ at91_set_deglitch(picosam9g45_buttons[i].gpio, 1);
+ }
+
+ platform_device_register(&picosam9g45_button_device);
+}
+#else
+static void __init picosam9g45_add_device_buttons(void) {}
+#endif
+
+
+/*
+ * LEDs ... these could all be PWM-driven, for variable brightness
+ */
+static struct gpio_led picosam9g45_leds[] = {
+ { /* "pwr" led */
+ .name = "pwr",
+ .gpio = AT91_PIN_PD30,
+ .default_trigger = "heartbeat",
+ },
+ { /* "u1" led */
+ .name = "u1",
+ .gpio = AT91_PIN_PD0,
+ .active_low = 1,
+ .default_trigger = "mmc0",
+ },
+#if !(defined(CONFIG_LEDS_ATMEL_PWM) || defined(CONFIG_LEDS_ATMEL_PWM_MODULE))
+ { /* "u2" led */
+ .name = "u2",
+ .gpio = AT91_PIN_PD31,
+ .active_low = 1,
+ .default_trigger = "none",
+ },
+#endif
+};
+
+
+/*
+ * PWM Leds
+ */
+static struct gpio_led picosam9g45_pwm_led[] = {
+#if defined(CONFIG_LEDS_ATMEL_PWM) || defined(CONFIG_LEDS_ATMEL_PWM_MODULE)
+ { /* "right" led, green, userled1, pwm1 */
+ .name = "d7",
+ .gpio = 1, /* is PWM channel number */
+ .active_low = 1,
+ .default_trigger = "none",
+ },
+ { /* picopc buzzer */
+ .name= "buzzer",
+ .gpio= 2, /* is PWM channel number */
+ .active_low= 1,
+ .default_trigger= "none",
+ },
+#endif
+};
+
+
+/*
+ * PWM buzzer
+ */
+static void picosam9g45_setup_device_buzzer(void)
+{
+ at91_set_A_periph(AT91_PIN_PE31, 1);
+}
+
+/*
+ * Capacitive touchscreen
+ */
+#define PICOSAM9G45_CAPTS_IRQ AT91_PIN_PA27
+static struct i2c_board_info __initdata picosam9g45_i2c1_devices[] = {
+ {
+ I2C_BOARD_INFO("ms-msg20xx", 0x60),
+ .irq = PICOSAM9G45_CAPTS_IRQ,
+ },
+};
+
+static void picosam9g45_setup_device_capts(void)
+{
+ at91_set_gpio_input(PICOSAM9G45_CAPTS_IRQ, 0);
+ at91_set_deglitch(PICOSAM9G45_CAPTS_IRQ, 1);
+}
+
+
+static void __init picosam9g45_board_init(void)
+{
+ /* Buzzer PWM pin */
+ picosam9g45_setup_device_buzzer();
+ /* Capacitive Touch Screen IRQ */
+ picosam9g45_setup_device_capts();
+ /* Serial */
+ at91_add_device_serial();
+ /* USB HS Host */
+ at91_add_device_usbh_ohci(&picosam9g45_usbh_hs_data);
+ at91_add_device_usbh_ehci(&picosam9g45_usbh_hs_data);
+ /* USB HS Device */
+ at91_add_device_usba(&picosam9g45_usba_udc_data);
+ /* SPI */
+ at91_add_device_spi(picosam9g45_spi_devices, ARRAY_SIZE(picosam9g45_spi_devices));
+ /* MMC */
+ at91_add_device_mci(0, &mci0_data);
+ at91_add_device_mci(1, &mci1_data);
+ /* Ethernet */
+ at91_add_device_eth(&picosam9g45_macb_data);
+ /* NAND */
+ picosam9g45_add_device_nand();
+ /* I2C */
+ at91_add_device_i2c(0, NULL, 0);
+ at91_add_device_i2c(1, picosam9g45_i2c1_devices, ARRAY_SIZE(picosam9g45_i2c1_devices));
+ /* LCD Controller */
+ at91_add_device_lcdc(&picosam9g45_lcdc_data);
+ /* Resistive Touch Screen */
+ at91_add_device_tsadcc(&picosam9g45_tsadcc_data);
+ /* Push Buttons */
+ picosam9g45_add_device_buttons();
+ /* LEDs */
+ at91_gpio_leds(picosam9g45_leds, ARRAY_SIZE(picosam9g45_leds));
+ at91_pwm_leds(picosam9g45_pwm_led, ARRAY_SIZE(picosam9g45_pwm_led));
+}
+
+MACHINE_START(MINIBOXPICOSAM9G45, "Mini Box picoSAM9 G45 Board")
+ /* Maintainer: Nicu Pavel */
+ .timer = &at91sam926x_timer,
+ .map_io = at91_map_io,
+ .init_early = picosam9g45_init_early,
+ .init_irq = at91_init_irq_default,
+ .init_machine = picosam9g45_board_init,
+MACHINE_END
--
1.7.1
^ permalink raw reply related
* [PATCH 01/51] ARM: reset: introduce arm_arch_reset function pointer
From: Russell King - ARM Linux @ 2011-10-31 14:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAH+eYFD_XPgbvp828q7508TOPNdP4TK7wiej2aBhPb18WbQ+Eg@mail.gmail.com>
On Mon, Oct 31, 2011 at 08:14:14PM +0530, Rabin Vincent wrote:
> On Mon, Oct 31, 2011 at 20:09, Russell King - ARM Linux
> <linux@arm.linux.org.uk> wrote:
> > On Mon, Oct 31, 2011 at 08:03:26PM +0530, Rabin Vincent wrote:
> >> The above patch will apply with gnu patch if you use -p0.
> >
> > $ patch -p0 -i arch_reset-1.diff --dry-run
> > patch: **** rejecting absolute target file name: /tmp/cocci-output-380-f841cc-system.h
>
> Works for me, maybe a version difference?
Same version. Some versions have become anal about security - and the
one in Fedora seems to be that.
^ permalink raw reply
* [PATCH 3/3] Add picosam9g45 board to Makefile
From: Nicu Pavel @ 2011-10-31 14:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1320073010-19549-1-git-send-email-npavel@mini-box.com>
Signed-off-by: Nicu Pavel <npavel@mini-box.com>
---
arch/arm/mach-at91/Makefile | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index bf57e8b..ad1950d 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -72,6 +72,7 @@ obj-$(CONFIG_MACH_GSIA18S) += board-gsia18s.o board-stamp9g20.o
obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
# AT91SAM9G45 board-specific support
+obj-$(CONFIG_MACH_MINIBOXPICOSAM9G45) += board-picosam9g45.o
obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
# AT91CAP9 board-specific support
--
1.7.1
^ permalink raw reply related
* [PATCH 2/3] Add kernel configuration option for picosam9g45 board
From: Nicu Pavel @ 2011-10-31 14:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1320073010-19549-1-git-send-email-npavel@mini-box.com>
Signed-off-by: Nicu Pavel <npavel@mini-box.com>
---
arch/arm/mach-at91/Kconfig | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 2248467..419295a 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -400,6 +400,12 @@ if ARCH_AT91SAM9G45
comment "AT91SAM9G45 Board Type"
+config MACH_MINIBOXPICOSAM9G45
+ bool "Mini-Box.com picoSAM9G45 board"
+ help
+ Select this if you are using Mini-Box.com picoSAM9G45 Board
+ <http://arm.mini-box.com>
+
config MACH_AT91SAM9M10G45EK
bool "Atmel AT91SAM9M10G45-EK Evaluation Kits"
help
--
1.7.1
^ permalink raw reply related
* [PATCH 1/3] Add support for mini-box.com picoSAM9G45 board
From: Nicu Pavel @ 2011-10-31 14:56 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds support for picoSAM9G45 board from mini-box.com. This board is
based on Atmel G45 SOC. More details can be found at http://arm.mini-box.com
Signed-off-by: Nicu Pavel <npavel@mini-box.com>
---
arch/arm/mach-at91/board-picosam9g45.c | 436 ++++++++++++++++++++++++++++++++
1 files changed, 436 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-at91/board-picosam9g45.c
diff --git a/arch/arm/mach-at91/board-picosam9g45.c b/arch/arm/mach-at91/board-picosam9g45.c
new file mode 100644
index 0000000..84d9dff
--- /dev/null
+++ b/arch/arm/mach-at91/board-picosam9g45.c
@@ -0,0 +1,436 @@
+/*
+ * Board-specific setup code for the picoSAM9G45 board
+ *
+ * http://www.mini-box.com/pico-SAM9G45-X
+ *
+ * Copyright (C) 2011 Nicu Pavel <npavel@mini-box.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/fb.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/leds.h>
+#include <linux/clk.h>
+#include <linux/atmel-mci.h>
+
+#include <mach/hardware.h>
+#include <video/atmel_lcdc.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
+#include <mach/system_rev.h>
+
+#include "sam9_smc.h"
+#include "generic.h"
+
+
+static void __init picosam9g45_init_early(void)
+{
+ /* Initialize processor: 12.000 MHz crystal */
+ at91_initialize(12000000);
+
+ /* DGBU on ttyS0. (Rx & Tx only) */
+ at91_register_uart(0, 0, 0);
+
+ /* USART1 on ttyS1. (Rx, Tx, RTS, CTS) */
+ at91_register_uart(AT91SAM9G45_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
+ /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
+ at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+ /* set serial console to ttyS0 (ie, DBGU) */
+ at91_set_serial_console(0);
+}
+
+/*
+ * USB HS Host port (common to OHCI & EHCI)
+ */
+static struct at91_usbh_data __initdata picosam9g45_usbh_hs_data = {
+ .ports = 2,
+ .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3},
+};
+
+
+/*
+ * USB HS Device port
+ */
+static struct usba_platform_data __initdata picosam9g45_usba_udc_data = {
+ .vbus_pin = AT91_PIN_PB19,
+};
+
+
+/*
+ * SPI devices.
+ */
+static struct spi_board_info picosam9g45_spi_devices[] = {
+ [0] = {/* SPI0 CS0 on right side connector J7*/
+ .modalias= "spidev",
+ .max_speed_hz= 15 * 1000 * 1000,
+ .bus_num= 0,
+ .chip_select= 0,
+ },
+ [1] = {/* SPI1 CS0 on left side connector J9*/
+ .modalias= "spidev",
+ .max_speed_hz= 15 * 1000 * 1000,
+ .bus_num= 1,
+ .chip_select= 0,
+ },
+};
+
+
+/*
+ * MCI (SD/MMC)
+ */
+static struct mci_platform_data __initdata mci0_data = {
+ .slot[0] = {
+ .bus_width = 4,
+ .detect_pin = AT91_PIN_PD10,
+ },
+};
+
+static struct mci_platform_data __initdata mci1_data = {
+ .slot[0] = {
+ .bus_width = 4,
+ .detect_pin = AT91_PIN_PD11,
+ .wp_pin = AT91_PIN_PD29,
+ },
+};
+
+
+/*
+ * MACB Ethernet device
+ */
+static struct at91_eth_data __initdata picosam9g45_macb_data = {
+ .phy_irq_pin = AT91_PIN_PD5,
+ .is_rmii = 1,
+};
+
+
+/*
+ * NAND flash
+ */
+static struct mtd_partition __initdata picosam9g45_nand_partition[] = {
+ {
+ .name = "Bootstrap",
+ .offset = 0,
+ .size = SZ_4M
+ },
+ {
+ .name= "RootFS",
+ .offset= MTDPART_OFS_NXTBLK,
+ .size= 60 * SZ_1M,
+ },
+ {
+ .name= "Space",
+ .offset= MTDPART_OFS_NXTBLK,
+ .size= MTDPART_SIZ_FULL,
+ },
+};
+
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+ *num_partitions = ARRAY_SIZE(picosam9g45_nand_partition);
+ return picosam9g45_nand_partition;
+}
+
+/* det_pin is not connected */
+static struct atmel_nand_data __initdata picosam9g45_nand_data = {
+ .ale = 21,
+ .cle = 22,
+ .rdy_pin = AT91_PIN_PC8,
+ .enable_pin = AT91_PIN_PC14,
+ .partition_info = nand_partitions,
+};
+
+static struct sam9_smc_config __initdata picosam9g45_nand_smc_config = {
+ .ncs_read_setup = 0,
+ .nrd_setup = 2,
+ .ncs_write_setup = 0,
+ .nwe_setup = 2,
+
+ .ncs_read_pulse = 4,
+ .nrd_pulse = 4,
+ .ncs_write_pulse = 4,
+ .nwe_pulse = 4,
+
+ .read_cycle = 7,
+ .write_cycle = 7,
+
+ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+ .tdf_cycles = 3,
+};
+
+static void __init picosam9g45_add_device_nand(void)
+{
+ picosam9g45_nand_data.bus_width_16 = board_have_nand_16bit();
+ /* setup bus-width (8 or 16) */
+ if (picosam9g45_nand_data.bus_width_16)
+ picosam9g45_nand_smc_config.mode |= AT91_SMC_DBW_16;
+ else
+ picosam9g45_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+ /* configure chip-select 3 (NAND) */
+ sam9_smc_configure(3, &picosam9g45_nand_smc_config);
+
+ at91_add_device_nand(&picosam9g45_nand_data);
+}
+
+
+/*
+ * LCD Controller
+ */
+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
+static struct fb_videomode at91_tft_vga_modes[] = {
+ {
+ .name = "HannStar",
+ .refresh = 60,
+ .xres = 480, .yres = 272,
+ .pixclock = KHZ2PICOS(9000),
+
+ .left_margin = 2, .right_margin = 2,
+ .upper_margin = 2, .lower_margin = 2,
+ .hsync_len = 41, .vsync_len = 10,
+
+ .sync = 0,
+ .vmode = FB_VMODE_NONINTERLACED,
+ },
+};
+
+static struct fb_monspecs at91fb_default_monspecs = {
+ .manufacturer = "HNS",
+ .monitor = "HSD043I9W1",
+
+ .modedb = at91_tft_vga_modes,
+ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
+ .hfmin = 15000,
+ .hfmax = 17640,
+ .vfmin = 57,
+ .vfmax = 67,
+};
+
+#define AT91SAM9G45_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
+ | ATMEL_LCDC_DISTYPE_TFT \
+ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
+
+/* Driver datas */
+static struct atmel_lcdfb_info __initdata picosam9g45_lcdc_data = {
+ .lcdcon_is_backlight = true,
+ .default_bpp = 16,
+ .default_dmacon = ATMEL_LCDC_DMAEN,
+ .default_lcdcon2 = AT91SAM9G45_DEFAULT_LCDCON2,
+ .default_monspecs = &at91fb_default_monspecs,
+ .guard_time = 9,
+ .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
+};
+
+#else
+static struct atmel_lcdfb_info __initdata picosam9g45_lcdc_data;
+#endif
+
+
+/*
+ * Touchscreen
+ */
+static struct at91_tsadcc_data picosam9g45_tsadcc_data = {
+ .adc_clock = 300000,
+ .pendet_debounce = 0x0d,
+ .ts_sample_hold_time = 0x0a,
+};
+
+
+/*
+ * GPIO Buttons
+ */
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+static struct gpio_keys_button picosam9g45_buttons[] = {
+ { /* J9 pin 5 gnd + pin 11 */
+ .code = KEY_BACK,
+ .gpio = AT91_PIN_PB6,
+ .active_low = 1,
+ .desc = "Back",
+ .wakeup = 1,
+ },
+ { /* J9 pin 5 gnd + pin 13*/
+ .code = KEY_MENU,
+ .gpio = AT91_PIN_PB7,
+ .active_low = 1,
+ .desc = "Menu",
+ .wakeup = 1,
+ },
+ { /* J9 pin 5 gnd + pin 12 */
+ .code = KEY_HOME,
+ .gpio = AT91_PIN_PB16,
+ .active_low = 1,
+ .desc = "Home",
+ },
+
+};
+
+static struct gpio_keys_platform_data picosam9g45_button_data = {
+ .buttons = picosam9g45_buttons,
+ .nbuttons = ARRAY_SIZE(picosam9g45_buttons),
+};
+
+static struct platform_device picosam9g45_button_device = {
+ .name = "gpio-keys",
+ .id = -1,
+ .num_resources = 0,
+ .dev = {
+ .platform_data = &picosam9g45_button_data,
+ }
+};
+
+static void __init picosam9g45_add_device_buttons(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(picosam9g45_buttons); i++) {
+ at91_set_GPIO_periph(picosam9g45_buttons[i].gpio, 1);
+ at91_set_deglitch(picosam9g45_buttons[i].gpio, 1);
+ }
+
+ platform_device_register(&picosam9g45_button_device);
+}
+#else
+static void __init picosam9g45_add_device_buttons(void) {}
+#endif
+
+
+/*
+ * LEDs ... these could all be PWM-driven, for variable brightness
+ */
+static struct gpio_led picosam9g45_leds[] = {
+ { /* "pwr" led */
+ .name = "pwr",
+ .gpio = AT91_PIN_PD30,
+ .default_trigger = "heartbeat",
+ },
+ { /* "u1" led */
+ .name = "u1",
+ .gpio = AT91_PIN_PD0,
+ .active_low = 1,
+ .default_trigger = "mmc0",
+ },
+#if !(defined(CONFIG_LEDS_ATMEL_PWM) || defined(CONFIG_LEDS_ATMEL_PWM_MODULE))
+ { /* "u2" led */
+ .name = "u2",
+ .gpio = AT91_PIN_PD31,
+ .active_low = 1,
+ .default_trigger = "none",
+ },
+#endif
+};
+
+
+/*
+ * PWM Leds
+ */
+static struct gpio_led picosam9g45_pwm_led[] = {
+#if defined(CONFIG_LEDS_ATMEL_PWM) || defined(CONFIG_LEDS_ATMEL_PWM_MODULE)
+ { /* "right" led, green, userled1, pwm1 */
+ .name = "d7",
+ .gpio = 1, /* is PWM channel number */
+ .active_low = 1,
+ .default_trigger = "none",
+ },
+ { /* picopc buzzer */
+ .name= "buzzer",
+ .gpio= 2, /* is PWM channel number */
+ .active_low= 1,
+ .default_trigger= "none",
+ },
+#endif
+};
+
+
+/*
+ * PWM buzzer
+ */
+static void picosam9g45_setup_device_buzzer(void)
+{
+ at91_set_A_periph(AT91_PIN_PE31, 1);
+}
+
+/*
+ * Capacitive touchscreen
+ */
+#define PICOSAM9G45_CAPTS_IRQ AT91_PIN_PA27
+static struct i2c_board_info __initdata picosam9g45_i2c1_devices[] = {
+ {
+ I2C_BOARD_INFO("ms-msg20xx", 0x60),
+ .irq = PICOSAM9G45_CAPTS_IRQ,
+ },
+};
+
+static void picosam9g45_setup_device_capts(void)
+{
+ at91_set_gpio_input(PICOSAM9G45_CAPTS_IRQ, 0);
+ at91_set_deglitch(PICOSAM9G45_CAPTS_IRQ, 1);
+}
+
+
+static void __init picosam9g45_board_init(void)
+{
+ /* Buzzer PWM pin */
+ picosam9g45_setup_device_buzzer();
+ /* Capacitive Touch Screen IRQ */
+ picosam9g45_setup_device_capts();
+ /* Serial */
+ at91_add_device_serial();
+ /* USB HS Host */
+ at91_add_device_usbh_ohci(&picosam9g45_usbh_hs_data);
+ at91_add_device_usbh_ehci(&picosam9g45_usbh_hs_data);
+ /* USB HS Device */
+ at91_add_device_usba(&picosam9g45_usba_udc_data);
+ /* SPI */
+ at91_add_device_spi(picosam9g45_spi_devices, ARRAY_SIZE(picosam9g45_spi_devices));
+ /* MMC */
+ at91_add_device_mci(0, &mci0_data);
+ at91_add_device_mci(1, &mci1_data);
+ /* Ethernet */
+ at91_add_device_eth(&picosam9g45_macb_data);
+ /* NAND */
+ picosam9g45_add_device_nand();
+ /* I2C */
+ at91_add_device_i2c(0, NULL, 0);
+ at91_add_device_i2c(1, picosam9g45_i2c1_devices, ARRAY_SIZE(picosam9g45_i2c1_devices));
+ /* LCD Controller */
+ at91_add_device_lcdc(&picosam9g45_lcdc_data);
+ /* Resistive Touch Screen */
+ at91_add_device_tsadcc(&picosam9g45_tsadcc_data);
+ /* Push Buttons */
+ picosam9g45_add_device_buttons();
+ /* LEDs */
+ at91_gpio_leds(picosam9g45_leds, ARRAY_SIZE(picosam9g45_leds));
+ at91_pwm_leds(picosam9g45_pwm_led, ARRAY_SIZE(picosam9g45_pwm_led));
+}
+
+MACHINE_START(MINIBOXPICOSAM9G45, "Mini Box picoSAM9 G45 Board")
+ /* Maintainer: Nicu Pavel */
+ .timer = &at91sam926x_timer,
+ .map_io = at91_map_io,
+ .init_early = picosam9g45_init_early,
+ .init_irq = at91_init_irq_default,
+ .init_machine = picosam9g45_board_init,
+MACHINE_END
--
1.7.1
^ permalink raw reply related
* [PATCH 01/51] ARM: reset: introduce arm_arch_reset function pointer
From: Rabin Vincent @ 2011-10-31 14:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111031143904.GM19187@n2100.arm.linux.org.uk>
On Mon, Oct 31, 2011 at 20:09, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> On Mon, Oct 31, 2011 at 08:03:26PM +0530, Rabin Vincent wrote:
>> The above patch will apply with gnu patch if you use -p0.
>
> $ patch -p0 -i arch_reset-1.diff --dry-run
> patch: **** rejecting absolute target file name: /tmp/cocci-output-380-f841cc-system.h
Works for me, maybe a version difference?
~/kernel/arm$ cat arch_reset-1.diff | head
--- arch/arm/mach-ep93xx/include/mach/system.h 2011-10-31
20:11:04.496237799 +0530
+++ /tmp/cocci-output-3559-9e5748-system.h 2011-10-31 20:12:08.120235486 +0530
@@ -11,8 +11,6 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode, const char *cmd)
{
- local_irq_disable();
-
/*
* Set then clear the SWRST bit to initiate a software reset
~/kernel/arm$ patch -p0 -i arch_reset-1.diff --dry-run
patching file arch/arm/mach-ep93xx/include/mach/system.h
patching file arch/arm/mach-iop32x/include/mach/system.h
patching file arch/arm/mach-ixp2000/include/mach/system.h
~/kernel/arm$ patch --version
patch 2.6.1
Copyright (C) 1988 Larry Wall
Copyright (C) 2003, 2009 Free Software Foundation, Inc.
This program comes with NO WARRANTY, to the extent permitted by law.
You may redistribute copies of this program
under the terms of the GNU General Public License.
For more information about these matters, see the file named COPYING.
written by Larry Wall and Paul Eggert
~/kernel/arm$
^ permalink raw reply
* [PATCH 01/51] ARM: reset: introduce arm_arch_reset function pointer
From: Russell King - ARM Linux @ 2011-10-31 14:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAH+eYFDM_spE8jg4K5awBPZvPyEmdhSnQ9Zt=v2U4PmFQeRLOw@mail.gmail.com>
On Mon, Oct 31, 2011 at 08:03:26PM +0530, Rabin Vincent wrote:
> On Mon, Oct 31, 2011 at 19:43, Russell King - ARM Linux
> <linux@arm.linux.org.uk> wrote:
> > $ spatch -sp_file arch_reset-1.cocci arch/arm/*/include/*/system.h > arch_reset-1.diff
> >
> > The diff it created contains:
> >
> > --- arch/arm/mach-ep93xx/include/mach/system.h ?2011-03-04 19:52:46.419272878 +0000
> > +++ /tmp/cocci-output-380-f841cc-system.h ? ? ? 2011-10-31 13:54:52.066705107 +0000
> > ...
> > --- arch/arm/mach-iop32x/include/mach/system.h ?2011-03-04 19:52:46.445272534 +0000
> > +++ /tmp/cocci-output-380-c0e3f4-system.h ? ? ? 2011-10-31 13:54:52.072705051 +0000
> > ...
> > --- arch/arm/mach-ixp2000/include/mach/system.h 2011-03-04 19:52:46.449272482 +0000
> > +++ /tmp/cocci-output-380-467f17-system.h ? ? ? 2011-10-31 13:54:52.079704984 +0000
> > ...
> >
> > which in total deletes 6 lines. ?However, the patch is rejected by
> > git apply and gnu patch as it stands - it needs the filenames to be
> > edited to something more reasonable. ?So that also takes six edits.
>
> The above patch will apply with gnu patch if you use -p0.
$ patch -p0 -i arch_reset-1.diff --dry-run
patch: **** rejecting absolute target file name: /tmp/cocci-output-380-f841cc-system.h
^ permalink raw reply
* [PATCH 01/51] ARM: reset: introduce arm_arch_reset function pointer
From: Will Deacon @ 2011-10-31 14:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111031141322.GK19187@n2100.arm.linux.org.uk>
On Mon, Oct 31, 2011 at 02:13:22PM +0000, Russell King - ARM Linux wrote:
> On Sat, Oct 29, 2011 at 02:56:53PM +0100, Will Deacon wrote:
> > The only downside is that I have to go over all of the platforms again
> > unless I can polish up my Coccinelle-fu. Ho-hum.
>
> Well, I've just given coccinelle a go, and having read all the hype about
> it, I'm completely disappointed with it to the extent that I'm going to
> uninstall the tool from my system (unless someone can point out what I'm
> doing wrong.)
I'm really new to it, so I'm by no means an expert...
> I thought I'd give it a spin on a nice simple change - deleting the
> local_irq_disable() calls inside arch_reset() (irqs have already been
> disabled by this time):
>
> @@
> identifier mode, cmd;
> @@
>
> arch_reset(char mode, const char *cmd)
> {
> ...
> - local_irq_disable();
> ...
> }
Looks good to me.
> $ spatch -sp_file arch_reset-1.cocci arch/arm/*/include/*/system.h > arch_reset-1.diff
>
> The diff it created contains:
>
> --- arch/arm/mach-ep93xx/include/mach/system.h 2011-03-04 19:52:46.419272878 +0000
> +++ /tmp/cocci-output-380-f841cc-system.h 2011-10-31 13:54:52.066705107 +0000
> ...
> --- arch/arm/mach-iop32x/include/mach/system.h 2011-03-04 19:52:46.445272534 +0000
> +++ /tmp/cocci-output-380-c0e3f4-system.h 2011-10-31 13:54:52.072705051 +0000
> ...
> --- arch/arm/mach-ixp2000/include/mach/system.h 2011-03-04 19:52:46.449272482 +0000
> +++ /tmp/cocci-output-380-467f17-system.h 2011-10-31 13:54:52.079704984 +0000
> ...
>
> which in total deletes 6 lines. However, the patch is rejected by
> git apply and gnu patch as it stands - it needs the filenames to be
> edited to something more reasonable. So that also takes six edits.
Ah, yeah, that's not good. I tried using the -dir option but ran into
problems, since spatch only descends one level into the filesystem hierarchy.
In the end I used find and xargs :)
Will
^ permalink raw reply
* [PATCH 01/51] ARM: reset: introduce arm_arch_reset function pointer
From: Russell King - ARM Linux @ 2011-10-31 14:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111031142602.GA30958@totoro>
On Mon, Oct 31, 2011 at 02:26:02PM +0000, Jamie Iles wrote:
> I think you need:
>
> spatch -sp_file arch_reset-1.cocci -patch . arch/arm/*/include/*/system.h > \
> arch_reset-1.diff
>
> I've also used -in_place in the past then use git to generate the diff,
> but I guess it is nicer to have the patch self-contained.
Ah, yes, that allows it to start generating more useful patches, thanks.
I tried -patch '', which the documentation said should be the current
directory:
-patch <dir> path name with respect to which a patch should be created
"" for a file in the current directory
except it instead spits out this error:
Fatal error: exception Invalid_argument("index out of bounds")
^ permalink raw reply
* [PATCH 01/51] ARM: reset: introduce arm_arch_reset function pointer
From: Rabin Vincent @ 2011-10-31 14:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20111031141322.GK19187@n2100.arm.linux.org.uk>
On Mon, Oct 31, 2011 at 19:43, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> $ spatch -sp_file arch_reset-1.cocci arch/arm/*/include/*/system.h > arch_reset-1.diff
>
> The diff it created contains:
>
> --- arch/arm/mach-ep93xx/include/mach/system.h ?2011-03-04 19:52:46.419272878 +0000
> +++ /tmp/cocci-output-380-f841cc-system.h ? ? ? 2011-10-31 13:54:52.066705107 +0000
> ...
> --- arch/arm/mach-iop32x/include/mach/system.h ?2011-03-04 19:52:46.445272534 +0000
> +++ /tmp/cocci-output-380-c0e3f4-system.h ? ? ? 2011-10-31 13:54:52.072705051 +0000
> ...
> --- arch/arm/mach-ixp2000/include/mach/system.h 2011-03-04 19:52:46.449272482 +0000
> +++ /tmp/cocci-output-380-467f17-system.h ? ? ? 2011-10-31 13:54:52.079704984 +0000
> ...
>
> which in total deletes 6 lines. ?However, the patch is rejected by
> git apply and gnu patch as it stands - it needs the filenames to be
> edited to something more reasonable. ?So that also takes six edits.
The above patch will apply with gnu patch if you use -p0.
^ permalink raw reply
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