* [alsa-devel] [PATCH 0/3] ASoC: Davinci: McASP: add support new McASP IP Variant
From: Hebbar, Gururaja @ 2012-10-03 7:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <506B6A9D.3090100@gmail.com>
On Wed, Oct 03, 2012 at 03:58:45, Daniel Mack wrote:
> On 31.08.2012 14:50, Hebbar, Gururaja wrote:
> > The OMAP2+ variant of McASP is different from Davinci variant w.r.to some
> > register offset and missing generic SRAM APIs support
> >
> > Changes
> > - Add new MCASP_VERSION_3 to identify new variant. New DT compatible
> > "ti,omap2-mcasp-audio" to identify version 3 controller.
> > - The register offsets are handled depending on the version.
> > - Provide a config option to indicate missing SRAM API support.
>
> Could you give some insight which hardware this was tested on? I'm
> trying to get this up and running on a AM33xx board, and the patches
> look all reasonable to me. My problem is that I can't make the DMA
> engine move forward, I fail to receive a single interrupt on this
> peripheral after the stream starts. I will continue searching for the
> reason of this tomorrow, but maybe you can give me some hint by
> explaining your setup?
>
> Note that I'm using your patches together with Matt's from this series:
>
> https://github.com/ohporter/linux/tree/edma-dmaengine-am33xx-rfc-v1
>
> ... but it doesn't work without those either.
When I started working on adding DT support to McASP driver, Matt Porter
EDMA port was not yet ready.
So
1. I took existing edma driver from AM335x Arago release [1] (driver + edma
device init).
2. Added this to Vaibhav's Local (linux-next + AM335x patches) tree [2]
3. Added DT support to McASP driver.
I tested this on AM335x EVM board.
If you need the code, I can share it as a patch (I will send the patch as a
private mail since the patch is huge).
[1]
http://arago-project.org/git/projects/?p=linux-am33x.git;a=commit;h=d7e124e8074cccf9958290e773c88a4b2b36412b
[2]
https://github.com/hvaibhav/am335x-linux/tree/am335x-upstream-staging
>
>
>
> Thanks,
> Daniel
>
>
Regards,
Gururaja
^ permalink raw reply
* [PATCH] ARM: davinci: dm644x: fix out range signal for ED
From: Prabhakar @ 2012-10-03 6:35 UTC (permalink / raw)
To: linux-arm-kernel
From: Lad, Prabhakar <prabhakar.lad@ti.com>
while testing display on dm644x, for ED out-range signals
was observed. This patch fixes appropriate clock setting
for ED.
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>
---
arch/arm/mach-davinci/dm644x.c | 3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 79d2880..688484b 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -713,8 +713,7 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
break;
case VPBE_ENC_CUSTOM_TIMINGS:
if (pclock <= 27000000) {
- v |= DM644X_VPSS_MUXSEL_PLL2_MODE |
- DM644X_VPSS_DACCLKEN;
+ v |= DM644X_VPSS_DACCLKEN;
writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
} else {
/*
--
1.7.4.1
^ permalink raw reply related
* [PATCH] davinci: vpbe: replace V4L2_OUT_CAP_CUSTOM_TIMINGS with V4L2_OUT_CAP_DV_TIMINGS
From: Prabhakar @ 2012-10-03 6:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Lad, Prabhakar <prabhakar.lad@ti.com>
This patch replaces V4L2_OUT_CAP_CUSTOM_TIMINGS macro with
V4L2_OUT_CAP_DV_TIMINGS. As V4L2_OUT_CAP_CUSTOM_TIMINGS is being phased
out.
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Hans Verkuil <hansverk@cisco.com>
Cc: Mauro Carvalho Chehab <mchehab@redhat.com>
---
arch/arm/mach-davinci/board-dm644x-evm.c | 2 +-
drivers/media/platform/davinci/vpbe.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 3baf56d..a79dc1e 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -699,7 +699,7 @@ static struct vpbe_output dm644xevm_vpbe_outputs[] = {
.index = 1,
.name = "Component",
.type = V4L2_OUTPUT_TYPE_ANALOG,
- .capabilities = V4L2_OUT_CAP_CUSTOM_TIMINGS,
+ .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
},
.subdev_name = VPBE_VENC_SUBDEV_NAME,
.default_mode = "480p59_94",
diff --git a/drivers/media/platform/davinci/vpbe.c b/drivers/media/platform/davinci/vpbe.c
index d03f452..9b623bc 100644
--- a/drivers/media/platform/davinci/vpbe.c
+++ b/drivers/media/platform/davinci/vpbe.c
@@ -340,7 +340,7 @@ static int vpbe_s_dv_timings(struct vpbe_device *vpbe_dev,
if (!(cfg->outputs[out_index].output.capabilities &
- V4L2_OUT_CAP_CUSTOM_TIMINGS))
+ V4L2_OUT_CAP_DV_TIMINGS))
return -EINVAL;
for (i = 0; i < output->num_modes; i++) {
@@ -408,7 +408,7 @@ static int vpbe_enum_dv_timings(struct vpbe_device *vpbe_dev,
int j = 0;
int i;
- if (!(output->output.capabilities & V4L2_OUT_CAP_CUSTOM_TIMINGS))
+ if (!(output->output.capabilities & V4L2_OUT_CAP_DV_TIMINGS))
return -EINVAL;
for (i = 0; i < output->num_modes; i++) {
--
1.7.4.1
^ permalink raw reply related
* [RFC PATCH 1/2] ARM: use generic strnlen_user and strncpy_from_user functions
From: Uwe Kleine-König @ 2012-10-03 6:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121002191851.GB20411@mudshark.cambridge.arm.com>
Hi Will,
On Tue, Oct 02, 2012 at 08:18:51PM +0100, Will Deacon wrote:
> On Tue, Oct 02, 2012 at 06:53:16PM +0100, Uwe Kleine-K?nig wrote:
> > On Fri, Jun 08, 2012 at 04:38:54PM +0100, Will Deacon wrote:
> > > This patch implements the word-at-a-time interface for ARM using the
> > > same algorithm as x86. Although we have a clz instruction from ARMv5,
> > > this only saves us one mov instruction when building with Thumb-2 and
> > > makes no difference when targetting ARM, so we use the magic 0x0ff0001
> > > constant for all CPUs. For big-endian configurations, we use the
> > > implementation from asm-generic.
> > >
> > > With this implemented, we can replace our byte-at-a-time strnlen_user
> > > and strncpy_from_user functions with the optimised generic versions.
> > This patch is in Linus tree as 8c56cc8be5b38e3684eba96dc9b3f7ca7e495755
> > now and it broke my booting my Cortex-M3 machine. I didn't debug that
> > yet, but wanted to let you know already now before I call it a day.
>
> Ok, thanks for the heads-up. I didn't test it with an M-class CPU, but
> hopefully that's understandable :)
I think so, yes. But I intend to change that, and I heard your coworker
gets an efm32 :-)
> > > +#define user_addr_max() \
> > > + (segment_eq(get_fs(), USER_DS) ? TASK_SIZE : ~0UL)
> > > +
> > I think this is the problem as for no-mmu USER_DS == KERNEL_DS. I will
> > take a look tomorrow.
>
> I can't immediately see why that would cause a problem, so please let me
> know if you get more information.
BTW, I once saw the call to sys_mount fail:
sys_mount ->
copy_mount_string ->
strndup_user ->
strnlen_user returns 0 which makes sys_mount fail with -EFAULT.
but that was not the problem I hit when I bisected (using merges instead
of rebasing).
We have a bank holiday today in Germany, so it's still tomorrow when I
will look into the problem. So I hope to be able to give more details
soon.
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [PATCHv3 2/4] Input: keypad: Add smsc ece1099 keypad driver
From: Poddar, Sourav @ 2012-10-03 5:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121002061829.GA3853@core.coreip.homeip.net>
Hi Dmitry,
On Tue, Oct 2, 2012 at 11:48 AM, Dmitry Torokhov
<dmitry.torokhov@gmail.com> wrote:
> Hi Sourav,
>
> On Mon, Oct 01, 2012 at 04:31:50PM +0530, Sourav Poddar wrote:
>> From: G, Manjunath Kondaiah <manjugk@ti.com>
>>
>> SMSC ECE1099 is a keyboard scan or GPIO expansion device.The device
>> supports a keypad scan matrix of 23*8.This driver uses this
>> device as a keypad driver.
>>
>> Tested on omap5430 evm with 3.6-rc6 custom kernel.
>>
>> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
>> Cc: Benoit Cousson <b-cousson@ti.com>
>> Cc: Felipe Balbi <balbi@ti.com>
>> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
>> Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
>> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
>> Acked-by: Felipe Balbi <balbi@ti.com>
>> ---
>> Changes since v2:
>> - Replace magic numbers through driver variable.
>> - Provide comments for some initialisation done in probe.
>> drivers/input/keyboard/Kconfig | 11 +
>> drivers/input/keyboard/Makefile | 1 +
>> drivers/input/keyboard/smsc-ece1099-keypad.c | 304 ++++++++++++++++++++++++++
>> 3 files changed, 316 insertions(+), 0 deletions(-)
>> create mode 100644 drivers/input/keyboard/smsc-ece1099-keypad.c
>>
>> diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
>> index c50fa75..b03a39c 100644
>> --- a/drivers/input/keyboard/Kconfig
>> +++ b/drivers/input/keyboard/Kconfig
>> @@ -593,6 +593,17 @@ config KEYBOARD_TWL4030
>> To compile this driver as a module, choose M here: the
>> module will be called twl4030_keypad.
>>
>> +config KEYBOARD_SMSC
>> + tristate "SMSC ECE1099 keypad support"
>
> Should also select INPUT_MATRIXKMAP.
>
Yes, will include in the next version.
>> + depends on I2C
>> + help
>> + Say Y here if your board use the smsc keypad controller
>> + for omap5 defconfig. It's safe to say enable this
>> + even on boards that don't use the keypad controller.
>> +
>> + To compile this driver as a module, choose M here: the
>> + module will be called smsc-ece1099-keypad.
>> +
>> config KEYBOARD_XTKBD
>> tristate "XT keyboard"
>> select SERIO
>> diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
>> index 44e7600..0f2aa26 100644
>> --- a/drivers/input/keyboard/Makefile
>> +++ b/drivers/input/keyboard/Makefile
>> @@ -52,5 +52,6 @@ obj-$(CONFIG_KEYBOARD_TC3589X) += tc3589x-keypad.o
>> obj-$(CONFIG_KEYBOARD_TEGRA) += tegra-kbc.o
>> obj-$(CONFIG_KEYBOARD_TNETV107X) += tnetv107x-keypad.o
>> obj-$(CONFIG_KEYBOARD_TWL4030) += twl4030_keypad.o
>> +obj-$(CONFIG_KEYBOARD_SMSC) += smsc-ece1099-keypad.o
>> obj-$(CONFIG_KEYBOARD_XTKBD) += xtkbd.o
>> obj-$(CONFIG_KEYBOARD_W90P910) += w90p910_keypad.o
>> diff --git a/drivers/input/keyboard/smsc-ece1099-keypad.c b/drivers/input/keyboard/smsc-ece1099-keypad.c
>> new file mode 100644
>> index 0000000..15dc147
>> --- /dev/null
>> +++ b/drivers/input/keyboard/smsc-ece1099-keypad.c
>> @@ -0,0 +1,304 @@
>> +/*
>> + * SMSC_ECE1099 Keypad driver
>> + *
>> + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include <linux/i2c.h>
>> +#include <linux/kernel.h>
>> +#include <linux/module.h>
>> +#include <linux/init.h>
>> +#include <linux/interrupt.h>
>> +#include <linux/input.h>
>> +#include <linux/gpio.h>
>> +#include <linux/slab.h>
>> +#include <linux/jiffies.h>
>> +#include <linux/input/matrix_keypad.h>
>> +#include <linux/delay.h>
>> +#include <linux/mfd/core.h>
>> +#include <linux/mfd/smsc.h>
>> +#include <linux/of_gpio.h>
>> +#include <linux/of.h>
>> +
>> +#define KEYPRESS_TIME 200
>> +
>> +struct smsc_keypad {
>> + struct smsc *smsc;
>> + struct matrix_keymap_data *keymap_data;
>> + unsigned int last_key_state[16];
>> + unsigned int last_col;
>> + unsigned int last_key_ms[16];
>> + unsigned short *keymap;
>> + struct i2c_client *client;
>> + struct input_dev *input;
>> + int rows, cols;
>> + int row_shift;
>> + bool no_autorepeat;
>> + unsigned irq;
>> + struct device *dev;
>> +};
>> +
>> +static void smsc_kp_scan(struct smsc_keypad *kp)
>> +{
>> + struct input_dev *input = kp->input;
>> + int i, j;
>> + int row, col;
>> + int temp, code;
>> + unsigned int new_state[16];
>> + unsigned int bits_changed;
>> + int this_ms;
>> +
>> + smsc_write(kp->dev, SMSC_KP_INT_MASK, 0x00);
>> + smsc_write(kp->dev, SMSC_KP_INT_STAT, 0xFF);
>> +
>> + /* Scan for row and column */
>> + for (i = 0; i < kp->cols; i++) {
>> + smsc_write(kp->dev, SMSC_KP_OUT, SMSC_KSO_EVAL + i);
>> + /* Read Row Status */
>> + smsc_read(kp->dev, SMSC_KP_IN, &temp);
>> + if (temp == 0xFF)
>> + continue;
>> +
>> + col = i;
>> + for (j = 0; j < kp->rows; j++) {
>> + if ((temp & 0x01) != 0x00) {
>> + temp = temp >> 1;
>> + continue;
>> + }
>> +
>> + row = j;
>> + new_state[col] = (1 << row);
>> + bits_changed = kp->last_key_state[col] ^ new_state[col];
>> + this_ms = jiffies_to_msecs(jiffies);
>> + if (bits_changed != 0 || (!bits_changed &&
>> + ((this_ms - kp->last_key_ms[col]) >= KEYPRESS_TIME))) {
>> + code = MATRIX_SCAN_CODE(row, col, kp->row_shift);
>> + input_event(input, EV_MSC, MSC_SCAN, code);
>> + input_report_key(input, kp->keymap[code], 1);
>> + input_report_key(input, kp->keymap[code], 0);
>> + kp->last_key_state[col] = new_state[col];
>> + if (kp->last_col != col)
>> + kp->last_key_state[kp->last_col] = 0;
>> + kp->last_key_ms[col] = this_ms;
>> + }
>> + temp = temp >> 1;
>> + }
>> + }
>> + input_sync(input);
>> +
>> + smsc_write(kp->dev, SMSC_KP_INT_MASK, 0xFF);
>> +
>> + /* Set up Low Power Mode (Wake-up) (0xFB) */
>> + smsc_write(kp->dev, SMSC_WKUP_CTRL, SMSC_KP_SET_LOW_PWR);
>> +
>> + /*Enable Keypad Scan (generate interrupt on key press) (0x40)*/
>> + smsc_write(kp->dev, SMSC_KP_OUT, SMSC_KSO_ALL_LOW);
>> +}
>> +
>> +static irqreturn_t do_kp_irq(int irq, void *_kp)
>> +{
>> + struct smsc_keypad *kp = _kp;
>> + int int_status;
>> +
>> + smsc_read(kp->dev, SMSC_KP_INT_STAT, &int_status);
>> + if (int_status)
>> + smsc_kp_scan(kp);
>> +
>> + return IRQ_HANDLED;
>> +}
>> +
>> +#ifdef CONFIG_OF
>> +static int __devinit smsc_keypad_parse_dt(struct device *dev,
>> + struct smsc_keypad *kp)
>> +{
>> + struct device_node *np = dev->of_node;
>> +
>> + if (!np) {
>> + dev_err(dev, "missing DT data");
>> + return -EINVAL;
>> + }
>> +
>> + of_property_read_u32(np, "keypad,num-rows", &kp->rows);
>> + of_property_read_u32(np, "keypad,num-columns", &kp->cols);
>> + if (!kp->rows || !kp->cols) {
>> + dev_err(dev, "number of keypad rows/columns not specified\n");
>> + return -EINVAL;
>> + }
>> +
>> + if (of_property_read_bool(np, "linux,input-no-autorepeat"))
>> + kp->no_autorepeat = true;
>> +
>> + return 0;
>> +}
>> +#else
>> +static inline int smsc_keypad_parse_dt(struct device *dev,
>> + struct smsc_keypad *kp)
>> +{
>> + return -ENOSYS;
>> +}
>> +#endif
>> +
>> +static int __devinit
>> +smsc_probe(struct platform_device *pdev)
>> +{
>> + struct device *dev = &pdev->dev;
>> + struct smsc *smsc = dev_get_drvdata(pdev->dev.parent);
>> + struct input_dev *input;
>> + struct smsc_keypad *kp;
>> + int ret = 0, error;
>> + int col, i, max_keys, row_shift;
>> + int irq;
>> + int addr;
>> +
>> + kp = devm_kzalloc(dev, sizeof(*kp), GFP_KERNEL);
>> +
>> + input = input_allocate_device();
>> + if (!kp || !input) {
>> + error = -ENOMEM;
>> + goto err1;
>> + }
>> +
>> + error = smsc_keypad_parse_dt(&pdev->dev, kp);
>
> It doe snot look like the driver is useful without DT... Should it
> simply depend on OF and not even provide !OF stubs?
>
Yes, the idea was to make this driver completely dt specific.
>> + if (error)
>
> You are leaking input device here.
>
True, will include appropriate goto label.
>> + return error;
>> +
>> + /* Get the debug Device */
>> + kp->input = input;
>> + kp->smsc = smsc;
>> + kp->irq = platform_get_irq(pdev, 0);
>> + kp->dev = dev;
>> +
>> + for (col = 0; col < 16; col++) {
>> + kp->last_key_state[col] = 0;
>> + kp->last_key_ms[col] = 0;
>
> kzalloc should have already taken care of this.
>
Ok. Will remove.
>> + }
>> +
>> + /* setup input device */
>> + __set_bit(EV_KEY, input->evbit);
>> +
>> + /* Enable auto repeat feature of Linux input subsystem */
>> + if (!(kp->no_autorepeat))
>
> No need for extra parenthesis.
>
Will remove.
>> + __set_bit(EV_REP, input->evbit);
>> +
>> + input_set_capability(input, EV_MSC, MSC_SCAN);
>> + input->name = "SMSC Keypad";
>> + input->phys = "smsc_keypad/input0";
>> + input->dev.parent = &pdev->dev;
>> + input->id.bustype = BUS_HOST;
>> + input->id.vendor = 0x0001;
>> + input->id.product = 0x0001;
>> + input->id.version = 0x0003;
>> +
>> + error = input_register_device(input);
>> + if (error) {
>> + dev_err(kp->dev,
>> + "Unable to register twl4030 keypad device\n");
>> + goto err1;
>> + }
>> +
>> + /* Mask all GPIO interrupts (0x37-0x3B) */
>> + for (addr = SMSC_GPIO_INT_MASK_START;
>> + addr < SMSC_GPIO_INT_MASK_START + 4; addr++)
>> + smsc_write(dev, addr, 0);
>> +
>> + /* Set all outputs high (0x05-0x09) */
>> + for (addr = SMSC_GPIO_DATA_OUT_START;
>> + addr < SMSC_GPIO_DATA_OUT_START + 4; addr++)
>> + smsc_write(dev, addr, 0xff);
>> +
>> + /* Clear all GPIO interrupts (0x32-0x36) */
>> + for (addr = SMSC_GPIO_INT_STAT_START;
>> + addr < SMSC_GPIO_INT_STAT_START + 4; addr++)
>> + smsc_write(dev, addr, 0xff);
>> +
>> + /* Configure the smsc pins as Keyboard scan Input */
>> + for (i = 0; i <= kp->rows; i++) {
>> + addr = 0x12 + i;
>> + smsc_write(dev, addr, SMSC_KP_KSI);
>> + }
>> +
>> + /* Configure the smsc pins as Keyboard scan output */
>> + for (i = 0; i <= kp->cols; i++) {
>> + addr = 0x1A + i;
>> + smsc_write(dev, addr, SMSC_KP_KSO);
>> + }
>> +
>> + smsc_write(dev, SMSC_KP_INT_STAT, SMSC_KP_SET_HIGH);
>> + smsc_write(dev, SMSC_WKUP_CTRL, SMSC_KP_SET_LOW_PWR);
>> + smsc_write(dev, SMSC_KP_OUT, SMSC_KSO_ALL_LOW);
>> +
>> + row_shift = get_count_order(kp->cols);
>> + max_keys = kp->rows << row_shift;
>> +
>> + kp->row_shift = row_shift;
>> + kp->keymap = devm_kzalloc(dev, max_keys * sizeof(kp->keymap[0]),
>> + GFP_KERNEL);
>> + if (!kp->keymap) {
>> + dev_err(&pdev->dev, "Not enough memory for keymap\n");
>> + error = -ENOMEM;
>> + }
>> +
>> + matrix_keypad_build_keymap(NULL, NULL, kp->rows,
>> + kp->cols, kp->keymap, input);
>
> Needs error handling I believe.
>
True, missed that. Will include.
>> +
>> + /*
>> + * This ISR will always execute in kernel thread context because of
>> + * the need to access the SMSC over the I2C bus.
>> + */
>> + ret = devm_request_threaded_irq(dev, kp->irq, NULL, do_kp_irq,
>> + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, pdev->name, kp);
>> + if (ret) {
>> + dev_dbg(&pdev->dev, "request_irq failed for irq no=%d\n",
>> + irq);
>> + goto err2;
>> + }
>> +
>> + /* Enable smsc keypad interrupts */
>> + ret = smsc_write(dev, SMSC_KP_INT_MASK, 0xff);
>> + if (ret < 0)
>> + goto err2;
>> +
>> + return 0;
>> +
>> +err2:
>> + input_unregister_device(input);
>> +err1:
>> + input_free_device(input);
>
> Double free.
>
I believe what you are trying to say here is that we dont really
need a " input_unregister_device" (as also I checked in other keypad
implementations) and do a "unregister_device" in the remove api ??
>> + return ret;
>> +}
>> +
>> +static int __devexit smsc_remove(struct platform_device *pdev)
>> +{
>> + struct smsc_keypad *kp = platform_get_drvdata(pdev);
>> + input_unregister_device(kp->input);
>
> And your kernel goes *BOOM*
>
>> +
>> + return 0;
>> +}
>> +
>> +#ifdef CONFIG_OF
>> +static const struct of_device_id smsc_keypad_dt_match[] = {
>> + { .compatible = "smsc,keypad" },
>> + {},
>> +};
>> +MODULE_DEVICE_TABLE(of, smsc_keypad_dt_match);
>> +#endif
>> +
>> +static struct platform_driver smsc_driver = {
>> + .driver = {
>> + .name = "smsc-keypad",
>> + .of_match_table = of_match_ptr(smsc_keypad_dt_match),
>> + .owner = THIS_MODULE,
>> + },
>> + .probe = smsc_probe,
>> + .remove = __devexit_p(smsc_remove),
>> +};
>> +
>> +module_platform_driver(smsc_driver);
>> +
>> +MODULE_AUTHOR("G Kondaiah Manjunath <manjugk@ti.com>");
>> +MODULE_DESCRIPTION("SMSC ECE1099 Keypad driver");
>> +MODULE_LICENSE("GPL v2");
>> --
>> 1.7.1
>>
>
> Thanks.
>
> --
> Dmitry
^ permalink raw reply
* [PATCH V6 2/2] video: drm: exynos: Add device tree support
From: Leela Krishna Amudala @ 2012-10-03 4:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5069C2DC.8080905@wwwdotorg.org>
On Mon, Oct 1, 2012 at 9:50 PM, Stephen Warren <swarren@wwwdotorg.org> wrote:
> On 09/30/2012 11:29 PM, Leela Krishna Amudala wrote:
>> Hello Stephen Warren,
>>
>> The binding names that I use in my dts file should match with the
>> names given in http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html
>> right?
>
> I don't think so; the binding in that link is for example:
>
>> + - xres, yres: Display resolution
>> + - left-margin, right-margin, hsync-len: Horizontal Display timing parameters
>> + in pixels
>> + upper-margin, lower-margin, vsync-len: Vertical display timing parameters in
>> + lines
>> + - clock: displayclock in Hz
>
> i.e. a bunch of separate properties, one for each value needed to
> describe the display timing. However, your patch contains:
>
I mean to say that even I have to use separate properties for each one
instead of grouping them.
Also the names should match with the ones given in the example..?
>>>> + - samsung,fimd-display: This property should specify the phandle of the
>>>> + display device node which holds the video interface timing with the
>>>> + below mentioned properties.
>>>> +
>>>> + - lcd-htiming: Specifies the horizontal timing for the overlay. The
>>>> + horizontal timing includes four parameters in the following order.
>>>> +
>>>> + - horizontal back porch (in number of lcd clocks)
>>>> + - horizontal front porch (in number of lcd clocks)
>>>> + - hsync pulse width (in number of lcd clocks)
>>>> + - Display panels X resolution.
>
> A single lcd-htiming property, which contains 4 values. (and a similar
> construct for the vertical timing).
>
> That seems entirely different to me...
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss at lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply
* [PATCH] ARM: MMUless Core: Fix insmod error - module relocation out of range
From: Pratyush Anand @ 2012-10-03 3:43 UTC (permalink / raw)
To: linux-arm-kernel
From: Neha MAKHIJA <neha.makhija-ext@st.com>
ARM supports 32Mb jump. Hence branch instruction has a limited range.
For MMU systems, the module area is located just before the kernel memory
because this allows function calls to be linked directly without any indirect
branches.
In case of MMU-less system, Module area is given whole of the DDR address
space. Since, module_alloc() calls vmalloc(), the module area goes outside the
allowed jump range. Due to this insmod will not be able to load the modules
giving out of range relocation errors.
Solution - Add the mlong-calls flags while compiling the modules. This tells
the compiler to perform function calls by first loading the address of the
function and then performing a subroutine function call on this register.
Signed-off-by: Neha Makhija <neha.makhija-ext@st.com>
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
---
arch/arm/Makefile | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 88eec8f..78b5c12 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -112,6 +112,10 @@ CFLAGS_MODULE +=-fno-optimize-sibling-calls
endif
endif
+ifeq ($(CONFIG_MMU),)
+CFLAGS_MODULE +=-mlong-calls
+endif
+
# Need -Uarm for gcc < 3.x
KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_THUMB2) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm
KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_THUMB2) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float
--
1.7.5.4
^ permalink raw reply related
* [PATCH 5/6] ARM: OMAP: remove plat/clock.h
From: Paul Walmsley @ 2012-10-03 2:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121002231446.GU4840@atomide.com>
On Tue, 2 Oct 2012, Tony Lindgren wrote:
> But you can see where the duplicates are with:
>
> $ grep -rc 'include "clock.h"' arch/arm/*omap*/* | grep ":2"
OK thanks. Updated the patch here, and planning to wait until 3.7-rc1 is
out before sending a pull request for 3.8 cleanup.
- Paul
From: Paul Walmsley <paul@pwsan.com>
Date: Wed, 26 Sep 2012 17:55:04 -0600
Subject: [PATCH] ARM: OMAP: remove plat/clock.h
Remove arch/arm/plat-omap/include/plat/clock.h by merging it into
arch/arm/mach-omap1/clock.h and arch/arm/mach-omap2/clock.h.
The goal here is to facilitate ARM single image kernels by removing
includes via the "plat/" symlink.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
[tony at atomide.com: fixed to remove duplicate clock.h includes]
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap1/board-nokia770.c | 2 +-
arch/arm/mach-omap1/clock.c | 1 -
arch/arm/mach-omap1/clock.h | 153 ++++++++++++-
arch/arm/mach-omap1/clock_data.c | 1 -
arch/arm/mach-omap1/pm.c | 2 +-
arch/arm/mach-omap2/clkt2xxx_apll.c | 1 -
arch/arm/mach-omap2/clkt2xxx_dpll.c | 2 -
arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 1 -
arch/arm/mach-omap2/clkt2xxx_osc.c | 2 -
arch/arm/mach-omap2/clkt2xxx_sys.c | 2 -
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 1 -
arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 1 -
arch/arm/mach-omap2/clkt_clksel.c | 2 -
arch/arm/mach-omap2/clkt_dpll.c | 2 -
arch/arm/mach-omap2/clkt_iclk.c | 1 -
arch/arm/mach-omap2/clock.c | 1 -
arch/arm/mach-omap2/clock.h | 284 ++++++++++++++++++++++-
arch/arm/mach-omap2/clock2430.c | 2 -
arch/arm/mach-omap2/clock2xxx.c | 2 -
arch/arm/mach-omap2/clock34xx.c | 2 -
arch/arm/mach-omap2/clock3517.c | 2 -
arch/arm/mach-omap2/clock36xx.c | 2 -
arch/arm/mach-omap2/clock3xxx.c | 2 -
arch/arm/mach-omap2/clockdomain.c | 2 +-
arch/arm/mach-omap2/clockdomain.h | 2 +-
arch/arm/mach-omap2/common.c | 2 +-
arch/arm/mach-omap2/dpll3xxx.c | 2 -
arch/arm/mach-omap2/dpll44xx.c | 2 -
arch/arm/mach-omap2/omap_hwmod.c | 2 +-
arch/arm/mach-omap2/pm-debug.c | 2 +-
arch/arm/mach-omap2/pm24xx.c | 2 +-
arch/arm/mach-omap2/sdram-nokia.c | 2 +-
arch/arm/mach-omap2/sdrc.c | 2 +-
arch/arm/mach-omap2/sdrc2xxx.c | 1 -
arch/arm/plat-omap/counter_32k.c | 1 -
arch/arm/plat-omap/include/plat/clock.h | 309 --------------------------
arch/arm/plat-omap/omap_device.c | 1 -
37 files changed, 445 insertions(+), 358 deletions(-)
delete mode 100644 arch/arm/plat-omap/include/plat/clock.h
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index ec01f03..fef0a93 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -29,7 +29,7 @@
#include <plat/keypad.h>
#include <plat/lcd_mipid.h>
#include <plat/mmc.h>
-#include <plat/clock.h>
+#include "clock.h"
#include <mach/hardware.h>
#include <mach/usb.h>
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 76c3f13..3bd98d6 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -24,7 +24,6 @@
#include <plat/cpu.h>
#include <plat/usb.h>
-#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/clkdev_omap.h>
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 3d04f4f..155ddd9 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -14,8 +14,159 @@
#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
#include <linux/clk.h>
+#include <linux/list.h>
-#include <plat/clock.h>
+struct module;
+struct clk;
+
+/* Temporary, needed during the common clock framework conversion */
+#define __clk_get_name(clk) (clk->name)
+#define __clk_get_parent(clk) (clk->parent)
+#define __clk_get_rate(clk) (clk->rate)
+
+/**
+ * struct clkops - some clock function pointers
+ * @enable: fn ptr that enables the current clock in hardware
+ * @disable: fn ptr that enables the current clock in hardware
+ * @find_idlest: function returning the IDLEST register for the clock's IP blk
+ * @find_companion: function returning the "companion" clk reg for the clock
+ * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
+ * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
+ *
+ * A "companion" clk is an accompanying clock to the one being queried
+ * that must be enabled for the IP module connected to the clock to
+ * become accessible by the hardware. Neither @find_idlest nor
+ * @find_companion should be needed; that information is IP
+ * block-specific; the hwmod code has been created to handle this, but
+ * until hwmod data is ready and drivers have been converted to use PM
+ * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
+ * @find_companion must, unfortunately, remain.
+ */
+struct clkops {
+ int (*enable)(struct clk *);
+ void (*disable)(struct clk *);
+ void (*find_idlest)(struct clk *, void __iomem **,
+ u8 *, u8 *);
+ void (*find_companion)(struct clk *, void __iomem **,
+ u8 *);
+ void (*allow_idle)(struct clk *);
+ void (*deny_idle)(struct clk *);
+};
+
+/*
+ * struct clk.flags possibilities
+ *
+ * XXX document the rest of the clock flags here
+ *
+ * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
+ * bits share the same register. This flag allows the
+ * omap4_dpllmx*() code to determine which GATE_CTRL bit field
+ * should be used. This is a temporary solution - a better approach
+ * would be to associate clock type-specific data with the clock,
+ * similar to the struct dpll_data approach.
+ */
+#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
+#define CLOCK_IDLE_CONTROL (1 << 1)
+#define CLOCK_NO_IDLE_PARENT (1 << 2)
+#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
+#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
+#define CLOCK_CLKOUTX2 (1 << 5)
+
+/**
+ * struct clk - OMAP struct clk
+ * @node: list_head connecting this clock into the full clock list
+ * @ops: struct clkops * for this clock
+ * @name: the name of the clock in the hardware (used in hwmod data and debug)
+ * @parent: pointer to this clock's parent struct clk
+ * @children: list_head connecting to the child clks' @sibling list_heads
+ * @sibling: list_head connecting this clk to its parent clk's @children
+ * @rate: current clock rate
+ * @enable_reg: register to write to enable the clock (see @enable_bit)
+ * @recalc: fn ptr that returns the clock's current rate
+ * @set_rate: fn ptr that can change the clock's current rate
+ * @round_rate: fn ptr that can round the clock's current rate
+ * @init: fn ptr to do clock-specific initialization
+ * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
+ * @usecount: number of users that have requested this clock to be enabled
+ * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
+ * @flags: see "struct clk.flags possibilities" above
+ * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
+ * @src_offset: bitshift for source selection bitfield (OMAP1 only)
+ *
+ * XXX @rate_offset, @src_offset should probably be removed and OMAP1
+ * clock code converted to use clksel.
+ *
+ * XXX @usecount is poorly named. It should be "enable_count" or
+ * something similar. "users" in the description refers to kernel
+ * code (core code or drivers) that have called clk_enable() and not
+ * yet called clk_disable(); the usecount of parent clocks is also
+ * incremented by the clock code when clk_enable() is called on child
+ * clocks and decremented by the clock code when clk_disable() is
+ * called on child clocks.
+ *
+ * XXX @clkdm, @usecount, @children, @sibling should be marked for
+ * internal use only.
+ *
+ * @children and @sibling are used to optimize parent-to-child clock
+ * tree traversals. (child-to-parent traversals use @parent.)
+ *
+ * XXX The notion of the clock's current rate probably needs to be
+ * separated from the clock's target rate.
+ */
+struct clk {
+ struct list_head node;
+ const struct clkops *ops;
+ const char *name;
+ struct clk *parent;
+ struct list_head children;
+ struct list_head sibling; /* node for children */
+ unsigned long rate;
+ void __iomem *enable_reg;
+ unsigned long (*recalc)(struct clk *);
+ int (*set_rate)(struct clk *, unsigned long);
+ long (*round_rate)(struct clk *, unsigned long);
+ void (*init)(struct clk *);
+ u8 enable_bit;
+ s8 usecount;
+ u8 fixed_div;
+ u8 flags;
+ u8 rate_offset;
+ u8 src_offset;
+#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
+ struct dentry *dent; /* For visible tree hierarchy */
+#endif
+};
+
+struct clk_functions {
+ int (*clk_enable)(struct clk *clk);
+ void (*clk_disable)(struct clk *clk);
+ long (*clk_round_rate)(struct clk *clk, unsigned long rate);
+ int (*clk_set_rate)(struct clk *clk, unsigned long rate);
+ int (*clk_set_parent)(struct clk *clk, struct clk *parent);
+ void (*clk_allow_idle)(struct clk *clk);
+ void (*clk_deny_idle)(struct clk *clk);
+ void (*clk_disable_unused)(struct clk *clk);
+};
+
+extern int mpurate;
+
+extern int clk_init(struct clk_functions *custom_clocks);
+extern void clk_preinit(struct clk *clk);
+extern int clk_register(struct clk *clk);
+extern void clk_reparent(struct clk *child, struct clk *parent);
+extern void clk_unregister(struct clk *clk);
+extern void propagate_rate(struct clk *clk);
+extern void recalculate_root_clocks(void);
+extern unsigned long followparent_recalc(struct clk *clk);
+extern void clk_enable_init_clocks(void);
+unsigned long omap_fixed_divisor_recalc(struct clk *clk);
+extern struct clk *omap_clk_get_by_name(const char *name);
+extern int omap_clk_enable_autoidle_all(void);
+extern int omap_clk_disable_autoidle_all(void);
+
+extern const struct clkops clkops_null;
+
+extern struct clk dummy_ck;
int omap1_clk_init(void);
void omap1_clk_late_init(void);
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 53e166c..f5033a0 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -22,7 +22,6 @@
#include <asm/mach-types.h> /* for machine_is_* */
-#include <plat/clock.h>
#include <plat/cpu.h>
#include <plat/clkdev_omap.h>
#include <plat/sram.h> /* for omap_sram_reprogram_clock() */
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index b2560d3..7049415 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -50,7 +50,7 @@
#include <asm/mach/irq.h>
#include <plat/cpu.h>
-#include <plat/clock.h>
+#include "clock.h"
#include <plat/sram.h>
#include <plat/tc.h>
#include <plat/mux.h>
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c
index c2d15212..73a1414 100644
--- a/arch/arm/mach-omap2/clkt2xxx_apll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_apll.c
@@ -21,7 +21,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
#include <plat/prcm.h>
#include "clock.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpll.c b/arch/arm/mach-omap2/clkt2xxx_dpll.c
index 1502a7b..0890ba9 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpll.c
@@ -14,8 +14,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "clock.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index 4ae4392..8de67a5 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -25,7 +25,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/sdrc.h>
diff --git a/arch/arm/mach-omap2/clkt2xxx_osc.c b/arch/arm/mach-omap2/clkt2xxx_osc.c
index c346092..e177737 100644
--- a/arch/arm/mach-omap2/clkt2xxx_osc.c
+++ b/arch/arm/mach-omap2/clkt2xxx_osc.c
@@ -23,8 +23,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "clock.h"
#include "clock2xxx.h"
#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_sys.c b/arch/arm/mach-omap2/clkt2xxx_sys.c
index 8693cfd..46683b3 100644
--- a/arch/arm/mach-omap2/clkt2xxx_sys.c
+++ b/arch/arm/mach-omap2/clkt2xxx_sys.c
@@ -22,8 +22,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "clock.h"
#include "clock2xxx.h"
#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 3524f0e..b601e49 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -33,7 +33,6 @@
#include <linux/cpufreq.h>
#include <linux/slab.h>
-#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/sdrc.h>
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index 7c6da2f..f5ae26e 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -21,7 +21,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/sdrc.h>
diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c
index eaed390..58afd7b 100644
--- a/arch/arm/mach-omap2/clkt_clksel.c
+++ b/arch/arm/mach-omap2/clkt_clksel.c
@@ -45,8 +45,6 @@
#include <linux/io.h>
#include <linux/bug.h>
-#include <plat/clock.h>
-
#include "clock.h"
/* Private functions */
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 8041114..8463cc3 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -21,8 +21,6 @@
#include <asm/div64.h>
-#include <plat/clock.h>
-
#include "soc.h"
#include "clock.h"
#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/clkt_iclk.c b/arch/arm/mach-omap2/clkt_iclk.c
index 3d43fba..7c8d41e 100644
--- a/arch/arm/mach-omap2/clkt_iclk.c
+++ b/arch/arm/mach-omap2/clkt_iclk.c
@@ -14,7 +14,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
#include <plat/prcm.h>
#include "clock.h"
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 33f5b5d..8b30759 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -26,7 +26,6 @@
#include <asm/cpu.h>
-#include <plat/clock.h>
#include <plat/prcm.h>
#include <trace/events/power.h>
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 35ec5f3..c3bf8c2 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -17,8 +17,290 @@
#define __ARCH_ARM_MACH_OMAP2_CLOCK_H
#include <linux/kernel.h>
+#include <linux/list.h>
+
+struct module;
+struct clk;
+struct clockdomain;
+
+/* Temporary, needed during the common clock framework conversion */
+#define __clk_get_name(clk) (clk->name)
+#define __clk_get_parent(clk) (clk->parent)
+#define __clk_get_rate(clk) (clk->rate)
+
+/**
+ * struct clkops - some clock function pointers
+ * @enable: fn ptr that enables the current clock in hardware
+ * @disable: fn ptr that enables the current clock in hardware
+ * @find_idlest: function returning the IDLEST register for the clock's IP blk
+ * @find_companion: function returning the "companion" clk reg for the clock
+ * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
+ * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
+ *
+ * A "companion" clk is an accompanying clock to the one being queried
+ * that must be enabled for the IP module connected to the clock to
+ * become accessible by the hardware. Neither @find_idlest nor
+ * @find_companion should be needed; that information is IP
+ * block-specific; the hwmod code has been created to handle this, but
+ * until hwmod data is ready and drivers have been converted to use PM
+ * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
+ * @find_companion must, unfortunately, remain.
+ */
+struct clkops {
+ int (*enable)(struct clk *);
+ void (*disable)(struct clk *);
+ void (*find_idlest)(struct clk *, void __iomem **,
+ u8 *, u8 *);
+ void (*find_companion)(struct clk *, void __iomem **,
+ u8 *);
+ void (*allow_idle)(struct clk *);
+ void (*deny_idle)(struct clk *);
+};
+
+/* struct clksel_rate.flags possibilities */
+#define RATE_IN_242X (1 << 0)
+#define RATE_IN_243X (1 << 1)
+#define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */
+#define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */
+#define RATE_IN_36XX (1 << 4)
+#define RATE_IN_4430 (1 << 5)
+#define RATE_IN_TI816X (1 << 6)
+#define RATE_IN_4460 (1 << 7)
+#define RATE_IN_AM33XX (1 << 8)
+#define RATE_IN_TI814X (1 << 9)
+
+#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
+#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
+#define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX)
+#define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460)
+
+/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
+#define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
+
+
+/**
+ * struct clksel_rate - register bitfield values corresponding to clk divisors
+ * @val: register bitfield value (shifted to bit 0)
+ * @div: clock divisor corresponding to @val
+ * @flags: (see "struct clksel_rate.flags possibilities" above)
+ *
+ * @val should match the value of a read from struct clk.clksel_reg
+ * AND'ed with struct clk.clksel_mask, shifted right to bit 0.
+ *
+ * @div is the divisor that should be applied to the parent clock's rate
+ * to produce the current clock's rate.
+ */
+struct clksel_rate {
+ u32 val;
+ u8 div;
+ u16 flags;
+};
+
+/**
+ * struct clksel - available parent clocks, and a pointer to their divisors
+ * @parent: struct clk * to a possible parent clock
+ * @rates: available divisors for this parent clock
+ *
+ * A struct clksel is always associated with one or more struct clks
+ * and one or more struct clksel_rates.
+ */
+struct clksel {
+ struct clk *parent;
+ const struct clksel_rate *rates;
+};
+
+/**
+ * struct dpll_data - DPLL registers and integration data
+ * @mult_div1_reg: register containing the DPLL M and N bitfields
+ * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
+ * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
+ * @clk_bypass: struct clk pointer to the clock's bypass clock input
+ * @clk_ref: struct clk pointer to the clock's reference clock input
+ * @control_reg: register containing the DPLL mode bitfield
+ * @enable_mask: mask of the DPLL mode bitfield in @control_reg
+ * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate()
+ * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate()
+ * @max_multiplier: maximum valid non-bypass multiplier value (actual)
+ * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate()
+ * @min_divider: minimum valid non-bypass divider value (actual)
+ * @max_divider: maximum valid non-bypass divider value (actual)
+ * @modes: possible values of @enable_mask
+ * @autoidle_reg: register containing the DPLL autoidle mode bitfield
+ * @idlest_reg: register containing the DPLL idle status bitfield
+ * @autoidle_mask: mask of the DPLL autoidle mode bitfield in @autoidle_reg
+ * @freqsel_mask: mask of the DPLL jitter correction bitfield in @control_reg
+ * @idlest_mask: mask of the DPLL idle status bitfield in @idlest_reg
+ * @auto_recal_bit: bitshift of the driftguard enable bit in @control_reg
+ * @recal_en_bit: bitshift of the PRM_IRQENABLE_* bit for recalibration IRQs
+ * @recal_st_bit: bitshift of the PRM_IRQSTATUS_* bit for recalibration IRQs
+ * @flags: DPLL type/features (see below)
+ *
+ * Possible values for @flags:
+ * DPLL_J_TYPE: "J-type DPLL" (only some 36xx, 4xxx DPLLs)
+ *
+ * @freqsel_mask is only used on the OMAP34xx family and AM35xx.
+ *
+ * XXX Some DPLLs have multiple bypass inputs, so it's not technically
+ * correct to only have one @clk_bypass pointer.
+ *
+ * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m,
+ * @last_rounded_n) should be separated from the runtime-fixed fields
+ * and placed into a different structure, so that the runtime-fixed data
+ * can be placed into read-only space.
+ */
+struct dpll_data {
+ void __iomem *mult_div1_reg;
+ u32 mult_mask;
+ u32 div1_mask;
+ struct clk *clk_bypass;
+ struct clk *clk_ref;
+ void __iomem *control_reg;
+ u32 enable_mask;
+ unsigned long last_rounded_rate;
+ u16 last_rounded_m;
+ u16 max_multiplier;
+ u8 last_rounded_n;
+ u8 min_divider;
+ u16 max_divider;
+ u8 modes;
+ void __iomem *autoidle_reg;
+ void __iomem *idlest_reg;
+ u32 autoidle_mask;
+ u32 freqsel_mask;
+ u32 idlest_mask;
+ u32 dco_mask;
+ u32 sddiv_mask;
+ u8 auto_recal_bit;
+ u8 recal_en_bit;
+ u8 recal_st_bit;
+ u8 flags;
+};
+
+/*
+ * struct clk.flags possibilities
+ *
+ * XXX document the rest of the clock flags here
+ *
+ * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
+ * bits share the same register. This flag allows the
+ * omap4_dpllmx*() code to determine which GATE_CTRL bit field
+ * should be used. This is a temporary solution - a better approach
+ * would be to associate clock type-specific data with the clock,
+ * similar to the struct dpll_data approach.
+ */
+#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
+#define CLOCK_IDLE_CONTROL (1 << 1)
+#define CLOCK_NO_IDLE_PARENT (1 << 2)
+#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
+#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
+#define CLOCK_CLKOUTX2 (1 << 5)
+
+/**
+ * struct clk - OMAP struct clk
+ * @node: list_head connecting this clock into the full clock list
+ * @ops: struct clkops * for this clock
+ * @name: the name of the clock in the hardware (used in hwmod data and debug)
+ * @parent: pointer to this clock's parent struct clk
+ * @children: list_head connecting to the child clks' @sibling list_heads
+ * @sibling: list_head connecting this clk to its parent clk's @children
+ * @rate: current clock rate
+ * @enable_reg: register to write to enable the clock (see @enable_bit)
+ * @recalc: fn ptr that returns the clock's current rate
+ * @set_rate: fn ptr that can change the clock's current rate
+ * @round_rate: fn ptr that can round the clock's current rate
+ * @init: fn ptr to do clock-specific initialization
+ * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
+ * @usecount: number of users that have requested this clock to be enabled
+ * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
+ * @flags: see "struct clk.flags possibilities" above
+ * @clksel_reg: for clksel clks, register va containing src/divisor select
+ * @clksel_mask: bitmask in @clksel_reg for the src/divisor selector
+ * @clksel: for clksel clks, pointer to struct clksel for this clock
+ * @dpll_data: for DPLLs, pointer to struct dpll_data for this clock
+ * @clkdm_name: clockdomain name that this clock is contained in
+ * @clkdm: pointer to struct clockdomain, resolved from @clkdm_name at runtime
+ * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
+ * @src_offset: bitshift for source selection bitfield (OMAP1 only)
+ *
+ * XXX @rate_offset, @src_offset should probably be removed and OMAP1
+ * clock code converted to use clksel.
+ *
+ * XXX @usecount is poorly named. It should be "enable_count" or
+ * something similar. "users" in the description refers to kernel
+ * code (core code or drivers) that have called clk_enable() and not
+ * yet called clk_disable(); the usecount of parent clocks is also
+ * incremented by the clock code when clk_enable() is called on child
+ * clocks and decremented by the clock code when clk_disable() is
+ * called on child clocks.
+ *
+ * XXX @clkdm, @usecount, @children, @sibling should be marked for
+ * internal use only.
+ *
+ * @children and @sibling are used to optimize parent-to-child clock
+ * tree traversals. (child-to-parent traversals use @parent.)
+ *
+ * XXX The notion of the clock's current rate probably needs to be
+ * separated from the clock's target rate.
+ */
+struct clk {
+ struct list_head node;
+ const struct clkops *ops;
+ const char *name;
+ struct clk *parent;
+ struct list_head children;
+ struct list_head sibling; /* node for children */
+ unsigned long rate;
+ void __iomem *enable_reg;
+ unsigned long (*recalc)(struct clk *);
+ int (*set_rate)(struct clk *, unsigned long);
+ long (*round_rate)(struct clk *, unsigned long);
+ void (*init)(struct clk *);
+ u8 enable_bit;
+ s8 usecount;
+ u8 fixed_div;
+ u8 flags;
+ void __iomem *clksel_reg;
+ u32 clksel_mask;
+ const struct clksel *clksel;
+ struct dpll_data *dpll_data;
+ const char *clkdm_name;
+ struct clockdomain *clkdm;
+#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
+ struct dentry *dent; /* For visible tree hierarchy */
+#endif
+};
+
+struct clk_functions {
+ int (*clk_enable)(struct clk *clk);
+ void (*clk_disable)(struct clk *clk);
+ long (*clk_round_rate)(struct clk *clk, unsigned long rate);
+ int (*clk_set_rate)(struct clk *clk, unsigned long rate);
+ int (*clk_set_parent)(struct clk *clk, struct clk *parent);
+ void (*clk_allow_idle)(struct clk *clk);
+ void (*clk_deny_idle)(struct clk *clk);
+ void (*clk_disable_unused)(struct clk *clk);
+};
+
+extern int mpurate;
+
+extern int clk_init(struct clk_functions *custom_clocks);
+extern void clk_preinit(struct clk *clk);
+extern int clk_register(struct clk *clk);
+extern void clk_reparent(struct clk *child, struct clk *parent);
+extern void clk_unregister(struct clk *clk);
+extern void propagate_rate(struct clk *clk);
+extern void recalculate_root_clocks(void);
+extern unsigned long followparent_recalc(struct clk *clk);
+extern void clk_enable_init_clocks(void);
+unsigned long omap_fixed_divisor_recalc(struct clk *clk);
+extern struct clk *omap_clk_get_by_name(const char *name);
+extern int omap_clk_enable_autoidle_all(void);
+extern int omap_clk_disable_autoidle_all(void);
+
+extern const struct clkops clkops_null;
+
+extern struct clk dummy_ck;
-#include <plat/clock.h>
/* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */
#define CORE_CLK_SRC_32K 0x0
diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c
index a8e3261..850f83e 100644
--- a/arch/arm/mach-omap2/clock2430.c
+++ b/arch/arm/mach-omap2/clock2430.c
@@ -21,8 +21,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "soc.h"
#include "iomap.h"
#include "clock.h"
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index e92be1fc..5feee16 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -22,8 +22,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "soc.h"
#include "clock.h"
#include "clock2xxx.h"
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 1fc96b9..baaaa42 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -21,8 +21,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "clock.h"
#include "clock34xx.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clock3517.c b/arch/arm/mach-omap2/clock3517.c
index 2e97d08..8020905 100644
--- a/arch/arm/mach-omap2/clock3517.c
+++ b/arch/arm/mach-omap2/clock3517.c
@@ -21,8 +21,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "clock.h"
#include "clock3517.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c
index 0c5e25e..0e1e9e4 100644
--- a/arch/arm/mach-omap2/clock36xx.c
+++ b/arch/arm/mach-omap2/clock36xx.c
@@ -22,8 +22,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "clock.h"
#include "clock36xx.h"
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index 83bb014..3e8aca2 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -21,8 +21,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "soc.h"
#include "clock.h"
#include "clock3xxx.h"
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index cbb87913..32dbcbc 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -27,7 +27,7 @@
#include <linux/bitops.h>
-#include <plat/clock.h>
+#include "clock.h"
#include "clockdomain.h"
/* clkdm_list contains all registered struct clockdomains */
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 629576b..79e4503 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -18,7 +18,7 @@
#include <linux/spinlock.h>
#include "powerdomain.h"
-#include <plat/clock.h>
+#include "clock.h"
#include <plat/omap_hwmod.h>
#include <plat/cpu.h>
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 8e43c4d8..bc2ea50 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -18,7 +18,7 @@
#include <linux/io.h>
#include <plat/mux.h>
-#include <plat/clock.h>
+#include "clock.h"
#include "soc.h"
#include "iomap.h"
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 814e180..eacf51f 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -28,8 +28,6 @@
#include <linux/bitops.h>
#include <linux/clkdev.h>
-#include <plat/clock.h>
-
#include "soc.h"
#include "clock.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index 09d0ccc..5854da1 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -15,8 +15,6 @@
#include <linux/io.h>
#include <linux/bitops.h>
-#include <plat/clock.h>
-
#include "soc.h"
#include "clock.h"
#include "clock44xx.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6af64bb..1dd97fc 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -139,7 +139,7 @@
#include <linux/slab.h>
#include <linux/bootmem.h>
-#include <plat/clock.h>
+#include "clock.h"
#include <plat/omap_hwmod.h>
#include <plat/prcm.h>
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 3e1345f..66cdda3 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -27,7 +27,7 @@
#include <linux/module.h>
#include <linux/slab.h>
-#include <plat/clock.h>
+#include "clock.h"
#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/dmtimer.h>
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 8af6cd6..0308692 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -36,7 +36,7 @@
#include <asm/mach-types.h>
#include <asm/system_misc.h>
-#include <plat/clock.h>
+#include "clock.h"
#include <plat/sram.h>
#include <plat/dma.h>
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c
index 845c4fd..db96066 100644
--- a/arch/arm/mach-omap2/sdram-nokia.c
+++ b/arch/arm/mach-omap2/sdram-nokia.c
@@ -18,7 +18,7 @@
#include <linux/io.h>
#include "common.h"
-#include <plat/clock.h>
+#include "clock.h"
#include <plat/sdrc.h>
#include "sdram-nokia.h"
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index e3d345f..70971e9 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -24,7 +24,7 @@
#include <linux/io.h>
#include "common.h"
-#include <plat/clock.h>
+#include "clock.h"
#include <plat/sram.h>
#include <plat/sdrc.h>
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index 73e55e4..6e6cb1c 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -24,7 +24,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/sdrc.h>
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 2e826f1..fd04e66 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -23,7 +23,6 @@
#include <asm/sched_clock.h>
#include <plat/common.h>
-#include <plat/clock.h>
/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
#define OMAP2_32KSYNCNT_REV_OFF 0x0
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
deleted file mode 100644
index e2e2d04..0000000
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ /dev/null
@@ -1,309 +0,0 @@
-/*
- * OMAP clock: data structure definitions, function prototypes, shared macros
- *
- * Copyright (C) 2004-2005, 2008-2010 Nokia Corporation
- * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
- * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_OMAP_CLOCK_H
-#define __ARCH_ARM_OMAP_CLOCK_H
-
-#include <linux/list.h>
-
-struct module;
-struct clk;
-struct clockdomain;
-
-/* Temporary, needed during the common clock framework conversion */
-#define __clk_get_name(clk) (clk->name)
-#define __clk_get_parent(clk) (clk->parent)
-#define __clk_get_rate(clk) (clk->rate)
-
-/**
- * struct clkops - some clock function pointers
- * @enable: fn ptr that enables the current clock in hardware
- * @disable: fn ptr that enables the current clock in hardware
- * @find_idlest: function returning the IDLEST register for the clock's IP blk
- * @find_companion: function returning the "companion" clk reg for the clock
- * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
- * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
- *
- * A "companion" clk is an accompanying clock to the one being queried
- * that must be enabled for the IP module connected to the clock to
- * become accessible by the hardware. Neither @find_idlest nor
- * @find_companion should be needed; that information is IP
- * block-specific; the hwmod code has been created to handle this, but
- * until hwmod data is ready and drivers have been converted to use PM
- * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
- * @find_companion must, unfortunately, remain.
- */
-struct clkops {
- int (*enable)(struct clk *);
- void (*disable)(struct clk *);
- void (*find_idlest)(struct clk *, void __iomem **,
- u8 *, u8 *);
- void (*find_companion)(struct clk *, void __iomem **,
- u8 *);
- void (*allow_idle)(struct clk *);
- void (*deny_idle)(struct clk *);
-};
-
-#ifdef CONFIG_ARCH_OMAP2PLUS
-
-/* struct clksel_rate.flags possibilities */
-#define RATE_IN_242X (1 << 0)
-#define RATE_IN_243X (1 << 1)
-#define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */
-#define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */
-#define RATE_IN_36XX (1 << 4)
-#define RATE_IN_4430 (1 << 5)
-#define RATE_IN_TI816X (1 << 6)
-#define RATE_IN_4460 (1 << 7)
-#define RATE_IN_AM33XX (1 << 8)
-#define RATE_IN_TI814X (1 << 9)
-
-#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
-#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
-#define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX)
-#define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460)
-
-/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
-#define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
-
-
-/**
- * struct clksel_rate - register bitfield values corresponding to clk divisors
- * @val: register bitfield value (shifted to bit 0)
- * @div: clock divisor corresponding to @val
- * @flags: (see "struct clksel_rate.flags possibilities" above)
- *
- * @val should match the value of a read from struct clk.clksel_reg
- * AND'ed with struct clk.clksel_mask, shifted right to bit 0.
- *
- * @div is the divisor that should be applied to the parent clock's rate
- * to produce the current clock's rate.
- */
-struct clksel_rate {
- u32 val;
- u8 div;
- u16 flags;
-};
-
-/**
- * struct clksel - available parent clocks, and a pointer to their divisors
- * @parent: struct clk * to a possible parent clock
- * @rates: available divisors for this parent clock
- *
- * A struct clksel is always associated with one or more struct clks
- * and one or more struct clksel_rates.
- */
-struct clksel {
- struct clk *parent;
- const struct clksel_rate *rates;
-};
-
-/**
- * struct dpll_data - DPLL registers and integration data
- * @mult_div1_reg: register containing the DPLL M and N bitfields
- * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
- * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
- * @clk_bypass: struct clk pointer to the clock's bypass clock input
- * @clk_ref: struct clk pointer to the clock's reference clock input
- * @control_reg: register containing the DPLL mode bitfield
- * @enable_mask: mask of the DPLL mode bitfield in @control_reg
- * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate()
- * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate()
- * @max_multiplier: maximum valid non-bypass multiplier value (actual)
- * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate()
- * @min_divider: minimum valid non-bypass divider value (actual)
- * @max_divider: maximum valid non-bypass divider value (actual)
- * @modes: possible values of @enable_mask
- * @autoidle_reg: register containing the DPLL autoidle mode bitfield
- * @idlest_reg: register containing the DPLL idle status bitfield
- * @autoidle_mask: mask of the DPLL autoidle mode bitfield in @autoidle_reg
- * @freqsel_mask: mask of the DPLL jitter correction bitfield in @control_reg
- * @idlest_mask: mask of the DPLL idle status bitfield in @idlest_reg
- * @auto_recal_bit: bitshift of the driftguard enable bit in @control_reg
- * @recal_en_bit: bitshift of the PRM_IRQENABLE_* bit for recalibration IRQs
- * @recal_st_bit: bitshift of the PRM_IRQSTATUS_* bit for recalibration IRQs
- * @flags: DPLL type/features (see below)
- *
- * Possible values for @flags:
- * DPLL_J_TYPE: "J-type DPLL" (only some 36xx, 4xxx DPLLs)
- *
- * @freqsel_mask is only used on the OMAP34xx family and AM35xx.
- *
- * XXX Some DPLLs have multiple bypass inputs, so it's not technically
- * correct to only have one @clk_bypass pointer.
- *
- * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m,
- * @last_rounded_n) should be separated from the runtime-fixed fields
- * and placed into a different structure, so that the runtime-fixed data
- * can be placed into read-only space.
- */
-struct dpll_data {
- void __iomem *mult_div1_reg;
- u32 mult_mask;
- u32 div1_mask;
- struct clk *clk_bypass;
- struct clk *clk_ref;
- void __iomem *control_reg;
- u32 enable_mask;
- unsigned long last_rounded_rate;
- u16 last_rounded_m;
- u16 max_multiplier;
- u8 last_rounded_n;
- u8 min_divider;
- u16 max_divider;
- u8 modes;
- void __iomem *autoidle_reg;
- void __iomem *idlest_reg;
- u32 autoidle_mask;
- u32 freqsel_mask;
- u32 idlest_mask;
- u32 dco_mask;
- u32 sddiv_mask;
- u8 auto_recal_bit;
- u8 recal_en_bit;
- u8 recal_st_bit;
- u8 flags;
-};
-
-#endif
-
-/*
- * struct clk.flags possibilities
- *
- * XXX document the rest of the clock flags here
- *
- * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
- * bits share the same register. This flag allows the
- * omap4_dpllmx*() code to determine which GATE_CTRL bit field
- * should be used. This is a temporary solution - a better approach
- * would be to associate clock type-specific data with the clock,
- * similar to the struct dpll_data approach.
- */
-#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
-#define CLOCK_IDLE_CONTROL (1 << 1)
-#define CLOCK_NO_IDLE_PARENT (1 << 2)
-#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
-#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
-#define CLOCK_CLKOUTX2 (1 << 5)
-
-/**
- * struct clk - OMAP struct clk
- * @node: list_head connecting this clock into the full clock list
- * @ops: struct clkops * for this clock
- * @name: the name of the clock in the hardware (used in hwmod data and debug)
- * @parent: pointer to this clock's parent struct clk
- * @children: list_head connecting to the child clks' @sibling list_heads
- * @sibling: list_head connecting this clk to its parent clk's @children
- * @rate: current clock rate
- * @enable_reg: register to write to enable the clock (see @enable_bit)
- * @recalc: fn ptr that returns the clock's current rate
- * @set_rate: fn ptr that can change the clock's current rate
- * @round_rate: fn ptr that can round the clock's current rate
- * @init: fn ptr to do clock-specific initialization
- * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
- * @usecount: number of users that have requested this clock to be enabled
- * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
- * @flags: see "struct clk.flags possibilities" above
- * @clksel_reg: for clksel clks, register va containing src/divisor select
- * @clksel_mask: bitmask in @clksel_reg for the src/divisor selector
- * @clksel: for clksel clks, pointer to struct clksel for this clock
- * @dpll_data: for DPLLs, pointer to struct dpll_data for this clock
- * @clkdm_name: clockdomain name that this clock is contained in
- * @clkdm: pointer to struct clockdomain, resolved from @clkdm_name at runtime
- * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
- * @src_offset: bitshift for source selection bitfield (OMAP1 only)
- *
- * XXX @rate_offset, @src_offset should probably be removed and OMAP1
- * clock code converted to use clksel.
- *
- * XXX @usecount is poorly named. It should be "enable_count" or
- * something similar. "users" in the description refers to kernel
- * code (core code or drivers) that have called clk_enable() and not
- * yet called clk_disable(); the usecount of parent clocks is also
- * incremented by the clock code when clk_enable() is called on child
- * clocks and decremented by the clock code when clk_disable() is
- * called on child clocks.
- *
- * XXX @clkdm, @usecount, @children, @sibling should be marked for
- * internal use only.
- *
- * @children and @sibling are used to optimize parent-to-child clock
- * tree traversals. (child-to-parent traversals use @parent.)
- *
- * XXX The notion of the clock's current rate probably needs to be
- * separated from the clock's target rate.
- */
-struct clk {
- struct list_head node;
- const struct clkops *ops;
- const char *name;
- struct clk *parent;
- struct list_head children;
- struct list_head sibling; /* node for children */
- unsigned long rate;
- void __iomem *enable_reg;
- unsigned long (*recalc)(struct clk *);
- int (*set_rate)(struct clk *, unsigned long);
- long (*round_rate)(struct clk *, unsigned long);
- void (*init)(struct clk *);
- u8 enable_bit;
- s8 usecount;
- u8 fixed_div;
- u8 flags;
-#ifdef CONFIG_ARCH_OMAP2PLUS
- void __iomem *clksel_reg;
- u32 clksel_mask;
- const struct clksel *clksel;
- struct dpll_data *dpll_data;
- const char *clkdm_name;
- struct clockdomain *clkdm;
-#else
- u8 rate_offset;
- u8 src_offset;
-#endif
-#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
- struct dentry *dent; /* For visible tree hierarchy */
-#endif
-};
-
-struct clk_functions {
- int (*clk_enable)(struct clk *clk);
- void (*clk_disable)(struct clk *clk);
- long (*clk_round_rate)(struct clk *clk, unsigned long rate);
- int (*clk_set_rate)(struct clk *clk, unsigned long rate);
- int (*clk_set_parent)(struct clk *clk, struct clk *parent);
- void (*clk_allow_idle)(struct clk *clk);
- void (*clk_deny_idle)(struct clk *clk);
- void (*clk_disable_unused)(struct clk *clk);
-};
-
-extern int mpurate;
-
-extern int clk_init(struct clk_functions *custom_clocks);
-extern void clk_preinit(struct clk *clk);
-extern int clk_register(struct clk *clk);
-extern void clk_reparent(struct clk *child, struct clk *parent);
-extern void clk_unregister(struct clk *clk);
-extern void propagate_rate(struct clk *clk);
-extern void recalculate_root_clocks(void);
-extern unsigned long followparent_recalc(struct clk *clk);
-extern void clk_enable_init_clocks(void);
-unsigned long omap_fixed_divisor_recalc(struct clk *clk);
-extern struct clk *omap_clk_get_by_name(const char *name);
-extern int omap_clk_enable_autoidle_all(void);
-extern int omap_clk_disable_autoidle_all(void);
-
-extern const struct clkops clkops_null;
-
-extern struct clk dummy_ck;
-
-#endif
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index 5b69742..bae5663 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -91,7 +91,6 @@
#include <plat/omap_device.h>
#include <plat/omap_hwmod.h>
-#include <plat/clock.h>
/* These parameters are passed to _omap_device_{de,}activate() */
#define USE_WAKEUP_LAT 0
--
1.7.10.4
^ permalink raw reply related
* [PATCH 2/2] arm: Add ARM ERRATA 782773 workaround
From: Simon Horman @ 2012-10-03 2:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20120928083819.GA21542@arm.com>
On Fri, Sep 28, 2012 at 09:38:19AM +0100, Catalin Marinas wrote:
> On Fri, Sep 28, 2012 at 02:02:46AM +0100, Simon Horman wrote:
> > On Fri, Sep 21, 2012 at 10:00:37AM +0900, Simon Horman wrote:
> > > On Thu, Sep 20, 2012 at 10:35:50AM +0100, Catalin Marinas wrote:
> > > > On 13 September 2012 02:00, Simon Horman <horms@verge.net.au> wrote:
> > > > > On Wed, Sep 12, 2012 at 10:59:35AM -0700, Stephen Boyd wrote:
> > > > >> On 09/12/12 00:14, Simon Horman wrote:
> > > > >> > @@ -1423,6 +1423,15 @@ config ARM_ERRATA_775420
> > > > >> > deadlock. This workaround puts DSB before executing ISB at the
> > > > >> > beginning of the abort exception handler.
> > > > >> >
> > > > >> > +config ARM_ERRATA_782773
> > > > >> > + bool "ARM errata: Updating a translation entry might cause an unexpected translation fault"
> > > > >> > + depends on CPU_V7
> > > > >> > + help
> > > > >> > + This option enables the workaround for the 782773 Cortex-A9 (all r0,
> > > > >> > + ,r2 and r3 revisions) erratum. It might cause MMU exception in case
> > > > >>
> > > > >> Seems to be an extra comma here.
> > > > >
> > > > > Thanks, here is an updated version.
> > > > >
> > > > > From: Kouei Abe <kouei.abe.cp@rms.renesas.com>
> > > > >
> > > > > arm: Add ARM ERRATA 782773 workaround
> > > > >
> > > > > Signed-off-by: Kouei Abe <kouei.abe.cp@rms.renesas.com>
> > > > > Signed-off-by: Simon Horman <horms@verge.net.au>
> > > >
> > > > I would add some text to the commit log as well, even though it
> > > > matches the Kconfig entry.
> > >
> > > Sure, an updated patch is below.
> > > I also reworded the text to make it easier on my eyes,
> > > I don't think the meaning has been altered.
> > >
> > > > Have you hit this in practice? In general the kernel shouldn't access
> > > > kernel virtual address corresponding to a page table that is being
> > > > changed. For user address space it is possible but the kernel can
> > > > handle use translation faults, even though they may be spurious.
> > >
> > > I believe that Abe-san's team have come up against this,
> > > I can confirm that if it is important.
> >
> > I was wondering if I could get an Ack on this as you indicated
> > in another email that you feel that the implementation is an
> > appropriate workaround.
>
> I'd like to know whether this is actually hit in practice and the
> conditions. The only time when we write live (i.e. translation that's
> currently in use) kernel mappings is during boot, alloc_init_section()
> replacing (though with the same value) the initial memory map. But if
> that's the scenario you are getting, I would rather add another
> flush_pmd_entry() call before setting the pmd in alloc_init_section().
>
> I'm not convinced a costly run-time workaround in set_pte is needed.
Hi Catalin,
I have discussed this the issue that you raised above with the platform
team that provided me with the workaround. Although they have not encountered a
situation in which the errata is hit they would like the workaround
considered for merging as it is needed for compliance with customer
requirements, in this case an automotive customer (I do not know which one).
^ permalink raw reply
* [PATCH] ARM: bcm2835: fix typos in DT binding documentation
From: Stephen Warren @ 2012-10-03 1:26 UTC (permalink / raw)
To: linux-arm-kernel
The compatible value shouldn't include ".txt", which was probably cut
and paste from the filename.
Reported-by: Domenico Andreoli <cavokz@gmail.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
---
.../brcm,bcm2835-armctrl-ic.txt | 2 +-
.../bindings/timer/brcm,bcm2835-system-timer.txt | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
index 548892c..7da578d 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
@@ -7,7 +7,7 @@ as "armctrl" in the SoC documentation, hence naming of this binding.
Required properties:
-- compatible : should be "brcm,bcm2835-armctrl-ic.txt"
+- compatible : should be "brcm,bcm2835-armctrl-ic"
- reg : Specifies base physical address and size of the registers.
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Specifies the number of cells needed to encode an
diff --git a/Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt b/Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt
index 2de21c2..844bd5f 100644
--- a/Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt
+++ b/Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt
@@ -7,7 +7,7 @@ free running counter values, and generates an interrupt.
Required properties:
-- compatible : should be "brcm,bcm2835-system-timer.txt"
+- compatible : should be "brcm,bcm2835-system-timer"
- reg : Specifies base physical address and size of the registers.
- interrupts : A list of 4 interrupt sinks; one per timer channel.
- clock-frequency : The frequency of the clock that drives the counter, in Hz.
--
1.7.9.5
^ permalink raw reply related
* [PATCH] ARM: arch timer: Export 'read_current_timer' symbol
From: Mark A. Greer @ 2012-10-03 0:52 UTC (permalink / raw)
To: linux-arm-kernel
From: "Mark A. Greer" <mgreer@animalcreek.com>
Commit 923df96b9f31b7d08d8438ff9677326d9537accf
(ARM: 7451/1: arch timer: implement read_current_timer and get_cycles)
modifies get_cycles() such that it calls read_current_timer().
Unfortunately, the 'read_current_timer' symbol is not exported so when
a driver that calls get_cycles() is built as a module, an undefined
reference error occurs.
A good example is the crypto/tcrypt.c (CONFIG_CRYPTO_TEST) driver
because it calls get_cycles() and can only be built as a module.
Fix this error by exporting the 'read_current_timer' symbol.
CC: Will Deacon <will.deacon@arm.com>
CC: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
---
This patch applies against current arm-soc/for-next branch.
arch/arm/kernel/armksyms.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index 60d3b73..e7a29fe 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -156,3 +156,7 @@ EXPORT_SYMBOL(__gnu_mcount_nc);
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
EXPORT_SYMBOL(__pv_phys_offset);
#endif
+
+#ifdef CONFIG_ARM_ARCH_TIMER
+EXPORT_SYMBOL(read_current_timer);
+#endif
--
1.7.12
^ permalink raw reply related
* [RFT/PATCH] serial: omap: prevent resume if device is not suspended.
From: Kevin Hilman @ 2012-10-03 0:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKdam57bpTJ94Gn=mKVw1Fm-76fVPp3DGjFuNu_HfesybM1hPg@mail.gmail.com>
"Poddar, Sourav" <sourav.poddar@ti.com> writes:
> Hi,
>
> On Tue, Sep 25, 2012 at 2:51 PM, Russell King - ARM Linux
> <linux@arm.linux.org.uk> wrote:
>> On Tue, Sep 25, 2012 at 12:11:14PM +0300, Felipe Balbi wrote:
>>> On Tue, Sep 25, 2012 at 10:12:28AM +0100, Russell King - ARM Linux wrote:
>>> > On Tue, Sep 25, 2012 at 11:31:20AM +0300, Felipe Balbi wrote:
>>> > > On Tue, Sep 25, 2012 at 09:30:29AM +0100, Russell King - ARM Linux wrote:
>>> > > > How is this happening? I think that needs proper investigation - or if
>>> > > > it's had more investigation, then the results needs to be included in
>>> > > > the commit description so that everyone can understand the issue here.
>>> > > >
>>> > > > We should not be resuming a device which hasn't been suspended. Maybe
>>> > > > the runtime PM enable sequence is wrong, and that's what should be fixed
>>> > > > instead?
>>> > > >
>>> > > > This sequence in the probe() function:
>>> > > >
>>> > > > pm_runtime_irq_safe(&pdev->dev);
>>> > > > pm_runtime_enable(&pdev->dev);
>>> > > > pm_runtime_get_sync(&pdev->dev);
>>> > > >
>>> > > > would enable runtime PM while the s/w state indicates that it's disabled,
>>> > > > and then that pm_runtime_get_sync() will want to resume the device. See
>>> > > > the section "5. Runtime PM Initialization, Device Probing and Removal"
>>> > > > in Documentation/power/runtime_pm.txt, specifically the second paragraph
>>> > > > of that section.
>>> > >
>>> > > that was tested. It worked in pandaboard but didn't work on beagleboard
>>> > > XM. Sourav tried to start a discussion about that, but it simply died...
>>> > >
>>> > > In any case, pm_runtime_get_sync() in probe will always call
>>> > > runtime_resume callback, right ?
>>> >
>>> > Well, if the runtime PM state says it's suspended, and then you enable
>>> > runtime PM, the first call to pm_runtime_get_sync() will trigger a resume
>>> > attempt. The patch description is complaining about resume events without
>>> > there being a preceding suspend event.
>>> >
>>> > This could well be why.
>>>
>>> that's most likely, of course. But should we cause a regression to
>>> beagleboard XM because of that ?
>>
>> What would cause a regression on beagleboard XM? I have not suggested
>> any change other than more investigation of the issue and a fuller patch
>> description - yet you're screaming (idiotically IMHO) that mere
>> investigation would break beagleboard.
>>
>> Well, if it's _that_ fragile, that mere investigation of this issue by
>> someone elsewhere on the planet would break your beagleboard, maybe it
>> deserves to be broken!
>
> The issue was observed at serial init itself in the N800 board and the
> log does not
> show up much.
> http://www.pwsan.com/omap/testlogs/test_tty_next_e36851d0/20120910020323/boot/2420n800/2420n800_log.txt
> What we thought the problem might be with n800 is that it tries to
> resume when it didn't suspend before.
>
> There are two ways through which we thought of handling this issue:
>
> a) set device as active before enabling pm (which will prevent
>
> pm_runtime_set_active(dev);
> pm_runtime_enable(dev);
>
> OR
>
> b) adding a "suspended" flag to struct omap_uart_port which gets set on
> suspend and cleared on resume. Then on resume you can check:
>
> if (!up->suspended)
> return 0;
>
> But using "pm_runtime_set_active" approach breaks things even on
> beagle board xm, though
> it works fine on Panda.
> Therefore, we used the "suspended" flag approach.
>
> So. I just wanted to get some feedback from community about how using
> "pm_runtime_set_active"
> behaves differently in omap3 and omap4.
As Russell has already pointed out in great detail, the difference is
simply a mismatch between assumed HW stated and actual hardware state
between various boards. Put simply, the driver assumes the HW is
disabled (runtime suspended) when it loads, and the first runtime resume
is meant to enable the HW. If that assumption is wrong, it needs to be
fixed.
Have you figured out why the HW is already active on OMAP2? (probably
bootloader?)
That being said, already active HW should not cause this problem. In
fact, because of possible early console use, the hwmod init of the UART
hwmods does not idle/reset them on boot, so they are left in the state
that the bootloader set them in.
When the hwmod is later enabled for real during probe, the hwmod muxing
is done for that IP. So, I suspect what is really happening is that the
mux settings are not right for the UARTS on n800, so when the probe
happens, the UART mux settings are changed and you lose the UART.
Can you double check the UART mux settings for that board? You might
need some different mux settings in the board file.
Kevin
^ permalink raw reply
* [PATCH 5/6] ARM: OMAP: remove plat/clock.h
From: Tony Lindgren @ 2012-10-02 23:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20120927163333.21755.48035.stgit@dusk.lan>
* Paul Walmsley <paul@pwsan.com> [120927 09:37]:
> Remove arch/arm/plat-omap/include/plat/clock.h by merging it into
> arch/arm/mach-omap1/clock.h and arch/arm/mach-omap2/clock.h.
> The goal here is to facilitate ARM single image kernels by removing
> includes via the "plat/" symlink.
Looks like this adds some duplicate #include "clock.h",
we already have it in many places, so plat/clock.h changes
can be just dropped.
I've applied your patches locally with the other plat
header cleanup and fixed up the issue keeping the existing
clock.h. Updated patch below for what I have, probably
won't apply to your branch without conflicts right now.
But you can see where the duplicates are with:
$ grep -rc 'include "clock.h"' arch/arm/*omap*/* | grep ":2"
Anyways, let's wait few days before we do some immutable
branch as we still have the late patches missing from
the mainline kernel.
Regards,
Tony
From: Paul Walmsley <paul@pwsan.com>
Date: Thu, 27 Sep 2012 10:33:34 -0600
Subject: [PATCH] ARM: OMAP: remove plat/clock.h
Remove arch/arm/plat-omap/include/plat/clock.h by merging it into
arch/arm/mach-omap1/clock.h and arch/arm/mach-omap2/clock.h.
The goal here is to facilitate ARM single image kernels by removing
includes via the "plat/" symlink.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
[tony at atomide.com: fixed to remove duplicate clock.h includes]
Signed-off-by: Tony Lindgren <tony@atomide.com>
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 8b3b60a..3e8ead67 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -29,12 +29,12 @@
#include <asm/mach/map.h>
#include <mach/mux.h>
-#include <plat/clock.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
+#include "clock.h"
#include "mmc.h"
#define ADS7846_PENDOWN_GPIO 15
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index f46206e..306772c 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -24,7 +24,6 @@
#include <plat/cpu.h>
#include <plat/usb.h>
-#include <plat/clock.h>
#include <plat/clkdev_omap.h>
#include <mach/hardware.h>
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 3d04f4f..155ddd92 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -14,8 +14,159 @@
#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
#include <linux/clk.h>
+#include <linux/list.h>
-#include <plat/clock.h>
+struct module;
+struct clk;
+
+/* Temporary, needed during the common clock framework conversion */
+#define __clk_get_name(clk) (clk->name)
+#define __clk_get_parent(clk) (clk->parent)
+#define __clk_get_rate(clk) (clk->rate)
+
+/**
+ * struct clkops - some clock function pointers
+ * @enable: fn ptr that enables the current clock in hardware
+ * @disable: fn ptr that enables the current clock in hardware
+ * @find_idlest: function returning the IDLEST register for the clock's IP blk
+ * @find_companion: function returning the "companion" clk reg for the clock
+ * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
+ * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
+ *
+ * A "companion" clk is an accompanying clock to the one being queried
+ * that must be enabled for the IP module connected to the clock to
+ * become accessible by the hardware. Neither @find_idlest nor
+ * @find_companion should be needed; that information is IP
+ * block-specific; the hwmod code has been created to handle this, but
+ * until hwmod data is ready and drivers have been converted to use PM
+ * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
+ * @find_companion must, unfortunately, remain.
+ */
+struct clkops {
+ int (*enable)(struct clk *);
+ void (*disable)(struct clk *);
+ void (*find_idlest)(struct clk *, void __iomem **,
+ u8 *, u8 *);
+ void (*find_companion)(struct clk *, void __iomem **,
+ u8 *);
+ void (*allow_idle)(struct clk *);
+ void (*deny_idle)(struct clk *);
+};
+
+/*
+ * struct clk.flags possibilities
+ *
+ * XXX document the rest of the clock flags here
+ *
+ * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
+ * bits share the same register. This flag allows the
+ * omap4_dpllmx*() code to determine which GATE_CTRL bit field
+ * should be used. This is a temporary solution - a better approach
+ * would be to associate clock type-specific data with the clock,
+ * similar to the struct dpll_data approach.
+ */
+#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
+#define CLOCK_IDLE_CONTROL (1 << 1)
+#define CLOCK_NO_IDLE_PARENT (1 << 2)
+#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
+#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
+#define CLOCK_CLKOUTX2 (1 << 5)
+
+/**
+ * struct clk - OMAP struct clk
+ * @node: list_head connecting this clock into the full clock list
+ * @ops: struct clkops * for this clock
+ * @name: the name of the clock in the hardware (used in hwmod data and debug)
+ * @parent: pointer to this clock's parent struct clk
+ * @children: list_head connecting to the child clks' @sibling list_heads
+ * @sibling: list_head connecting this clk to its parent clk's @children
+ * @rate: current clock rate
+ * @enable_reg: register to write to enable the clock (see @enable_bit)
+ * @recalc: fn ptr that returns the clock's current rate
+ * @set_rate: fn ptr that can change the clock's current rate
+ * @round_rate: fn ptr that can round the clock's current rate
+ * @init: fn ptr to do clock-specific initialization
+ * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
+ * @usecount: number of users that have requested this clock to be enabled
+ * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
+ * @flags: see "struct clk.flags possibilities" above
+ * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
+ * @src_offset: bitshift for source selection bitfield (OMAP1 only)
+ *
+ * XXX @rate_offset, @src_offset should probably be removed and OMAP1
+ * clock code converted to use clksel.
+ *
+ * XXX @usecount is poorly named. It should be "enable_count" or
+ * something similar. "users" in the description refers to kernel
+ * code (core code or drivers) that have called clk_enable() and not
+ * yet called clk_disable(); the usecount of parent clocks is also
+ * incremented by the clock code when clk_enable() is called on child
+ * clocks and decremented by the clock code when clk_disable() is
+ * called on child clocks.
+ *
+ * XXX @clkdm, @usecount, @children, @sibling should be marked for
+ * internal use only.
+ *
+ * @children and @sibling are used to optimize parent-to-child clock
+ * tree traversals. (child-to-parent traversals use @parent.)
+ *
+ * XXX The notion of the clock's current rate probably needs to be
+ * separated from the clock's target rate.
+ */
+struct clk {
+ struct list_head node;
+ const struct clkops *ops;
+ const char *name;
+ struct clk *parent;
+ struct list_head children;
+ struct list_head sibling; /* node for children */
+ unsigned long rate;
+ void __iomem *enable_reg;
+ unsigned long (*recalc)(struct clk *);
+ int (*set_rate)(struct clk *, unsigned long);
+ long (*round_rate)(struct clk *, unsigned long);
+ void (*init)(struct clk *);
+ u8 enable_bit;
+ s8 usecount;
+ u8 fixed_div;
+ u8 flags;
+ u8 rate_offset;
+ u8 src_offset;
+#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
+ struct dentry *dent; /* For visible tree hierarchy */
+#endif
+};
+
+struct clk_functions {
+ int (*clk_enable)(struct clk *clk);
+ void (*clk_disable)(struct clk *clk);
+ long (*clk_round_rate)(struct clk *clk, unsigned long rate);
+ int (*clk_set_rate)(struct clk *clk, unsigned long rate);
+ int (*clk_set_parent)(struct clk *clk, struct clk *parent);
+ void (*clk_allow_idle)(struct clk *clk);
+ void (*clk_deny_idle)(struct clk *clk);
+ void (*clk_disable_unused)(struct clk *clk);
+};
+
+extern int mpurate;
+
+extern int clk_init(struct clk_functions *custom_clocks);
+extern void clk_preinit(struct clk *clk);
+extern int clk_register(struct clk *clk);
+extern void clk_reparent(struct clk *child, struct clk *parent);
+extern void clk_unregister(struct clk *clk);
+extern void propagate_rate(struct clk *clk);
+extern void recalculate_root_clocks(void);
+extern unsigned long followparent_recalc(struct clk *clk);
+extern void clk_enable_init_clocks(void);
+unsigned long omap_fixed_divisor_recalc(struct clk *clk);
+extern struct clk *omap_clk_get_by_name(const char *name);
+extern int omap_clk_enable_autoidle_all(void);
+extern int omap_clk_disable_autoidle_all(void);
+
+extern const struct clkops clkops_null;
+
+extern struct clk dummy_ck;
int omap1_clk_init(void);
void omap1_clk_late_init(void);
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 28e58eb..8f4ae75 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -22,7 +22,6 @@
#include <asm/mach-types.h> /* for machine_is_* */
-#include <plat/clock.h>
#include <plat/cpu.h>
#include <plat/clkdev_omap.h>
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index ff7c980..81daea6 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -49,8 +49,6 @@
#include <asm/mach/time.h>
#include <asm/mach/irq.h>
-#include <plat/cpu.h>
-#include <plat/clock.h>
#include <mach/tc.h>
#include <mach/mux.h>
#include <plat/dmtimer.h>
@@ -61,6 +59,7 @@
#include "../plat-omap/sram.h"
#include "iomap.h"
+#include "clock.h"
#include "pm.h"
static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c
index c2d15212..73a1414 100644
--- a/arch/arm/mach-omap2/clkt2xxx_apll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_apll.c
@@ -21,7 +21,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
#include <plat/prcm.h>
#include "clock.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpll.c b/arch/arm/mach-omap2/clkt2xxx_dpll.c
index 1502a7b..0890ba9 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpll.c
@@ -14,8 +14,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "clock.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index 9a08840..47911bb 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -25,7 +25,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
#include <plat/sdrc.h>
#include "../plat-omap/sram.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_osc.c b/arch/arm/mach-omap2/clkt2xxx_osc.c
index c346092..e177737 100644
--- a/arch/arm/mach-omap2/clkt2xxx_osc.c
+++ b/arch/arm/mach-omap2/clkt2xxx_osc.c
@@ -23,8 +23,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "clock.h"
#include "clock2xxx.h"
#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_sys.c b/arch/arm/mach-omap2/clkt2xxx_sys.c
index 8693cfd..46683b3 100644
--- a/arch/arm/mach-omap2/clkt2xxx_sys.c
+++ b/arch/arm/mach-omap2/clkt2xxx_sys.c
@@ -22,8 +22,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "clock.h"
#include "clock2xxx.h"
#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 0bd09c1..cba3f92 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -33,7 +33,6 @@
#include <linux/cpufreq.h>
#include <linux/slab.h>
-#include <plat/clock.h>
#include <plat/sdrc.h>
#include "../plat-omap/sram.h"
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index adeaf29..3e26ac3 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -21,7 +21,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
#include <plat/sdrc.h>
#include "../plat-omap/sram.h"
diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c
index eaed390..58afd7b 100644
--- a/arch/arm/mach-omap2/clkt_clksel.c
+++ b/arch/arm/mach-omap2/clkt_clksel.c
@@ -45,8 +45,6 @@
#include <linux/io.h>
#include <linux/bug.h>
-#include <plat/clock.h>
-
#include "clock.h"
/* Private functions */
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 8041114..8463cc3 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -21,8 +21,6 @@
#include <asm/div64.h>
-#include <plat/clock.h>
-
#include "soc.h"
#include "clock.h"
#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/clkt_iclk.c b/arch/arm/mach-omap2/clkt_iclk.c
index 3d43fba..7c8d41e 100644
--- a/arch/arm/mach-omap2/clkt_iclk.c
+++ b/arch/arm/mach-omap2/clkt_iclk.c
@@ -14,7 +14,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
#include <plat/prcm.h>
#include "clock.h"
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 33f5b5d..8b30759 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -26,7 +26,6 @@
#include <asm/cpu.h>
-#include <plat/clock.h>
#include <plat/prcm.h>
#include <trace/events/power.h>
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 35ec5f3..c3bf8c2 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -17,8 +17,290 @@
#define __ARCH_ARM_MACH_OMAP2_CLOCK_H
#include <linux/kernel.h>
+#include <linux/list.h>
+
+struct module;
+struct clk;
+struct clockdomain;
+
+/* Temporary, needed during the common clock framework conversion */
+#define __clk_get_name(clk) (clk->name)
+#define __clk_get_parent(clk) (clk->parent)
+#define __clk_get_rate(clk) (clk->rate)
+
+/**
+ * struct clkops - some clock function pointers
+ * @enable: fn ptr that enables the current clock in hardware
+ * @disable: fn ptr that enables the current clock in hardware
+ * @find_idlest: function returning the IDLEST register for the clock's IP blk
+ * @find_companion: function returning the "companion" clk reg for the clock
+ * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
+ * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
+ *
+ * A "companion" clk is an accompanying clock to the one being queried
+ * that must be enabled for the IP module connected to the clock to
+ * become accessible by the hardware. Neither @find_idlest nor
+ * @find_companion should be needed; that information is IP
+ * block-specific; the hwmod code has been created to handle this, but
+ * until hwmod data is ready and drivers have been converted to use PM
+ * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
+ * @find_companion must, unfortunately, remain.
+ */
+struct clkops {
+ int (*enable)(struct clk *);
+ void (*disable)(struct clk *);
+ void (*find_idlest)(struct clk *, void __iomem **,
+ u8 *, u8 *);
+ void (*find_companion)(struct clk *, void __iomem **,
+ u8 *);
+ void (*allow_idle)(struct clk *);
+ void (*deny_idle)(struct clk *);
+};
+
+/* struct clksel_rate.flags possibilities */
+#define RATE_IN_242X (1 << 0)
+#define RATE_IN_243X (1 << 1)
+#define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */
+#define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */
+#define RATE_IN_36XX (1 << 4)
+#define RATE_IN_4430 (1 << 5)
+#define RATE_IN_TI816X (1 << 6)
+#define RATE_IN_4460 (1 << 7)
+#define RATE_IN_AM33XX (1 << 8)
+#define RATE_IN_TI814X (1 << 9)
+
+#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
+#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
+#define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX)
+#define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460)
+
+/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
+#define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
+
+
+/**
+ * struct clksel_rate - register bitfield values corresponding to clk divisors
+ * @val: register bitfield value (shifted to bit 0)
+ * @div: clock divisor corresponding to @val
+ * @flags: (see "struct clksel_rate.flags possibilities" above)
+ *
+ * @val should match the value of a read from struct clk.clksel_reg
+ * AND'ed with struct clk.clksel_mask, shifted right to bit 0.
+ *
+ * @div is the divisor that should be applied to the parent clock's rate
+ * to produce the current clock's rate.
+ */
+struct clksel_rate {
+ u32 val;
+ u8 div;
+ u16 flags;
+};
+
+/**
+ * struct clksel - available parent clocks, and a pointer to their divisors
+ * @parent: struct clk * to a possible parent clock
+ * @rates: available divisors for this parent clock
+ *
+ * A struct clksel is always associated with one or more struct clks
+ * and one or more struct clksel_rates.
+ */
+struct clksel {
+ struct clk *parent;
+ const struct clksel_rate *rates;
+};
+
+/**
+ * struct dpll_data - DPLL registers and integration data
+ * @mult_div1_reg: register containing the DPLL M and N bitfields
+ * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
+ * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
+ * @clk_bypass: struct clk pointer to the clock's bypass clock input
+ * @clk_ref: struct clk pointer to the clock's reference clock input
+ * @control_reg: register containing the DPLL mode bitfield
+ * @enable_mask: mask of the DPLL mode bitfield in @control_reg
+ * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate()
+ * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate()
+ * @max_multiplier: maximum valid non-bypass multiplier value (actual)
+ * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate()
+ * @min_divider: minimum valid non-bypass divider value (actual)
+ * @max_divider: maximum valid non-bypass divider value (actual)
+ * @modes: possible values of @enable_mask
+ * @autoidle_reg: register containing the DPLL autoidle mode bitfield
+ * @idlest_reg: register containing the DPLL idle status bitfield
+ * @autoidle_mask: mask of the DPLL autoidle mode bitfield in @autoidle_reg
+ * @freqsel_mask: mask of the DPLL jitter correction bitfield in @control_reg
+ * @idlest_mask: mask of the DPLL idle status bitfield in @idlest_reg
+ * @auto_recal_bit: bitshift of the driftguard enable bit in @control_reg
+ * @recal_en_bit: bitshift of the PRM_IRQENABLE_* bit for recalibration IRQs
+ * @recal_st_bit: bitshift of the PRM_IRQSTATUS_* bit for recalibration IRQs
+ * @flags: DPLL type/features (see below)
+ *
+ * Possible values for @flags:
+ * DPLL_J_TYPE: "J-type DPLL" (only some 36xx, 4xxx DPLLs)
+ *
+ * @freqsel_mask is only used on the OMAP34xx family and AM35xx.
+ *
+ * XXX Some DPLLs have multiple bypass inputs, so it's not technically
+ * correct to only have one @clk_bypass pointer.
+ *
+ * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m,
+ * @last_rounded_n) should be separated from the runtime-fixed fields
+ * and placed into a different structure, so that the runtime-fixed data
+ * can be placed into read-only space.
+ */
+struct dpll_data {
+ void __iomem *mult_div1_reg;
+ u32 mult_mask;
+ u32 div1_mask;
+ struct clk *clk_bypass;
+ struct clk *clk_ref;
+ void __iomem *control_reg;
+ u32 enable_mask;
+ unsigned long last_rounded_rate;
+ u16 last_rounded_m;
+ u16 max_multiplier;
+ u8 last_rounded_n;
+ u8 min_divider;
+ u16 max_divider;
+ u8 modes;
+ void __iomem *autoidle_reg;
+ void __iomem *idlest_reg;
+ u32 autoidle_mask;
+ u32 freqsel_mask;
+ u32 idlest_mask;
+ u32 dco_mask;
+ u32 sddiv_mask;
+ u8 auto_recal_bit;
+ u8 recal_en_bit;
+ u8 recal_st_bit;
+ u8 flags;
+};
+
+/*
+ * struct clk.flags possibilities
+ *
+ * XXX document the rest of the clock flags here
+ *
+ * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
+ * bits share the same register. This flag allows the
+ * omap4_dpllmx*() code to determine which GATE_CTRL bit field
+ * should be used. This is a temporary solution - a better approach
+ * would be to associate clock type-specific data with the clock,
+ * similar to the struct dpll_data approach.
+ */
+#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
+#define CLOCK_IDLE_CONTROL (1 << 1)
+#define CLOCK_NO_IDLE_PARENT (1 << 2)
+#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
+#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
+#define CLOCK_CLKOUTX2 (1 << 5)
+
+/**
+ * struct clk - OMAP struct clk
+ * @node: list_head connecting this clock into the full clock list
+ * @ops: struct clkops * for this clock
+ * @name: the name of the clock in the hardware (used in hwmod data and debug)
+ * @parent: pointer to this clock's parent struct clk
+ * @children: list_head connecting to the child clks' @sibling list_heads
+ * @sibling: list_head connecting this clk to its parent clk's @children
+ * @rate: current clock rate
+ * @enable_reg: register to write to enable the clock (see @enable_bit)
+ * @recalc: fn ptr that returns the clock's current rate
+ * @set_rate: fn ptr that can change the clock's current rate
+ * @round_rate: fn ptr that can round the clock's current rate
+ * @init: fn ptr to do clock-specific initialization
+ * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
+ * @usecount: number of users that have requested this clock to be enabled
+ * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
+ * @flags: see "struct clk.flags possibilities" above
+ * @clksel_reg: for clksel clks, register va containing src/divisor select
+ * @clksel_mask: bitmask in @clksel_reg for the src/divisor selector
+ * @clksel: for clksel clks, pointer to struct clksel for this clock
+ * @dpll_data: for DPLLs, pointer to struct dpll_data for this clock
+ * @clkdm_name: clockdomain name that this clock is contained in
+ * @clkdm: pointer to struct clockdomain, resolved from @clkdm_name at runtime
+ * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
+ * @src_offset: bitshift for source selection bitfield (OMAP1 only)
+ *
+ * XXX @rate_offset, @src_offset should probably be removed and OMAP1
+ * clock code converted to use clksel.
+ *
+ * XXX @usecount is poorly named. It should be "enable_count" or
+ * something similar. "users" in the description refers to kernel
+ * code (core code or drivers) that have called clk_enable() and not
+ * yet called clk_disable(); the usecount of parent clocks is also
+ * incremented by the clock code when clk_enable() is called on child
+ * clocks and decremented by the clock code when clk_disable() is
+ * called on child clocks.
+ *
+ * XXX @clkdm, @usecount, @children, @sibling should be marked for
+ * internal use only.
+ *
+ * @children and @sibling are used to optimize parent-to-child clock
+ * tree traversals. (child-to-parent traversals use @parent.)
+ *
+ * XXX The notion of the clock's current rate probably needs to be
+ * separated from the clock's target rate.
+ */
+struct clk {
+ struct list_head node;
+ const struct clkops *ops;
+ const char *name;
+ struct clk *parent;
+ struct list_head children;
+ struct list_head sibling; /* node for children */
+ unsigned long rate;
+ void __iomem *enable_reg;
+ unsigned long (*recalc)(struct clk *);
+ int (*set_rate)(struct clk *, unsigned long);
+ long (*round_rate)(struct clk *, unsigned long);
+ void (*init)(struct clk *);
+ u8 enable_bit;
+ s8 usecount;
+ u8 fixed_div;
+ u8 flags;
+ void __iomem *clksel_reg;
+ u32 clksel_mask;
+ const struct clksel *clksel;
+ struct dpll_data *dpll_data;
+ const char *clkdm_name;
+ struct clockdomain *clkdm;
+#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
+ struct dentry *dent; /* For visible tree hierarchy */
+#endif
+};
+
+struct clk_functions {
+ int (*clk_enable)(struct clk *clk);
+ void (*clk_disable)(struct clk *clk);
+ long (*clk_round_rate)(struct clk *clk, unsigned long rate);
+ int (*clk_set_rate)(struct clk *clk, unsigned long rate);
+ int (*clk_set_parent)(struct clk *clk, struct clk *parent);
+ void (*clk_allow_idle)(struct clk *clk);
+ void (*clk_deny_idle)(struct clk *clk);
+ void (*clk_disable_unused)(struct clk *clk);
+};
+
+extern int mpurate;
+
+extern int clk_init(struct clk_functions *custom_clocks);
+extern void clk_preinit(struct clk *clk);
+extern int clk_register(struct clk *clk);
+extern void clk_reparent(struct clk *child, struct clk *parent);
+extern void clk_unregister(struct clk *clk);
+extern void propagate_rate(struct clk *clk);
+extern void recalculate_root_clocks(void);
+extern unsigned long followparent_recalc(struct clk *clk);
+extern void clk_enable_init_clocks(void);
+unsigned long omap_fixed_divisor_recalc(struct clk *clk);
+extern struct clk *omap_clk_get_by_name(const char *name);
+extern int omap_clk_enable_autoidle_all(void);
+extern int omap_clk_disable_autoidle_all(void);
+
+extern const struct clkops clkops_null;
+
+extern struct clk dummy_ck;
-#include <plat/clock.h>
/* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */
#define CORE_CLK_SRC_32K 0x0
diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c
index a8e3261..850f83e 100644
--- a/arch/arm/mach-omap2/clock2430.c
+++ b/arch/arm/mach-omap2/clock2430.c
@@ -21,8 +21,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "soc.h"
#include "iomap.h"
#include "clock.h"
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index e92be1f..5feee16 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -22,8 +22,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "soc.h"
#include "clock.h"
#include "clock2xxx.h"
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 1fc96b9..baaaa42 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -21,8 +21,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "clock.h"
#include "clock34xx.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clock3517.c b/arch/arm/mach-omap2/clock3517.c
index 2e97d08..8020905 100644
--- a/arch/arm/mach-omap2/clock3517.c
+++ b/arch/arm/mach-omap2/clock3517.c
@@ -21,8 +21,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "clock.h"
#include "clock3517.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c
index 0c5e25e..0e1e9e4 100644
--- a/arch/arm/mach-omap2/clock36xx.c
+++ b/arch/arm/mach-omap2/clock36xx.c
@@ -22,8 +22,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "clock.h"
#include "clock36xx.h"
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index 83bb014..3e8aca2 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -21,8 +21,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
-
#include "soc.h"
#include "clock.h"
#include "clock3xxx.h"
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index cbb87913..32dbcbc 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -27,7 +27,7 @@
#include <linux/bitops.h>
-#include <plat/clock.h>
+#include "clock.h"
#include "clockdomain.h"
/* clkdm_list contains all registered struct clockdomains */
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 629576b..79e4503 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -18,7 +18,7 @@
#include <linux/spinlock.h>
#include "powerdomain.h"
-#include <plat/clock.h>
+#include "clock.h"
#include <plat/omap_hwmod.h>
#include <plat/cpu.h>
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index b0f21b7..34fb5b9 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -18,12 +18,12 @@
#include <linux/io.h>
#include <linux/platform_data/dsp-omap.h>
-#include <plat/clock.h>
#include <plat/vram.h>
#include "soc.h"
#include "iomap.h"
#include "common.h"
+#include "clock.h"
#include "sdrc.h"
#include "control.h"
#include "omap-secure.h"
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 814e180..eacf51f 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -28,8 +28,6 @@
#include <linux/bitops.h>
#include <linux/clkdev.h>
-#include <plat/clock.h>
-
#include "soc.h"
#include "clock.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index 09d0ccc..5854da1 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -15,8 +15,6 @@
#include <linux/io.h>
#include <linux/bitops.h>
-#include <plat/clock.h>
-
#include "soc.h"
#include "clock.h"
#include "clock44xx.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 299ca28..9702204 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -139,7 +139,7 @@
#include <linux/slab.h>
#include <linux/bootmem.h>
-#include <plat/clock.h>
+#include "clock.h"
#include <plat/omap_hwmod.h>
#include <plat/prcm.h>
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 3e1345f..66cdda3 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -27,7 +27,7 @@
#include <linux/module.h>
#include <linux/slab.h>
-#include <plat/clock.h>
+#include "clock.h"
#include "powerdomain.h"
#include "clockdomain.h"
#include <plat/dmtimer.h>
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 94c838e..be8989e 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -36,12 +36,12 @@
#include <asm/mach-types.h>
#include <asm/system_misc.h>
-#include <plat/clock.h>
#include <plat-omap/dma-omap.h>
#include "../plat-omap/sram.h"
#include "common.h"
+#include "clock.h"
#include "prm2xxx_3xxx.h"
#include "prm-regbits-24xx.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c
index 845c4fd..db96066 100644
--- a/arch/arm/mach-omap2/sdram-nokia.c
+++ b/arch/arm/mach-omap2/sdram-nokia.c
@@ -18,7 +18,7 @@
#include <linux/io.h>
#include "common.h"
-#include <plat/clock.h>
+#include "clock.h"
#include <plat/sdrc.h>
#include "sdram-nokia.h"
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index 2f0588b..57b8565 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -23,11 +23,12 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include "common.h"
-#include <plat/clock.h>
+#include <plat/sdrc.h>
+
#include "../plat-omap/sram.h"
-#include <plat/sdrc.h>
+#include "common.h"
+#include "clock.h"
#include "sdrc.h"
static struct omap_sdrc_params *sdrc_init_params_cs0, *sdrc_init_params_cs1;
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index 45ef23f..7406392 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -24,7 +24,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/clock.h>
#include "../plat-omap/sram.h"
#include <plat/sdrc.h>
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index f43dbc3..bc75131 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -23,7 +23,6 @@
#include <asm/sched_clock.h>
#include "common.h"
-#include <plat/clock.h>
/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
#define OMAP2_32KSYNCNT_REV_OFF 0x0
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
deleted file mode 100644
index e2e2d04..0000000
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ /dev/null
@@ -1,309 +0,0 @@
-/*
- * OMAP clock: data structure definitions, function prototypes, shared macros
- *
- * Copyright (C) 2004-2005, 2008-2010 Nokia Corporation
- * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
- * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_OMAP_CLOCK_H
-#define __ARCH_ARM_OMAP_CLOCK_H
-
-#include <linux/list.h>
-
-struct module;
-struct clk;
-struct clockdomain;
-
-/* Temporary, needed during the common clock framework conversion */
-#define __clk_get_name(clk) (clk->name)
-#define __clk_get_parent(clk) (clk->parent)
-#define __clk_get_rate(clk) (clk->rate)
-
-/**
- * struct clkops - some clock function pointers
- * @enable: fn ptr that enables the current clock in hardware
- * @disable: fn ptr that enables the current clock in hardware
- * @find_idlest: function returning the IDLEST register for the clock's IP blk
- * @find_companion: function returning the "companion" clk reg for the clock
- * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
- * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
- *
- * A "companion" clk is an accompanying clock to the one being queried
- * that must be enabled for the IP module connected to the clock to
- * become accessible by the hardware. Neither @find_idlest nor
- * @find_companion should be needed; that information is IP
- * block-specific; the hwmod code has been created to handle this, but
- * until hwmod data is ready and drivers have been converted to use PM
- * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
- * @find_companion must, unfortunately, remain.
- */
-struct clkops {
- int (*enable)(struct clk *);
- void (*disable)(struct clk *);
- void (*find_idlest)(struct clk *, void __iomem **,
- u8 *, u8 *);
- void (*find_companion)(struct clk *, void __iomem **,
- u8 *);
- void (*allow_idle)(struct clk *);
- void (*deny_idle)(struct clk *);
-};
-
-#ifdef CONFIG_ARCH_OMAP2PLUS
-
-/* struct clksel_rate.flags possibilities */
-#define RATE_IN_242X (1 << 0)
-#define RATE_IN_243X (1 << 1)
-#define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */
-#define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */
-#define RATE_IN_36XX (1 << 4)
-#define RATE_IN_4430 (1 << 5)
-#define RATE_IN_TI816X (1 << 6)
-#define RATE_IN_4460 (1 << 7)
-#define RATE_IN_AM33XX (1 << 8)
-#define RATE_IN_TI814X (1 << 9)
-
-#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
-#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
-#define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX)
-#define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460)
-
-/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
-#define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
-
-
-/**
- * struct clksel_rate - register bitfield values corresponding to clk divisors
- * @val: register bitfield value (shifted to bit 0)
- * @div: clock divisor corresponding to @val
- * @flags: (see "struct clksel_rate.flags possibilities" above)
- *
- * @val should match the value of a read from struct clk.clksel_reg
- * AND'ed with struct clk.clksel_mask, shifted right to bit 0.
- *
- * @div is the divisor that should be applied to the parent clock's rate
- * to produce the current clock's rate.
- */
-struct clksel_rate {
- u32 val;
- u8 div;
- u16 flags;
-};
-
-/**
- * struct clksel - available parent clocks, and a pointer to their divisors
- * @parent: struct clk * to a possible parent clock
- * @rates: available divisors for this parent clock
- *
- * A struct clksel is always associated with one or more struct clks
- * and one or more struct clksel_rates.
- */
-struct clksel {
- struct clk *parent;
- const struct clksel_rate *rates;
-};
-
-/**
- * struct dpll_data - DPLL registers and integration data
- * @mult_div1_reg: register containing the DPLL M and N bitfields
- * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
- * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
- * @clk_bypass: struct clk pointer to the clock's bypass clock input
- * @clk_ref: struct clk pointer to the clock's reference clock input
- * @control_reg: register containing the DPLL mode bitfield
- * @enable_mask: mask of the DPLL mode bitfield in @control_reg
- * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate()
- * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate()
- * @max_multiplier: maximum valid non-bypass multiplier value (actual)
- * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate()
- * @min_divider: minimum valid non-bypass divider value (actual)
- * @max_divider: maximum valid non-bypass divider value (actual)
- * @modes: possible values of @enable_mask
- * @autoidle_reg: register containing the DPLL autoidle mode bitfield
- * @idlest_reg: register containing the DPLL idle status bitfield
- * @autoidle_mask: mask of the DPLL autoidle mode bitfield in @autoidle_reg
- * @freqsel_mask: mask of the DPLL jitter correction bitfield in @control_reg
- * @idlest_mask: mask of the DPLL idle status bitfield in @idlest_reg
- * @auto_recal_bit: bitshift of the driftguard enable bit in @control_reg
- * @recal_en_bit: bitshift of the PRM_IRQENABLE_* bit for recalibration IRQs
- * @recal_st_bit: bitshift of the PRM_IRQSTATUS_* bit for recalibration IRQs
- * @flags: DPLL type/features (see below)
- *
- * Possible values for @flags:
- * DPLL_J_TYPE: "J-type DPLL" (only some 36xx, 4xxx DPLLs)
- *
- * @freqsel_mask is only used on the OMAP34xx family and AM35xx.
- *
- * XXX Some DPLLs have multiple bypass inputs, so it's not technically
- * correct to only have one @clk_bypass pointer.
- *
- * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m,
- * @last_rounded_n) should be separated from the runtime-fixed fields
- * and placed into a different structure, so that the runtime-fixed data
- * can be placed into read-only space.
- */
-struct dpll_data {
- void __iomem *mult_div1_reg;
- u32 mult_mask;
- u32 div1_mask;
- struct clk *clk_bypass;
- struct clk *clk_ref;
- void __iomem *control_reg;
- u32 enable_mask;
- unsigned long last_rounded_rate;
- u16 last_rounded_m;
- u16 max_multiplier;
- u8 last_rounded_n;
- u8 min_divider;
- u16 max_divider;
- u8 modes;
- void __iomem *autoidle_reg;
- void __iomem *idlest_reg;
- u32 autoidle_mask;
- u32 freqsel_mask;
- u32 idlest_mask;
- u32 dco_mask;
- u32 sddiv_mask;
- u8 auto_recal_bit;
- u8 recal_en_bit;
- u8 recal_st_bit;
- u8 flags;
-};
-
-#endif
-
-/*
- * struct clk.flags possibilities
- *
- * XXX document the rest of the clock flags here
- *
- * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
- * bits share the same register. This flag allows the
- * omap4_dpllmx*() code to determine which GATE_CTRL bit field
- * should be used. This is a temporary solution - a better approach
- * would be to associate clock type-specific data with the clock,
- * similar to the struct dpll_data approach.
- */
-#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
-#define CLOCK_IDLE_CONTROL (1 << 1)
-#define CLOCK_NO_IDLE_PARENT (1 << 2)
-#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
-#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
-#define CLOCK_CLKOUTX2 (1 << 5)
-
-/**
- * struct clk - OMAP struct clk
- * @node: list_head connecting this clock into the full clock list
- * @ops: struct clkops * for this clock
- * @name: the name of the clock in the hardware (used in hwmod data and debug)
- * @parent: pointer to this clock's parent struct clk
- * @children: list_head connecting to the child clks' @sibling list_heads
- * @sibling: list_head connecting this clk to its parent clk's @children
- * @rate: current clock rate
- * @enable_reg: register to write to enable the clock (see @enable_bit)
- * @recalc: fn ptr that returns the clock's current rate
- * @set_rate: fn ptr that can change the clock's current rate
- * @round_rate: fn ptr that can round the clock's current rate
- * @init: fn ptr to do clock-specific initialization
- * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
- * @usecount: number of users that have requested this clock to be enabled
- * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
- * @flags: see "struct clk.flags possibilities" above
- * @clksel_reg: for clksel clks, register va containing src/divisor select
- * @clksel_mask: bitmask in @clksel_reg for the src/divisor selector
- * @clksel: for clksel clks, pointer to struct clksel for this clock
- * @dpll_data: for DPLLs, pointer to struct dpll_data for this clock
- * @clkdm_name: clockdomain name that this clock is contained in
- * @clkdm: pointer to struct clockdomain, resolved from @clkdm_name at runtime
- * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
- * @src_offset: bitshift for source selection bitfield (OMAP1 only)
- *
- * XXX @rate_offset, @src_offset should probably be removed and OMAP1
- * clock code converted to use clksel.
- *
- * XXX @usecount is poorly named. It should be "enable_count" or
- * something similar. "users" in the description refers to kernel
- * code (core code or drivers) that have called clk_enable() and not
- * yet called clk_disable(); the usecount of parent clocks is also
- * incremented by the clock code when clk_enable() is called on child
- * clocks and decremented by the clock code when clk_disable() is
- * called on child clocks.
- *
- * XXX @clkdm, @usecount, @children, @sibling should be marked for
- * internal use only.
- *
- * @children and @sibling are used to optimize parent-to-child clock
- * tree traversals. (child-to-parent traversals use @parent.)
- *
- * XXX The notion of the clock's current rate probably needs to be
- * separated from the clock's target rate.
- */
-struct clk {
- struct list_head node;
- const struct clkops *ops;
- const char *name;
- struct clk *parent;
- struct list_head children;
- struct list_head sibling; /* node for children */
- unsigned long rate;
- void __iomem *enable_reg;
- unsigned long (*recalc)(struct clk *);
- int (*set_rate)(struct clk *, unsigned long);
- long (*round_rate)(struct clk *, unsigned long);
- void (*init)(struct clk *);
- u8 enable_bit;
- s8 usecount;
- u8 fixed_div;
- u8 flags;
-#ifdef CONFIG_ARCH_OMAP2PLUS
- void __iomem *clksel_reg;
- u32 clksel_mask;
- const struct clksel *clksel;
- struct dpll_data *dpll_data;
- const char *clkdm_name;
- struct clockdomain *clkdm;
-#else
- u8 rate_offset;
- u8 src_offset;
-#endif
-#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
- struct dentry *dent; /* For visible tree hierarchy */
-#endif
-};
-
-struct clk_functions {
- int (*clk_enable)(struct clk *clk);
- void (*clk_disable)(struct clk *clk);
- long (*clk_round_rate)(struct clk *clk, unsigned long rate);
- int (*clk_set_rate)(struct clk *clk, unsigned long rate);
- int (*clk_set_parent)(struct clk *clk, struct clk *parent);
- void (*clk_allow_idle)(struct clk *clk);
- void (*clk_deny_idle)(struct clk *clk);
- void (*clk_disable_unused)(struct clk *clk);
-};
-
-extern int mpurate;
-
-extern int clk_init(struct clk_functions *custom_clocks);
-extern void clk_preinit(struct clk *clk);
-extern int clk_register(struct clk *clk);
-extern void clk_reparent(struct clk *child, struct clk *parent);
-extern void clk_unregister(struct clk *clk);
-extern void propagate_rate(struct clk *clk);
-extern void recalculate_root_clocks(void);
-extern unsigned long followparent_recalc(struct clk *clk);
-extern void clk_enable_init_clocks(void);
-unsigned long omap_fixed_divisor_recalc(struct clk *clk);
-extern struct clk *omap_clk_get_by_name(const char *name);
-extern int omap_clk_enable_autoidle_all(void);
-extern int omap_clk_disable_autoidle_all(void);
-
-extern const struct clkops clkops_null;
-
-extern struct clk dummy_ck;
-
-#endif
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index cee85a5..3c36258 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -91,7 +91,6 @@
#include <plat/omap_device.h>
#include <plat/omap_hwmod.h>
-#include <plat/clock.h>
/* These parameters are passed to _omap_device_{de,}activate() */
#define USE_WAKEUP_LAT 0
^ permalink raw reply related
* Problem with mmc DMA on panda board in 3.6
From: Tim Bird @ 2012-10-02 22:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOCHtYjLFE0aXL_ReZSdQZFJDPRW3Cx3vk4WEo9DU4g8QiF=gg@mail.gmail.com>
On 10/02/2012 03:28 PM, Robert Nelson wrote:
> On Tue, Oct 2, 2012 at 5:24 PM, Tim Bird <tim.bird@am.sony.com> wrote:
>> This is an early report - I'm just checking if anyone else has seen this.
>>
>> With Linux version v3.6, my PandaBoard (OMAP-based) no longer boots. The
>> system appears to fail to initialize the mmc controller.
>>
>> The kernel log message of interest appears to be this:
>> [ 1.690002] omap_hsmmc omap_hsmmc.0: unable to obtain RX DMA engine channel 6
>>
>> I can supply full kernel log messages and my .config if needed.
>>
>> I bisected the code and arrived at the following commit:
>> -------
>> commit 26b88520b80695a6fa5fd95b5d97c03f4daf87e0
>> Author: Russell King <rmk+kernel@arm.linux.org.uk>
>> Date: Fri Apr 13 12:27:37 2012 +0100
>>
>> mmc: omap_hsmmc: remove private DMA API implementation
>>
>> Remove the private DMA API implementation from omap_hsmmc, making it
>> use entirely the DMA engine API.
>>
>> Tested-by: Tony Lindgren <tony@atomide.com>
>> Tested-by: Venkatraman S <svenkatr@ti.com>
>> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
>> -------
>> The board works up until this commit.
>> After this commit, the board hangs during boot after the message:
>> [ 1.852508] Waiting for root device /dev/mmcblk0p3...
>> (and some other USB and network messages, which I presume
>> are unrelated.)
>>
>> My questions are these:
>> Has anyone else had problems with the PandaBoard (or other OMAP) on 3.6?
>> Are there any related CONFIG_ variables I could change to try alternatives?
>> What should I try next to debug this?
>
> Check your config, to see if these are enabled:
>
> CONFIG_DMADEVICES=y
> CONFIG_DMA_OMAP=y
They were not. After enabling them, things work as expected.
Thanks very much!! :-)
I've been doing the following on a mainline kernel to generate the
.config for my panda board:
make omap2plus_defconfig
ttc set_config CONFIG_USB_EHCI_HCD=y CONFIG_MFD_OMAP_USB_HOST=y CONFIG_USB_EHCI_ROOT_HUB_TT=N CONFIG_USB_EHCI_TT_NEWSCHED=y CONFIG_USB_EHCI_HCD_OMAP=y CONFIG_USB_EHCI_MV=n
ttc set_config CONFIG_USB_NET_SMSC95XX=y CONFIG_USB_SISUSBVGA=n
make oldconfig
I've kind of lost track of the preferred method of doing board-specific configurations,
since the big defconfig purge of 2011. I think I need to go back to the drawing board
on my automatic config-setting.
In any event, thanks again.
-- Tim
=============================
Tim Bird
Architecture Group Chair, CE Workgroup of the Linux Foundation
Senior Staff Engineer, Sony Network Entertainment
=============================
^ permalink raw reply
* Problem with mmc DMA on panda board in 3.6
From: Robert Nelson @ 2012-10-02 22:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <506B69B0.2010109@am.sony.com>
On Tue, Oct 2, 2012 at 5:24 PM, Tim Bird <tim.bird@am.sony.com> wrote:
> This is an early report - I'm just checking if anyone else has seen this.
>
> With Linux version v3.6, my PandaBoard (OMAP-based) no longer boots. The
> system appears to fail to initialize the mmc controller.
>
> The kernel log message of interest appears to be this:
> [ 1.690002] omap_hsmmc omap_hsmmc.0: unable to obtain RX DMA engine channel 6
>
> I can supply full kernel log messages and my .config if needed.
>
> I bisected the code and arrived at the following commit:
> -------
> commit 26b88520b80695a6fa5fd95b5d97c03f4daf87e0
> Author: Russell King <rmk+kernel@arm.linux.org.uk>
> Date: Fri Apr 13 12:27:37 2012 +0100
>
> mmc: omap_hsmmc: remove private DMA API implementation
>
> Remove the private DMA API implementation from omap_hsmmc, making it
> use entirely the DMA engine API.
>
> Tested-by: Tony Lindgren <tony@atomide.com>
> Tested-by: Venkatraman S <svenkatr@ti.com>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> -------
> The board works up until this commit.
> After this commit, the board hangs during boot after the message:
> [ 1.852508] Waiting for root device /dev/mmcblk0p3...
> (and some other USB and network messages, which I presume
> are unrelated.)
>
> My questions are these:
> Has anyone else had problems with the PandaBoard (or other OMAP) on 3.6?
> Are there any related CONFIG_ variables I could change to try alternatives?
> What should I try next to debug this?
Check your config, to see if these are enabled:
CONFIG_DMADEVICES=y
CONFIG_DMA_OMAP=y
Regards,
--
Robert Nelson
http://www.rcn-ee.com/
^ permalink raw reply
* [alsa-devel] [PATCH 0/3] ASoC: Davinci: McASP: add support new McASP IP Variant
From: Daniel Mack @ 2012-10-02 22:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1346417459-30042-1-git-send-email-gururaja.hebbar@ti.com>
On 31.08.2012 14:50, Hebbar, Gururaja wrote:
> The OMAP2+ variant of McASP is different from Davinci variant w.r.to some
> register offset and missing generic SRAM APIs support
>
> Changes
> - Add new MCASP_VERSION_3 to identify new variant. New DT compatible
> "ti,omap2-mcasp-audio" to identify version 3 controller.
> - The register offsets are handled depending on the version.
> - Provide a config option to indicate missing SRAM API support.
Could you give some insight which hardware this was tested on? I'm
trying to get this up and running on a AM33xx board, and the patches
look all reasonable to me. My problem is that I can't make the DMA
engine move forward, I fail to receive a single interrupt on this
peripheral after the stream starts. I will continue searching for the
reason of this tomorrow, but maybe you can give me some hint by
explaining your setup?
Note that I'm using your patches together with Matt's from this series:
https://github.com/ohporter/linux/tree/edma-dmaengine-am33xx-rfc-v1
... but it doesn't work without those either.
Thanks,
Daniel
^ permalink raw reply
* Problem with mmc DMA on panda board in 3.6
From: Tim Bird @ 2012-10-02 22:24 UTC (permalink / raw)
To: linux-arm-kernel
This is an early report - I'm just checking if anyone else has seen this.
With Linux version v3.6, my PandaBoard (OMAP-based) no longer boots. The
system appears to fail to initialize the mmc controller.
The kernel log message of interest appears to be this:
[ 1.690002] omap_hsmmc omap_hsmmc.0: unable to obtain RX DMA engine channel 6
I can supply full kernel log messages and my .config if needed.
I bisected the code and arrived at the following commit:
-------
commit 26b88520b80695a6fa5fd95b5d97c03f4daf87e0
Author: Russell King <rmk+kernel@arm.linux.org.uk>
Date: Fri Apr 13 12:27:37 2012 +0100
mmc: omap_hsmmc: remove private DMA API implementation
Remove the private DMA API implementation from omap_hsmmc, making it
use entirely the DMA engine API.
Tested-by: Tony Lindgren <tony@atomide.com>
Tested-by: Venkatraman S <svenkatr@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-------
The board works up until this commit.
After this commit, the board hangs during boot after the message:
[ 1.852508] Waiting for root device /dev/mmcblk0p3...
(and some other USB and network messages, which I presume
are unrelated.)
My questions are these:
Has anyone else had problems with the PandaBoard (or other OMAP) on 3.6?
Are there any related CONFIG_ variables I could change to try alternatives?
What should I try next to debug this?
-- Tim
=============================
Tim Bird
Architecture Group Chair, CE Workgroup of the Linux Foundation
Senior Staff Engineer, Sony Network Entertainment
=============================
^ permalink raw reply
* [PATCH 2/2] ARM: OMAP: SmartReflex: pass device dependent data via platform data
From: Kevin Hilman @ 2012-10-02 22:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1348496201-6378-3-git-send-email-j-pihet@ti.com>
Hi Jean,
Jean Pihet <jean.pihet@newoldbits.com> writes:
> Remove the device dependent settings (cpu_is_xxx(), IP fck etc.)
> from the driver code and pass them instead via the platform
> data.
> This allows a clean separation of the driver code and the platform
> code, as required by the move of the platform header files to
> include/linux/platform_data.
>
> Signed-off-by: Jean Pihet <j-pihet@ti.com>
Could you make pdata change and the clock change should be two different
patches? Also, your previous patch to align SR clock names should be
combined with the changes made here.
Some comments on the clock change below...
> ---
> arch/arm/mach-omap2/sr_device.c | 13 ++++++++++++
> drivers/power/avs/smartreflex.c | 40 ++++++++++--------------------------
> include/linux/power/smartreflex.h | 14 +++++++++++-
> 3 files changed, 36 insertions(+), 31 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
> index d033a65..2885a77 100644
> --- a/arch/arm/mach-omap2/sr_device.c
> +++ b/arch/arm/mach-omap2/sr_device.c
> @@ -122,6 +122,19 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
> sr_data->senn_mod = 0x1;
> sr_data->senp_mod = 0x1;
>
> + if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
> + sr_data->err_weight = OMAP3430_SR_ERRWEIGHT;
> + sr_data->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
> + sr_data->accum_data = OMAP3430_SR_ACCUMDATA;
> + if (!(strcmp(sr_data->name, "smartreflex_mpu"))) {
> + sr_data->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
> + sr_data->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
> + } else {
> + sr_data->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
> + sr_data->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
> + }
> + }
> +
> sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
> if (IS_ERR(sr_data->voltdm)) {
> pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
> diff --git a/drivers/power/avs/smartreflex.c b/drivers/power/avs/smartreflex.c
> index 92f6728..7c03c90 100644
> --- a/drivers/power/avs/smartreflex.c
> +++ b/drivers/power/avs/smartreflex.c
> @@ -128,17 +128,16 @@ static irqreturn_t sr_interrupt(int irq, void *data)
>
> static void sr_set_clk_length(struct omap_sr *sr)
> {
> + char fck_name[16]; /* "smartreflex.0" fits in 16 chars */
> struct clk *sys_ck;
> u32 sys_clk_speed;
>
> - if (cpu_is_omap34xx())
> - sys_ck = clk_get(NULL, "sys_ck");
> - else
> - sys_ck = clk_get(NULL, "sys_clkin_ck");
> + sprintf(fck_name, "smartreflex.%d", sr->srid);
hmm, isn't this the same as dev_name(&sr->pdev.dev) ?
Combined with your earlier patch to align clock names, this should just
be:
sys_ck = clk_get(&sr->pdev.dev, "fck");
Also note that you've changed this from sys_clk to the SR functional
clock, which seems to be the same clock on 34xx and 44xx, but that change
should be clearly documented in the changelog.
Kevin
^ permalink raw reply
* mail lost due to a hard-drive crash
From: Guennadi Liakhovetski @ 2012-10-02 22:16 UTC (permalink / raw)
To: linux-arm-kernel
Hi all
The hard-drive of my mail server died last Sunday and my last back up was
from Friday evening, so, I lost about 1.5 days worth of mail. I don't
think I lost anything important: I saw all mails in my INBOX before
powering down the system to not be able to bring it back up again:-) But
if anyone thinks, that I missed their mail, please, re-send.
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
^ permalink raw reply
* [PATCH] ARM: OMAP: hwmod: align the SmartReflex fck names
From: Kevin Hilman @ 2012-10-02 22:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87626s8rys.fsf@deeprootsystems.com>
On 10/02/2012 02:49 PM, Kevin Hilman wrote:
> Jean Pihet <jean.pihet@newoldbits.com> writes:
>
>> Rename the smartreflex fck names for consistency and better readability;
>> rename the clock aliases for use by the SmartReflex driver, with the
>> "smartreflex.%d" format.
>
> hmm, do we even need the clkdev nodes anymore? The driver isn't
> directly accessing the fclk at all, so it seems like these could be
> removed now.
Please ignore this comment, I see what you're doing in the other series
now. See my comments there.
Kevin
^ permalink raw reply
* [PATCH 1/2] ARM: OMAP: SmartReflex: fix error path in init function
From: Kevin Hilman @ 2012-10-02 21:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1348496201-6378-2-git-send-email-j-pihet@ti.com>
Jean Pihet <jean.pihet@newoldbits.com> writes:
> Fix the error handling path in omap_sr_probe to correctly
> de-allocate resources in case of problems.
>
> Signed-off-by: Jean Pihet <j-pihet@ti.com>
Thanks, queuing this one as a fix for v3.7-rc
Kevin
^ permalink raw reply
* [PATCH] ARM: OMAP: SmartReflex: select CONFIG_POWER_SUPPLY in Kconfig
From: Kevin Hilman @ 2012-10-02 21:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1348151816-30248-1-git-send-email-j-pihet@ti.com>
jean.pihet at newoldbits.com writes:
> From: Jean Pihet <j-pihet@ti.com>
>
> Select POWER_SUPPLY from POWER_AVS_OMAP entry in Kconfig.
>
> This avoids the following build problems using a randconfig
> that has CONFIG_POWER_SUPPLY not set:
>
> LD init/built-in.o
> arch/arm/mach-omap2/built-in.o: In function `sr_class3_configure':
> arch/arm/mach-omap2/smartreflex-class3.c:44: undefined reference to `sr_configure_errgen'
> arch/arm/mach-omap2/built-in.o: In function `sr_class3_disable':
> arch/arm/mach-omap2/smartreflex-class3.c:33: undefined reference to `sr_disable_errgen'
> arch/arm/mach-omap2/smartreflex-class3.c:35: undefined reference to `sr_disable'
> arch/arm/mach-omap2/built-in.o: In function `sr_class3_enable':
> arch/arm/mach-omap2/smartreflex-class3.c:28: undefined reference to `sr_enable'
> arch/arm/mach-omap2/built-in.o: In function `sr_class3_init':
> arch/arm/mach-omap2/smartreflex-class3.c:59: undefined reference to `sr_register_class'
> make: *** [vmlinux] Error 1
>
> Signed-off-by: Jean Pihet <j-pihet@ti.com>
Thanks, queuing for v3.7-rc
Kevin
> ---
> arch/arm/plat-omap/Kconfig | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> index dd36eba..001a795 100644
> --- a/arch/arm/plat-omap/Kconfig
> +++ b/arch/arm/plat-omap/Kconfig
> @@ -48,6 +48,7 @@ config OMAP_DEBUG_LEDS
> config POWER_AVS_OMAP
> bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2"
> depends on POWER_AVS && (ARCH_OMAP3 || ARCH_OMAP4) && PM
> + select POWER_SUPPLY
> help
> Say Y to enable AVS(Adaptive Voltage Scaling)
> support on OMAP containing the version 1 or
^ permalink raw reply
* [PATCH] ARM: OMAP: hwmod: align the SmartReflex fck names
From: Kevin Hilman @ 2012-10-02 21:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1348497352-6464-1-git-send-email-j-pihet@ti.com>
Jean Pihet <jean.pihet@newoldbits.com> writes:
> Rename the smartreflex fck names for consistency and better readability;
> rename the clock aliases for use by the SmartReflex driver, with the
> "smartreflex.%d" format.
hmm, do we even need the clkdev nodes anymore? The driver isn't
directly accessing the fclk at all, so it seems like these could be
removed now.
Kevin
> Signed-off-by: Jean Pihet <j-pihet@ti.com>
> ---
> arch/arm/mach-omap2/clock33xx_data.c | 12 ++++++------
> arch/arm/mach-omap2/clock3xxx_data.c | 12 ++++++------
> arch/arm/mach-omap2/clock44xx_data.c | 6 +++---
> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 8 ++++----
> 4 files changed, 19 insertions(+), 19 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
> index 25bbcc7..a328f12 100644
> --- a/arch/arm/mach-omap2/clock33xx_data.c
> +++ b/arch/arm/mach-omap2/clock33xx_data.c
> @@ -548,16 +548,16 @@ static struct clk mcasp1_fck = {
> .recalc = &followparent_recalc,
> };
>
> -static struct clk smartreflex0_fck = {
> - .name = "smartreflex0_fck",
> +static struct clk smartreflex_mpu_fck = {
> + .name = "smartreflex_mpu_fck",
> .clkdm_name = "l4_wkup_clkdm",
> .parent = &sys_clkin_ck,
> .ops = &clkops_null,
> .recalc = &followparent_recalc,
> };
>
> -static struct clk smartreflex1_fck = {
> - .name = "smartreflex1_fck",
> +static struct clk smartreflex_core_fck = {
> + .name = "smartreflex_core_fck",
> .clkdm_name = "l4_wkup_clkdm",
> .parent = &sys_clkin_ck,
> .ops = &clkops_null,
> @@ -1034,8 +1034,8 @@ static struct omap_clk am33xx_clks[] = {
> CLK("davinci-mcasp.1", NULL, &mcasp1_fck, CK_AM33XX),
> CLK("NULL", "mmc2_fck", &mmc2_fck, CK_AM33XX),
> CLK(NULL, "mmu_fck", &mmu_fck, CK_AM33XX),
> - CLK(NULL, "smartreflex0_fck", &smartreflex0_fck, CK_AM33XX),
> - CLK(NULL, "smartreflex1_fck", &smartreflex1_fck, CK_AM33XX),
> + CLK(NULL, "smartreflex.0", &smartreflex_mpu_fck, CK_AM33XX),
> + CLK(NULL, "smartreflex.1", &smartreflex_core_fck, CK_AM33XX),
> CLK(NULL, "gpt1_fck", &timer1_fck, CK_AM33XX),
> CLK(NULL, "gpt2_fck", &timer2_fck, CK_AM33XX),
> CLK(NULL, "gpt3_fck", &timer3_fck, CK_AM33XX),
> diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
> index 83bed9a..a197cf2 100644
> --- a/arch/arm/mach-omap2/clock3xxx_data.c
> +++ b/arch/arm/mach-omap2/clock3xxx_data.c
> @@ -3050,8 +3050,8 @@ static struct clk traceclk_fck = {
> /* SR clocks */
>
> /* SmartReflex fclk (VDD1) */
> -static struct clk sr1_fck = {
> - .name = "sr1_fck",
> +static struct clk smartreflex_mpu_iva_fck = {
> + .name = "smartreflex_mpu_iva_fck",
> .ops = &clkops_omap2_dflt_wait,
> .parent = &sys_ck,
> .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
> @@ -3061,8 +3061,8 @@ static struct clk sr1_fck = {
> };
>
> /* SmartReflex fclk (VDD2) */
> -static struct clk sr2_fck = {
> - .name = "sr2_fck",
> +static struct clk smartreflex_core_fck = {
> + .name = "smartreflex_core_fck",
> .ops = &clkops_omap2_dflt_wait,
> .parent = &sys_ck,
> .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
> @@ -3447,8 +3447,8 @@ static struct omap_clk omap3xxx_clks[] = {
> CLK(NULL, "atclk_fck", &atclk_fck, CK_3XXX),
> CLK(NULL, "traceclk_src_fck", &traceclk_src_fck, CK_3XXX),
> CLK(NULL, "traceclk_fck", &traceclk_fck, CK_3XXX),
> - CLK(NULL, "sr1_fck", &sr1_fck, CK_34XX | CK_36XX),
> - CLK(NULL, "sr2_fck", &sr2_fck, CK_34XX | CK_36XX),
> + CLK(NULL, "smartreflex.0", &smartreflex_mpu_iva_fck, CK_34XX | CK_36XX),
> + CLK(NULL, "smartreflex.1", &smartreflex_core_fck, CK_34XX | CK_36XX),
> CLK(NULL, "sr_l4_ick", &sr_l4_ick, CK_34XX | CK_36XX),
> CLK(NULL, "secure_32k_fck", &secure_32k_fck, CK_3XXX),
> CLK(NULL, "gpt12_fck", &gpt12_fck, CK_3XXX),
> diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
> index d7f55e4..9cc1112 100644
> --- a/arch/arm/mach-omap2/clock44xx_data.c
> +++ b/arch/arm/mach-omap2/clock44xx_data.c
> @@ -3224,9 +3224,9 @@ static struct omap_clk omap44xx_clks[] = {
> CLK(NULL, "slimbus2_fclk_0", &slimbus2_fclk_0, CK_443X),
> CLK(NULL, "slimbus2_slimbus_clk", &slimbus2_slimbus_clk, CK_443X),
> CLK(NULL, "slimbus2_fck", &slimbus2_fck, CK_443X),
> - CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_443X),
> - CLK(NULL, "smartreflex_iva_fck", &smartreflex_iva_fck, CK_443X),
> - CLK(NULL, "smartreflex_mpu_fck", &smartreflex_mpu_fck, CK_443X),
> + CLK(NULL, "smartreflex.0", &smartreflex_core_fck, CK_443X),
> + CLK(NULL, "smartreflex.1", &smartreflex_iva_fck, CK_443X),
> + CLK(NULL, "smartreflex.2", &smartreflex_mpu_fck, CK_443X),
> CLK(NULL, "timer1_fck", &timer1_fck, CK_443X),
> CLK(NULL, "timer10_fck", &timer10_fck, CK_443X),
> CLK(NULL, "timer11_fck", &timer11_fck, CK_443X),
> diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> index c9e3820..2b2b8fc 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> @@ -1359,7 +1359,7 @@ static struct omap_hwmod_irq_info omap3_smartreflex_mpu_irqs[] = {
> static struct omap_hwmod omap34xx_sr1_hwmod = {
> .name = "smartreflex_mpu_iva",
> .class = &omap34xx_smartreflex_hwmod_class,
> - .main_clk = "sr1_fck",
> + .main_clk = "smartreflex_mpu_iva_fck",
> .prcm = {
> .omap2 = {
> .prcm_reg_id = 1,
> @@ -1377,7 +1377,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
> static struct omap_hwmod omap36xx_sr1_hwmod = {
> .name = "smartreflex_mpu_iva",
> .class = &omap36xx_smartreflex_hwmod_class,
> - .main_clk = "sr1_fck",
> + .main_clk = "smartreflex_mpu_iva_fck",
> .prcm = {
> .omap2 = {
> .prcm_reg_id = 1,
> @@ -1404,7 +1404,7 @@ static struct omap_hwmod_irq_info omap3_smartreflex_core_irqs[] = {
> static struct omap_hwmod omap34xx_sr2_hwmod = {
> .name = "smartreflex_core",
> .class = &omap34xx_smartreflex_hwmod_class,
> - .main_clk = "sr2_fck",
> + .main_clk = "smartreflex_core_fck",
> .prcm = {
> .omap2 = {
> .prcm_reg_id = 1,
> @@ -1422,7 +1422,7 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
> static struct omap_hwmod omap36xx_sr2_hwmod = {
> .name = "smartreflex_core",
> .class = &omap36xx_smartreflex_hwmod_class,
> - .main_clk = "sr2_fck",
> + .main_clk = "smartreflex_core_fck",
> .prcm = {
> .omap2 = {
> .prcm_reg_id = 1,
^ permalink raw reply
* [PATCH] ARM: OMAP2+: PM: fix return value check in omap2_set_init_voltage()
From: Kevin Hilman @ 2012-10-02 21:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAORVsuWGPw6Q4Z-nnPqMMBAf=tYXGydHqXSnd-JdXRV9NtGP=A@mail.gmail.com>
Jean Pihet <jean.pihet@newoldbits.com> writes:
> On Thu, Sep 27, 2012 at 7:54 AM, Wei Yongjun <weiyj.lk@gmail.com> wrote:
>> From: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
>>
>> In case of error, the function voltdm_lookup() returns NULL
>> not ERR_PTR(). The IS_ERR() test in the return value check
>> should be replaced with NULL test.
>>
>> dpatch engine is used to auto generate this patch.
>> (https://github.com/weiyj/dpatch)
>>
>> Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
>> ---
>> arch/arm/mach-omap2/pm.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
>> index 9cb5ced..ab15e5c 100644
>> --- a/arch/arm/mach-omap2/pm.c
>> +++ b/arch/arm/mach-omap2/pm.c
>> @@ -176,7 +176,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
>> }
>>
>> voltdm = voltdm_lookup(vdd_name);
>> - if (IS_ERR(voltdm)) {
>> + if (!voltdm) {
>> pr_err("%s: unable to get vdd pointer for vdd_%s\n",
>> __func__, vdd_name);
>> goto exit;
>
> This looks good, so here is the ack:
> Acked-by: Jean Pihet <j-pihet@ti.com>
Thanks, queuing this one for v3.7-rc.
Kevin
^ permalink raw reply
* [PATCH] ARM: OMAP2+: SmartReflex: fix return value check in sr_dev_init()
From: Kevin Hilman @ 2012-10-02 21:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAORVsuUcOFKFoOuxZqPJR=WSsTouqBH3EP4Xu82o515ofGbn+w@mail.gmail.com>
Jean Pihet <jean.pihet@newoldbits.com> writes:
> Hello,
>
> On Thu, Sep 27, 2012 at 7:54 AM, Wei Yongjun <weiyj.lk@gmail.com> wrote:
>> From: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
>>
>> In case of error, the function voltdm_lookup() returns NULL
>> not ERR_PTR(). The IS_ERR() test in the return value check
>> should be replaced with NULL test.
>>
>> dpatch engine is used to auto generate this patch.
>> (https://github.com/weiyj/dpatch)
>>
>> Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
>> ---
>> arch/arm/mach-omap2/sr_device.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
>> index d033a65..c248b30 100644
>> --- a/arch/arm/mach-omap2/sr_device.c
>> +++ b/arch/arm/mach-omap2/sr_device.c
>> @@ -123,7 +123,7 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
>> sr_data->senp_mod = 0x1;
>>
>> sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
>> - if (IS_ERR(sr_data->voltdm)) {
>> + if (!sr_data->voltdm) {
>> pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
>> __func__, sr_dev_attr->sensor_voltdm_name);
>> goto exit;
>
> This looks good, so here is the ack:
> Acked-by: Jean Pihet <j-pihet@ti.com>
>
Thanks, queuing this one for v3.7-rc.
Kevin
^ permalink raw reply
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