* [PATCH v2 04/14] mtd: nand: omap: read nand using register address
From: Afzal Mohammed @ 2012-10-08 5:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1349672877.git.afzal@ti.com>
Now that gpmc-nand registers are available in driver, use it
to read nand data.
"65b97cf mtd: nand: omap2: handle nand on gpmc" modified all
other instances. After initial versions of that patch, a new
change added reading nand data using gpmc exposed function.
In the final version this change was not taken care.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
---
drivers/mtd/nand/omap2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 4c33135..abfc602 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -996,7 +996,7 @@ static int omap_wait(struct mtd_info *mtd, struct nand_chip *chip)
cond_resched();
}
- status = gpmc_nand_read(info->gpmc_cs, GPMC_NAND_DATA);
+ status = readb(info->reg.gpmc_nand_data);
return status;
}
--
1.7.12
^ permalink raw reply related
* [PATCH v2 03/14] mtd: nand: omap: free region as per resource size
From: Afzal Mohammed @ 2012-10-08 5:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1349672877.git.afzal@ti.com>
memory as is now obtained via resource, upon freeing use
resource size. This also helps get rid of one macro.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
---
drivers/mtd/nand/omap2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5b31386..4c33135 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1513,7 +1513,7 @@ static int omap_nand_remove(struct platform_device *pdev)
/* Release NAND device, its internal structures and partitions */
nand_release(&info->mtd);
iounmap(info->nand.IO_ADDR_R);
- release_mem_region(info->phys_base, NAND_IO_SIZE);
+ release_mem_region(info->phys_base, info->mem_size);
kfree(info);
return 0;
}
--
1.7.12
^ permalink raw reply related
* [PATCH v2 02/14] mtd: onenand: omap: cleanup gpmc dependency
From: Afzal Mohammed @ 2012-10-08 5:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1349672877.git.afzal@ti.com>
requesting, freeing gpmc cs is now handled fully
by gpmc, remove left out gpmc dependency as well
as unnecessary include of gpmc.h
Signed-off-by: Afzal Mohammed <afzal@ti.com>
---
drivers/mtd/onenand/omap2.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index 1961be9..d7ef2c9 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -38,7 +38,6 @@
#include <linux/regulator/consumer.h>
#include <asm/mach/flash.h>
-#include <plat/gpmc.h>
#include <linux/platform_data/mtd-onenand-omap2.h>
#include <asm/gpio.h>
@@ -803,7 +802,6 @@ static int __devexit omap2_onenand_remove(struct platform_device *pdev)
}
iounmap(c->onenand.base);
release_mem_region(c->phys_base, c->mem_size);
- gpmc_cs_free(c->gpmc_cs);
kfree(c);
return 0;
--
1.7.12
^ permalink raw reply related
* [PATCH v2 01/14] ARM: OMAP2+: gpmc: annotate exit sections properly
From: Afzal Mohammed @ 2012-10-08 5:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1349672877.git.afzal@ti.com>
compiler complained,
`gpmc_remove' referenced in section `.data' of arch/arm/mach-omap2/built-in.o: defined in discarded section `.exit.text' of arch/arm/mach-omap2/built-in.o
Annotate gpmc_remove function and dependents with __devexit.
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
---
arch/arm/mach-omap2/gpmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 2cbdcb9..163458d 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -886,7 +886,7 @@ static int gpmc_setup_irq(void)
return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL);
}
-static __exit int gpmc_free_irq(void)
+static __devexit int gpmc_free_irq(void)
{
int i;
@@ -992,7 +992,7 @@ static __devinit int gpmc_probe(struct platform_device *pdev)
return 0;
}
-static __exit int gpmc_remove(struct platform_device *pdev)
+static __devexit int gpmc_remove(struct platform_device *pdev)
{
gpmc_free_irq();
gpmc_mem_exit();
--
1.7.12
^ permalink raw reply related
* [PATCH v2 00/14] OMAP-GPMC related cleanup for common zImage
From: Afzal Mohammed @ 2012-10-08 5:35 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
This version(v2) of gpmc related cleanup for common zImage compared to
initial version, resolves build error upon selecting BCH CONFIG option.
Also a trivial patch on gpmc header removal from nand driver has been
squashed with patch that removes nand driver dependency on gpmc header
file.
This series cleans up omap-gpmc related code so that omap can
be a part of common zImage.
This series moves gpmc.h from plat-omap/include/plat to mach-omap2
so that header file is local.
Patches 1-4 qualifies as -rc material.
Patch 1 is an already posted one, has been pulled into this series.
Patches 5-6 removes necessity of cpu.h from onenand driver based
on Tony's suggestion.
Patches 7 & 8 cleans up the already moved platform data header files
to contain only platform data. Also gpmc-nand information is moved
to nand platform data header.
Patches 9-13 makes nand driver independent of gpmc header file
And the final patch localizes gpmc header.
This has been tested on omap3evm.
This series is available
@ git://gitorious.org/x0148406-public/linux-kernel.git gpmc-czimage-v2
and is based on
linux-next (next-20121005)
and is dependent on
http://marc.info/?l=linux-omap&m=134945131602622&w=2
Regards
Afzal
Afzal Mohammed (14):
ARM: OMAP2+: gpmc: annotate exit sections properly
mtd: onenand: omap: cleanup gpmc dependency
mtd: nand: omap: free region as per resource size
mtd: nand: omap: read nand using register address
ARM: OMAP2+: onenand: connected soc info in pdata
mtd: onenand: omap: use pdata info instead of cpu_is
ARM: OMAP2+: onenand: header cleanup
ARM: OMAP2+: nand: header cleanup
mtd: nand: omap: bring in gpmc nand macros
ARM: OMAP2+: nand: bch capability check
ARM: OMAP2+: gpmc: nand register helper bch update
mtd: nand: omap: handle gpmc bch[48]
ARM: OMAP2+: gpmc: remove exported nand functions
ARM: OMAP2+: gpmc: localize gpmc header
arch/arm/mach-omap2/board-2430sdp.c | 2 +-
arch/arm/mach-omap2/board-3430sdp.c | 2 +-
arch/arm/mach-omap2/board-apollon.c | 2 +-
arch/arm/mach-omap2/board-cm-t35.c | 5 +-
arch/arm/mach-omap2/board-cm-t3517.c | 5 +-
arch/arm/mach-omap2/board-devkit8000.c | 2 +-
arch/arm/mach-omap2/board-flash.c | 7 +-
arch/arm/mach-omap2/board-flash.h | 2 +-
arch/arm/mach-omap2/board-h4.c | 2 +-
arch/arm/mach-omap2/board-igep0020.c | 3 +-
arch/arm/mach-omap2/board-ldp.c | 2 +-
arch/arm/mach-omap2/board-n8x0.c | 1 +
arch/arm/mach-omap2/board-omap3beagle.c | 2 +-
arch/arm/mach-omap2/board-omap3logic.c | 2 +-
arch/arm/mach-omap2/board-omap3pandora.c | 3 +-
arch/arm/mach-omap2/board-omap3stalker.c | 2 +-
arch/arm/mach-omap2/board-omap3touchbook.c | 2 +-
arch/arm/mach-omap2/board-overo.c | 2 +-
arch/arm/mach-omap2/board-rm680.c | 3 +-
arch/arm/mach-omap2/board-rx51-peripherals.c | 3 +-
arch/arm/mach-omap2/board-rx51.c | 2 +-
arch/arm/mach-omap2/board-zoom-debugboard.c | 2 +-
arch/arm/mach-omap2/common-board-devices.c | 1 -
arch/arm/mach-omap2/gpmc-nand.c | 81 +++--
arch/arm/mach-omap2/gpmc-nand.h | 27 ++
arch/arm/mach-omap2/gpmc-onenand.c | 9 +-
arch/arm/mach-omap2/gpmc-onenand.h | 24 ++
arch/arm/mach-omap2/gpmc-smc91x.c | 2 +-
arch/arm/mach-omap2/gpmc-smsc911x.c | 2 +-
arch/arm/mach-omap2/gpmc.c | 459 ++----------------------
arch/arm/mach-omap2/gpmc.h | 154 ++++++++
arch/arm/mach-omap2/pm34xx.c | 2 +-
arch/arm/mach-omap2/usb-tusb6010.c | 2 +-
arch/arm/plat-omap/include/plat/gpmc.h | 209 -----------
drivers/mtd/nand/omap2.c | 125 +++++--
drivers/mtd/onenand/omap2.c | 9 +-
include/linux/platform_data/mtd-nand-omap2.h | 46 ++-
include/linux/platform_data/mtd-onenand-omap2.h | 20 +-
38 files changed, 472 insertions(+), 758 deletions(-)
create mode 100644 arch/arm/mach-omap2/gpmc-nand.h
create mode 100644 arch/arm/mach-omap2/gpmc-onenand.h
create mode 100644 arch/arm/mach-omap2/gpmc.h
delete mode 100644 arch/arm/plat-omap/include/plat/gpmc.h
--
1.7.12
^ permalink raw reply
* [PATCH 3/3] ARM: OMAP: ocp2scp: create omap device for ocp2scp
From: kishon @ 2012-10-08 5:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <506F5F69.6040104@mvista.com>
Hi,
On Saturday 06 October 2012 04:00 AM, Sergei Shtylyov wrote:
> Hello.
>
> On 05-10-2012 12:07, Kishon Vijay Abraham I wrote:
>
>> Platfrom device for ocp2scp is created using omap_device_build in
>> devices file. This is used for both omap4(musb) and omap5(dwc3).
>>
>> Signed-off-by: Kishon Vijay Abraham I<kishon@ti.com>
>> ---
>> arch/arm/mach-omap2/devices.c | 72
>> +++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 72 insertions(+)
>>
>> diff --git a/arch/arm/mach-omap2/devices.c
>> b/arch/arm/mach-omap2/devices.c
>> index c8c2117..e2ba505 100644
>> --- a/arch/arm/mach-omap2/devices.c
>> +++ b/arch/arm/mach-omap2/devices.c
> [...]
>> @@ -613,6 +614,76 @@ static void omap_init_vout(void)
> [...]
>
>> +static void omap_init_ocp2scp(void)
>> +{
>> + struct omap_hwmod *oh;
>> + struct platform_device *pdev;
>> + int bus_id = -1, dev_cnt = 0, i;
>> + struct omap_ocp2scp_dev *ocp2scp_dev;
>> + const char *oh_name, *name;
>> + struct omap_ocp2scp_platform_data *pdata;
>> +
>> + oh_name = "ocp2scp_usb_phy";
>> + name = "omap-ocp2scp";
>> +
>> + oh = omap_hwmod_lookup(oh_name);
>> + if (!oh) {
>> + pr_err("%s: could not find omap_hwmod for %s\n", __func__,
>> + oh_name);
>> + return;
>> + }
>> +
>> + pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
>> + if (!pdata) {
>> + pr_err("%s: No memory for ocp2scp pdata\n", __func__);
>> + return;
>> + }
>> +
>> + ocp2scp_dev = oh->dev_attr;
>> + dev_cnt = count_ocp2scp_devices(ocp2scp_dev);
>> +
>> + if (!dev_cnt) {
>> + pr_err("%s: No devices connected to ocp2scp\n", __func__);
>> + return;
>
> Don't you leak 'pdata' here?
>
>> + }
>> +
>> + pdata->devices = kzalloc(sizeof(struct omap_ocp2scp_dev *)
>> + * dev_cnt, GFP_KERNEL);
>> + if (!pdata->devices) {
>> + pr_err("%s: No memory for ocp2scp pdata devices\n", __func__);
>> + return;
>> + }
>> +
>> + for (i = 0; i< dev_cnt; i++, ocp2scp_dev++)
>> + pdata->devices[i] = ocp2scp_dev;
>> +
>> + pdata->dev_cnt = dev_cnt;
>> +
>> + pdev = omap_device_build(name, bus_id, oh, pdata, sizeof(*pdata),
>> NULL,
>> + 0, false);
>> + if (IS_ERR(pdev)) {
>> + pr_err("Could not build omap_device for %s %s\n",
>> + name, oh_name);
>> + return;
>
> Don't you leak 'pdata' and 'pdata->devices' here?
Will re-post the patch fixing it.
Thanks
Kishon
^ permalink raw reply
* imx6q: high interrupt latencies
From: Shawn Guo @ 2012-10-08 5:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50676F21.4000705@xenomai.org>
On Sat, Sep 29, 2012 at 11:58:57PM +0200, Gilles Chanteperdrix wrote:
>
> Hi,
>
> I have been observing high interrupt latencies on imx6q, the problem
> seems to be in the FEC driver, function fec_enet_tx. The following line:
>
> while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) {
>
> can take 100us or more to execute, during which the local timer
> interrupt are postponed.
>
> As far as I understand, bdp is a pointer to a "struct bufdesc" shared
> with the hardware and its status member is updated by the hardware when
> the corresponding ethernet packet transmission is complete.
>
> Adding a call to "mb()" or "outer_sync()" before reading the status
> seems to avoid the issue, though I do not know if this is the proper fix.
>
> Some more data. The boot logs say:
> CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c53c7d
> CPU identified as i.MX6Q, silicon rev 1.0
> l2x0: 16 ways, CACHE_ID 0x410000c7
>
> the kernel is compiled with the following errata enabled:
> CONFIG_PL310_ERRATA_588369
> CONFIG_PL310_ERRATA_727915
> CONFIG_ARM_ERRATA_743622
> CONFIG_ARM_ERRATA_751472
> CONFIG_ARM_ERRATA_754322
> CONFIG_ARM_ERRATA_764369
> CONFIG_PL310_ERRATA_769419
>
Are you running mainline kernel? The boot log and the errata settings
are different from what we have with mainline kernel.
I'm using the following patch to measure the time on with v3.6 kernel,
and seeing the output is mostly 2 ~ 4 us.
diff --git a/drivers/net/ethernet/freescale/fec.c b/drivers/net/ethernet/freescale/fec.c
index fffd205..f72955a 100644
--- a/drivers/net/ethernet/freescale/fec.c
+++ b/drivers/net/ethernet/freescale/fec.c
@@ -566,11 +566,13 @@ fec_enet_tx(struct net_device *ndev)
struct bufdesc *bdp;
unsigned short status;
struct sk_buff *skb;
+ struct timeval time1, time2;
fep = netdev_priv(ndev);
spin_lock(&fep->hw_lock);
bdp = fep->dirty_tx;
+ do_gettimeofday(&time1);
while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) {
if (bdp == fep->cur_tx && fep->tx_full == 0)
break;
@@ -627,6 +629,8 @@ fec_enet_tx(struct net_device *ndev)
netif_wake_queue(ndev);
}
}
+ do_gettimeofday(&time2);
+ printk("*** %s: %lu\n", __func__, timeval_to_ns(&time2) - timeval_to_ns(&time1));
fep->dirty_tx = bdp;
spin_unlock(&fep->hw_lock);
}
Shawn
^ permalink raw reply related
* [PATCH v2 0/7] uio_pruss cleanup and platform support
From: Hebbar, Gururaja @ 2012-10-08 5:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121005212826.GN11149@beef>
On Sat, Oct 06, 2012 at 02:58:26, Porter, Matt wrote:
> On Fri, Oct 05, 2012 at 04:43:56AM +0000, Hebbar, Gururaja wrote:
> > Matt,
> >
> > On Wed, Oct 03, 2012 at 20:30:58, Porter, Matt wrote:
> > > On Fri, Sep 28, 2012 at 03:37:45PM -0400, Matt Porter wrote:
> > > > Changes since v1:
> > > > - Replaced uio_pruss private SRAM API use with genalloc
> > > > - Added DA850 platform device and clock support
> > > > - Added DA850 L3 RAM gen_pool support
> > > > - Split out DT binding
> > > >
> > > > This series enables uio_pruss on both DA850 and AM33xx. The driver
> > > > previously was not enabled by any platform and the private SRAM API
> > > > was accessing an invalid SRAM bank for use on DA850. For AM33xx,
> > > > DT, pinctrl, and runtime PM support are added since AM33xx only
> > > > boots via DT.
> > >
> > > I'm dropping AM33xx/OMAP support from v3 for this series
> >
> > Just for my clarification, I believe you will be taking up AM33xx/OMAP
> > SRAM support later once you have completed supporting DaVinci. Right?
>
> There's no SRAM support for uio_pruss to be handled for AM33xx,
Sorry for not being clearer.
I was referring to adding SRAM support for McASP module on AM335x platform.
> but I
> will be posting a separate series with the DT portion and some alternate
> hard reset handling implementation. I find the private OMAP reset api to
> be very ugly but we might have to go with that for now. I didn't want
> the OMAP hard reset portion to hold up the more important part of this
> cleanup.
>
> -Matt
>
> > > since the
> > > focus has turned to fixing Davinci SRAM to provide genalloc support
> > > and the associated use of that in the driver.
> > >
> > > I'll have a separate series with AM33xx support since dealing cleanly
> > > with external resets on OMAP is a bigger issue.
> > >
> > > -Matt
> > > _______________________________________________
> > > Davinci-linux-open-source mailing list
> > > Davinci-linux-open-source at linux.davincidsp.com
> > > http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
> > >
> >
> >
> > Regards,
> > Gururaja
> > _______________________________________________
> > Davinci-linux-open-source mailing list
> > Davinci-linux-open-source at linux.davincidsp.com
> > http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
>
Regards,
Gururaja
^ permalink raw reply
* [PATCH 1/1] mtd: st fsmc_nand: pass the ale and cmd resource via resource
From: Vipin Kumar @ 2012-10-08 4:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1349356456-13371-1-git-send-email-plagnioj@jcrosoft.com>
On 10/4/2012 6:44 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> Do not use the platform_data to pass resource and be smart in the drivers.
> Just pass it via resource
>
> Switch to devm_request_and_ioremap at the sametime
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD<plagnioj@jcrosoft.com>
> Cc: Linus Walleij<linus.walleij@linaro.org>
> Cc: Vipin Kumar<vipin.kumar@st.com>
> Cc: linux-mtd at lists.infradead.org
> ---
> .../devicetree/bindings/mtd/fsmc-nand.txt | 12 +++---
> arch/arm/boot/dts/spear13xx.dtsi | 10 ++---
> arch/arm/boot/dts/spear300.dtsi | 8 ++--
> arch/arm/boot/dts/spear310.dtsi | 8 ++--
> arch/arm/boot/dts/spear320.dtsi | 8 ++--
> arch/arm/boot/dts/spear600.dtsi | 8 ++--
> arch/arm/mach-u300/core.c | 14 ++++++-
> drivers/mtd/nand/fsmc_nand.c | 44 +++++---------------
> include/linux/mtd/fsmc.h | 3 --
> 9 files changed, 49 insertions(+), 66 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mtd/fsmc-nand.txt b/Documentation/devicetree/bindings/mtd/fsmc-nand.txt
> index e2c663b..e3ea32e 100644
> --- a/Documentation/devicetree/bindings/mtd/fsmc-nand.txt
> +++ b/Documentation/devicetree/bindings/mtd/fsmc-nand.txt
> @@ -3,9 +3,7 @@
> Required properties:
> - compatible : "st,spear600-fsmc-nand"
> - reg : Address range of the mtd chip
> -- reg-names: Should contain the reg names "fsmc_regs" and "nand_data"
> -- st,ale-off : Chip specific offset to ALE
> -- st,cle-off : Chip specific offset to CLE
> +- reg-names: Should contain the reg names "fsmc_regs", "nand_data", "nand_addr" and "nand_cmd"
>
> Optional properties:
> - bank-width : Width (in bytes) of the device. If not present, the width
> @@ -19,10 +17,10 @@ Example:
> #address-cells =<1>;
> #size-cells =<1>;
> reg =<0xd1800000 0x1000 /* FSMC Register */
> - 0xd2000000 0x4000>; /* NAND Base */
> - reg-names = "fsmc_regs", "nand_data";
> - st,ale-off =<0x20000>;
> - st,cle-off =<0x10000>;
> + 0xd2000000 0x0010 /* NAND Base DATA */
> + 0xd2020000 0x0010 /* NAND Base ADDR */
> + 0xd2010000 0x0010>; /* NAND Base CMD */
> + reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
>
> bank-width =<1>;
> nand-skip-bbtscan;
> diff --git a/arch/arm/boot/dts/spear13xx.dtsi b/arch/arm/boot/dts/spear13xx.dtsi
> index f7b84ac..14a6d15 100644
> --- a/arch/arm/boot/dts/spear13xx.dtsi
> +++ b/arch/arm/boot/dts/spear13xx.dtsi
> @@ -104,15 +104,15 @@
> compatible = "st,spear600-fsmc-nand";
> #address-cells =<1>;
> #size-cells =<1>;
> - reg =<0xb0000000 0x1000 /* FSMC Register */
> - 0xb0800000 0x0010>; /* NAND Base */
> - reg-names = "fsmc_regs", "nand_data";
> + reg =<0xb0000000 0x1000 /* FSMC Register*/
> + 0xb0800000 0x0010 /* NAND Base DATA */
> + 0xb0820000 0x0010 /* NAND Base ADDR */
> + 0xb0810000 0x0010>; /* NAND Base CMD */
> + reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
> interrupts =<0 20 0x4
> 0 21 0x4
> 0 22 0x4
> 0 23 0x4>;
> - st,ale-off =<0x20000>;
> - st,cle-off =<0x10000>;
> status = "disabled";
> };
>
> diff --git a/arch/arm/boot/dts/spear300.dtsi b/arch/arm/boot/dts/spear300.dtsi
> index ed3627c..bc43638 100644
> --- a/arch/arm/boot/dts/spear300.dtsi
> +++ b/arch/arm/boot/dts/spear300.dtsi
> @@ -38,10 +38,10 @@
> #address-cells =<1>;
> #size-cells =<1>;
> reg =<0x94000000 0x1000 /* FSMC Register */
> - 0x80000000 0x0010>; /* NAND Base */
> - reg-names = "fsmc_regs", "nand_data";
> - st,ale-off =<0x20000>;
> - st,cle-off =<0x10000>;
> + 0x80000000 0x0010 /* NAND Base DATA */
> + 0x80020000 0x0010 /* NAND Base ADDR */
> + 0x80010000 0x0010>; /* NAND Base CMD */
> + reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
> status = "disabled";
> };
>
> diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi
> index 62fc4fb..7840e52 100644
> --- a/arch/arm/boot/dts/spear310.dtsi
> +++ b/arch/arm/boot/dts/spear310.dtsi
> @@ -32,10 +32,10 @@
> #address-cells =<1>;
> #size-cells =<1>;
> reg =<0x44000000 0x1000 /* FSMC Register */
> - 0x40000000 0x0010>; /* NAND Base */
> - reg-names = "fsmc_regs", "nand_data";
> - st,ale-off =<0x10000>;
> - st,cle-off =<0x20000>;
> + 0x40000000 0x0010 /* NAND Base DATA */
> + 0x40020000 0x0010 /* NAND Base ADDR */
> + 0x40010000 0x0010>; /* NAND Base CMD */
> + reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
> status = "disabled";
> };
>
> diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi
> index 1f49d69..5ad8206 100644
> --- a/arch/arm/boot/dts/spear320.dtsi
> +++ b/arch/arm/boot/dts/spear320.dtsi
> @@ -38,10 +38,10 @@
> #address-cells =<1>;
> #size-cells =<1>;
> reg =<0x4c000000 0x1000 /* FSMC Register */
> - 0x50000000 0x0010>; /* NAND Base */
> - reg-names = "fsmc_regs", "nand_data";
> - st,ale-off =<0x20000>;
> - st,cle-off =<0x10000>;
> + 0x50000000 0x0010 /* NAND Base DATA */
> + 0x50020000 0x0010 /* NAND Base ADDR */
> + 0x50010000 0x0010>; /* NAND Base CMD */
> + reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
> status = "disabled";
> };
>
> diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi
> index a3c36e4..4ecc66f 100644
> --- a/arch/arm/boot/dts/spear600.dtsi
> +++ b/arch/arm/boot/dts/spear600.dtsi
> @@ -67,10 +67,10 @@
> #address-cells =<1>;
> #size-cells =<1>;
> reg =<0xd1800000 0x1000 /* FSMC Register */
> - 0xd2000000 0x4000>; /* NAND Base */
> - reg-names = "fsmc_regs", "nand_data";
> - st,ale-off =<0x20000>;
> - st,cle-off =<0x10000>;
> + 0xd2000000 0x0010 /* NAND Base DATA */
> + 0xd2020000 0x0010 /* NAND Base ADDR */
> + 0xd2010000 0x0010>; /* NAND Base CMD */
> + reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
> status = "disabled";
> };
>
> diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
> index ef6f602..527bcc2 100644
> --- a/arch/arm/mach-u300/core.c
> +++ b/arch/arm/mach-u300/core.c
> @@ -252,6 +252,18 @@ static struct resource rtc_resources[] = {
> */
> static struct resource fsmc_resources[] = {
> {
> + .name = "nand_addr",
> + .start = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_ALE,
> + .end = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_ALE + SZ_16K - 1,
> + .flags = IORESOURCE_MEM,
> + },
> + {
> + .name = "nand_cmd",
> + .start = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_CLE,
> + .end = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_CLE + SZ_16K - 1,
> + .flags = IORESOURCE_MEM,
> + },
> + {
> .name = "nand_data",
> .start = U300_NAND_CS0_PHYS_BASE,
> .end = U300_NAND_CS0_PHYS_BASE + SZ_16K - 1,
> @@ -1496,8 +1508,6 @@ static struct fsmc_nand_platform_data nand_platform_data = {
> .nr_partitions = ARRAY_SIZE(u300_partitions),
> .options = NAND_SKIP_BBTSCAN,
> .width = FSMC_NAND_BW8,
> - .ale_off = PLAT_NAND_ALE,
> - .cle_off = PLAT_NAND_CLE,
> };
>
> static struct platform_device nand_device = {
> diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
> index 38d2624..cb86450 100644
> --- a/drivers/mtd/nand/fsmc_nand.c
> +++ b/drivers/mtd/nand/fsmc_nand.c
> @@ -876,8 +876,6 @@ static int __devinit fsmc_nand_probe_config_dt(struct platform_device *pdev,
> return -EINVAL;
> }
> }
> - of_property_read_u32(np, "st,ale-off",&pdata->ale_off);
> - of_property_read_u32(np, "st,cle-off",&pdata->cle_off);
> if (of_get_property(np, "nand-skip-bbtscan", NULL))
> pdata->options = NAND_SKIP_BBTSCAN;
>
> @@ -935,41 +933,28 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
> if (!res)
> return -EINVAL;
>
> - if (!devm_request_mem_region(&pdev->dev, res->start, resource_size(res),
> - pdev->name)) {
> - dev_err(&pdev->dev, "Failed to get memory data resourse\n");
> - return -ENOENT;
> - }
> -
> - host->data_pa = (dma_addr_t)res->start;
> - host->data_va = devm_ioremap(&pdev->dev, res->start,
> - resource_size(res));
> + host->data_va = devm_request_and_ioremap(&pdev->dev, res);
> if (!host->data_va) {
> dev_err(&pdev->dev, "data ioremap failed\n");
> return -ENOMEM;
> }
> + host->data_pa = (dma_addr_t)res->start;
>
> - if (!devm_request_mem_region(&pdev->dev, res->start + pdata->ale_off,
> - resource_size(res), pdev->name)) {
> - dev_err(&pdev->dev, "Failed to get memory ale resourse\n");
> - return -ENOENT;
> - }
> + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand_addr");
> + if (!res)
> + return -EINVAL;
>
> - host->addr_va = devm_ioremap(&pdev->dev, res->start + pdata->ale_off,
> - resource_size(res));
> + host->addr_va = devm_request_and_ioremap(&pdev->dev, res);
> if (!host->addr_va) {
> dev_err(&pdev->dev, "ale ioremap failed\n");
> return -ENOMEM;
> }
>
> - if (!devm_request_mem_region(&pdev->dev, res->start + pdata->cle_off,
> - resource_size(res), pdev->name)) {
> - dev_err(&pdev->dev, "Failed to get memory cle resourse\n");
> - return -ENOENT;
> - }
> + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand_cmd");
> + if (!res)
> + return -EINVAL;
>
> - host->cmd_va = devm_ioremap(&pdev->dev, res->start + pdata->cle_off,
> - resource_size(res));
> + host->cmd_va = devm_request_and_ioremap(&pdev->dev, res);
> if (!host->cmd_va) {
> dev_err(&pdev->dev, "ale ioremap failed\n");
> return -ENOMEM;
> @@ -979,14 +964,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
> if (!res)
> return -EINVAL;
>
> - if (!devm_request_mem_region(&pdev->dev, res->start, resource_size(res),
> - pdev->name)) {
> - dev_err(&pdev->dev, "Failed to get memory regs resourse\n");
> - return -ENOENT;
> - }
> -
> - host->regs_va = devm_ioremap(&pdev->dev, res->start,
> - resource_size(res));
> + host->regs_va = devm_request_and_ioremap(&pdev->dev, res);
> if (!host->regs_va) {
> dev_err(&pdev->dev, "regs ioremap failed\n");
> return -ENOMEM;
> diff --git a/include/linux/mtd/fsmc.h b/include/linux/mtd/fsmc.h
> index b200292..d6ed61e 100644
> --- a/include/linux/mtd/fsmc.h
> +++ b/include/linux/mtd/fsmc.h
> @@ -155,9 +155,6 @@ struct fsmc_nand_platform_data {
> unsigned int width;
> unsigned int bank;
>
> - /* CLE, ALE offsets */
> - unsigned int cle_off;
> - unsigned int ale_off;
> enum access_mode mode;
>
> void (*select_bank)(uint32_t bank, uint32_t busw);
btw, I also have a few pending patches on this driver which I would be
sending soon
Reviewed By: Vipin Kumar <vipin.kumar@st.com>
^ permalink raw reply
* [PATCH] ARM: sort select statements alphanumerically
From: Eric Miao @ 2012-10-08 2:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <E1TKX8k-0006QP-M5@rmk-PC.arm.linux.org.uk>
On Sun, Oct 7, 2012 at 12:22 AM, Russell King
<rmk+kernel@arm.linux.org.uk> wrote:
> As suggested by Andrew Morton:
>
> This is a pet peeve of mine. Any time there's a long list of items
> (header file inclusions, kconfig entries, array initalisers, etc) and
> someone wants to add a new item, they *always* go and stick it at the
> end of the list.
> ...
> Guys, don't do this. Either put the new item into a randomly-chosen
> position or, probably better, alphanumerically sort the list.
>
> For this reason it looks like approximately 0% of the patchset will
> apply, sorry.
>
> lets sort all our select statements alphanumerically. This commit was
> created by the following script:
>
> #!/usr/bin/perl
> while (<>) {
> while (/\\\s*$/) {
> $_ .= <>;
> }
> undef %selects if /^\s*config\s+/;
> if (/^\s+select\s+(\w+).*/) {
> if (defined($selects{$1})) {
> if ($selects{$1} eq $_) {
> print STDERR "Warning: removing duplicated $1 entry\n";
> } else {
> print STDERR "Error: $1 differently selected\n".
> "\tOld: $selects{$1}\n".
> "\tNew: $_\n";
> exit 1;
> }
> }
> $selects{$1} = $_;
> next;
> }
> if (%selects and (/^\s*$/ or /^\s+help/)) {
> foreach $k (sort (keys %selects)) {
> print "$selects{$k}";
> }
> undef %selects;
> }
> print;
> }
> if (%selects) {
> foreach $k (sort (keys %selects)) {
> print "$selects{$k}";
> }
> }
>
> It found two duplicates:
>
> Warning: removing duplicated S5P_SETUP_MIPIPHY entry
> Warning: removing duplicated HARDIRQS_SW_RESEND entry
>
> and they are identical duplicates, hence the shrinkage in the diffstat
> of two lines.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> ---
> This commit is likely to change as we get closer to the end of the merge
> window, as other changes get merged into Linus' tree. I will be refreshing
> this from time to time, and keeping it out of linux-next, as it will cause
> more pain than its worth to put it into linux-next.
>
> Anyone who wants to give this a review to check that it's correct are welcome,
> but I don't think it would be appropriate to collect attributation tags for
> it, as this won't be the final patch.
>
> This patch is intentionally broken to prevent Linus from applying it - this
> is information only!
>
> Anyone who wants to apply it can do so by first running this patch through:
>
> sed 's/^-- /@@ /'
>
> arch/arm/Kconfig | 399 ++++++++++++++++++-------------------
> arch/arm/common/Kconfig | 4 +-
> arch/arm/mach-at91/Kconfig | 26 ++--
> arch/arm/mach-clps711x/Kconfig | 4 +-
> arch/arm/mach-davinci/Kconfig | 16 +-
> arch/arm/mach-exynos/Kconfig | 181 +++++++++---------
> arch/arm/mach-footbridge/Kconfig | 8 +-
> arch/arm/mach-h720x/Kconfig | 2 +-
> arch/arm/mach-imx/Kconfig | 120 ++++++------
> arch/arm/mach-ixp4xx/Kconfig | 2 +-
> arch/arm/mach-mmp/Kconfig | 6 +-
> arch/arm/mach-msm/Kconfig | 28 ++--
> arch/arm/mach-nomadik/Kconfig | 4 +-
> arch/arm/mach-omap1/Kconfig | 8 +-
> arch/arm/mach-omap2/Kconfig | 68 +++---
> arch/arm/mach-prima2/Kconfig | 2 +-
> arch/arm/mach-pxa/Kconfig | 124 ++++++------
> arch/arm/mach-realview/Kconfig | 12 +-
> arch/arm/mach-s3c2412/Kconfig | 2 +-
> arch/arm/mach-s3c2440/Kconfig | 2 +-
> arch/arm/mach-s3c24xx/Kconfig | 82 ++++----
> arch/arm/mach-s3c64xx/Kconfig | 96 +++++-----
> arch/arm/mach-s5p64x0/Kconfig | 28 ++--
> arch/arm/mach-s5pc100/Kconfig | 12 +-
> arch/arm/mach-s5pv210/Kconfig | 50 +++---
> arch/arm/mach-sa1100/Kconfig | 12 +-
> arch/arm/mach-shmobile/Kconfig | 42 ++--
> arch/arm/mach-tegra/Kconfig | 32 ++--
> arch/arm/mach-u300/Kconfig | 2 +-
> arch/arm/mach-ux500/Kconfig | 16 +-
> arch/arm/mach-versatile/Kconfig | 4 +-
> arch/arm/mm/Kconfig | 106 +++++-----
> arch/arm/plat-mxc/Kconfig | 4 +-
> arch/arm/plat-mxc/devices/Kconfig | 2 +-
> arch/arm/plat-nomadik/Kconfig | 2 +-
> arch/arm/plat-omap/Kconfig | 8 +-
> arch/arm/plat-s3c24xx/Kconfig | 2 +-
> arch/arm/plat-samsung/Kconfig | 14 +-
> arch/arm/plat-spear/Kconfig | 4 +-
> 39 files changed, 767 insertions(+), 769 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 7bab17e..4df850c 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> -- -1,54 +1,53 @@
> config ARM
> bool
> default y
> + select ARCH_BINFMT_ELF_RANDOMIZE_PIE
> + select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
> select ARCH_HAVE_CUSTOM_GPIO_H
> - select HAVE_AOUT
> - select HAVE_DMA_API_DEBUG
> - select HAVE_IDE if PCI || ISA || PCMCIA
> - select HAVE_DMA_ATTRS
> - select HAVE_DMA_CONTIGUOUS if MMU
> - select HAVE_MEMBLOCK
> - select RTC_LIB
> - select SYS_SUPPORTS_APM_EMULATION
> + select ARCH_WANT_IPC_PARSE_VERSION
> + select CPU_PM if (SUSPEND || CPU_IDLE)
> + select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN
> select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
> - select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
> - select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
> + select GENERIC_CLOCKEVENTS_BROADCAST if SMP
> + select GENERIC_IRQ_PROBE
> + select GENERIC_IRQ_SHOW
> + select GENERIC_PCI_IOMAP
> + select GENERIC_SMP_IDLE_THREAD
> + select GENERIC_STRNCPY_FROM_USER
> + select GENERIC_STRNLEN_USER
> + select HARDIRQS_SW_RESEND
> + select HAVE_AOUT
> select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
> select HAVE_ARCH_KGDB
> select HAVE_ARCH_TRACEHOOK
> - select HAVE_KPROBES if !XIP_KERNEL
> - select HAVE_KRETPROBES if (HAVE_KPROBES)
> - select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
> - select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
> + select HAVE_BPF_JIT
> + select HAVE_C_RECORDMCOUNT
> + select HAVE_DMA_API_DEBUG
> + select HAVE_DMA_ATTRS
> + select HAVE_DMA_CONTIGUOUS if MMU
> select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
> + select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
> select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
> - select ARCH_BINFMT_ELF_RANDOMIZE_PIE
> + select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
> select HAVE_GENERIC_DMA_COHERENT
> + select HAVE_GENERIC_HARDIRQS
> + select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
> + select HAVE_IDE if PCI || ISA || PCMCIA
> + select HAVE_IRQ_WORK
> select HAVE_KERNEL_GZIP
> - select HAVE_KERNEL_LZO
> select HAVE_KERNEL_LZMA
> + select HAVE_KERNEL_LZO
> select HAVE_KERNEL_XZ
> - select HAVE_IRQ_WORK
> + select HAVE_KPROBES if !XIP_KERNEL
> + select HAVE_KRETPROBES if (HAVE_KPROBES)
> + select HAVE_MEMBLOCK
> + select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
> select HAVE_PERF_EVENTS
> - select PERF_USE_VMALLOC
> select HAVE_REGS_AND_STACK_ACCESS_API
> - select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
> - select HAVE_C_RECORDMCOUNT
> - select HAVE_GENERIC_HARDIRQS
> - select HARDIRQS_SW_RESEND
> - select GENERIC_IRQ_PROBE
> - select GENERIC_IRQ_SHOW
> - select ARCH_WANT_IPC_PARSE_VERSION
> - select HARDIRQS_SW_RESEND
> - select CPU_PM if (SUSPEND || CPU_IDLE)
> - select GENERIC_PCI_IOMAP
> - select HAVE_BPF_JIT
> - select GENERIC_SMP_IDLE_THREAD
> select KTIME_SCALAR
> - select GENERIC_CLOCKEVENTS_BROADCAST if SMP
> - select GENERIC_STRNCPY_FROM_USER
> - select GENERIC_STRNLEN_USER
> - select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN
> + select PERF_USE_VMALLOC
> + select RTC_LIB
> + select SYS_SUPPORTS_APM_EMULATION
> help
> The ARM series is a line of low-power-consumption RISC chip designs
> licensed by ARM Ltd and targeted at embedded applications and
> -- -64,9 +63,9 @@ config NEED_SG_DMA_LENGTH
> bool
>
> config ARM_DMA_USE_IOMMU
> - select NEED_SG_DMA_LENGTH
> - select ARM_HAS_SG_CHAIN
> bool
> + select ARM_HAS_SG_CHAIN
> + select NEED_SG_DMA_LENGTH
>
> config HAVE_PWM
> bool
> -- -258,69 +257,69 @@ choice
>
> config ARCH_MULTIPLATFORM
> bool "Allow multiple platforms to be selected"
> + depends on MMU
> select ARM_PATCH_PHYS_VIRT
> select AUTO_ZRELADDR
> select COMMON_CLK
> select MULTI_IRQ_HANDLER
> select SPARSE_IRQ
> select USE_OF
> - depends on MMU
>
> config ARCH_INTEGRATOR
> bool "ARM Ltd. Integrator family"
> - select ARM_AMBA
> select ARCH_HAS_CPUFREQ
> + select ARM_AMBA
> select COMMON_CLK
> select COMMON_CLK_VERSATILE
> + select GENERIC_CLOCKEVENTS
> select HAVE_TCM
> select ICST
> - select GENERIC_CLOCKEVENTS
> + select MULTI_IRQ_HANDLER
> + select NEED_MACH_MEMORY_H
> select PLAT_VERSATILE
> select PLAT_VERSATILE_FPGA_IRQ
> - select NEED_MACH_MEMORY_H
> select SPARSE_IRQ
> - select MULTI_IRQ_HANDLER
> help
> Support for ARM's Integrator platform.
>
> config ARCH_REALVIEW
> bool "ARM Ltd. RealView family"
> + select ARCH_WANT_OPTIONAL_GPIOLIB
> select ARM_AMBA
> + select ARM_TIMER_SP804
> select COMMON_CLK
> select COMMON_CLK_VERSATILE
> - select ICST
> select GENERIC_CLOCKEVENTS
> - select ARCH_WANT_OPTIONAL_GPIOLIB
> - select PLAT_VERSATILE
> - select PLAT_VERSATILE_CLCD
> - select ARM_TIMER_SP804
> select GPIO_PL061 if GPIOLIB
> + select ICST
> select NEED_MACH_MEMORY_H
> + select PLAT_VERSATILE
> + select PLAT_VERSATILE_CLCD
> help
> This enables support for ARM Ltd RealView boards.
>
> config ARCH_VERSATILE
> bool "ARM Ltd. Versatile family"
> + select ARCH_WANT_OPTIONAL_GPIOLIB
> select ARM_AMBA
> + select ARM_TIMER_SP804
> select ARM_VIC
> select CLKDEV_LOOKUP
> + select GENERIC_CLOCKEVENTS
> select HAVE_MACH_CLKDEV
> select ICST
> - select GENERIC_CLOCKEVENTS
> - select ARCH_WANT_OPTIONAL_GPIOLIB
> select PLAT_VERSATILE
> - select PLAT_VERSATILE_CLOCK
> select PLAT_VERSATILE_CLCD
> + select PLAT_VERSATILE_CLOCK
> select PLAT_VERSATILE_FPGA_IRQ
> - select ARM_TIMER_SP804
> help
> This enables support for ARM Ltd Versatile board.
>
> config ARCH_AT91
> bool "Atmel AT91"
> select ARCH_REQUIRE_GPIOLIB
> - select HAVE_CLK
> select CLKDEV_LOOKUP
> + select HAVE_CLK
> select IRQ_DOMAIN
> select NEED_MACH_GPIO_H
> select NEED_MACH_IO_H if PCCARD
> -- -347,19 +346,19 @@ config ARCH_BCM2835
>
> config ARCH_CLPS711X
> bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
> - select CPU_ARM720T
> select ARCH_USES_GETTIMEOFFSET
> - select COMMON_CLK
> select CLKDEV_LOOKUP
> + select COMMON_CLK
> + select CPU_ARM720T
> select NEED_MACH_MEMORY_H
> help
> Support for Cirrus Logic 711x/721x/731x based boards.
>
> config ARCH_CNS3XXX
> bool "Cavium Networks CNS3XXX family"
> + select ARM_GIC
> select CPU_V6K
> select GENERIC_CLOCKEVENTS
> - select ARM_GIC
> select MIGHT_HAVE_CACHE_L2X0
> select MIGHT_HAVE_PCI
> select PCI_DOMAINS if PCI
> -- -368,20 +367,20 @@ config ARCH_CNS3XXX
>
> config ARCH_GEMINI
> bool "Cortina Systems Gemini"
> - select CPU_FA526
> select ARCH_REQUIRE_GPIOLIB
> select ARCH_USES_GETTIMEOFFSET
> + select CPU_FA526
> help
> Support for the Cortina Systems Gemini family SoCs
>
> config ARCH_SIRF
> bool "CSR SiRF"
> - select NO_IOPORT
> select ARCH_REQUIRE_GPIOLIB
> - select GENERIC_CLOCKEVENTS
> select COMMON_CLK
> + select GENERIC_CLOCKEVENTS
> select GENERIC_IRQ_CHIP
> select MIGHT_HAVE_CACHE_L2X0
> + select NO_IOPORT
> select PINCTRL
> select PINCTRL_SIRF
> select USE_OF
> -- -390,12 +389,12 @@ config ARCH_SIRF
>
> config ARCH_EBSA110
> bool "EBSA-110"
> + select ARCH_USES_GETTIMEOFFSET
> select CPU_SA110
> select ISA
> - select NO_IOPORT
> - select ARCH_USES_GETTIMEOFFSET
> select NEED_MACH_IO_H
> select NEED_MACH_MEMORY_H
> + select NO_IOPORT
> help
> This is an evaluation board for the StrongARM processor available
> from Digital. It has limited hardware on-board, including an
> -- -404,13 +403,13 @@ config ARCH_EBSA110
>
> config ARCH_EP93XX
> bool "EP93xx-based"
> - select CPU_ARM920T
> + select ARCH_HAS_HOLES_MEMORYMODEL
> + select ARCH_REQUIRE_GPIOLIB
> + select ARCH_USES_GETTIMEOFFSET
> select ARM_AMBA
> select ARM_VIC
> select CLKDEV_LOOKUP
> - select ARCH_REQUIRE_GPIOLIB
> - select ARCH_HAS_HOLES_MEMORYMODEL
> - select ARCH_USES_GETTIMEOFFSET
> + select CPU_ARM920T
> select NEED_MACH_MEMORY_H
> help
> This enables support for the Cirrus EP93xx series of CPUs.
> -- -429,10 +428,10 @@ config ARCH_FOOTBRIDGE
>
> config ARCH_MXC
> bool "Freescale MXC/iMX-based"
> - select GENERIC_CLOCKEVENTS
> select ARCH_REQUIRE_GPIOLIB
> select CLKDEV_LOOKUP
> select CLKSRC_MMIO
> + select GENERIC_CLOCKEVENTS
> select GENERIC_IRQ_CHIP
> select MULTI_IRQ_HANDLER
> select SPARSE_IRQ
> -- -442,11 +441,11 @@ config ARCH_MXC
>
> config ARCH_MXS
> bool "Freescale MXS-based"
> - select GENERIC_CLOCKEVENTS
> select ARCH_REQUIRE_GPIOLIB
> select CLKDEV_LOOKUP
> select CLKSRC_MMIO
> select COMMON_CLK
> + select GENERIC_CLOCKEVENTS
> select HAVE_CLK_PREPARE
> select MULTI_IRQ_HANDLER
> select PINCTRL
> -- -457,44 +456,44 @@ config ARCH_MXS
>
> config ARCH_NETX
> bool "Hilscher NetX based"
> + select ARM_VIC
> select CLKSRC_MMIO
> select CPU_ARM926T
> - select ARM_VIC
> select GENERIC_CLOCKEVENTS
> help
> This enables support for systems based on the Hilscher NetX Soc
>
> config ARCH_H720X
> bool "Hynix HMS720x-based"
> + select ARCH_USES_GETTIMEOFFSET
> select CPU_ARM720T
> select ISA_DMA_API
> - select ARCH_USES_GETTIMEOFFSET
> help
> This enables support for systems based on the Hynix HMS720x
>
> config ARCH_IOP13XX
> bool "IOP13xx-based"
> depends on MMU
> - select CPU_XSC3
> - select PLAT_IOP
> - select PCI
> select ARCH_SUPPORTS_MSI
> - select VMSPLIT_1G
> + select CPU_XSC3
> select NEED_MACH_MEMORY_H
> select NEED_RET_TO_USER
> + select PCI
> + select PLAT_IOP
> + select VMSPLIT_1G
> help
> Support for Intel's IOP13XX (XScale) family of processors.
>
> config ARCH_IOP32X
> bool "IOP32x-based"
> depends on MMU
> + select ARCH_REQUIRE_GPIOLIB
> select CPU_XSCALE
> select NEED_MACH_GPIO_H
> select NEED_MACH_IO_H
> select NEED_RET_TO_USER
> - select PLAT_IOP
> select PCI
> - select ARCH_REQUIRE_GPIOLIB
> + select PLAT_IOP
> help
> Support for Intel's 80219 and IOP32X (XScale) family of
> processors.
> -- -502,13 +501,13 @@ config ARCH_IOP32X
> config ARCH_IOP33X
> bool "IOP33x-based"
> depends on MMU
> + select ARCH_REQUIRE_GPIOLIB
> select CPU_XSCALE
> select NEED_MACH_GPIO_H
> select NEED_MACH_IO_H
> select NEED_RET_TO_USER
> - select PLAT_IOP
> select PCI
> - select ARCH_REQUIRE_GPIOLIB
> + select PLAT_IOP
> help
> Support for Intel's IOP33X (XScale) family of processors.
>
> -- -516,32 +515,32 @@ config ARCH_IXP4XX
> bool "IXP4xx-based"
> depends on MMU
> select ARCH_HAS_DMA_SET_COHERENT_MASK
> + select ARCH_REQUIRE_GPIOLIB
> select CLKSRC_MMIO
> select CPU_XSCALE
> - select ARCH_REQUIRE_GPIOLIB
> + select DMABOUNCE if PCI
> select GENERIC_CLOCKEVENTS
> select MIGHT_HAVE_PCI
> select NEED_MACH_IO_H
> - select DMABOUNCE if PCI
> help
> Support for Intel's IXP4XX (XScale) family of processors.
>
> config ARCH_DOVE
> bool "Marvell Dove"
> - select CPU_V7
> - select PCI
> select ARCH_REQUIRE_GPIOLIB
> + select CPU_V7
> select GENERIC_CLOCKEVENTS
> + select PCI
> select PLAT_ORION
> help
> Support for the Marvell Dove SoC 88AP510
>
> config ARCH_KIRKWOOD
> bool "Marvell Kirkwood"
> - select CPU_FEROCEON
> - select PCI
> select ARCH_REQUIRE_GPIOLIB
> + select CPU_FEROCEON
> select GENERIC_CLOCKEVENTS
> + select PCI
> select PLAT_ORION
> help
> Support for the following Marvell Kirkwood series SoCs:
> -- -549,25 +548,25 @@ config ARCH_KIRKWOOD
>
> config ARCH_LPC32XX
> bool "NXP LPC32XX"
> - select CLKSRC_MMIO
> - select CPU_ARM926T
> select ARCH_REQUIRE_GPIOLIB
> - select HAVE_IDE
> select ARM_AMBA
> - select USB_ARCH_HAS_OHCI
> select CLKDEV_LOOKUP
> + select CLKSRC_MMIO
> + select CPU_ARM926T
> select GENERIC_CLOCKEVENTS
> - select USE_OF
> + select HAVE_IDE
> select HAVE_PWM
> + select USB_ARCH_HAS_OHCI
> + select USE_OF
> help
> Support for the NXP LPC32XX family of processors
>
> config ARCH_MV78XX0
> bool "Marvell MV78xx0"
> - select CPU_FEROCEON
> - select PCI
> select ARCH_REQUIRE_GPIOLIB
> + select CPU_FEROCEON
> select GENERIC_CLOCKEVENTS
> + select PCI
> select PLAT_ORION
> help
> Support for the following Marvell MV78xx0 series SoCs:
> -- -576,10 +575,10 @@ config ARCH_MV78XX0
> config ARCH_ORION5X
> bool "Marvell Orion"
> depends on MMU
> - select CPU_FEROCEON
> - select PCI
> select ARCH_REQUIRE_GPIOLIB
> + select CPU_FEROCEON
> select GENERIC_CLOCKEVENTS
> + select PCI
> select PLAT_ORION
> help
> Support for the following Marvell Orion 5x series SoCs:
> -- -591,33 +590,33 @@ config ARCH_MMP
> depends on MMU
> select ARCH_REQUIRE_GPIOLIB
> select CLKDEV_LOOKUP
> + select GENERIC_ALLOCATOR
> select GENERIC_CLOCKEVENTS
> select GPIO_PXA
> select IRQ_DOMAIN
> + select NEED_MACH_GPIO_H
> select PLAT_PXA
> select SPARSE_IRQ
> - select GENERIC_ALLOCATOR
> - select NEED_MACH_GPIO_H
> help
> Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
>
> config ARCH_KS8695
> bool "Micrel/Kendin KS8695"
> - select CPU_ARM922T
> select ARCH_REQUIRE_GPIOLIB
> - select NEED_MACH_MEMORY_H
> select CLKSRC_MMIO
> + select CPU_ARM922T
> select GENERIC_CLOCKEVENTS
> + select NEED_MACH_MEMORY_H
> help
> Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
> System-on-Chip devices.
>
> config ARCH_W90X900
> bool "Nuvoton W90X900 CPU"
> - select CPU_ARM926T
> select ARCH_REQUIRE_GPIOLIB
> select CLKDEV_LOOKUP
> select CLKSRC_MMIO
> + select CPU_ARM926T
> select GENERIC_CLOCKEVENTS
> help
> Support for Nuvoton (Winbond logic dept.) ARM9 processor,
> -- -630,16 +629,16 @@ config ARCH_W90X900
>
> config ARCH_TEGRA
> bool "NVIDIA Tegra"
> + select ARCH_HAS_CPUFREQ
> select CLKDEV_LOOKUP
> select CLKSRC_MMIO
> + select COMMON_CLK
> select GENERIC_CLOCKEVENTS
> select GENERIC_GPIO
> select HAVE_CLK
> select HAVE_SMP
> select MIGHT_HAVE_CACHE_L2X0
> - select ARCH_HAS_CPUFREQ
> select USE_OF
> - select COMMON_CLK
> help
> This enables support for NVIDIA Tegra based systems (Tegra APX,
> Tegra 6xx and Tegra 2 series).
> -- -647,29 +646,29 @@ config ARCH_TEGRA
> config ARCH_PXA
> bool "PXA2xx/PXA3xx-based"
> depends on MMU
> - select ARCH_MTD_XIP
> select ARCH_HAS_CPUFREQ
> + select ARCH_MTD_XIP
> + select ARCH_REQUIRE_GPIOLIB
> + select ARM_CPU_SUSPEND if PM
> + select AUTO_ZRELADDR
> select CLKDEV_LOOKUP
> select CLKSRC_MMIO
> - select ARCH_REQUIRE_GPIOLIB
> select GENERIC_CLOCKEVENTS
> select GPIO_PXA
> - select PLAT_PXA
> - select SPARSE_IRQ
> - select AUTO_ZRELADDR
> - select MULTI_IRQ_HANDLER
> - select ARM_CPU_SUSPEND if PM
> select HAVE_IDE
> + select MULTI_IRQ_HANDLER
> select NEED_MACH_GPIO_H
> + select PLAT_PXA
> + select SPARSE_IRQ
> help
> Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
The PXA related changes look good to me.
Acked-by: Eric Miao <eric.y.miao@gmail.com>
BTW, maybe we also need to sort the ARCH_XXX in alphanumeric order, so
new ARCH will find a better place to live?
^ permalink raw reply
* [PATCH] pwm: Get rid of HAVE_PWM
From: Eric Miao @ 2012-10-08 2:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121004191308.GB7228@avionic-0098.mockup.avionic-design.de>
On Fri, Oct 5, 2012 at 3:13 AM, Thierry Reding
<thierry.reding@avionic-design.de> wrote:
> On Thu, Oct 04, 2012 at 08:48:54PM +0200, Lars-Peter Clausen wrote:
>> On 10/04/2012 08:29 PM, Thierry Reding wrote:
>> > On Thu, Oct 04, 2012 at 05:00:23PM +0200, Lars-Peter Clausen wrote:
>> >> On 10/04/2012 08:06 AM, Thierry Reding wrote:
>> >>> [...]
>> >>> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
>> >>> index 331d574..b38f23d 100644
>> >>> --- a/arch/mips/Kconfig
>> >>> +++ b/arch/mips/Kconfig
>> >>> @@ -219,7 +219,8 @@ config MACH_JZ4740
>> >>> select GENERIC_GPIO
>> >>> select ARCH_REQUIRE_GPIOLIB
>> >>> select SYS_HAS_EARLY_PRINTK
>> >>> - select HAVE_PWM
>> >>> + select PWM
>> >>> + select PWM_JZ4740
>> >>> select HAVE_CLK
>> >>> select GENERIC_IRQ_CHIP
>> >>
>> >> I'm not sure if this is such a good idea, not all jz4740 based board
>> >> necessarily require PWM.
>> >
>> > This really only restores previous behaviour. But I agree that this is
>> > potentially not what we want. Maybe we should just not select this for
>> > any boards but rather leave it up to some default configuration. If so
>> > the patch can be made simpler by just removing the HAVE_PWM entries.
>>
>> At least for JZ4740 I think that is the better solution.
>
> Okay, I'll give other people the chance to comment on this. Especially
> for PXA there are many boards that use the PWM for backlight and it
> would be interesting to hear from them how they want this to be handled.
I'd say the original intention to introduce HAVE_PWM (although PXA
makes a lot use of this, but I remember Russell was the first to propose
this), is for board config to indicate its potential usage of the PWM or
rather if PWM is available for use on the board, and then leave the
developer another config option to build or not-to-build.
Personally I think removing HAVE_PWM will simplify the code a bit
and that's a good thing, on the other hand, how to keep a certain level
of flexibility mentioned above remains a small question. I guess with
device tree, this can be mitigated a bit.
^ permalink raw reply
* [PATCH v2] serial: vt8500: fix possible memory leak in vt8500_serial_probe()
From: Wei Yongjun @ 2012-10-08 2:35 UTC (permalink / raw)
To: linux-arm-kernel
From: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
vt8500_port is malloced in vt8500_serial_probe() and should be freed
before leaving from the error handling cases, otherwise it will
cause memory leak.
Fix it by move the allocation of vt8500_port after those test.
dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Tony Prisk <linux@prisktech.co.nz>
---
v1 -> v2: move the allocation of vt8500_port after those test
---
drivers/tty/serial/vt8500_serial.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/tty/serial/vt8500_serial.c b/drivers/tty/serial/vt8500_serial.c
index 205d4cf..4354fe5 100644
--- a/drivers/tty/serial/vt8500_serial.c
+++ b/drivers/tty/serial/vt8500_serial.c
@@ -567,10 +567,6 @@ static int __devinit vt8500_serial_probe(struct platform_device *pdev)
if (!mmres || !irqres)
return -ENODEV;
- vt8500_port = kzalloc(sizeof(struct vt8500_port), GFP_KERNEL);
- if (!vt8500_port)
- return -ENOMEM;
-
if (np)
port = of_alias_get_id(np, "serial");
if (port > VT8500_MAX_PORTS)
@@ -593,6 +589,10 @@ static int __devinit vt8500_serial_probe(struct platform_device *pdev)
return -EBUSY;
}
+ vt8500_port = kzalloc(sizeof(struct vt8500_port), GFP_KERNEL);
+ if (!vt8500_port)
+ return -ENOMEM;
+
vt8500_port->uart.type = PORT_VT8500;
vt8500_port->uart.iotype = UPIO_MEM;
vt8500_port->uart.mapbase = mmres->start;
^ permalink raw reply related
* [PATCH v4 5/5] ARM: EXYNOS: Add arm-pmu DT binding for exynos421x
From: Chanho Park @ 2012-10-08 2:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1349662630-11607-1-git-send-email-chanho61.park@samsung.com>
This patch adds a arm-pmu node to bind device tree for exynos4210.
The exynos4210 and 4212 have two cpus which includes a pmu. In contrast, the
exynos4412 has 4 cpus and pmus. We need to define two more pmus for this type
board. However, supporting arm-pmu for the exynos4412 will handle it later
because there is no dts support for 4412 based board.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/boot/dts/exynos4210.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 214c557..90f9aed 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -42,6 +42,12 @@
<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
};
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupt-parent = <&combiner>;
+ interrupts = <2 2>, <3 2>;
+ };
+
pinctrl_0: pinctrl at 11400000 {
compatible = "samsung,pinctrl-exynos4210";
reg = <0x11400000 0x1000>;
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 4/5] ARM: EXYNOS: Add arm-pmu DT binding for exynos5250
From: Chanho Park @ 2012-10-08 2:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1349662630-11607-1-git-send-email-chanho61.park@samsung.com>
This patch enables arm-pmu to bind device tree for exynos5250. The exynos5250
has two pmus which have combiner irq type.
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/boot/dts/exynos5250.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index dddfd6e..fab3eae 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -56,6 +56,12 @@
<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
};
+ pmu {
+ compatible = "arm,cortex-a15-pmu";
+ interrupt-parent = <&combiner>;
+ interrupts = <1 2>, <22 4>;
+ };
+
watchdog {
compatible = "samsung,s3c2410-wdt";
reg = <0x101D0000 0x100>;
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 3/5] ARM: EXYNOS: Enable PMUs for exynos4
From: Chanho Park @ 2012-10-08 2:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1349662630-11607-1-git-send-email-chanho61.park@samsung.com>
This patch defines irq numbers of ARM performance monitoring unit for exynos4.
Firs of all, we need to fix IRQ_PMU correctly and to split pmu initialization
of exynos from plat-samsung for easily defining it.
The number of CPU cores and PMU irq numbers are vary according to soc types.
So, we need to identify each soc type using soc_is_xxx function and to define
the pmu irqs dynamically. For example, the exynos4412 has 4 cpu cores and pmus.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-exynos/common.c | 28 ++++++++++++++++++++++++++++
arch/arm/mach-exynos/include/mach/irqs.h | 8 ++++++--
arch/arm/plat-samsung/devs.c | 2 +-
3 files changed, 35 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index fdd582a..5183426 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -35,6 +35,7 @@
#include <mach/regs-pmu.h>
#include <mach/regs-gpio.h>
#include <mach/pmu.h>
+#include <mach/irqs.h>
#include <plat/cpu.h>
#include <plat/clock.h>
@@ -1093,3 +1094,30 @@ static int __init exynos_init_irq_eint(void)
return 0;
}
arch_initcall(exynos_init_irq_eint);
+
+static struct resource exynos4_pmu_resource[] = {
+ DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU),
+ DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU1),
+#if defined(CONFIG_SOC_EXYNOS4412)
+ DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU2),
+ DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU3),
+#endif
+};
+
+static struct platform_device exynos4_device_pmu = {
+ .name = "arm-pmu",
+ .num_resources = ARRAY_SIZE(exynos4_pmu_resource),
+ .resource = exynos4_pmu_resource,
+};
+
+static int __init exynos_armpmu_init(void)
+{
+ if (!of_have_populated_dt()) {
+ if (soc_is_exynos4210() || soc_is_exynos4212())
+ exynos4_device_pmu.num_resources = 2;
+ platform_device_register(&exynos4_device_pmu);
+ }
+
+ return 0;
+}
+arch_initcall(exynos_armpmu_init);
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 3a83546..c67a54e 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -128,7 +128,7 @@
#define EXYNOS4_IRQ_ADC1 IRQ_SPI(107)
#define EXYNOS4_IRQ_PEN1 IRQ_SPI(108)
#define EXYNOS4_IRQ_KEYPAD IRQ_SPI(109)
-#define EXYNOS4_IRQ_PMU IRQ_SPI(110)
+#define EXYNOS4_IRQ_POWER_PMU IRQ_SPI(110)
#define EXYNOS4_IRQ_GPS IRQ_SPI(111)
#define EXYNOS4_IRQ_INTFEEDCTRL_SSS IRQ_SPI(112)
#define EXYNOS4_IRQ_SLIMBUS IRQ_SPI(113)
@@ -136,6 +136,11 @@
#define EXYNOS4_IRQ_TSI IRQ_SPI(115)
#define EXYNOS4_IRQ_SATA IRQ_SPI(116)
+#define EXYNOS4_IRQ_PMU COMBINER_IRQ(2, 2)
+#define EXYNOS4_IRQ_PMU_CPU1 COMBINER_IRQ(3, 2)
+#define EXYNOS4_IRQ_PMU_CPU2 COMBINER_IRQ(18, 2)
+#define EXYNOS4_IRQ_PMU_CPU3 COMBINER_IRQ(19, 2)
+
#define EXYNOS4_IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0)
#define EXYNOS4_IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1)
#define EXYNOS4_IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2)
@@ -232,7 +237,6 @@
#define IRQ_TC EXYNOS4_IRQ_PEN0
#define IRQ_KEYPAD EXYNOS4_IRQ_KEYPAD
-#define IRQ_PMU EXYNOS4_IRQ_PMU
#define IRQ_FIMD0_FIFO EXYNOS4_IRQ_FIMD0_FIFO
#define IRQ_FIMD0_VSYNC EXYNOS4_IRQ_FIMD0_VSYNC
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 03f654d..ace76b4 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -1125,7 +1125,7 @@ struct platform_device s5p_device_onenand = {
/* PMU */
-#ifdef CONFIG_PLAT_S5P
+#if defined(CONFIG_PLAT_S5P) && !defined(CONFIG_ARCH_EXYNOS)
static struct resource s5p_pmu_resource[] = {
DEFINE_RES_IRQ(IRQ_PMU)
};
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 2/5] ARM: EXYNOS: Correct combined IRQs for exynos4
From: Chanho Park @ 2012-10-08 2:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1349662630-11607-1-git-send-email-chanho61.park@samsung.com>
This patch corrects combined IRQs for exynos4 series platform. The exynos4412
has four extra combined irq group and the exynos4212 has two more combined irqs
than exynos4210. Each irq is mapped to IRQ_SPI(xx). Unfortunately, extra 4
combined IRQs isn't sequential. So, we need to map the irqs manually.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-exynos/common.c | 42 +++++++++++++++++++++++++-----
arch/arm/mach-exynos/include/mach/irqs.h | 4 ++-
2 files changed, 39 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 709245e..fdd582a 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -560,23 +560,50 @@ static struct irq_domain_ops combiner_irq_domain_ops = {
.map = combiner_irq_domain_map,
};
+static unsigned int combiner_extra_irq(int group)
+{
+ switch (group) {
+ case 16:
+ return IRQ_SPI(107);
+ case 17:
+ return IRQ_SPI(108);
+ case 18:
+ return IRQ_SPI(48);
+ case 19:
+ return IRQ_SPI(42);
+ default:
+ return 0;
+ }
+}
+
+static unsigned int max_combiner_nr(void)
+{
+ if (soc_is_exynos5250())
+ return EXYNOS5_MAX_COMBINER_NR;
+ else if (soc_is_exynos4412())
+ return EXYNOS4_MAX_COMBINER_NR;
+ else if (soc_is_exynos4212())
+ return EXYNOS4212_MAX_COMBINER_NR;
+ else
+ return EXYNOS4210_MAX_COMBINER_NR;
+}
+
static void __init combiner_init(void __iomem *combiner_base,
struct device_node *np)
{
int i, irq, irq_base;
unsigned int max_nr, nr_irq;
+ max_nr = max_combiner_nr();
+
if (np) {
if (of_property_read_u32(np, "samsung,combiner-nr", &max_nr)) {
pr_warning("%s: number of combiners not specified, "
"setting default as %d.\n",
- __func__, EXYNOS4_MAX_COMBINER_NR);
- max_nr = EXYNOS4_MAX_COMBINER_NR;
+ __func__, max_nr);
}
- } else {
- max_nr = soc_is_exynos5250() ? EXYNOS5_MAX_COMBINER_NR :
- EXYNOS4_MAX_COMBINER_NR;
}
+
nr_irq = max_nr * MAX_IRQ_IN_COMBINER;
irq_base = irq_alloc_descs(COMBINER_IRQ(0, 0), 1, nr_irq, 0);
@@ -593,7 +620,10 @@ static void __init combiner_init(void __iomem *combiner_base,
}
for (i = 0; i < max_nr; i++) {
- irq = IRQ_SPI(i);
+ if (i < EXYNOS4210_MAX_COMBINER_NR || soc_is_exynos5250())
+ irq = IRQ_SPI(i);
+ else
+ irq = combiner_extra_irq(i);
#ifdef CONFIG_OF
if (np)
irq = irq_of_parse_and_map(np, i);
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 35bced6..3a83546 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -165,7 +165,9 @@
#define EXYNOS4_IRQ_FIMD0_VSYNC COMBINER_IRQ(11, 1)
#define EXYNOS4_IRQ_FIMD0_SYSTEM COMBINER_IRQ(11, 2)
-#define EXYNOS4_MAX_COMBINER_NR 16
+#define EXYNOS4210_MAX_COMBINER_NR 16
+#define EXYNOS4212_MAX_COMBINER_NR 18
+#define EXYNOS4_MAX_COMBINER_NR 20
#define EXYNOS4_IRQ_GPIO1_NR_GROUPS 16
#define EXYNOS4_IRQ_GPIO2_NR_GROUPS 9
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 1/5] ARM: EXYNOS: Add set_irq_affinity function for combiner_irq
From: Chanho Park @ 2012-10-08 2:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1349662630-11607-1-git-send-email-chanho61.park@samsung.com>
This patch adds set_irq_affinity function for combiner_irq. We need this
function to enable a arm-pmu because the pmu of exynos has combined type irqs.
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-exynos/common.c | 30 +++++++++++++++++++++++++-----
1 file changed, 25 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 715b690..709245e 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -405,6 +405,7 @@ struct combiner_chip_data {
unsigned int irq_offset;
unsigned int irq_mask;
void __iomem *base;
+ unsigned int parent_irq;
};
static struct irq_domain *combiner_irq_domain;
@@ -461,10 +462,28 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
chained_irq_exit(chip, desc);
}
+#ifdef CONFIG_SMP
+static int combiner_set_affinity(struct irq_data *d,
+ const struct cpumask *mask_val, bool force)
+{
+ struct combiner_chip_data *chip_data = irq_data_get_irq_chip_data(d);
+ struct irq_chip *chip = irq_get_chip(chip_data->parent_irq);
+ struct irq_data *data = irq_get_irq_data(chip_data->parent_irq);
+
+ if (chip && chip->irq_set_affinity)
+ return chip->irq_set_affinity(data, mask_val, force);
+ else
+ return -EINVAL;
+}
+#endif
+
static struct irq_chip combiner_chip = {
- .name = "COMBINER",
- .irq_mask = combiner_mask_irq,
- .irq_unmask = combiner_unmask_irq,
+ .name = "COMBINER",
+ .irq_mask = combiner_mask_irq,
+ .irq_unmask = combiner_unmask_irq,
+#ifdef CONFIG_SMP
+ .irq_set_affinity = combiner_set_affinity,
+#endif
};
static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
@@ -484,12 +503,13 @@ static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int i
}
static void __init combiner_init_one(unsigned int combiner_nr,
- void __iomem *base)
+ void __iomem *base, unsigned int irq)
{
combiner_data[combiner_nr].base = base;
combiner_data[combiner_nr].irq_offset = irq_find_mapping(
combiner_irq_domain, combiner_nr * MAX_IRQ_IN_COMBINER);
combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
+ combiner_data[combiner_nr].parent_irq = irq;
/* Disable all interrupts */
__raw_writel(combiner_data[combiner_nr].irq_mask,
@@ -573,12 +593,12 @@ static void __init combiner_init(void __iomem *combiner_base,
}
for (i = 0; i < max_nr; i++) {
- combiner_init_one(i, combiner_base + (i >> 2) * 0x10);
irq = IRQ_SPI(i);
#ifdef CONFIG_OF
if (np)
irq = irq_of_parse_and_map(np, i);
#endif
+ combiner_init_one(i, combiner_base + (i >> 2) * 0x10, irq);
combiner_cascade_irq(i, irq);
}
}
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 0/5] Add support to enable ARM PMU for EXYNOS
From: Chanho Park @ 2012-10-08 2:17 UTC (permalink / raw)
To: linux-arm-kernel
This patchset fixes irq numbers of ARM Performance Monitoring unit and enable
it for Perf(Performance Counter) on the exynos 4 and 5. The exynos4 and 5 have 2
more cpu cores which has its own pmu.
The exynos uses combiner-irq type for arm-pmu. Especially, the exynos4412 has 4
extra combined irq groups. So, we need to change a max combiner number and to
retreive it according to each soc types.
To enable perf, we need also to implement a set_irq_affinity function for the
combiner-irq. After applying this patch, we can use the perf for the exynos
machine.
Changes from v3:
- Define max_combiner_nr according to soc types
- Add armpmu dt binding for exynos4210
- Clean up soc types comparison from v2
Changes from v2:
- Convert to dt binding of exynos5250
Changes from v1:
- Split arm-pmu init of exynos from plat-samsung
- Correct combined irqs of exynos4412
- Use soc_is_xxx function instead of CONFIG_XXX to identify dynamically
Chanho Park (5):
ARM: EXYNOS: Add set_irq_affinity function for combiner_irq
ARM: EXYNOS: Correct combined IRQs for exynos4
ARM: EXYNOS: Enable PMUs for exynos4
ARM: EXYNOS: Add arm-pmu DT binding for exynos5250
ARM: EXYNOS: Add arm-pmu DT binding for exynos421x
arch/arm/boot/dts/exynos4210.dtsi | 6 ++
arch/arm/boot/dts/exynos5250.dtsi | 6 ++
arch/arm/mach-exynos/common.c | 100 ++++++++++++++++++++++++++----
arch/arm/mach-exynos/include/mach/irqs.h | 12 +++-
arch/arm/plat-samsung/devs.c | 2 +-
5 files changed, 111 insertions(+), 15 deletions(-)
--
1.7.9.5
^ permalink raw reply
* [PATCH] ARM: EXYNOS: Remove wrong I2S0 clock from peril clock
From: Sangbeom Kim @ 2012-10-08 2:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <004d01cda2cc$37254570$a56fd050$@samsung.com>
On Friday, Oct 05, 2012 at 4:37 PM, Sangsu Park wrote:
> Remove I2S0 clk from peril since peril clock doesn't have I2S0 clk for EXYNOS4.
> Audio Subsystem block has I2S0 clk.
>
> Signed-off-by: Sangsu Park <sangsu4u.park@samsung.com>
Peril control bit 19 is reserved.
Acked-by: Sangbeom Kim <sbkim73@samsung.com>
Thanks,
Sangbeom.
^ permalink raw reply
* [PATCH] ARM: OMAP: move old debug-devices.c and debug-leds.c to be OMAP2+ only for now
From: Paul Walmsley @ 2012-10-08 1:46 UTC (permalink / raw)
To: linux-arm-kernel
Commit 801475ccb2b2c1928b22aec4b9e5285d9e347602 ("ARM: OMAP: move
debug_card_init() function") results in the following new sparse[1]
warning:
arch/arm/plat-omap/debug-devices.c:71:12: warning: symbol 'debug_card_init' was not declared. Should it be static?
Normally this could be fixed by including the appropriate header file
in plat-omap/debug-devices.c, but the header file now exists only in
mach-omap2/, so this would require a "sideways include" and is thus
impractical. It turns out that only code in mach-omap2/ currently
uses the debug-devices.c and debug-leds.c files, so move them there.
In the long term, these devices should be created by DT, and the code
should be moved into drivers/ somewhere.
While doing this migration, improve the Kconfig help text and fix
some checkpatch/CodingStyle issues.
...
1. https://sparse.wiki.kernel.org/index.php/Main_Page
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/Kconfig | 13 +++++++++++++
arch/arm/mach-omap2/Makefile | 6 ++++++
arch/arm/{plat-omap => mach-omap2}/debug-devices.c | 7 +++++--
arch/arm/{plat-omap => mach-omap2}/debug-leds.c | 7 ++-----
arch/arm/plat-omap/Kconfig | 9 ---------
arch/arm/plat-omap/Makefile | 2 --
6 files changed, 26 insertions(+), 18 deletions(-)
rename arch/arm/{plat-omap => mach-omap2}/debug-devices.c (93%)
rename arch/arm/{plat-omap => mach-omap2}/debug-leds.c (96%)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index a6219ea..3ba2d5f 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -370,6 +370,19 @@ config MACH_OMAP4_PANDA
select OMAP_PACKAGE_CBS
select REGULATOR_FIXED_VOLTAGE if REGULATOR
+config OMAP_DEBUG_DEVICES
+ bool
+ help
+ Partial support for some peripherals on some debug daughtercards
+ that can be attached to some older TI reference boards.
+
+config OMAP_DEBUG_LEDS
+ def_bool y if NEW_LEDS
+ depends on OMAP_DEBUG_DEVICES
+ help
+ Enables the use of some debugging LEDs that are present on the
+ debug daughtercards on some older TI reference boards.
+
config OMAP3_EMU
bool "OMAP3 debugging peripherals"
depends on ARCH_OMAP3
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index fe40d9e..12fc983 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -280,3 +280,9 @@ emac-$(CONFIG_TI_DAVINCI_EMAC) := am35xx-emac.o
obj-y += $(emac-m) $(emac-y)
obj-y += common-board-devices.o twl-common.o
+
+
+# Debug devices available on some TI board daughtercards -- optional
+
+obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
+obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/mach-omap2/debug-devices.c
similarity index 93%
rename from arch/arm/plat-omap/debug-devices.c
rename to arch/arm/mach-omap2/debug-devices.c
index c7a4c09..00407af1 100644
--- a/arch/arm/plat-omap/debug-devices.c
+++ b/arch/arm/mach-omap2/debug-devices.c
@@ -17,7 +17,10 @@
#include <mach/hardware.h>
-/* Many OMAP development platforms reuse the same "debug board"; these
+#include "debug-devices.h"
+
+/*
+ * Many OMAP development platforms reuse the same "debug board"; these
* platforms include H2, H3, H4, and Perseus2.
*/
@@ -80,7 +83,7 @@ int __init debug_card_init(u32 addr, unsigned gpio)
status = gpio_request(gpio, "SMC91x irq");
if (status < 0) {
- printk(KERN_ERR "GPIO%d unavailable for smc91x IRQ\n", gpio);
+ pr_err("GPIO%d unavailable for smc91x IRQ\n", gpio);
return status;
}
gpio_direction_input(gpio);
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/mach-omap2/debug-leds.c
similarity index 96%
rename from arch/arm/plat-omap/debug-leds.c
rename to arch/arm/mach-omap2/debug-leds.c
index ea29bbe..c12350b 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/mach-omap2/debug-leds.c
@@ -146,11 +146,8 @@ static struct platform_driver led_driver = {
static int __init fpga_init(void)
{
- if (machine_is_omap_h4()
- || machine_is_omap_h3()
- || machine_is_omap_h2()
- || machine_is_omap_perseus2()
- )
+ if (machine_is_omap_h4() || machine_is_omap_h3() ||
+ machine_is_omap_h2() || machine_is_omap_perseus2())
return platform_driver_register(&led_driver);
return 0;
}
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index ca83a76..4ae003f 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -36,15 +36,6 @@ endchoice
comment "OMAP Feature Selections"
-config OMAP_DEBUG_DEVICES
- bool
- help
- For debug cards on TI reference boards.
-
-config OMAP_DEBUG_LEDS
- def_bool y if NEW_LEDS
- depends on OMAP_DEBUG_DEVICES
-
config POWER_AVS_OMAP
bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2"
depends on POWER_AVS && (ARCH_OMAP3 || ARCH_OMAP4) && PM
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index dacaee0..f8fc0f9 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -12,8 +12,6 @@ obj- :=
obj-$(CONFIG_ARCH_OMAP2PLUS) += omap_device.o
obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
-obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
-obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o
obj-y += $(i2c-omap-m) $(i2c-omap-y)
--
1.7.10.4
^ permalink raw reply related
* ARM: OMAP: fix new sparse warnings
From: Paul Walmsley @ 2012-10-08 1:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.DEB.2.00.1209242308100.10406@utopia.booyaka.com>
Here's an updated version of this one that drops the debug-devices.c
change. That will be dealt with in a separate patch.
- Paul
From: Paul Walmsley <paul@pwsan.com>
Date: Sun, 7 Oct 2012 13:10:00 -0600
Subject: [PATCH] ARM: OMAP: omap3evm: fix new sparse warning
Commit e54adb1e79762d3591459e5b0e9b9ff578e33fdb ("ARM: OMAP: omap3evm:
cleanup revision bits") adds a new sparse[1] warning:
arch/arm/mach-omap2/board-omap3evm.c:90:4: warning: symbol 'get_omap3_evm_rev' was not declared. Should it be static?
This symbol no longer appears to be used outside this file, so mark it
static and remove the export.
...
1. https://sparse.wiki.kernel.org/index.php/Main_Page
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/board-omap3evm.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index c64e565..184ef21 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -88,11 +88,10 @@ enum {
static u8 omap3_evm_version;
-u8 get_omap3_evm_rev(void)
+static u8 get_omap3_evm_rev(void)
{
return omap3_evm_version;
}
-EXPORT_SYMBOL(get_omap3_evm_rev);
static void __init omap3_evm_get_revision(void)
{
--
1.7.10.4
^ permalink raw reply related
* [PATCH] ARM: EXYNOS: Remove wrong I2S0 clock from peril clock
From: Sangsu Park @ 2012-10-08 1:31 UTC (permalink / raw)
To: linux-arm-kernel
ping
On 5 October 2012 4:37 PM, Sangsu Park < sangsu4u.park@samsung.com> wrote:
> Remove I2S0 clk from peril since peril clock doesn't have I2S0 clk for
EXYNOS4.
> Audio Subsystem block has I2S0 clk.
>
> Signed-off-by: Sangsu Park <sangsu4u.park@samsung.com>
> ---
> arch/arm/mach-exynos/clock-exynos4.c | 5 -----
> 1 file changed, 5 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-
> exynos/clock-exynos4.c
> index 6a45c9a..fa8a134 100644
> --- a/arch/arm/mach-exynos/clock-exynos4.c
> +++ b/arch/arm/mach-exynos/clock-exynos4.c
> @@ -613,11 +613,6 @@ static struct clk exynos4_init_clocks_off[] = {
> .ctrlbit = (1 << 18),
> }, {
> .name = "iis",
> - .devname = "samsung-i2s.0",
> - .enable = exynos4_clk_ip_peril_ctrl,
> - .ctrlbit = (1 << 19),
> - }, {
> - .name = "iis",
> .devname = "samsung-i2s.1",
> .enable = exynos4_clk_ip_peril_ctrl,
> .ctrlbit = (1 << 20),
> --
> 1.7.9.5
Best regards,
Sangsu Park.
^ permalink raw reply
* [PATCH] serial: vt8500: fix possible memory leak in vt8500_serial_probe()
From: Tony Prisk @ 2012-10-08 1:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAPgLHd9NrFCsp5NhjBJ4tYgY3-SfbTA-ps=rZgpmoywM6tX6KQ@mail.gmail.com>
On Mon, 2012-10-08 at 08:47 +0800, Wei Yongjun wrote:
> From: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
>
> vt8500_port is malloced in vt8500_serial_probe() and should be freed
> before leaving from the error handling cases, otherwise it will
> cause memory leak.
>
> dpatch engine is used to auto generate this patch.
> (https://github.com/weiyj/dpatch)
>
> Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
> ---
> drivers/tty/serial/vt8500_serial.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/tty/serial/vt8500_serial.c b/drivers/tty/serial/vt8500_serial.c
> index 205d4cf..43fc369 100644
> --- a/drivers/tty/serial/vt8500_serial.c
> +++ b/drivers/tty/serial/vt8500_serial.c
> @@ -584,13 +584,16 @@ static int __devinit vt8500_serial_probe(struct platform_device *pdev)
> sizeof(vt8500_ports_in_use));
> }
>
> - if (port > VT8500_MAX_PORTS)
> - return -ENODEV;
> + if (port > VT8500_MAX_PORTS) {
> + ret = -ENODEV;
> + goto err;
> + }
>
> /* reserve the port id */
> if (test_and_set_bit(port, &vt8500_ports_in_use)) {
> /* port already in use - shouldn't really happen */
> - return -EBUSY;
> + ret = -EBUSY;
> + goto err;
> }
>
> vt8500_port->uart.type = PORT_VT8500;
>
You are correct - this is an error but wouldn't it be better to simply
move the allocation of vt8500_port after these test since it's not used
until later.
It would save two possible instances of having to alloc/release a block
of memory that is never used and possibly create unnecessary memory
fragmentation.
Either way, this patch fixes the problem, so you can add my Ack'd if my
suggestion is considered nit-picky.
Acked-by: Tony Prisk <linux@prisktech.co.nz>
Regards
Tony P
^ permalink raw reply
* [PATCH] serial: vt8500: fix possible memory leak in vt8500_serial_probe()
From: Wei Yongjun @ 2012-10-08 0:47 UTC (permalink / raw)
To: linux-arm-kernel
From: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
vt8500_port is malloced in vt8500_serial_probe() and should be freed
before leaving from the error handling cases, otherwise it will
cause memory leak.
dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
---
drivers/tty/serial/vt8500_serial.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/tty/serial/vt8500_serial.c b/drivers/tty/serial/vt8500_serial.c
index 205d4cf..43fc369 100644
--- a/drivers/tty/serial/vt8500_serial.c
+++ b/drivers/tty/serial/vt8500_serial.c
@@ -584,13 +584,16 @@ static int __devinit vt8500_serial_probe(struct platform_device *pdev)
sizeof(vt8500_ports_in_use));
}
- if (port > VT8500_MAX_PORTS)
- return -ENODEV;
+ if (port > VT8500_MAX_PORTS) {
+ ret = -ENODEV;
+ goto err;
+ }
/* reserve the port id */
if (test_and_set_bit(port, &vt8500_ports_in_use)) {
/* port already in use - shouldn't really happen */
- return -EBUSY;
+ ret = -EBUSY;
+ goto err;
}
vt8500_port->uart.type = PORT_VT8500;
^ permalink raw reply related
* [PATCH 6/6] ARM: bcm476x: Instantiate console UART
From: Domenico Andreoli @ 2012-10-07 23:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121007200300.GH12801@game.jcrosoft.org>
On Sun, Oct 07, 2012 at 10:03:00PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 03:53 Sun 07 Oct , Domenico Andreoli wrote:
> > From: Domenico Andreoli <domenico.andreoli@linux.com>
> >
> > The BCM476x sports standard PL011 UARTs which are fully described and
> > put to use with these few changes.
> >
> > Signed-off-by: Domenico Andreoli <domenico.andreoli@linux.com>
> > ---
> > arch/arm/Kconfig.debug | 16 ++++++++++++++++
> > arch/arm/boot/dts/bcm476x.dtsi | 23 ++++++++++++++++++++++-
> > 2 files changed, 38 insertions(+), 1 deletion(-)
> >
> > Index: b/arch/arm/boot/dts/bcm476x.dtsi
> > ===================================================================
> > --- a/arch/arm/boot/dts/bcm476x.dtsi
> > +++ b/arch/arm/boot/dts/bcm476x.dtsi
> > @@ -5,7 +5,7 @@
> > model = "Broadcom BCM476x";
> >
> > chosen {
> > - bootargs = "earlyprintk";
> > + bootargs = "console=ttyAMA1";
> > };
> >
> > amba {
> > @@ -41,5 +41,26 @@
> > interrupt-controller;
> > #interrupt-cells = <1>;
> > };
> > +
> > + uart0 at c0000 {
> > + compatible = "brcm,bcm476x-pl011", "arm,pl011", "arm,primecell";
> why brcm specific compatible did broadcom customised the IP?
yes, there are some peculiarities here but do not prevent the normal pl011
driver to work.
> > + reg = <0xc0000 0x1000>;
> > + interrupt-parent = <&vic0>;
> > + interrupts = <14>;
> > + };
> > +
> > + uart1 at c1000 {
> > + compatible = "brcm,bcm476x-pl011", "arm,pl011", "arm,primecell";
> > + reg = <0xc1000 0x1000>;
> > + interrupt-parent = <&vic0>;
> > + interrupts = <15>;
> > + };
> > +
> > + uart2 at b2000 {
> > + compatible = "brcm,bcm476x-pl011", "arm,pl011", "arm,primecell";
> > + reg = <0xb2000 0x1000>;
> > + interrupt-parent = <&vic0>;
> > + interrupts = <16>;
> > + };
> > };
> > };
> > Index: b/arch/arm/Kconfig.debug
> > ===================================================================
> > --- a/arch/arm/Kconfig.debug
> > +++ b/arch/arm/Kconfig.debug
> this should come with the debug patch
ok
> > @@ -89,6 +89,18 @@ choice
> > bool "Kernel low-level debugging on 9263 and 9g45"
> > depends on HAVE_AT91_DBGU1
> >
> > + config DEBUG_BCM476X_UART0
> > + depends on ARCH_BCM476X
> > + bool "Kernel low-level debugging on BCM476x UART 0"
> > +
> > + config DEBUG_BCM476X_UART1
> > + depends on ARCH_BCM476X
> > + bool "Kernel low-level debugging on BCM476x UART 1"
> > +
> > + config DEBUG_BCM476X_UART2
> > + depends on ARCH_BCM476X
> > + bool "Kernel low-level debugging on BCM476x UART 2"
> > +
> > config DEBUG_CLPS711X_UART1
> > bool "Kernel low-level debugging messages via UART1"
> > depends on ARCH_CLPS711X
> > @@ -404,6 +416,8 @@ endchoice
> >
> > config DEBUG_LL_INCLUDE
> > string
> > + default "debug/bcm476x.S" if DEBUG_BCM476X_UART0 || \
> > + DEBUG_BCM476X_UART1 || DEBUG_BCM476X_UART2
> > default "debug/icedcc.S" if DEBUG_ICEDCC
> > default "debug/highbank.S" if DEBUG_HIGHBANK_UART
> > default "debug/mvebu.S" if DEBUG_MVEBU_UART
> > @@ -416,6 +430,8 @@ config DEBUG_LL_INCLUDE
> >
> > config UNCOMPRESS_INCLUDE
> > string
> > + default "debug/bcm476x-uncompress.h" if DEBUG_BCM476X_UART0 || \
> > + DEBUG_BCM476X_UART1 || DEBUG_BCM476X_UART2
> > default "debug/icedcc-uncompress.h" if DEBUG_ICEDCC
> > default "debug/mvebu-uncompress.h" if DEBUG_MVEBU_UART
> > default "debug/tegra-uncompress.h" if DEBUG_TEGRA_UART
> Best Regards,
> J.
Thank you.
Regards,
Domenico
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