* new branch for linux-next [Was: [PATCH v6 0/3] Updated Cortex-M3 series]
From: Uwe Kleine-König @ 2012-10-08 15:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1343988614-5508-1-git-send-email-u.kleine-koenig@pengutronix.de>
Hello Stephen,
I already tried several times to get feedback from Russell King (as you
probably know he's the ARM maintainer and busy most of the time) for my
series to support Cortex-M3 machines. As I think the outcome will
probably (at least) be that it should be included in next for some time
first (as for example Arnd Bergmann already suggested), can you please
add
git://git.pengutronix.de/git/ukl/linux-2.6.git for-next
to your tree? I'd suggest adding it after arm and arm-soc.
I intend to use this branch later for efm32 support (which depends on
the Cortex-M3 stuff).
Currently the branch is still empty, but I intend to fill it with what I
consider to be applyable after I did some more testing. (Mainly to
assert it still does what it did when I developed it on an older base.)
@Russell: I hope this is OK for you. If not, I'm sure you'll protest.
Thanks
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [PATCH] ARM: sort select statements alphanumerically
From: Russell King - ARM Linux @ 2012-10-08 15:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121008152947.GA6140@S2101-09.ap.freescale.net>
On Mon, Oct 08, 2012 at 11:29:52PM +0800, Shawn Guo wrote:
> Russell,
>
> On Sat, Oct 06, 2012 at 05:22:10PM +0100, Russell King wrote:
> > This commit is likely to change as we get closer to the end of the merge
> > window, as other changes get merged into Linus' tree. I will be refreshing
> > this from time to time, and keeping it out of linux-next, as it will cause
> > more pain than its worth to put it into linux-next.
>
> You plan to send this for 3.7 merge window or 3.8? Hope it's 3.7 since
> I have a series queued for 3.8 merging plat-mxc into mach-imx which
> will clash with the patch.
3.7, and it's generated by the script given in the commit message, so
it's easy to regenerate when required (and I intend to do so just before
I ask Linus to merge it.)
^ permalink raw reply
* new branch for linux-next [Was: [PATCH v6 0/3] Updated Cortex-M3 series]
From: Russell King - ARM Linux @ 2012-10-08 15:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121008154325.GF18531@pengutronix.de>
On Mon, Oct 08, 2012 at 05:43:25PM +0200, Uwe Kleine-K?nig wrote:
> Hello Stephen,
>
> I already tried several times to get feedback from Russell King (as you
> probably know he's the ARM maintainer and busy most of the time) for my
> series to support Cortex-M3 machines. As I think the outcome will
> probably (at least) be that it should be included in next for some time
> first (as for example Arnd Bergmann already suggested), can you please
> add
>
> git://git.pengutronix.de/git/ukl/linux-2.6.git for-next
>
> to your tree? I'd suggest adding it after arm and arm-soc.
> I intend to use this branch later for efm32 support (which depends on
> the Cortex-M3 stuff).
>
> Currently the branch is still empty, but I intend to fill it with what I
> consider to be applyable after I did some more testing. (Mainly to
> assert it still does what it did when I developed it on an older base.)
>
> @Russell: I hope this is OK for you. If not, I'm sure you'll protest.
Well, I think the patches are mostly fine but I do think more eyes are
needed on them first. I heard today that some people will be looking
at your Cortex M3 stuff, and hopefully that should move things forward.
^ permalink raw reply
* Problem with 64-bit registers on i.MX53
From: Michael Olbrich @ 2012-10-08 16:08 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
I have a problem that looks like that 64-bit registers (I think) are not
saved/restored correctly on a context switch. I've reduced it to the
following test case:
- Latest Linux mainline kernel (v3.6-8559-ge9eca4d)
v3.5 is also affected
- imx_v6_v7_defconfig
- arch/arm/boot/dts/imx53-evk.dts
The following test program is compiled with "-mcpu=cortex-a8 -mfpu=neon
-O2".
------------------------>8--------------------------------
#include <inttypes.h>
#include <assert.h>
volatile int x = 2;
volatile int64_t y = 2;
int main() {
volatile int a = 0;
volatile int64_t b = 0;
while (1) {
a = (a + x) % (1 << 30);
b = (b + y) % (1 << 30);
assert(a == b);
}
}
------------------------>8--------------------------------
The ".. (b + y) .." should result in "vadd.i64 d19, d18, d16" or
something like that.
If I start the program twice in parallel, then on aborts immediately with
the assert().
When looking at it with the debugger, it seems as if the calculation
"b = (b + y) % (1 << 30)" produces an incorrect value.
A single instance of the program runs longer, but hits the assert()
eventually. So running multiple processes that use 64-bit registers
triggers the problem really fast. This is why I think the problem has
something to do with context switches.
Not using 64-bit registers (-msoft-float) makes the problem go away.
So it's definitely related to 64-bit registers.
If I disable all MX31/MX35 boards (and therefore all ARMv6 support), then
it works as expected.
Any ideas what goes wrong here?
Regards,
Michael Olbrich
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply
* [PATCH] ARM: tegra: cpuidle: replace LP3 with ARM_CPUIDLE_WFI_STATE
From: Stephen Warren @ 2012-10-08 16:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1349691856-30590-1-git-send-email-josephl@nvidia.com>
On 10/08/2012 04:24 AM, Joseph Lo wrote:
> The Tegra CPU idle LP3 state is doing ARM WFI only. So it's same with
> the common ARM_CPUIDLE_WFI_STATE. Using it to replace LP3 now.
Hmm. This changes the exit_latency/target_residency fields of the
cpuidle state definition from 10 to 1, and also replaces
tegra_idle_enter_lp3() with just a dsb/wfi as far as I can tell. What
are the implications of removing the irq/fiq_disable/enable and
ktim-related code? It might be worth explaining why this change is valid
in the commit description.
^ permalink raw reply
* [PATCH 07/16] ARM: OMAP: Make plat/sram.h local to plat-omap
From: Tony Lindgren @ 2012-10-08 16:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <506EE79B.8040507@ti.com>
* Jon Hunter <jon-hunter@ti.com> [121005 07:00]:
> Hi Tony,
>
> On 10/04/2012 05:04 PM, Tony Lindgren wrote:
> > We can move this from plat to be local to plat-omap
> > for common ARM zImage support.
> >
> > Signed-off-by: Tony Lindgren <tony@atomide.com>
> > ---
> > arch/arm/mach-omap1/clock.c | 3 -
> > arch/arm/mach-omap1/clock_data.c | 3 -
> > arch/arm/mach-omap1/devices.c | 2
> > arch/arm/mach-omap1/pm.c | 3 -
> > arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 3 -
> > arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 3 -
> > arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 3 -
> > arch/arm/mach-omap2/io.c | 3 -
> > arch/arm/mach-omap2/omap4-common.c | 4 -
> > arch/arm/mach-omap2/pm24xx.c | 3 -
> > arch/arm/mach-omap2/pm34xx.c | 3 -
> > arch/arm/mach-omap2/sdrc.c | 2
> > arch/arm/mach-omap2/sdrc2xxx.c | 2
> > arch/arm/mach-omap2/sleep34xx.S | 2
> > arch/arm/plat-omap/common.h | 2
> > arch/arm/plat-omap/include/plat/sram.h | 105 -------------------------
> > arch/arm/plat-omap/sram.c | 1
> > arch/arm/plat-omap/sram.h | 109 +++++++++++++++++++++++++-
> > 18 files changed, 130 insertions(+), 126 deletions(-)
> > delete mode 100644 arch/arm/plat-omap/include/plat/sram.h
> >
> > diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
> > index 638f407..b15d4ee 100644
> > --- a/arch/arm/mach-omap1/clock.c
> > +++ b/arch/arm/mach-omap1/clock.c
> > @@ -24,11 +24,12 @@
> > #include <plat/cpu.h>
> > #include <plat/usb.h>
> > #include <plat/clock.h>
> > -#include <plat/sram.h>
> > #include <plat/clkdev_omap.h>
> >
> > #include <mach/hardware.h>
> >
> > +#include "../plat-omap/sram.h"
>
> Any reason why you did not put this in
> arch/arm/plat-omap/include/plat-omap/ like we were discussing for dma
> and dmtimers headers? Then it can be just "#include <plat-omap/sram.h>".
> Just curious ...
Because plat-omap/sram.h is still available for (mis)use by drivers
and there's no need to expose it.
Eventually our plat-omap/sram.c will be converted to be just a
device driver using the common sram driver. Then it will need
a local sram.h and include/platform_data/sram-omap.h for the
legacy non-dt boot.
Regards,
Tony
^ permalink raw reply
* [PATCH 3/7] ARM: tegra30: cpuidle: add LP2 driver for secondary CPUs
From: Lorenzo Pieralisi @ 2012-10-08 16:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1349691981-31038-4-git-send-email-josephl@nvidia.com>
On Mon, Oct 08, 2012 at 11:26:17AM +0100, Joseph Lo wrote:
> This supports power-gated (LP2) idle on secondary CPUs for Tegra30.
> The secondary CPUs can go into LP2 state independently. When CPU goes
> into LP2 state, it saves it's state and puts itself to flow controlled
> WFI state. After that, it will been power gated.
>
> Based on the work by:
> Scott Williams <scwilliams@nvidia.com>
>
> Signed-off-by: Joseph Lo <josephl@nvidia.com>
> ---
> arch/arm/mach-tegra/Makefile | 1 +
> arch/arm/mach-tegra/cpuidle-tegra30.c | 79 +++++++++++++++++++++++++++++-
> arch/arm/mach-tegra/pm.c | 88 +++++++++++++++++++++++++++++++++
> arch/arm/mach-tegra/pm.h | 30 +++++++++++
> arch/arm/mach-tegra/reset.h | 9 +++
> arch/arm/mach-tegra/sleep-tegra30.S | 26 ++++++++++
> arch/arm/mach-tegra/sleep.S | 66 ++++++++++++++++++++++++
> arch/arm/mach-tegra/sleep.h | 2 +
> 8 files changed, 300 insertions(+), 1 deletions(-)
> create mode 100644 arch/arm/mach-tegra/pm.c
> create mode 100644 arch/arm/mach-tegra/pm.h
>
> diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
> index 9b80c1e..6f224f7 100644
> --- a/arch/arm/mach-tegra/Makefile
> +++ b/arch/arm/mach-tegra/Makefile
> @@ -8,6 +8,7 @@ obj-y += pmc.o
> obj-y += flowctrl.o
> obj-y += powergate.o
> obj-y += apbio.o
> +obj-y += pm.o
> obj-$(CONFIG_CPU_IDLE) += cpuidle.o
> obj-$(CONFIG_CPU_IDLE) += sleep.o
> obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_clocks.o
> diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c
> index 0f85df8..842fef4 100644
> --- a/arch/arm/mach-tegra/cpuidle-tegra30.c
> +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c
> @@ -19,21 +19,94 @@
> #include <linux/kernel.h>
> #include <linux/module.h>
> #include <linux/cpuidle.h>
> +#include <linux/cpu_pm.h>
> +#include <linux/clockchips.h>
>
> #include <asm/cpuidle.h>
> +#include <asm/proc-fns.h>
> +#include <asm/suspend.h>
> +
> +#include "pm.h"
> +#include "sleep.h"
> +
> +#ifdef CONFIG_PM_SLEEP
> +static int tegra30_idle_lp2(struct cpuidle_device *dev,
> + struct cpuidle_driver *drv,
> + int index);
> +#endif
>
> static struct cpuidle_driver tegra_idle_driver = {
> .name = "tegra_idle",
> .owner = THIS_MODULE,
> .en_core_tk_irqen = 1,
> - .state_count = 1,
> + .state_count = 2,
> .states = {
> [0] = ARM_CPUIDLE_WFI_STATE_PWR(600),
> +#ifdef CONFIG_PM_SLEEP
> + [1] = {
> + .enter = tegra30_idle_lp2,
> + .exit_latency = 2000,
> + .target_residency = 2200,
> + .power_usage = 0,
> + .flags = CPUIDLE_FLAG_TIME_VALID,
> + .name = "LP2",
> + .desc = "CPU power-gate",
> + },
> +#endif
> },
> };
>
> static DEFINE_PER_CPU(struct cpuidle_device, tegra_idle_device);
>
> +#ifdef CONFIG_PM_SLEEP
> +static bool tegra30_idle_enter_lp2_cpu_n(struct cpuidle_device *dev,
> + struct cpuidle_driver *drv,
> + int index)
> +{
> +#ifdef CONFIG_SMP
> + clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
> +
> + smp_wmb();
> +
> + save_cpu_arch_register();
> +
> + cpu_suspend(0, tegra30_sleep_cpu_secondary_finish);
> +
> + restore_cpu_arch_register();
> +
> + clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
> +#endif
Can't you factor out this #ifdef out using an inline function ?
> +
> + return true;
> +}
> +
> +static int __cpuinit tegra30_idle_lp2(struct cpuidle_device *dev,
> + struct cpuidle_driver *drv,
> + int index)
> +{
> + bool entered_lp2 = false;
> +
> + local_fiq_disable();
> +
> + tegra_set_cpu_in_lp2(dev->cpu);
> + cpu_pm_enter();
> +
> + if (dev->cpu == 0)
Logical cpu 0 ? Or you need a HW cpu 0 check here ? If you boot on a CPU
that is different from HW CPU 0 (do not know if that's possible) you
might have a problem.
[...]
> +bool __cpuinit tegra_set_cpu_in_lp2(int cpu)
> +{
> + bool last_cpu = false;
> +
> + spin_lock(&tegra_lp2_lock);
> + BUG_ON(cpumask_test_cpu(cpu, &tegra_in_lp2));
> + cpumask_set_cpu(cpu, &tegra_in_lp2);
> +
> + /*
> + * Update the IRAM copy used by the reset handler. The IRAM copy
> + * can't use used directly by cpumask_set_cpu() because it uses
> + * LDREX/STREX which requires the addressed location to be inner
> + * cacheable and sharable which IRAM isn't.
> + */
> + writel(tegra_in_lp2.bits[0], tegra_cpu_lp2_mask);
> + dsb();
> +
> + if ((cpu == 0) && cpumask_equal(&tegra_in_lp2, cpu_online_mask))
> + last_cpu = true;
For cpu == 0, see above.
[...]
> +ENTRY(tegra_flush_l1_cache)
> + stmfd sp!, {r4-r5, r7, r9-r11, lr}
> + dmb @ ensure ordering
> +
> + /* Disable the data cache */
> + mrc p15, 0, r2, c1, c0, 0
> + bic r2, r2, #CR_C
> + dsb
> + mcr p15, 0, r2, c1, c0, 0
> +
> + /* Flush data cache */
> + mov r10, #0
> +#ifdef CONFIG_PREEMPT
> + save_and_disable_irqs_notrace r9 @ make cssr&csidr read atomic
> +#endif
> + mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
> + isb @ isb to sych the new cssr&csidr
> + mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
> +#ifdef CONFIG_PREEMPT
> + restore_irqs_notrace r9
> +#endif
> + and r2, r1, #7 @ extract the length of the cache lines
> + add r2, r2, #4 @ add 4 (line length offset)
> + ldr r4, =0x3ff
> + ands r4, r4, r1, lsr #3 @ find maximum number on the way size
> + clz r5, r4 @ find bit position of way size increment
> + ldr r7, =0x7fff
> + ands r7, r7, r1, lsr #13 @ extract max number of the index size
> +loop2:
> + mov r9, r4 @ create working copy of max way size
> +loop3:
> + orr r11, r10, r9, lsl r5 @ factor way and cache number into r11
> + orr r11, r11, r7, lsl r2 @ factor index number into r11
> + mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
> + subs r9, r9, #1 @ decrement the way
> + bge loop3
> + subs r7, r7, #1 @ decrement the index
> + bge loop2
> +finished:
> + mov r10, #0 @ swith back to cache level 0
> + mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
> + dsb
> + isb
This code is already in the kernel in cache-v7.S, please use that.
We are just adding the new LoUIS API that probably does what you
want, even though for Tegra, that is an A9 based platform I fail to
understand why Level of Coherency differs from L1.
Can you explain to me please why Level of Coherency (LoC) is != from L1
on Tegra ?
Thanks,
Lorenzo
^ permalink raw reply
* [PATCH v2 3/5] ARM: use generic unaligned.h
From: Shawn Guo @ 2012-10-08 16:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1344129840-16447-4-git-send-email-robherring2@gmail.com>
This patch has been merged into mainline as commit below.
d25c881 ARM: 7493/1: use generic unaligned.h
It introduces a regression for me. Check out the commit on mainline,
build a v7 only kernel (imx5/6) with imx_v6_v7_defconfig, the kernel
halts in decompressor. But v6/v7 kernel (imx3/5/6) works fine. The
kernel built on the parent commit below works all fine.
ef1c209 ARM: 7492/1: add strstr declaration for decompressors
Shawn
On Sat, Aug 04, 2012 at 08:23:58PM -0500, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> This moves ARM over to the asm-generic/unaligned.h header. This has the
> benefit of better code generated especially for ARMv7 on gcc 4.7+
> compilers.
>
> As Arnd Bergmann, points out: The asm-generic version uses the "struct"
> version for native-endian unaligned access and the "byteshift" version
> for the opposite endianess. The current ARM version however uses the
> "byteshift" implementation for both.
>
> Thanks to Nicolas Pitre for the excellent analysis:
>
> Test case:
>
> int foo (int *x) { return get_unaligned(x); }
> long long bar (long long *x) { return get_unaligned(x); }
>
> With the current ARM version:
>
> foo:
> ldrb r3, [r0, #2] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 2B], MEM[(const u8 *)x_1(D) + 2B]
> ldrb r1, [r0, #1] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 1B], MEM[(const u8 *)x_1(D) + 1B]
> ldrb r2, [r0, #0] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D)], MEM[(const u8 *)x_1(D)]
> mov r3, r3, asl #16 @ tmp154, MEM[(const u8 *)x_1(D) + 2B],
> ldrb r0, [r0, #3] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 3B], MEM[(const u8 *)x_1(D) + 3B]
> orr r3, r3, r1, asl #8 @, tmp155, tmp154, MEM[(const u8 *)x_1(D) + 1B],
> orr r3, r3, r2 @ tmp157, tmp155, MEM[(const u8 *)x_1(D)]
> orr r0, r3, r0, asl #24 @,, tmp157, MEM[(const u8 *)x_1(D) + 3B],
> bx lr @
>
> bar:
> stmfd sp!, {r4, r5, r6, r7} @,
> mov r2, #0 @ tmp184,
> ldrb r5, [r0, #6] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 6B], MEM[(const u8 *)x_1(D) + 6B]
> ldrb r4, [r0, #5] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 5B], MEM[(const u8 *)x_1(D) + 5B]
> ldrb ip, [r0, #2] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 2B], MEM[(const u8 *)x_1(D) + 2B]
> ldrb r1, [r0, #4] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 4B], MEM[(const u8 *)x_1(D) + 4B]
> mov r5, r5, asl #16 @ tmp175, MEM[(const u8 *)x_1(D) + 6B],
> ldrb r7, [r0, #1] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 1B], MEM[(const u8 *)x_1(D) + 1B]
> orr r5, r5, r4, asl #8 @, tmp176, tmp175, MEM[(const u8 *)x_1(D) + 5B],
> ldrb r6, [r0, #7] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 7B], MEM[(const u8 *)x_1(D) + 7B]
> orr r5, r5, r1 @ tmp178, tmp176, MEM[(const u8 *)x_1(D) + 4B]
> ldrb r4, [r0, #0] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D)], MEM[(const u8 *)x_1(D)]
> mov ip, ip, asl #16 @ tmp188, MEM[(const u8 *)x_1(D) + 2B],
> ldrb r1, [r0, #3] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 3B], MEM[(const u8 *)x_1(D) + 3B]
> orr ip, ip, r7, asl #8 @, tmp189, tmp188, MEM[(const u8 *)x_1(D) + 1B],
> orr r3, r5, r6, asl #24 @,, tmp178, MEM[(const u8 *)x_1(D) + 7B],
> orr ip, ip, r4 @ tmp191, tmp189, MEM[(const u8 *)x_1(D)]
> orr ip, ip, r1, asl #24 @, tmp194, tmp191, MEM[(const u8 *)x_1(D) + 3B],
> mov r1, r3 @,
> orr r0, r2, ip @ tmp171, tmp184, tmp194
> ldmfd sp!, {r4, r5, r6, r7}
> bx lr
>
> In both cases the code is slightly suboptimal. One may wonder why
> wasting r2 with the constant 0 in the second case for example. And all
> the mov's could be folded in subsequent orr's, etc.
>
> Now with the asm-generic version:
>
> foo:
> ldr r0, [r0, #0] @ unaligned @,* x
> bx lr @
>
> bar:
> mov r3, r0 @ x, x
> ldr r0, [r0, #0] @ unaligned @,* x
> ldr r1, [r3, #4] @ unaligned @,
> bx lr @
>
> This is way better of course, but only because this was compiled for
> ARMv7. In this case the compiler knows that the hardware can do
> unaligned word access. This isn't that obvious for foo(), but if we
> remove the get_unaligned() from bar as follows:
>
> long long bar (long long *x) {return *x; }
>
> then the resulting code is:
>
> bar:
> ldmia r0, {r0, r1} @ x,,
> bx lr @
>
> So this proves that the presumed aligned vs unaligned cases does have
> influence on the instructions the compiler may use and that the above
> unaligned code results are not just an accident.
>
> Still... this isn't fully conclusive without at least looking at the
> resulting assembly fron a pre ARMv6 compilation. Let's see with an
> ARMv5 target:
>
> foo:
> ldrb r3, [r0, #0] @ zero_extendqisi2 @ tmp139,* x
> ldrb r1, [r0, #1] @ zero_extendqisi2 @ tmp140,
> ldrb r2, [r0, #2] @ zero_extendqisi2 @ tmp143,
> ldrb r0, [r0, #3] @ zero_extendqisi2 @ tmp146,
> orr r3, r3, r1, asl #8 @, tmp142, tmp139, tmp140,
> orr r3, r3, r2, asl #16 @, tmp145, tmp142, tmp143,
> orr r0, r3, r0, asl #24 @,, tmp145, tmp146,
> bx lr @
>
> bar:
> stmfd sp!, {r4, r5, r6, r7} @,
> ldrb r2, [r0, #0] @ zero_extendqisi2 @ tmp139,* x
> ldrb r7, [r0, #1] @ zero_extendqisi2 @ tmp140,
> ldrb r3, [r0, #4] @ zero_extendqisi2 @ tmp149,
> ldrb r6, [r0, #5] @ zero_extendqisi2 @ tmp150,
> ldrb r5, [r0, #2] @ zero_extendqisi2 @ tmp143,
> ldrb r4, [r0, #6] @ zero_extendqisi2 @ tmp153,
> ldrb r1, [r0, #7] @ zero_extendqisi2 @ tmp156,
> ldrb ip, [r0, #3] @ zero_extendqisi2 @ tmp146,
> orr r2, r2, r7, asl #8 @, tmp142, tmp139, tmp140,
> orr r3, r3, r6, asl #8 @, tmp152, tmp149, tmp150,
> orr r2, r2, r5, asl #16 @, tmp145, tmp142, tmp143,
> orr r3, r3, r4, asl #16 @, tmp155, tmp152, tmp153,
> orr r0, r2, ip, asl #24 @,, tmp145, tmp146,
> orr r1, r3, r1, asl #24 @,, tmp155, tmp156,
> ldmfd sp!, {r4, r5, r6, r7}
> bx lr
>
> Compared to the initial results, this is really nicely optimized and I
> couldn't do much better if I were to hand code it myself.
>
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> Reviewed-by: Nicolas Pitre <nico@linaro.org>
> ---
> arch/arm/include/asm/Kbuild | 1 +
> arch/arm/include/asm/unaligned.h | 19 -------------------
> 2 files changed, 1 insertion(+), 19 deletions(-)
> delete mode 100644 arch/arm/include/asm/unaligned.h
>
> diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild
> index 6cc8a13..a86cabf 100644
> --- a/arch/arm/include/asm/Kbuild
> +++ b/arch/arm/include/asm/Kbuild
> @@ -33,3 +33,4 @@ generic-y += sockios.h
> generic-y += termbits.h
> generic-y += timex.h
> generic-y += types.h
> +generic-y += unaligned.h
> diff --git a/arch/arm/include/asm/unaligned.h b/arch/arm/include/asm/unaligned.h
> deleted file mode 100644
> index 44593a8..0000000
> --- a/arch/arm/include/asm/unaligned.h
> +++ /dev/null
> @@ -1,19 +0,0 @@
> -#ifndef _ASM_ARM_UNALIGNED_H
> -#define _ASM_ARM_UNALIGNED_H
> -
> -#include <linux/unaligned/le_byteshift.h>
> -#include <linux/unaligned/be_byteshift.h>
> -#include <linux/unaligned/generic.h>
> -
> -/*
> - * Select endianness
> - */
> -#ifndef __ARMEB__
> -#define get_unaligned __get_unaligned_le
> -#define put_unaligned __put_unaligned_le
> -#else
> -#define get_unaligned __get_unaligned_be
> -#define put_unaligned __put_unaligned_be
> -#endif
> -
> -#endif /* _ASM_ARM_UNALIGNED_H */
> --
> 1.7.9.5
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Problem with 64-bit registers on i.MX53
From: Russell King - ARM Linux @ 2012-10-08 17:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121008160841.GM19651@pengutronix.de>
On Mon, Oct 08, 2012 at 06:08:41PM +0200, Michael Olbrich wrote:
>
> Hi,
>
> I have a problem that looks like that 64-bit registers (I think) are not
> saved/restored correctly on a context switch. I've reduced it to the
> following test case:
>
> - Latest Linux mainline kernel (v3.6-8559-ge9eca4d)
> v3.5 is also affected
> - imx_v6_v7_defconfig
> - arch/arm/boot/dts/imx53-evk.dts
>
> The following test program is compiled with "-mcpu=cortex-a8 -mfpu=neon
> -O2".
> ------------------------>8--------------------------------
> #include <inttypes.h>
> #include <assert.h>
>
> volatile int x = 2;
> volatile int64_t y = 2;
>
> int main() {
> volatile int a = 0;
> volatile int64_t b = 0;
> while (1) {
> a = (a + x) % (1 << 30);
> b = (b + y) % (1 << 30);
> assert(a == b);
> }
> }
> ------------------------>8--------------------------------
> The ".. (b + y) .." should result in "vadd.i64 d19, d18, d16" or
> something like that.
Hmm.
Can you send me the output of 'grep ^Features /proc/cpuinfo' please?
Thanks.
^ permalink raw reply
* Problem with 64-bit registers on i.MX53
From: Russell King - ARM Linux @ 2012-10-08 17:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121008170124.GZ4625@n2100.arm.linux.org.uk>
On Mon, Oct 08, 2012 at 06:01:24PM +0100, Russell King - ARM Linux wrote:
> On Mon, Oct 08, 2012 at 06:08:41PM +0200, Michael Olbrich wrote:
> >
> > Hi,
> >
> > I have a problem that looks like that 64-bit registers (I think) are not
> > saved/restored correctly on a context switch. I've reduced it to the
> > following test case:
> >
> > - Latest Linux mainline kernel (v3.6-8559-ge9eca4d)
> > v3.5 is also affected
> > - imx_v6_v7_defconfig
> > - arch/arm/boot/dts/imx53-evk.dts
> >
> > The following test program is compiled with "-mcpu=cortex-a8 -mfpu=neon
> > -O2".
> > ------------------------>8--------------------------------
> > #include <inttypes.h>
> > #include <assert.h>
> >
> > volatile int x = 2;
> > volatile int64_t y = 2;
> >
> > int main() {
> > volatile int a = 0;
> > volatile int64_t b = 0;
> > while (1) {
> > a = (a + x) % (1 << 30);
> > b = (b + y) % (1 << 30);
> > assert(a == b);
> > }
> > }
> > ------------------------>8--------------------------------
> > The ".. (b + y) .." should result in "vadd.i64 d19, d18, d16" or
> > something like that.
>
> Hmm.
>
> Can you send me the output of 'grep ^Features /proc/cpuinfo' please?
You may also like to try the patch below... it will probably fix your
problem.
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h
index a7aadbd..6a6f1e4 100644
--- a/arch/arm/include/asm/vfpmacros.h
+++ b/arch/arm/include/asm/vfpmacros.h
@@ -28,7 +28,7 @@
ldr \tmp, =elf_hwcap @ may not have MVFR regs
ldr \tmp, [\tmp, #0]
tst \tmp, #HWCAP_VFPv3D16
- ldceq p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
+ ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
addne \base, \base, #32*4 @ step over unused register space
#else
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
@@ -52,7 +52,7 @@
ldr \tmp, =elf_hwcap @ may not have MVFR regs
ldr \tmp, [\tmp, #0]
tst \tmp, #HWCAP_VFPv3D16
- stceq p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
+ stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
addne \base, \base, #32*4 @ step over unused register space
#else
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
^ permalink raw reply related
* [PATCH 0/2] omap plat/cpu.h removal for v3.8 merge window
From: Tony Lindgren @ 2012-10-08 17:35 UTC (permalink / raw)
To: linux-arm-kernel
Hi all,
These two patches for v3.8 merge window make plat/cpu.h local
to mach-omap1 and mach-omap2.
We'll have to keep plat/cpu.h around until the merge window
so drivers are fixed, but after that it can be removed.
These patches are based on current linux next with the
following patches:
- [PATCH 00/16] More omap plat header cleanup for v3.8 merge window
- [PATCH V2 0/7] ARM: OMAP: Move plat/dma*.h,omap-secure.h headers as part of single zImage work
- [PATCH v2 1/5] [media] omap3isp: Fix compilation error in ispreg.h
...
[PATCH v2 5/5] arm: omap: Move iopgtable header to drivers/iommu/
- [PATCH 0/6] ARM: OMAP: remove clock files in arch/arm/plat-omap
Regards,
Tony
---
Tony Lindgren (2):
ARM: OMAP: Trivial driver changes to remove include plat/cpu.h
ARM: OMAP: Split plat/cpu.h into local soc.h for mach-omap1 and mach-omap2
arch/arm/mach-omap1/clock.c | 2
arch/arm/mach-omap1/clock_data.c | 2
arch/arm/mach-omap1/i2c.c | 2
arch/arm/mach-omap1/id.c | 2
arch/arm/mach-omap1/include/mach/hardware.h | 2
arch/arm/mach-omap1/include/mach/memory.h | 2
arch/arm/mach-omap1/irq.c | 2
arch/arm/mach-omap1/mcbsp.c | 2
arch/arm/mach-omap1/soc.h | 229 +++++++++++
arch/arm/mach-omap2/board-3430sdp.c | 1
arch/arm/mach-omap2/board-flash.c | 2
arch/arm/mach-omap2/board-omap3beagle.c | 1
arch/arm/mach-omap2/board-omap3evm.c | 1
arch/arm/mach-omap2/board-zoom-display.c | 1
arch/arm/mach-omap2/clock33xx_data.c | 2
arch/arm/mach-omap2/clockdomain.c | 1
arch/arm/mach-omap2/clockdomain.h | 1
arch/arm/mach-omap2/clockdomain2xxx_3xxx.c | 2
arch/arm/mach-omap2/clockdomains2420_data.c | 1
arch/arm/mach-omap2/clockdomains2430_data.c | 1
arch/arm/mach-omap2/clockdomains3xxx_data.c | 1
arch/arm/mach-omap2/common.h | 1
arch/arm/mach-omap2/display.c | 1
arch/arm/mach-omap2/dma.c | 1
arch/arm/mach-omap2/gpmc.c | 1
arch/arm/mach-omap2/hsmmc.c | 1
arch/arm/mach-omap2/i2c.c | 1
arch/arm/mach-omap2/mux.c | 1
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 1
arch/arm/mach-omap2/omap_hwmod.h | 1
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1
arch/arm/mach-omap2/omap_twl.c | 1
arch/arm/mach-omap2/opp3xxx_data.c | 1
arch/arm/mach-omap2/pm-debug.c | 1
arch/arm/mach-omap2/pm.c | 1
arch/arm/mach-omap2/pm24xx.c | 1
arch/arm/mach-omap2/pm34xx.c | 1
arch/arm/mach-omap2/pm44xx.c | 1
arch/arm/mach-omap2/pmu.c | 1
arch/arm/mach-omap2/powerdomain.h | 2
arch/arm/mach-omap2/powerdomains2xxx_data.c | 1
arch/arm/mach-omap2/prcm.c | 1
arch/arm/mach-omap2/serial.c | 1
arch/arm/mach-omap2/soc.h | 468 ++++++++++++++++++++++
arch/arm/mach-omap2/sr_device.c | 2
arch/arm/mach-omap2/usb-host.c | 1
arch/arm/mach-omap2/usb-musb.c | 3
arch/arm/plat-omap/dma.c | 4
arch/arm/plat-omap/i2c.c | 4
arch/arm/plat-omap/include/plat/cpu.h | 562 ---------------------------
arch/arm/plat-omap/sram.c | 3
drivers/char/hw_random/omap-rng.c | 2
drivers/crypto/omap-aes.c | 6
drivers/crypto/omap-sham.c | 8
drivers/dma/omap-dma.c | 9
drivers/mmc/host/omap_hsmmc.c | 1
sound/soc/omap/omap-pcm.c | 9
57 files changed, 763 insertions(+), 602 deletions(-)
create mode 100644 arch/arm/mach-omap1/soc.h
--
Signature
^ permalink raw reply
* [PATCH 1/2] ARM: OMAP: Trivial driver changes to remove include plat/cpu.h
From: Tony Lindgren @ 2012-10-08 17:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121008173452.10603.53886.stgit@muffinssi>
Drivers should not use cpu_is_omap or cpu_class_is_omap macros,
they should be private to the platform init code. And we'll be
removing plat/cpu.h and only have a private soc.h for the
arch/arm/*omap* code.
This patch is intended as preparation for the core omap changes
and removes the need to include plat/cpu.h from several drivers.
This is needed for the ARM common zImage support.
These changes are OK to do because:
- omap-rng.c and hsmmc.c don't need plat/cpu.h
- omap-aes.c and omap-sham.c get the proper platform_data
passed to them so they don't need extra checks in the driver
- omap-dma.c and omap-pcm.c can test the arch locally as
omap1 and omap2 cannot be compiled together because of
conflicting compiler flags
Cc: Deepak Saxena <dsaxena@plexity.net>
Cc: Matt Mackall <mpm@selenic.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: David S. Miller <davem@davemloft.net>
Cc: Venkatraman S <svenkatr@ti.com>
Cc: Chris Ball <cjb@laptop.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Dan Williams <djbw@fb.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Jarkko Nikula <jarkko.nikula@bitmer.com>
Cc: Liam Girdwood <lrg@ti.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: linux-crypto at vger.kernel.org
Cc: linux-mmc at vger.kernel.org
Cc: alsa-devel at alsa-project.org
Cc: linux-kernel at vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
drivers/char/hw_random/omap-rng.c | 2 --
drivers/crypto/omap-aes.c | 6 ------
drivers/crypto/omap-sham.c | 8 --------
drivers/dma/omap-dma.c | 9 +++++++--
drivers/mmc/host/omap_hsmmc.c | 1 -
sound/soc/omap/omap-pcm.c | 9 +++++++--
6 files changed, 14 insertions(+), 21 deletions(-)
diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c
index a5effd8..45e467d 100644
--- a/drivers/char/hw_random/omap-rng.c
+++ b/drivers/char/hw_random/omap-rng.c
@@ -27,8 +27,6 @@
#include <asm/io.h>
-#include <plat/cpu.h>
-
#define RNG_OUT_REG 0x00 /* Output register */
#define RNG_STAT_REG 0x04 /* Status register
[0] = STAT_BUSY */
diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index 3e61feb..649a146 100644
--- a/drivers/crypto/omap-aes.c
+++ b/drivers/crypto/omap-aes.c
@@ -29,7 +29,6 @@
#include <crypto/scatterwalk.h>
#include <crypto/aes.h>
-#include <plat/cpu.h>
#include <plat-omap/dma-omap.h>
/* OMAP TRM gives bitfields as start:end, where start is the higher bit
@@ -941,11 +940,6 @@ static int __init omap_aes_mod_init(void)
{
pr_info("loading %s driver\n", "omap-aes");
- if (!cpu_class_is_omap2() || omap_type() != OMAP2_DEVICE_TYPE_SEC) {
- pr_err("Unsupported cpu\n");
- return -ENODEV;
- }
-
return platform_driver_register(&omap_aes_driver);
}
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index 6d79695..d76fe06 100644
--- a/drivers/crypto/omap-sham.c
+++ b/drivers/crypto/omap-sham.c
@@ -37,7 +37,6 @@
#include <crypto/hash.h>
#include <crypto/internal/hash.h>
-#include <plat/cpu.h>
#include <plat-omap/dma-omap.h>
#include <mach/irqs.h>
@@ -1289,13 +1288,6 @@ static int __init omap_sham_mod_init(void)
{
pr_info("loading %s driver\n", "omap-sham");
- if (!cpu_class_is_omap2() ||
- (omap_type() != OMAP2_DEVICE_TYPE_SEC &&
- omap_type() != OMAP2_DEVICE_TYPE_EMU)) {
- pr_err("Unsupported cpu\n");
- return -ENODEV;
- }
-
return platform_driver_register(&omap_sham_driver);
}
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index 0b4fa50..56d9253 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -19,9 +19,14 @@
#include "virt-dma.h"
-#include <plat/cpu.h>
#include <plat-omap/dma-omap.h>
+#ifdef CONFIG_ARCH_OMAP2PLUS
+#define dma_omap2plus() 1
+#else
+#define dma_omap2plus() 0
+#endif
+
struct omap_dmadev {
struct dma_device ddev;
spinlock_t lock;
@@ -438,7 +443,7 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_cyclic(
omap_disable_dma_irq(c->dma_ch, OMAP_DMA_BLOCK_IRQ);
}
- if (!cpu_class_is_omap1()) {
+ if (dma_omap2plus()) {
omap_set_dma_src_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
omap_set_dma_dest_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
}
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 85b164e..24df035 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -40,7 +40,6 @@
#include <linux/pm_runtime.h>
#include <linux/platform_data/mmc-omap.h>
#include <mach/hardware.h>
-#include <plat/cpu.h>
/* OMAP HSMMC Host Controller Registers */
#define OMAP_HSMMC_SYSSTATUS 0x0014
diff --git a/sound/soc/omap/omap-pcm.c b/sound/soc/omap/omap-pcm.c
index 340874e..52977aa 100644
--- a/sound/soc/omap/omap-pcm.c
+++ b/sound/soc/omap/omap-pcm.c
@@ -32,9 +32,14 @@
#include <sound/dmaengine_pcm.h>
#include <sound/soc.h>
-#include <plat/cpu.h>
#include "omap-pcm.h"
+#ifdef CONFIG_ARCH_OMAP1
+#define pcm_omap1510() cpu_is_omap1510()
+#else
+#define pcm_omap1510() 0
+#endif
+
static const struct snd_pcm_hardware omap_pcm_hardware = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID |
@@ -159,7 +164,7 @@ static snd_pcm_uframes_t omap_pcm_pointer(struct snd_pcm_substream *substream)
{
snd_pcm_uframes_t offset;
- if (cpu_is_omap1510())
+ if (pcm_omap1510())
offset = snd_dmaengine_pcm_pointer_no_residue(substream);
else
offset = snd_dmaengine_pcm_pointer(substream);
^ permalink raw reply related
* [PATCH 2/2] ARM: OMAP: Split plat/cpu.h into local soc.h for mach-omap1 and mach-omap2
From: Tony Lindgren @ 2012-10-08 17:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121008173452.10603.53886.stgit@muffinssi>
We want to remove plat/cpu.h. To do this, let's first split
it to private soc.h to mach-omap1 and mach-omap2. We have to
keep plat/cpu.h around until the remaining drivers are fixed,
so let's include the local soc.h in plat/cpu.h and print
a warning for drivers still including plat/cpu.h.
Once the drivers are fixed not to include plat/cpu.h, we
can remove the file (and the warning).
This is needed for the ARM common zImage support.
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap1/clock.c | 2
arch/arm/mach-omap1/clock_data.c | 2
arch/arm/mach-omap1/i2c.c | 2
arch/arm/mach-omap1/id.c | 2
arch/arm/mach-omap1/include/mach/hardware.h | 2
arch/arm/mach-omap1/include/mach/memory.h | 2
arch/arm/mach-omap1/irq.c | 2
arch/arm/mach-omap1/mcbsp.c | 2
arch/arm/mach-omap1/soc.h | 229 +++++++++++
arch/arm/mach-omap2/board-3430sdp.c | 1
arch/arm/mach-omap2/board-flash.c | 2
arch/arm/mach-omap2/board-omap3beagle.c | 1
arch/arm/mach-omap2/board-omap3evm.c | 1
arch/arm/mach-omap2/board-zoom-display.c | 1
arch/arm/mach-omap2/clock33xx_data.c | 2
arch/arm/mach-omap2/clockdomain.c | 1
arch/arm/mach-omap2/clockdomain.h | 1
arch/arm/mach-omap2/clockdomain2xxx_3xxx.c | 2
arch/arm/mach-omap2/clockdomains2420_data.c | 1
arch/arm/mach-omap2/clockdomains2430_data.c | 1
arch/arm/mach-omap2/clockdomains3xxx_data.c | 1
arch/arm/mach-omap2/common.h | 1
arch/arm/mach-omap2/display.c | 1
arch/arm/mach-omap2/dma.c | 1
arch/arm/mach-omap2/gpmc.c | 1
arch/arm/mach-omap2/hsmmc.c | 1
arch/arm/mach-omap2/i2c.c | 1
arch/arm/mach-omap2/mux.c | 1
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 1
arch/arm/mach-omap2/omap_hwmod.h | 1
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1
arch/arm/mach-omap2/omap_twl.c | 1
arch/arm/mach-omap2/opp3xxx_data.c | 1
arch/arm/mach-omap2/pm-debug.c | 1
arch/arm/mach-omap2/pm.c | 1
arch/arm/mach-omap2/pm24xx.c | 1
arch/arm/mach-omap2/pm34xx.c | 1
arch/arm/mach-omap2/pm44xx.c | 1
arch/arm/mach-omap2/pmu.c | 1
arch/arm/mach-omap2/powerdomain.h | 2
arch/arm/mach-omap2/powerdomains2xxx_data.c | 1
arch/arm/mach-omap2/prcm.c | 1
arch/arm/mach-omap2/serial.c | 1
arch/arm/mach-omap2/soc.h | 468 ++++++++++++++++++++++
arch/arm/mach-omap2/sr_device.c | 2
arch/arm/mach-omap2/usb-host.c | 1
arch/arm/mach-omap2/usb-musb.c | 3
arch/arm/plat-omap/dma.c | 4
arch/arm/plat-omap/i2c.c | 4
arch/arm/plat-omap/include/plat/cpu.h | 562 ---------------------------
arch/arm/plat-omap/sram.c | 3
51 files changed, 749 insertions(+), 581 deletions(-)
create mode 100644 arch/arm/mach-omap1/soc.h
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 4c895ef..9e74aa6 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -22,7 +22,7 @@
#include <asm/mach-types.h>
-#include <plat/cpu.h>
+#include "soc.h"
#include <plat/usb.h>
#include <mach/hardware.h>
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index c78fb91..28aea55 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -22,7 +22,7 @@
#include <asm/mach-types.h> /* for machine_is_* */
-#include <plat/cpu.h>
+#include "soc.h"
#include <mach/hardware.h>
#include <mach/usb.h> /* for OTG_BASE */
diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c
index a6f465a..32bcbb8 100644
--- a/arch/arm/mach-omap1/i2c.c
+++ b/arch/arm/mach-omap1/i2c.c
@@ -21,7 +21,7 @@
#include <linux/i2c-omap.h>
#include <mach/mux.h>
-#include <plat/cpu.h>
+#include "soc.h"
#include "../plat-omap/i2c.h"
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c
index a1b846a..52de382 100644
--- a/arch/arm/mach-omap1/id.c
+++ b/arch/arm/mach-omap1/id.c
@@ -17,7 +17,7 @@
#include <linux/io.h>
#include <asm/system_info.h>
-#include <plat/cpu.h>
+#include "soc.h"
#include <mach/hardware.h>
diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h
index 2a4eb19..dc3237b 100644
--- a/arch/arm/mach-omap1/include/mach/hardware.h
+++ b/arch/arm/mach-omap1/include/mach/hardware.h
@@ -39,7 +39,7 @@
#include <asm/sizes.h>
#ifndef __ASSEMBLER__
#include <asm/types.h>
-#include <plat/cpu.h>
+#include "../../mach-omap1/soc.h"
/*
* NOTE: Please use ioremap + __raw_read/write where possible instead of these
diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h
index 901082d..351ae4f 100644
--- a/arch/arm/mach-omap1/include/mach/memory.h
+++ b/arch/arm/mach-omap1/include/mach/memory.h
@@ -19,7 +19,7 @@
* because of the strncmp().
*/
#if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__)
-#include <plat/cpu.h>
+#include "../../mach-omap1/soc.h"
/*
* OMAP-1510 Local Bus address offset
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 6995fb6..122ef67 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -45,7 +45,7 @@
#include <asm/irq.h>
#include <asm/mach/irq.h>
-#include <plat/cpu.h>
+#include "soc.h"
#include <mach/hardware.h>
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 3d461e1..c6d8fdf 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -21,7 +21,7 @@
#include <plat-omap/dma-omap.h>
#include <mach/mux.h>
-#include <plat/cpu.h>
+#include "soc.h"
#include <linux/platform_data/asoc-ti-mcbsp.h>
#include <mach/irqs.h>
diff --git a/arch/arm/mach-omap1/soc.h b/arch/arm/mach-omap1/soc.h
new file mode 100644
index 0000000..6cf9c1c
--- /dev/null
+++ b/arch/arm/mach-omap1/soc.h
@@ -0,0 +1,229 @@
+/*
+ * OMAP cpu type detection
+ *
+ * Copyright (C) 2004, 2008 Nokia Corporation
+ *
+ * Copyright (C) 2009-11 Texas Instruments.
+ *
+ * Written by Tony Lindgren <tony.lindgren@nokia.com>
+ *
+ * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARCH_OMAP_CPU_H
+#define __ASM_ARCH_OMAP_CPU_H
+
+#ifndef __ASSEMBLY__
+
+#include <linux/bitops.h>
+
+/*
+ * Test if multicore OMAP support is needed
+ */
+#undef MULTI_OMAP1
+#undef OMAP_NAME
+
+#ifdef CONFIG_ARCH_OMAP730
+# ifdef OMAP_NAME
+# undef MULTI_OMAP1
+# define MULTI_OMAP1
+# else
+# define OMAP_NAME omap730
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP850
+# ifdef OMAP_NAME
+# undef MULTI_OMAP1
+# define MULTI_OMAP1
+# else
+# define OMAP_NAME omap850
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP15XX
+# ifdef OMAP_NAME
+# undef MULTI_OMAP1
+# define MULTI_OMAP1
+# else
+# define OMAP_NAME omap1510
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP16XX
+# ifdef OMAP_NAME
+# undef MULTI_OMAP1
+# define MULTI_OMAP1
+# else
+# define OMAP_NAME omap16xx
+# endif
+#endif
+
+/*
+ * omap_rev bits:
+ * CPU id bits (0730, 1510, 1710, 2422...) [31:16]
+ * CPU revision (See _REV_ defined in cpu.h) [15:08]
+ * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00]
+ */
+unsigned int omap_rev(void);
+
+/*
+ * Get the CPU revision for OMAP devices
+ */
+#define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff)
+
+/*
+ * Macros to group OMAP into cpu classes.
+ * These can be used in most places.
+ * cpu_is_omap7xx(): True for OMAP730, OMAP850
+ * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310
+ * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710
+ */
+#define GET_OMAP_CLASS (omap_rev() & 0xff)
+
+#define IS_OMAP_CLASS(class, id) \
+static inline int is_omap ##class (void) \
+{ \
+ return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
+}
+
+#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
+
+#define IS_OMAP_SUBCLASS(subclass, id) \
+static inline int is_omap ##subclass (void) \
+{ \
+ return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
+}
+
+IS_OMAP_CLASS(7xx, 0x07)
+IS_OMAP_CLASS(15xx, 0x15)
+IS_OMAP_CLASS(16xx, 0x16)
+
+#define cpu_is_omap7xx() 0
+#define cpu_is_omap15xx() 0
+#define cpu_is_omap16xx() 0
+
+#if defined(MULTI_OMAP1)
+# if defined(CONFIG_ARCH_OMAP730)
+# undef cpu_is_omap7xx
+# define cpu_is_omap7xx() is_omap7xx()
+# endif
+# if defined(CONFIG_ARCH_OMAP850)
+# undef cpu_is_omap7xx
+# define cpu_is_omap7xx() is_omap7xx()
+# endif
+# if defined(CONFIG_ARCH_OMAP15XX)
+# undef cpu_is_omap15xx
+# define cpu_is_omap15xx() is_omap15xx()
+# endif
+# if defined(CONFIG_ARCH_OMAP16XX)
+# undef cpu_is_omap16xx
+# define cpu_is_omap16xx() is_omap16xx()
+# endif
+#else
+# if defined(CONFIG_ARCH_OMAP730)
+# undef cpu_is_omap7xx
+# define cpu_is_omap7xx() 1
+# endif
+# if defined(CONFIG_ARCH_OMAP850)
+# undef cpu_is_omap7xx
+# define cpu_is_omap7xx() 1
+# endif
+# if defined(CONFIG_ARCH_OMAP15XX)
+# undef cpu_is_omap15xx
+# define cpu_is_omap15xx() 1
+# endif
+# if defined(CONFIG_ARCH_OMAP16XX)
+# undef cpu_is_omap16xx
+# define cpu_is_omap16xx() 1
+# endif
+#endif
+
+/*
+ * Macros to detect individual cpu types.
+ * These are only rarely needed.
+ * cpu_is_omap310(): True for OMAP310
+ * cpu_is_omap1510(): True for OMAP1510
+ * cpu_is_omap1610(): True for OMAP1610
+ * cpu_is_omap1611(): True for OMAP1611
+ * cpu_is_omap5912(): True for OMAP5912
+ * cpu_is_omap1621(): True for OMAP1621
+ * cpu_is_omap1710(): True for OMAP1710
+ */
+#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff)
+
+#define IS_OMAP_TYPE(type, id) \
+static inline int is_omap ##type (void) \
+{ \
+ return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
+}
+
+IS_OMAP_TYPE(310, 0x0310)
+IS_OMAP_TYPE(1510, 0x1510)
+IS_OMAP_TYPE(1610, 0x1610)
+IS_OMAP_TYPE(1611, 0x1611)
+IS_OMAP_TYPE(5912, 0x1611)
+IS_OMAP_TYPE(1621, 0x1621)
+IS_OMAP_TYPE(1710, 0x1710)
+
+#define cpu_is_omap310() 0
+#define cpu_is_omap1510() 0
+#define cpu_is_omap1610() 0
+#define cpu_is_omap5912() 0
+#define cpu_is_omap1611() 0
+#define cpu_is_omap1621() 0
+#define cpu_is_omap1710() 0
+
+/* These are needed to compile common code */
+#ifdef CONFIG_ARCH_OMAP1
+#define cpu_is_omap242x() 0
+#define cpu_is_omap2430() 0
+#define cpu_is_omap243x() 0
+#define cpu_is_omap24xx() 0
+#define cpu_is_omap34xx() 0
+#define cpu_is_omap44xx() 0
+#define soc_is_omap54xx() 0
+#define soc_is_am33xx() 0
+#define cpu_class_is_omap1() 1
+#define cpu_class_is_omap2() 0
+#endif
+
+/*
+ * Whether we have MULTI_OMAP1 or not, we still need to distinguish
+ * between 310 vs. 1510 and 1611B/5912 vs. 1710.
+ */
+
+#if defined(CONFIG_ARCH_OMAP15XX)
+# undef cpu_is_omap310
+# undef cpu_is_omap1510
+# define cpu_is_omap310() is_omap310()
+# define cpu_is_omap1510() is_omap1510()
+#endif
+
+#if defined(CONFIG_ARCH_OMAP16XX)
+# undef cpu_is_omap1610
+# undef cpu_is_omap1611
+# undef cpu_is_omap5912
+# undef cpu_is_omap1621
+# undef cpu_is_omap1710
+# define cpu_is_omap1610() is_omap1610()
+# define cpu_is_omap1611() is_omap1611()
+# define cpu_is_omap5912() is_omap5912()
+# define cpu_is_omap1621() is_omap1621()
+# define cpu_is_omap1710() is_omap1710()
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 2abbd6a..69f980e 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -39,6 +39,7 @@
#include "gpmc-smc91x.h"
+#include "soc.h"
#include "board-flash.h"
#include "mux.h"
#include "sdram-qimonda-hyb18m512160af-6.h"
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index 42c4b4e..a544c3a 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -17,11 +17,11 @@
#include <linux/mtd/physmap.h>
#include <linux/io.h>
-#include <plat/cpu.h>
#include <plat/gpmc.h>
#include <linux/platform_data/mtd-nand-omap2.h>
#include <linux/platform_data/mtd-onenand-omap2.h>
+#include "soc.h"
#include "common.h"
#include "board-flash.h"
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 521244d..cb59660 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -46,6 +46,7 @@
#include <plat/usb.h>
#include "omap_device.h"
+#include "soc.h"
#include "mux.h"
#include "hsmmc.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index a3959de..aa3c9a3 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -52,6 +52,7 @@
#include <video/omapdss.h>
#include <video/omap-panel-tfp410.h>
+#include "soc.h"
#include "mux.h"
#include "sdram-micron-mt46h32m32lf-6.h"
#include "hsmmc.h"
diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c
index 230cb33..1c7c834 100644
--- a/arch/arm/mach-omap2/board-zoom-display.c
+++ b/arch/arm/mach-omap2/board-zoom-display.c
@@ -18,6 +18,7 @@
#include <video/omapdss.h>
#include "board-zoom.h"
+#include "soc.h"
#include "common.h"
#define LCD_PANEL_RESET_GPIO_PROD 96
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
index 8bb21ec..fce6d7c 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -18,7 +18,7 @@
#include <linux/list.h>
#include <linux/clk.h>
-#include "am33xx.h"
+#include "soc.h"
#include "iomap.h"
#include "control.h"
#include "clock.h"
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 32dbcbc..467567a 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -27,6 +27,7 @@
#include <linux/bitops.h>
+#include "soc.h"
#include "clock.h"
#include "clockdomain.h"
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 53e8ba0..bc42446 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -20,7 +20,6 @@
#include "powerdomain.h"
#include "clock.h"
#include "omap_hwmod.h"
-#include <plat/cpu.h>
/*
* Clockdomain flags
diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
index 9a7792a..d60bf11 100644
--- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
@@ -14,6 +14,8 @@
#include <linux/types.h>
#include <plat/prcm.h>
+
+#include "soc.h"
#include "prm.h"
#include "prm2xxx_3xxx.h"
#include "cm.h"
diff --git a/arch/arm/mach-omap2/clockdomains2420_data.c b/arch/arm/mach-omap2/clockdomains2420_data.c
index 5c74185..7e76bec 100644
--- a/arch/arm/mach-omap2/clockdomains2420_data.c
+++ b/arch/arm/mach-omap2/clockdomains2420_data.c
@@ -35,6 +35,7 @@
#include <linux/kernel.h>
#include <linux/io.h>
+#include "soc.h"
#include "clockdomain.h"
#include "prm2xxx_3xxx.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clockdomains2430_data.c b/arch/arm/mach-omap2/clockdomains2430_data.c
index f096175..b923007 100644
--- a/arch/arm/mach-omap2/clockdomains2430_data.c
+++ b/arch/arm/mach-omap2/clockdomains2430_data.c
@@ -35,6 +35,7 @@
#include <linux/kernel.h>
#include <linux/io.h>
+#include "soc.h"
#include "clockdomain.h"
#include "prm2xxx_3xxx.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c
index 933a35c..e6b91e5 100644
--- a/arch/arm/mach-omap2/clockdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c
@@ -33,6 +33,7 @@
#include <linux/kernel.h>
#include <linux/io.h>
+#include "soc.h"
#include "clockdomain.h"
#include "prm2xxx_3xxx.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index e328e07..c85022a 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -34,7 +34,6 @@
#include <asm/proc-fns.h>
-#include <plat/cpu.h>
#include "../plat-omap/common.h"
#include "i2c.h"
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index bfa3e4c..a6b2c09 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -30,6 +30,7 @@
#include "omap-pm.h"
#include "common.h"
+#include "soc.h"
#include "iomap.h"
#include "mux.h"
#include "control.h"
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index aa4a2d6..2ed4ac1 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -28,6 +28,7 @@
#include <linux/init.h>
#include <linux/device.h>
+#include "soc.h"
#include "omap_hwmod.h"
#include "omap_device.h"
#include <plat-omap/dma-omap.h>
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index a63ebc7..a3457f7 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -29,7 +29,6 @@
#include <asm/mach-types.h>
#include <plat/gpmc.h>
-#include <plat/cpu.h>
#include <plat/gpmc.h>
#include <plat/sdrc.h>
#include "omap_device.h"
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 1d5957e..435ba26 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -17,6 +17,7 @@
#include <mach/hardware.h>
#include <linux/platform_data/gpio-omap.h>
+#include "soc.h"
#include "mmc.h"
#include "omap-pm.h"
#include "omap_device.h"
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index 8b39937..ad55b94 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -19,6 +19,7 @@
*
*/
+#include "soc.h"
#include "common.h"
#include "omap_hwmod.h"
#include "omap_device.h"
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 6dd62f8..7a7e97f 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -38,6 +38,7 @@
#include "omap_hwmod.h"
+#include "soc.h"
#include "control.h"
#include "mux.h"
#include "prm.h"
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index ff4e6a0..3f5fd7e 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -50,6 +50,7 @@
#include <asm/suspend.h>
#include <asm/hardware/cache-l2x0.h>
+#include "soc.h"
#include "common.h"
#include "omap44xx.h"
#include "omap4-sar-layout.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index b3349f7..87b59b4 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -35,7 +35,6 @@
#include <linux/list.h>
#include <linux/ioport.h>
#include <linux/spinlock.h>
-#include <plat/cpu.h>
struct omap_device;
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 87cba19..46b2797 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -17,7 +17,6 @@
#include <linux/i2c-omap.h>
#include "omap_hwmod.h"
-#include <plat/cpu.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <plat-omap/dma-omap.h>
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index f515a1a..2bf35dc 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -18,6 +18,7 @@
#include <linux/kernel.h>
#include <linux/i2c/twl.h>
+#include "soc.h"
#include "voltage.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c
index 75cef5f..62772e0 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -19,6 +19,7 @@
*/
#include <linux/module.h>
+#include "soc.h"
#include "control.h"
#include "omap_opp_data.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 1c45ff2..2071212 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -33,6 +33,7 @@
#include <plat/dmtimer.h>
#include "omap-pm.h"
+#include "soc.h"
#include "cm2xxx_3xxx.h"
#include "prm2xxx_3xxx.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 29c82ad..2af95a4 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -23,6 +23,7 @@
#include "omap_device.h"
#include "common.h"
+#include "soc.h"
#include "prcm-common.h"
#include "voltage.h"
#include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index be8989e..6d17e044 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -40,6 +40,7 @@
#include "../plat-omap/sram.h"
+#include "soc.h"
#include "common.h"
#include "clock.h"
#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 87b9080..621d885 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -44,6 +44,7 @@
#include "../plat-omap/sram.h"
+#include "soc.h"
#include "common.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 04922d1..7da75ae 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -18,6 +18,7 @@
#include <linux/slab.h>
#include <asm/system_misc.h>
+#include "soc.h"
#include "common.h"
#include "clockdomain.h"
#include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c
index 98c5969..3cf79b5 100644
--- a/arch/arm/mach-omap2/pmu.c
+++ b/arch/arm/mach-omap2/pmu.c
@@ -15,6 +15,7 @@
#include <asm/pmu.h>
+#include "soc.h"
#include "omap_hwmod.h"
#include "omap_device.h"
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
index baee906..5277d56eb 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -22,8 +22,6 @@
#include <linux/atomic.h>
-#include <plat/cpu.h>
-
#include "voltage.h"
/* Powerdomain basic power states */
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c
index 2385c1f..ba520d4 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c
@@ -14,6 +14,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
+#include "soc.h"
#include "powerdomain.h"
#include "powerdomains2xxx_3xxx_data.h"
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 0f51e03..cff270a 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -28,6 +28,7 @@
#include "common.h"
#include <plat/prcm.h>
+#include "soc.h"
#include "clock.h"
#include "clock2xxx.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index d157584..35684d4 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -35,6 +35,7 @@
#include "omap_device.h"
#include "omap-pm.h"
+#include "soc.h"
#include "prm2xxx_3xxx.h"
#include "pm.h"
#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index fc9b96d..0700964 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -1,7 +1,473 @@
-#include <plat/cpu.h>
+/*
+ * OMAP cpu type detection
+ *
+ * Copyright (C) 2004, 2008 Nokia Corporation
+ *
+ * Copyright (C) 2009-11 Texas Instruments.
+ *
+ * Written by Tony Lindgren <tony.lindgren@nokia.com>
+ *
+ * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
#include "omap24xx.h"
#include "omap34xx.h"
#include "omap44xx.h"
#include "ti81xx.h"
#include "am33xx.h"
#include "omap54xx.h"
+
+#ifndef __ASSEMBLY__
+
+#include <linux/bitops.h>
+
+/*
+ * Test if multicore OMAP support is needed
+ */
+#undef MULTI_OMAP2
+#undef OMAP_NAME
+
+#ifdef CONFIG_SOC_OMAP2420
+# ifdef OMAP_NAME
+# undef MULTI_OMAP2
+# define MULTI_OMAP2
+# else
+# define OMAP_NAME omap2420
+# endif
+#endif
+#ifdef CONFIG_SOC_OMAP2430
+# ifdef OMAP_NAME
+# undef MULTI_OMAP2
+# define MULTI_OMAP2
+# else
+# define OMAP_NAME omap2430
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP3
+# ifdef OMAP_NAME
+# undef MULTI_OMAP2
+# define MULTI_OMAP2
+# else
+# define OMAP_NAME omap3
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP4
+# ifdef OMAP_NAME
+# undef MULTI_OMAP2
+# define MULTI_OMAP2
+# else
+# define OMAP_NAME omap4
+# endif
+#endif
+
+#ifdef CONFIG_SOC_OMAP5
+# ifdef OMAP_NAME
+# undef MULTI_OMAP2
+# define MULTI_OMAP2
+# else
+# define OMAP_NAME omap5
+# endif
+#endif
+
+#ifdef CONFIG_SOC_AM33XX
+# ifdef OMAP_NAME
+# undef MULTI_OMAP2
+# define MULTI_OMAP2
+# else
+# define OMAP_NAME am33xx
+# endif
+#endif
+
+/*
+ * Omap device type i.e. EMU/HS/TST/GP/BAD
+ */
+#define OMAP2_DEVICE_TYPE_TEST 0
+#define OMAP2_DEVICE_TYPE_EMU 1
+#define OMAP2_DEVICE_TYPE_SEC 2
+#define OMAP2_DEVICE_TYPE_GP 3
+#define OMAP2_DEVICE_TYPE_BAD 4
+
+int omap_type(void);
+
+/*
+ * omap_rev bits:
+ * CPU id bits (0730, 1510, 1710, 2422...) [31:16]
+ * CPU revision (See _REV_ defined in cpu.h) [15:08]
+ * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00]
+ */
+unsigned int omap_rev(void);
+
+/*
+ * Get the CPU revision for OMAP devices
+ */
+#define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff)
+
+/*
+ * Macros to group OMAP into cpu classes.
+ * These can be used in most places.
+ * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
+ * cpu_is_omap242x(): True for OMAP2420, OMAP2422, OMAP2423
+ * cpu_is_omap243x(): True for OMAP2430
+ * cpu_is_omap343x(): True for OMAP3430
+ * cpu_is_omap443x(): True for OMAP4430
+ * cpu_is_omap446x(): True for OMAP4460
+ * cpu_is_omap447x(): True for OMAP4470
+ * soc_is_omap543x(): True for OMAP5430, OMAP5432
+ */
+#define GET_OMAP_CLASS (omap_rev() & 0xff)
+
+#define IS_OMAP_CLASS(class, id) \
+static inline int is_omap ##class (void) \
+{ \
+ return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
+}
+
+#define GET_AM_CLASS ((omap_rev() >> 24) & 0xff)
+
+#define IS_AM_CLASS(class, id) \
+static inline int is_am ##class (void) \
+{ \
+ return (GET_AM_CLASS == (id)) ? 1 : 0; \
+}
+
+#define GET_TI_CLASS ((omap_rev() >> 24) & 0xff)
+
+#define IS_TI_CLASS(class, id) \
+static inline int is_ti ##class (void) \
+{ \
+ return (GET_TI_CLASS == (id)) ? 1 : 0; \
+}
+
+#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
+
+#define IS_OMAP_SUBCLASS(subclass, id) \
+static inline int is_omap ##subclass (void) \
+{ \
+ return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
+}
+
+#define IS_TI_SUBCLASS(subclass, id) \
+static inline int is_ti ##subclass (void) \
+{ \
+ return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
+}
+
+#define IS_AM_SUBCLASS(subclass, id) \
+static inline int is_am ##subclass (void) \
+{ \
+ return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
+}
+
+IS_OMAP_CLASS(24xx, 0x24)
+IS_OMAP_CLASS(34xx, 0x34)
+IS_OMAP_CLASS(44xx, 0x44)
+IS_AM_CLASS(35xx, 0x35)
+IS_OMAP_CLASS(54xx, 0x54)
+IS_AM_CLASS(33xx, 0x33)
+
+IS_TI_CLASS(81xx, 0x81)
+
+IS_OMAP_SUBCLASS(242x, 0x242)
+IS_OMAP_SUBCLASS(243x, 0x243)
+IS_OMAP_SUBCLASS(343x, 0x343)
+IS_OMAP_SUBCLASS(363x, 0x363)
+IS_OMAP_SUBCLASS(443x, 0x443)
+IS_OMAP_SUBCLASS(446x, 0x446)
+IS_OMAP_SUBCLASS(447x, 0x447)
+IS_OMAP_SUBCLASS(543x, 0x543)
+
+IS_TI_SUBCLASS(816x, 0x816)
+IS_TI_SUBCLASS(814x, 0x814)
+IS_AM_SUBCLASS(335x, 0x335)
+
+#define cpu_is_omap24xx() 0
+#define cpu_is_omap242x() 0
+#define cpu_is_omap243x() 0
+#define cpu_is_omap34xx() 0
+#define cpu_is_omap343x() 0
+#define cpu_is_ti81xx() 0
+#define cpu_is_ti816x() 0
+#define cpu_is_ti814x() 0
+#define soc_is_am35xx() 0
+#define soc_is_am33xx() 0
+#define soc_is_am335x() 0
+#define cpu_is_omap44xx() 0
+#define cpu_is_omap443x() 0
+#define cpu_is_omap446x() 0
+#define cpu_is_omap447x() 0
+#define soc_is_omap54xx() 0
+#define soc_is_omap543x() 0
+
+#if defined(MULTI_OMAP2)
+# if defined(CONFIG_ARCH_OMAP2)
+# undef cpu_is_omap24xx
+# define cpu_is_omap24xx() is_omap24xx()
+# endif
+# if defined (CONFIG_SOC_OMAP2420)
+# undef cpu_is_omap242x
+# define cpu_is_omap242x() is_omap242x()
+# endif
+# if defined (CONFIG_SOC_OMAP2430)
+# undef cpu_is_omap243x
+# define cpu_is_omap243x() is_omap243x()
+# endif
+# if defined(CONFIG_ARCH_OMAP3)
+# undef cpu_is_omap34xx
+# undef cpu_is_omap343x
+# define cpu_is_omap34xx() is_omap34xx()
+# define cpu_is_omap343x() is_omap343x()
+# endif
+#else
+# if defined(CONFIG_ARCH_OMAP2)
+# undef cpu_is_omap24xx
+# define cpu_is_omap24xx() 1
+# endif
+# if defined(CONFIG_SOC_OMAP2420)
+# undef cpu_is_omap242x
+# define cpu_is_omap242x() 1
+# endif
+# if defined(CONFIG_SOC_OMAP2430)
+# undef cpu_is_omap243x
+# define cpu_is_omap243x() 1
+# endif
+# if defined(CONFIG_ARCH_OMAP3)
+# undef cpu_is_omap34xx
+# define cpu_is_omap34xx() 1
+# endif
+# if defined(CONFIG_SOC_OMAP3430)
+# undef cpu_is_omap343x
+# define cpu_is_omap343x() 1
+# endif
+#endif
+
+/*
+ * Macros to detect individual cpu types.
+ * These are only rarely needed.
+ * cpu_is_omap2420(): True for OMAP2420
+ * cpu_is_omap2422(): True for OMAP2422
+ * cpu_is_omap2423(): True for OMAP2423
+ * cpu_is_omap2430(): True for OMAP2430
+ * cpu_is_omap3430(): True for OMAP3430
+ */
+#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff)
+
+#define IS_OMAP_TYPE(type, id) \
+static inline int is_omap ##type (void) \
+{ \
+ return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
+}
+
+IS_OMAP_TYPE(2420, 0x2420)
+IS_OMAP_TYPE(2422, 0x2422)
+IS_OMAP_TYPE(2423, 0x2423)
+IS_OMAP_TYPE(2430, 0x2430)
+IS_OMAP_TYPE(3430, 0x3430)
+
+#define cpu_is_omap2420() 0
+#define cpu_is_omap2422() 0
+#define cpu_is_omap2423() 0
+#define cpu_is_omap2430() 0
+#define cpu_is_omap3430() 0
+#define cpu_is_omap3630() 0
+#define soc_is_omap5430() 0
+
+/* These are needed for the common code */
+#ifdef CONFIG_ARCH_OMAP2PLUS
+#define cpu_is_omap7xx() 0
+#define cpu_is_omap15xx() 0
+#define cpu_is_omap16xx() 0
+#define cpu_is_omap1510() 0
+#define cpu_is_omap1610() 0
+#define cpu_is_omap1611() 0
+#define cpu_is_omap1621() 0
+#define cpu_is_omap1710() 0
+#define cpu_class_is_omap1() 0
+#define cpu_class_is_omap2() 1
+#endif
+
+#if defined(CONFIG_ARCH_OMAP2)
+# undef cpu_is_omap2420
+# undef cpu_is_omap2422
+# undef cpu_is_omap2423
+# undef cpu_is_omap2430
+# define cpu_is_omap2420() is_omap2420()
+# define cpu_is_omap2422() is_omap2422()
+# define cpu_is_omap2423() is_omap2423()
+# define cpu_is_omap2430() is_omap2430()
+#endif
+
+#if defined(CONFIG_ARCH_OMAP3)
+# undef cpu_is_omap3430
+# undef cpu_is_ti81xx
+# undef cpu_is_ti816x
+# undef cpu_is_ti814x
+# undef soc_is_am35xx
+# define cpu_is_omap3430() is_omap3430()
+# undef cpu_is_omap3630
+# define cpu_is_omap3630() is_omap363x()
+# define cpu_is_ti81xx() is_ti81xx()
+# define cpu_is_ti816x() is_ti816x()
+# define cpu_is_ti814x() is_ti814x()
+# define soc_is_am35xx() is_am35xx()
+#endif
+
+# if defined(CONFIG_SOC_AM33XX)
+# undef soc_is_am33xx
+# undef soc_is_am335x
+# define soc_is_am33xx() is_am33xx()
+# define soc_is_am335x() is_am335x()
+#endif
+
+# if defined(CONFIG_ARCH_OMAP4)
+# undef cpu_is_omap44xx
+# undef cpu_is_omap443x
+# undef cpu_is_omap446x
+# undef cpu_is_omap447x
+# define cpu_is_omap44xx() is_omap44xx()
+# define cpu_is_omap443x() is_omap443x()
+# define cpu_is_omap446x() is_omap446x()
+# define cpu_is_omap447x() is_omap447x()
+# endif
+
+# if defined(CONFIG_SOC_OMAP5)
+# undef soc_is_omap54xx
+# undef soc_is_omap543x
+# define soc_is_omap54xx() is_omap54xx()
+# define soc_is_omap543x() is_omap543x()
+#endif
+
+/* Various silicon revisions for omap2 */
+#define OMAP242X_CLASS 0x24200024
+#define OMAP2420_REV_ES1_0 OMAP242X_CLASS
+#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (0x1 << 8))
+
+#define OMAP243X_CLASS 0x24300024
+#define OMAP2430_REV_ES1_0 OMAP243X_CLASS
+
+#define OMAP343X_CLASS 0x34300034
+#define OMAP3430_REV_ES1_0 OMAP343X_CLASS
+#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (0x1 << 8))
+#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (0x2 << 8))
+#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (0x3 << 8))
+#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (0x4 << 8))
+#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (0x5 << 8))
+
+#define OMAP363X_CLASS 0x36300034
+#define OMAP3630_REV_ES1_0 OMAP363X_CLASS
+#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8))
+#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8))
+
+#define TI816X_CLASS 0x81600034
+#define TI8168_REV_ES1_0 TI816X_CLASS
+#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
+
+#define TI814X_CLASS 0x81400034
+#define TI8148_REV_ES1_0 TI814X_CLASS
+#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
+#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
+
+#define AM35XX_CLASS 0x35170034
+#define AM35XX_REV_ES1_0 AM35XX_CLASS
+#define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8))
+
+#define AM335X_CLASS 0x33500033
+#define AM335X_REV_ES1_0 AM335X_CLASS
+
+#define OMAP443X_CLASS 0x44300044
+#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
+#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8))
+#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8))
+#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8))
+#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8))
+
+#define OMAP446X_CLASS 0x44600044
+#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8))
+#define OMAP4460_REV_ES1_1 (OMAP446X_CLASS | (0x11 << 8))
+
+#define OMAP447X_CLASS 0x44700044
+#define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8))
+
+#define OMAP54XX_CLASS 0x54000054
+#define OMAP5430_REV_ES1_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8))
+#define OMAP5432_REV_ES1_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8))
+
+void omap2xxx_check_revision(void);
+void omap3xxx_check_revision(void);
+void omap4xxx_check_revision(void);
+void omap5xxx_check_revision(void);
+void omap3xxx_check_features(void);
+void ti81xx_check_features(void);
+void omap4xxx_check_features(void);
+
+/*
+ * Runtime detection of OMAP3 features
+ *
+ * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip
+ * family have OS-level control over the I/O chain clock. This is
+ * to avoid a window during which wakeups could potentially be lost
+ * during powerdomain transitions. If this bit is set, it
+ * indicates that the chip does support OS-level control of this
+ * feature.
+ */
+extern u32 omap_features;
+
+#define OMAP3_HAS_L2CACHE BIT(0)
+#define OMAP3_HAS_IVA BIT(1)
+#define OMAP3_HAS_SGX BIT(2)
+#define OMAP3_HAS_NEON BIT(3)
+#define OMAP3_HAS_ISP BIT(4)
+#define OMAP3_HAS_192MHZ_CLK BIT(5)
+#define OMAP3_HAS_IO_WAKEUP BIT(6)
+#define OMAP3_HAS_SDRC BIT(7)
+#define OMAP3_HAS_IO_CHAIN_CTRL BIT(8)
+#define OMAP4_HAS_MPU_1GHZ BIT(9)
+#define OMAP4_HAS_MPU_1_2GHZ BIT(10)
+#define OMAP4_HAS_MPU_1_5GHZ BIT(11)
+
+
+#define OMAP3_HAS_FEATURE(feat,flag) \
+static inline unsigned int omap3_has_ ##feat(void) \
+{ \
+ return omap_features & OMAP3_HAS_ ##flag; \
+} \
+
+OMAP3_HAS_FEATURE(l2cache, L2CACHE)
+OMAP3_HAS_FEATURE(sgx, SGX)
+OMAP3_HAS_FEATURE(iva, IVA)
+OMAP3_HAS_FEATURE(neon, NEON)
+OMAP3_HAS_FEATURE(isp, ISP)
+OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
+OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
+OMAP3_HAS_FEATURE(sdrc, SDRC)
+OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL)
+
+/*
+ * Runtime detection of OMAP4 features
+ */
+#define OMAP4_HAS_FEATURE(feat, flag) \
+static inline unsigned int omap4_has_ ##feat(void) \
+{ \
+ return omap_features & OMAP4_HAS_ ##flag; \
+} \
+
+OMAP4_HAS_FEATURE(mpu_1ghz, MPU_1GHZ)
+OMAP4_HAS_FEATURE(mpu_1_2ghz, MPU_1_2GHZ)
+OMAP4_HAS_FEATURE(mpu_1_5ghz, MPU_1_5GHZ)
+
+#endif /* __ASSEMBLY__ */
+
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index 692b4eb..96c67cd 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -23,8 +23,8 @@
#include <linux/slab.h>
#include <linux/io.h>
+#include "soc.h"
#include "omap_device.h"
-
#include "voltage.h"
#include "control.h"
#include "pm.h"
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index 84d8228..4fe6712 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -26,6 +26,7 @@
#include <asm/io.h>
#include <plat/usb.h>
+#include "soc.h"
#include "omap_device.h"
#include "mux.h"
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 24f300a..07f385a 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -28,8 +28,7 @@
#include <plat/usb.h>
#include "omap_device.h"
-#include "am35xx.h"
-
+#include "soc.h"
#include "mux.h"
static struct musb_hdrc_config musb_config = {
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index b4dcd92..49803cc 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -36,9 +36,11 @@
#include <linux/slab.h>
#include <linux/delay.h>
-#include <plat/cpu.h>
#include <plat-omap/dma-omap.h>
+#include "../mach-omap1/soc.h"
+#include "../mach-omap2/soc.h"
+
/*
* MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA
* channels that an instance of the SDMA IP block can support. Used
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 37597a6..be6deb7 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -32,7 +32,9 @@
#include <linux/clk.h>
#include <mach/irqs.h>
-#include <plat/cpu.h>
+
+#include "../mach-omap1/soc.h"
+#include "../mach-omap2/soc.h"
#include "i2c.h"
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index bfd9c5f..9289aeb 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -1,6 +1,4 @@
/*
- * arch/arm/plat-omap/include/mach/cpu.h
- *
* OMAP cpu type detection
*
* Copyright (C) 2004, 2008 Nokia Corporation
@@ -30,564 +28,14 @@
#ifndef __ASM_ARCH_OMAP_CPU_H
#define __ASM_ARCH_OMAP_CPU_H
-#ifndef __ASSEMBLY__
-
-#include <linux/bitops.h>
-
-/*
- * Test if multicore OMAP support is needed
- */
-#undef MULTI_OMAP1
-#undef MULTI_OMAP2
-#undef OMAP_NAME
-
-#ifdef CONFIG_ARCH_OMAP730
-# ifdef OMAP_NAME
-# undef MULTI_OMAP1
-# define MULTI_OMAP1
-# else
-# define OMAP_NAME omap730
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-# ifdef OMAP_NAME
-# undef MULTI_OMAP1
-# define MULTI_OMAP1
-# else
-# define OMAP_NAME omap850
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
-# ifdef OMAP_NAME
-# undef MULTI_OMAP1
-# define MULTI_OMAP1
-# else
-# define OMAP_NAME omap1510
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
-# ifdef OMAP_NAME
-# undef MULTI_OMAP1
-# define MULTI_OMAP1
-# else
-# define OMAP_NAME omap16xx
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
-# if (defined(OMAP_NAME) || defined(MULTI_OMAP1))
-# error "OMAP1 and OMAP2PLUS can't be selected at the same time"
-# endif
-#endif
-#ifdef CONFIG_SOC_OMAP2420
-# ifdef OMAP_NAME
-# undef MULTI_OMAP2
-# define MULTI_OMAP2
-# else
-# define OMAP_NAME omap2420
-# endif
-#endif
-#ifdef CONFIG_SOC_OMAP2430
-# ifdef OMAP_NAME
-# undef MULTI_OMAP2
-# define MULTI_OMAP2
-# else
-# define OMAP_NAME omap2430
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP3
-# ifdef OMAP_NAME
-# undef MULTI_OMAP2
-# define MULTI_OMAP2
-# else
-# define OMAP_NAME omap3
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP4
-# ifdef OMAP_NAME
-# undef MULTI_OMAP2
-# define MULTI_OMAP2
-# else
-# define OMAP_NAME omap4
-# endif
-#endif
-
-#ifdef CONFIG_SOC_OMAP5
-# ifdef OMAP_NAME
-# undef MULTI_OMAP2
-# define MULTI_OMAP2
-# else
-# define OMAP_NAME omap5
-# endif
-#endif
-
-#ifdef CONFIG_SOC_AM33XX
-# ifdef OMAP_NAME
-# undef MULTI_OMAP2
-# define MULTI_OMAP2
-# else
-# define OMAP_NAME am33xx
-# endif
-#endif
-
-/*
- * Omap device type i.e. EMU/HS/TST/GP/BAD
- */
-#define OMAP2_DEVICE_TYPE_TEST 0
-#define OMAP2_DEVICE_TYPE_EMU 1
-#define OMAP2_DEVICE_TYPE_SEC 2
-#define OMAP2_DEVICE_TYPE_GP 3
-#define OMAP2_DEVICE_TYPE_BAD 4
-
-int omap_type(void);
-
-/*
- * omap_rev bits:
- * CPU id bits (0730, 1510, 1710, 2422...) [31:16]
- * CPU revision (See _REV_ defined in cpu.h) [15:08]
- * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00]
- */
-unsigned int omap_rev(void);
-
-/*
- * Get the CPU revision for OMAP devices
- */
-#define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff)
-
-/*
- * Macros to group OMAP into cpu classes.
- * These can be used in most places.
- * cpu_is_omap7xx(): True for OMAP730, OMAP850
- * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310
- * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710
- * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
- * cpu_is_omap242x(): True for OMAP2420, OMAP2422, OMAP2423
- * cpu_is_omap243x(): True for OMAP2430
- * cpu_is_omap343x(): True for OMAP3430
- * cpu_is_omap443x(): True for OMAP4430
- * cpu_is_omap446x(): True for OMAP4460
- * cpu_is_omap447x(): True for OMAP4470
- * soc_is_omap543x(): True for OMAP5430, OMAP5432
- */
-#define GET_OMAP_CLASS (omap_rev() & 0xff)
-
-#define IS_OMAP_CLASS(class, id) \
-static inline int is_omap ##class (void) \
-{ \
- return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
-}
-
-#define GET_AM_CLASS ((omap_rev() >> 24) & 0xff)
-
-#define IS_AM_CLASS(class, id) \
-static inline int is_am ##class (void) \
-{ \
- return (GET_AM_CLASS == (id)) ? 1 : 0; \
-}
-
-#define GET_TI_CLASS ((omap_rev() >> 24) & 0xff)
-
-#define IS_TI_CLASS(class, id) \
-static inline int is_ti ##class (void) \
-{ \
- return (GET_TI_CLASS == (id)) ? 1 : 0; \
-}
-
-#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
-
-#define IS_OMAP_SUBCLASS(subclass, id) \
-static inline int is_omap ##subclass (void) \
-{ \
- return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
-}
-
-#define IS_TI_SUBCLASS(subclass, id) \
-static inline int is_ti ##subclass (void) \
-{ \
- return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
-}
-
-#define IS_AM_SUBCLASS(subclass, id) \
-static inline int is_am ##subclass (void) \
-{ \
- return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
-}
-
-IS_OMAP_CLASS(7xx, 0x07)
-IS_OMAP_CLASS(15xx, 0x15)
-IS_OMAP_CLASS(16xx, 0x16)
-IS_OMAP_CLASS(24xx, 0x24)
-IS_OMAP_CLASS(34xx, 0x34)
-IS_OMAP_CLASS(44xx, 0x44)
-IS_AM_CLASS(35xx, 0x35)
-IS_OMAP_CLASS(54xx, 0x54)
-IS_AM_CLASS(33xx, 0x33)
-
-IS_TI_CLASS(81xx, 0x81)
-
-IS_OMAP_SUBCLASS(242x, 0x242)
-IS_OMAP_SUBCLASS(243x, 0x243)
-IS_OMAP_SUBCLASS(343x, 0x343)
-IS_OMAP_SUBCLASS(363x, 0x363)
-IS_OMAP_SUBCLASS(443x, 0x443)
-IS_OMAP_SUBCLASS(446x, 0x446)
-IS_OMAP_SUBCLASS(447x, 0x447)
-IS_OMAP_SUBCLASS(543x, 0x543)
-
-IS_TI_SUBCLASS(816x, 0x816)
-IS_TI_SUBCLASS(814x, 0x814)
-IS_AM_SUBCLASS(335x, 0x335)
-
-#define cpu_is_omap7xx() 0
-#define cpu_is_omap15xx() 0
-#define cpu_is_omap16xx() 0
-#define cpu_is_omap24xx() 0
-#define cpu_is_omap242x() 0
-#define cpu_is_omap243x() 0
-#define cpu_is_omap34xx() 0
-#define cpu_is_omap343x() 0
-#define cpu_is_ti81xx() 0
-#define cpu_is_ti816x() 0
-#define cpu_is_ti814x() 0
-#define soc_is_am35xx() 0
-#define soc_is_am33xx() 0
-#define soc_is_am335x() 0
-#define cpu_is_omap44xx() 0
-#define cpu_is_omap443x() 0
-#define cpu_is_omap446x() 0
-#define cpu_is_omap447x() 0
-#define soc_is_omap54xx() 0
-#define soc_is_omap543x() 0
-
-#if defined(MULTI_OMAP1)
-# if defined(CONFIG_ARCH_OMAP730)
-# undef cpu_is_omap7xx
-# define cpu_is_omap7xx() is_omap7xx()
-# endif
-# if defined(CONFIG_ARCH_OMAP850)
-# undef cpu_is_omap7xx
-# define cpu_is_omap7xx() is_omap7xx()
-# endif
-# if defined(CONFIG_ARCH_OMAP15XX)
-# undef cpu_is_omap15xx
-# define cpu_is_omap15xx() is_omap15xx()
-# endif
-# if defined(CONFIG_ARCH_OMAP16XX)
-# undef cpu_is_omap16xx
-# define cpu_is_omap16xx() is_omap16xx()
-# endif
-#else
-# if defined(CONFIG_ARCH_OMAP730)
-# undef cpu_is_omap7xx
-# define cpu_is_omap7xx() 1
-# endif
-# if defined(CONFIG_ARCH_OMAP850)
-# undef cpu_is_omap7xx
-# define cpu_is_omap7xx() 1
-# endif
-# if defined(CONFIG_ARCH_OMAP15XX)
-# undef cpu_is_omap15xx
-# define cpu_is_omap15xx() 1
-# endif
-# if defined(CONFIG_ARCH_OMAP16XX)
-# undef cpu_is_omap16xx
-# define cpu_is_omap16xx() 1
-# endif
-#endif
-
-#if defined(MULTI_OMAP2)
-# if defined(CONFIG_ARCH_OMAP2)
-# undef cpu_is_omap24xx
-# define cpu_is_omap24xx() is_omap24xx()
-# endif
-# if defined (CONFIG_SOC_OMAP2420)
-# undef cpu_is_omap242x
-# define cpu_is_omap242x() is_omap242x()
-# endif
-# if defined (CONFIG_SOC_OMAP2430)
-# undef cpu_is_omap243x
-# define cpu_is_omap243x() is_omap243x()
-# endif
-# if defined(CONFIG_ARCH_OMAP3)
-# undef cpu_is_omap34xx
-# undef cpu_is_omap343x
-# define cpu_is_omap34xx() is_omap34xx()
-# define cpu_is_omap343x() is_omap343x()
-# endif
-#else
-# if defined(CONFIG_ARCH_OMAP2)
-# undef cpu_is_omap24xx
-# define cpu_is_omap24xx() 1
-# endif
-# if defined(CONFIG_SOC_OMAP2420)
-# undef cpu_is_omap242x
-# define cpu_is_omap242x() 1
-# endif
-# if defined(CONFIG_SOC_OMAP2430)
-# undef cpu_is_omap243x
-# define cpu_is_omap243x() 1
-# endif
-# if defined(CONFIG_ARCH_OMAP3)
-# undef cpu_is_omap34xx
-# define cpu_is_omap34xx() 1
-# endif
-# if defined(CONFIG_SOC_OMAP3430)
-# undef cpu_is_omap343x
-# define cpu_is_omap343x() 1
-# endif
-#endif
-
-/*
- * Macros to detect individual cpu types.
- * These are only rarely needed.
- * cpu_is_omap310(): True for OMAP310
- * cpu_is_omap1510(): True for OMAP1510
- * cpu_is_omap1610(): True for OMAP1610
- * cpu_is_omap1611(): True for OMAP1611
- * cpu_is_omap5912(): True for OMAP5912
- * cpu_is_omap1621(): True for OMAP1621
- * cpu_is_omap1710(): True for OMAP1710
- * cpu_is_omap2420(): True for OMAP2420
- * cpu_is_omap2422(): True for OMAP2422
- * cpu_is_omap2423(): True for OMAP2423
- * cpu_is_omap2430(): True for OMAP2430
- * cpu_is_omap3430(): True for OMAP3430
- */
-#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff)
-
-#define IS_OMAP_TYPE(type, id) \
-static inline int is_omap ##type (void) \
-{ \
- return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
-}
-
-IS_OMAP_TYPE(310, 0x0310)
-IS_OMAP_TYPE(1510, 0x1510)
-IS_OMAP_TYPE(1610, 0x1610)
-IS_OMAP_TYPE(1611, 0x1611)
-IS_OMAP_TYPE(5912, 0x1611)
-IS_OMAP_TYPE(1621, 0x1621)
-IS_OMAP_TYPE(1710, 0x1710)
-IS_OMAP_TYPE(2420, 0x2420)
-IS_OMAP_TYPE(2422, 0x2422)
-IS_OMAP_TYPE(2423, 0x2423)
-IS_OMAP_TYPE(2430, 0x2430)
-IS_OMAP_TYPE(3430, 0x3430)
-
-#define cpu_is_omap310() 0
-#define cpu_is_omap1510() 0
-#define cpu_is_omap1610() 0
-#define cpu_is_omap5912() 0
-#define cpu_is_omap1611() 0
-#define cpu_is_omap1621() 0
-#define cpu_is_omap1710() 0
-#define cpu_is_omap2420() 0
-#define cpu_is_omap2422() 0
-#define cpu_is_omap2423() 0
-#define cpu_is_omap2430() 0
-#define cpu_is_omap3430() 0
-#define cpu_is_omap3630() 0
-#define soc_is_omap5430() 0
-
-/*
- * Whether we have MULTI_OMAP1 or not, we still need to distinguish
- * between 310 vs. 1510 and 1611B/5912 vs. 1710.
- */
+#warning "fix omap driver, plat/cpu.h will be removed soon"
-#if defined(CONFIG_ARCH_OMAP15XX)
-# undef cpu_is_omap310
-# undef cpu_is_omap1510
-# define cpu_is_omap310() is_omap310()
-# define cpu_is_omap1510() is_omap1510()
+#ifdef CONFIG_ARCH_OMAP1
+#include "../../mach-omap1/soc.h"
#endif
-#if defined(CONFIG_ARCH_OMAP16XX)
-# undef cpu_is_omap1610
-# undef cpu_is_omap1611
-# undef cpu_is_omap5912
-# undef cpu_is_omap1621
-# undef cpu_is_omap1710
-# define cpu_is_omap1610() is_omap1610()
-# define cpu_is_omap1611() is_omap1611()
-# define cpu_is_omap5912() is_omap5912()
-# define cpu_is_omap1621() is_omap1621()
-# define cpu_is_omap1710() is_omap1710()
-#endif
-
-#if defined(CONFIG_ARCH_OMAP2)
-# undef cpu_is_omap2420
-# undef cpu_is_omap2422
-# undef cpu_is_omap2423
-# undef cpu_is_omap2430
-# define cpu_is_omap2420() is_omap2420()
-# define cpu_is_omap2422() is_omap2422()
-# define cpu_is_omap2423() is_omap2423()
-# define cpu_is_omap2430() is_omap2430()
-#endif
-
-#if defined(CONFIG_ARCH_OMAP3)
-# undef cpu_is_omap3430
-# undef cpu_is_ti81xx
-# undef cpu_is_ti816x
-# undef cpu_is_ti814x
-# undef soc_is_am35xx
-# define cpu_is_omap3430() is_omap3430()
-# undef cpu_is_omap3630
-# define cpu_is_omap3630() is_omap363x()
-# define cpu_is_ti81xx() is_ti81xx()
-# define cpu_is_ti816x() is_ti816x()
-# define cpu_is_ti814x() is_ti814x()
-# define soc_is_am35xx() is_am35xx()
-#endif
-
-# if defined(CONFIG_SOC_AM33XX)
-# undef soc_is_am33xx
-# undef soc_is_am335x
-# define soc_is_am33xx() is_am33xx()
-# define soc_is_am335x() is_am335x()
-#endif
-
-# if defined(CONFIG_ARCH_OMAP4)
-# undef cpu_is_omap44xx
-# undef cpu_is_omap443x
-# undef cpu_is_omap446x
-# undef cpu_is_omap447x
-# define cpu_is_omap44xx() is_omap44xx()
-# define cpu_is_omap443x() is_omap443x()
-# define cpu_is_omap446x() is_omap446x()
-# define cpu_is_omap447x() is_omap447x()
-# endif
-
-# if defined(CONFIG_SOC_OMAP5)
-# undef soc_is_omap54xx
-# undef soc_is_omap543x
-# define soc_is_omap54xx() is_omap54xx()
-# define soc_is_omap543x() is_omap543x()
+#ifdef CONFIG_ARCH_OMAP2PLUS
+#include "../../mach-omap2/soc.h"
#endif
-/* Macros to detect if we have OMAP1 or OMAP2 */
-#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
- cpu_is_omap16xx())
-#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \
- cpu_is_omap44xx() || soc_is_omap54xx() || \
- soc_is_am33xx())
-
-/* Various silicon revisions for omap2 */
-#define OMAP242X_CLASS 0x24200024
-#define OMAP2420_REV_ES1_0 OMAP242X_CLASS
-#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (0x1 << 8))
-
-#define OMAP243X_CLASS 0x24300024
-#define OMAP2430_REV_ES1_0 OMAP243X_CLASS
-
-#define OMAP343X_CLASS 0x34300034
-#define OMAP3430_REV_ES1_0 OMAP343X_CLASS
-#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (0x1 << 8))
-#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (0x2 << 8))
-#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (0x3 << 8))
-#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (0x4 << 8))
-#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (0x5 << 8))
-
-#define OMAP363X_CLASS 0x36300034
-#define OMAP3630_REV_ES1_0 OMAP363X_CLASS
-#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8))
-#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8))
-
-#define TI816X_CLASS 0x81600034
-#define TI8168_REV_ES1_0 TI816X_CLASS
-#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
-
-#define TI814X_CLASS 0x81400034
-#define TI8148_REV_ES1_0 TI814X_CLASS
-#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
-#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
-
-#define AM35XX_CLASS 0x35170034
-#define AM35XX_REV_ES1_0 AM35XX_CLASS
-#define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8))
-
-#define AM335X_CLASS 0x33500033
-#define AM335X_REV_ES1_0 AM335X_CLASS
-
-#define OMAP443X_CLASS 0x44300044
-#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
-#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8))
-#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8))
-#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8))
-#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8))
-
-#define OMAP446X_CLASS 0x44600044
-#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8))
-#define OMAP4460_REV_ES1_1 (OMAP446X_CLASS | (0x11 << 8))
-
-#define OMAP447X_CLASS 0x44700044
-#define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8))
-
-#define OMAP54XX_CLASS 0x54000054
-#define OMAP5430_REV_ES1_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8))
-#define OMAP5432_REV_ES1_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8))
-
-void omap2xxx_check_revision(void);
-void omap3xxx_check_revision(void);
-void omap4xxx_check_revision(void);
-void omap5xxx_check_revision(void);
-void omap3xxx_check_features(void);
-void ti81xx_check_features(void);
-void omap4xxx_check_features(void);
-
-/*
- * Runtime detection of OMAP3 features
- *
- * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip
- * family have OS-level control over the I/O chain clock. This is
- * to avoid a window during which wakeups could potentially be lost
- * during powerdomain transitions. If this bit is set, it
- * indicates that the chip does support OS-level control of this
- * feature.
- */
-extern u32 omap_features;
-
-#define OMAP3_HAS_L2CACHE BIT(0)
-#define OMAP3_HAS_IVA BIT(1)
-#define OMAP3_HAS_SGX BIT(2)
-#define OMAP3_HAS_NEON BIT(3)
-#define OMAP3_HAS_ISP BIT(4)
-#define OMAP3_HAS_192MHZ_CLK BIT(5)
-#define OMAP3_HAS_IO_WAKEUP BIT(6)
-#define OMAP3_HAS_SDRC BIT(7)
-#define OMAP3_HAS_IO_CHAIN_CTRL BIT(8)
-#define OMAP4_HAS_MPU_1GHZ BIT(9)
-#define OMAP4_HAS_MPU_1_2GHZ BIT(10)
-#define OMAP4_HAS_MPU_1_5GHZ BIT(11)
-
-
-#define OMAP3_HAS_FEATURE(feat,flag) \
-static inline unsigned int omap3_has_ ##feat(void) \
-{ \
- return omap_features & OMAP3_HAS_ ##flag; \
-} \
-
-OMAP3_HAS_FEATURE(l2cache, L2CACHE)
-OMAP3_HAS_FEATURE(sgx, SGX)
-OMAP3_HAS_FEATURE(iva, IVA)
-OMAP3_HAS_FEATURE(neon, NEON)
-OMAP3_HAS_FEATURE(isp, ISP)
-OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
-OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
-OMAP3_HAS_FEATURE(sdrc, SDRC)
-OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL)
-
-/*
- * Runtime detection of OMAP4 features
- */
-#define OMAP4_HAS_FEATURE(feat, flag) \
-static inline unsigned int omap4_has_ ##feat(void) \
-{ \
- return omap_features & OMAP4_HAS_ ##flag; \
-} \
-
-OMAP4_HAS_FEATURE(mpu_1ghz, MPU_1GHZ)
-OMAP4_HAS_FEATURE(mpu_1_2ghz, MPU_1_2GHZ)
-OMAP4_HAS_FEATURE(mpu_1_5ghz, MPU_1_5GHZ)
-
-#endif /* __ASSEMBLY__ */
#endif
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index dc2d800..70dcc22 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -25,7 +25,8 @@
#include <asm/mach/map.h>
-#include <plat/cpu.h>
+#include "../mach-omap1/soc.h"
+#include "../mach-omap2/soc.h"
#include "sram.h"
^ permalink raw reply related
* [PATCH V2 1/2] ARM: remove unnecessary flush of anon pages in flush_dcache_page()
From: Simon Baatz @ 2012-10-08 17:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121008113606.GB31458@arm.com>
Hi Catalin,
On Mon, Oct 08, 2012 at 12:36:07PM +0100, Catalin Marinas wrote:
> On Sun, Oct 07, 2012 at 12:29:11PM +0100, Simon Baatz wrote:
> > On non-aliasing VIPT D-caches, there is no need to flush the kernel
> > mapping of anon pages in flush_dcache_page() directly. If the page is
> > mapped as executable later, the necessary D/I-cache flush will be done
> > in __sync_icache_dcache().
> >
> > Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
> > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > Cc: Russell King <linux@arm.linux.org.uk>
>
> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
>
Thanks for the ack! However, while this improvement is nice to have,
I care more about fixing that nasty data corruption on VIVT/VIPT
aliasing caches with the second patch. In case you cannot offer a
Acked-by or Reviewed-by for the patch for technical reasons, could
you please explain your reservations against the fix?
- Simon
^ permalink raw reply
* [PATCH V2 1/2] ARM: remove unnecessary flush of anon pages in flush_dcache_page()
From: Catalin Marinas @ 2012-10-08 17:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121008173827.GB11786@schnuecks.de>
On Mon, Oct 08, 2012 at 06:38:27PM +0100, Simon Baatz wrote:
> Hi Catalin,
>
> On Mon, Oct 08, 2012 at 12:36:07PM +0100, Catalin Marinas wrote:
> > On Sun, Oct 07, 2012 at 12:29:11PM +0100, Simon Baatz wrote:
> > > On non-aliasing VIPT D-caches, there is no need to flush the kernel
> > > mapping of anon pages in flush_dcache_page() directly. If the page is
> > > mapped as executable later, the necessary D/I-cache flush will be done
> > > in __sync_icache_dcache().
> > >
> > > Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
> > > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > > Cc: Russell King <linux@arm.linux.org.uk>
> >
> > Acked-by: Catalin Marinas <catalin.marinas@arm.com>
> >
>
> Thanks for the ack! However, while this improvement is nice to have,
> I care more about fixing that nasty data corruption on VIVT/VIPT
> aliasing caches with the second patch. In case you cannot offer a
> Acked-by or Reviewed-by for the patch for technical reasons, could
> you please explain your reservations against the fix?
I was busy with other things today and didn't have time to get back to
this thread. I'll post a question though.
--
Catalin
^ permalink raw reply
* [PATCH V3 2/2] ARM: Handle user space mapped pages in flush_kernel_dcache_page
From: Catalin Marinas @ 2012-10-08 17:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1349609352-6408-3-git-send-email-gmbnomis@gmail.com>
On Sun, Oct 07, 2012 at 12:29:12PM +0100, Simon Baatz wrote:
> Commit f8b63c1 made flush_kernel_dcache_page() a no-op assuming that
> the pages it needs to handle are kernel mapped only. However, for
> example when doing direct I/O, pages with user space mappings may
> occur.
>
> Thus, do lazy flushing like in flush_dcache_page() if there are no user
> space mappings. Otherwise, flush the kernel cache lines directly.
Do you need to fix the VIPT non-aliasing case as well? Does
flush_kernel_dcache_page() need to handle I-cache?
--
Catalin
^ permalink raw reply
* Problem with 64-bit registers on i.MX53
From: Dave Martin @ 2012-10-08 17:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121008171011.GA4625@n2100.arm.linux.org.uk>
On Mon, Oct 08, 2012 at 06:10:11PM +0100, Russell King - ARM Linux wrote:
> On Mon, Oct 08, 2012 at 06:01:24PM +0100, Russell King - ARM Linux wrote:
> > On Mon, Oct 08, 2012 at 06:08:41PM +0200, Michael Olbrich wrote:
> > >
> > > Hi,
> > >
> > > I have a problem that looks like that 64-bit registers (I think) are not
> > > saved/restored correctly on a context switch. I've reduced it to the
> > > following test case:
> > >
> > > - Latest Linux mainline kernel (v3.6-8559-ge9eca4d)
> > > v3.5 is also affected
> > > - imx_v6_v7_defconfig
> > > - arch/arm/boot/dts/imx53-evk.dts
> > >
> > > The following test program is compiled with "-mcpu=cortex-a8 -mfpu=neon
> > > -O2".
> > > ------------------------>8--------------------------------
> > > #include <inttypes.h>
> > > #include <assert.h>
> > >
> > > volatile int x = 2;
> > > volatile int64_t y = 2;
> > >
> > > int main() {
> > > volatile int a = 0;
> > > volatile int64_t b = 0;
> > > while (1) {
> > > a = (a + x) % (1 << 30);
> > > b = (b + y) % (1 << 30);
> > > assert(a == b);
> > > }
> > > }
> > > ------------------------>8--------------------------------
> > > The ".. (b + y) .." should result in "vadd.i64 d19, d18, d16" or
> > > something like that.
Just for my curiosity, can you let me know what compiler version you're
using and the disassembly? I'm actually a little surprised to see
NEON code being generated here, though the patch below fixes what
definitely looks like a context switch bug for combined v6+v7 kernels...
Cheers
---Dave
> >
> > Hmm.
> >
> > Can you send me the output of 'grep ^Features /proc/cpuinfo' please?
>
> You may also like to try the patch below... it will probably fix your
> problem.
>
> diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h
> index a7aadbd..6a6f1e4 100644
> --- a/arch/arm/include/asm/vfpmacros.h
> +++ b/arch/arm/include/asm/vfpmacros.h
> @@ -28,7 +28,7 @@
> ldr \tmp, =elf_hwcap @ may not have MVFR regs
> ldr \tmp, [\tmp, #0]
> tst \tmp, #HWCAP_VFPv3D16
> - ldceq p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
> + ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
> addne \base, \base, #32*4 @ step over unused register space
> #else
> VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
> @@ -52,7 +52,7 @@
> ldr \tmp, =elf_hwcap @ may not have MVFR regs
> ldr \tmp, [\tmp, #0]
> tst \tmp, #HWCAP_VFPv3D16
> - stceq p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
> + stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
> addne \base, \base, #32*4 @ step over unused register space
> #else
> VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Problem with 64-bit registers on i.MX53
From: Russell King - ARM Linux @ 2012-10-08 18:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121008175052.GG2302@linaro.org>
On Mon, Oct 08, 2012 at 06:50:52PM +0100, Dave Martin wrote:
> Just for my curiosity, can you let me know what compiler version you're
> using and the disassembly? I'm actually a little surprised to see
> NEON code being generated here, though the patch below fixes what
> definitely looks like a context switch bug for combined v6+v7 kernels...
Well, one such compiler is gcc 4.6.3 in Ubuntu Precise LTS.
^ permalink raw reply
* Problem with 64-bit registers on i.MX53
From: Dave Martin @ 2012-10-08 18:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121008180337.GB4625@n2100.arm.linux.org.uk>
On Mon, Oct 08, 2012 at 07:03:37PM +0100, Russell King - ARM Linux wrote:
> On Mon, Oct 08, 2012 at 06:50:52PM +0100, Dave Martin wrote:
> > Just for my curiosity, can you let me know what compiler version you're
> > using and the disassembly? I'm actually a little surprised to see
> > NEON code being generated here, though the patch below fixes what
> > definitely looks like a context switch bug for combined v6+v7 kernels...
>
> Well, one such compiler is gcc 4.6.3 in Ubuntu Precise LTS.
Hmmm, I really need to upgrade...
Cheers
---Dave
^ permalink raw reply
* [PATCH 1/2] ARM: OMAP: Trivial driver changes to remove include plat/cpu.h
From: Tony Lindgren @ 2012-10-08 18:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121008173557.10603.18539.stgit@muffinssi>
* Tony Lindgren <tony@atomide.com> [121008 10:37]:
> Drivers should not use cpu_is_omap or cpu_class_is_omap macros,
> they should be private to the platform init code. And we'll be
> removing plat/cpu.h and only have a private soc.h for the
> arch/arm/*omap* code.
>
> This patch is intended as preparation for the core omap changes
> and removes the need to include plat/cpu.h from several drivers.
> This is needed for the ARM common zImage support.
>
> These changes are OK to do because:
>
> - omap-rng.c and hsmmc.c don't need plat/cpu.h
>
> - omap-aes.c and omap-sham.c get the proper platform_data
> passed to them so they don't need extra checks in the driver
>
> - omap-dma.c and omap-pcm.c can test the arch locally as
> omap1 and omap2 cannot be compiled together because of
> conflicting compiler flags
> --- a/drivers/mmc/host/omap_hsmmc.c
> +++ b/drivers/mmc/host/omap_hsmmc.c
> @@ -40,7 +40,6 @@
> #include <linux/pm_runtime.h>
> #include <linux/platform_data/mmc-omap.h>
> #include <mach/hardware.h>
> -#include <plat/cpu.h>
>
> /* OMAP HSMMC Host Controller Registers */
> #define OMAP_HSMMC_SYSSTATUS 0x0014
Actually I'll fold this mmc change into an earlier patch
I've posted as "ARM: OMAP: Split plat/mmc.h into local headers
and platform_data".
Regards,
Tony
^ permalink raw reply
* [PATCH 5/6] ARM: dove: Remove watchdog from DT
From: Martin Michlmayr @ 2012-10-08 18:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201209251228.25752.arnd@arndb.de>
* Arnd Bergmann <arnd@arndb.de> [2012-09-25 12:28]:
> The hard part is finding those users. Once we know who they are, we can
> either try to help out by writing a dts file and letting them test it,
> or by assisting them in the process to write one themselves.
...
> We should certainly make sure we don't remove those machines as long
> as Debian supports them.
Arnaud Patard pointed out this conversation to me. I added Orion and
Kirkwood support to Debian. Unfortunately, I don't have a lot of
time these days but there are definitely still Debian users on Orion
and I would like to continue supporting them.
If someone volunteers to keep the Orion code up-to-date and/or port it
to DT, I can perform tests from time to time. I have the following
Orion devices: QNAP TS-209, QNAP TS-409, HP mv2120 and D-Link DNS-323.
If someone wants to work on Orion kernel support, I can also make a
QNAP TS-409 main board and a D-Link DNS-323 device available.
(Please CC me since I'm currently not subscribed.)
--
Martin Michlmayr
http://www.cyrius.com/
^ permalink raw reply
* Booting vanilla kernel on the beaglebone
From: Richard Cochran @ 2012-10-08 19:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50693ECD.4000000@ti.com>
On Mon, Oct 01, 2012 at 12:27:17PM +0530, Vaibhav Hiremath wrote:
> I have just tested it to cross-check and it boots up fine with
> linux-next/master branch. I have pasted boot log below for your reference.
>
>
>
> U-Boot#
> U-Boot# mmc rescan 0
> U-Boot# fatload mmc 0 80000000 am335x-evm.dtb
> reading am335x-evm.dtb
Two questions:
1. Why are you using am335x-evm.dtb and not am335x-bone.dtb here?
2. Can you post your .config?
Thanks,
Richard
^ permalink raw reply
* [PATCH 1/2] ARM: imx: clk: Split SSI clock into 'ipg' and 'per'
From: Fabio Estevam @ 2012-10-08 19:33 UTC (permalink / raw)
To: linux-arm-kernel
Currently imx ssi driver has been using only the ipg clock as only slave mode
is supported.
For mx27 it is necessay to provide both 'ipg' and 'per' clocks in order to get
ssi functional.
This issue was found on mx27 by unselecting the mmc driver from the kernel
,which resulted on a system that could not play audio.
When the mmc driver is selected the required 'per2' clock is provided and it
allows the ssi to work.
Add the required 'per' clock to the mx27 ssi and a dummy one for the other SoCs.
Reported-by: Ga?tan Carlier <gcembed@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/mach-imx/clk-imx21.c | 11 +++++++----
arch/arm/mach-imx/clk-imx25.c | 6 ++++--
arch/arm/mach-imx/clk-imx27.c | 9 +++++----
arch/arm/mach-imx/clk-imx31.c | 11 +++++++----
arch/arm/mach-imx/clk-imx35.c | 12 ++++++++----
arch/arm/mach-imx/clk-imx51-imx53.c | 19 +++++++++++++------
6 files changed, 44 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c
index cf65148..2ed49c8 100644
--- a/arch/arm/mach-imx/clk-imx21.c
+++ b/arch/arm/mach-imx/clk-imx21.c
@@ -51,8 +51,8 @@ static const char *mpll_sel_clks[] = { "fpm", "ckih", };
static const char *spll_sel_clks[] = { "fpm", "ckih", };
enum imx21_clks {
- ckil, ckih, fpm, mpll_sel, spll_sel, mpll, spll, fclk, hclk, ipg, per1,
- per2, per3, per4, uart1_ipg_gate, uart2_ipg_gate, uart3_ipg_gate,
+ dummy, ckil, ckih, fpm, mpll_sel, spll_sel, mpll, spll, fclk, hclk, ipg,
+ per1, per2, per3, per4, uart1_ipg_gate, uart2_ipg_gate, uart3_ipg_gate,
uart4_ipg_gate, gpt1_ipg_gate, gpt2_ipg_gate, gpt3_ipg_gate,
pwm_ipg_gate, sdhc1_ipg_gate, sdhc2_ipg_gate, lcdc_ipg_gate,
lcdc_hclk_gate, cspi3_ipg_gate, cspi2_ipg_gate, cspi1_ipg_gate,
@@ -72,6 +72,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
{
int i;
+ clk[dummy] = imx_clk_fixed("dummy", 0);
clk[ckil] = imx_clk_fixed("ckil", lref);
clk[ckih] = imx_clk_fixed("ckih", href);
clk[fpm] = imx_clk_fixed_factor("fpm", "ckil", 512, 1);
@@ -174,8 +175,10 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
clk_register_clkdev(clk[gpio_gate], "gpio", NULL);
clk_register_clkdev(clk[rtc_gate], "rtc", NULL);
clk_register_clkdev(clk[csi_hclk_gate], "csi", NULL);
- clk_register_clkdev(clk[ssi1_gate], "ssi1", NULL);
- clk_register_clkdev(clk[ssi2_gate], "ssi2", NULL);
+ clk_register_clkdev(clk[ssi1_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[ssi2_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.1");
clk_register_clkdev(clk[sdhc1_ipg_gate], "sdhc1", NULL);
clk_register_clkdev(clk[sdhc2_ipg_gate], "sdhc2", NULL);
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index d20d479..c81864d 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -222,8 +222,10 @@ int __init mx25_clocks_init(void)
clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0");
clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0");
clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0");
- clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0");
- clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1");
+ clk_register_clkdev(clk[ssi1_ipg], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[ssi2_ipg], "ipg", "imx-ssi.1");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.1");
clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0");
clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0");
clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0");
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 3b6b640..453b4f3 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -224,6 +224,7 @@ int __init mx27_clocks_init(unsigned long fref)
clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0");
clk_register_clkdev(clk[csi_ahb_gate], "ahb", "mx2-camera.0");
+ clk_register_clkdev(clk[per4_gate], "per", "mx2-camera.0");
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc");
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc");
@@ -236,8 +237,10 @@ int __init mx27_clocks_init(unsigned long fref)
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2");
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "mxc-ehci.2");
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2");
- clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
- clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
+ clk_register_clkdev(clk[ssi1_ipg_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[ssi2_ipg_gate], "ipg", "imx-ssi.1");
+ clk_register_clkdev(clk[per2_gate], "per", "imx-ssi.0");
+ clk_register_clkdev(clk[per2_gate], "per", "imx-ssi.1");
clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0");
clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0");
clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0");
@@ -262,8 +265,6 @@ int __init mx27_clocks_init(unsigned long fref)
clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);
clk_register_clkdev(clk[cpu_div], "cpu", NULL);
clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);
- clk_register_clkdev(clk[ssi1_baud_gate], "bitrate" , "imx-ssi.0");
- clk_register_clkdev(clk[ssi2_baud_gate], "bitrate" , "imx-ssi.1");
mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1);
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index 1253af2..a653ecf 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -35,8 +35,8 @@ static const char *csi_sel[] = { "upll", "spll", };
static const char *fir_sel[] = { "mcu_main", "upll", "spll" };
enum mx31_clks {
- ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, per_div,
- per, csi, fir, csi_div, usb_div_pre, usb_div_post, fir_div_pre,
+ dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg,
+ per_div, per, csi, fir, csi_div, usb_div_pre, usb_div_post, fir_div_pre,
fir_div_post, sdhc1_gate, sdhc2_gate, gpt_gate, epit1_gate, epit2_gate,
iim_gate, ata_gate, sdma_gate, cspi3_gate, rng_gate, uart1_gate,
uart2_gate, ssi1_gate, i2c1_gate, i2c2_gate, i2c3_gate, hantro_gate,
@@ -53,6 +53,7 @@ int __init mx31_clocks_init(unsigned long fref)
void __iomem *base = MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR);
int i;
+ clk[dummy] = imx_clk_fixed("dummy", 0);
clk[ckih] = imx_clk_fixed("ckih", fref);
clk[ckil] = imx_clk_fixed("ckil", 32768);
clk[mpll] = imx_clk_pllv1("mpll", "ckih", base + MXC_CCM_MPCTL);
@@ -161,8 +162,10 @@ int __init mx31_clocks_init(unsigned long fref)
clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");
clk_register_clkdev(clk[sdhc1_gate], NULL, "mxc-mmc.0");
clk_register_clkdev(clk[sdhc2_gate], NULL, "mxc-mmc.1");
- clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
- clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
+ clk_register_clkdev(clk[ssi1_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[ssi2_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.1");
clk_register_clkdev(clk[firi_gate], "firi", NULL);
clk_register_clkdev(clk[ata_gate], NULL, "pata_imx");
clk_register_clkdev(clk[rtic_gate], "rtic", NULL);
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index 177259b..0d952c7 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -50,7 +50,7 @@ static const char *std_sel[] = {"ppll", "arm"};
static const char *ipg_per_sel[] = {"ahb_per_div", "arm_per_div"};
enum mx35_clks {
- ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, ipg,
+ dummy, ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, ipg,
arm_per_div, ahb_per_div, ipg_per, uart_sel, uart_div, esdhc_sel,
esdhc1_div, esdhc2_div, esdhc3_div, spdif_sel, spdif_div_pre,
spdif_div_post, ssi_sel, ssi1_div_pre, ssi1_div_post, ssi2_div_pre,
@@ -87,7 +87,8 @@ int __init mx35_clocks_init()
*/
aad = &clk_consumer[0];
}
-
+
+ clk[dummy] = imx_clk_fixed("dummy", 0);
clk[ckih] = imx_clk_fixed("ckih", 24000000);
clk[mpll] = imx_clk_pllv1("mpll", "ckih", base + MX35_CCM_MPCTL);
clk[ppll] = imx_clk_pllv1("ppll", "ckih", base + MX35_CCM_PPCTL);
@@ -234,8 +235,11 @@ int __init mx35_clocks_init()
clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1");
clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
- clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
- clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
+ clk_register_clkdev(clk[ssi1_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[ssi2_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.1");
+
/* i.mx35 has the i.mx21 type uart */
clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0");
clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0");
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index a0bf848..46d679c 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -273,9 +273,12 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc");
clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc");
clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand");
- clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
- clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
- clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
+ clk_register_clkdev(clk[ssi1_ipg_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[ssi2_ipg_gate], "ipg", "imx-ssi.1");
+ clk_register_clkdev(clk[ssi3_ipg_gate], "ipg", "imx-ssi.2");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.1");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.2");
clk_register_clkdev(clk[ssi_ext1_gate], "ssi_ext1", NULL);
clk_register_clkdev(clk[ssi_ext2_gate], "ssi_ext2", NULL);
clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
@@ -366,9 +369,13 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx51.3");
clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.3");
clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx51.3");
- clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "83fcc000.ssi");
- clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "70014000.ssi");
- clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "83fe8000.ssi");
+ clk_register_clkdev(clk[ssi1_ipg_gate], "ipg", "83fcc000.ssi");
+ clk_register_clkdev(clk[ssi2_ipg_gate], "ipg", "70014000.ssi");
+ clk_register_clkdev(clk[ssi3_ipg_gate], "ipg", "83fe8000.ssi");
+ clk_register_clkdev(clk[dummy], "per", "83fcc000.ssi");
+ clk_register_clkdev(clk[dummy], "per", "70014000.ssi");
+ clk_register_clkdev(clk[dummy], "per", "83fe8000.ssi");
+
clk_register_clkdev(clk[nfc_gate], NULL, "83fdb000.nand");
/* set the usboh3 parent to pll2_sw */
--
1.7.9.5
^ permalink raw reply related
* [PATCH 2/2] ASoC: imx-ssi: Adopt 'per' and 'ipg' clocks
From: Fabio Estevam @ 2012-10-08 19:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1349724840-10466-1-git-send-email-fabio.estevam@freescale.com>
Currently imx ssi driver has been using only the ipg clock as only slave mode
is supported.
For mx27 it is necessay to provide both 'ipg' and 'per' clocks in order to get
ssi functional.
This issue was found on mx27 by unselecting the mmc driver from the kernel
,which resulted on a system that could not play audio.
When the mmc driver is selected the required 'per2' clock is provided and it
allows the ssi to work.
So make the driver request and handle both clocks.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
sound/soc/fsl/imx-ssi.c | 25 ++++++++++++++++++-------
sound/soc/fsl/imx-ssi.h | 2 +-
2 files changed, 19 insertions(+), 8 deletions(-)
diff --git a/sound/soc/fsl/imx-ssi.c b/sound/soc/fsl/imx-ssi.c
index 006f7d4..0742153 100644
--- a/sound/soc/fsl/imx-ssi.c
+++ b/sound/soc/fsl/imx-ssi.c
@@ -536,14 +536,23 @@ static int imx_ssi_probe(struct platform_device *pdev)
ssi->irq = platform_get_irq(pdev, 0);
- ssi->clk = devm_clk_get(&pdev->dev, NULL);
- if (IS_ERR(ssi->clk)) {
- ret = PTR_ERR(ssi->clk);
- dev_err(&pdev->dev, "Cannot get the clock: %d\n",
+ ssi->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
+ if (IS_ERR(ssi->clk_ipg)) {
+ ret = PTR_ERR(ssi->clk_ipg);
+ dev_err(&pdev->dev, "Cannot get the ipg clock: %d\n",
ret);
goto failed_clk;
}
- clk_prepare_enable(ssi->clk);
+ clk_prepare_enable(ssi->clk_ipg);
+
+ ssi->clk_per = devm_clk_get(&pdev->dev, "per");
+ if (IS_ERR(ssi->clk_per)) {
+ ret = PTR_ERR(ssi->clk_per);
+ dev_err(&pdev->dev, "Cannot get the per clock: %d\n",
+ ret);
+ goto failed_clk;
+ }
+ clk_prepare_enable(ssi->clk_per);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
@@ -633,7 +642,8 @@ failed_pdev_fiq_alloc:
failed_register:
release_mem_region(res->start, resource_size(res));
failed_get_resource:
- clk_disable_unprepare(ssi->clk);
+ clk_disable_unprepare(ssi->clk_ipg);
+ clk_disable_unprepare(ssi->clk_per);
failed_clk:
return ret;
@@ -653,7 +663,8 @@ static int __devexit imx_ssi_remove(struct platform_device *pdev)
ac97_ssi = NULL;
release_mem_region(res->start, resource_size(res));
- clk_disable_unprepare(ssi->clk);
+ clk_disable_unprepare(ssi->clk_ipg);
+ clk_disable_unprepare(ssi->clk_per);
return 0;
}
diff --git a/sound/soc/fsl/imx-ssi.h b/sound/soc/fsl/imx-ssi.h
index dc114bd..1ac54c9 100644
--- a/sound/soc/fsl/imx-ssi.h
+++ b/sound/soc/fsl/imx-ssi.h
@@ -193,7 +193,7 @@ struct imx_ssi {
struct platform_device *ac97_dev;
struct snd_soc_dai *imx_ac97;
- struct clk *clk;
+ struct clk *clk_ipg, *clk_per;
void __iomem *base;
int irq;
int fiq_enable;
--
1.7.9.5
^ permalink raw reply related
* [PATCH v2 1/2] ARM: imx: clk: Split SSI clock into 'ipg' and 'per'
From: Fabio Estevam @ 2012-10-08 19:40 UTC (permalink / raw)
To: linux-arm-kernel
Currently imx ssi driver has been using only the ipg clock as only slave mode
is supported.
For mx27 it is necessay to provide both 'ipg' and 'per' clocks in order to get
ssi functional.
This issue was found on mx27 by unselecting the mmc driver from the kernel
,which resulted on a system that could not play audio.
When the mmc driver is selected the required 'per2' clock is provided and it
allows the ssi to work.
Add the required 'per' clock to the mx27 ssi and a dummy one for the other SoCs.
Reported-by: Ga?tan Carlier <gcembed@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes since v1:
- Drop per4 from the camera clok, which belonged to a different patch
arch/arm/mach-imx/clk-imx21.c | 11 +++++++----
arch/arm/mach-imx/clk-imx25.c | 6 ++++--
arch/arm/mach-imx/clk-imx27.c | 8 ++++----
arch/arm/mach-imx/clk-imx31.c | 11 +++++++----
arch/arm/mach-imx/clk-imx35.c | 10 +++++++---
arch/arm/mach-imx/clk-imx51-imx53.c | 19 +++++++++++++------
6 files changed, 42 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c
index cf65148..2ed49c8 100644
--- a/arch/arm/mach-imx/clk-imx21.c
+++ b/arch/arm/mach-imx/clk-imx21.c
@@ -51,8 +51,8 @@ static const char *mpll_sel_clks[] = { "fpm", "ckih", };
static const char *spll_sel_clks[] = { "fpm", "ckih", };
enum imx21_clks {
- ckil, ckih, fpm, mpll_sel, spll_sel, mpll, spll, fclk, hclk, ipg, per1,
- per2, per3, per4, uart1_ipg_gate, uart2_ipg_gate, uart3_ipg_gate,
+ dummy, ckil, ckih, fpm, mpll_sel, spll_sel, mpll, spll, fclk, hclk, ipg,
+ per1, per2, per3, per4, uart1_ipg_gate, uart2_ipg_gate, uart3_ipg_gate,
uart4_ipg_gate, gpt1_ipg_gate, gpt2_ipg_gate, gpt3_ipg_gate,
pwm_ipg_gate, sdhc1_ipg_gate, sdhc2_ipg_gate, lcdc_ipg_gate,
lcdc_hclk_gate, cspi3_ipg_gate, cspi2_ipg_gate, cspi1_ipg_gate,
@@ -72,6 +72,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
{
int i;
+ clk[dummy] = imx_clk_fixed("dummy", 0);
clk[ckil] = imx_clk_fixed("ckil", lref);
clk[ckih] = imx_clk_fixed("ckih", href);
clk[fpm] = imx_clk_fixed_factor("fpm", "ckil", 512, 1);
@@ -174,8 +175,10 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
clk_register_clkdev(clk[gpio_gate], "gpio", NULL);
clk_register_clkdev(clk[rtc_gate], "rtc", NULL);
clk_register_clkdev(clk[csi_hclk_gate], "csi", NULL);
- clk_register_clkdev(clk[ssi1_gate], "ssi1", NULL);
- clk_register_clkdev(clk[ssi2_gate], "ssi2", NULL);
+ clk_register_clkdev(clk[ssi1_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[ssi2_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.1");
clk_register_clkdev(clk[sdhc1_ipg_gate], "sdhc1", NULL);
clk_register_clkdev(clk[sdhc2_ipg_gate], "sdhc2", NULL);
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index d20d479..c81864d 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -222,8 +222,10 @@ int __init mx25_clocks_init(void)
clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0");
clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0");
clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0");
- clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0");
- clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1");
+ clk_register_clkdev(clk[ssi1_ipg], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[ssi2_ipg], "ipg", "imx-ssi.1");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.1");
clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0");
clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0");
clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0");
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 3b6b640..8cbb6b5 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -236,8 +236,10 @@ int __init mx27_clocks_init(unsigned long fref)
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2");
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "mxc-ehci.2");
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2");
- clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
- clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
+ clk_register_clkdev(clk[ssi1_ipg_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[ssi2_ipg_gate], "ipg", "imx-ssi.1");
+ clk_register_clkdev(clk[per2_gate], "per", "imx-ssi.0");
+ clk_register_clkdev(clk[per2_gate], "per", "imx-ssi.1");
clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0");
clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0");
clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0");
@@ -262,8 +264,6 @@ int __init mx27_clocks_init(unsigned long fref)
clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);
clk_register_clkdev(clk[cpu_div], "cpu", NULL);
clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);
- clk_register_clkdev(clk[ssi1_baud_gate], "bitrate" , "imx-ssi.0");
- clk_register_clkdev(clk[ssi2_baud_gate], "bitrate" , "imx-ssi.1");
mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1);
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index 1253af2..61567dc 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -35,8 +35,8 @@ static const char *csi_sel[] = { "upll", "spll", };
static const char *fir_sel[] = { "mcu_main", "upll", "spll" };
enum mx31_clks {
- ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, per_div,
- per, csi, fir, csi_div, usb_div_pre, usb_div_post, fir_div_pre,
+ dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg,
+ per_div, per, csi, fir, csi_div, usb_div_pre, usb_div_post, fir_div_pre,
fir_div_post, sdhc1_gate, sdhc2_gate, gpt_gate, epit1_gate, epit2_gate,
iim_gate, ata_gate, sdma_gate, cspi3_gate, rng_gate, uart1_gate,
uart2_gate, ssi1_gate, i2c1_gate, i2c2_gate, i2c3_gate, hantro_gate,
@@ -53,6 +53,7 @@ int __init mx31_clocks_init(unsigned long fref)
void __iomem *base = MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR);
int i;
+ clk[dummy] = imx_clk_fixed("dummy", 0);
clk[ckih] = imx_clk_fixed("ckih", fref);
clk[ckil] = imx_clk_fixed("ckil", 32768);
clk[mpll] = imx_clk_pllv1("mpll", "ckih", base + MXC_CCM_MPCTL);
@@ -161,8 +162,10 @@ int __init mx31_clocks_init(unsigned long fref)
clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");
clk_register_clkdev(clk[sdhc1_gate], NULL, "mxc-mmc.0");
clk_register_clkdev(clk[sdhc2_gate], NULL, "mxc-mmc.1");
- clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
- clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
+ clk_register_clkdev(clk[ssi1_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[ssi2_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.1");
clk_register_clkdev(clk[firi_gate], "firi", NULL);
clk_register_clkdev(clk[ata_gate], NULL, "pata_imx");
clk_register_clkdev(clk[rtic_gate], "rtic", NULL);
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index 177259b..1ab7467 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -50,7 +50,7 @@ static const char *std_sel[] = {"ppll", "arm"};
static const char *ipg_per_sel[] = {"ahb_per_div", "arm_per_div"};
enum mx35_clks {
- ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, ipg,
+ dummy, ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, ipg,
arm_per_div, ahb_per_div, ipg_per, uart_sel, uart_div, esdhc_sel,
esdhc1_div, esdhc2_div, esdhc3_div, spdif_sel, spdif_div_pre,
spdif_div_post, ssi_sel, ssi1_div_pre, ssi1_div_post, ssi2_div_pre,
@@ -88,6 +88,7 @@ int __init mx35_clocks_init()
aad = &clk_consumer[0];
}
+ clk[dummy] = imx_clk_fixed("dummy", 0);
clk[ckih] = imx_clk_fixed("ckih", 24000000);
clk[mpll] = imx_clk_pllv1("mpll", "ckih", base + MX35_CCM_MPCTL);
clk[ppll] = imx_clk_pllv1("ppll", "ckih", base + MX35_CCM_PPCTL);
@@ -234,8 +235,11 @@ int __init mx35_clocks_init()
clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1");
clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
- clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
- clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
+ clk_register_clkdev(clk[ssi1_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[ssi2_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.1");
+
/* i.mx35 has the i.mx21 type uart */
clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0");
clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0");
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index a0bf848..46d679c 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -273,9 +273,12 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc");
clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc");
clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand");
- clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
- clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
- clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
+ clk_register_clkdev(clk[ssi1_ipg_gate], "ipg", "imx-ssi.0");
+ clk_register_clkdev(clk[ssi2_ipg_gate], "ipg", "imx-ssi.1");
+ clk_register_clkdev(clk[ssi3_ipg_gate], "ipg", "imx-ssi.2");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.0");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.1");
+ clk_register_clkdev(clk[dummy], "per", "imx-ssi.2");
clk_register_clkdev(clk[ssi_ext1_gate], "ssi_ext1", NULL);
clk_register_clkdev(clk[ssi_ext2_gate], "ssi_ext2", NULL);
clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
@@ -366,9 +369,13 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx51.3");
clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.3");
clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx51.3");
- clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "83fcc000.ssi");
- clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "70014000.ssi");
- clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "83fe8000.ssi");
+ clk_register_clkdev(clk[ssi1_ipg_gate], "ipg", "83fcc000.ssi");
+ clk_register_clkdev(clk[ssi2_ipg_gate], "ipg", "70014000.ssi");
+ clk_register_clkdev(clk[ssi3_ipg_gate], "ipg", "83fe8000.ssi");
+ clk_register_clkdev(clk[dummy], "per", "83fcc000.ssi");
+ clk_register_clkdev(clk[dummy], "per", "70014000.ssi");
+ clk_register_clkdev(clk[dummy], "per", "83fe8000.ssi");
+
clk_register_clkdev(clk[nfc_gate], NULL, "83fdb000.nand");
/* set the usboh3 parent to pll2_sw */
--
1.7.9.5
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