* [PATCH] ARM: dts: AM33XX: Add tsl2550 ambient light sensor DT data
From: AnilKumar, Chimata @ 2012-10-18 5:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1348242551-21293-1-git-send-email-anilkumar@ti.com>
On Fri, Sep 21, 2012 at 21:19:11, AnilKumar, Chimata wrote:
> Add tsl2550 ambient light sensor DT data to am335x-evm.dts. In AM335x
> EVM tsl2550 ambient light sensor is connected to I2C2 bus. So this patch
> adds child node inside i2c2 node with i2c slave address.
>
> TAOS tsl2550 sensor with two-wire SMBus serial interface. This patch
> also reduces I2C2 clock frequency to 100KHz from 400KHz because the
> maximum clock frequency of SMBus is 100KHz.
>
> Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
> ---
> arch/arm/boot/dts/am335x-evm.dts | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
> index 3b1f313..d99aa0f 100644
> --- a/arch/arm/boot/dts/am335x-evm.dts
> +++ b/arch/arm/boot/dts/am335x-evm.dts
> @@ -49,7 +49,7 @@
>
> i2c2: i2c at 4802a000 {
> status = "okay";
> - clock-frequency = <400000>;
> + clock-frequency = <100000>;
>
> lis331dlh: lis331dlh at 18 {
> compatible = "st,lis331dlh", "st,lis3lv02d";
> @@ -79,6 +79,11 @@
> st,max-limit-z = <750>;
> };
>
> + tsl2550: tsl2550 at 39 {
> + compatible = "taos,tsl2550";
> + reg = <0x39>;
> + };
> +
> tmp275: tmp275 at 48 {
> compatible = "ti,tmp275";
> reg = <0x48>;
Hi Tony/Benoit,
If there are no comments in this patch could you please take this in?
Thanks
AnilKumar
^ permalink raw reply
* [PATCH] dma: add new DMA control commands
From: Huang Shijie @ 2012-10-18 5:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Huang Shijie <shijie8@gmail.com>
[1] Why add these new DMA control commands?
In mx6q, the gpmi-nand driver is the only user of the APBH-DMA. The dma clock
is enabled when we have successfully requested a DMA channel. So even when
the gpmi-nand driver does not work, the dma clock(apbh-dma) still runs
in high speed (198MHz). To save some power, it is better to disable the dma
clock when the dma device, such as gpmi-nand, is not working anymore.
When the dma device becomes work again, enable the dma clock again.
[2] add new DMA control commands: DMA_START/DMA_END
DMA_START: do some preprations to start the DMA engine, such as enable the
necessary clocks.
DMA_END: do some works to end the DMA engine, such as disable the
necessary clocks.
[3] This patch does not change any logic in i2c-mxs driver and mxs-pcm driver.
But for gpmi-nand driver, we will enable the the clock only when we select
the nand chip, and want to do some real jobs with the nand chip.
For mxs-mmc driver, disable the dma clock in the suspend; and enable the
dma clock in the resume.
Signed-off-by: Huang Shijie <b32955@freescale.com>
---
drivers/dma/mxs-dma.c | 17 +++++++++++++++++
drivers/i2c/busses/i2c-mxs.c | 10 +++++++++-
drivers/mmc/host/mxs-mmc.c | 19 ++++++++++++++++---
drivers/mtd/nand/gpmi-nand/gpmi-lib.c | 10 ++++++++++
drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 10 ++++++----
include/linux/dmaengine.h | 6 ++++++
sound/soc/mxs/mxs-pcm.c | 12 ++++++++++++
7 files changed, 76 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c
index 9f02e79..89286f4 100644
--- a/drivers/dma/mxs-dma.c
+++ b/drivers/dma/mxs-dma.c
@@ -384,6 +384,8 @@ static int mxs_dma_alloc_chan_resources(struct dma_chan *chan)
/* the descriptor is ready */
async_tx_ack(&mxs_chan->desc);
+ clk_disable_unprepare(mxs_dma->clk);
+
return 0;
err_clk:
@@ -399,6 +401,14 @@ static void mxs_dma_free_chan_resources(struct dma_chan *chan)
{
struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan);
struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma;
+ int ret;
+
+ ret = clk_prepare_enable(mxs_dma->clk);
+ if (ret) {
+ dev_err(mxs_dma->dma_device.dev,
+ "failed in enabling the dma clock\n");
+ return;
+ }
mxs_dma_disable_chan(mxs_chan);
@@ -597,9 +607,13 @@ static int mxs_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
unsigned long arg)
{
struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan);
+ struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma;
int ret = 0;
switch (cmd) {
+ case DMA_START:
+ ret = clk_prepare_enable(mxs_dma->clk);
+ break;
case DMA_TERMINATE_ALL:
mxs_dma_reset_chan(mxs_chan);
mxs_dma_disable_chan(mxs_chan);
@@ -610,6 +624,9 @@ static int mxs_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
case DMA_RESUME:
mxs_dma_resume_chan(mxs_chan);
break;
+ case DMA_END:
+ clk_disable_unprepare(mxs_dma->clk);
+ break;
default:
ret = -ENOSYS;
}
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
index 1f58197..da1e881 100644
--- a/drivers/i2c/busses/i2c-mxs.c
+++ b/drivers/i2c/busses/i2c-mxs.c
@@ -643,6 +643,12 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev)
dev_err(dev, "Failed to request dma\n");
return -ENODEV;
}
+ err = dmaengine_device_control(i2c->dmach, DMA_START, 0);
+ if (err) {
+ dma_release_channel(i2c->dmach);
+ dev_err(dev, "Failed to start dma\n");
+ return err;
+ }
}
platform_set_drvdata(pdev, i2c);
@@ -680,8 +686,10 @@ static int __devexit mxs_i2c_remove(struct platform_device *pdev)
if (ret)
return -EBUSY;
- if (i2c->dmach)
+ if (i2c->dmach) {
+ dmaengine_device_control(i2c->dmach, DMA_END, 0);
dma_release_channel(i2c->dmach);
+ }
writel(MXS_I2C_CTRL0_SFTRST, i2c->regs + MXS_I2C_CTRL0_SET);
diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c
index 80d1e6d..aa91830 100644
--- a/drivers/mmc/host/mxs-mmc.c
+++ b/drivers/mmc/host/mxs-mmc.c
@@ -676,6 +676,9 @@ static int mxs_mmc_probe(struct platform_device *pdev)
"%s: failed to request dma\n", __func__);
goto out_clk_put;
}
+ ret = dmaengine_device_control(ssp->dmach, DMA_START, 0);
+ if (ret)
+ goto out_free_dma;
/* set mmc core parameters */
mmc->ops = &mxs_mmc_ops;
@@ -717,18 +720,20 @@ static int mxs_mmc_probe(struct platform_device *pdev)
ret = devm_request_irq(&pdev->dev, irq_err, mxs_mmc_irq_handler, 0,
DRIVER_NAME, host);
if (ret)
- goto out_free_dma;
+ goto out_end_free_dma;
spin_lock_init(&host->lock);
ret = mmc_add_host(mmc);
if (ret)
- goto out_free_dma;
+ goto out_end_free_dma;
dev_info(mmc_dev(host->mmc), "initialized\n");
return 0;
+out_end_free_dma:
+ dmaengine_device_control(ssp->dmach, DMA_END, 0);
out_free_dma:
if (ssp->dmach)
dma_release_channel(ssp->dmach);
@@ -750,8 +755,10 @@ static int mxs_mmc_remove(struct platform_device *pdev)
platform_set_drvdata(pdev, NULL);
- if (ssp->dmach)
+ if (ssp->dmach) {
+ dmaengine_device_control(ssp->dmach, DMA_END, 0);
dma_release_channel(ssp->dmach);
+ }
clk_disable_unprepare(ssp->clk);
clk_put(ssp->clk);
@@ -772,6 +779,7 @@ static int mxs_mmc_suspend(struct device *dev)
ret = mmc_suspend_host(mmc);
clk_disable_unprepare(ssp->clk);
+ dmaengine_device_control(ssp->dmach, DMA_END, 0);
return ret;
}
@@ -784,8 +792,13 @@ static int mxs_mmc_resume(struct device *dev)
int ret = 0;
clk_prepare_enable(ssp->clk);
+ ret = dmaengine_device_control(ssp->dmach, DMA_START, 0);
+ if (ret)
+ return ret;
ret = mmc_resume_host(mmc);
+ if (ret)
+ dmaengine_device_control(ssp->dmach, DMA_END, 0);
return ret;
}
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
index 3502acc..20ed3f3 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
@@ -958,6 +958,7 @@ void gpmi_begin(struct gpmi_nand_data *this)
uint32_t reg;
unsigned int dll_wait_time_in_us;
struct gpmi_nfc_hardware_timing hw;
+ struct dma_chan *channel = get_dma_chan(this);
int ret;
/* Enable the clock. */
@@ -967,6 +968,12 @@ void gpmi_begin(struct gpmi_nand_data *this)
goto err_out;
}
+ ret = dmaengine_device_control(channel, DMA_START, 0);
+ if (ret) {
+ gpmi_disable_clk(this);
+ goto err_out;
+ }
+
/* Only initialize the timing once */
if (this->flags & GPMI_TIMING_INIT_OK)
return;
@@ -1035,7 +1042,10 @@ err_out:
void gpmi_end(struct gpmi_nand_data *this)
{
+ struct dma_chan *channel = get_dma_chan(this);
+
gpmi_disable_clk(this);
+ dmaengine_device_control(channel, DMA_END, 0);
}
/* Clears a BCH interrupt. */
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
index e2c56fc..5694d03 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
@@ -815,12 +815,14 @@ static void gpmi_select_chip(struct mtd_info *mtd, int chipnr)
struct nand_chip *chip = mtd->priv;
struct gpmi_nand_data *this = chip->priv;
- if ((this->current_chip < 0) && (chipnr >= 0))
+ if ((this->current_chip < 0) && (chipnr >= 0)) {
+ /* set the current_chip before we call gpmi_begin(). */
+ this->current_chip = chipnr;
gpmi_begin(this);
- else if ((this->current_chip >= 0) && (chipnr < 0))
+ } else if ((this->current_chip >= 0) && (chipnr < 0)) {
gpmi_end(this);
-
- this->current_chip = chipnr;
+ this->current_chip = chipnr;
+ }
}
static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index d3201e4..79f864a 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -199,6 +199,8 @@ enum dma_ctrl_flags {
/**
* enum dma_ctrl_cmd - DMA operations that can optionally be exercised
* on a running channel.
+ * @DMA_START: do some preprations to start the DMA engine, such as enable the
+ * necessary clocks.
* @DMA_TERMINATE_ALL: terminate all ongoing transfers
* @DMA_PAUSE: pause ongoing transfers
* @DMA_RESUME: resume paused transfer
@@ -209,13 +211,17 @@ enum dma_ctrl_flags {
* command.
* @FSLDMA_EXTERNAL_START: this command will put the Freescale DMA controller
* into external start mode.
+ * @DMA_END: do some works to end the DMA engine, such as disable the
+ * necessary clocks.
*/
enum dma_ctrl_cmd {
+ DMA_START,
DMA_TERMINATE_ALL,
DMA_PAUSE,
DMA_RESUME,
DMA_SLAVE_CONFIG,
FSLDMA_EXTERNAL_START,
+ DMA_END,
};
/**
diff --git a/sound/soc/mxs/mxs-pcm.c b/sound/soc/mxs/mxs-pcm.c
index f82d766..cfcc30f 100644
--- a/sound/soc/mxs/mxs-pcm.c
+++ b/sound/soc/mxs/mxs-pcm.c
@@ -92,6 +92,7 @@ static int snd_mxs_open(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct mxs_pcm_dma_data *pcm_dma_data;
+ struct dma_chan *chan;
int ret;
pcm_dma_data = kzalloc(sizeof(*pcm_dma_data), GFP_KERNEL);
@@ -107,6 +108,14 @@ static int snd_mxs_open(struct snd_pcm_substream *substream)
return ret;
}
+ chan = snd_dmaengine_pcm_get_chan(substream);
+ ret = dmaengine_device_control(chan, DMA_START, (unsigned long)0);
+ if (ret) {
+ snd_dmaengine_pcm_close(substream);
+ kfree(pcm_dma_data);
+ return ret;
+ }
+
snd_soc_set_runtime_hwparams(substream, &snd_mxs_hardware);
snd_dmaengine_pcm_set_data(substream, pcm_dma_data);
@@ -117,7 +126,10 @@ static int snd_mxs_open(struct snd_pcm_substream *substream)
static int snd_mxs_close(struct snd_pcm_substream *substream)
{
struct mxs_pcm_dma_data *pcm_dma_data = snd_dmaengine_pcm_get_data(substream);
+ struct dma_chan *chan;
+ chan = snd_dmaengine_pcm_get_chan(substream);
+ dmaengine_device_control(chan, DMA_END, 0);
snd_dmaengine_pcm_close(substream);
kfree(pcm_dma_data);
--
1.7.0.4
^ permalink raw reply related
* discrepancy while save and restore of debounce registers
From: Hebbar, Gururaja @ 2012-10-18 5:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <507F1F21.8040206@ti.com>
Jon,
On Thu, Oct 18, 2012 at 02:42:01, Hunter, Jon wrote:
> Hi Gururaja,
>
> On 10/17/2012 01:13 AM, Hebbar, Gururaja wrote:
> > Hi,
> >
> > I came across a peculiar issue while updating GPIO debounce registers on
> > OMAP platform.
> >
> > According to mainline commit ae547354a8ed59f19b57f7e1de9c7816edfc3537
> >
> > gpio/omap: save and restore debounce registers
> >
> > GPIO debounce registers need to be saved and restored for proper functioning
> > of driver.
> >
> > ...
> > @@ -1363,6 +1369,12 @@ static void omap_gpio_restore_context(struct gpio_bank *bank)
> > __raw_writel(bank->context.fallingdetect,
> > bank->base + bank->regs->fallingdetect);
> > __raw_writel(bank->context.dataout, bank->base + bank->regs->dataout);
> > + if (bank->dbck_enable_mask) {
> > + __raw_writel(bank->context.debounce, bank->base +
> > + bank->regs->debounce);
> > + __raw_writel(bank->context.debounce_en,
> > + bank->base + bank->regs->debounce_en);
> > + }
> > }
> >
> >
> > Due to copy/paste of this commit into my local tree, I missed the check for
> > bank->dbck_enable_mask, and directly restored the saved value from context.
> >
> > After this, I saw random crashes when accessing different registers (sometimes
> > its OE register and sometime its DATAOUT register).
> >
> > These crashes were seen across 2nd and subsequent suspend/resume.
> >
> > My doubt/questions are
> > 1. Why should debounce registers be updated only when it's accessed previously?
>
> If debounce is not being used by any of the gpios, then there is no need
> to restore them as there are no bits set. So this makes sense and saves
> a couple register writes.
What I want to know is that other than saving register writes, is there any
other important stuff that specifies this requirement.
>
> > 2. What is the relation between updating debounce registers and crash seen on
> > others registers?
>
> This I am not sure about. I gave this a quick try on my omap3430 beagle
> board, but I did not see any side-effects from doing this. However, if
> you are always restoring the debounce context regardless of whether
> debounce is being used, then you could be writing bad values to the
> debounce registers as the context variables bank->context.debouce and
> bank->context.debouce_en may not initialised. So that is bad. However,
> that said I am still not sure how this could cause a crash.
>
> Can you share more details on ...
Sorry for missing below details in first post.
> 1. The OMAP platform you are using?
I was trying this on TI AM335x platform (repo below). On AM335x EVM board
http://arago-project.org/git/projects/?p=linux-am33x.git;a=shortlog;
h=refs/heads/v3.2-staging
> 2. What linux distro/environment you are using?
Arago AM335x PSP release (linux 3.2 + am335x patch-set)
> 3. If there are any specific steps to reproduce this 100% of the time?
On top of this tree, try suspend/resume using "echo mem > /syspower/state"
>
> Cheers
> Jon
>
Regards,
Gururaja
^ permalink raw reply
* [PATCH v2] ARM: mxs: Add support for the Armadeus Systems APF28 module
From: Shawn Guo @ 2012-10-18 5:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350492832-7044-1-git-send-email-julien.boibessot@free.fr>
On Wed, Oct 17, 2012 at 06:53:52PM +0200, julien.boibessot at free.fr wrote:
> From: Julien Boibessot <julien.boibessot@armadeus.com>
>
> The APF28 is a small SOM built around an i.MX28 processor with 128MBytes DDR2,
> 256MBytes NAND Flash and an Ethernet PHY.
>
> Signed-off-by: Julien Boibessot <julien.boibessot@armadeus.com>
> Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
> ---
> Changes since v1 (as advised by Shawn Guo):
> * add imx28-apf28.dtb to arch/arm/boot/dts/Makefile
> * fix partitions declaration for gpmi-nand in imx28-apf28.dts
>
> arch/arm/boot/dts/Makefile | 3 +-
> arch/arm/boot/dts/imx28-apf28.dts | 85 +++++++++++++++++++++++++++++++++++++
> arch/arm/mach-mxs/mach-mxs.c | 7 +++
> 3 files changed, 94 insertions(+), 1 deletions(-)
> create mode 100644 arch/arm/boot/dts/imx28-apf28.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index c1ce813..5baf5a0 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -59,7 +59,8 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
> imx28-cfa10049.dtb \
> imx28-evk.dtb \
> imx28-m28evk.dtb \
> - imx28-tx28.dtb
> + imx28-tx28.dtb \
> + imx28-apf28.dtb
Please maintain the alphabet order on the list.
Shawn
> dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
> omap3-beagle-xm.dtb \
> omap3-evm.dtb \
> diff --git a/arch/arm/boot/dts/imx28-apf28.dts b/arch/arm/boot/dts/imx28-apf28.dts
> new file mode 100644
> index 0000000..7eb0758
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx28-apf28.dts
> @@ -0,0 +1,85 @@
> +/*
> + * Copyright 2012 Armadeus Systems - <support@armadeus.com>
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +/dts-v1/;
> +/include/ "imx28.dtsi"
> +
> +/ {
> + model = "Armadeus Systems APF28 module";
> + compatible = "armadeus,imx28-apf28", "fsl,imx28";
> +
> + memory {
> + reg = <0x40000000 0x08000000>;
> + };
> +
> + apb at 80000000 {
> + apbh at 80000000 {
> + gpmi-nand at 8000c000 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
> + status = "okay";
> +
> + partition at 0 {
> + label = "u-boot";
> + reg = <0x0 0x300000>;
> + };
> +
> + partition at 300000 {
> + label = "env";
> + reg = <0x300000 0x80000>;
> + };
> +
> + partition at 380000 {
> + label = "env2";
> + reg = <0x380000 0x80000>;
> + };
> +
> + partition at 400000 {
> + label = "dtb";
> + reg = <0x400000 0x80000>;
> + };
> +
> + partition at 480000 {
> + label = "splash";
> + reg = <0x480000 0x80000>;
> + };
> +
> + partition at 500000 {
> + label = "kernel";
> + reg = <0x500000 0x800000>;
> + };
> +
> + partition at d00000 {
> + label = "rootfs";
> + reg = <0xd00000 0xf300000>;
> + };
> + };
> + };
> +
> + apbx at 80040000 {
> + duart: serial at 80074000 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&duart_pins_a>;
> + status = "okay";
> + };
> + };
> + };
> +
> + ahb at 80080000 {
> + mac0: ethernet at 800f0000 {
> + phy-mode = "rmii";
> + pinctrl-names = "default";
> + pinctrl-0 = <&mac0_pins_a>;
> + phy-reset-gpios = <&gpio4 13 0>;
> + status = "okay";
> + };
> + };
> +};
> diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
> index b8c452a..9cfb25c 100644
> --- a/arch/arm/mach-mxs/mach-mxs.c
> +++ b/arch/arm/mach-mxs/mach-mxs.c
> @@ -367,6 +367,11 @@ static void __init cfa10049_init(void)
> update_fec_mac_prop(OUI_CRYSTALFONTZ);
> }
>
> +static void __init apf28_init(void)
> +{
> + enable_clk_enet_out();
> +}
> +
> static void __init mxs_machine_init(void)
> {
> if (of_machine_is_compatible("fsl,imx28-evk"))
> @@ -379,6 +384,8 @@ static void __init mxs_machine_init(void)
> apx4devkit_init();
> else if (of_machine_is_compatible("crystalfontz,cfa10049"))
> cfa10049_init();
> + else if (of_machine_is_compatible("armadeus,imx28-apf28"))
> + apf28_init();
>
> of_platform_populate(NULL, of_default_bus_match_table,
> mxs_auxdata_lookup, NULL);
> --
> 1.7.5.4
>
^ permalink raw reply
* [PATCH 0/4] OMAP-GPMC generic timing migration
From: Afzal Mohammed @ 2012-10-18 5:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <507ECB31.8030006@gmail.com>
Hi Daniel,
On Wednesday 17 October 2012 08:43 PM, Daniel Mack wrote:
> On 17.10.2012 07:42, Afzal Mohammed wrote:
>> I doubt whether auxdata would help here, it seems using
>> compatible field alone would help in deciding relevant
>> custom timing routine. Whether we want this kind of
>> peripheral knowledge in gpmc driver instead of using
>> generic timing routine has to be decided though.
> Another thing that might be worth thinking about is that apart from the
> GPMC host controller and the peripherals, there could be other
> components like level shifters or series resistors on the board that
> limit the maximum speed of transactions. So in fact we might be better
> off storing all that timing details in the DT, as they are in fact
> highly application specific.
Yes, making it future proof for these kind of scenarios was one
of the reason's that initially triggered generic timing path.
Regards
Afzal
^ permalink raw reply
* OMAP baseline test results for v3.7-rc1
From: Paul Walmsley @ 2012-10-18 5:20 UTC (permalink / raw)
To: linux-arm-kernel
Here are some basic OMAP test results for Linux v3.7-rc1.
Logs and other details at http://www.pwsan.com/omap/testlogs/test_v3.7-rc1/
Changes from previous tests
---------------------------
Kernel configs have been reorganized and updated. AM335x Beaglebone and
OMAP4460 Pandaboard-ES boards have been added to the testbed.
Passing tests
-------------
Boot to userspace: 3517evm, 3530es3beagle, 3730beaglexm, 37xxevm,
4430es2panda, 5912osk, am335xbone
PM ret/off, suspend + dynamic idle: (none)
Failing tests: fixed by posted patches
--------------------------------------
Boot tests:
* 2430sdp: vfp_reload_hw oops during MMC initialization
- Kernel attempts to save FP registers that don't exist; fix posted:
- http://www.spinics.net/lists/arm-kernel/msg200646.html
Other:
* 2420N800: powers down 30 seconds after boot
- Presumably due to missing CBUS patches for watchdog control
- http://lkml.org/lkml/2012/9/3/265
Failing tests: needing investigation
------------------------------------
Boot tests:
* 2420n800: boot hangs during UART initialization
- http://lkml.org/lkml/2012/9/11/454
- Various attempts at fixes posted; etiology known; issue still unresolved
* CM-T3517: L3 in-band error with IPSS during boot
- Cause unknown but see http://marc.info/?l=linux-omap&m=134833869730129&w=2
- Longstanding issue; does not occur on the 3517EVM
* 3517EVM & CM-T3517: boot hangs with NFS root
- Likely some Kconfig, board file, and PM issues with EMAC
* CM-T3517: boot hangs with MMC boot
- Due to missing MMC setup in board file
PM tests:
* 3530es3beagle, 37xxevm, 3730beaglexm: I2C fails during resume from suspend
- Causes MMC to become unusable since regulators are not reenabled
- Can be worked around by reverting the I2C driver conversion to
threaded IRQs:
- http://marc.info/?l=linux-i2c&m=135026587102887&w=2
- Appears to be due to an accounting problem; under discussion:
- http://marc.info/?l=linux-arm-kernel&m=135042360725821&w=2
* 3530es3beagle: hangs during off-mode dynamic idle test
- Unknown cause; not investigated
* 37xx EVM: CORE not entering dynamic off-idle
- Cause unknown; dynamic retention-idle seems to work; system suspend to
off works
* 3730 Beagle XM: does not serial wake from off-idle suspend when console
UART doesn't clock gate ("debug ignore_loglevel")
- Not shown in the current test logs; cause unknown
Kernel size/memory differences
------------------------------
vmlinux object size
(delta in bytes from test_v3.6 (a0d271cbfed1dd50278c6b06bead3d00ba0a88f9)):
text data bss total kernel
+118682 -66688 +2280 +54274 am33xx_only
+57789 -88928 +2148 -28991 n800_multi_omap2xxx
+58669 -86432 +2180 -25583 n800_only_a
+54196 +4616 -136 +58676 omap1_defconfig
+53420 +3096 -104 +56412 omap1_defconfig_1510innovator_only
+54384 +3112 -168 +57328 omap1_defconfig_5912osk_only
+128332 -67728 +2144 +62748 omap2plus_defconfig
+106894 -83664 +1992 +25222 omap2plus_defconfig_2430sdp_only
+128296 -67744 +2080 +62632 omap2plus_defconfig_cpupm
+130151 -67552 +1824 +64423 omap2plus_defconfig_no_pm
+107810 -88848 +1952 +20914 omap2plus_defconfig_omap2_4_only
+107293 -88232 +2016 +21077 omap2plus_defconfig_omap3_4_only
+113921 -66976 +2348 +49293 rmk_omap3430_ldp_oldconfig
+106849 -47216 +2760 +62393 rmk_omap4430_sdp_oldconfig
Boot-time memory difference
(delta in bytes from test_v3.6 (a0d271cbfed1dd50278c6b06bead3d00ba0a88f9))
avail rsrvd high freed board kconfig
20k -20k . -152k 2420n800 omap2plus_defconfig
-60k 60k . 4k 2430sdp omap2plus_defconfig
-60k 60k . 4k 3517evm omap2plus_defconfig
-60k 60k . 4k 3530es3beagle omap2plus_defconfig
-60k 60k . 4k 3730beaglexm omap2plus_defconfig
-60k 60k . 4k 37xxevm omap2plus_defconfig
-60k 60k . 4k 4430es2panda omap2plus_defconfig
-52k 52k . . 5912osk omap2plus_defconfig
-60k 60k . . cmt3517 omap2plus_defconfig
- Paul
^ permalink raw reply
* [Celinux-dev] PDF documentation
From: Geert Uytterhoeven @ 2012-10-18 5:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121017222955.GQ21164@n2100.arm.linux.org.uk>
On Thu, Oct 18, 2012 at 12:29 AM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> Consider also, from their point of view, the issue of documentation
> control. Notice that most companies don't provide download links for
> old documentation...
Yep. That's why I archive all datasheets I can get my hands on. They will
disappear from the web.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH v2] ARM: mach-imx: Let ARCH_MXC select HAVE_IMX_SRC
From: Shawn Guo @ 2012-10-18 5:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350484056-13437-1-git-send-email-festevam@gmail.com>
On Wed, Oct 17, 2012 at 11:27:36AM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> Since commit c5a0d497(ARM: imx: enable multi-platform build),
> ARCH_MXC is selected by the following logic:
>
> config ARCH_MXC
> def_bool y if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
>
> As vexpress_defconfig selects ARCH_MULTI_V6_V7, this leads to the following
> build error when building for vexpress_defconfig:
>
> arch/arm/mach-imx/hotplug.c:49: undefined reference to `imx_enable_cpu'
> arch/arm/mach-imx/platsmp.c:57: undefined reference to `imx_set_cpu_jump'
> arch/arm/mach-imx/platsmp.c:58: undefined reference to `imx_enable_cpu'
>
> These missing functions are provided by arch/arm/mach-imx/src.c, which is
> selected via HAVE_IMX_SRC.
>
> Currently only SOC_IMX6Q selects HAVE_IMX_SRC, so let ARCH_MXC select it and fix
> the build error.
>
I think the right fix is to make ARCH_MXC user selectable, just like
what vexpress does. I would fix the problem like below.
Shawn
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index e1f78f5..b732208 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,5 +1,5 @@
config ARCH_MXC
- def_bool y if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
+ bool "Freescale i.MX family" if ARCH_MULTI_V7
select AUTO_ZRELADDR if !ZBOOT_ROM
select ARM_PATCH_PHYS_VIRT
select GENERIC_CLOCKEVENTS
@@ -13,7 +13,7 @@ config ARCH_MXC
help
Support for Freescale MXC/iMX-based family of processors
-menu "Freescale i.MX support"
+menu "i.MX platform support"
depends on ARCH_MXC
config MXC_IRQ_PRIOR
^ permalink raw reply related
* [PATCH RFC 2/6 v3] gpio: Add sysfs support to block GPIO API
From: Daniel Glöckner @ 2012-10-18 4:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdZmg4+7Zjm2UJktt1uKvytUW3uaYtKz0nJvLeM2MMSV-Q@mail.gmail.com>
Hi,
sorry for the late reply. I'm currently on vacation and it is no fun to
use SSH with a 1s latency while Entel Chile injects RST/ACK packets.
I'll read the remaining related mails that have accumulated in my inbox
when I'm back home.
On Mon, Oct 15, 2012 at 10:30:15PM +0200, Linus Walleij wrote:
> Another patch that is circulating concerns edge triggers and similar,
> and it appear that some parts of the GPIO sysfs is for example
> redefining and exporting IRQchip properties like trigger edge
> in sysfs, while the settings of the irqchip actually used by the driver
> is not reflected in the other direction. So you can *set* these things
> by writing in the GPIO sysfs, but never trust what you *read* from
> there. And you can set what edges an IRQ will trigger on a certain
> GPIO, and the way to handle the IRQs from usespace is to poll
> on a value. This is not really documented but well ...
Part of this sounds like you are not familiar with the GPIOlib sysfs
IRQ stuff. The trigger edge set in sysfs is only used when userspace
polls the GPIO via sysfs. Drivers that want to register a gpio IRQ
should IMHO always explicitly request the edge/level to trigger on and
they should request the gpio beforehand. This prevents the gpio from
being exported to userspace. Only IRQ triggers accepted by the irq chip
are settable in sysfs, so you can trust the value read from that file.
> Sadly the main creator of this ABI is David Brownell who is
> not able to respond nor maintain it from where he is now. But
> we need to think hard about what we shall do with this particular
> piece of legacy. Some of the stuff was added by Daniel
> Gl?ckner so requesting advice from him.
I'm only guilty of adding the IRQ sysfs interface.
> Daniel: are you interested in helping us fixing the GPIOlib
> sysfs ABI and kernel internals? I'm a bit afraid of it.
Actually I don't know what you want to change to fix the existing sysfs
ABI. Personally I'd like to see the following things changed:
- /sys/gpio/.../direction does not correspond to hardware before first
use of gpio_direction_* due to lack of gpio_get_direction.
- Names given to gpios by the chip should just result in symlinks to
the usual gpioX directories or (un)exporting of gpios should accept
names.
Best regards,
Daniel
^ permalink raw reply
* [PATCH 00/11] mtd/nand: fsmc driver updates
From: Vipin Kumar @ 2012-10-18 4:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350478116.5769.150.camel@sauron.fi.intel.com>
On 10/17/2012 6:18 PM, Artem Bityutskiy wrote:
> On Tue, 2012-10-09 at 16:14 +0530, Vipin Kumar wrote:
>> This patch-set contains several fixes and a few enhancements in fsmc driver.
>> Modifications include
>
> OK, picked some patches from your series, some do not apply. Please,
> send v2 against the l2-mtd.git tree:
>
> git://git.infradead.org/users/dedekind/l2-mtd.git
>
Sure, I would do that soon. Thanks
-Vipin
^ permalink raw reply
* [PATCH 2/6] ARM: OMAP3/4: iommu: adapt to runtime pm
From: Felipe Contreras @ 2012-10-18 4:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CALLhW=5W2Tkv0sHhsabV9d4hFqQw57f=55HvcPBfAoG1eqLrqA@mail.gmail.com>
On Thu, Oct 18, 2012 at 1:51 AM, Omar Ramirez Luna <omar.luna@linaro.org> wrote:
> On 15 October 2012 22:23, Felipe Contreras <felipe.contreras@gmail.com> wrote:
>>> On probe this patch does pm_runtime_enable, however this doesn't mean
>>> the device is turned ON or resumed or kept ON all the time.
>>
>> In fact it's the other way around; pm_runtime_enable turns off the
>> power (if it's ON).
>
> pm_runtime_enable just decrements the disable_depth counter. Doesn't
> turn off anything by itself.
pm_runtime_enable turns on power management, without it the device
remains in whatever state it booted.
>> device_del
>> device_pm_remove
>> pm_runtime_remove
>> __pm_runtime_disable <- HERE
>
> I'm not entirely convinced _iommu_ follows this path, it doesn't
> create any devices nor register them... whereas mailbox does create
> devices and mailbox does follow this path for the devices created
> which are child devices.
>
> So this path won't take care of the omap-iommu device pm_runtime_disable.
Are you sure? What code-path calls omap_iommu_remove then?
Anyway, it was just an observation. I've seen other code do this.
--
Felipe Contreras
^ permalink raw reply
* Fwd: [PATCH 2/5] ARM: OMAP3+: hwmod: Add AM33XX HWMOD data for davinci_mdio
From: Paul Walmsley @ 2012-10-18 3:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121018030654.GE2867@netboy.at.omicron.at>
On Thu, 18 Oct 2012, Richard Cochran wrote:
> So there has been this cpsw driver since v3.4-rc1~177^2~5
>
> df82859 netdev: driver: ethernet: Add TI CPSW driver
>
> and four people signed off on it, so it must have been working at one
> point.
The signoffs just mean that those people are asserting that the code is
covered under an appropriate license, or are passing it on through the
maintainer hierarchy. See
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=Documentation/SubmittingPatches;h=c379a2a6949f1c1cac04fb6f185c633512f37061;hb=HEAD#l298
It doesn't necessarily mean that the driver is usable in that kernel
release.
> Since the device tree make-over, the driver is a derelict, and thus the
> present patch is fixing a regression.
Probably the driver was submitted before any SoC integration support was
available. Grepping for 'cpsw' under arch/ turns up only AM33xx. AM335x
didn't have device enumeration support in the mainline kernel until 3.7,
via commit a2cfc509bc4eeef9f5c4607b1203f17f22ea2a36 ("ARM: OMAP3+: hwmod:
Add AM33XX HWMOD data"). So I don't see how it could have worked with
mainline.
> I just want the already merged driver to work with the vanilla
> kernel. Is that too much to ask?
It's a very reasonable wish and your patches are certainly appreciated.
But it seems that the CPSW has never worked in the mainline kernel. So
this particular patch is not fixing a regression. Therefore we shouldn't
send it upstream during the -rc time period. Instead we'll schedule it to
be sent a few weeks later, during the 3.8 merge window.
Either way, the patch is likely to make it into the mainline kernel.
It's just that it will probably take a few weeks longer than you might
like.
- Paul
^ permalink raw reply
* [PATCHv1] arm:socfpga: Enable SMP for socfpga
From: Dinh Nguyen @ 2012-10-18 3:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <507F01FD.6070403@gmail.com>
Hi Rob,
On Wed, Oct 17, 2012 at 2:07 PM, Rob Herring <robherring2@gmail.com> wrote:
>
> On 10/17/2012 02:18 PM, dinguyen at altera.com wrote:
> > From: Dinh Nguyen <dinguyen@altera.com>
> >
> > Enable SMP for the SOCFPGA platform.
> >
> > Signed-off-by: Pavel Machek <pavel@denx.de>
> > Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
> > ---
> > arch/arm/boot/dts/socfpga.dtsi | 10 ++
> > arch/arm/configs/socfpga_defconfig | 9 +-
>
> Does the multi_v7_defconfig not work for you?
It does. Are you planning to remove the defconfigs the platforms that
are part of
multi_v7_defconfig soon? socfpga_defconfig is broken with SMP enabled because
it needs +# CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set.
>
> > arch/arm/mach-socfpga/Kconfig | 1 +
> > arch/arm/mach-socfpga/Makefile | 3 +
> > arch/arm/mach-socfpga/headsmp.S | 64 +++++++++++
> > arch/arm/mach-socfpga/include/mach/core.h | 33 ++++++
>
> Move core.h to mach-socfpga.
Will do.
>
> > arch/arm/mach-socfpga/platsmp.c | 166
> > +++++++++++++++++++++++++++++
> > arch/arm/mach-socfpga/socfpga.c | 33 +++++-
> > 8 files changed, 315 insertions(+), 4 deletions(-)
> > create mode 100644 arch/arm/mach-socfpga/headsmp.S
> > create mode 100644 arch/arm/mach-socfpga/include/mach/core.h
> > create mode 100644 arch/arm/mach-socfpga/platsmp.c
> >
> > diff --git a/arch/arm/boot/dts/socfpga.dtsi
> > b/arch/arm/boot/dts/socfpga.dtsi
> > index 0772f57..19aec42 100644
> > --- a/arch/arm/boot/dts/socfpga.dtsi
> > +++ b/arch/arm/boot/dts/socfpga.dtsi
> > @@ -143,5 +143,15 @@
> > reg-shift = <2>;
> > reg-io-width = <4>;
> > };
> > +
> > + rstmgr at ffd05000 {
> > + compatible = "altr,rst-mgr";
> > + reg = <0xffd05000 0x1000>;
> > + };
> > +
> > + sysmgr at ffd08000 {
> > + compatible = "altr,sys-mgr";
> > + reg = <0xffd08000 0x4000>;
> > + };
>
> Bindings need documentation.
Will add..
>
> > };
> > };
> > diff --git a/arch/arm/configs/socfpga_defconfig
> > b/arch/arm/configs/socfpga_defconfig
> > index 0ac1293..349ac22 100644
> > --- a/arch/arm/configs/socfpga_defconfig
> > +++ b/arch/arm/configs/socfpga_defconfig
> > @@ -1,5 +1,5 @@
> > CONFIG_EXPERIMENTAL=y
> > -CONFIG_SYSVIPC=y
> > +CONFIG_NO_HZ=y
> > CONFIG_IKCONFIG=y
> > CONFIG_IKCONFIG_PROC=y
> > CONFIG_LOG_BUF_SHIFT=14
> > @@ -16,10 +16,13 @@ CONFIG_MODULE_UNLOAD=y
> > # CONFIG_IOSCHED_DEADLINE is not set
> > # CONFIG_IOSCHED_CFQ is not set
> > CONFIG_ARCH_SOCFPGA=y
> > -CONFIG_MACH_SOCFPGA_CYCLONE5=y
> > -CONFIG_ARM_THUMBEE=y
> > +# CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set
> > # CONFIG_CACHE_L2X0 is not set
> > CONFIG_HIGH_RES_TIMERS=y
> > +CONFIG_SMP=y
> > +CONFIG_ARM_ARCH_TIMER=y
> > +CONFIG_HIGHMEM=y
> > +CONFIG_HIGHPTE=y
> > CONFIG_VMSPLIT_2G=y
> > CONFIG_NR_CPUS=2
> > CONFIG_AEABI=y
> > diff --git a/arch/arm/mach-socfpga/Kconfig
> > b/arch/arm/mach-socfpga/Kconfig
> > index 803a328..566e804 100644
> > --- a/arch/arm/mach-socfpga/Kconfig
> > +++ b/arch/arm/mach-socfpga/Kconfig
> > @@ -12,5 +12,6 @@ config ARCH_SOCFPGA
> > select GENERIC_CLOCKEVENTS
> > select GPIO_PL061 if GPIOLIB
> > select HAVE_ARM_SCU
> > + select HAVE_SMP
> > select SPARSE_IRQ
> > select USE_OF
> > diff --git a/arch/arm/mach-socfpga/Makefile
> > b/arch/arm/mach-socfpga/Makefile
> > index 4fb9324..61b1266 100644
> > --- a/arch/arm/mach-socfpga/Makefile
> > +++ b/arch/arm/mach-socfpga/Makefile
> > @@ -2,4 +2,7 @@
> > # Makefile for the linux kernel.
> > #
> >
> > +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
> > +
>
> This can be removed if core.h is moved.
>
> > obj-y := socfpga.o
> > +obj-$(CONFIG_SMP) += headsmp.o platsmp.o
> > diff --git a/arch/arm/mach-socfpga/headsmp.S
> > b/arch/arm/mach-socfpga/headsmp.S
> > new file mode 100644
> > index 0000000..b3a24db
> > --- /dev/null
> > +++ b/arch/arm/mach-socfpga/headsmp.S
> > @@ -0,0 +1,64 @@
> > +/*
> > + * Copyright (c) 2003 ARM Limited
> > + * Copyright (c) u-boot contributors
> > + * Copyright (c) 2012 Pavel Machek <pavel@denx.de>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + */
> > +#include <linux/linkage.h>
> > +#include <linux/init.h>
> > +
> > + __INIT
> > +
> > +#define CPU1_START_ADDR 0xffd08010
> > +
> > +ENTRY(secondary_trampoline)
>
> This appears to be your reset code at phys addr 0. How does core 0 boot
> if you are copying this to 0?
>
> > + /* From u-boot: start.S */
> > + mrs r0, cpsr
> > + bic r0, r0, #0x1f
> > + orr r0, r0, #0xd3
> > + msr cpsr,r0
> > +
> >
> > +/*************************************************************************
> > + *
> > + * cpu_init_cp15
> > + ** Copyright (c) u-boot contributors
> > + * Setup CP15 registers (cache, MMU, TLBs). The I-cache is turned on
> > unless
> > + * CONFIG_SYS_ICACHE_OFF is defined.
> > + *
> > +
> > *************************************************************************/
> > +ENTRY(cpu_init_cp15)
> > + /*
> > + * Invalidate L1 I/D
> > + */
> > + mov r0, #0 @ set up for MCR
> > + mcr p15, 0, r0, c8, c7, 0 @ invalidate TLBs
> > + mcr p15, 0, r0, c7, c5, 0 @ invalidate icache
> > + mcr p15, 0, r0, c7, c5, 6 @ invalidate BP array
> > + mcr p15, 0, r0, c7, c10, 4 @ DSB
> > + mcr p15, 0, r0, c7, c5, 4 @ ISB
> > +
> > + /*
> > + * disable MMU stuff and caches
> > + */
> > + mrc p15, 0, r0, c1, c0, 0
> > + bic r0, r0, #0x00002000 @ clear bits 13 (--V-)
> > + bic r0, r0, #0x00000007 @ clear bits 2:0 (-CAM)
> > + orr r0, r0, #0x00000002 @ set bit 1 (--A-) Align
> > + orr r0, r0, #0x00000800 @ set bit 11 (Z---) BTB
> > + orr r0, r0, #0x00001000 @ set bit 12 (I) I-cache
>
> All this should get done by v7_setup.
>
> > + mcr p15, 0, r0, c1, c0, 0
> > +
> > + movw r0, #:lower16:CPU1_START_ADDR
> > + movt r0, #:upper16:CPU1_START_ADDR
> > +
> > + ldr r1, [r0]
> > + bx r1
> > +
> > +ENTRY(secondary_trampoline_end)
> > +
> > + .align
> > + .long pen_release
> > +
> > diff --git a/arch/arm/mach-socfpga/include/mach/core.h
> > b/arch/arm/mach-socfpga/include/mach/core.h
> > new file mode 100644
> > index 0000000..74a4949
> > --- /dev/null
> > +++ b/arch/arm/mach-socfpga/include/mach/core.h
> > @@ -0,0 +1,33 @@
> > +/*
> > + * Copyright 2012 Pavel Machek <pavel@denx.de>
> > + * Copyright (C) 2012 Altera Corporation
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
> > USA
> > + */
> > +
> > +#ifndef __MACH_CORE_H
> > +#define __MACH_CORE_H
> > +
> > +extern void secondary_startup(void);
> > +extern void __iomem *socfpga_scu_base_addr;
> > +
> > +extern void socfpga_init_clocks(void);
> > +extern void socfpga_sysmgr_init(void);
> > +
> > +extern struct smp_operations socfpga_smp_ops;
> > +
> > +#define SOCFPGA_SCU_VIRT_BASE 0xfffec000
> > +
> > +#endif
> > diff --git a/arch/arm/mach-socfpga/platsmp.c
> > b/arch/arm/mach-socfpga/platsmp.c
> > new file mode 100644
> > index 0000000..59d7069
> > --- /dev/null
> > +++ b/arch/arm/mach-socfpga/platsmp.c
> > @@ -0,0 +1,166 @@
> > +/*
> > + * Copyright 2010-2011 Calxeda, Inc.
> > + * Copyright 2012 Pavel Machek <pavel@denx.de>
> > + * Based on platsmp.c, Copyright (C) 2002 ARM Ltd.
> > + * Copyright (C) 2012 Altera Corporation
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > it
> > + * under the terms and conditions of the GNU General Public License,
> > + * version 2, as published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope it will be useful, but
> > WITHOUT
> > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
> > or
> > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
> > License for
> > + * more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > along with
> > + * this program. If not, see <http://www.gnu.org/licenses/>.
> > + */
> > +#include <linux/delay.h>
> > +#include <linux/init.h>
> > +#include <linux/smp.h>
> > +#include <linux/io.h>
> > +#include <linux/of.h>
> > +#include <linux/of_address.h>
> > +
> > +#include <asm/cacheflush.h>
> > +#include <asm/hardware/gic.h>
> > +#include <asm/smp_scu.h>
> > +#include <asm/smp_plat.h>
> > +
> > +#include <mach/core.h>
> > +
> > +static void __iomem *sys_manager_base_addr;
> > +static void __iomem *rst_manager_base_addr;
> > +
> > +static DEFINE_SPINLOCK(boot_lock);
> > +
> > +static void __cpuinit socfpga_secondary_init(unsigned int cpu)
> > +{
> > + /*
> > + * if any interrupts are already enabled for the primary
> > + * core (e.g. timer irq), then they will not have been enabled
> > + * for us: do so
> > + */
> > + gic_secondary_init(0);
> > +
> > + /*
> > + * let the primary processor know we're out of the
> > + * pen, then head off into the C entry point
> > + */
> > + pen_release = -1;
> > + smp_wmb();
> > +
> > + /*
> > + * Synchronise with the boot thread.
> > + */
> > + spin_lock(&boot_lock);
> > + spin_unlock(&boot_lock);
> > +}
> > +
> > +static int __cpuinit socfpga_boot_secondary(unsigned int cpu, struct
> > task_struct *idle)
> > +{
> > + unsigned long timeout;
> > + extern char secondary_trampoline, secondary_trampoline_end;
> > +
> > + int trampoline_size = &secondary_trampoline_end -
> > &secondary_trampoline;
> > +
> > + /*
> > + * Set synchronisation state between this boot processor
> > + * and the secondary one
> > + */
> > + spin_lock(&boot_lock);
> > +
> > + memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
> > +
> > + __raw_writel(virt_to_phys(secondary_startup),
> > (sys_manager_base_addr+0x10));
> > +
> > + pen_release = 0;
> > + flush_cache_all();
> > + smp_wmb();
> > + outer_clean_range(0, trampoline_size);
> > +
> > + /* This will release CPU #1 out of reset.*/
> > + __raw_writel(0, rst_manager_base_addr + 0x10);
> > +
> > + timeout = jiffies + (1 * HZ);
> > + while (time_before(jiffies, timeout)) {
> > + smp_rmb();
> > + if (pen_release == -1)
> > + break;
> > +
> > + udelay(10);
> > + }
> > +
> > + /*
> > + * now the secondary core is starting up let it run its
> > + * calibrations, then wait for it to finish
> > + */
> > + spin_unlock(&boot_lock);
> > + return pen_release != -1 ? -ENOSYS : 0;
>
> You don't need any of this if you can reset secondary cores on hotplug.
Will investigate with your latest comments.
Thanks for the quick turnaround on the review.
Dinh
>
> Rob
>
^ permalink raw reply
* [PATCH 2/3] serial: mxs-auart: add the DMA support for mx28
From: Shawn Guo @ 2012-10-18 3:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350367386-7742-3-git-send-email-b32955@freescale.com>
On Tue, Oct 16, 2012 at 02:03:05PM +0800, Huang Shijie wrote:
> Only we meet the following conditions, we can enable the DMA support for
> auart:
>
> (1) We enable the DMA support in the dts file, such as
> arch/arm/boot/dts/imx28.dtsi.
>
> (2) We enable the hardware flow control.
>
> (3) We use the mx28, not the mx23. Due to hardware bug(see errata: 2836),
> we can not add the DMA support to mx23.
>
> Signed-off-by: Huang Shijie <b32955@freescale.com>
> ---
> .../bindings/tty/serial/fsl-mxs-auart.txt | 7 +
> drivers/tty/serial/mxs-auart.c | 307 +++++++++++++++++++-
> 2 files changed, 311 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt b/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt
> index a154bf1..67e54b4 100644
> --- a/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt
> +++ b/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt
> @@ -6,11 +6,18 @@ Required properties:
> - reg : Address and length of the register set for the device
> - interrupts : Should contain the auart interrupt numbers
>
> +Optional properties:
> +- fsl,auart-dma-channel : The DMA channels, the first is for RX, the other
> + is for TX.
> +- fsl,auart-enable-dma : Enable the DMA support for the auart.
> +
If we want to have it decided by device tree, can we drop the property
and simply check if "fsl,auart-dma-channel" presents?
> Example:
> auart0: serial at 8006a000 {
> compatible = "fsl,imx28-auart";
> reg = <0x8006a000 0x2000>;
> interrupts = <112 70 71>;
> + fsl,auart-dma-channel = <8 9>;
> + fsl,auart-enable-dma;
> };
>
> Note: Each auart port should have an alias correctly numbered in "aliases"
> diff --git a/drivers/tty/serial/mxs-auart.c b/drivers/tty/serial/mxs-auart.c
> index cd9ec1d..2271330 100644
> --- a/drivers/tty/serial/mxs-auart.c
> +++ b/drivers/tty/serial/mxs-auart.c
> @@ -34,6 +34,8 @@
> #include <linux/io.h>
> #include <linux/pinctrl/consumer.h>
> #include <linux/of_device.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/fsl/mxs-dma.h>
>
> #include <asm/cacheflush.h>
>
> @@ -76,7 +78,15 @@
>
> #define AUART_CTRL0_SFTRST (1 << 31)
> #define AUART_CTRL0_CLKGATE (1 << 30)
> +#define AUART_CTRL0_RXTO_ENABLE (1 << 27)
> +#define AUART_CTRL0_RXTIMEOUT(v) (((v) & 0x7ff) << 16)
> +#define AUART_CTRL0_XFER_COUNT(v) ((v) & 0xffff)
>
> +#define AUART_CTRL1_XFER_COUNT(v) ((v) & 0xffff)
> +
> +#define AUART_CTRL2_DMAONERR (1 << 26)
> +#define AUART_CTRL2_TXDMAE (1 << 25)
> +#define AUART_CTRL2_RXDMAE (1 << 24)
> #define AUART_CTRL2_CTSEN (1 << 15)
> #define AUART_CTRL2_RTSEN (1 << 14)
> #define AUART_CTRL2_RTS (1 << 11)
> @@ -116,12 +126,15 @@
> #define AUART_STAT_BERR (1 << 18)
> #define AUART_STAT_PERR (1 << 17)
> #define AUART_STAT_FERR (1 << 16)
> +#define AUART_STAT_RXCOUNT_MASK 0xffff
>
> static struct uart_driver auart_driver;
>
> struct mxs_auart_port {
> struct uart_port port;
>
> +#define MXS_AUART_DMA_CONFIG 0x1
> +#define MXS_AUART_DMA_ENABLED 0x2
> unsigned int flags;
> unsigned int ctrl;
>
> @@ -130,16 +143,116 @@ struct mxs_auart_port {
> struct clk *clk;
> struct device *dev;
> struct platform_device *pdev;
> +
> + /* for DMA */
> + struct mxs_dma_data dma_data;
> + int dma_channel_rx, dma_channel_tx;
> + int dma_irq_rx, dma_irq_tx;
> + int dma_channel;
> +
> + struct scatterlist tx_sgl;
> + struct dma_chan *tx_dma_chan;
> + void *tx_dma_buf;
> +
> + struct scatterlist rx_sgl;
> + struct dma_chan *rx_dma_chan;
> + void *rx_dma_buf;
> };
>
> +static inline bool auart_dma_enabled(struct mxs_auart_port *s)
> +{
> + return s->flags & MXS_AUART_DMA_ENABLED;
> +}
> +
> static void mxs_auart_stop_tx(struct uart_port *u);
>
> #define to_auart_port(u) container_of(u, struct mxs_auart_port, port)
>
> +static inline void mxs_auart_tx_chars(struct mxs_auart_port *s);
> +
> +static void dma_tx_callback(void *param)
> +{
> + struct mxs_auart_port *s = param;
> + struct circ_buf *xmit = &s->port.state->xmit;
> +
> + dma_unmap_sg(s->dev, &s->tx_sgl, 1, DMA_TO_DEVICE);
> +
> + /* wake up the possible processes. */
> + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
> + uart_write_wakeup(&s->port);
> +
> + mxs_auart_tx_chars(s);
> +}
> +
> +static int mxs_auart_dma_tx(struct mxs_auart_port *s, int size)
> +{
> + struct dma_async_tx_descriptor *desc;
> + struct scatterlist *sgl = &s->tx_sgl;
> + struct dma_chan *channel = s->tx_dma_chan;
> + u32 pio[1];
One element array looks strange to me.
> +
> + /* [1] : send PIO. Note, the first pio word is CTRL1. */
> + pio[0] = AUART_CTRL1_XFER_COUNT(size);
> + desc = dmaengine_prep_slave_sg(channel, (struct scatterlist *)pio,
> + 1, DMA_TRANS_NONE, 0);
> + if (!desc) {
> + dev_err(s->dev, "step 1 error\n");
> + return -EINVAL;
> + }
> +
> + /* [2] : set DMA buffer. */
> + sg_init_one(sgl, s->tx_dma_buf, size);
> + dma_map_sg(s->dev, sgl, 1, DMA_TO_DEVICE);
> + desc = dmaengine_prep_slave_sg(channel, sgl,
> + 1, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
> + if (!desc) {
> + dev_err(s->dev, "step 2 error\n");
> + return -EINVAL;
> + }
> +
> + /* [3] : submit the DMA */
> + desc->callback = dma_tx_callback;
> + desc->callback_param = s;
> + dmaengine_submit(desc);
> + dma_async_issue_pending(channel);
> + return 0;
> +}
> +
> static inline void mxs_auart_tx_chars(struct mxs_auart_port *s)
I'm not sure why this function is inline from the beginning. It
becomes even more inappropriate after you add more codes below.
Shawn
> {
> struct circ_buf *xmit = &s->port.state->xmit;
>
> + if (auart_dma_enabled(s)) {
> + int i = 0;
> + int size;
> + void *buffer = s->tx_dma_buf;
> + enum dma_status status;
> +
> + /* Check whether there is pending DMA operations. */
> + status = dmaengine_tx_status(s->tx_dma_chan, 0, NULL);
> + if (status != DMA_SUCCESS)
> + return;
> +
> + while (!uart_circ_empty(xmit) && !uart_tx_stopped(&s->port)) {
> + size = min_t(u32, UART_XMIT_SIZE - i,
> + CIRC_CNT_TO_END(xmit->head,
> + xmit->tail,
> + UART_XMIT_SIZE));
> + memcpy(buffer + i, xmit->buf + xmit->tail, size);
> + xmit->tail = (xmit->tail + size) & (UART_XMIT_SIZE - 1);
> +
> + i += size;
> + if (i >= UART_XMIT_SIZE)
> + break;
> + }
> +
> + if (uart_tx_stopped(&s->port))
> + mxs_auart_stop_tx(&s->port);
> + if (i)
> + mxs_auart_dma_tx(s, i);
> + return;
> + }
> +
> while (!(readl(s->port.membase + AUART_STAT) &
> AUART_STAT_TXFF)) {
> if (s->port.x_char) {
> @@ -293,10 +406,155 @@ static u32 mxs_auart_get_mctrl(struct uart_port *u)
> return mctrl;
> }
>
> +static bool mxs_auart_dma_filter(struct dma_chan *chan, void *param)
> +{
> + struct mxs_auart_port *s = param;
> +
> + if (!mxs_dma_is_apbx(chan))
> + return false;
> +
> + if (s->dma_channel == chan->chan_id) {
> + chan->private = &s->dma_data;
> + return true;
> + }
> + return false;
> +}
> +
> +static int mxs_auart_dma_prep_rx(struct mxs_auart_port *s);
> +static void dma_rx_callback(void *arg)
> +{
> + struct mxs_auart_port *s = (struct mxs_auart_port *) arg;
> + struct tty_struct *tty = s->port.state->port.tty;
> + int count;
> + u32 stat;
> +
> + stat = readl(s->port.membase + AUART_STAT);
> + stat &= ~(AUART_STAT_OERR | AUART_STAT_BERR |
> + AUART_STAT_PERR | AUART_STAT_FERR);
> +
> + count = stat & AUART_STAT_RXCOUNT_MASK;
> + tty_insert_flip_string(tty, s->rx_dma_buf, count);
> +
> + writel(stat, s->port.membase + AUART_STAT);
> + tty_flip_buffer_push(tty);
> +
> + /* start the next DMA for RX. */
> + mxs_auart_dma_prep_rx(s);
> +}
> +
> +static int mxs_auart_dma_prep_rx(struct mxs_auart_port *s)
> +{
> + struct dma_async_tx_descriptor *desc;
> + struct scatterlist *sgl = &s->rx_sgl;
> + struct dma_chan *channel = s->rx_dma_chan;
> + u32 pio[1];
> +
> + /* [1] : send PIO */
> + pio[0] = AUART_CTRL0_RXTO_ENABLE
> + | AUART_CTRL0_RXTIMEOUT(0x80)
> + | AUART_CTRL0_XFER_COUNT(UART_XMIT_SIZE);
> + desc = dmaengine_prep_slave_sg(channel, (struct scatterlist *)pio,
> + 1, DMA_TRANS_NONE, 0);
> + if (!desc) {
> + dev_err(s->dev, "step 1 error\n");
> + return -EINVAL;
> + }
> +
> + /* [2] : send DMA request */
> + sg_init_one(sgl, s->rx_dma_buf, UART_XMIT_SIZE);
> + dma_map_sg(s->dev, sgl, 1, DMA_FROM_DEVICE);
> + desc = dmaengine_prep_slave_sg(channel, sgl, 1, DMA_DEV_TO_MEM,
> + DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
> + if (!desc) {
> + dev_err(s->dev, "step 2 error\n");
> + return -1;
> + }
> +
> + /* [3] : submit the DMA, but do not issue it. */
> + desc->callback = dma_rx_callback;
> + desc->callback_param = s;
> + dmaengine_submit(desc);
> + dma_async_issue_pending(channel);
> + return 0;
> +}
> +
> +static void mxs_auart_dma_exit_channel(struct mxs_auart_port *s)
> +{
> + if (s->tx_dma_chan) {
> + dma_release_channel(s->tx_dma_chan);
> + s->tx_dma_chan = NULL;
> + }
> + if (s->rx_dma_chan) {
> + dma_release_channel(s->rx_dma_chan);
> + s->rx_dma_chan = NULL;
> + }
> +
> + kfree(s->tx_dma_buf);
> + kfree(s->rx_dma_buf);
> + s->tx_dma_buf = NULL;
> + s->rx_dma_buf = NULL;
> +}
> +
> +static void mxs_auart_dma_exit(struct mxs_auart_port *s)
> +{
> +
> + writel(AUART_CTRL2_TXDMAE | AUART_CTRL2_RXDMAE | AUART_CTRL2_DMAONERR,
> + s->port.membase + AUART_CTRL2_CLR);
> +
> + mxs_auart_dma_exit_channel(s);
> + s->flags &= ~MXS_AUART_DMA_ENABLED;
> +}
> +
> +static int mxs_auart_dma_init(struct mxs_auart_port *s)
> +{
> + dma_cap_mask_t mask;
> +
> + if (auart_dma_enabled(s))
> + return 0;
> +
> + /* We do not get the right DMA channels. */
> + if (s->dma_channel_rx == -1 || s->dma_channel_rx == -1)
> + return -EINVAL;
> +
> + /* init for RX */
> + dma_cap_zero(mask);
> + dma_cap_set(DMA_SLAVE, mask);
> + s->dma_channel = s->dma_channel_rx;
> + s->dma_data.chan_irq = s->dma_irq_rx;
> + s->rx_dma_chan = dma_request_channel(mask, mxs_auart_dma_filter, s);
> + if (!s->rx_dma_chan)
> + goto err_out;
> + s->rx_dma_buf = kzalloc(UART_XMIT_SIZE, GFP_KERNEL | GFP_DMA);
> + if (!s->rx_dma_buf)
> + goto err_out;
> +
> + /* init for TX */
> + s->dma_channel = s->dma_channel_tx;
> + s->dma_data.chan_irq = s->dma_irq_tx;
> + s->tx_dma_chan = dma_request_channel(mask, mxs_auart_dma_filter, s);
> + if (!s->tx_dma_chan)
> + goto err_out;
> + s->tx_dma_buf = kzalloc(UART_XMIT_SIZE, GFP_KERNEL | GFP_DMA);
> + if (!s->tx_dma_buf)
> + goto err_out;
> +
> + /* set the flags */
> + s->flags |= MXS_AUART_DMA_ENABLED;
> + dev_dbg(s->dev, "enabled the DMA support.");
> +
> + return 0;
> +
> +err_out:
> + mxs_auart_dma_exit_channel(s);
> + return -EINVAL;
> +
> +}
> +
> static void mxs_auart_settermios(struct uart_port *u,
> struct ktermios *termios,
> struct ktermios *old)
> {
> + struct mxs_auart_port *s = to_auart_port(u);
> u32 bm, ctrl, ctrl2, div;
> unsigned int cflag, baud;
>
> @@ -368,10 +626,23 @@ static void mxs_auart_settermios(struct uart_port *u,
> ctrl |= AUART_LINECTRL_STP2;
>
> /* figure out the hardware flow control settings */
> - if (cflag & CRTSCTS)
> + if (cflag & CRTSCTS) {
> + /*
> + * The DMA has a bug(see errata:2836) in mx23.
> + * So we can not implement the DMA for auart in mx23,
> + * we can only implement the DMA support for auart
> + * in mx28.
> + */
> + if (!AUART_IS_MX23(s) && (s->flags & MXS_AUART_DMA_CONFIG)) {
> + if (!mxs_auart_dma_init(s))
> + /* enable DMA tranfer */
> + ctrl2 |= AUART_CTRL2_TXDMAE | AUART_CTRL2_RXDMAE
> + | AUART_CTRL2_DMAONERR;
> + }
> ctrl2 |= AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN;
> - else
> + } else {
> ctrl2 &= ~(AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN);
> + }
>
> /* set baud rate */
> baud = uart_get_baud_rate(u, termios, old, 0, u->uartclk);
> @@ -383,6 +654,17 @@ static void mxs_auart_settermios(struct uart_port *u,
> writel(ctrl2, u->membase + AUART_CTRL2);
>
> uart_update_timeout(u, termios->c_cflag, baud);
> +
> + /* prepare for the DMA RX. */
> + if (auart_dma_enabled(s)) {
> + if (!mxs_auart_dma_prep_rx(s)) {
> + /* Disable the normal RX interrupt. */
> + writel(AUART_INTR_RXIEN, u->membase + AUART_INTR_CLR);
> + } else {
> + mxs_auart_dma_exit(s);
> + dev_err(s->dev, "We can not start up the DMA.\n");
> + }
> + }
> }
>
> static irqreturn_t mxs_auart_irq_handle(int irq, void *context)
> @@ -461,6 +743,9 @@ static void mxs_auart_shutdown(struct uart_port *u)
> {
> struct mxs_auart_port *s = to_auart_port(u);
>
> + if (auart_dma_enabled(s))
> + mxs_auart_dma_exit(s);
> +
> writel(AUART_CTRL2_UARTEN, u->membase + AUART_CTRL2_CLR);
>
> writel(AUART_INTR_RXIEN | AUART_INTR_RTIEN | AUART_INTR_CTSMIEN,
> @@ -707,6 +992,7 @@ static int serial_mxs_probe_dt(struct mxs_auart_port *s,
> struct platform_device *pdev)
> {
> struct device_node *np = pdev->dev.of_node;
> + u32 dma_channel[2];
> int ret;
>
> if (!np)
> @@ -722,6 +1008,22 @@ static int serial_mxs_probe_dt(struct mxs_auart_port *s,
>
> pdev->id_entry = of_match_device(mxs_auart_dt_ids, &pdev->dev)->data;
>
> + ret = of_property_read_u32_array(np, "fsl,auart-dma-channel",
> + dma_channel, 2);
> + if (ret == 0) {
> + s->dma_channel_rx = dma_channel[0];
> + s->dma_channel_tx = dma_channel[1];
> + } else {
> + s->dma_channel_rx = -1;
> + s->dma_channel_tx = -1;
> + }
> +
> + s->dma_irq_rx = platform_get_irq(pdev, 1);
> + s->dma_irq_tx = platform_get_irq(pdev, 2);
> +
> + if (of_property_read_bool(np, "fsl,auart-enable-dma"))
> + s->flags |= MXS_AUART_DMA_CONFIG;
> +
> return 0;
> }
>
> @@ -772,7 +1074,6 @@ static int __devinit mxs_auart_probe(struct platform_device *pdev)
> s->port.type = PORT_IMX;
> s->port.dev = s->dev = get_device(&pdev->dev);
>
> - s->flags = 0;
> s->ctrl = 0;
> s->pdev = pdev;
>
> --
> 1.7.0.4
>
>
^ permalink raw reply
* Fwd: [PATCH 2/5] ARM: OMAP3+: hwmod: Add AM33XX HWMOD data for davinci_mdio
From: Richard Cochran @ 2012-10-18 3:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121017235045.GB30550@atomide.com>
On Wed, Oct 17, 2012 at 04:50:46PM -0700, Tony Lindgren wrote:
> * Paul Walmsley <paul@pwsan.com> [121017 16:39]:
> > Hi Richard
> >
> > On Wed, 17 Oct 2012, Richard Cochran wrote:
> >
> > > Would you please take this bugfix for 3.7-rc2? The suggestion to mail
> > > you came from Toni Lindgren. The context where it came from is here:
> > >
> > > http://lists.arm.linux.org.uk/lurker/message/20121015.191630.bdae3c50.en.html
> >
> > This patch appears to add a new feature, correct? I don't think the CPSW
> > could have worked in the past without this data present. So it looks to
> > me like this is 3.8 material, unless Tony would like it to go in sooner?
>
> Yeah unless it fixes something, we should just queue it for v3.8 merge
> window.
So there has been this cpsw driver since v3.4-rc1~177^2~5
df82859 netdev: driver: ethernet: Add TI CPSW driver
and four people signed off on it, so it must have been working at one
point. Since the device tree make-over, the driver is a derelict, and
thus the present patch is fixing a regression.
I just want the already merged driver to work with the vanilla
kernel. Is that too much to ask?
Thanks,
Richard
^ permalink raw reply
* [PATCH 1/3] serial: mxs-auart: distinguish the different SOCs
From: Shawn Guo @ 2012-10-18 2:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350367386-7742-2-git-send-email-b32955@freescale.com>
On Tue, Oct 16, 2012 at 02:03:04PM +0800, Huang Shijie wrote:
> From: Huang Shijie <shijie8@gmail.com>
>
> The current mxs-auart driver is used for both mx23 and mx28.
>
> But in mx23, the DMA has a bug(see errata:2836). We can not add the
> DMA support in mx23, but we can add DMA support to auart in mx28.
>
> So in order to add the DMA support for the auart in mx28, we should add
> the platform_device_id to distinguish the distinguish SOCs.
>
> Signed-off-by: Huang Shijie <b32955@freescale.com>
> ---
> .../bindings/tty/serial/fsl-mxs-auart.txt | 2 +-
> arch/arm/boot/dts/imx28.dtsi | 10 +++---
> drivers/tty/serial/mxs-auart.c | 28 +++++++++++++++----
> 3 files changed, 28 insertions(+), 12 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt b/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt
> index 2ee903f..a154bf1 100644
> --- a/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt
> +++ b/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt
> @@ -8,7 +8,7 @@ Required properties:
>
> Example:
> auart0: serial at 8006a000 {
> - compatible = "fsl,imx28-auart", "fsl,imx23-auart";
> + compatible = "fsl,imx28-auart";
> reg = <0x8006a000 0x2000>;
> interrupts = <112 70 71>;
> };
> diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
> index e16d631..6ed9215 100644
> --- a/arch/arm/boot/dts/imx28.dtsi
> +++ b/arch/arm/boot/dts/imx28.dtsi
> @@ -795,7 +795,7 @@
> };
>
> auart0: serial at 8006a000 {
> - compatible = "fsl,imx28-auart", "fsl,imx23-auart";
> + compatible = "fsl,imx28-auart";
> reg = <0x8006a000 0x2000>;
> interrupts = <112 70 71>;
> clocks = <&clks 45>;
> @@ -803,7 +803,7 @@
> };
>
> auart1: serial at 8006c000 {
> - compatible = "fsl,imx28-auart", "fsl,imx23-auart";
> + compatible = "fsl,imx28-auart";
> reg = <0x8006c000 0x2000>;
> interrupts = <113 72 73>;
> clocks = <&clks 45>;
> @@ -811,7 +811,7 @@
> };
>
> auart2: serial at 8006e000 {
> - compatible = "fsl,imx28-auart", "fsl,imx23-auart";
> + compatible = "fsl,imx28-auart";
> reg = <0x8006e000 0x2000>;
> interrupts = <114 74 75>;
> clocks = <&clks 45>;
> @@ -819,7 +819,7 @@
> };
>
> auart3: serial at 80070000 {
> - compatible = "fsl,imx28-auart", "fsl,imx23-auart";
> + compatible = "fsl,imx28-auart";
> reg = <0x80070000 0x2000>;
> interrupts = <115 76 77>;
> clocks = <&clks 45>;
> @@ -827,7 +827,7 @@
> };
>
> auart4: serial at 80072000 {
> - compatible = "fsl,imx28-auart", "fsl,imx23-auart";
> + compatible = "fsl,imx28-auart";
> reg = <0x80072000 0x2000>;
> interrupts = <116 78 79>;
> clocks = <&clks 45>;
All changes above are unnecessary. With "fsl,imx28-auart" added to
driver's compatible, driver will match it first.
> diff --git a/drivers/tty/serial/mxs-auart.c b/drivers/tty/serial/mxs-auart.c
> index 6db3baa..cd9ec1d 100644
> --- a/drivers/tty/serial/mxs-auart.c
> +++ b/drivers/tty/serial/mxs-auart.c
> @@ -37,6 +37,11 @@
>
> #include <asm/cacheflush.h>
>
> +/* Use the platform_id to distinguish different Archs. */
> +#define IS_MX23 0x0
> +#define IS_MX28 0x1
I do not like the name. We are distinguishing the IP not SoC, but just
happen to use SoC to identify the version.
You can look at drivers/mmc/host/sdhci-esdhc-imx.c for example.
> +#define AUART_IS_MX23(x) ((x)->pdev->id_entry->driver_data == IS_MX23)
> +
Use inline function.
> #define MXS_AUART_PORTS 5
>
> #define AUART_CTRL0 0x00000000
> @@ -124,6 +129,7 @@ struct mxs_auart_port {
>
> struct clk *clk;
> struct device *dev;
> + struct platform_device *pdev;
> };
>
> static void mxs_auart_stop_tx(struct uart_port *u);
> @@ -680,6 +686,19 @@ static struct uart_driver auart_driver = {
> #endif
> };
>
> +static const struct platform_device_id auart_ids[] = {
> + { .name = "imx23-auart", .driver_data = IS_MX23, },
> + { .name = "imx28-auart", .driver_data = IS_MX28, },
> + {},
> +};
> +
The driver is only used on mach-mxs. Since mach-mxs becomes a DT only
platform, auart_ids is not really needed. Look, you do not use it in
mxs_auart_driver for probing at all.
> +static struct of_device_id mxs_auart_dt_ids[] = {
> + { .compatible = "fsl,imx23-auart", .data = (void *)&auart_ids[0] },
> + { .compatible = "fsl,imx28-auart", .data = (void *)&auart_ids[1] },
> + { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, mxs_auart_dt_ids);
> +
> /*
> * This function returns 1 if pdev isn't a device instatiated by dt, 0 if it
> * could successfully get all information from dt or a negative errno.
> @@ -701,6 +720,8 @@ static int serial_mxs_probe_dt(struct mxs_auart_port *s,
> }
> s->port.line = ret;
>
> + pdev->id_entry = of_match_device(mxs_auart_dt_ids, &pdev->dev)->data;
> +
> return 0;
> }
>
> @@ -753,6 +774,7 @@ static int __devinit mxs_auart_probe(struct platform_device *pdev)
>
> s->flags = 0;
> s->ctrl = 0;
> + s->pdev = pdev;
What is this for?
Shawn
>
> s->irq = platform_get_irq(pdev, 0);
> s->port.irq = s->irq;
> @@ -805,12 +827,6 @@ static int __devexit mxs_auart_remove(struct platform_device *pdev)
> return 0;
> }
>
> -static struct of_device_id mxs_auart_dt_ids[] = {
> - { .compatible = "fsl,imx23-auart", },
> - { /* sentinel */ }
> -};
> -MODULE_DEVICE_TABLE(of, mxs_auart_dt_ids);
> -
> static struct platform_driver mxs_auart_driver = {
> .probe = mxs_auart_probe,
> .remove = __devexit_p(mxs_auart_remove),
> --
> 1.7.0.4
>
>
^ permalink raw reply
* [PATCH] ARM: mm: Remove unused arm_vmregion priv field
From: Laurent Pinchart @ 2012-10-18 2:01 UTC (permalink / raw)
To: linux-arm-kernel
Commit e9da6e9905e639b0f842a244bc770b48ad0523e9 ("ARM: dma-mapping:
remove custom consistent dma region") removed the last users of the
field. Remove it.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
arch/arm/mm/vmregion.h | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mm/vmregion.h b/arch/arm/mm/vmregion.h
index bf312c3..0f5a5f2 100644
--- a/arch/arm/mm/vmregion.h
+++ b/arch/arm/mm/vmregion.h
@@ -17,7 +17,6 @@ struct arm_vmregion {
struct list_head vm_list;
unsigned long vm_start;
unsigned long vm_end;
- void *priv;
int vm_active;
const void *caller;
};
--
Regards,
Laurent Pinchart
^ permalink raw reply related
* [PATCH 5/7] ARM: OMAP2+: WDT: move init; add read_reset_sources pdata function pointer (fwd)
From: Paul Walmsley @ 2012-10-18 1:27 UTC (permalink / raw)
To: linux-arm-kernel
Hi Wim,
When you have the opportunity, could you take a look at this patch, and
the subsequent patch 6/7, and ack them if you're okay with them?
We'd like to merge thse as part of a larger cleanup series through the
arm-soc tree. They like cleanup patches to arrive at the beginning of the
-rc series, which means that we need to have the pull request sent pretty
soon.
thanks,
- Paul
---------- Forwarded message ----------
Date: Mon, 15 Oct 2012 19:32:33 -0600
From: Paul Walmsley <paul@pwsan.com>
To: linux-omap at vger.kernel.org, linux-arm-kernel at lists.infradead.org
Cc: Wim Van Sebroeck <wim@iguana.be>, linux-watchdog at vger.kernel.org
Subject: [PATCH 5/7] ARM: OMAP2+: WDT: move init; add read_reset_sources pdata
function pointer
The OMAP watchdog timer driver directly calls a function exported by
code in arch/arm/mach-omap2. This is not good; it tightly couples
this driver to the mach-omap2 integration code. Instead, add a
temporary platform_data function pointer to abstract this function
call. A subsequent patch will convert the watchdog driver to use this
function pointer.
This patch also moves the device creation code out of
arch/arm/mach-omap2/devices.c and into arch/arm/mach-omap2/wd_timer.c.
This is another step towards the removal of
arch/arm/mach-omap2/devices.c.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Wim Van Sebroeck <wim@iguana.be>
---
arch/arm/mach-omap1/devices.c | 21 +++++++++++++--
arch/arm/mach-omap2/devices.c | 26 ------------------
arch/arm/mach-omap2/wd_timer.c | 33 +++++++++++++++++++++++
include/linux/platform_data/omap-wd-timer.h | 38 +++++++++++++++++++++++++++
4 files changed, 89 insertions(+), 29 deletions(-)
create mode 100644 include/linux/platform_data/omap-wd-timer.h
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index d3fec92..c3408e7 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -17,6 +17,8 @@
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
+#include <linux/platform_data/omap-wd-timer.h>
+
#include <asm/mach/map.h>
#include <plat/tc.h>
@@ -439,18 +441,31 @@ static struct resource wdt_resources[] = {
};
static struct platform_device omap_wdt_device = {
- .name = "omap_wdt",
- .id = -1,
+ .name = "omap_wdt",
+ .id = -1,
.num_resources = ARRAY_SIZE(wdt_resources),
.resource = wdt_resources,
};
static int __init omap_init_wdt(void)
{
+ struct omap_wd_timer_platform_data pdata;
+ int ret;
+
if (!cpu_is_omap16xx())
return -ENODEV;
- return platform_device_register(&omap_wdt_device);
+ pdata.read_reset_sources = omap1_read_reset_sources;
+
+ ret = platform_device_register(&omap_wdt_device);
+ if (!ret) {
+ ret = platform_device_add_data(&omap_wdt_device, &pdata,
+ sizeof(pdata));
+ if (ret)
+ platform_device_del(&omap_wdt_device);
+ }
+
+ return ret;
}
subsys_initcall(omap_init_wdt);
#endif
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c8c2117..2ab2c99 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -644,29 +644,3 @@ static int __init omap2_init_devices(void)
return 0;
}
arch_initcall(omap2_init_devices);
-
-#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
-static int __init omap_init_wdt(void)
-{
- int id = -1;
- struct platform_device *pdev;
- struct omap_hwmod *oh;
- char *oh_name = "wd_timer2";
- char *dev_name = "omap_wdt";
-
- if (!cpu_class_is_omap2() || of_have_populated_dt())
- return 0;
-
- oh = omap_hwmod_lookup(oh_name);
- if (!oh) {
- pr_err("Could not look up wd_timer%d hwmod\n", id);
- return -EINVAL;
- }
-
- pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0);
- WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
- dev_name, oh->name);
- return 0;
-}
-subsys_initcall(omap_init_wdt);
-#endif
diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c
index b2f1c67..00ef54c 100644
--- a/arch/arm/mach-omap2/wd_timer.c
+++ b/arch/arm/mach-omap2/wd_timer.c
@@ -11,10 +11,14 @@
#include <linux/io.h>
#include <linux/err.h>
+#include <linux/platform_data/omap-wd-timer.h>
+
#include <plat/omap_hwmod.h>
+#include <plat/omap_device.h>
#include "wd_timer.h"
#include "common.h"
+#include "prm.h"
/*
* In order to avoid any assumptions from bootloader regarding WDT
@@ -99,3 +103,32 @@ int omap2_wd_timer_reset(struct omap_hwmod *oh)
return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT :
omap2_wd_timer_disable(oh);
}
+
+static int __init omap_init_wdt(void)
+{
+ int id = -1;
+ struct platform_device *pdev;
+ struct omap_hwmod *oh;
+ char *oh_name = "wd_timer2";
+ char *dev_name = "omap_wdt";
+ struct omap_wd_timer_platform_data pdata;
+
+ if (!cpu_class_is_omap2())
+ return 0;
+
+ oh = omap_hwmod_lookup(oh_name);
+ if (!oh) {
+ pr_err("Could not look up wd_timer%d hwmod\n", id);
+ return -EINVAL;
+ }
+
+ pdata.read_reset_sources = prm_read_reset_sources;
+
+ pdev = omap_device_build(dev_name, id, oh, &pdata,
+ sizeof(struct omap_wd_timer_platform_data),
+ NULL, 0, 0);
+ WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
+ dev_name, oh->name);
+ return 0;
+}
+subsys_initcall(omap_init_wdt);
diff --git a/include/linux/platform_data/omap-wd-timer.h b/include/linux/platform_data/omap-wd-timer.h
new file mode 100644
index 0000000..d75f5f8
--- /dev/null
+++ b/include/linux/platform_data/omap-wd-timer.h
@@ -0,0 +1,38 @@
+/*
+ * OMAP2+ WDTIMER-specific function prototypes
+ *
+ * Copyright (C) 2012 Texas Instruments, Inc.
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __LINUX_PLATFORM_DATA_OMAP_WD_TIMER_H
+#define __LINUX_PLATFORM_DATA_OMAP_WD_TIMER_H
+
+#include <linux/types.h>
+
+/*
+ * Standardized OMAP reset source bits
+ *
+ * This is a subset of the ones listed in arch/arm/mach-omap2/prm.h
+ * and are the only ones needed in the watchdog driver.
+ */
+#define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3
+
+/**
+ * struct omap_wd_timer_platform_data - WDTIMER integration to the host SoC
+ * @read_reset_sources - fn ptr for the SoC to indicate the last reset cause
+ *
+ * The function pointed to by @read_reset_sources must return its data
+ * in a standard format - search for RST_SRC_ID_SHIFT in
+ * arch/arm/mach-omap2
+ */
+struct omap_wd_timer_platform_data {
+ u32 (*read_reset_sources)(void);
+};
+
+#endif
--
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^ permalink raw reply related
* [GIT PULL] Renesas ARM-based SoC defconfig for v3.8
From: Simon Horman @ 2012-10-18 0:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201210171342.29635.arnd@arndb.de>
On Wed, Oct 17, 2012 at 01:42:29PM +0000, Arnd Bergmann wrote:
> On Wednesday 17 October 2012, Simon Horman wrote:
> > Hi Olof, Hi Arnd,
> >
> > please consider the following defconfig enhancements for 3.8.
>
> These look good to me, but I wonder what happened to the plan to reduce
> the number of defconfig files we discussed before. Since you can build
> a combined kernel that runs on all (or most) of the supported boards,
> can you add a combined shmobile_defconfig that is able to work on
> a wide variety of hardware and drop some of the less common defconfig
> files?
>
> Most of the modern platforms nowadays have just one defconfig that
> covers everything.
Hi Arnd,
I wonder if such consolidation only makes sense for boards that
make use of DT. If so, I can see that we may be able to come
up with a single configuration for the Armadillo800eva, KZM9G
and KZM9D boards. But not for older boards such as the Mackerel which
have not been converted to use DT.
I am also wondering if more of the drivers that SH Mobile uses need to
become DT aware before a consolidated configuration can work. In
particular, I am thinking about the SCI serial driver and the location of
the serial port that can be used for serial console and early printk - this
features in the kernel command line of the per-board defconfigs and is
relied on by developers.
^ permalink raw reply
* [PATCH v4 1/5] zynq: use GIC device tree bindings
From: Josh Cartwright @ 2012-10-18 0:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1351466765.git.josh.cartwright@ni.com>
The Zynq uses the cortex-a9-gic. This eliminates the need to hardcode
register addresses.
Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Cc: John Linn <john.linn@xilinx.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/boot/dts/zynq-ep107.dts | 10 ++++++----
arch/arm/mach-zynq/common.c | 7 ++++++-
arch/arm/mach-zynq/include/mach/zynq_soc.h | 2 --
3 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/zynq-ep107.dts b/arch/arm/boot/dts/zynq-ep107.dts
index 37ca192..f914090 100644
--- a/arch/arm/boot/dts/zynq-ep107.dts
+++ b/arch/arm/boot/dts/zynq-ep107.dts
@@ -36,16 +36,18 @@
ranges;
intc: interrupt-controller at f8f01000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <1>;
interrupt-controller;
- compatible = "arm,gic";
- reg = <0xF8F01000 0x1000>;
- #interrupt-cells = <2>;
+ reg = <0xF8F01000 0x1000>,
+ <0xF8F00100 0x100>;
};
uart0: uart at e0000000 {
compatible = "xlnx,xuartps";
reg = <0xE0000000 0x1000>;
- interrupts = <59 0>;
+ interrupts = <0 27 4>;
clock = <50000000>;
};
};
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index ab5cfdd..d73963b 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -55,12 +55,17 @@ static void __init xilinx_init_machine(void)
of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
}
+static struct of_device_id irq_match[] __initdata = {
+ { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+ { }
+};
+
/**
* xilinx_irq_init() - Interrupt controller initialization for the GIC.
*/
static void __init xilinx_irq_init(void)
{
- gic_init(0, 29, SCU_GIC_DIST_BASE, SCU_GIC_CPU_BASE);
+ of_irq_init(irq_match);
}
/* The minimum devices needed to be mapped before the VM system is up and
diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h
index d0d3f8f..3d1c6a6 100644
--- a/arch/arm/mach-zynq/include/mach/zynq_soc.h
+++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h
@@ -35,8 +35,6 @@
#define TTC0_BASE IOMEM(TTC0_VIRT)
#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT)
-#define SCU_GIC_CPU_BASE (SCU_PERIPH_BASE + 0x100)
-#define SCU_GIC_DIST_BASE (SCU_PERIPH_BASE + 0x1000)
#define PL310_L2CC_BASE IOMEM(PL310_L2CC_VIRT)
/*
--
1.8.0
^ permalink raw reply related
* [GIT PULL 2/3] ARM: mvebu: fix for v3.7
From: Olof Johansson @ 2012-10-18 0:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <E1TOZGE-0003zX-D8@merlin.infradead.org>
On Wed, Oct 17, 2012 at 12:25 PM, Jason Cooper <jason@lakedaemon.net> wrote:
> The following changes since commit ddffeb8c4d0331609ef2581d84de4d763607bd37:
>
> Linux 3.7-rc1 (2012-10-14 14:41:04 -0700)
>
> are available in the git repository at:
>
> git://git.infradead.org/users/jcooper/linux.git tags/mvebu_gpio_fixes_for_v3.7
Pulled into fixes. As mentioned on IRC, you could have done a combined
branch with all patches here, splitting them up is a little overkill.
But either way is alright.
-Olof
^ permalink raw reply
* [GIT PULL 1/3] ARM: Dove: fixes for v3.7
From: Olof Johansson @ 2012-10-18 0:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <E1TOZFe-0003sB-2E@merlin.infradead.org>
On Wed, Oct 17, 2012 at 12:25 PM, Jason Cooper <jason@lakedaemon.net> wrote:
> The following changes since commit ddffeb8c4d0331609ef2581d84de4d763607bd37:
>
> Linux 3.7-rc1 (2012-10-14 14:41:04 -0700)
>
> are available in the git repository at:
>
> git://git.infradead.org/users/jcooper/linux.git tags/mvebu_dove_late_fixes_for_v3.7
Pulled into fixes. Thanks.
-Olof
^ permalink raw reply
* [GIT PULL 3/3] ARM: Kirkwood: fix for v3.7
From: Olof Johansson @ 2012-10-18 0:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <E1TOZFq-0003tI-4I@merlin.infradead.org>
Hi,
On Wed, Oct 17, 2012 at 12:25 PM, Jason Cooper <jason@lakedaemon.net> wrote:
> The following changes since commit ddffeb8c4d0331609ef2581d84de4d763607bd37:
>
> Linux 3.7-rc1 (2012-10-14 14:41:04 -0700)
>
> are available in the git repository at:
>
> git://git.infradead.org/users/jcooper/linux.git tags/kirkwood_cache_build_fix_for_v3.7
>
> for you to fetch changes up to f7d87d2726f823dc4a0d4900ac06446e4e485fdb:
>
> Build failure CONFIG_ARCH_KIRKWOOD_DT relies on CACHE_FEROCEON_L2 (2012-10-17 17:56:37 +0000)
>
> ----------------------------------------------------------------
> Depends:
> - Based on v3.7-rc1
These dependencies don't really make sense to have in the tag -- the
tag shows up by default in the merge commit and once the branch is
merged, the dependencies aren't really useful. So while it might be
good to have in the pull request (at least for non-trivial
dependencies/bases), having it in the tag means I just edit it out
when I touch up the merge message.
> Jason Gunthorpe (1):
> Build failure CONFIG_ARCH_KIRKWOOD_DT relies on CACHE_FEROCEON_L2
Please fix the patch subject format here.
-Olof
^ permalink raw reply
* [GIT PULL] omap fixes ready to go for v3.7-rc1
From: Olof Johansson @ 2012-10-18 0:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121017220248.GA15569@atomide.com>
On Wed, Oct 17, 2012 at 3:02 PM, Tony Lindgren <tony@atomide.com> wrote:
> Hi Arnd & Olof,
>
> Here are the fixes ready to pull, there's at least one more fix in works
> but it still requires minor changes. The two top commits are recent as
> Jon Hunter noticed an issue freeing resources in his fix and I did a
> new branch to swap in the fixed patch.
>
> Regards,
>
> Tony
>
>
> The following changes since commit ddffeb8c4d0331609ef2581d84de4d763607bd37:
>
> Linux 3.7-rc1 (2012-10-14 14:41:04 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v3.7-rc1/fixes-take5-signed
Pulled into fixes, thanks.
-Olof
^ permalink raw reply
* [GIT PULL] ARM: tegra: fixes for 3.7-rc2
From: Olof Johansson @ 2012-10-18 0:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350515426-31517-1-git-send-email-swarren@wwwdotorg.org>
On Wed, Oct 17, 2012 at 4:10 PM, Stephen Warren <swarren@wwwdotorg.org> wrote:
> This branch contains a couple small fixes for Tegra for 3.7.
>
> * A fix for another clock rate calculation overflow
> * A revert of a change that removed the "timer" clock on Tegra, coupled
> with a fix for the confusing symbol name clash that triggered it.
>
> ----------------------------------------------------------------
>
> BTW, I signed this tag with my swarren at nvidia.com key; it's a different key
> to the one I used before, but has the same signatures and should show up on
> all the same keyservers.
>
> The following changes since commit ddffeb8c4d0331609ef2581d84de4d763607bd37:
>
> Linux 3.7-rc1
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra.git tegra-for-3.7-fixes-for-rc2
Pulled into fixes. Thanks!
-Olof
^ permalink raw reply
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