* [PATCH 5/8] ARM: plat-nomadik: move MTU, kill plat-nomadik
From: Linus Walleij @ 2012-10-18 17:19 UTC (permalink / raw)
To: linux-arm-kernel
From: Linus Walleij <linus.walleij@linaro.org>
This moves the MTU timer driver from arch/arm/plat-nomadik
to drivers/clocksource and moves the header file to the
platform_data directory.
As this moves the last file being compiled to an object out
of arch/arm/plat-nomadik, we have to "turn off the light"
and delete the plat-nomadik directory, because it is not
allowed to have an empty Makefile in a plat-* directory.
This is probably also a desired side effect of depopulating
the arch/arm directory of drivers. Luckily we have just
deleted all the <plat/*> include files prior to this so
by moving the last one we may delete the directory.
After this all the Ux500 and Nomadik device drivers live
outside of the arch/arm hierarchy.
Cc: Alessandro Rubini <rubini@unipv.it>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/Kconfig | 1 -
arch/arm/Makefile | 1 -
arch/arm/mach-nomadik/Kconfig | 2 +-
arch/arm/mach-nomadik/board-nhk8815.c | 6 +-
arch/arm/mach-ux500/Kconfig | 2 +-
arch/arm/mach-ux500/timer.c | 3 +-
arch/arm/plat-nomadik/Kconfig | 29 ---
arch/arm/plat-nomadik/Makefile | 5 -
arch/arm/plat-nomadik/include/plat/mtu.h | 9 -
arch/arm/plat-nomadik/timer.c | 224 ---------------------
drivers/char/hw_random/Kconfig | 2 +-
drivers/clocksource/Kconfig | 17 +-
drivers/clocksource/Makefile | 1 +
drivers/clocksource/nomadik-mtu.c | 224 +++++++++++++++++++++
drivers/input/keyboard/Kconfig | 2 +-
drivers/mtd/nand/Kconfig | 2 +-
.../linux/platform_data/clocksource-nomadik-mtu.h | 9 +
17 files changed, 258 insertions(+), 281 deletions(-)
delete mode 100644 arch/arm/plat-nomadik/Kconfig
delete mode 100644 arch/arm/plat-nomadik/Makefile
delete mode 100644 arch/arm/plat-nomadik/include/plat/mtu.h
delete mode 100644 arch/arm/plat-nomadik/timer.c
create mode 100644 drivers/clocksource/nomadik-mtu.c
create mode 100644 include/linux/platform_data/clocksource-nomadik-mtu.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 73067ef..c5f2c18 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1065,7 +1065,6 @@ source "arch/arm/mach-mxs/Kconfig"
source "arch/arm/mach-netx/Kconfig"
source "arch/arm/mach-nomadik/Kconfig"
-source "arch/arm/plat-nomadik/Kconfig"
source "arch/arm/plat-omap/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index f023e3a..ed6a304 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -200,7 +200,6 @@ plat-$(CONFIG_ARCH_OMAP) += omap
plat-$(CONFIG_ARCH_S3C64XX) += samsung
plat-$(CONFIG_ARCH_ZYNQ) += versatile
plat-$(CONFIG_PLAT_IOP) += iop
-plat-$(CONFIG_PLAT_NOMADIK) += nomadik
plat-$(CONFIG_PLAT_ORION) += orion
plat-$(CONFIG_PLAT_PXA) += pxa
plat-$(CONFIG_PLAT_S3C24XX) += s3c24xx samsung
diff --git a/arch/arm/mach-nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig
index c744946..706dc57 100644
--- a/arch/arm/mach-nomadik/Kconfig
+++ b/arch/arm/mach-nomadik/Kconfig
@@ -4,7 +4,7 @@ menu "Nomadik boards"
config MACH_NOMADIK_8815NHK
bool "ST 8815 Nomadik Hardware Kit (evaluation board)"
- select HAS_MTU
+ select CLKSRC_NOMADIK_MTU
select NOMADIK_8815
endmenu
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 16f10e0..5ccdf53 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -25,16 +25,14 @@
#include <linux/io.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/pinctrl-nomadik.h>
+#include <linux/platform_data/clocksource-nomadik-mtu.h>
+#include <linux/platform_data/mtd-nomadik-nand.h>
#include <asm/hardware/vic.h>
#include <asm/sizes.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/time.h>
-
-#include <plat/mtu.h>
-
-#include <linux/platform_data/mtd-nomadik-nand.h>
#include <mach/fsmc.h>
#include <mach/irqs.h>
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index e8c3f0d..5dea906 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -7,8 +7,8 @@ config UX500_SOC_COMMON
select ARM_ERRATA_764369 if SMP
select ARM_GIC
select CACHE_L2X0
+ select CLKSRC_NOMADIK_MTU
select COMMON_CLK
- select HAS_MTU
select PINCTRL
select PINCTRL_NOMADIK
select PL310_ERRATA_753970 if CACHE_PL310
diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c
index 20d02fa..875309a 100644
--- a/arch/arm/mach-ux500/timer.c
+++ b/arch/arm/mach-ux500/timer.c
@@ -9,11 +9,10 @@
#include <linux/clksrc-dbx500-prcmu.h>
#include <linux/of.h>
#include <linux/of_address.h>
+#include <linux/platform_data/clocksource-nomadik-mtu.h>
#include <asm/smp_twd.h>
-#include <plat/mtu.h>
-
#include <mach/setup.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
diff --git a/arch/arm/plat-nomadik/Kconfig b/arch/arm/plat-nomadik/Kconfig
deleted file mode 100644
index 19f55ca..0000000
--- a/arch/arm/plat-nomadik/Kconfig
+++ /dev/null
@@ -1,29 +0,0 @@
-# We keep common IP's here for Nomadik and other similar
-# familiy of processors from ST-Ericsson. At the moment we have
-# just MTU, others to follow soon.
-
-config PLAT_NOMADIK
- bool
- depends on ARCH_NOMADIK || ARCH_U8500
- default y
- select CLKSRC_MMIO
- help
- Common platform code for Nomadik and other ST-Ericsson
- platforms.
-
-if PLAT_NOMADIK
-
-config HAS_MTU
- bool
- help
- Support for Multi Timer Unit. MTU provides access
- to multiple interrupt generating programmable
- 32-bit free running decrementing counters.
-
-config NOMADIK_MTU_SCHED_CLOCK
- bool
- depends on HAS_MTU
- help
- Use the Multi Timer Unit as the sched_clock.
-
-endif
diff --git a/arch/arm/plat-nomadik/Makefile b/arch/arm/plat-nomadik/Makefile
deleted file mode 100644
index 37c7cdd..0000000
--- a/arch/arm/plat-nomadik/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
-# arch/arm/plat-nomadik/Makefile
-# Copyright 2009 ST-Ericsson
-# Licensed under GPLv2
-
-obj-$(CONFIG_HAS_MTU) += timer.o
diff --git a/arch/arm/plat-nomadik/include/plat/mtu.h b/arch/arm/plat-nomadik/include/plat/mtu.h
deleted file mode 100644
index 8008897..0000000
--- a/arch/arm/plat-nomadik/include/plat/mtu.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef __PLAT_MTU_H
-#define __PLAT_MTU_H
-
-void nmdk_timer_init(void __iomem *base, int irq);
-void nmdk_clkevt_reset(void);
-void nmdk_clksrc_reset(void);
-
-#endif /* __PLAT_MTU_H */
-
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
deleted file mode 100644
index f911430..0000000
--- a/arch/arm/plat-nomadik/timer.c
+++ /dev/null
@@ -1,224 +0,0 @@
-/*
- * linux/arch/arm/plat-nomadik/timer.c
- *
- * Copyright (C) 2008 STMicroelectronics
- * Copyright (C) 2010 Alessandro Rubini
- * Copyright (C) 2010 Linus Walleij for ST-Ericsson
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2, as
- * published by the Free Software Foundation.
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/clockchips.h>
-#include <linux/clk.h>
-#include <linux/jiffies.h>
-#include <linux/err.h>
-#include <asm/mach/time.h>
-#include <asm/sched_clock.h>
-
-/*
- * The MTU device hosts four different counters, with 4 set of
- * registers. These are register names.
- */
-
-#define MTU_IMSC 0x00 /* Interrupt mask set/clear */
-#define MTU_RIS 0x04 /* Raw interrupt status */
-#define MTU_MIS 0x08 /* Masked interrupt status */
-#define MTU_ICR 0x0C /* Interrupt clear register */
-
-/* per-timer registers take 0..3 as argument */
-#define MTU_LR(x) (0x10 + 0x10 * (x) + 0x00) /* Load value */
-#define MTU_VAL(x) (0x10 + 0x10 * (x) + 0x04) /* Current value */
-#define MTU_CR(x) (0x10 + 0x10 * (x) + 0x08) /* Control reg */
-#define MTU_BGLR(x) (0x10 + 0x10 * (x) + 0x0c) /* At next overflow */
-
-/* bits for the control register */
-#define MTU_CRn_ENA 0x80
-#define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */
-#define MTU_CRn_PRESCALE_MASK 0x0c
-#define MTU_CRn_PRESCALE_1 0x00
-#define MTU_CRn_PRESCALE_16 0x04
-#define MTU_CRn_PRESCALE_256 0x08
-#define MTU_CRn_32BITS 0x02
-#define MTU_CRn_ONESHOT 0x01 /* if 0 = wraps reloading from BGLR*/
-
-/* Other registers are usual amba/primecell registers, currently not used */
-#define MTU_ITCR 0xff0
-#define MTU_ITOP 0xff4
-
-#define MTU_PERIPH_ID0 0xfe0
-#define MTU_PERIPH_ID1 0xfe4
-#define MTU_PERIPH_ID2 0xfe8
-#define MTU_PERIPH_ID3 0xfeC
-
-#define MTU_PCELL0 0xff0
-#define MTU_PCELL1 0xff4
-#define MTU_PCELL2 0xff8
-#define MTU_PCELL3 0xffC
-
-static void __iomem *mtu_base;
-static bool clkevt_periodic;
-static u32 clk_prescale;
-static u32 nmdk_cycle; /* write-once */
-
-#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
-/*
- * Override the global weak sched_clock symbol with this
- * local implementation which uses the clocksource to get some
- * better resolution when scheduling the kernel.
- */
-static u32 notrace nomadik_read_sched_clock(void)
-{
- if (unlikely(!mtu_base))
- return 0;
-
- return -readl(mtu_base + MTU_VAL(0));
-}
-#endif
-
-/* Clockevent device: use one-shot mode */
-static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev)
-{
- writel(1 << 1, mtu_base + MTU_IMSC);
- writel(evt, mtu_base + MTU_LR(1));
- /* Load highest value, enable device, enable interrupts */
- writel(MTU_CRn_ONESHOT | clk_prescale |
- MTU_CRn_32BITS | MTU_CRn_ENA,
- mtu_base + MTU_CR(1));
-
- return 0;
-}
-
-void nmdk_clkevt_reset(void)
-{
- if (clkevt_periodic) {
- /* Timer: configure load and background-load, and fire it up */
- writel(nmdk_cycle, mtu_base + MTU_LR(1));
- writel(nmdk_cycle, mtu_base + MTU_BGLR(1));
-
- writel(MTU_CRn_PERIODIC | clk_prescale |
- MTU_CRn_32BITS | MTU_CRn_ENA,
- mtu_base + MTU_CR(1));
- writel(1 << 1, mtu_base + MTU_IMSC);
- } else {
- /* Generate an interrupt to start the clockevent again */
- (void) nmdk_clkevt_next(nmdk_cycle, NULL);
- }
-}
-
-static void nmdk_clkevt_mode(enum clock_event_mode mode,
- struct clock_event_device *dev)
-{
- switch (mode) {
- case CLOCK_EVT_MODE_PERIODIC:
- clkevt_periodic = true;
- nmdk_clkevt_reset();
- break;
- case CLOCK_EVT_MODE_ONESHOT:
- clkevt_periodic = false;
- break;
- case CLOCK_EVT_MODE_SHUTDOWN:
- case CLOCK_EVT_MODE_UNUSED:
- writel(0, mtu_base + MTU_IMSC);
- /* disable timer */
- writel(0, mtu_base + MTU_CR(1));
- /* load some high default value */
- writel(0xffffffff, mtu_base + MTU_LR(1));
- break;
- case CLOCK_EVT_MODE_RESUME:
- break;
- }
-}
-
-static struct clock_event_device nmdk_clkevt = {
- .name = "mtu_1",
- .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
- .rating = 200,
- .set_mode = nmdk_clkevt_mode,
- .set_next_event = nmdk_clkevt_next,
-};
-
-/*
- * IRQ Handler for timer 1 of the MTU block.
- */
-static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id)
-{
- struct clock_event_device *evdev = dev_id;
-
- writel(1 << 1, mtu_base + MTU_ICR); /* Interrupt clear reg */
- evdev->event_handler(evdev);
- return IRQ_HANDLED;
-}
-
-static struct irqaction nmdk_timer_irq = {
- .name = "Nomadik Timer Tick",
- .flags = IRQF_DISABLED | IRQF_TIMER,
- .handler = nmdk_timer_interrupt,
- .dev_id = &nmdk_clkevt,
-};
-
-void nmdk_clksrc_reset(void)
-{
- /* Disable */
- writel(0, mtu_base + MTU_CR(0));
-
- /* ClockSource: configure load and background-load, and fire it up */
- writel(nmdk_cycle, mtu_base + MTU_LR(0));
- writel(nmdk_cycle, mtu_base + MTU_BGLR(0));
-
- writel(clk_prescale | MTU_CRn_32BITS | MTU_CRn_ENA,
- mtu_base + MTU_CR(0));
-}
-
-void __init nmdk_timer_init(void __iomem *base, int irq)
-{
- unsigned long rate;
- struct clk *clk0;
-
- mtu_base = base;
- clk0 = clk_get_sys("mtu0", NULL);
- BUG_ON(IS_ERR(clk0));
- BUG_ON(clk_prepare(clk0) < 0);
- BUG_ON(clk_enable(clk0) < 0);
-
- /*
- * Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz
- * for ux500.
- * Use a divide-by-16 counter if the tick rate is more than 32MHz.
- * At 32 MHz, the timer (with 32 bit counter) can be programmed
- * to wake-up@a max 127s a head in time. Dividing a 2.4 MHz timer
- * with 16 gives too low timer resolution.
- */
- rate = clk_get_rate(clk0);
- if (rate > 32000000) {
- rate /= 16;
- clk_prescale = MTU_CRn_PRESCALE_16;
- } else {
- clk_prescale = MTU_CRn_PRESCALE_1;
- }
-
- /* Cycles for periodic mode */
- nmdk_cycle = DIV_ROUND_CLOSEST(rate, HZ);
-
-
- /* Timer 0 is the free running clocksource */
- nmdk_clksrc_reset();
-
- if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0",
- rate, 200, 32, clocksource_mmio_readl_down))
- pr_err("timer: failed to initialize clock source %s\n",
- "mtu_0");
-
-#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
- setup_sched_clock(nomadik_read_sched_clock, 32, rate);
-#endif
-
- /* Timer 1 is used for events, register irq and clockevents */
- setup_irq(irq, &nmdk_timer_irq);
- nmdk_clkevt.cpumask = cpumask_of(0);
- clockevents_config_and_register(&nmdk_clkevt, rate, 2, 0xffffffffU);
-}
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index fbd9b2b..5bc09ee 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -216,7 +216,7 @@ config HW_RANDOM_MXC_RNGA
config HW_RANDOM_NOMADIK
tristate "ST-Ericsson Nomadik Random Number Generator support"
- depends on HW_RANDOM && PLAT_NOMADIK
+ depends on HW_RANDOM && ARCH_NOMADIK
---help---
This driver provides kernel-side support for the Random Number
Generator hardware found on ST-Ericsson SoCs (8815 and 8500).
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 6a78073..c9f67de 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -22,6 +22,21 @@ config DW_APB_TIMER_OF
config ARMADA_370_XP_TIMER
bool
+config CLKSRC_NOMADIK_MTU
+ bool
+ depends on (ARCH_NOMADIK || ARCH_U8500)
+ select CLKSRC_MMIO
+ help
+ Support for Multi Timer Unit. MTU provides access
+ to multiple interrupt generating programmable
+ 32-bit free running decrementing counters.
+
+config CLKSRC_NOMADIK_MTU_SCHED_CLOCK
+ bool
+ depends on CLKSRC_NOMADIK_MTU
+ help
+ Use the Multi Timer Unit as the sched_clock.
+
config CLKSRC_DBX500_PRCMU
bool "Clocksource PRCMU Timer"
depends on UX500_SOC_DB8500
@@ -31,7 +46,7 @@ config CLKSRC_DBX500_PRCMU
config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
bool "Clocksource PRCMU Timer sched_clock"
- depends on (CLKSRC_DBX500_PRCMU && !NOMADIK_MTU_SCHED_CLOCK)
+ depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK)
default y
help
Use the always on PRCMU Timer as sched_clock
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 603be36..24fb888 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_CLKBLD_I8253) += i8253.o
obj-$(CONFIG_CLKSRC_MMIO) += mmio.o
obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o
obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o
+obj-$(CONFIG_CLKSRC_NOMADIK_MTU) += nomadik-mtu.o
obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o
obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o
obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
diff --git a/drivers/clocksource/nomadik-mtu.c b/drivers/clocksource/nomadik-mtu.c
new file mode 100644
index 0000000..23c780b
--- /dev/null
+++ b/drivers/clocksource/nomadik-mtu.c
@@ -0,0 +1,224 @@
+/*
+ * Copyright (C) 2008 STMicroelectronics
+ * Copyright (C) 2010 Alessandro Rubini
+ * Copyright (C) 2010 Linus Walleij for ST-Ericsson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/clockchips.h>
+#include <linux/clocksource.h>
+#include <linux/clk.h>
+#include <linux/jiffies.h>
+#include <linux/err.h>
+#include <linux/platform_data/clocksource-nomadik-mtu.h>
+#include <asm/mach/time.h>
+#include <asm/sched_clock.h>
+
+/*
+ * The MTU device hosts four different counters, with 4 set of
+ * registers. These are register names.
+ */
+
+#define MTU_IMSC 0x00 /* Interrupt mask set/clear */
+#define MTU_RIS 0x04 /* Raw interrupt status */
+#define MTU_MIS 0x08 /* Masked interrupt status */
+#define MTU_ICR 0x0C /* Interrupt clear register */
+
+/* per-timer registers take 0..3 as argument */
+#define MTU_LR(x) (0x10 + 0x10 * (x) + 0x00) /* Load value */
+#define MTU_VAL(x) (0x10 + 0x10 * (x) + 0x04) /* Current value */
+#define MTU_CR(x) (0x10 + 0x10 * (x) + 0x08) /* Control reg */
+#define MTU_BGLR(x) (0x10 + 0x10 * (x) + 0x0c) /* At next overflow */
+
+/* bits for the control register */
+#define MTU_CRn_ENA 0x80
+#define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */
+#define MTU_CRn_PRESCALE_MASK 0x0c
+#define MTU_CRn_PRESCALE_1 0x00
+#define MTU_CRn_PRESCALE_16 0x04
+#define MTU_CRn_PRESCALE_256 0x08
+#define MTU_CRn_32BITS 0x02
+#define MTU_CRn_ONESHOT 0x01 /* if 0 = wraps reloading from BGLR*/
+
+/* Other registers are usual amba/primecell registers, currently not used */
+#define MTU_ITCR 0xff0
+#define MTU_ITOP 0xff4
+
+#define MTU_PERIPH_ID0 0xfe0
+#define MTU_PERIPH_ID1 0xfe4
+#define MTU_PERIPH_ID2 0xfe8
+#define MTU_PERIPH_ID3 0xfeC
+
+#define MTU_PCELL0 0xff0
+#define MTU_PCELL1 0xff4
+#define MTU_PCELL2 0xff8
+#define MTU_PCELL3 0xffC
+
+static void __iomem *mtu_base;
+static bool clkevt_periodic;
+static u32 clk_prescale;
+static u32 nmdk_cycle; /* write-once */
+
+#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
+/*
+ * Override the global weak sched_clock symbol with this
+ * local implementation which uses the clocksource to get some
+ * better resolution when scheduling the kernel.
+ */
+static u32 notrace nomadik_read_sched_clock(void)
+{
+ if (unlikely(!mtu_base))
+ return 0;
+
+ return -readl(mtu_base + MTU_VAL(0));
+}
+#endif
+
+/* Clockevent device: use one-shot mode */
+static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev)
+{
+ writel(1 << 1, mtu_base + MTU_IMSC);
+ writel(evt, mtu_base + MTU_LR(1));
+ /* Load highest value, enable device, enable interrupts */
+ writel(MTU_CRn_ONESHOT | clk_prescale |
+ MTU_CRn_32BITS | MTU_CRn_ENA,
+ mtu_base + MTU_CR(1));
+
+ return 0;
+}
+
+void nmdk_clkevt_reset(void)
+{
+ if (clkevt_periodic) {
+ /* Timer: configure load and background-load, and fire it up */
+ writel(nmdk_cycle, mtu_base + MTU_LR(1));
+ writel(nmdk_cycle, mtu_base + MTU_BGLR(1));
+
+ writel(MTU_CRn_PERIODIC | clk_prescale |
+ MTU_CRn_32BITS | MTU_CRn_ENA,
+ mtu_base + MTU_CR(1));
+ writel(1 << 1, mtu_base + MTU_IMSC);
+ } else {
+ /* Generate an interrupt to start the clockevent again */
+ (void) nmdk_clkevt_next(nmdk_cycle, NULL);
+ }
+}
+
+static void nmdk_clkevt_mode(enum clock_event_mode mode,
+ struct clock_event_device *dev)
+{
+ switch (mode) {
+ case CLOCK_EVT_MODE_PERIODIC:
+ clkevt_periodic = true;
+ nmdk_clkevt_reset();
+ break;
+ case CLOCK_EVT_MODE_ONESHOT:
+ clkevt_periodic = false;
+ break;
+ case CLOCK_EVT_MODE_SHUTDOWN:
+ case CLOCK_EVT_MODE_UNUSED:
+ writel(0, mtu_base + MTU_IMSC);
+ /* disable timer */
+ writel(0, mtu_base + MTU_CR(1));
+ /* load some high default value */
+ writel(0xffffffff, mtu_base + MTU_LR(1));
+ break;
+ case CLOCK_EVT_MODE_RESUME:
+ break;
+ }
+}
+
+static struct clock_event_device nmdk_clkevt = {
+ .name = "mtu_1",
+ .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
+ .rating = 200,
+ .set_mode = nmdk_clkevt_mode,
+ .set_next_event = nmdk_clkevt_next,
+};
+
+/*
+ * IRQ Handler for timer 1 of the MTU block.
+ */
+static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id)
+{
+ struct clock_event_device *evdev = dev_id;
+
+ writel(1 << 1, mtu_base + MTU_ICR); /* Interrupt clear reg */
+ evdev->event_handler(evdev);
+ return IRQ_HANDLED;
+}
+
+static struct irqaction nmdk_timer_irq = {
+ .name = "Nomadik Timer Tick",
+ .flags = IRQF_DISABLED | IRQF_TIMER,
+ .handler = nmdk_timer_interrupt,
+ .dev_id = &nmdk_clkevt,
+};
+
+void nmdk_clksrc_reset(void)
+{
+ /* Disable */
+ writel(0, mtu_base + MTU_CR(0));
+
+ /* ClockSource: configure load and background-load, and fire it up */
+ writel(nmdk_cycle, mtu_base + MTU_LR(0));
+ writel(nmdk_cycle, mtu_base + MTU_BGLR(0));
+
+ writel(clk_prescale | MTU_CRn_32BITS | MTU_CRn_ENA,
+ mtu_base + MTU_CR(0));
+}
+
+void __init nmdk_timer_init(void __iomem *base, int irq)
+{
+ unsigned long rate;
+ struct clk *clk0;
+
+ mtu_base = base;
+ clk0 = clk_get_sys("mtu0", NULL);
+ BUG_ON(IS_ERR(clk0));
+ BUG_ON(clk_prepare(clk0) < 0);
+ BUG_ON(clk_enable(clk0) < 0);
+
+ /*
+ * Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz
+ * for ux500.
+ * Use a divide-by-16 counter if the tick rate is more than 32MHz.
+ * At 32 MHz, the timer (with 32 bit counter) can be programmed
+ * to wake-up@a max 127s a head in time. Dividing a 2.4 MHz timer
+ * with 16 gives too low timer resolution.
+ */
+ rate = clk_get_rate(clk0);
+ if (rate > 32000000) {
+ rate /= 16;
+ clk_prescale = MTU_CRn_PRESCALE_16;
+ } else {
+ clk_prescale = MTU_CRn_PRESCALE_1;
+ }
+
+ /* Cycles for periodic mode */
+ nmdk_cycle = DIV_ROUND_CLOSEST(rate, HZ);
+
+
+ /* Timer 0 is the free running clocksource */
+ nmdk_clksrc_reset();
+
+ if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0",
+ rate, 200, 32, clocksource_mmio_readl_down))
+ pr_err("timer: failed to initialize clock source %s\n",
+ "mtu_0");
+
+#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
+ setup_sched_clock(nomadik_read_sched_clock, 32, rate);
+#endif
+
+ /* Timer 1 is used for events, register irq and clockevents */
+ setup_irq(irq, &nmdk_timer_irq);
+ nmdk_clkevt.cpumask = cpumask_of(0);
+ clockevents_config_and_register(&nmdk_clkevt, rate, 2, 0xffffffffU);
+}
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index b4b65af..855fc52 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -408,7 +408,7 @@ config KEYBOARD_NEWTON
config KEYBOARD_NOMADIK
tristate "ST-Ericsson Nomadik SKE keyboard"
- depends on PLAT_NOMADIK
+ depends on (ARCH_NOMADIK || ARCH_U8500)
select INPUT_MATRIXKMAP
help
Say Y here if you want to use a keypad provided on the SKE controller
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 4883139..e4f5748 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -559,7 +559,7 @@ config MTD_NAND_JZ4740
config MTD_NAND_FSMC
tristate "Support for NAND on ST Micros FSMC"
- depends on PLAT_SPEAR || PLAT_NOMADIK || MACH_U300
+ depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || MACH_U300
help
Enables support for NAND Flash chips on the ST Microelectronics
Flexible Static Memory Controller (FSMC)
diff --git a/include/linux/platform_data/clocksource-nomadik-mtu.h b/include/linux/platform_data/clocksource-nomadik-mtu.h
new file mode 100644
index 0000000..8008897
--- /dev/null
+++ b/include/linux/platform_data/clocksource-nomadik-mtu.h
@@ -0,0 +1,9 @@
+#ifndef __PLAT_MTU_H
+#define __PLAT_MTU_H
+
+void nmdk_timer_init(void __iomem *base, int irq);
+void nmdk_clkevt_reset(void);
+void nmdk_clksrc_reset(void);
+
+#endif /* __PLAT_MTU_H */
+
--
1.7.11.3
^ permalink raw reply related
* [PATCH 4/8] ARM: plat-nomadik: move DMA40 header to <linux/platform_data>
From: Linus Walleij @ 2012-10-18 17:18 UTC (permalink / raw)
To: linux-arm-kernel
From: Linus Walleij <linus.walleij@linaro.org>
This moves the DMA40 platform data header from <plat/ste_dma40.h>
to <linux/platform_data/dma-ste-dma40.h> where is belongs.
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Dan Williams <djbw@fb.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Ola Lilja <ola.o.lilja@stericsson.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Andreas Westin <andreas.westin@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/mach-ux500/board-mop500-audio.c | 3 +-
arch/arm/mach-ux500/board-mop500-sdi.c | 2 +-
arch/arm/mach-ux500/board-mop500.c | 3 +-
arch/arm/mach-ux500/devices-db8500.c | 3 +-
arch/arm/mach-ux500/include/mach/msp.h | 2 +-
arch/arm/mach-ux500/usb.c | 4 +-
arch/arm/plat-nomadik/include/plat/ste_dma40.h | 223 -------------------------
drivers/crypto/ux500/cryp/cryp_core.c | 3 +-
drivers/dma/ste_dma40.c | 3 +-
drivers/dma/ste_dma40_ll.c | 2 +-
include/linux/platform_data/crypto-ux500.h | 2 +-
include/linux/platform_data/dma-ste-dma40.h | 223 +++++++++++++++++++++++++
sound/soc/ux500/ux500_pcm.c | 3 +-
13 files changed, 235 insertions(+), 241 deletions(-)
delete mode 100644 arch/arm/plat-nomadik/include/plat/ste_dma40.h
create mode 100644 include/linux/platform_data/dma-ste-dma40.h
diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c
index 33631c9..71a2ca7 100644
--- a/arch/arm/mach-ux500/board-mop500-audio.c
+++ b/arch/arm/mach-ux500/board-mop500-audio.c
@@ -8,8 +8,7 @@
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/platform_data/pinctrl-nomadik.h>
-
-#include <plat/ste_dma40.h>
+#include <linux/platform_data/dma-ste-dma40.h>
#include <mach/devices.h>
#include <mach/hardware.h>
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index 9c8e4a9..051b62c 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -11,9 +11,9 @@
#include <linux/amba/mmci.h>
#include <linux/mmc/host.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/dma-ste-dma40.h>
#include <asm/mach-types.h>
-#include <plat/ste_dma40.h>
#include <mach/devices.h>
#include <mach/hardware.h>
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 0a3dd60..0213e89 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -38,13 +38,12 @@
#include <linux/leds.h>
#include <linux/pinctrl/consumer.h>
#include <linux/platform_data/pinctrl-nomadik.h>
+#include <linux/platform_data/dma-ste-dma40.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/hardware/gic.h>
-#include <plat/ste_dma40.h>
-
#include <mach/hardware.h>
#include <mach/setup.h>
#include <mach/devices.h>
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index 91754a8..bdc963c 100644
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -12,8 +12,7 @@
#include <linux/gpio.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl022.h>
-
-#include <plat/ste_dma40.h>
+#include <linux/platform_data/dma-ste-dma40.h>
#include <mach/hardware.h>
#include <mach/setup.h>
diff --git a/arch/arm/mach-ux500/include/mach/msp.h b/arch/arm/mach-ux500/include/mach/msp.h
index 3cc7142..9991aea 100644
--- a/arch/arm/mach-ux500/include/mach/msp.h
+++ b/arch/arm/mach-ux500/include/mach/msp.h
@@ -8,7 +8,7 @@
#ifndef __MSP_H
#define __MSP_H
-#include <plat/ste_dma40.h>
+#include <linux/platform_data/dma-ste-dma40.h>
enum msp_i2s_id {
MSP_I2S_0 = 0,
diff --git a/arch/arm/mach-ux500/usb.c b/arch/arm/mach-ux500/usb.c
index 145482e..78ac65f 100644
--- a/arch/arm/mach-ux500/usb.c
+++ b/arch/arm/mach-ux500/usb.c
@@ -7,10 +7,10 @@
#include <linux/platform_device.h>
#include <linux/usb/musb.h>
#include <linux/dma-mapping.h>
+#include <linux/platform_data/usb-musb-ux500.h>
+#include <linux/platform_data/dma-ste-dma40.h>
-#include <plat/ste_dma40.h>
#include <mach/hardware.h>
-#include <linux/platform_data/usb-musb-ux500.h>
#define MUSB_DMA40_RX_CH { \
.mode = STEDMA40_MODE_LOGICAL, \
diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
deleted file mode 100644
index 9ff93b0..0000000
--- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h
+++ /dev/null
@@ -1,223 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2007-2010
- * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson
- * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
- * License terms: GNU General Public License (GPL) version 2
- */
-
-
-#ifndef STE_DMA40_H
-#define STE_DMA40_H
-
-#include <linux/dmaengine.h>
-#include <linux/scatterlist.h>
-#include <linux/workqueue.h>
-#include <linux/interrupt.h>
-
-/*
- * Maxium size for a single dma descriptor
- * Size is limited to 16 bits.
- * Size is in the units of addr-widths (1,2,4,8 bytes)
- * Larger transfers will be split up to multiple linked desc
- */
-#define STEDMA40_MAX_SEG_SIZE 0xFFFF
-
-/* dev types for memcpy */
-#define STEDMA40_DEV_DST_MEMORY (-1)
-#define STEDMA40_DEV_SRC_MEMORY (-1)
-
-enum stedma40_mode {
- STEDMA40_MODE_LOGICAL = 0,
- STEDMA40_MODE_PHYSICAL,
- STEDMA40_MODE_OPERATION,
-};
-
-enum stedma40_mode_opt {
- STEDMA40_PCHAN_BASIC_MODE = 0,
- STEDMA40_LCHAN_SRC_LOG_DST_LOG = 0,
- STEDMA40_PCHAN_MODULO_MODE,
- STEDMA40_PCHAN_DOUBLE_DST_MODE,
- STEDMA40_LCHAN_SRC_PHY_DST_LOG,
- STEDMA40_LCHAN_SRC_LOG_DST_PHY,
-};
-
-#define STEDMA40_ESIZE_8_BIT 0x0
-#define STEDMA40_ESIZE_16_BIT 0x1
-#define STEDMA40_ESIZE_32_BIT 0x2
-#define STEDMA40_ESIZE_64_BIT 0x3
-
-/* The value 4 indicates that PEN-reg shall be set to 0 */
-#define STEDMA40_PSIZE_PHY_1 0x4
-#define STEDMA40_PSIZE_PHY_2 0x0
-#define STEDMA40_PSIZE_PHY_4 0x1
-#define STEDMA40_PSIZE_PHY_8 0x2
-#define STEDMA40_PSIZE_PHY_16 0x3
-
-/*
- * The number of elements differ in logical and
- * physical mode
- */
-#define STEDMA40_PSIZE_LOG_1 STEDMA40_PSIZE_PHY_2
-#define STEDMA40_PSIZE_LOG_4 STEDMA40_PSIZE_PHY_4
-#define STEDMA40_PSIZE_LOG_8 STEDMA40_PSIZE_PHY_8
-#define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16
-
-/* Maximum number of possible physical channels */
-#define STEDMA40_MAX_PHYS 32
-
-enum stedma40_flow_ctrl {
- STEDMA40_NO_FLOW_CTRL,
- STEDMA40_FLOW_CTRL,
-};
-
-enum stedma40_periph_data_width {
- STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT,
- STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT,
- STEDMA40_WORD_WIDTH = STEDMA40_ESIZE_32_BIT,
- STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT
-};
-
-enum stedma40_xfer_dir {
- STEDMA40_MEM_TO_MEM = 1,
- STEDMA40_MEM_TO_PERIPH,
- STEDMA40_PERIPH_TO_MEM,
- STEDMA40_PERIPH_TO_PERIPH
-};
-
-
-/**
- * struct stedma40_chan_cfg - dst/src channel configuration
- *
- * @big_endian: true if the src/dst should be read as big endian
- * @data_width: Data width of the src/dst hardware
- * @p_size: Burst size
- * @flow_ctrl: Flow control on/off.
- */
-struct stedma40_half_channel_info {
- bool big_endian;
- enum stedma40_periph_data_width data_width;
- int psize;
- enum stedma40_flow_ctrl flow_ctrl;
-};
-
-/**
- * struct stedma40_chan_cfg - Structure to be filled by client drivers.
- *
- * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH
- * @high_priority: true if high-priority
- * @realtime: true if realtime mode is to be enabled. Only available on DMA40
- * version 3+, i.e DB8500v2+
- * @mode: channel mode: physical, logical, or operation
- * @mode_opt: options for the chosen channel mode
- * @src_dev_type: Src device type
- * @dst_dev_type: Dst device type
- * @src_info: Parameters for dst half channel
- * @dst_info: Parameters for dst half channel
- * @use_fixed_channel: if true, use physical channel specified by phy_channel
- * @phy_channel: physical channel to use, only if use_fixed_channel is true
- *
- * This structure has to be filled by the client drivers.
- * It is recommended to do all dma configurations for clients in the machine.
- *
- */
-struct stedma40_chan_cfg {
- enum stedma40_xfer_dir dir;
- bool high_priority;
- bool realtime;
- enum stedma40_mode mode;
- enum stedma40_mode_opt mode_opt;
- int src_dev_type;
- int dst_dev_type;
- struct stedma40_half_channel_info src_info;
- struct stedma40_half_channel_info dst_info;
-
- bool use_fixed_channel;
- int phy_channel;
-};
-
-/**
- * struct stedma40_platform_data - Configuration struct for the dma device.
- *
- * @dev_len: length of dev_tx and dev_rx
- * @dev_tx: mapping between destination event line and io address
- * @dev_rx: mapping between source event line and io address
- * @memcpy: list of memcpy event lines
- * @memcpy_len: length of memcpy
- * @memcpy_conf_phy: default configuration of physical channel memcpy
- * @memcpy_conf_log: default configuration of logical channel memcpy
- * @disabled_channels: A vector, ending with -1, that marks physical channels
- * that are for different reasons not available for the driver.
- */
-struct stedma40_platform_data {
- u32 dev_len;
- const dma_addr_t *dev_tx;
- const dma_addr_t *dev_rx;
- int *memcpy;
- u32 memcpy_len;
- struct stedma40_chan_cfg *memcpy_conf_phy;
- struct stedma40_chan_cfg *memcpy_conf_log;
- int disabled_channels[STEDMA40_MAX_PHYS];
- bool use_esram_lcla;
-};
-
-#ifdef CONFIG_STE_DMA40
-
-/**
- * stedma40_filter() - Provides stedma40_chan_cfg to the
- * ste_dma40 dma driver via the dmaengine framework.
- * does some checking of what's provided.
- *
- * Never directly called by client. It used by dmaengine.
- * @chan: dmaengine handle.
- * @data: Must be of type: struct stedma40_chan_cfg and is
- * the configuration of the framework.
- *
- *
- */
-
-bool stedma40_filter(struct dma_chan *chan, void *data);
-
-/**
- * stedma40_slave_mem() - Transfers a raw data buffer to or from a slave
- * (=device)
- *
- * @chan: dmaengine handle
- * @addr: source or destination physicall address.
- * @size: bytes to transfer
- * @direction: direction of transfer
- * @flags: is actually enum dma_ctrl_flags. See dmaengine.h
- */
-
-static inline struct
-dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
- dma_addr_t addr,
- unsigned int size,
- enum dma_transfer_direction direction,
- unsigned long flags)
-{
- struct scatterlist sg;
- sg_init_table(&sg, 1);
- sg.dma_address = addr;
- sg.length = size;
-
- return dmaengine_prep_slave_sg(chan, &sg, 1, direction, flags);
-}
-
-#else
-static inline bool stedma40_filter(struct dma_chan *chan, void *data)
-{
- return false;
-}
-
-static inline struct
-dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
- dma_addr_t addr,
- unsigned int size,
- enum dma_transfer_direction direction,
- unsigned long flags)
-{
- return NULL;
-}
-#endif
-
-#endif
diff --git a/drivers/crypto/ux500/cryp/cryp_core.c b/drivers/crypto/ux500/cryp/cryp_core.c
index bc615cc..8bc5fef 100644
--- a/drivers/crypto/ux500/cryp/cryp_core.c
+++ b/drivers/crypto/ux500/cryp/cryp_core.c
@@ -23,6 +23,7 @@
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
#include <linux/semaphore.h>
+#include <linux/platform_data/dma-ste-dma40.h>
#include <crypto/aes.h>
#include <crypto/algapi.h>
@@ -30,8 +31,6 @@
#include <crypto/des.h>
#include <crypto/scatterwalk.h>
-#include <plat/ste_dma40.h>
-
#include <linux/platform_data/crypto-ux500.h>
#include <mach/hardware.h>
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index ae55091..23c5573 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -19,8 +19,7 @@
#include <linux/err.h>
#include <linux/amba/bus.h>
#include <linux/regulator/consumer.h>
-
-#include <plat/ste_dma40.h>
+#include <linux/platform_data/dma-ste-dma40.h>
#include "dmaengine.h"
#include "ste_dma40_ll.h"
diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c
index cad9e1d..851ad56 100644
--- a/drivers/dma/ste_dma40_ll.c
+++ b/drivers/dma/ste_dma40_ll.c
@@ -6,7 +6,7 @@
*/
#include <linux/kernel.h>
-#include <plat/ste_dma40.h>
+#include <linux/platform_data/dma-ste-dma40.h>
#include "ste_dma40_ll.h"
diff --git a/include/linux/platform_data/crypto-ux500.h b/include/linux/platform_data/crypto-ux500.h
index 5b2d081..94df96d 100644
--- a/include/linux/platform_data/crypto-ux500.h
+++ b/include/linux/platform_data/crypto-ux500.h
@@ -7,7 +7,7 @@
#ifndef _CRYPTO_UX500_H
#define _CRYPTO_UX500_H
#include <linux/dmaengine.h>
-#include <plat/ste_dma40.h>
+#include <linux/platform_data/dma-ste-dma40.h>
struct hash_platform_data {
void *mem_to_engine;
diff --git a/include/linux/platform_data/dma-ste-dma40.h b/include/linux/platform_data/dma-ste-dma40.h
new file mode 100644
index 0000000..9ff93b0
--- /dev/null
+++ b/include/linux/platform_data/dma-ste-dma40.h
@@ -0,0 +1,223 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2007-2010
+ * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson
+ * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
+ * License terms: GNU General Public License (GPL) version 2
+ */
+
+
+#ifndef STE_DMA40_H
+#define STE_DMA40_H
+
+#include <linux/dmaengine.h>
+#include <linux/scatterlist.h>
+#include <linux/workqueue.h>
+#include <linux/interrupt.h>
+
+/*
+ * Maxium size for a single dma descriptor
+ * Size is limited to 16 bits.
+ * Size is in the units of addr-widths (1,2,4,8 bytes)
+ * Larger transfers will be split up to multiple linked desc
+ */
+#define STEDMA40_MAX_SEG_SIZE 0xFFFF
+
+/* dev types for memcpy */
+#define STEDMA40_DEV_DST_MEMORY (-1)
+#define STEDMA40_DEV_SRC_MEMORY (-1)
+
+enum stedma40_mode {
+ STEDMA40_MODE_LOGICAL = 0,
+ STEDMA40_MODE_PHYSICAL,
+ STEDMA40_MODE_OPERATION,
+};
+
+enum stedma40_mode_opt {
+ STEDMA40_PCHAN_BASIC_MODE = 0,
+ STEDMA40_LCHAN_SRC_LOG_DST_LOG = 0,
+ STEDMA40_PCHAN_MODULO_MODE,
+ STEDMA40_PCHAN_DOUBLE_DST_MODE,
+ STEDMA40_LCHAN_SRC_PHY_DST_LOG,
+ STEDMA40_LCHAN_SRC_LOG_DST_PHY,
+};
+
+#define STEDMA40_ESIZE_8_BIT 0x0
+#define STEDMA40_ESIZE_16_BIT 0x1
+#define STEDMA40_ESIZE_32_BIT 0x2
+#define STEDMA40_ESIZE_64_BIT 0x3
+
+/* The value 4 indicates that PEN-reg shall be set to 0 */
+#define STEDMA40_PSIZE_PHY_1 0x4
+#define STEDMA40_PSIZE_PHY_2 0x0
+#define STEDMA40_PSIZE_PHY_4 0x1
+#define STEDMA40_PSIZE_PHY_8 0x2
+#define STEDMA40_PSIZE_PHY_16 0x3
+
+/*
+ * The number of elements differ in logical and
+ * physical mode
+ */
+#define STEDMA40_PSIZE_LOG_1 STEDMA40_PSIZE_PHY_2
+#define STEDMA40_PSIZE_LOG_4 STEDMA40_PSIZE_PHY_4
+#define STEDMA40_PSIZE_LOG_8 STEDMA40_PSIZE_PHY_8
+#define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16
+
+/* Maximum number of possible physical channels */
+#define STEDMA40_MAX_PHYS 32
+
+enum stedma40_flow_ctrl {
+ STEDMA40_NO_FLOW_CTRL,
+ STEDMA40_FLOW_CTRL,
+};
+
+enum stedma40_periph_data_width {
+ STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT,
+ STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT,
+ STEDMA40_WORD_WIDTH = STEDMA40_ESIZE_32_BIT,
+ STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT
+};
+
+enum stedma40_xfer_dir {
+ STEDMA40_MEM_TO_MEM = 1,
+ STEDMA40_MEM_TO_PERIPH,
+ STEDMA40_PERIPH_TO_MEM,
+ STEDMA40_PERIPH_TO_PERIPH
+};
+
+
+/**
+ * struct stedma40_chan_cfg - dst/src channel configuration
+ *
+ * @big_endian: true if the src/dst should be read as big endian
+ * @data_width: Data width of the src/dst hardware
+ * @p_size: Burst size
+ * @flow_ctrl: Flow control on/off.
+ */
+struct stedma40_half_channel_info {
+ bool big_endian;
+ enum stedma40_periph_data_width data_width;
+ int psize;
+ enum stedma40_flow_ctrl flow_ctrl;
+};
+
+/**
+ * struct stedma40_chan_cfg - Structure to be filled by client drivers.
+ *
+ * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH
+ * @high_priority: true if high-priority
+ * @realtime: true if realtime mode is to be enabled. Only available on DMA40
+ * version 3+, i.e DB8500v2+
+ * @mode: channel mode: physical, logical, or operation
+ * @mode_opt: options for the chosen channel mode
+ * @src_dev_type: Src device type
+ * @dst_dev_type: Dst device type
+ * @src_info: Parameters for dst half channel
+ * @dst_info: Parameters for dst half channel
+ * @use_fixed_channel: if true, use physical channel specified by phy_channel
+ * @phy_channel: physical channel to use, only if use_fixed_channel is true
+ *
+ * This structure has to be filled by the client drivers.
+ * It is recommended to do all dma configurations for clients in the machine.
+ *
+ */
+struct stedma40_chan_cfg {
+ enum stedma40_xfer_dir dir;
+ bool high_priority;
+ bool realtime;
+ enum stedma40_mode mode;
+ enum stedma40_mode_opt mode_opt;
+ int src_dev_type;
+ int dst_dev_type;
+ struct stedma40_half_channel_info src_info;
+ struct stedma40_half_channel_info dst_info;
+
+ bool use_fixed_channel;
+ int phy_channel;
+};
+
+/**
+ * struct stedma40_platform_data - Configuration struct for the dma device.
+ *
+ * @dev_len: length of dev_tx and dev_rx
+ * @dev_tx: mapping between destination event line and io address
+ * @dev_rx: mapping between source event line and io address
+ * @memcpy: list of memcpy event lines
+ * @memcpy_len: length of memcpy
+ * @memcpy_conf_phy: default configuration of physical channel memcpy
+ * @memcpy_conf_log: default configuration of logical channel memcpy
+ * @disabled_channels: A vector, ending with -1, that marks physical channels
+ * that are for different reasons not available for the driver.
+ */
+struct stedma40_platform_data {
+ u32 dev_len;
+ const dma_addr_t *dev_tx;
+ const dma_addr_t *dev_rx;
+ int *memcpy;
+ u32 memcpy_len;
+ struct stedma40_chan_cfg *memcpy_conf_phy;
+ struct stedma40_chan_cfg *memcpy_conf_log;
+ int disabled_channels[STEDMA40_MAX_PHYS];
+ bool use_esram_lcla;
+};
+
+#ifdef CONFIG_STE_DMA40
+
+/**
+ * stedma40_filter() - Provides stedma40_chan_cfg to the
+ * ste_dma40 dma driver via the dmaengine framework.
+ * does some checking of what's provided.
+ *
+ * Never directly called by client. It used by dmaengine.
+ * @chan: dmaengine handle.
+ * @data: Must be of type: struct stedma40_chan_cfg and is
+ * the configuration of the framework.
+ *
+ *
+ */
+
+bool stedma40_filter(struct dma_chan *chan, void *data);
+
+/**
+ * stedma40_slave_mem() - Transfers a raw data buffer to or from a slave
+ * (=device)
+ *
+ * @chan: dmaengine handle
+ * @addr: source or destination physicall address.
+ * @size: bytes to transfer
+ * @direction: direction of transfer
+ * @flags: is actually enum dma_ctrl_flags. See dmaengine.h
+ */
+
+static inline struct
+dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
+ dma_addr_t addr,
+ unsigned int size,
+ enum dma_transfer_direction direction,
+ unsigned long flags)
+{
+ struct scatterlist sg;
+ sg_init_table(&sg, 1);
+ sg.dma_address = addr;
+ sg.length = size;
+
+ return dmaengine_prep_slave_sg(chan, &sg, 1, direction, flags);
+}
+
+#else
+static inline bool stedma40_filter(struct dma_chan *chan, void *data)
+{
+ return false;
+}
+
+static inline struct
+dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
+ dma_addr_t addr,
+ unsigned int size,
+ enum dma_transfer_direction direction,
+ unsigned long flags)
+{
+ return NULL;
+}
+#endif
+
+#endif
diff --git a/sound/soc/ux500/ux500_pcm.c b/sound/soc/ux500/ux500_pcm.c
index 1a04e24..b55b79f 100644
--- a/sound/soc/ux500/ux500_pcm.c
+++ b/sound/soc/ux500/ux500_pcm.c
@@ -18,8 +18,7 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/slab.h>
-
-#include <plat/ste_dma40.h>
+#include <linux/platform_data/dma-ste-dma40.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
--
1.7.11.3
^ permalink raw reply related
* [PATCH 3/8] ARM: plat-nomadik: use DIV_ROUND_CLOSEST()
From: Linus Walleij @ 2012-10-18 17:18 UTC (permalink / raw)
To: linux-arm-kernel
From: Linus Walleij <linus.walleij@linaro.org>
Use DIV_ROUND_CLOSEST() to calculate the cycle counter for the
periodic mode instead of relying on homebrew reimplementation.
Cc: Alessandro Rubini <rubini@unipv.it>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/plat-nomadik/timer.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index 0ae2b06..f911430 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -201,7 +201,8 @@ void __init nmdk_timer_init(void __iomem *base, int irq)
clk_prescale = MTU_CRn_PRESCALE_1;
}
- nmdk_cycle = (rate + HZ/2) / HZ;
+ /* Cycles for periodic mode */
+ nmdk_cycle = DIV_ROUND_CLOSEST(rate, HZ);
/* Timer 0 is the free running clocksource */
--
1.7.11.3
^ permalink raw reply related
* [PATCH 2/8] ARM: plat-nomadik: pass IRQ to timer driver
From: Linus Walleij @ 2012-10-18 17:18 UTC (permalink / raw)
To: linux-arm-kernel
From: Linus Walleij <linus.walleij@linaro.org>
In order to convert the MTU timer to work with sparse IRQ we need
to pass the IRQ used when initializing instead of just letting
it rely on a special name being used in the IRQ header file.
Cc: Alessandro Rubini <rubini@unipv.it>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/mach-nomadik/board-nhk8815.c | 4 ++--
arch/arm/mach-ux500/timer.c | 2 +-
arch/arm/plat-nomadik/include/plat/mtu.h | 2 +-
arch/arm/plat-nomadik/timer.c | 4 ++--
4 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 22ef8a1..16f10e0 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -29,7 +29,6 @@
#include <asm/sizes.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <asm/mach/irq.h>
#include <asm/mach/flash.h>
#include <asm/mach/time.h>
@@ -37,6 +36,7 @@
#include <linux/platform_data/mtd-nomadik-nand.h>
#include <mach/fsmc.h>
+#include <mach/irqs.h>
#include "cpu-8815.h"
@@ -260,7 +260,7 @@ static void __init nomadik_timer_init(void)
src_cr |= SRC_CR_INIT_VAL;
writel(src_cr, io_p2v(NOMADIK_SRC_BASE));
- nmdk_timer_init(io_p2v(NOMADIK_MTU0_BASE));
+ nmdk_timer_init(io_p2v(NOMADIK_MTU0_BASE), IRQ_MTU0);
}
static struct sys_timer nomadik_timer = {
diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c
index 6f39731..20d02fa 100644
--- a/arch/arm/mach-ux500/timer.c
+++ b/arch/arm/mach-ux500/timer.c
@@ -96,7 +96,7 @@ dt_fail:
*
*/
- nmdk_timer_init(mtu_timer_base);
+ nmdk_timer_init(mtu_timer_base, IRQ_MTU0);
clksrc_dbx500_prcmu_init(prcmu_timer_base);
ux500_twd_init();
}
diff --git a/arch/arm/plat-nomadik/include/plat/mtu.h b/arch/arm/plat-nomadik/include/plat/mtu.h
index 582641f..8008897 100644
--- a/arch/arm/plat-nomadik/include/plat/mtu.h
+++ b/arch/arm/plat-nomadik/include/plat/mtu.h
@@ -1,7 +1,7 @@
#ifndef __PLAT_MTU_H
#define __PLAT_MTU_H
-void nmdk_timer_init(void __iomem *base);
+void nmdk_timer_init(void __iomem *base, int irq);
void nmdk_clkevt_reset(void);
void nmdk_clksrc_reset(void);
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index 9222e55..0ae2b06 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -174,7 +174,7 @@ void nmdk_clksrc_reset(void)
mtu_base + MTU_CR(0));
}
-void __init nmdk_timer_init(void __iomem *base)
+void __init nmdk_timer_init(void __iomem *base, int irq)
{
unsigned long rate;
struct clk *clk0;
@@ -217,7 +217,7 @@ void __init nmdk_timer_init(void __iomem *base)
#endif
/* Timer 1 is used for events, register irq and clockevents */
- setup_irq(IRQ_MTU0, &nmdk_timer_irq);
+ setup_irq(irq, &nmdk_timer_irq);
nmdk_clkevt.cpumask = cpumask_of(0);
clockevents_config_and_register(&nmdk_clkevt, rate, 2, 0xffffffffU);
}
--
1.7.11.3
^ permalink raw reply related
* [PATCH 1/8] clk/ux500: explicitly include register header
From: Linus Walleij @ 2012-10-18 17:18 UTC (permalink / raw)
To: linux-arm-kernel
From: Linus Walleij <linus.walleij@linaro.org>
The ux500 clock driver file named u8500_clk.c does not compile
if it loose implicit dependencies to <mach/db8500-regs.h>
(I have no clue what files will include this) which manifests
itself as I'm experimenting with SPARSE_IRQ so make the
dependency explicit.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Mike, if you don't take this in as a fix to the v3.7-rc:s
I request an ACK so I can merge this series together.
---
drivers/clk/ux500/u8500_clk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c
index ca4a25e..ab30ce8 100644
--- a/drivers/clk/ux500/u8500_clk.c
+++ b/drivers/clk/ux500/u8500_clk.c
@@ -12,7 +12,7 @@
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/platform_data/clk-ux500.h>
-
+#include <mach/db8500-regs.h>
#include "clk.h"
void u8500_clk_init(void)
--
1.7.11.3
^ permalink raw reply related
* [PATCH 0/8] Convert Ux500 to SPARSE_IRQ
From: Linus Walleij @ 2012-10-18 17:18 UTC (permalink / raw)
To: linux-arm-kernel
From: Linus Walleij <linus.walleij@linaro.org>
This patch series fixes the prerequisites and then converts Ux500
to SPARSE_IRQ.
- Patch [1/8] "clk/ux500: explicitly include register header"
can be applied as a fix to the -rc:s into Mikes clk tree.
If I shall keep it in this series I request Mike to ACK it.
- Patch [6/8] and [7/8] needs to be tested with device tree
boots to make sure they do not cause regressions, Lee can you
help me with this? After that I'd prefer to get Sam's ACK
and merge with this series so it becomes bisectable.
The rest is within my own Ux500/pinctrl domain.
However it is based off the nomadik branch in the pinctrl
tree and the dependency is hard to cut. Here is why:
- Earlier pinctrl patches (not in this series) alter the
<plat/gpio-nomadik.h> file, merges <plat/pincfg.h> and
finally move it down into
<linux/platform_data/pinctrl-nomadik.h>
- Then this series further moves <plat/ste_dma40.h> out of
the way and down into <linux/platform_data/dma-ste-dma40.h>
- Then there are some patches to the clocksource driver
residng in plat-nomadik/timer.c
- Finally the clocksource driver in plat-nomadik/timer.c
is moved out to drivers/clocksource/nomadik-mtu.c and
it's header is simultaneously moved to
<linux/platform_data/clocksource-nomadik-mtu.h>
- At this point, plat-nomadik is empty and must be deleted,
because apart from looking ugly, the build system does not
allow an empty Makefile.
So for this reason the final MTU patch will close the light
and delete plat-nomadik.
Imagine some of these files going through different trees...
(The alternative is of course to split the stuff across
two merge windows or something like that, but if all the
stuff shall go in at once this is the best I can think of.)
Therefore I will probably request that all the queued pinctrl
patches for Ux500 with this series on top be funneled into ARM
SoC for the next merge window once this series is deemed stable.
Alternatively I can carry all of it in the pinctrl tree with
proper ACKs.
After this series I tried turning on multiplatform for ux500
but there are still headers in <mach/*> creating problems
so we are still just halfway.
Linus Walleij (8):
clk/ux500: explicitly include register header
ARM: plat-nomadik: pass IRQ to timer driver
ARM: plat-nomadik: use DIV_ROUND_CLOSEST()
ARM: plat-nomadik: move DMA40 header to <linux/platform_data>
ARM: plat-nomadik: move MTU, kill plat-nomadik
mfd/ab8500-core: use irq_domain_add_simple()
mfd/db8500-prcmu: use the irq_domain_add_simple()
ARM: plat-nomadik: convert platforms to SPARSE_IRQ
arch/arm/Kconfig | 3 +-
arch/arm/Makefile | 1 -
arch/arm/mach-nomadik/Kconfig | 2 +-
arch/arm/mach-nomadik/board-nhk8815.c | 10 +-
arch/arm/mach-nomadik/include/mach/irqs.h | 2 +-
arch/arm/mach-ux500/Kconfig | 2 +-
arch/arm/mach-ux500/board-mop500-audio.c | 3 +-
arch/arm/mach-ux500/board-mop500-sdi.c | 2 +-
arch/arm/mach-ux500/board-mop500.c | 4 +-
arch/arm/mach-ux500/cpu-db8500.c | 1 +
arch/arm/mach-ux500/devices-common.c | 1 +
arch/arm/mach-ux500/devices-db8500.c | 4 +-
arch/arm/mach-ux500/devices-db8500.h | 1 +
arch/arm/mach-ux500/include/mach/irqs.h | 2 +-
arch/arm/mach-ux500/include/mach/msp.h | 2 +-
arch/arm/mach-ux500/timer.c | 5 +-
arch/arm/mach-ux500/usb.c | 4 +-
arch/arm/plat-nomadik/Kconfig | 29 ---
arch/arm/plat-nomadik/Makefile | 5 -
arch/arm/plat-nomadik/include/plat/mtu.h | 9 -
arch/arm/plat-nomadik/include/plat/ste_dma40.h | 223 --------------------
arch/arm/plat-nomadik/timer.c | 223 --------------------
drivers/char/hw_random/Kconfig | 2 +-
drivers/clk/ux500/u8500_clk.c | 2 +-
drivers/clocksource/Kconfig | 17 +-
drivers/clocksource/Makefile | 1 +
drivers/clocksource/nomadik-mtu.c | 224 +++++++++++++++++++++
drivers/crypto/ux500/cryp/cryp_core.c | 3 +-
drivers/dma/ste_dma40.c | 3 +-
drivers/dma/ste_dma40_ll.c | 2 +-
drivers/input/keyboard/Kconfig | 2 +-
drivers/mfd/ab8500-core.c | 13 +-
drivers/mfd/db8500-prcmu.c | 12 +-
drivers/mtd/nand/Kconfig | 2 +-
drivers/pinctrl/pinctrl-nomadik.c | 3 +-
.../linux/platform_data/clocksource-nomadik-mtu.h | 9 +
include/linux/platform_data/crypto-ux500.h | 2 +-
include/linux/platform_data/dma-ste-dma40.h | 223 ++++++++++++++++++++
sound/soc/ux500/ux500_pcm.c | 3 +-
39 files changed, 519 insertions(+), 542 deletions(-)
delete mode 100644 arch/arm/plat-nomadik/Kconfig
delete mode 100644 arch/arm/plat-nomadik/Makefile
delete mode 100644 arch/arm/plat-nomadik/include/plat/mtu.h
delete mode 100644 arch/arm/plat-nomadik/include/plat/ste_dma40.h
delete mode 100644 arch/arm/plat-nomadik/timer.c
create mode 100644 drivers/clocksource/nomadik-mtu.c
create mode 100644 include/linux/platform_data/clocksource-nomadik-mtu.h
create mode 100644 include/linux/platform_data/dma-ste-dma40.h
--
1.7.11.3
^ permalink raw reply
* [RFC/NOT FOR MERGING 4/5] i2c: omap: don't re-enable IRQs after masking them
From: Kevin Hilman @ 2012-10-18 17:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350488043-5053-5-git-send-email-balbi@ti.com>
Felipe Balbi <balbi@ti.com> writes:
> OMAP I2C driver will re-enable IRQs right after
> masking them during suspend.
>
> That's not what we want. We want to keep IRQs
> masked until our resume method is called.
>
> Signed-off-by: Felipe Balbi <balbi@ti.com>
> ---
> drivers/i2c/busses/i2c-omap.c | 10 ++--------
> 1 file changed, 2 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index db31eae..7eeae11 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -1247,14 +1247,8 @@ static int omap_i2c_runtime_suspend(struct device *dev)
>
> omap_i2c_write_reg(_dev, OMAP_I2C_IE_REG, 0);
>
> - if (_dev->rev < OMAP_I2C_OMAP1_REV_2) {
> - iv = omap_i2c_read_reg(_dev, OMAP_I2C_IV_REG); /* Read clears */
> - } else {
> - omap_i2c_write_reg(_dev, OMAP_I2C_STAT_REG, _dev->iestate);
> -
> - /* Flush posted write */
> - omap_i2c_read_reg(_dev, OMAP_I2C_STAT_REG);
> - }
Are you sure this re-enables the interrupt? It looks to me like
it's meant to clear the interrupt.
> + /* Flush posted write */
> + omap_i2c_read_reg(_dev, OMAP_I2C_STAT_REG);
Assuming the above is correct, should this be IE_REG?
> return 0;
> }
Kevin
^ permalink raw reply
* [GIT PULL] vexpress: fixes for v3.8
From: Pawel Moll @ 2012-10-18 17:08 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd, Olof,
Could you, please, pull this small Versatile Express fix for 3.8?
Thanks!
Pawel
The following changes since commit ddffeb8c4d0331609ef2581d84de4d763607bd37:
Linux 3.7-rc1 (2012-10-14 14:41:04 -0700)
are available in the git repository at:
git://git.linaro.org/people/pawelmoll/linux.git vexpress-fixes
for you to fetch changes up to 852663d94f0cc44199c31c0e42d4801302f41705:
ARM: vexpress: Make the debug UART detection more specific (2012-10-18 17:56:16 +0100)
----------------------------------------------------------------
Pawel Moll (1):
ARM: vexpress: Make the debug UART detection more specific
arch/arm/include/debug/vexpress.S | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
^ permalink raw reply
* [RFC/NOT FOR MERGING 4/5] i2c: omap: don't re-enable IRQs after masking them
From: Felipe Balbi @ 2012-10-18 17:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <874nlrg101.fsf@deeprootsystems.com>
On Thu, Oct 18, 2012 at 10:10:06AM -0700, Kevin Hilman wrote:
> Felipe Balbi <balbi@ti.com> writes:
>
> > OMAP I2C driver will re-enable IRQs right after
> > masking them during suspend.
> >
> > That's not what we want. We want to keep IRQs
> > masked until our resume method is called.
> >
> > Signed-off-by: Felipe Balbi <balbi@ti.com>
> > ---
> > drivers/i2c/busses/i2c-omap.c | 10 ++--------
> > 1 file changed, 2 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> > index db31eae..7eeae11 100644
> > --- a/drivers/i2c/busses/i2c-omap.c
> > +++ b/drivers/i2c/busses/i2c-omap.c
> > @@ -1247,14 +1247,8 @@ static int omap_i2c_runtime_suspend(struct device *dev)
> >
> > omap_i2c_write_reg(_dev, OMAP_I2C_IE_REG, 0);
> >
> > - if (_dev->rev < OMAP_I2C_OMAP1_REV_2) {
> > - iv = omap_i2c_read_reg(_dev, OMAP_I2C_IV_REG); /* Read clears */
> > - } else {
> > - omap_i2c_write_reg(_dev, OMAP_I2C_STAT_REG, _dev->iestate);
> > -
> > - /* Flush posted write */
> > - omap_i2c_read_reg(_dev, OMAP_I2C_STAT_REG);
> > - }
>
> Are you sure this re-enables the interrupt? It looks to me like
> it's meant to clear the interrupt.
>
> > + /* Flush posted write */
> > + omap_i2c_read_reg(_dev, OMAP_I2C_STAT_REG);
>
> Assuming the above is correct, should this be IE_REG?
indeed. My eyes failed. This patch can be thrown away. My bad.
--
balbi
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* [RFC/NOT FOR MERGING 3/5] arm: omap: introduce other PM methods
From: Kevin Hilman @ 2012-10-18 17:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350488043-5053-4-git-send-email-balbi@ti.com>
Felipe Balbi <balbi@ti.com> writes:
> current omap_device PM implementation defines
> omap-specific *_noirq methods but uses the
> generic versions for all other PM methods.
>
> As it turns out, if a device decides to implement
> non-runtime PM callbacks, we might fall into a
> situation where the hwmod is still idled which
> will generate an abort exception when we try
> to access device's address space while clocks
> are still gated.
Please explain in more detail how this could happen.
Kevin
> In order to solve that, we implement all other
> methods taking into account that devices might
> not implement those, in which case we return
> early.
>
> Signed-off-by: Felipe Balbi <balbi@ti.com>
^ permalink raw reply
* [GIT PULL] vexpress: drivers for v3.8
From: Pawel Moll @ 2012-10-18 17:07 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd, Olof,
Could you, please, pull new Versatile Express related drivers for 3.8?
The hwmon driver is acked by the subsystem maintainer who asked to get
it merged through arm-soc.
Thanks!
Pawel
The following changes since commit ddffeb8c4d0331609ef2581d84de4d763607bd37:
Linux 3.7-rc1 (2012-10-14 14:41:04 -0700)
are available in the git repository at:
git://git.linaro.org/people/pawelmoll/linux.git vexpress-drivers
for you to fetch changes up to 790440bc90fa800ff2a4b8b5046227a2ca32c1b1:
ARM: vexpress: Reset driver (2012-10-18 17:58:47 +0100)
----------------------------------------------------------------
Pawel Moll (2):
hwmon: Versatile Express hwmon driver
ARM: vexpress: Reset driver
.../devicetree/bindings/hwmon/vexpress.txt | 23 ++
Documentation/hwmon/vexpress | 34 +++
arch/arm/mach-vexpress/reset.c | 141 ++++++++++++
drivers/hwmon/Kconfig | 8 +
drivers/hwmon/Makefile | 1 +
drivers/hwmon/vexpress.c | 229 ++++++++++++++++++++
6 files changed, 436 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/vexpress.txt
create mode 100644 Documentation/hwmon/vexpress
create mode 100644 arch/arm/mach-vexpress/reset.c
create mode 100644 drivers/hwmon/vexpress.c
^ permalink raw reply
* [RFC/NOT FOR MERGING 3/5] arm: omap: introduce other PM methods
From: Felipe Balbi @ 2012-10-18 17:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <878vb3g14c.fsf@deeprootsystems.com>
Hi,
On Thu, Oct 18, 2012 at 10:07:31AM -0700, Kevin Hilman wrote:
> Felipe Balbi <balbi@ti.com> writes:
>
> > current omap_device PM implementation defines
> > omap-specific *_noirq methods but uses the
> > generic versions for all other PM methods.
> >
> > As it turns out, if a device decides to implement
> > non-runtime PM callbacks, we might fall into a
> > situation where the hwmod is still idled which
> > will generate an abort exception when we try
> > to access device's address space while clocks
> > are still gated.
>
> Please explain in more detail how this could happen.
just follow the patchset. If I implement system suspend and I'm not
focefully calling runtime_* methods, who will be there to call
omap_device_enable() ?
--
balbi
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* [RFC/NOT FOR MERGING 2/5] arm: omap: don't forcefully runtime suspend a device
From: Felipe Balbi @ 2012-10-18 17:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87fw5bg1f7.fsf@deeprootsystems.com>
Hi,
On Thu, Oct 18, 2012 at 10:01:00AM -0700, Kevin Hilman wrote:
> Felipe Balbi <balbi@ti.com> writes:
>
> > device drivers should be smart enough to provide
> > ->suspend/->resume callbacks when needed and they
> > should take care of doing whatever needs to be
> > done in order to allow a device to be suspended.
> >
> > Calling pm_runtime_* from system suspend isn't
> > the right way to achieve that, as it creates a
> > situation where OMAP's PM has different requirements
> > and semantics than all other architectures.
> >
> > Signed-off-by: Felipe Balbi <balbi@ti.com>
>
> NAK
>
> This support is required to handle some restrictions placed on runtime
> PM and system PM interactions. Basically, runtime PM transitions are
> disabled part way through system PM (that itself was a much debated
> topic last year, but that's how it works today.)
>
> Because of this limitation, drivers that are active during the suspend
> phase (commonly becasue they are used by [late] suspend methods of other
> devices) may have multiple runtime PM transitions during static
> suspend/resume. These drivers have the problem that after runtime PM
> has been disabled, even when they pm_runtime_put*, they will not
> actually be transitioned (and their runtime PM callbacks will not be
> called.)
>
> So these devices are in a "ready to runtime suspend" state, but they
> will not transition because runtime PM is disabled.
>
> After your patch, they will still be idled (omap_device_idle), but the
> driver will have no notification that this has happened because you
> removed the calling of the runtime PM callbacks.
to me this only seems like the driver misses some static PM callbacks
and some pm_runtime_disable; pm_runtime_set_active; pm_runtime_enable;
on their system resume methods.
> In the changelog, you seem to be implying that anything the driver
> should be doing should be done in its suspend/resume callbacks instead
> of the runtime suspend/resume callbacks (but don't give your reasoning.)
that's not what I implied at all. What I imply is that if driver needs
to do something during system suspend/resume, then it needs to implement
those methods. Calling runtime_* methods from system PM looks like a
workaround for incomplete drivers.
> Using the current approach (which was actually suggested by Rafael), it
> means many transiactional drivers (like I2C) can be implemented as
> runtime PM only, and don't need to provide suspend/resume callbacks at
to me that sounds bogus :-s what's the problem of using the same
function for system suspend and runtime suspend ? (see the last patch of
the series where I implement I2C system suspend and resume)
> all. It also means they can be used throughout the suspend/resume path
> (well until noirq methods.)
fair enough...
> The approach in $SUBJECT patch would mean that drivers should not be
> used after their suspend method has been called. That places some
> severe limitations on drivers like I2C, SPI, HSI, UART etc. that are
> often used by the suspend/resume methods of other drivers.
I can't see the limitation you talk about. Let's use I2C as an example.
In order to suspend RTC we need I2C resume, but driver core guarantees
that parent will only suspend after all children are suspended. If
that's as far as _noirq, then I2C needs to implement _noirq callbacks.
I don't see the issue because RTC is a child of I2C and will suspend
before its parent. No ?
--
balbi
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^ permalink raw reply
* [GIT PULL] vexpress: soc changes for v3.8
From: Pawel Moll @ 2012-10-18 17:05 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd, Olof,
Could you, please, pull the Versatile Express SOC updates for 3.8?
Thanks!
Pawel
The following changes since commit ddffeb8c4d0331609ef2581d84de4d763607bd37:
Linux 3.7-rc1 (2012-10-14 14:41:04 -0700)
are available in the git repository at:
git://git.linaro.org/people/pawelmoll/linux.git vexpress-soc
for you to fetch changes up to f665f235c6ee31f84049920f16d1ff6e2dabc8f5:
ARM: vexpress: Remove motherboard dependencies in the DTS files (2012-10-18 18:00:07 +0100)
----------------------------------------------------------------
Pawel Moll (5):
mfd: Versatile Express config infrastructure
mfd: Versatile Express system registers driver
ARM: vexpress: Add config bus components and clocks to DTs
ARM: vexpress: Start using new Versatile Express infrastructure
ARM: vexpress: Remove motherboard dependencies in the DTS files
.../devicetree/bindings/arm/vexpress-sysreg.txt | 50 ++
Documentation/devicetree/bindings/arm/vexpress.txt | 98 +++-
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 146 +++++-
arch/arm/boot/dts/vexpress-v2m.dtsi | 146 +++++-
arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts | 121 ++++-
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 186 ++++++-
arch/arm/boot/dts/vexpress-v2p-ca5s.dts | 84 ++-
arch/arm/boot/dts/vexpress-v2p-ca9.dts | 136 ++++-
arch/arm/include/asm/hardware/sp810.h | 6 -
arch/arm/mach-vexpress/Kconfig | 4 +-
arch/arm/mach-vexpress/Makefile | 2 +-
arch/arm/mach-vexpress/ct-ca9x4.c | 41 +-
arch/arm/mach-vexpress/include/mach/motherboard.h | 81 ---
arch/arm/mach-vexpress/platsmp.c | 3 +-
arch/arm/mach-vexpress/v2m.c | 349 ++++---------
drivers/mfd/Kconfig | 6 +
drivers/mfd/Makefile | 1 +
drivers/mfd/vexpress-config.c | 277 ++++++++++
drivers/mfd/vexpress-sysreg.c | 552 ++++++++++++++++++++
include/linux/vexpress.h | 121 +++++
20 files changed, 1993 insertions(+), 417 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
create mode 100644 drivers/mfd/vexpress-config.c
create mode 100644 drivers/mfd/vexpress-sysreg.c
create mode 100644 include/linux/vexpress.h
^ permalink raw reply
* [RFC/NOT FOR MERGING 2/5] arm: omap: don't forcefully runtime suspend a device
From: Kevin Hilman @ 2012-10-18 17:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350488043-5053-3-git-send-email-balbi@ti.com>
Felipe Balbi <balbi@ti.com> writes:
> device drivers should be smart enough to provide
> ->suspend/->resume callbacks when needed and they
> should take care of doing whatever needs to be
> done in order to allow a device to be suspended.
>
> Calling pm_runtime_* from system suspend isn't
> the right way to achieve that, as it creates a
> situation where OMAP's PM has different requirements
> and semantics than all other architectures.
>
> Signed-off-by: Felipe Balbi <balbi@ti.com>
NAK
This support is required to handle some restrictions placed on runtime
PM and system PM interactions. Basically, runtime PM transitions are
disabled part way through system PM (that itself was a much debated
topic last year, but that's how it works today.)
Because of this limitation, drivers that are active during the suspend
phase (commonly becasue they are used by [late] suspend methods of other
devices) may have multiple runtime PM transitions during static
suspend/resume. These drivers have the problem that after runtime PM
has been disabled, even when they pm_runtime_put*, they will not
actually be transitioned (and their runtime PM callbacks will not be
called.)
So these devices are in a "ready to runtime suspend" state, but they
will not transition because runtime PM is disabled.
After your patch, they will still be idled (omap_device_idle), but the
driver will have no notification that this has happened because you
removed the calling of the runtime PM callbacks.
In the changelog, you seem to be implying that anything the driver
should be doing should be done in its suspend/resume callbacks instead
of the runtime suspend/resume callbacks (but don't give your reasoning.)
Using the current approach (which was actually suggested by Rafael), it
means many transiactional drivers (like I2C) can be implemented as
runtime PM only, and don't need to provide suspend/resume callbacks at
all. It also means they can be used throughout the suspend/resume path
(well until noirq methods.)
The approach in $SUBJECT patch would mean that drivers should not be
used after their suspend method has been called. That places some
severe limitations on drivers like I2C, SPI, HSI, UART etc. that are
often used by the suspend/resume methods of other drivers.
Kevin
> ---
> arch/arm/plat-omap/omap_device.c | 9 +++------
> 1 file changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
> index 935f416..cd84eac 100644
> --- a/arch/arm/plat-omap/omap_device.c
> +++ b/arch/arm/plat-omap/omap_device.c
> @@ -817,11 +817,9 @@ static int _od_suspend_noirq(struct device *dev)
> ret = pm_generic_suspend_noirq(dev);
>
> if (!ret && !pm_runtime_status_suspended(dev)) {
> - if (pm_generic_runtime_suspend(dev) == 0) {
> - if (!(od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND))
> - omap_device_idle(pdev);
> - od->flags |= OMAP_DEVICE_SUSPENDED;
> - }
> + if (!(od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND))
> + omap_device_idle(pdev);
> + od->flags |= OMAP_DEVICE_SUSPENDED;
> }
>
> return ret;
> @@ -841,7 +839,6 @@ static int _od_resume_noirq(struct device *dev)
> od->flags &= ~OMAP_DEVICE_SUSPENDED;
> if (!(od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND))
> omap_device_enable(pdev);
> - pm_generic_runtime_resume(dev);
> }
>
> return pm_generic_resume_noirq(dev);
^ permalink raw reply
* [RFC/NOT FOR MERGING 1/5] arm: omap: fix up _od_suspend_noirq and _od_resume_noirq
From: Felipe Balbi @ 2012-10-18 16:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <871ugvivso.fsf@deeprootsystems.com>
Hi,
On Thu, Oct 18, 2012 at 09:34:15AM -0700, Kevin Hilman wrote:
> Felipe Balbi <balbi@ti.com> writes:
>
> > current implementation doesn't take care about
> > drivers which don't provide *_noirq methods
>
> The generic ops handle this. See below.
>
> > and we could fall into a situation where we would suspend/resume
> > devices even though they haven't asked for it.
>
> The following explanation doesn't explain this, so I dont' follow
> the "even though they haven't asked for it" part.
>
> > One such case happened with the I2C driver which
> > was getting suspended during suspend_noirq() just
> > to be resume right after by any other device doing
> > an I2C transfer on its suspend method.
>
> In order to be I2C to be runtime resumed after its noirq method has been
> called, that means the other device is doing an I2C xfer in its noirq
> method. That is a bug.
>
> > Signed-off-by: Felipe Balbi <balbi@ti.com>
> > ---
> > arch/arm/plat-omap/omap_device.c | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
> > index 7a7d1f2..935f416 100644
> > --- a/arch/arm/plat-omap/omap_device.c
> > +++ b/arch/arm/plat-omap/omap_device.c
> > @@ -804,8 +804,12 @@ static int _od_suspend_noirq(struct device *dev)
> > {
> > struct platform_device *pdev = to_platform_device(dev);
> > struct omap_device *od = to_omap_device(pdev);
> > + const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
> > int ret;
> >
> > + if (!pm || !pm->suspend_noirq)
> > + return 0;
> > +
>
> you just re implemented pm_generic_suspend_noirq() (c.f. drivers/base/power/generic_ops.c)
>
> > /* Don't attempt late suspend on a driver that is not bound */
> > if (od->_driver_status != BUS_NOTIFY_BOUND_DRIVER)
> > return 0;
> > @@ -827,6 +831,10 @@ static int _od_resume_noirq(struct device *dev)
> > {
> > struct platform_device *pdev = to_platform_device(dev);
> > struct omap_device *od = to_omap_device(pdev);
> > + const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
> > +
> > + if (!pm || !pm->resume_noirq)
> > + return 0;
>
> and this is basically pm_generic_resume_noirq()
not true, there is a slight different. Note that you only call
pm_generic_resume_noirq() after calling pm_runtime_resume()ing the
device:
> static int _od_resume_noirq(struct device *dev)
> {
> struct platform_device *pdev = to_platform_device(dev);
> struct omap_device *od = to_omap_device(pdev);
>
> if ((od->flags & OMAP_DEVICE_SUSPENDED) &&
> !pm_runtime_status_suspended(dev)) {
> od->flags &= ~OMAP_DEVICE_SUSPENDED;
> if (!(od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND))
> omap_device_enable(pdev);
> pm_generic_runtime_resume(dev);
right here. IMHO this is a bug, if the define doesn't implement
resume_noirq, it's telling you that it has nothing to do at that time,
so you shouldn't forcefully resume the device.
If the device dies, then it means that it needs to implement
resume_noirq. What you have here, is a "workaround" for badly written
device drivers IMHO. Note also, that you could runtime resume devices
which don't implement resume_noirq().
the same is valid for suspend_noirq.
> }
>
> return pm_generic_resume_noirq(dev);
> }
--
balbi
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* [PATCH 1/5] ARM: OMAP2+: gpmc: Fix kernel BUG for DT boot mode
From: Jon Hunter @ 2012-10-18 16:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <79CD15C6BA57404B839C016229A409A83EB43B17@DBDE01.ent.ti.com>
On 10/18/2012 11:16 AM, Hiremath, Vaibhav wrote:
> On Wed, Oct 17, 2012 at 01:17:56, Hunter, Jon wrote:
>>
>> On 10/15/2012 02:16 PM, Richard Cochran wrote:
>>> From: hvaibhav at ti.com <hvaibhav@ti.com>
>>>
>>> With recent changes in omap gpmc driver code, in case of DT
>>> boot mode, where bootloader does not configure gpmc cs space
>>> will result into kernel BUG() inside gpmc_mem_init() function,
>>> as gpmc cs0 gpmc_config7[0].csvalid bit is set to '1' and
>>> gpmc_config7[0].baseaddress is set to '0' on reset.
>>
>> I am not sure I completely follow the logic here.
>>
>> Won't this problem occur if the bootloader does not configure the gpmc
>> cs space AND we are not using DT?
>>
>
> That's what exactly the above comment describes.
Hmm ... you said "in the case of DT", but I am saying even "in the case
WITHOUT DT" this can happen. So I think the subject is mis-leading.
>> Is the csvalid bit set because we are booting from the internal ROM?
>>
>
> As per TRM, the reset value of the CS0_valis bit is set to 0. I have pasted
> TRM statement below -
>
> "Chip-select enable (reset value is 1 for CS[0] and 0 for CS[1-5])."
The above two sentences don't see to agree ...
> And same applies to OMAP3 family of devices.
For which boot-modes? All or just the gpmc boot-modes?
My omap3430 beagle has been booting with DT fine for some time and I
have not encountered this problem even on the latest kernel with the
gpmc driver present.
>> I guess I don't see why csvalid bit being set and a base-address of 0x0
>> should not be allowed. That should be a valid combination.
>>
>
> Yes, agreed.
>
>> One problem I see with gpmc_mem_init() is that it assumes that
>> BOOT_ROM_SPACE is 1MB for all devices starting at 0x0 apart from the
>> apollon board. For newer devices such as OMAP4, there is only 48KB of
>> internal ROM and only mapped to 0x0 when booting from internal ROM. So
>> this needs to be fixed.
>>
>> How much internal ROM does the AM335x have and where is it mapped?
>>
>
> AM33xx memory map is something like,
>
> Boot ROM 0x4000_0000 0x4001_FFFF 128KB
> 0x4002_0000 0x4002_BFFF 48KB 32-bit Ex/R(1) - Public
> Reserved 0x4002_C000 0x400F_FFFF 848KB Reserved
> Reserved 0x4010_0000 0x401F_FFFF 1MB Reserved
> Reserved 0x4020_0000 0x402E_FFFF 960KB Reserved
> Reserved 0x402f_0000 0x4020_03FF 64KB Reserved
> SRAM internal 0x402F_0400 0x402F_FFFF 32-bit Ex/R/W(1)
Does the boot ROM get mapped to 0x0, when booting from ROM?
>>> This use-case is applicable for any board/EVM which doesn't have
>>> any peripheral connected to gpmc cs0, for example BeagleXM and
>>> BeagleBone, so DT boot mode fails.
>>>
>>> This patch adds of_have_populated_dt() check before creating
>>> device, so that for DT boot mode, gpmc probe will not be called
>>> which is expected behavior, as gpmc is not supported yet from DT.
>>
>> Yes, but we do actually still allow some platform devices to be probed
>> (such as dmtimers) when booting with DT that don't support DT yet. So
>> this change prevents us from using the gpmc on boards when booting with DT.
>>
>
> The idea here was,
>
> In order to use GPMC in meaningful way, where some peripheral is connected
> to the GPMC, you must create platform_device for the probe to happen
> properly. Now all the devices I know so far, we have gpmc_smsc911x_init(),
> omap_nand_flash_init(), etc...
> These api's are getting called only through machine_desc.init_xxx callbacks,
> And in case of DT, we have centralized machine_desc definition for all
> platforms (board-generic.c). So even though you want to use GPMC for DT boot
> mode, you can not make use of peripheral without changing board-files to
> change to create platform_device.
>
> Does it make sense?
Sure, if you are using one of the generic machine configurations for DT.
However, while this migration happens people may create their own custom
machine configurations for DT for testing things like smsc911x.
>> I am not convinced that this is addressing the underlying problem with
>> gpmc_mem_init().
>>
>
> The patch you submitted is cleanup patch and is required irrespective of
> this patch. I believe this patch is just makes sure that, if you are booting
> from DT and you do not have meaningful DT node for GPMC and peripheral
> interfaced to it, no point in probing it.
>
> Does it make any sense???
Yes, but do you also see the bug that is hiding in gpmc_mem_init()?
My point is to highlight this and not hide it, so that we can fix it
now. Otherwise if we wait until we enable the gpmc driver with DT and
this could hinder the DT migration later.
Jon
^ permalink raw reply
* [RFC PATCH 2/2] ARM: OMAP4: clock: use omap4_clks_register API
From: Grygorii Strashko @ 2012-10-18 16:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350578297-22572-1-git-send-email-grygorii.strashko@ti.com>
Remove OMAP443x and OMAP446x specific clocks from omap44xx_clks
array and add corresponding set of clocks per each SoC:
- struct omap_clk omap44xx_clks[]; - common clocks set for all OMAP4
- struct omap_clk omap443x_clks[]; - specific clocks set for OMAP443x
- struct omap_clk omap446x_clks[]; - specific clocks set for OMAP446x
and don't rely on platform specific flags any more.
Use omap4_clks_register() API to register and init OMAP4 set of
clocks.
With this change, we can now safely remove CK_443X/CK_446X etc macro
usage. It has not been done in this patch, but if the approach is OK,
then, it is possible to do the same.
One additional benefit seen is that the match logic can entirely be
skipped.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
---
arch/arm/mach-omap2/clock44xx_data.c | 40 ++++++++++++++++++----------------
1 file changed, 21 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 6efc30c..4060c9c 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3145,10 +3145,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "aes1_fck", &aes1_fck, CK_443X),
CLK(NULL, "aes2_fck", &aes2_fck, CK_443X),
CLK(NULL, "aess_fck", &aess_fck, CK_443X),
- CLK(NULL, "bandgap_fclk", &bandgap_fclk, CK_443X),
- CLK(NULL, "bandgap_ts_fclk", &bandgap_ts_fclk, CK_446X),
CLK(NULL, "des3des_fck", &des3des_fck, CK_443X),
- CLK(NULL, "div_ts_ck", &div_ts_ck, CK_446X),
CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X),
CLK(NULL, "dmic_fck", &dmic_fck, CK_443X),
CLK(NULL, "dsp_fck", &dsp_fck, CK_443X),
@@ -3346,19 +3343,27 @@ static struct omap_clk omap44xx_clks[] = {
CLK("4903c000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
CLK("4903e000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
CLK(NULL, "cpufreq_ck", &dpll_mpu_ck, CK_443X),
+ CLK(NULL, NULL, NULL, CK_443X),
+};
+
+static struct omap_clk omap443x_clks[] = {
+ CLK(NULL, "bandgap_fclk", &bandgap_fclk, CK_443X),
+ CLK(NULL, NULL, NULL, CK_443X),
+};
+
+
+static struct omap_clk omap446x_clks[] = {
+ CLK(NULL, "div_ts_ck", &div_ts_ck, CK_446X),
+ CLK(NULL, "bandgap_ts_fclk", &bandgap_ts_fclk, CK_446X),
+ CLK(NULL, NULL, NULL, CK_446X),
};
int __init omap4xxx_clk_init(void)
{
- struct omap_clk *c;
- u32 cpu_clkflg;
-
if (cpu_is_omap443x()) {
cpu_mask = RATE_IN_4430;
- cpu_clkflg = CK_443X;
} else if (cpu_is_omap446x() || cpu_is_omap447x()) {
cpu_mask = RATE_IN_4460 | RATE_IN_4430;
- cpu_clkflg = CK_446X | CK_443X;
if (cpu_is_omap447x())
pr_warn("WARNING: OMAP4470 clock data incomplete!\n");
@@ -3375,17 +3380,14 @@ int __init omap4xxx_clk_init(void)
* omap2_clk_disable_clkdm_control();
*/
- for (c = omap44xx_clks; c < omap44xx_clks + ARRAY_SIZE(omap44xx_clks);
- c++)
- clk_preinit(c->lk.clk);
-
- for (c = omap44xx_clks; c < omap44xx_clks + ARRAY_SIZE(omap44xx_clks);
- c++)
- if (c->cpu & cpu_clkflg) {
- clkdev_add(&c->lk);
- clk_register(c->lk.clk);
- omap2_init_clk_clkdm(c->lk.clk);
- }
+ omap2_clks_register(omap44xx_clks);
+
+ if (cpu_is_omap443x())
+ omap2_clks_register(omap443x_clks);
+ else if (cpu_is_omap446x() || cpu_is_omap447x())
+ omap2_clks_register(omap446x_clks);
+ else
+ return 0;
/* Disable autoidle on all clocks; let the PM code enable it later */
omap_clk_disable_autoidle_all();
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 1/2] ARM: OMAP2+: clock: Add omap2_clks_register API
From: Grygorii Strashko @ 2012-10-18 16:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350578297-22572-1-git-send-email-grygorii.strashko@ti.com>
Now the cpu_mask is used to differentiate clocks per each OMAP
platform, SoC version or revision. Such approach has few disadvantages:
- the specific CK_XXX flag need to be added and maintained for each OMAP
SoC;
- it's difficult to update clock tree data in case of differences
between OMAP SoC revisions.
In addition, there are duplicated code in each clockXXX_data.c
files, so it seems, reasonable to remove it:
- call clk_preinit() for each clock;
- call clkdev_add(); clk_register(); omap2_init_clk_clkdm(); for each
clock;
Hence, add omap4_clks_register() API which would allow to register
and init few set of clocks and to organize clocks data in the following
way (for example for OMAP4):
- struct omap_clk omap44xx_clks[]; - common clocks set for all OMAP4
SoCs
- struct omap_clk omap443x_clks[]; - specific clocks set for OMAP443x SoCs
- struct omap_clk omap446x_clks[]; - specific clocks set for OMAP446x SoCs
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
---
arch/arm/mach-omap2/clock.c | 36 ++++++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/clock.h | 3 +++
2 files changed, 39 insertions(+)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 961ac8f..d84f174 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -521,3 +521,39 @@ struct clk_functions omap2_clk_functions = {
.clk_disable_unused = omap2_clk_disable_unused,
};
+/**
+ * omap_clks_register() - register set of clocks
+ * @clks: array of clock definitions
+ *
+ * The last array item should contain NULL value in c->lk.clk.
+ */
+int __init omap2_clks_register(struct omap_clk *clks)
+{
+ struct omap_clk *c;
+ int r;
+
+ if (!clks)
+ return -EINVAL;
+
+ c = clks;
+ while (c->lk.clk) {
+ clk_preinit(c->lk.clk);
+ c++;
+ }
+
+ c = clks;
+ while (c->lk.clk) {
+ clkdev_add(&c->lk);
+ r = clk_register(c->lk.clk);
+ if (r < 0) {
+ pr_warn("%s: Clock register failure %d.\n",
+ c->lk.clk->name, r);
+ }
+
+ omap2_init_clk_clkdm(c->lk.clk);
+
+ c++;
+ }
+
+ return 0;
+}
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 35ec5f3..920f3f2 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -19,6 +19,7 @@
#include <linux/kernel.h>
#include <plat/clock.h>
+#include <plat/clkdev_omap.h>
/* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */
#define CORE_CLK_SRC_32K 0x0
@@ -132,6 +133,8 @@ void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
const char *core_ck_name,
const char *mpu_ck_name);
+int omap2_clks_register(struct omap_clk *clks);
+
extern u16 cpu_mask;
extern const struct clkops clkops_omap2_dflt_wait;
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 0/2] ARM: OMAP4+: Clk registration update
From: Grygorii Strashko @ 2012-10-18 16:38 UTC (permalink / raw)
To: linux-arm-kernel
Currently we use CK_446X etc to differentiate which clk needs to be registered on which SoC.
The following patch series removes that requirement, instead SoC and SoC variants are
detected on the fly and only the required clocks are registered in the system.
This will help to remove the CK_XYZ macros from the system.
Please comment if this is an acceptable approach - at a first glance,
it seems to pave way to be capable of being replaced potentially by DT data as well.
Grygorii Strashko (2):
ARM: OMAP2+: clock: Add omap2_clks_register API
ARM: OMAP4: clock: use omap4_clks_register API
arch/arm/mach-omap2/clock.c | 36 ++++++++++++++++++++++++++++++
arch/arm/mach-omap2/clock.h | 3 +++
arch/arm/mach-omap2/clock44xx_data.c | 40 ++++++++++++++++++----------------
3 files changed, 60 insertions(+), 19 deletions(-)
--
1.7.9.5
^ permalink raw reply
* [RFC/NOT FOR MERGING 1/5] arm: omap: fix up _od_suspend_noirq and _od_resume_noirq
From: Kevin Hilman @ 2012-10-18 16:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350488043-5053-2-git-send-email-balbi@ti.com>
Felipe Balbi <balbi@ti.com> writes:
> current implementation doesn't take care about
> drivers which don't provide *_noirq methods
The generic ops handle this. See below.
> and we could fall into a situation where we would suspend/resume
> devices even though they haven't asked for it.
The following explanation doesn't explain this, so I dont' follow
the "even though they haven't asked for it" part.
> One such case happened with the I2C driver which
> was getting suspended during suspend_noirq() just
> to be resume right after by any other device doing
> an I2C transfer on its suspend method.
In order to be I2C to be runtime resumed after its noirq method has been
called, that means the other device is doing an I2C xfer in its noirq
method. That is a bug.
> Signed-off-by: Felipe Balbi <balbi@ti.com>
> ---
> arch/arm/plat-omap/omap_device.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
> index 7a7d1f2..935f416 100644
> --- a/arch/arm/plat-omap/omap_device.c
> +++ b/arch/arm/plat-omap/omap_device.c
> @@ -804,8 +804,12 @@ static int _od_suspend_noirq(struct device *dev)
> {
> struct platform_device *pdev = to_platform_device(dev);
> struct omap_device *od = to_omap_device(pdev);
> + const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
> int ret;
>
> + if (!pm || !pm->suspend_noirq)
> + return 0;
> +
you just re implemented pm_generic_suspend_noirq() (c.f. drivers/base/power/generic_ops.c)
> /* Don't attempt late suspend on a driver that is not bound */
> if (od->_driver_status != BUS_NOTIFY_BOUND_DRIVER)
> return 0;
> @@ -827,6 +831,10 @@ static int _od_resume_noirq(struct device *dev)
> {
> struct platform_device *pdev = to_platform_device(dev);
> struct omap_device *od = to_omap_device(pdev);
> + const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
> +
> + if (!pm || !pm->resume_noirq)
> + return 0;
and this is basically pm_generic_resume_noirq()
>
> if ((od->flags & OMAP_DEVICE_SUSPENDED) &&
> !pm_runtime_status_suspended(dev)) {
Kevin
^ permalink raw reply
* [PATCH 2/3] RTC: omap-rtc: enable pm_runtime
From: Hiremath, Vaibhav @ 2012-10-18 16:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50802C20.9040408@gmail.com>
On Thu, Oct 18, 2012 at 21:49:44, Daniel Mack wrote:
> On 18.10.2012 18:12, Vaibhav Hiremath wrote:
> >
> >
> > On 10/18/2012 9:23 PM, Daniel Mack wrote:
> >> This is needed as preparation for platforms where using pm runtime usage
> >> is mandatory.
> >>
> >> Signed-off-by: Daniel Mack <zonque@gmail.com>
> >
> > It looks like, you just duplicated effort here.
> > RTC patches have been already submitted quite some time back for AM33xx,
> > probably you missed to do google before spending time on this.
> >
> > Patch Series -
> > http://www.mail-archive.com/davinci-linux-open-source at linux.davincidsp.com/msg23253.html
>
> Heh, damn :) I would have thought that so shortly after the merge
> window, that code either went in already or is yet missing. Oh well.
>
> > Denial,
> > It would be really helpful if you could test these patches and ack them.
>
> Ok, will do tomorrow. What's missing there is support for writing to the
> OMAP_RTC_OSC_REG (path 3/3 in my series). Would like me to rebase the
> functionality? I need thatkind of setup for my board ...
>
>
This is bit tricky and required more discussion before merging it,
let me reopen the old discussion which I had started some time back -
RTC OSC clock is required to configure clocksource systemtimer for the
kernel, and it is important when you get into PM related features.
Please refer the below commit for more reference,
http://marc.info/?l=u-boot&m=135057734713796&w=2
> > Just FYI, we have bunch of parallel activities going inside team to
> > upstream all the patches/module/drivers/features, so to avoid such
> > duplication of effort, I suggest you to google for the patches or ping
> > on mailing list.
>
> Yes, it's more difficult to participate in the AM33xx code than in other
> platforms. I'm not complaining about other doing all the hard work
> though, it's just a little different.
>
No its not. Its good that we have so many developers contributing, so now
its just working together. Recommend you to ping once before spending time,
so that we can collaboratively work together, even I wouldn't mind you to
pick/own on-going development and submit it.
Thanks,
Vaibhav
> Anyway - thanks for the heads-up!
>
>
> Daniel
>
>
^ permalink raw reply
* [PATCH 3/4] ARM: OMAP2+: Move iommu/iovmm headers to platform_data
From: Tony Lindgren @ 2012-10-18 16:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1418726.Yza1yb71Ul@avalon>
* Laurent Pinchart <laurent.pinchart@ideasonboard.com> [121018 06:45]:
> Hi,
>
> On Monday 15 October 2012 17:36:40 Tony Lindgren wrote:
> > From: Ido Yariv <ido@wizery.com>
> >
> > Move iommu/iovmm headers from plat/ to platform_data/ as part of the
> > single zImage work.
>
> Is that really where those headers belong ? iommu-omap.h contains far more
> than platform data, and iovmm-omap.h contains no platform data at all.
Hmm I though that was already fixed by Ido but looks like there are
non-platform data things still remaining there.
Looking at arch/arm/mach-omap2/iommu2.c it seems that it should moved to
drivers/iommu/omap-iommu2.c and that way most of the header can be local
in drivers/iommu/omap-iommu.h. I'll do some patches for that and repost.
Thanks,
Tony
^ permalink raw reply
* [PATCH 2/3] RTC: omap-rtc: enable pm_runtime
From: Daniel Mack @ 2012-10-18 16:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50802A87.9010409@ti.com>
On 18.10.2012 18:12, Vaibhav Hiremath wrote:
>
>
> On 10/18/2012 9:23 PM, Daniel Mack wrote:
>> This is needed as preparation for platforms where using pm runtime usage
>> is mandatory.
>>
>> Signed-off-by: Daniel Mack <zonque@gmail.com>
>
> It looks like, you just duplicated effort here.
> RTC patches have been already submitted quite some time back for AM33xx,
> probably you missed to do google before spending time on this.
>
> Patch Series -
> http://www.mail-archive.com/davinci-linux-open-source at linux.davincidsp.com/msg23253.html
Heh, damn :) I would have thought that so shortly after the merge
window, that code either went in already or is yet missing. Oh well.
> Denial,
> It would be really helpful if you could test these patches and ack them.
Ok, will do tomorrow. What's missing there is support for writing to the
OMAP_RTC_OSC_REG (path 3/3 in my series). Would like me to rebase the
functionality? I need thatkind of setup for my board ...
> Just FYI, we have bunch of parallel activities going inside team to
> upstream all the patches/module/drivers/features, so to avoid such
> duplication of effort, I suggest you to google for the patches or ping
> on mailing list.
Yes, it's more difficult to participate in the AM33xx code than in other
platforms. I'm not complaining about other doing all the hard work
though, it's just a little different.
Anyway - thanks for the heads-up!
Daniel
^ permalink raw reply
* 3.7-rc-1 Release Causing application failure for compilation
From: Prabhakar Lad @ 2012-10-18 16:19 UTC (permalink / raw)
To: linux-arm-kernel
Hi All,
I have updated to 3.7-rc1 kernel version with latest head with
commit-id 43c422eda99b894f18d1cca17bcd2401efaf7bd0
but when I try to cross compile the Application I am getting following errors.
/home/plad/ti/linus/linus/include/linux/types.h:14:26: error:
conflicting types for 'fd_set'
/home/plad/CodeSourcery/Sourcery_G++_Lite/bin/../arm-none-linux-gnueabi/libc/usr/include/sys/select.h:78:5:
note: previous declaration of 'fd_set' was here
/home/plad/ti/linus/linus/include/linux/types.h:15:25: error:
conflicting types for 'dev_t'
/home/plad/CodeSourcery/Sourcery_G++_Lite/bin/../arm-none-linux-gnueabi/libc/usr/include/sys/types.h:61:17:
note: previous declaration of 'dev_t' was here
/home/plad/ti/linus/linus/include/linux/types.h:17:26: error:
conflicting types for 'mode_t'
/home/plad/CodeSourcery/Sourcery_G++_Lite/bin/../arm-none-linux-gnueabi/libc/usr/include/sys/types.h:71:18:
note: previous declaration of 'mode_t' was here
/home/plad/ti/linus/linus/include/linux/types.h:25:26: error:
conflicting types for 'timer_t'
/home/plad/CodeSourcery/Sourcery_G++_Lite/bin/../arm-none-linux-gnueabi/libc/usr/include/time.h:104:19:
note: previous declaration of 'timer_t' was here
/home/plad/ti/linus/linus/include/linux/types.h:134:23: error:
conflicting types for 'blkcnt_t'
/home/plad/CodeSourcery/Sourcery_G++_Lite/bin/../arm-none-linux-gnueabi/libc/usr/include/sys/types.h:236:20:
note: previous declaration of 'blkcnt_t' was here
I use the codesourcery toolchain for cross compiling the applications
for ARM. The same compiler is used to build the uImage for ARM, but
when I try building the apps I see this issue. Can any help me out in
fixing this.
Regards,
--Prabhakar Lad
^ permalink raw reply
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