* [PATCH V4 1/5] ARM: dts: OMAP: Add timer nodes
From: Jon Hunter @ 2012-10-24 22:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50880C19.2090508@ti.com>
On 10/24/2012 10:41 AM, Benoit Cousson wrote:
> Hi Jon,
>
> On 10/19/2012 04:59 PM, Jon Hunter wrote:
>> Add the 12 GP timers nodes present in OMAP2.
>> Add the 12 GP timers nodes present in OMAP3.
>> Add the 11 GP timers nodes present in OMAP4.
>> Add the 7 GP timers nodes present in AM33xx.
>>
>> Add documentation for timer properties specific to OMAP.
>>
>> Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified
>> Vaibhav's original nodes adding information on which timers support a PWM
>> output.
>>
>> Cc: Benoit Cousson <b-cousson@ti.com>
>> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
>
> I updated the patch to remove the interrupt-parent from the DTS nodes and the documentation, as discussed on the list in the context of OMAP5 DTS for GPIO.
>
> If you are OK with that version, I'll push it to Tony along with the others DTS patches.
Thanks! Yes fine with me. I have boot tested on OMAP2420, OMAP3430 and
OMAP4430.
Tested-by: Jon Hunter <jon-hunter@ti.com>
Cheers
Jon
^ permalink raw reply
* [PATCH 1/2] cpufreq: return early from __cpufreq_driver_getavg()
From: Rafael J. Wysocki @ 2012-10-24 22:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKohponGwhC_zmk1Whq56vmZMvjcxXKiSpdvMk4ZU8z0Wa2TBw@mail.gmail.com>
On Saturday 20 of October 2012 10:12:07 Viresh Kumar wrote:
> On Oct 20, 2012 3:37 AM, "Rafael J. Wysocki" <rjw@sisk.pl> wrote:
> >
> > On Saturday 20 of October 2012 01:42:05 Viresh Kumar wrote:
> > > There is no need to do cpufreq_get_cpu() and cpufreq_put_cpu() for
> drivers that
> > > don't support getavg() routine.
> > >
> > > Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
> >
> > The patch doesn't seem to follow the changelog or the other way around.
>
> Sorry if my log isn't clear enough.
> But i could still see it matching the code :)
>
> I have moved the check for drivers capabilities at the top
> of routine, so that there is no need to call mentioned routines.
OK
Applied to linux-pm.git/linux-next as v3.8 material.
Thanks,
Rafael
--
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.
^ permalink raw reply
* [PATCH 1/2] ARM: OMAP2+: Introduce local usb.h
From: Tony Lindgren @ 2012-10-24 21:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121019073803.GG12235@arwen.pp.htv.fi>
* Felipe Balbi <balbi@ti.com> [121019 00:45]:
> On Thu, Oct 18, 2012 at 07:20:05PM -0700, Tony Lindgren wrote:
> > Let's move what we can from plat/usb.h to the local usb.h
> > for ARM common zImage support.
> >
> > This is needed so we can remove plat/usb.h for ARM common
> > zImage support.
> >
> > Cc: Felipe Balbi <balbi@ti.com>
>
> Acked-by: Felipe Balbi <balbi@ti.com>
Thanks, I've now pushed these two patches on v3.7-rc1 to
omap-for-v3.8/cleanup-headers-usb branch.
Greg and Samuel, in case you need to, it's OK to merge the
branch above now that plat/usb.h is moved.
Regards,
Tony
^ permalink raw reply
* [PATCH 3/3] pinctrl: mvebu: move to its own directory
From: Thomas Petazzoni @ 2012-10-24 21:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351114738-26793-1-git-send-email-thomas.petazzoni@free-electrons.com>
Like the spear platform, the mvebu platform has multiple files: one
core file, and then one file per SoC family. More files will be added
later, as support for mach-orion5x and mach-mv78xx0 SoCs is added to
pinctrl-mvebu. For those reasons, having a separate subdirectory,
drivers/pinctrl/mvebu/ makes sense, and it had already been suggested
by Linus Wallej when the driver was originally submitted.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
drivers/pinctrl/Kconfig | 25 +---------------------
drivers/pinctrl/Makefile | 6 +-----
drivers/pinctrl/mvebu/Kconfig | 24 +++++++++++++++++++++
drivers/pinctrl/mvebu/Makefile | 5 +++++
drivers/pinctrl/{ => mvebu}/pinctrl-armada-370.c | 0
drivers/pinctrl/{ => mvebu}/pinctrl-armada-xp.c | 0
drivers/pinctrl/{ => mvebu}/pinctrl-dove.c | 0
drivers/pinctrl/{ => mvebu}/pinctrl-kirkwood.c | 0
drivers/pinctrl/{ => mvebu}/pinctrl-mvebu.c | 0
drivers/pinctrl/{ => mvebu}/pinctrl-mvebu.h | 0
10 files changed, 31 insertions(+), 29 deletions(-)
create mode 100644 drivers/pinctrl/mvebu/Kconfig
create mode 100644 drivers/pinctrl/mvebu/Makefile
rename drivers/pinctrl/{ => mvebu}/pinctrl-armada-370.c (100%)
rename drivers/pinctrl/{ => mvebu}/pinctrl-armada-xp.c (100%)
rename drivers/pinctrl/{ => mvebu}/pinctrl-dove.c (100%)
rename drivers/pinctrl/{ => mvebu}/pinctrl-kirkwood.c (100%)
rename drivers/pinctrl/{ => mvebu}/pinctrl-mvebu.c (100%)
rename drivers/pinctrl/{ => mvebu}/pinctrl-mvebu.h (100%)
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index a9d756e..7b0f19d 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -186,30 +186,7 @@ config PINCTRL_EXYNOS4
bool "Pinctrl driver data for Exynos4 SoC"
select PINCTRL_SAMSUNG
-if PLAT_ORION
-
-config PINCTRL_MVEBU
- bool
- select PINMUX
- select PINCONF
-
-config PINCTRL_DOVE
- bool
- select PINCTRL_MVEBU
-
-config PINCTRL_KIRKWOOD
- bool
- select PINCTRL_MVEBU
-
-config PINCTRL_ARMADA_370
- bool
- select PINCTRL_MVEBU
-
-config PINCTRL_ARMADA_XP
- bool
- select PINCTRL_MVEBU
-
-endif
+source "drivers/pinctrl/mvebu/Kconfig"
source "drivers/pinctrl/spear/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index f395ba5..3cb6a0a 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -36,12 +36,8 @@ obj-$(CONFIG_PINCTRL_U300) += pinctrl-u300.o
obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o
obj-$(CONFIG_PINCTRL_SAMSUNG) += pinctrl-samsung.o
obj-$(CONFIG_PINCTRL_EXYNOS4) += pinctrl-exynos.o
-obj-$(CONFIG_PINCTRL_MVEBU) += pinctrl-mvebu.o
-obj-$(CONFIG_PINCTRL_DOVE) += pinctrl-dove.o
-obj-$(CONFIG_PINCTRL_KIRKWOOD) += pinctrl-kirkwood.o
-obj-$(CONFIG_PINCTRL_ARMADA_370) += pinctrl-armada-370.o
-obj-$(CONFIG_PINCTRL_ARMADA_XP) += pinctrl-armada-xp.o
obj-$(CONFIG_PINCTRL_XWAY) += pinctrl-xway.o
obj-$(CONFIG_PINCTRL_LANTIQ) += pinctrl-lantiq.o
+obj-$(CONFIG_PLAT_ORION) += mvebu/
obj-$(CONFIG_PLAT_SPEAR) += spear/
diff --git a/drivers/pinctrl/mvebu/Kconfig b/drivers/pinctrl/mvebu/Kconfig
new file mode 100644
index 0000000..366fa54
--- /dev/null
+++ b/drivers/pinctrl/mvebu/Kconfig
@@ -0,0 +1,24 @@
+if PLAT_ORION
+
+config PINCTRL_MVEBU
+ bool
+ select PINMUX
+ select PINCONF
+
+config PINCTRL_DOVE
+ bool
+ select PINCTRL_MVEBU
+
+config PINCTRL_KIRKWOOD
+ bool
+ select PINCTRL_MVEBU
+
+config PINCTRL_ARMADA_370
+ bool
+ select PINCTRL_MVEBU
+
+config PINCTRL_ARMADA_XP
+ bool
+ select PINCTRL_MVEBU
+
+endif
diff --git a/drivers/pinctrl/mvebu/Makefile b/drivers/pinctrl/mvebu/Makefile
new file mode 100644
index 0000000..37c2532
--- /dev/null
+++ b/drivers/pinctrl/mvebu/Makefile
@@ -0,0 +1,5 @@
+obj-$(CONFIG_PINCTRL_MVEBU) += pinctrl-mvebu.o
+obj-$(CONFIG_PINCTRL_DOVE) += pinctrl-dove.o
+obj-$(CONFIG_PINCTRL_KIRKWOOD) += pinctrl-kirkwood.o
+obj-$(CONFIG_PINCTRL_ARMADA_370) += pinctrl-armada-370.o
+obj-$(CONFIG_PINCTRL_ARMADA_XP) += pinctrl-armada-xp.o
diff --git a/drivers/pinctrl/pinctrl-armada-370.c b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
similarity index 100%
rename from drivers/pinctrl/pinctrl-armada-370.c
rename to drivers/pinctrl/mvebu/pinctrl-armada-370.c
diff --git a/drivers/pinctrl/pinctrl-armada-xp.c b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
similarity index 100%
rename from drivers/pinctrl/pinctrl-armada-xp.c
rename to drivers/pinctrl/mvebu/pinctrl-armada-xp.c
diff --git a/drivers/pinctrl/pinctrl-dove.c b/drivers/pinctrl/mvebu/pinctrl-dove.c
similarity index 100%
rename from drivers/pinctrl/pinctrl-dove.c
rename to drivers/pinctrl/mvebu/pinctrl-dove.c
diff --git a/drivers/pinctrl/pinctrl-kirkwood.c b/drivers/pinctrl/mvebu/pinctrl-kirkwood.c
similarity index 100%
rename from drivers/pinctrl/pinctrl-kirkwood.c
rename to drivers/pinctrl/mvebu/pinctrl-kirkwood.c
diff --git a/drivers/pinctrl/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c
similarity index 100%
rename from drivers/pinctrl/pinctrl-mvebu.c
rename to drivers/pinctrl/mvebu/pinctrl-mvebu.c
diff --git a/drivers/pinctrl/pinctrl-mvebu.h b/drivers/pinctrl/mvebu/pinctrl-mvebu.h
similarity index 100%
rename from drivers/pinctrl/pinctrl-mvebu.h
rename to drivers/pinctrl/mvebu/pinctrl-mvebu.h
--
1.7.9.5
^ permalink raw reply related
* [PATCH 2/3] pinctrl: mvebu: remove useless include
From: Thomas Petazzoni @ 2012-10-24 21:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351114738-26793-1-git-send-email-thomas.petazzoni@free-electrons.com>
Including the core.h header for the pinctrl subsystem is not
necessary, and it is actually causing problems when moving the
pinctrl-mvebu drivers into a separate subdirectory.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
drivers/pinctrl/pinctrl-mvebu.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-mvebu.c b/drivers/pinctrl/pinctrl-mvebu.c
index 8e6266c..6c44b7e 100644
--- a/drivers/pinctrl/pinctrl-mvebu.c
+++ b/drivers/pinctrl/pinctrl-mvebu.c
@@ -24,7 +24,6 @@
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
-#include "core.h"
#include "pinctrl-mvebu.h"
#define MPPS_PER_REG 8
--
1.7.9.5
^ permalink raw reply related
* [PATCH 1/3] pinctrl: mvebu: allow plat-orion architectures to use pinctrl-mvebu
From: Thomas Petazzoni @ 2012-10-24 21:38 UTC (permalink / raw)
To: linux-arm-kernel
The mach-kirkwood and mach-dove architectures have not yet been
integrated into the mach-mvebu directory, which should ultimately
contain the support for all Marvell SoCs from the Engineering Business
Unit.
However, before this can happen, we need to let mach-kirkwood and
mach-dove use the pinctrl-mvebu driver, which supports the kirkwood
and dove SoC families. In order to do that, we make this driver
available as soon as PLAT_ORION is selected, instead of using
ARCH_MVEBU as a condition. In the long term, PLAT_ORION should
disappear and be fully replaced by ARCH_MVEBU, but the plan is to make
the migration step by step, by first having the existing mach-*
directories for Marvell SoCs converge on several infrastructures,
including the pinctrl one.
Also, like the spear pinctrl driver, we put all pinctrl-mvebu Kconfig
options under a if, in order to avoid having certain options
(PINCTRL_DOVE, PINCTRL_KIRKWOOD, etc.) selecting an option
(PINCTLR_MVEBU) which itself has a dependency (on ARCH_MVEBU). In this
a construct, the dependency is in fact ignored due to the selects.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
drivers/pinctrl/Kconfig | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 7bf914d..a9d756e 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -186,9 +186,10 @@ config PINCTRL_EXYNOS4
bool "Pinctrl driver data for Exynos4 SoC"
select PINCTRL_SAMSUNG
+if PLAT_ORION
+
config PINCTRL_MVEBU
bool
- depends on ARCH_MVEBU
select PINMUX
select PINCONF
@@ -208,6 +209,8 @@ config PINCTRL_ARMADA_XP
bool
select PINCTRL_MVEBU
+endif
+
source "drivers/pinctrl/spear/Kconfig"
config PINCTRL_XWAY
--
1.7.9.5
^ permalink raw reply related
* [PATCH 0/9] ARM: Kirkwood: Convert to pinctrl
From: Thomas Petazzoni @ 2012-10-24 21:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121024200128.GY21046@lunn.ch>
Andrew,
On Wed, 24 Oct 2012 22:01:28 +0200, Andrew Lunn wrote:
> I guess it is too early to use gpio. I don't think the gpio driver has
> not been configured yet.
>
> I need to think about this.
>
> What happens if you comment out these two gpio_set_value calls?
The problem is (probably, I haven't tested) that in
mach-kirkwood/board-dt.c, the of_platform_populate() function is called
after all the board-specific init. So all the devices described in the
DT, including GPIO banks, have not been registered yet. Most likely the
of_platform_populate() should come before the board specific inits.
Also there should probably be a gpio_request() before those
gpio_set_value().
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH v6] Enable USB peripheral mode on dm365 EVM
From: Greg KH @ 2012-10-24 21:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1349872412-22040-1-git-send-email-const@MakeLinux.com>
On Wed, Oct 10, 2012 at 02:33:32PM +0200, Constantine Shulyupin wrote:
> From: Constantine Shulyupin <const@MakeLinux.com>
>
> Sets USB PHY clock source to 24 MHz clock and call USB configuration from board initialization.
>
> Tested with OTG configuration, usb gadget g_zero on DM365 EVM connected to PC.
>
> References:
>
> Definition of USB_PHY_CTRL and PHYCLKFREQ:
> - http://www.makelinux.com/lib/ti/DM36x_ARM/doc-141
>
> Original patch by miguel.aguilar at ridgerun.com three years ago:
> - http://www.mail-archive.com/davinci-linux-open-source at linux.davincidsp.com/msg14741.html
>
> Signed-off-by: Constantine Shulyupin <const@MakeLinux.com>
Note, Felipe is the right person to be sending these types of patches
to, not me. scripts/get_maintainer.pl is your friend :)
thanks,
greg k-h
^ permalink raw reply
* [PATCH 2/2] cpufreq: governors: remove redundant code
From: Rafael J. Wysocki @ 2012-10-24 21:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1597360.JT7plJlUsZ@vostro.rjw.lan>
On Wednesday 24 of October 2012 21:43:46 Rafael J. Wysocki wrote:
> On Wednesday 24 of October 2012 11:37:13 Viresh Kumar wrote:
> > On 22 October 2012 14:16, Viresh Kumar <viresh.kumar@linaro.org> wrote:
> > > On 20 October 2012 01:42, Viresh Kumar <viresh.kumar@linaro.org> wrote:
> > >> Initially ondemand governor was written and then using its code conservative
> > >> governor is written. It used a lot of code from ondemand governor, but copy of
> > >> code was created instead of using the same routines from both governors. Which
> > >> increased code redundancy, which is difficult to manage.
> > >>
> > >> This patch is an attempt to move common part of both the governors to
> > >> cpufreq_governor.c file to come over above mentioned issues.
> > >>
> > >> This shouldn't change anything from functionality point of view.
> > >>
> > >> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
> >
> > For everybody else, this patch is already pushed by Rafael in his linux-next
> > branch.
>
> Well, not yet, although I'm going to do that.
Or I would if it still applied. Unfortunately, though, it doesn't apply any
more to my linux-next branch due to some previous changes in it.
Care to rebase?
Rafael
--
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.
^ permalink raw reply
* [PATCH 0/9] ARM: Kirkwood: Convert to pinctrl
From: Michael Walle @ 2012-10-24 20:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121024200128.GY21046@lunn.ch>
Am Mittwoch 24 Oktober 2012, 22:01:28 schrieb Andrew Lunn:
> What happens if you comment out these two gpio_set_value calls?
After commenting out and fixing the mpp funtions (see earlier mail from me)
the kernel hangs after rtc-mv/before orion_wdt.
Your tree:
Uncompressing Linux... done, booting the kernel.
Booting Linux on physical CPU 0
Linux version 3.7.0-rc2-00015-g2773c33-dirty (mw at thanatos) (gcc version 4.4.5
(Debian 4.4.5-8) ) #9 PREEMPT Wed Oct 24 22:27:07 CEST 2012
CPU: Feroceon 88FR131 [56251311] revision 1 (ARMv5TE), cr=00053977
CPU: VIVT data cache, VIVT instruction cache
Machine: Marvell Kirkwood (Flattened Device Tree), model: Buffalo Linkstation
LS-CHLv2
bootconsole [earlycon0] enabled
Memory policy: ECC disabled, Data cache writeback
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 16256
Kernel command line: console=ttyS0,115200 root=/dev/sda2 earlyprintk
PID hash table entries: 256 (order: -2, 1024 bytes)
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
Memory: 64MB = 64MB total
Memory: 55828k/55828k available, 9708k reserved, 0K highmem
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
vmalloc : 0xc4800000 - 0xff000000 ( 936 MB)
lowmem : 0xc0000000 - 0xc4000000 ( 64 MB)
modules : 0xbf000000 - 0xc0000000 ( 16 MB)
.text : 0xc0008000 - 0xc04e2660 (4970 kB)
.init : 0xc04e3000 - 0xc0506ca0 ( 144 kB)
.data : 0xc0508000 - 0xc0540280 ( 225 kB)
.bss : 0xc05402a4 - 0xc05d7a3c ( 606 kB)
SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:114
sched_clock: 32 bits at 166MHz, resolution 5ns, wraps every 25769ms
Console: colour dummy device 80x30
Calibrating delay loop... 597.60 BogoMIPS (lpj=2988032)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
Setting up static identity map for 0x3baaa8 - 0x3baae4
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 1024 KiB pool for atomic coherent allocations
Kirkwood: MV88F6281-A1, TCLK=166666667.
Feroceon L2: Enabling L2
Feroceon L2: Cache support initialised.
bio: create slab <bio-0> at 0
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
cfg80211: Calling CRDA to update world regulatory domain
Switching to clocksource orion_clocksource
NET: Registered protocol family 2
TCP established hash table entries: 2048 (order: 2, 16384 bytes)
TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
TCP: reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
jffs2: version 2.2. (NAND) ? 2001-2006 Red Hat, Inc.
msgmni has been set to 109
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
kirkwood-pinctrl f1010000.pinctrl: registered pinctrl driver
mv_xor_shared mv_xor_shared.0: Marvell shared XOR driver
mv_xor_shared mv_xor_shared.1: Marvell shared XOR driver
mv_xor mv_xor.0: Marvell XOR: ( xor cpy )
mv_xor mv_xor.1: Marvell XOR: ( xor fill cpy )
mv_xor mv_xor.2: Marvell XOR: ( xor cpy )
mv_xor mv_xor.3: Marvell XOR: ( xor fill cpy )
Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
f1012000.serial: ttyS0 at MMIO 0xf1012000 (irq = 33) is a 16550A
console [ttyS0] enabled, bootconsole disabled
console [ttyS0] enabled, bootconsole disabled
loop: module loaded
sata_mv sata_mv.0: cannot get optional clkdev
sata_mv sata_mv.0: slots 32 ports 1
scsi0 : sata_mv
ata1: SATA max UDMA/133 irq 21
m25p80 spi0.0: m25p40 (512 Kbytes)
3 ofpart partitions found on MTD device spi0.0
Creating 3 MTD partitions on "spi0.0":
0x000000000000-0x000000060000 : "uboot"
0x000000060000-0x000000070000 : "dtb"
0x000000070000-0x000000080000 : "uboot_env"
mv643xx_eth: MV-643xx 10/100/1000 ethernet driver version 1.4
libphy: mv643xx_eth smi: probed
mv643xx_eth_port mv643xx_eth_port.0 eth0: port 0 with MAC address
00:00:00:00:00:00
mv643xx_eth_port mv643xx_eth_port.1 eth1: port 0 with MAC address
4c:e6:76:61:b9:f7
libertas_sdio: Libertas SDIO driver
libertas_sdio: Copyright Pierre Ossman
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
orion-ehci orion-ehci.0: Marvell Orion EHCI
orion-ehci orion-ehci.0: new USB bus registered, assigned bus number 1
orion-ehci orion-ehci.0: irq 19, io mem 0xf1050000
orion-ehci orion-ehci.0: USB 2.0 started, EHCI 1.00
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
usbcore: registered new interface driver ums-datafab
usbcore: registered new interface driver ums-freecom
usbcore: registered new interface driver ums-jumpshot
usbcore: registered new interface driver ums-sddr09
usbcore: registered new interface driver ums-sddr55
mousedev: PS/2 mouse device common for all mice
rtc-mv f1010300.rtc: rtc core: registered f1010300.rtc as rtc0
i2c /dev entries driver
v3.7rc2 tag:
Uncompressing Linux... done, booting the kernel.
Booting Linux on physical CPU 0
Linux version 3.7.0-rc2 (mw at thanatos) (gcc version 4.4.5 (Debian 4.4.5-8) )
#11 PREEMPT Wed Oct 24 22:42:25 CEST 2012
CPU: Feroceon 88FR131 [56251311] revision 1 (ARMv5TE), cr=00053977
CPU: VIVT data cache, VIVT instruction cache
Machine: Marvell Kirkwood (Flattened Device Tree), model: Buffalo Linkstation
LS-CHLv2
Memory policy: ECC disabled, Data cache writeback
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 16256
Kernel command line: console=ttyS0,115200 root=/dev/sda2 earlyprintk
PID hash table entries: 256 (order: -2, 1024 bytes)
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
Memory: 64MB = 64MB total
Memory: 55884k/55884k available, 9652k reserved, 0K highmem
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
vmalloc : 0xc4800000 - 0xff000000 ( 936 MB)
lowmem : 0xc0000000 - 0xc4000000 ( 64 MB)
modules : 0xbf000000 - 0xc0000000 ( 16 MB)
.text : 0xc0008000 - 0xc04d82e4 (4929 kB)
.init : 0xc04d9000 - 0xc04fcda0 ( 144 kB)
.data : 0xc04fe000 - 0xc0533fa0 ( 216 kB)
.bss : 0xc0533fc4 - 0xc05cb59c ( 606 kB)
SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:114
sched_clock: 32 bits at 166MHz, resolution 5ns, wraps every 25769ms
Console: colour dummy device 80x30
Calibrating delay loop... 597.60 BogoMIPS (lpj=2988032)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
Setting up static identity map for 0x3b41c8 - 0x3b4204
NET: Registered protocol family 16
DMA: preallocated 1024 KiB pool for atomic coherent allocations
Kirkwood: MV88F6281-A1, TCLK=166666667.
Feroceon L2: Enabling L2
Feroceon L2: Cache support initialised.
bio: create slab <bio-0> at 0
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
cfg80211: Calling CRDA to update world regulatory domain
Switching to clocksource orion_clocksource
NET: Registered protocol family 2
TCP established hash table entries: 2048 (order: 2, 16384 bytes)
TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
TCP: reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
jffs2: version 2.2. (NAND) ? 2001-2006 Red Hat, Inc.
msgmni has been set to 109
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
mv_xor_shared mv_xor_shared.0: Marvell shared XOR driver
mv_xor_shared mv_xor_shared.1: Marvell shared XOR driver
mv_xor mv_xor.0: Marvell XOR: ( xor cpy )
mv_xor mv_xor.1: Marvell XOR: ( xor fill cpy )
mv_xor mv_xor.2: Marvell XOR: ( xor cpy )
mv_xor mv_xor.3: Marvell XOR: ( xor fill cpy )
Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
f1012000.serial: ttyS0 at MMIO 0xf1012000 (irq = 33) is a 16550A
console [ttyS0] enabled
loop: module loaded
sata_mv sata_mv.0: cannot get optional clkdev
sata_mv sata_mv.0: slots 32 ports 1
scsi0 : sata_mv
ata1: SATA max UDMA/133 irq 21
m25p80 spi0.0: m25p40 (512 Kbytes)
3 ofpart partitions found on MTD device spi0.0
Creating 3 MTD partitions on "spi0.0":
0x000000000000-0x000000060000 : "uboot"
0x000000060000-0x000000070000 : "dtb"
0x000000070000-0x000000080000 : "uboot_env"
mv643xx_eth: MV-643xx 10/100/1000 ethernet driver version 1.4
libphy: mv643xx_eth smi: probed
mv643xx_eth_port mv643xx_eth_port.0 eth0: port 0 with MAC address
00:00:00:00:00:00
mv643xx_eth_port mv643xx_eth_port.1 eth1: port 0 with MAC address
4c:e6:76:61:b9:f7
libertas_sdio: Libertas SDIO driver
libertas_sdio: Copyright Pierre Ossman
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
orion-ehci orion-ehci.0: Marvell Orion EHCI
orion-ehci orion-ehci.0: new USB bus registered, assigned bus number 1
orion-ehci orion-ehci.0: irq 19, io mem 0xf1050000
orion-ehci orion-ehci.0: USB 2.0 started, EHCI 1.00
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
usbcore: registered new interface driver ums-datafab
usbcore: registered new interface driver ums-freecom
usbcore: registered new interface driver ums-jumpshot
usbcore: registered new interface driver ums-sddr09
usbcore: registered new interface driver ums-sddr55
mousedev: PS/2 mouse device common for all mice
rtc-mv f1010300.rtc: rtc core: registered f1010300.rtc as rtc0
i2c /dev entries driver
orion_wdt: Initial timeout 25 sec
cpuidle: using governor ladder
cpuidle: using governor menu
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
oprofile: no performance counters
oprofile: using timer interrupt.
TCP: cubic registered
NET: Registered protocol family 17
lib80211: common routines for IEEE802.11 drivers
input: gpio_keys.1 as /devices/gpio_keys.1/input/input0
rtc-mv f1010300.rtc: setting system clock to 2000-01-01 00:00:00 UTC
(946684800)
ata1: SATA link down (SStatus 0 SControl F300)
VFS: Cannot open root device "sda2" or unknown-block(0,0): error -6
--
michael
^ permalink raw reply
* [PATCH 7/9] ARM: Kirkwood: Convert ib62x0 to pinctrl.
From: Simon Baatz @ 2012-10-24 20:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351090434-30499-8-git-send-email-andrew@lunn.ch>
Hi Andrew,
first of all thanks for providing these patches!
Just a typo for now:
On Wed, Oct 24, 2012 at 04:53:52PM +0200, Andrew Lunn wrote:
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> ---
> arch/arm/boot/dts/kirkwood-ib62x0.dts | 41 +++++++++++++++++++++++++++++++++
> arch/arm/mach-kirkwood/board-ib62x0.c | 21 -----------------
> 2 files changed, 41 insertions(+), 21 deletions(-)
>
> diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts
> index 66794ed..713b39b 100644
> --- a/arch/arm/boot/dts/kirkwood-ib62x0.dts
> +++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts
> @@ -16,6 +16,47 @@
> };
>
> ocp at f1000000 {
> + pinctrl: pinctrl at 10000 {
> + compatible = "marvell,88f6281-pinctrl";
> + reg = <0x10000 0x20>;
> +
> + pinctrl-0 = < &pmx_nand
> + &pmx_led_os_red &pmx_power_off
> + &pmx_led_os_green &pmx_led_usb_transfer
> + &pmx_button_reset &pmx_button_usb_copy >;
> + pinctrl-names = "default";
> +
> + pmx_nand: pmx-nand {
> + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
> + "mpp04", "mpp5", "mpp18",
mpp04 -> mpp4
- Simon
^ permalink raw reply
* [PATCH 8/9] ARM: Kirkwood: Convert lsxl boards to pinctrl.
From: Michael Walle @ 2012-10-24 20:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351090434-30499-9-git-send-email-andrew@lunn.ch>
Am Mittwoch 24 Oktober 2012, 16:53:53 schrieb Andrew Lunn:
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> ---
> arch/arm/boot/dts/kirkwood-lsxl.dtsi | 67
> ++++++++++++++++++++++++++++++++++ arch/arm/mach-kirkwood/board-lsxl.c |
> 19 ----------
> 2 files changed, 67 insertions(+), 19 deletions(-)
>
> diff --git a/arch/arm/boot/dts/kirkwood-lsxl.dtsi
> b/arch/arm/boot/dts/kirkwood-lsxl.dtsi index 8fea375..01d6e3a 100644
> --- a/arch/arm/boot/dts/kirkwood-lsxl.dtsi
> +++ b/arch/arm/boot/dts/kirkwood-lsxl.dtsi
> @@ -6,6 +6,73 @@
> };
>
> ocp at f1000000 {
> + pinctrl: pinctrl at 10000 {
> + compatible = "marvell,88f6281-pinctrl";
> + reg = <0x10000 0x20>;
> +
> + pinctrl-0 = < &pmx_power_hdd &pmx_usb_vbus
> + &pmx_fan_low &pmx_fan_high
> + &pmx_led_function_red &pmx_led_alarm
> + &pmx_led_info &pmx_led_power
> + &pmx_fan_lock &pmx_button_function
> + &pmx_power_switch &pmx_power_auto_switch
> + &pmx_led_function_blue >;
> + pinctrl-names = "default";
> +
> + pmx_power_hdd: pmx-power-hdd {
> + marvell,pins = "mpp10";
> + marvell,function = "gpio";
function is "gpo";
> + };
> + pmx_usb_vbus: pmx-usb-vbus {
> + marvell,pins = "mpp11";
> + marvell,function = "gpio";
> + };
> + pmx_fan_high: pmx-fan-high {
> + marvell,pins = "mpp18";
> + marvell,function = "gpo";
> + };
> + pmx_fan_low: pmx-fan-low {
> + marvell,pins = "mpp19";
> + marvell,function = "gpo";
> + };
> + pmx_led_function_blue: pmx-led-function-blue {
> + marvell,pins = "mpp36";
> + marvell,function = "gpio";
> + };
> + pmx_led_alarm: pmx-led-alarm {
> + marvell,pins = "mpp37";
> + marvell,function = "gpio";
> + };
> + pmx_led_info: pmx-led-info {
> + marvell,pins = "mpp38";
> + marvell,function = "gpio";
> + };
> + pmx_led_power: pmx-led-power {
> + marvell,pins = "mpp39";
> + marvell,function = "gpio";
> + };
> + pmx_fan_lock: pmx-fan-lock {
> + marvell,pins = "mpp40";
> + marvell,function = "gpo";
gpio
> + };
> + pmx_button_function: pmx-button-function {
> + marvell,pins = "mpp41";
> + marvell,function = "gpio";
> + };
> + pmx_power_switch: pmx-power-switch {
> + marvell,pins = "mpp42";
> + marvell,function = "gpio";
> + };
> + pmx_power_auto_switch: pmx-power-auto-switch {
> + marvell,pins = "mpp43";
> + marvell,function = "gpio";
> + };
> + pmx_led_function_red: pmx-led-function_red {
> + marvell,pins = "mpp43";
> + marvell,function = "gpio";
> + };
> +
> + };
> sata at 80000 {
> status = "okay";
> nr-ports = <1>;
> diff --git a/arch/arm/mach-kirkwood/board-lsxl.c
> b/arch/arm/mach-kirkwood/board-lsxl.c index 83d8975..868bdb0 100644
> --- a/arch/arm/mach-kirkwood/board-lsxl.c
> +++ b/arch/arm/mach-kirkwood/board-lsxl.c
> @@ -26,7 +26,6 @@
> #include <asm/mach/arch.h>
> #include <mach/kirkwood.h>
> #include "common.h"
> -#include "mpp.h"
>
> static struct mv643xx_eth_platform_data lsxl_ge00_data = {
> .phy_addr = MV643XX_ETH_PHY_ADDR(0),
> @@ -36,23 +35,6 @@ static struct mv643xx_eth_platform_data lsxl_ge01_data =
> { .phy_addr = MV643XX_ETH_PHY_ADDR(8),
> };
>
> -static unsigned int lsxl_mpp_config[] __initdata = {
> - MPP10_GPO, /* HDD Power Enable */
> - MPP11_GPIO, /* USB Vbus Enable */
> - MPP18_GPO, /* FAN High Enable# */
> - MPP19_GPO, /* FAN Low Enable# */
> - MPP36_GPIO, /* Function Blue LED */
> - MPP37_GPIO, /* Alarm LED */
> - MPP38_GPIO, /* Info LED */
> - MPP39_GPIO, /* Power LED */
> - MPP40_GPIO, /* Fan Lock */
> - MPP41_GPIO, /* Function Button */
> - MPP42_GPIO, /* Power Switch */
> - MPP43_GPIO, /* Power Auto Switch */
> - MPP48_GPIO, /* Function Red LED */
> - 0
> -};
> -
> #define LSXL_GPIO_FAN_HIGH 18
> #define LSXL_GPIO_FAN_LOW 19
> #define LSXL_GPIO_FAN_LOCK 40
> @@ -119,7 +101,6 @@ void __init lsxl_init(void)
> /*
> * Basic setup. Needs to be called early.
> */
> - kirkwood_mpp_conf(lsxl_mpp_config);
>
> /* usb and sata power on */
> gpio_set_value(LSXL_GPIO_USB_POWER, 1);
--
Michael
^ permalink raw reply
* [PATCH 2/2] arm: mvebu: Add hardware I/O Coherency support
From: Arnd Bergmann @ 2012-10-24 20:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5087F38B.1010508@free-electrons.com>
On Wednesday 24 October 2012, Gregory CLEMENT wrote:
> > No, I was thinking of making the underlying functions globally visible
> > and have extern declarations in a header file so you can access them
> > directly.
> >
> > Generally speaking, when you run into a problem with common code, your
> > first approach should be to fix the common code before you try to work
> > around it.
>
> OK I thought it was done on purpose. But if you consider it needs to be
> fixed I will add patch for it in next version.
As long as the functions were only used locally in one file, it's
better not to make them globally visible as a rule. But if we know
that they are needed, that should be made explicit. Please fix this
by submitting another patch to make those functions global and then
rebase this series on top of that.
Arnd
^ permalink raw reply
* [PATCH 9/9] ARM: Kirkwood: Convert IX2-200 to pinctrl.
From: Thomas Petazzoni @ 2012-10-24 20:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121024202010.GB21046@lunn.ch>
Andrew,
On Wed, 24 Oct 2012 22:20:10 +0200, Andrew Lunn wrote:
> The reg maybe. Compatibility not. We need to tell pinctrl which of the
> 5 different variants of kirkwood this particular kirkwood is. See
Agreed.
> drivers/pinctrl/pinctrl-kirkwood.c
>
> enum kirkwood_variant {
> VARIANT_MV88F6180 = V(1, 0, 0, 0, 0),
> VARIANT_MV88F6190 = V(0, 1, 0, 0, 0),
> VARIANT_MV88F6192 = V(0, 0, 1, 0, 0),
> VARIANT_MV88F6281 = V(0, 0, 0, 1, 0),
> VARIANT_MV88F6282 = V(0, 0, 0, 0, 1),
> };
>
> static struct of_device_id kirkwood_pinctrl_of_match[] __devinitdata = {
> { .compatible = "marvell,88f6180-pinctrl", .data = &mv88f6180_info },
> { .compatible = "marvell,88f6190-pinctrl", .data = &mv88f6190_info },
> { .compatible = "marvell,88f6192-pinctrl", .data = &mv88f6192_info },
> { .compatible = "marvell,88f6281-pinctrl", .data = &mv88f6281_info },
> { .compatible = "marvell,88f6282-pinctrl", .data = &mv88f6282_info },
> { }
> };
>
> What SoC is mounted on a board is a property of the board....
The way we solved that on Armada XP is that we have a common
armada-xp.dtsi file with definitions common to all SoCs in the family.
Then, we have sub .dtsi files named armada-xp-mv78230.dtsi,
armada-xp-mv78260.dtsi and armada-xp-mv78460.dtsi that handle the
differences between specific SoCs in the family. For example, the
differences are: different compatible string for the pinctrl driver,
different number of CPUs, different number of pins and
therefore different number of GPIOs, different number of PCIe ports,
etc. But besides those differences, most units have a lot of common
definitions, that we factor out in armada-xp.dtsi.
So we have the following hierarchy:
+ armada-xp.dtsi
+ armada-xp-mv78230.dtsi
+ someboard-here.dts
+ armada-xp-mv78260.dtsi
+ openblocks-ax3-4.dts
+ armada-xp-mv78460.dtsi
+ armada-xp-db.dts
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH] [RFC] pinctrl: mvebu: reset pins to an UNKNOWN state on startup
From: Thomas Petazzoni @ 2012-10-24 20:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121024201545.GA21046@lunn.ch>
Dear Andrew Lunn,
On Wed, 24 Oct 2012 22:15:45 +0200, Andrew Lunn wrote:
> On Wed, Oct 24, 2012 at 09:18:01PM +0200, Thomas Petazzoni wrote:
> > Note: this patch is a *RFC*, it is not intended for merging, only to
> > get a discussion started. The code is horrible, makes terrible
> > assumptions and so on.
> >
> > On many platforms, most of the pinmux initialization is done in the
> > bootloader, and therefore persists when we boot the Linux kernel. This
> > prevents us from making sure that the pinmux configuration in the
> > board device trees is correct.
>
> You can get a lot of information from /debug. eg,
> # cat /debug/pinctrl/f1010000.pinctrl/pinconf-groups
Yes, I was using that one...
> # cat /debug/pinctrl/f1010000.pinctrl/pinmux-pins
> Pinmux settings per pin
> Format: pin (name): mux_owner gpio_owner hog?
... but not that one.
> If you compare the two, you can see that pin 6 has probably been set by
> uboot, but not by DT.
Indeed, by correlating the two files, you can get a good view of which
pins are configured even though no driver has claimed them. I don't
think it's as clear as having a non-functional device due to the pin
not being muxed at all, but if it is thought as being sufficient, then
fair enough.
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH 9/9] ARM: Kirkwood: Convert IX2-200 to pinctrl.
From: Andrew Lunn @ 2012-10-24 20:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121024220429.50e2b0b8@skate>
On Wed, Oct 24, 2012 at 10:04:29PM +0200, Thomas Petazzoni wrote:
> Andrew,
>
> On Wed, 24 Oct 2012 16:53:54 +0200, Andrew Lunn wrote:
> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> > ---
> > arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts | 90 +++++++++++++++++++++++++
> > arch/arm/mach-kirkwood/board-iomega_ix2_200.c | 24 -------
> > 2 files changed, 90 insertions(+), 24 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
> > index 865aeec..d8fa8e8 100644
> > --- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
> > +++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
> > @@ -16,6 +16,96 @@
> > };
> >
> > ocp at f1000000 {
> > + pinctrl: pinctrl at 10000 {
> > + compatible = "marvell,88f6281-pinctrl";
> > + reg = <0x10000 0x20>;
>
> This definition (compatible + reg) should go in kirkwood.dtsi. The
> pinctrl unit should be declared at the SoC level. Ditto for all other
> patches.
The reg maybe. Compatibility not. We need to tell pinctrl which of the
5 different variants of kirkwood this particular kirkwood is. See
drivers/pinctrl/pinctrl-kirkwood.c
enum kirkwood_variant {
VARIANT_MV88F6180 = V(1, 0, 0, 0, 0),
VARIANT_MV88F6190 = V(0, 1, 0, 0, 0),
VARIANT_MV88F6192 = V(0, 0, 1, 0, 0),
VARIANT_MV88F6281 = V(0, 0, 0, 1, 0),
VARIANT_MV88F6282 = V(0, 0, 0, 0, 1),
};
static struct of_device_id kirkwood_pinctrl_of_match[] __devinitdata = {
{ .compatible = "marvell,88f6180-pinctrl", .data = &mv88f6180_info },
{ .compatible = "marvell,88f6190-pinctrl", .data = &mv88f6190_info },
{ .compatible = "marvell,88f6192-pinctrl", .data = &mv88f6192_info },
{ .compatible = "marvell,88f6281-pinctrl", .data = &mv88f6281_info },
{ .compatible = "marvell,88f6282-pinctrl", .data = &mv88f6282_info },
{ }
};
What SoC is mounted on a board is a property of the board....
Andrew
^ permalink raw reply
* [PATCH v2 2/4] zynq: move static peripheral mappings
From: Nick Bowler @ 2012-10-24 20:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121023234219.GM20593@beefymiracle.amer.corp.natinst.com>
On 2012-10-23 18:42 -0500, Josh Cartwright wrote:
> On Tue, Oct 23, 2012 at 04:27:03PM -0400, Nick Bowler wrote:
> > Just FYI, I sent a patch to fix the same bug a while back
> >
> > https://patchwork.kernel.org/patch/1156361/
> >
> > together with other patches to fix early printk on the ZC702 serial
> > console. Admittedly, I dropped the ball on these as other issues
> > came up so I was away from the Zynq for a while.
> >
> > However, I'm now getting back on the Zynq and have a bunch of patches to
> > make it all work on the ZC702 board. I've respun the ZC702 early boot
> > fixes against newer git but they're obviously going to conflict with
> > this series. Should I resend them anyway?
>
> If you have other fixes for the zc702, that'd be great. Most of my
> testing has been in a qemu model; I haven't had a chance to try getting
> the zc702 booting yet.
>
> The first stumbling block is that it looks like the secondary uart is
> the primary uart on the zc702.
Yes, that is indeed the case, and was what I tried to address with my
earlier patches.
> > I also have a DT binding for the TTC driver, I can send that.
>
> That'd be great!
OK, I will respin and test this stuff on top of your v4 series and send
them out.
Cheers,
--
Nick Bowler, Elliptic Technologies (http://www.elliptictech.com/)
^ permalink raw reply
* [PATCH 1/9] ARM: Kirkwood: Convert TS219 to pinctrl.
From: Thomas Petazzoni @ 2012-10-24 20:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50884C12.7050809@gmail.com>
Sebastian,
On Wed, 24 Oct 2012 22:14:10 +0200, Sebastian Hesselbarth wrote:
> > Where did I say that you should define *all* possible configurations?
> >
> > I said: "The SoC .dtsi file should define all the pinmux groups that are
> > described in the datasheet and are used by boards". Read again the "and
> > are used by boards".
>
> Ok, then I overread "and used by other boards". Sorry for that.
No problem :)
> > So I'm clearly not advocating adding *all* possible configurations,
> > because there would be gazillions of them. But I'm in favor of moving
> > the *used* configurations to the .dtsi files.
>
> Agreed.
Great!
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH] [RFC] pinctrl: mvebu: reset pins to an UNKNOWN state on startup
From: Andrew Lunn @ 2012-10-24 20:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351106281-31288-1-git-send-email-thomas.petazzoni@free-electrons.com>
On Wed, Oct 24, 2012 at 09:18:01PM +0200, Thomas Petazzoni wrote:
> Note: this patch is a *RFC*, it is not intended for merging, only to
> get a discussion started. The code is horrible, makes terrible
> assumptions and so on.
>
> On many platforms, most of the pinmux initialization is done in the
> bootloader, and therefore persists when we boot the Linux kernel. This
> prevents us from making sure that the pinmux configuration in the
> board device trees is correct.
You can get a lot of information from /debug. eg,
# cat /debug/pinctrl/f1010000.pinctrl/pinconf-groups
Pin config settings per pin group
Format: group (name): configs
0 (mpp0):current: spi(cs), available = [ gpio(io) nand(io2) ]
1 (mpp1):current: spi(mosi), available = [ gpo(o) nand(io3) ]
2 (mpp2):current: spi(sck), available = [ gpo(o) nand(io4) ]
3 (mpp3):current: spi(miso), available = [ gpo(o) nand(io5) ]
4 (mpp4):current: sata1(act), available = [ gpio(io) nand(io6) uart0(rxd) lcd(hsync) ]
5 (mpp5):current: sata0(act), available = [ gpo(o) nand(io7) uart0(txd) lcd(vsync) ]
6 (mpp6):current: spi(mosi), available = [ sysrst(out) ]
7 (mpp7):current: gpo(o), available = [ spi(cs) lcd(pwm) ]
8 (mpp8):current: twsi0(sda), available = [ gpio(io) uart0(rts) uart1(rts) mii-1(rxerr) sata1(prsnt) mii(col) ]
9 (mpp9):current: twsi0(sck), available = [ gpio(io) uart0(cts) uart1(cts) sata0(prsnt) mii(crs) ]
10 (mpp10):current: uart0(txd), available = [ gpo(o) spi(sck) sata1(act) ]
11 (mpp11):current: uart0(rxd), available = [ gpio(io) spi(miso) sata0(act) ]
12 (mpp12):current: gpo(o), available = [ sdio(clk) audio(spdifo) spi(mosi) twsi1(sda) ]
13 (mpp13):current: uart1(txd), available = [ gpio(io) sdio(cmd) audio(rmclk) lcd(pwm) ]
14 (mpp14):current: uart1(rxd), available = [ gpio(io) sdio(d0) sata1(prsnt) audio(spdifi) audio-1(sdi) mii(col) ]
15 (mpp15):current: sata0(act), available = [ gpio(io) sdio(d1) uart0(rts) uart1(txd) spi(cs) ]
16 (mpp16):current: gpio(io), available = [ sdio(d2) uart0(cts) uart1(rxd) sata1(act) lcd(extclk) mii(crs) ]
17 (mpp17):current: gpio(io), available = [ sdio(d3) sata0(prsnt) sata1(act) twsi1(sck) ]
18 (mpp18):current: gpo(o), available = [ nand(io0) pex(clkreq) ]
19 (mpp19):current: gpo(o), available = [ nand(io1) ]
20 (mpp20):current: sata1(act), available = [ gpio(io) ts(mp0) tdm(tx0ql) ge1(txd0) audio(spdifi) lcd(d0) ]
21 (mpp21):current: sata0(act), available = [ gpio(io) ts(mp1) tdm(rx0ql) ge1(txd1) audio(spdifo) lcd(d1) ]
22 (mpp22):current: sata1(prsnt), available = [ gpio(io) ts(mp2) tdm(tx2ql) ge1(txd2) audio(rmclk) lcd(d2) ]
23 (mpp23):current: sata0(prsnt), available = [ gpio(io) ts(mp3) tdm(rx2ql) ge1(txd3) audio(bclk) lcd(d3) ]
24 (mpp24):current: gpio(io), available = [ ts(mp4) tdm(spi-cs0) ge1(rxd0) audio(sdo) lcd(d4) ]
25 (mpp25):current: gpio(io), available = [ ts(mp5) tdm(spi-sck) ge1(rxd1) audio(lrclk) lcd(d5) ]
26 (mpp26):current: gpio(io), available = [ ts(mp6) tdm(spi-miso) ge1(rxd2) audio(mclk) lcd(d6) ]
27 (mpp27):current: gpio(io), available = [ ts(mp7) tdm(spi-mosi) ge1(rxd3) audio(sdi) lcd(d7) ]
28 (mpp28):current: gpio(io), available = [ ts(mp8) tdm(int) ge1(col) audio(extclk) lcd(d8) ]
29 (mpp29):current: gpio(io), available = [ ts(mp9) tdm(rst) ge1(txclk) lcd(d9) ]
30 (mpp30):current: gpio(io), available = [ ts(mp10) tdm(pclk) ge1(rxctl) lcd(d10) ]
31 (mpp31):current: gpio(io), available = [ ts(mp11) tdm(fs) ge1(rxclk) lcd(d11) ]
32 (mpp32):current: gpio(io), available = [ ts(mp12) tdm(drx) ge1(txclko) lcd(d12) ]
33 (mpp33):current: gpo(o), available = [ tdm(dtx) ge1(txctl) lcd(d13) ]
34 (mpp34):current: gpio(io), available = [ tdm(spi-cs1) ge1(txen) sata1(act) lcd(d14) ]
35 (mpp35):current: gpio(io), available = [ tdm(tx0ql) ge1(rxerr) sata0(act) lcd(d15) mii(rxerr) ]
36 (mpp36):current: gpio(io), available = [ ts(mp0) tdm(spi-cs1) audio(spdifi) twsi1(sda) ]
37 (mpp37):current: gpio(io), available = [ ts(mp1) tdm(tx2ql) audio(spdifo) twsi1(sck) ]
38 (mpp38):current: gpio(io), available = [ ts(mp2) tdm(rx2ql) audio(rmclk) lcd(d18) ]
39 (mpp39):current: gpio(io), available = [ ts(mp3) tdm(spi-cs0) audio(bclk) lcd(d19) ]
40 (mpp40):current: gpio(io), available = [ ts(mp4) tdm(spi-sck) audio(sdo) lcd(d20) ]
41 (mpp41):current: gpio(io), available = [ ts(mp5) tdm(spi-miso) audio(lrclk) lcd(d21) ]
42 (mpp42):current: gpio(io), available = [ ts(mp6) tdm(spi-mosi) audio(mclk) lcd(d22) ]
43 (mpp43):current: gpio(io), available = [ ts(mp7) tdm(int) audio(sdi) lcd(d23) ]
44 (mpp44):current: gpio(io), available = [ ts(mp8) tdm(rst) audio(extclk) lcd(clk) ]
45 (mpp45):current: gpio(io), available = [ ts(mp9) tdm(pclk) lcd(e) ]
46 (mpp46):current: gpio(io), available = [ ts(mp10) tdm(fs) lcd(hsync) ]
47 (mpp47):current: gpio(io), available = [ ts(mp11) tdm(drx) lcd(vsync) ]
48 (mpp48):current: gpio(io), available = [ ts(mp12) tdm(dtx) lcd(d16) ]
49 (mpp49):current: gpo(o), available = [ tdm(rx0ql) pex(clkreq) lcd(d17) ]
shows the current configuration of each pin.
# cat /debug/pinctrl/f1010000.pinctrl/pinmux-pins
Pinmux settings per pin
Format: pin (name): mux_owner gpio_owner hog?
pin 0 (PIN0): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function spi group mpp0
pin 1 (PIN1): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function spi group mpp1
pin 2 (PIN2): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function spi group mpp2
pin 3 (PIN3): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function spi group mpp3
pin 4 (PIN4): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function sata1 group mpp4
pin 5 (PIN5): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function sata0 group mpp5
pin 6 (PIN6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 7 (PIN7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 8 (PIN8): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function twsi0 group mpp8
pin 9 (PIN9): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function twsi0 group mpp9
pin 10 (PIN10): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function uart0 group mpp10
pin 11 (PIN11): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function uart0 group mpp11
pin 12 (PIN12): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 13 (PIN13): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function uart1 group mpp13
pin 14 (PIN14): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function uart1 group mpp14
pin 15 (PIN15): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 16 (PIN16): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 17 (PIN17): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 18 (PIN18): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 19 (PIN19): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 20 (PIN20): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function sata1 group mpp20
pin 21 (PIN21): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function sata0 group mpp21
pin 22 (PIN22): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function sata1 group mpp22
pin 23 (PIN23): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function sata0 group mpp23
pin 24 (PIN24): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 25 (PIN25): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 26 (PIN26): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 27 (PIN27): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 28 (PIN28): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 29 (PIN29): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 30 (PIN30): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 31 (PIN31): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 32 (PIN32): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 33 (PIN33): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 34 (PIN34): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 35 (PIN35): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 36 (PIN36): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function gpio group mpp36
pin 37 (PIN37): f1010000.pinctrl mvebu-gpio:37 (HOG) function gpio group mpp37
pin 38 (PIN38): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 39 (PIN39): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 40 (PIN40): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 41 (PIN41): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 42 (PIN42): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 43 (PIN43): f1010000.pinctrl mvebu-gpio:43 (HOG) function gpio group mpp43
pin 44 (PIN44): f1010000.pinctrl (GPIO UNCLAIMED) (HOG) function gpio group mpp44
pin 45 (PIN45): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 46 (PIN46): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 47 (PIN47): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 48 (PIN48): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 49 (PIN49): (MUX UNCLAIMED) (GPIO UNCLAIMED)
This shows how pins have been configured via DT.
If you compare the two, you can see that pin 6 has probably been set by
uboot, but not by DT.
Andrew
^ permalink raw reply
* [PATCH 1/9] ARM: Kirkwood: Convert TS219 to pinctrl.
From: Sebastian Hesselbarth @ 2012-10-24 20:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121024220021.148a88ff@skate>
On 10/24/2012 10:00 PM, Thomas Petazzoni wrote:
> On Wed, 24 Oct 2012 21:49:45 +0200, Sebastian Hesselbarth wrote:
>> Now consider some more complex interface with more than one mpp pin per
>> interface pin. Do you really want to predefine all possible combinations
>> even if it is more likely that in fact only one is used on all boards
>> because they are all based on the same reference design?
>
> Where did I say that you should define *all* possible configurations?
>
> I said: "The SoC .dtsi file should define all the pinmux groups that are
> described in the datasheet and are used by boards". Read again the "and
> are used by boards".
Ok, then I overread "and used by other boards". Sorry for that.
> So I'm clearly not advocating adding *all* possible configurations,
> because there would be gazillions of them. But I'm in favor of moving
> the *used* configurations to the .dtsi files.
Agreed.
Sebastian
^ permalink raw reply
* [PATCH 1/9] ARM: Kirkwood: Convert TS219 to pinctrl.
From: Thomas Petazzoni @ 2012-10-24 20:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121024200400.GZ21046@lunn.ch>
Andrew,
On Wed, 24 Oct 2012 22:04:00 +0200, Andrew Lunn wrote:
> > is needlessly repeated in kirkwood-ts219-6281.dts,
> > kirkwood-ts219-6282.dts and kirkwood-dnskw.dtsi. This is clearly a
> > pinmux configuration that sets up TXD/RXD of UART1, and it should be in
> > kirkwood.dtsi.
>
> I did try that, but was getting errors from dtc.
I can probably help figuring out what the problem is. Do you have a
patch that exhibits the problem so I can test it here?
Thanks,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH v4 5/5] zynq: move static peripheral mappings
From: Josh Cartwright @ 2012-10-24 20:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121024200222.GA6713@beefymiracle.amer.corp.natinst.com>
Shifting them up into the vmalloc region prevents the following warning,
when booting a zynq qemu target with more than 512mb of RAM:
BUG: mapping for 0xe0000000 at 0xe0000000 out of vmalloc space
In addition, it allows for reuse of these mappings when the proper
drivers issue requests via ioremap().
Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Cc: John Linn <john.linn@xilinx.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-zynq/common.c | 6 +++---
arch/arm/mach-zynq/include/mach/zynq_soc.h | 23 +++++++++++++----------
2 files changed, 16 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index ba48f06..ba8d14f 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -73,12 +73,12 @@ static struct map_desc io_desc[] __initdata = {
{
.virtual = TTC0_VIRT,
.pfn = __phys_to_pfn(TTC0_PHYS),
- .length = SZ_4K,
+ .length = TTC0_SIZE,
.type = MT_DEVICE,
}, {
.virtual = SCU_PERIPH_VIRT,
.pfn = __phys_to_pfn(SCU_PERIPH_PHYS),
- .length = SZ_8K,
+ .length = SCU_PERIPH_SIZE,
.type = MT_DEVICE,
},
@@ -86,7 +86,7 @@ static struct map_desc io_desc[] __initdata = {
{
.virtual = UART0_VIRT,
.pfn = __phys_to_pfn(UART0_PHYS),
- .length = SZ_4K,
+ .length = UART0_SIZE,
.type = MT_DEVICE,
},
#endif
diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h
index 218283a..c6b9b67 100644
--- a/arch/arm/mach-zynq/include/mach/zynq_soc.h
+++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h
@@ -15,27 +15,30 @@
#ifndef __MACH_XILINX_SOC_H__
#define __MACH_XILINX_SOC_H__
+#include <asm/pgtable.h>
+
#define PERIPHERAL_CLOCK_RATE 2500000
-/* For now, all mappings are flat (physical = virtual)
+/* Static peripheral mappings are mapped at the top of the
+ * vmalloc region
*/
-#define UART0_PHYS 0xE0000000
-#define UART0_VIRT UART0_PHYS
+#define UART0_PHYS 0xE0000000
+#define UART0_SIZE SZ_4K
+#define UART0_VIRT (VMALLOC_END - UART0_SIZE)
-#define TTC0_PHYS 0xF8001000
-#define TTC0_VIRT TTC0_PHYS
+#define TTC0_PHYS 0xF8001000
+#define TTC0_SIZE SZ_4K
+#define TTC0_VIRT (UART0_VIRT - TTC0_SIZE)
-#define SCU_PERIPH_PHYS 0xF8F00000
-#define SCU_PERIPH_VIRT SCU_PERIPH_PHYS
+#define SCU_PERIPH_PHYS 0xF8F00000
+#define SCU_PERIPH_SIZE SZ_8K
+#define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE)
/* The following are intended for the devices that are mapped early */
#define TTC0_BASE IOMEM(TTC0_VIRT)
#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT)
-/*
- * Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical
- */
#define LL_UART_PADDR UART0_PHYS
#define LL_UART_VADDR UART0_VIRT
--
1.8.0
^ permalink raw reply related
* [PATCH v4 4/5] ARM: annotate VMALLOC_END definition with _AC
From: Josh Cartwright @ 2012-10-24 20:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121024200222.GA6713@beefymiracle.amer.corp.natinst.com>
This makes the definition of VMALLOC_END suitable for use within
assembly code. This is necessary to allow the use of VMALLOC_END in
defining where the early uart is mapped for use with DEBUG_LL.
Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/include/asm/pgtable.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 08c1231..72904a2 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -40,7 +40,7 @@
*/
#define VMALLOC_OFFSET (8*1024*1024)
#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#define VMALLOC_END 0xff000000UL
+#define VMALLOC_END _AC(0xff000000,UL)
#define LIBRARY_TEXT_START 0x0c000000
--
1.8.0
^ permalink raw reply related
* [PATCH 9/9] ARM: Kirkwood: Convert IX2-200 to pinctrl.
From: Thomas Petazzoni @ 2012-10-24 20:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351090434-30499-10-git-send-email-andrew@lunn.ch>
Andrew,
On Wed, 24 Oct 2012 16:53:54 +0200, Andrew Lunn wrote:
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> ---
> arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts | 90 +++++++++++++++++++++++++
> arch/arm/mach-kirkwood/board-iomega_ix2_200.c | 24 -------
> 2 files changed, 90 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
> index 865aeec..d8fa8e8 100644
> --- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
> +++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
> @@ -16,6 +16,96 @@
> };
>
> ocp at f1000000 {
> + pinctrl: pinctrl at 10000 {
> + compatible = "marvell,88f6281-pinctrl";
> + reg = <0x10000 0x20>;
This definition (compatible + reg) should go in kirkwood.dtsi. The
pinctrl unit should be declared at the SoC level. Ditto for all other
patches.
> + pinctrl-0 = < &pmx_button_reset &pmx_button_power
> + &pmx_led_backup &pmx_led_power
> + &pmx_button_otb &pmx_led_rebuild
> + &pmx_led_health
> + &pmx_led_sata_brt_ctrl_1
> + &pmx_led_sata_brt_ctrl_2
> + &pmx_led_backup_brt_ctrl_1
> + &pmx_led_backup_brt_ctrl_2
> + &pmx_led_power_brt_ctrl_1
> + &pmx_led_power_brt_ctrl_2
> + &pmx_led_health_brt_ctrl_1
> + &pmx_led_health_brt_ctrl_2
> + &pmx_led_rebuild_brt_ctrl_1
> + &pmx_led_rebuild_brt_ctrl_2 >;
> + pinctrl-names = "default";
> +
> + pmx_button_reset: pmx-button-reset {
> + marvell,pins = "mpp12";
> + marvell,function = "gpio";
> + };
> + pmx_button_power: pmx-button-power {
> + marvell,pins = "mpp14";
> + marvell,function = "gpio";
> + };
> + pmx_led_backup: pmx-led-backup {
> + marvell,pins = "mpp15";
> + marvell,function = "gpio";
> + };
> + pmx_led_power: pmx-led-power {
> + marvell,pins = "mpp16";
> + marvell,function = "gpio";
> + };
> + pmx_button_otb: pmx-button-otb {
> + marvell,pins = "mpp35";
> + marvell,function = "gpio";
> + };
> + pmx_led_rebuild: pmx-led-rebuild {
> + marvell,pins = "mpp36";
> + marvell,function = "gpio";
> + };
> + pmx_led_health: pmx-led_health {
> + marvell,pins = "mpp37";
> + marvell,function = "gpio";
> + };
> + pmx_led_sata_brt_ctrl_1: pmx-led-sata-brt-ctrl-1 {
> + marvell,pins = "mpp38";
> + marvell,function = "gpio";
> + };
> + pmx_led_sata_brt_ctrl_2: pmx-led-sata-brt-ctrl-2 {
> + marvell,pins = "mpp39";
> + marvell,function = "gpio";
> + };
> + pmx_led_backup_brt_ctrl_1: pmx-led-backup-brt-ctrl-1 {
> + marvell,pins = "mpp40";
> + marvell,function = "gpio";
> + };
> + pmx_led_backup_brt_ctrl_2: pmx-led-backup-brt-ctrl-2 {
> + marvell,pins = "mpp41";
> + marvell,function = "gpio";
> + };
> + pmx_led_power_brt_ctrl_1: pmx-led-power-brt-ctrl-1 {
> + marvell,pins = "mpp42";
> + marvell,function = "gpio";
> + };
> + pmx_led_power_brt_ctrl_2: pmx-led-power-brt-ctrl-2 {
> + marvell,pins = "mpp43";
> + marvell,function = "gpio";
> + };
> + pmx_led_health_brt_ctrl_1: pmx-led-health-brt-ctrl-1 {
> + marvell,pins = "mpp44";
> + marvell,function = "gpio";
> + };
> + pmx_led_health_brt_ctrl_2: pmx-led-health-brt-ctrl-2 {
> + marvell,pins = "mpp45";
> + marvell,function = "gpio";
> + };
> + pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 {
> + marvell,pins = "mpp44";
> + marvell,function = "gpio";
> + };
> + pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 {
> + marvell,pins = "mpp45";
> + marvell,function = "gpio";
> + };
This is not a strong comment, but I am not sure it is really useful to
define one pinmux configuration for each pin. You can do something like:
pmx_buttons: pmx-buttons {
marvell,pins = "mpp45", "mpp46", "mpp47", "mpp48";
marvell,function = "gpio";
};
I think all the pins used for buttons or for LEDs kind of make sense to
be muxed together. And then, when you declare the LEDs in the DT, you
can do:
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins>;
red_led {
label = "red_led";
gpios = <&gpio1 17 1>;
default-state = "off";
};
yellow_led {
label = "yellow_led";
gpios = <&gpio1 19 1>;
default-state = "off";
};
green_led {
label = "green_led";
gpios = <&gpio1 21 1>;
default-state = "off";
linux,default-trigger = "heartbeat";
};
};
Where "led_pins" is a pinmux configuration that includes three pins.
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH v4 3/5] zynq: remove use of CLKDEV_LOOKUP
From: Josh Cartwright @ 2012-10-24 20:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121024200222.GA6713@beefymiracle.amer.corp.natinst.com>
The Zynq support in mainline does not (yet) make use of any of the
generic clk or clk lookup functionality. Remove what is upstream for
now, until the out-of-tree implementation is in suitable form for
merging.
An important side effect of this patch is that it allows the building of
a Zynq kernel without running into unresolved symbol problems:
drivers/built-in.o: In function `amba_get_enable_pclk':
clkdev.c:(.text+0x444): undefined reference to `clk_enable'
drivers/built-in.o: In function `amba_remove':
clkdev.c:(.text+0x488): undefined reference to `clk_disable'
drivers/built-in.o: In function `amba_probe':
clkdev.c:(.text+0x540): undefined reference to `clk_disable'
drivers/built-in.o: In function `amba_device_add':
clkdev.c:(.text+0x77c): undefined reference to `clk_disable'
drivers/built-in.o: In function `enable_clock':
clkdev.c:(.text+0x29738): undefined reference to `clk_enable'
drivers/built-in.o: In function `disable_clock':
clkdev.c:(.text+0x29778): undefined reference to `clk_disable'
drivers/built-in.o: In function `__pm_clk_remove':
clkdev.c:(.text+0x297f8): undefined reference to `clk_disable'
drivers/built-in.o: In function `pm_clk_suspend':
clkdev.c:(.text+0x29bc8): undefined reference to `clk_disable'
drivers/built-in.o: In function `pm_clk_resume':
clkdev.c:(.text+0x29c28): undefined reference to `clk_enable'
make[2]: *** [vmlinux] Error 1
make[1]: *** [sub-make] Error 2
make: *** [all] Error 2
In addition, eliminate Zynq's "use" of the versatile platform, as it is
no longer needed. As Nick Bowler points out:
For the record, I think this was introduced by commit 56a34b03ff427
("ARM: versatile: Make plat-versatile clock optional") which forgot to
select PLAT_VERSATILE_CLOCK on Zynq. This is not all that surprising,
because the fact that Zynq "uses" PLAT_VERSATILE is secretly hidden in
the Makefile.
Nevertheless, the only feature from versatile that Zynq needed was the
clock support, so this patch should *also* delete the secret use of
plat-versatile by removing this line from arch/arm/Makefile:
plat-$(CONFIG_ARCH_ZYNQ) += versatile
Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Cc: John Linn <john.linn@xilinx.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/Kconfig | 1 -
arch/arm/Makefile | 1 -
arch/arm/mach-zynq/common.c | 1 -
arch/arm/mach-zynq/include/mach/clkdev.h | 32 --------------------------------
4 files changed, 35 deletions(-)
delete mode 100644 arch/arm/mach-zynq/include/mach/clkdev.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index cce4f8d..de70d99 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -946,7 +946,6 @@ config ARCH_ZYNQ
bool "Xilinx Zynq ARM Cortex A9 Platform"
select ARM_AMBA
select ARM_GIC
- select CLKDEV_LOOKUP
select CPU_V7
select GENERIC_CLOCKEVENTS
select ICST
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 451757d..8dbab2d 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -197,7 +197,6 @@ machine-$(CONFIG_ARCH_ZYNQ) += zynq
# by CONFIG_* macro name.
plat-$(CONFIG_ARCH_OMAP) += omap
plat-$(CONFIG_ARCH_S3C64XX) += samsung
-plat-$(CONFIG_ARCH_ZYNQ) += versatile
plat-$(CONFIG_PLAT_IOP) += iop
plat-$(CONFIG_PLAT_NOMADIK) += nomadik
plat-$(CONFIG_PLAT_ORION) += orion
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 056091a..ba48f06 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -31,7 +31,6 @@
#include <asm/hardware/cache-l2x0.h>
#include <mach/zynq_soc.h>
-#include <mach/clkdev.h>
#include "common.h"
static struct of_device_id zynq_of_bus_ids[] __initdata = {
diff --git a/arch/arm/mach-zynq/include/mach/clkdev.h b/arch/arm/mach-zynq/include/mach/clkdev.h
deleted file mode 100644
index c6e73d8..0000000
--- a/arch/arm/mach-zynq/include/mach/clkdev.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * arch/arm/mach-zynq/include/mach/clkdev.h
- *
- * Copyright (C) 2011 Xilinx, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __MACH_CLKDEV_H__
-#define __MACH_CLKDEV_H__
-
-#include <plat/clock.h>
-
-struct clk {
- unsigned long rate;
- const struct clk_ops *ops;
- const struct icst_params *params;
- void __iomem *vcoreg;
-};
-
-#define __clk_get(clk) ({ 1; })
-#define __clk_put(clk) do { } while (0)
-
-#endif
--
1.8.0
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