* [PATCH-V2 0/4] ARM: AM33XX: net: Add DT support to CPGMAC and MDIO driver
From: Richard Cochran @ 2012-10-29 8:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351498881-32482-2-git-send-email-hvaibhav@ti.com>
On Mon, Oct 29, 2012 at 01:51:17PM +0530, Vaibhav Hiremath wrote:
> This patch-series adds support for,
>
> [1/4]: Typo mistake in CPSW driver while invoking runtime_pm api's
>
> [2/4]: Adds parent<->child relation between CPSW & MDIO module inside cpsw
> driver, as in case of AM33XX, the resources are shared and common
> register bit-field is provided to control module/clock enable/disable,
> makes it difficult to handle common resource.
>
> So the solution here is, to create parent<->child relation between them.
>
> [3/4]: Add hwmod entry for MDIO module, required for MDIO driver.
>
> [4/4]: Add DT device nodes for both CPSW and MDIO modules in am33xx.dtsi,
> am335x-evm.dts and am335x-bone.dts file
Many Thanks!
Acked-by: Richard Cochran <richardcochran@gmail.com>
^ permalink raw reply
* [PATCH 2/5] drivers: usb: otg: make twl6030_usb as a comparator driver to omap_usb2
From: Roger Quadros @ 2012-10-29 9:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121026163619.GB11908@atomide.com>
Hi Tony,
On 10/26/2012 07:36 PM, Tony Lindgren wrote:
> * Benoit Cousson <b-cousson@ti.com> [121026 08:23]:
>> Hi Roger,
>>
>> On 10/26/2012 05:16 PM, Roger Quadros wrote:
>>> Hi Kishon & Benoit,
>>>
>>> On 09/24/2012 12:06 PM, Rabin Vincent wrote:
>>>> 2012/9/24 ABRAHAM, KISHON VIJAY <kishon@ti.com>:
>>>>> On Sat, Sep 22, 2012 at 3:03 AM, Rabin Vincent <rabin@rab.in> wrote:
>>>>>> USB doesn't work on pandaboard on linux-next, and bisection shows this
>>>>>> patch. Unfortunately, I can't provide a dmesg log because USB is the
>>>>>> only way I currently have to get one out(!), but presumably it's because
>>>>>> this omap-usb2 device is never registered? Looks like this breaks
>>>>>> non-dt USB on pandaboard; is that intended?
>>>>>
>>>>> Yes. omap-usb2 is *only* dt supported (New drivers shouldn't have the
>>>>> old non-dt support).
>>>>
>>>> Well, USB used to work fine on Pandaboard without DT before the
>>>> introduction of "omap-usb2", so one would expected it to continue
>>>> working (until the board file is completely removed).
>>>>
>>>> Anyway, I've moved to DT now.
>>>>
>>>>> Some patches are queued only for 3.7.
>>>>>
>>>>> In case you want to use MUSB please use these patches on linux-next..
>>>>> [PATCH v2] arm: omap: hwmod: make *phy_48m* as the main_clk of ocp2scp
>>>>> [PATCH] ARM: OMAP2+: hwmod data: Fix ocp2scp_usb_phy and usb_host_hs
>>>>> entries (from Benoit)
>>>>> [PATCH 0/2] ARM: dts: Add subnode for ocp2scp (patch series)
>>>>> [PATCH v3 0/3] ARM: dts: omap: add dt data for MUSB (patch series)
>>>>
>>>> I got these by merging in Benoit's for_3.7/dts_part2 on top of
>>>> next-20120921. Thanks.
>>>> --
>>>> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
>>>> the body of a message to majordomo at vger.kernel.org
>>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>>>
>>>
>>> I still can't get musb to work on 3.7-rc2. Apparently it is still
>>> missing the patches from Benoit's for_3.7/dts_part2.
>>>
>>> Maybe I just need to wait for it to be merged?
>>
>> They are now in a for_3.8/dts. Unfortunately, one patch that was adding
>> ctrl_module address in the USB data was rejected and thus I'm not sure
>> it will work without that.
>>
>> I think Tony had an idea to map the ctrl_register to regulator fmwk or
>> something like that.
>
> For device tree, we may be eventually able to handle the ctrl_register
> using pinctrl-single.c and pinconf API. It probably does not make
> sense to set it up as a regulator as the comparator can trigger errors
> also for the pinconf related bits at least for MMC PBIAS.
>
>>> Till then, where can I get a tree where musb works on Panda?
>
> On panda, without using device tree, use v3.7-rc2 + the following patches:
>
> ARM: OMAP: ocp2scp: create omap device for ocp2scp
> ARM: OMAP4: add _dev_attr_ to ocp2scp for representing usb_phy
> drivers: bus: ocp2scp: add pdata support
>
The above 3 patches got it to work for me. Thanks for the hint.
> Also you need to enable CONFIG_OMAP_USB2. No idea what all is needed
> to use MUSB with device tree at this point.
>
Yes, you need to enable a bunch of other things which are not so easy to
figure out for someone who has not worked with MUSB. Do you think we
should enable musb and all dependencies in omap2plus_defconfig?
One more thing to note is that building CONFIG_OMAP_USB2 as module
breaks the kernel build with the following error.
drivers/built-in.o: In function `twl4030_usb_irq':
/work/linux-2.6/drivers/usb/otg/twl4030-usb.c:518: undefined reference
to `omap_musb_mailbox'
drivers/built-in.o: In function `twl4030_usb_phy_init':
/work/linux-2.6/drivers/usb/otg/twl4030-usb.c:540: undefined reference
to `omap_musb_mailbox'
make: *** [vmlinux] Error 1
I bet the error would come while building twl6030-usb.c too.
regards,
-roger
^ permalink raw reply
* [PATCH 0/6] Serial: AT91: Support rx and tx dma
From: Elen Song @ 2012-10-29 9:09 UTC (permalink / raw)
To: linux-arm-kernel
This is a patch series for support tx and rx dma for at91sam9 boards.
The patches contain the following support:
- add parameters for dma use
- request tx dma channel and enable tx
- request rx dma channel and enable rx
The rx dma part use dmaengine_tx_status to get remain bytes.
The api has been updated in the following patch:
[PATCH]DMA: AT91: Get residual bytes in dma buffer
Elen Song (6):
DMA: AT91: Serial: Add parameter for serial dma use
Serial: AT91: Distinguish PDC from DMA
Serial: AT91: Request tx dma channel
Serial: AT91: Enable tx dma
Serial: AT91: Request rx dma channel
Serial: AT91: Enable rx cyclic DMA transfer
arch/arm/mach-at91/include/mach/board.h | 2 +
drivers/tty/serial/atmel_serial.c | 507 +++++++++++++++++++++++++++++--
include/linux/platform_data/dma-atmel.h | 10 +
3 files changed, 491 insertions(+), 28 deletions(-)
--
1.7.9.5
^ permalink raw reply
* [PATCH 1/6] DMA: AT91: Serial: Add parameter for serial dma use
From: Elen Song @ 2012-10-29 9:09 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Elen Song <elen.song@atmel.com>
---
arch/arm/mach-at91/include/mach/board.h | 2 ++
drivers/tty/serial/atmel_serial.c | 1 +
include/linux/platform_data/dma-atmel.h | 10 ++++++++++
3 files changed, 13 insertions(+)
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index c55a436..a2188a6 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -129,6 +129,8 @@ struct atmel_uart_data {
short use_dma_tx; /* use transmit DMA? */
short use_dma_rx; /* use receive DMA? */
void __iomem *regs; /* virt. base address, if any */
+ struct at_dma_slave *dma_tx_slave;
+ struct at_dma_slave *dma_rx_slave;
struct serial_rs485 rs485; /* rs485 settings */
};
extern void __init at91_add_device_serial(void);
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index 3d7e1ee..1b1bd4f 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -45,6 +45,7 @@
#include <asm/mach/serial_at91.h>
#include <mach/board.h>
+#include <linux/platform_data/dma-atmel.h>
#ifdef CONFIG_ARM
#include <mach/cpu.h>
diff --git a/include/linux/platform_data/dma-atmel.h b/include/linux/platform_data/dma-atmel.h
index cab0997..bb05302 100644
--- a/include/linux/platform_data/dma-atmel.h
+++ b/include/linux/platform_data/dma-atmel.h
@@ -26,11 +26,21 @@ struct at_dma_platform_data {
/**
* struct at_dma_slave - Controller-specific information about a slave
* @dma_dev: required DMA master device
+ * @tx_reg: physical address of data register used for
+ * memory-to-peripheral transfers
+ * @rx_reg: physical address of data register used for
+ * peripheral-to-memory transfers
+ * @reg_width: peripheral register width
* @cfg: Platform-specific initializer for the CFG register
+ * @ctrla: Platform-specific initializer for the CTRLA register
*/
struct at_dma_slave {
struct device *dma_dev;
+ dma_addr_t tx_reg;
+ dma_addr_t rx_reg;
+ u32 reg_width;
u32 cfg;
+ u32 ctrla;
};
--
1.7.9.5
^ permalink raw reply related
* [PATCH 2/6] Serial: AT91: Distinguish PDC from DMA
From: Elen Song @ 2012-10-29 9:09 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Elen Song <elen.song@atmel.com>
---
drivers/tty/serial/atmel_serial.c | 74 ++++++++++++++++++++++---------------
1 file changed, 45 insertions(+), 29 deletions(-)
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index 1b1bd4f..8a4b8f8 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -142,11 +142,13 @@ struct atmel_uart_port {
u32 backup_imr; /* IMR saved during suspend */
int break_active; /* break being received */
- short use_dma_rx; /* enable PDC receiver */
+ short use_dma_rx; /* enable DMA receiver */
+ short use_pdc_rx; /* enable PDC receiver */
short pdc_rx_idx; /* current PDC RX buffer */
struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
- short use_dma_tx; /* enable PDC transmitter */
+ short use_dma_tx; /* enable DMA transmitter */
+ short use_pdc_tx; /* enable PDC transmitter */
struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
struct tasklet_struct tasklet;
@@ -183,31 +185,45 @@ to_atmel_uart_port(struct uart_port *uart)
}
#ifdef CONFIG_SERIAL_ATMEL_PDC
-static bool atmel_use_dma_rx(struct uart_port *port)
+static bool atmel_use_pdc_rx(struct uart_port *port)
{
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
- return atmel_port->use_dma_rx;
+ return atmel_port->use_pdc_rx;
}
-static bool atmel_use_dma_tx(struct uart_port *port)
+static bool atmel_use_pdc_tx(struct uart_port *port)
{
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
- return atmel_port->use_dma_tx;
+ return atmel_port->use_pdc_tx;
}
#else
-static bool atmel_use_dma_rx(struct uart_port *port)
+static bool atmel_use_pdc_rx(struct uart_port *port)
{
return false;
}
-static bool atmel_use_dma_tx(struct uart_port *port)
+static bool atmel_use_pdc_tx(struct uart_port *port)
{
return false;
}
#endif
+static bool atmel_use_dma_tx(struct uart_port *port)
+{
+ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
+
+ return atmel_port->use_dma_tx;
+}
+
+static bool atmel_use_dma_rx(struct uart_port *port)
+{
+ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
+
+ return atmel_port->use_dma_rx;
+}
+
/* Enable or disable the rs485 support */
void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
{
@@ -235,7 +251,7 @@ void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
mode |= ATMEL_US_USMODE_RS485;
} else {
dev_dbg(port->dev, "Setting UART to RS232\n");
- if (atmel_use_dma_tx(port))
+ if (atmel_use_pdc_tx(port))
atmel_port->tx_done_mask = ATMEL_US_ENDTX |
ATMEL_US_TXBUFE;
else
@@ -347,7 +363,7 @@ static void atmel_stop_tx(struct uart_port *port)
{
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
- if (atmel_use_dma_tx(port)) {
+ if (atmel_use_pdc_tx(port)) {
/* disable PDC transmit */
UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
}
@@ -366,7 +382,7 @@ static void atmel_start_tx(struct uart_port *port)
{
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
- if (atmel_use_dma_tx(port)) {
+ if (atmel_use_pdc_tx(port)) {
if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
/* The transmitter is already running. Yes, we
really need this.*/
@@ -392,7 +408,7 @@ static void atmel_start_rx(struct uart_port *port)
UART_PUT_CR(port, ATMEL_US_RXEN);
- if (atmel_use_dma_rx(port)) {
+ if (atmel_use_pdc_rx(port)) {
/* enable PDC controller */
UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
port->read_status_mask);
@@ -409,7 +425,7 @@ static void atmel_stop_rx(struct uart_port *port)
{
UART_PUT_CR(port, ATMEL_US_RXDIS);
- if (atmel_use_dma_rx(port)) {
+ if (atmel_use_pdc_rx(port)) {
/* disable PDC receive */
UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
@@ -574,7 +590,7 @@ atmel_handle_receive(struct uart_port *port, unsigned int pending)
{
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
- if (atmel_use_dma_rx(port)) {
+ if (atmel_use_pdc_rx(port)) {
/*
* PDC receive. Just schedule the tasklet and let it
* figure out the details.
@@ -663,7 +679,7 @@ static irqreturn_t atmel_interrupt(int irq, void *dev_id)
/*
* Called from tasklet with ENDTX and TXBUFE interrupts disabled.
*/
-static void atmel_tx_dma(struct uart_port *port)
+static void atmel_tx_pdc(struct uart_port *port)
{
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
struct circ_buf *xmit = &port->state->xmit;
@@ -780,7 +796,7 @@ static void atmel_rx_from_ring(struct uart_port *port)
spin_lock(&port->lock);
}
-static void atmel_rx_from_dma(struct uart_port *port)
+static void atmel_rx_from_pdc(struct uart_port *port)
{
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
struct tty_struct *tty = port->state->port.tty;
@@ -869,8 +885,8 @@ static void atmel_tasklet_func(unsigned long data)
/* The interrupt handler does not take the lock */
spin_lock(&port->lock);
- if (atmel_use_dma_tx(port))
- atmel_tx_dma(port);
+ if (atmel_use_pdc_tx(port))
+ atmel_tx_pdc(port);
else
atmel_tx_chars(port);
@@ -894,8 +910,8 @@ static void atmel_tasklet_func(unsigned long data)
atmel_port->irq_status_prev = status;
}
- if (atmel_use_dma_rx(port))
- atmel_rx_from_dma(port);
+ if (atmel_use_pdc_rx(port))
+ atmel_rx_from_pdc(port);
else
atmel_rx_from_ring(port);
@@ -931,7 +947,7 @@ static int atmel_startup(struct uart_port *port)
/*
* Initialize DMA (if necessary)
*/
- if (atmel_use_dma_rx(port)) {
+ if (atmel_use_pdc_rx(port)) {
int i;
for (i = 0; i < 2; i++) {
@@ -965,7 +981,7 @@ static int atmel_startup(struct uart_port *port)
UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
}
- if (atmel_use_dma_tx(port)) {
+ if (atmel_use_pdc_tx(port)) {
struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
struct circ_buf *xmit = &port->state->xmit;
@@ -1001,7 +1017,7 @@ static int atmel_startup(struct uart_port *port)
/* enable xmit & rcvr */
UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
- if (atmel_use_dma_rx(port)) {
+ if (atmel_use_pdc_rx(port)) {
/* set UART timeout */
UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
UART_PUT_CR(port, ATMEL_US_STTTO);
@@ -1032,7 +1048,7 @@ static void atmel_shutdown(struct uart_port *port)
/*
* Shut-down the DMA.
*/
- if (atmel_use_dma_rx(port)) {
+ if (atmel_use_pdc_rx(port)) {
int i;
for (i = 0; i < 2; i++) {
@@ -1045,7 +1061,7 @@ static void atmel_shutdown(struct uart_port *port)
kfree(pdc->buf);
}
}
- if (atmel_use_dma_tx(port)) {
+ if (atmel_use_pdc_tx(port)) {
struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
dma_unmap_single(port->dev,
@@ -1081,7 +1097,7 @@ static void atmel_flush_buffer(struct uart_port *port)
{
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
- if (atmel_use_dma_tx(port)) {
+ if (atmel_use_pdc_tx(port)) {
UART_PUT_TCR(port, 0);
atmel_port->pdc_tx.ofs = 0;
}
@@ -1194,7 +1210,7 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
if (termios->c_iflag & (BRKINT | PARMRK))
port->read_status_mask |= ATMEL_US_RXBRK;
- if (atmel_use_dma_rx(port))
+ if (atmel_use_pdc_rx(port))
/* need to enable error interrupts */
UART_PUT_IER(port, port->read_status_mask);
@@ -1506,7 +1522,7 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
/* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
if (atmel_port->rs485.flags & SER_RS485_ENABLED)
atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
- else if (atmel_use_dma_tx(port)) {
+ else if (atmel_use_pdc_tx(port)) {
port->fifosize = PDC_BUFFER_SIZE;
atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
} else {
@@ -1806,7 +1822,7 @@ static int __devinit atmel_serial_probe(struct platform_device *pdev)
atmel_init_port(port, pdev);
- if (!atmel_use_dma_rx(&port->uart)) {
+ if (!atmel_use_pdc_rx(&port->uart)) {
ret = -ENOMEM;
data = kmalloc(sizeof(struct atmel_uart_char)
* ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
--
1.7.9.5
^ permalink raw reply related
* [PATCH 3/6] Serial: AT91: Request tx dma channel
From: Elen Song @ 2012-10-29 9:10 UTC (permalink / raw)
To: linux-arm-kernel
Request a slave dma channel for tx dma use
Signed-off-by: Elen Song <elen.song@atmel.com>
---
drivers/tty/serial/atmel_serial.c | 110 +++++++++++++++++++++++++++++++++++++
1 file changed, 110 insertions(+)
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index 8a4b8f8..c02a919 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -151,6 +151,14 @@ struct atmel_uart_port {
short use_pdc_tx; /* enable PDC transmitter */
struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
+ spinlock_t lock_tx; /* port lock */
+ struct dma_chan *chan_tx;
+ struct dma_async_tx_descriptor *desc_tx;
+ dma_cookie_t cookie_tx;
+
+ struct scatterlist sg_tx;
+ unsigned int sg_len_tx;
+
struct tasklet_struct tasklet;
unsigned int irq_status;
unsigned int irq_status_prev;
@@ -582,6 +590,102 @@ static void atmel_tx_chars(struct uart_port *port)
UART_PUT_IER(port, atmel_port->tx_done_mask);
}
+static void atmel_tx_dma_release(struct atmel_uart_port *atmel_port)
+{
+ struct dma_chan *chan = atmel_port->chan_tx;
+
+ atmel_port->chan_tx = NULL;
+ atmel_port->cookie_tx = -EINVAL;
+ if (chan) {
+ dmaengine_terminate_all(chan);
+ dma_release_channel(chan);
+ }
+}
+
+static bool filter(struct dma_chan *chan, void *slave)
+{
+ struct at_dma_slave *sl = slave;
+
+ if (sl->dma_dev == chan->device->dev) {
+ chan->private = sl;
+ return true;
+ } else {
+ return false;
+ }
+}
+
+static void atmel_tx_request_dma(struct atmel_uart_port *atmel_port)
+{
+ struct uart_port *port;
+ struct atmel_uart_data *pdata;
+ dma_cap_mask_t mask;
+ struct dma_chan *chan = NULL;
+ struct dma_slave_config config;
+ int ret;
+
+ if (atmel_port == NULL)
+ return;
+
+ port = &(atmel_port->uart);
+ pdata = (struct atmel_uart_data *)port->private_data;
+
+ if (!pdata) {
+ dev_notice(port->dev, "DMA not available, using PIO\n");
+ return;
+ }
+
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+
+ if (atmel_use_dma_tx(port) && pdata->dma_tx_slave) {
+ pdata->dma_tx_slave->tx_reg = port->mapbase + ATMEL_US_THR;
+ chan = dma_request_channel(mask, filter, pdata->dma_tx_slave);
+ dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan);
+ }
+
+ if (chan) {
+ int nent;
+
+ spin_lock_init(&atmel_port->lock_tx);
+ atmel_port->chan_tx = chan;
+
+ sg_init_table(&atmel_port->sg_tx, 1);
+ /* UART circular tx buffer is an aligned page. */
+ BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
+ sg_set_page(&atmel_port->sg_tx,
+ virt_to_page(port->state->xmit.buf),
+ UART_XMIT_SIZE,
+ (int)port->state->xmit.buf & ~PAGE_MASK);
+ nent = dma_map_sg(port->dev,
+ &atmel_port->sg_tx,
+ 1,
+ DMA_MEM_TO_DEV);
+
+ if (!nent)
+ dev_dbg(port->dev, "need to release resource of dma\n");
+ else
+ dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
+ sg_dma_len(&atmel_port->sg_tx),
+ port->state->xmit.buf,
+ sg_dma_address(&atmel_port->sg_tx));
+
+ atmel_port->sg_len_tx = nent;
+ }
+
+ /* Configure the slave DMA */
+ memset(&config, 0, sizeof(config));
+ config.direction = DMA_MEM_TO_DEV;
+ config.dst_addr_width = pdata->dma_tx_slave->reg_width;
+ config.dst_addr = pdata->dma_tx_slave->tx_reg;
+
+ ret = dmaengine_device_control(chan, DMA_SLAVE_CONFIG,
+ (unsigned long)&config);
+ if (ret) {
+ dev_err(port->dev, "DMA tx slave configuration failed\n");
+ return;
+ }
+}
+
/*
* receive interrupt handler.
*/
@@ -994,6 +1098,9 @@ static int atmel_startup(struct uart_port *port)
pdc->ofs = 0;
}
+ if (atmel_use_dma_tx(port))
+ atmel_tx_request_dma(atmel_port);
+
/*
* If there is a specific "open" function (to register
* control line interrupts)
@@ -1070,6 +1177,9 @@ static void atmel_shutdown(struct uart_port *port)
DMA_TO_DEVICE);
}
+ if (atmel_use_dma_tx(port))
+ atmel_tx_dma_release(atmel_port);
+
/*
* Disable all interrupts, port and break condition.
*/
--
1.7.9.5
^ permalink raw reply related
* [PATCH 4/6] Serial: AT91: Enable tx dma
From: Elen Song @ 2012-10-29 9:10 UTC (permalink / raw)
To: linux-arm-kernel
Tx dma will setup a single transfer,
when transfer end, it will call atmel_dma_tx_complete to do finish stuff.
Signed-off-by: Elen Song <elen.song@atmel.com>
---
drivers/tty/serial/atmel_serial.c | 99 +++++++++++++++++++++++++++++++++++++
1 file changed, 99 insertions(+)
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index c02a919..352ef4a 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -590,6 +590,39 @@ static void atmel_tx_chars(struct uart_port *port)
UART_PUT_IER(port, atmel_port->tx_done_mask);
}
+static void atmel_dma_tx_complete(void *arg)
+{
+ struct atmel_uart_port *atmel_port = arg;
+ struct uart_port *port = &atmel_port->uart;
+ struct circ_buf *xmit = &port->state->xmit;
+ struct dma_chan *chan = atmel_port->chan_tx;
+ unsigned long flags;
+
+ spin_lock_irqsave(&port->lock, flags);
+
+ if (chan)
+ dmaengine_terminate_all(chan);
+ xmit->tail += sg_dma_len(&atmel_port->sg_tx);
+ xmit->tail &= UART_XMIT_SIZE - 1;
+
+ port->icount.tx += sg_dma_len(&atmel_port->sg_tx);
+
+ spin_lock_irq(&atmel_port->lock_tx);
+ async_tx_ack(atmel_port->desc_tx);
+ atmel_port->cookie_tx = -EINVAL;
+ atmel_port->desc_tx = NULL;
+ spin_unlock_irq(&atmel_port->lock_tx);
+
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+ uart_write_wakeup(port);
+
+ /* Do we really need this? */
+ if (!uart_circ_empty(xmit))
+ tasklet_schedule(&atmel_port->tasklet);
+
+ spin_unlock_irqrestore(&port->lock, flags);
+}
+
static void atmel_tx_dma_release(struct atmel_uart_port *atmel_port)
{
struct dma_chan *chan = atmel_port->chan_tx;
@@ -602,6 +635,70 @@ static void atmel_tx_dma_release(struct atmel_uart_port *atmel_port)
}
}
+/*
+ * Called from tasklet with TXRDY interrupt is disabled.
+ */
+static void atmel_tx_dma(struct uart_port *port)
+{
+ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
+ struct circ_buf *xmit = &port->state->xmit;
+ struct dma_chan *chan = atmel_port->chan_tx;
+ struct dma_async_tx_descriptor *desc;
+ struct scatterlist *sg = &atmel_port->sg_tx;
+
+ /* Make sure we have an idle channel */
+ if (atmel_port->desc_tx != NULL)
+ return;
+
+ if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
+ /*
+ * DMA is idle now.
+ * Port xmit buffer is already mapped,
+ * and it is one page... Just adjust
+ * offsets and lengths. Since it is a circular buffer,
+ * we have to transmit till the end, and then the rest.
+ * Take the port lock to get a
+ * consistent xmit buffer state.
+ */
+ sg->offset = xmit->tail & (UART_XMIT_SIZE - 1);
+ sg_dma_address(sg) = (sg_dma_address(sg) &
+ ~(UART_XMIT_SIZE - 1))
+ + sg->offset;
+ sg_dma_len(sg) = CIRC_CNT_TO_END(xmit->head,
+ xmit->tail,
+ UART_XMIT_SIZE);
+ BUG_ON(!sg_dma_len(sg));
+
+ desc = dmaengine_prep_slave_sg(chan,
+ sg,
+ atmel_port->sg_len_tx,
+ DMA_MEM_TO_DEV,
+ DMA_PREP_INTERRUPT |
+ DMA_CTRL_ACK);
+ if (!desc) {
+ dev_err(port->dev, "Failed to send via dma!\n");
+ return;
+ }
+
+ dma_sync_sg_for_device(port->dev, sg, 1, DMA_MEM_TO_DEV);
+
+ atmel_port->desc_tx = desc;
+ desc->callback = atmel_dma_tx_complete;
+ desc->callback_param = atmel_port;
+ atmel_port->cookie_tx = dmaengine_submit(desc);
+
+ dma_async_issue_pending(chan);
+ } else {
+ if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
+ /* DMA done, stop TX, start RX for RS485 */
+ atmel_start_rx(port);
+ }
+ }
+
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+ uart_write_wakeup(port);
+}
+
static bool filter(struct dma_chan *chan, void *slave)
{
struct at_dma_slave *sl = slave;
@@ -991,6 +1088,8 @@ static void atmel_tasklet_func(unsigned long data)
if (atmel_use_pdc_tx(port))
atmel_tx_pdc(port);
+ else if (atmel_use_dma_tx(port))
+ atmel_tx_dma(port);
else
atmel_tx_chars(port);
--
1.7.9.5
^ permalink raw reply related
* [PATCH 5/6] Serial: AT91: Request rx dma channel
From: Elen Song @ 2012-10-29 9:10 UTC (permalink / raw)
To: linux-arm-kernel
Request a cyclic dma channel for rx dma use.
Use cyclic transfer is to prevent receive data overrun
Signed-off-by: Elen Song <elen.song@atmel.com>
---
drivers/tty/serial/atmel_serial.c | 103 ++++++++++++++++++++++++++++++++++++-
1 file changed, 102 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index 352ef4a..8ee9023 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -130,7 +130,7 @@ struct atmel_uart_char {
u16 ch;
};
-#define ATMEL_SERIAL_RINGSIZE 1024
+#define ATMEL_SERIAL_RINGSIZE 4096
/*
* We wrap our port structure around the generic uart_port.
@@ -152,11 +152,16 @@ struct atmel_uart_port {
struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
spinlock_t lock_tx; /* port lock */
+ spinlock_t lock_rx; /* port lock */
struct dma_chan *chan_tx;
+ struct dma_chan *chan_rx;
struct dma_async_tx_descriptor *desc_tx;
+ struct dma_async_tx_descriptor *desc_rx;
dma_cookie_t cookie_tx;
+ dma_cookie_t cookie_rx;
struct scatterlist sg_tx;
+ struct scatterlist sg_rx;
unsigned int sg_len_tx;
struct tasklet_struct tasklet;
@@ -783,6 +788,98 @@ static void atmel_tx_request_dma(struct atmel_uart_port *atmel_port)
}
}
+static void atmel_rx_dma_release(struct atmel_uart_port *atmel_port)
+{
+ struct dma_chan *chan = atmel_port->chan_rx;
+ struct uart_port *port = &(atmel_port->uart);
+
+ atmel_port->desc_rx = NULL;
+ atmel_port->chan_rx = NULL;
+ atmel_port->cookie_rx = -EINVAL;
+ dma_unmap_sg(port->dev, &atmel_port->sg_rx, 1,
+ DMA_DEV_TO_MEM);
+ if (chan) {
+ dmaengine_terminate_all(chan);
+ dma_release_channel(chan);
+ }
+}
+
+static void atmel_rx_request_dma(struct atmel_uart_port *atmel_port)
+{
+ struct uart_port *port;
+ struct atmel_uart_data *pdata;
+ dma_cap_mask_t mask;
+ struct dma_chan *chan = NULL;
+ struct circ_buf *ring = &atmel_port->rx_ring;
+ struct dma_slave_config config;
+ int ret;
+
+ if (atmel_port == NULL)
+ return;
+
+ port = &(atmel_port->uart);
+ pdata = (struct atmel_uart_data *)port->private_data;
+
+ if (!pdata) {
+ dev_notice(port->dev, "DMA not available, using PIO\n");
+ return;
+ }
+
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_CYCLIC, mask);
+
+ if (atmel_use_dma_rx(port) && pdata->dma_rx_slave) {
+ pdata->dma_rx_slave->rx_reg = port->mapbase + ATMEL_US_RHR;
+ chan = dma_request_channel(mask, filter, pdata->dma_rx_slave);
+ dev_dbg(port->dev, "%s: RX: got channel %x\n",
+ __func__,
+ chan->chan_id);
+ }
+
+ if (chan) {
+ int nent;
+
+ spin_lock_init(&atmel_port->lock_rx);
+ atmel_port->chan_rx = chan;
+
+ sg_init_table(&atmel_port->sg_rx, 1);
+ /* UART circular tx buffer is an aligned page. */
+ BUG_ON((int)ring->buf & ~PAGE_MASK);
+ sg_set_page(&atmel_port->sg_rx,
+ virt_to_page(ring->buf),
+ ATMEL_SERIAL_RINGSIZE,
+ (int)ring->buf & ~PAGE_MASK);
+ nent = dma_map_sg(port->dev,
+ &atmel_port->sg_rx,
+ 1,
+ DMA_DEV_TO_MEM);
+
+ if (!nent)
+ dev_dbg(port->dev, "need to release resource of dma\n");
+ else
+ dev_dbg(port->dev, "%s: mapped %d@%p to %x\n",
+ __func__,
+ sg_dma_len(&atmel_port->sg_rx),
+ ring->buf,
+ sg_dma_address(&atmel_port->sg_rx));
+
+ ring->head = 0;
+ }
+
+ /* Configure the slave DMA */
+ memset(&config, 0, sizeof(config));
+ config.direction = DMA_DEV_TO_MEM;
+ config.src_addr_width = pdata->dma_rx_slave->reg_width;
+ config.src_addr = pdata->dma_rx_slave->rx_reg;
+
+ ret = dmaengine_device_control(chan, DMA_SLAVE_CONFIG,
+ (unsigned long)&config);
+ if (ret) {
+ dev_err(port->dev, "DMA rx slave configuration failed\n");
+ return;
+ }
+}
+
/*
* receive interrupt handler.
*/
@@ -1200,6 +1297,8 @@ static int atmel_startup(struct uart_port *port)
if (atmel_use_dma_tx(port))
atmel_tx_request_dma(atmel_port);
+ if (atmel_use_dma_rx(port))
+ atmel_rx_request_dma(atmel_port);
/*
* If there is a specific "open" function (to register
* control line interrupts)
@@ -1276,6 +1375,8 @@ static void atmel_shutdown(struct uart_port *port)
DMA_TO_DEVICE);
}
+ if (atmel_use_dma_rx(port))
+ atmel_rx_dma_release(atmel_port);
if (atmel_use_dma_tx(port))
atmel_tx_dma_release(atmel_port);
--
1.7.9.5
^ permalink raw reply related
* [PATCH 6/6] Serial: AT91: Enable rx cyclic DMA transfer
From: Elen Song @ 2012-10-29 9:11 UTC (permalink / raw)
To: linux-arm-kernel
To prevent data overrun, we use cyclic dma transfer for rx.
atmel_allocate_desc will allocate a cycle dma cookie after request channel,
after that, enable uart timeout interrupt in startup stage, when data successful received,
the timeout callback will check the residual bytes and insert receiving datas into the framework
during the transfer interval.
when current descriptor finished,
the dma callback will also check the residual bytes and filp the receiving datas.
Signed-off-by: Elen Song <elen.song@atmel.com>
---
drivers/tty/serial/atmel_serial.c | 126 ++++++++++++++++++++++++++++++++++++-
1 file changed, 125 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index 8ee9023..d3ba9ab 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -788,6 +788,40 @@ static void atmel_tx_request_dma(struct atmel_uart_port *atmel_port)
}
}
+static void atmel_rx_dma_flip_buffer(struct uart_port *port,
+ char *buf, size_t count)
+{
+ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
+ struct tty_struct *tty = port->state->port.tty;
+
+ dma_sync_sg_for_cpu(port->dev,
+ &atmel_port->sg_rx,
+ 1,
+ DMA_DEV_TO_MEM);
+
+ tty_insert_flip_string(tty, buf, count);
+
+ dma_sync_sg_for_device(port->dev,
+ &atmel_port->sg_rx,
+ 1,
+ DMA_DEV_TO_MEM);
+ /*
+ * Drop the lock here since it might end up calling
+ * uart_start(), which takes the lock.
+ */
+ spin_unlock(&port->lock);
+ tty_flip_buffer_push(tty);
+ spin_lock(&port->lock);
+}
+
+static void atmel_dma_rx_complete(void *arg)
+{
+ struct uart_port *port = arg;
+ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
+
+ tasklet_schedule(&atmel_port->tasklet);
+}
+
static void atmel_rx_dma_release(struct atmel_uart_port *atmel_port)
{
struct dma_chan *chan = atmel_port->chan_rx;
@@ -804,6 +838,47 @@ static void atmel_rx_dma_release(struct atmel_uart_port *atmel_port)
}
}
+static void atmel_rx_from_dma(struct uart_port *port)
+{
+ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
+ struct circ_buf *ring = &atmel_port->rx_ring;
+ struct dma_chan *chan = atmel_port->chan_rx;
+ struct dma_tx_state state;
+ enum dma_status dmastat;
+ size_t pending, count;
+
+
+ /* Reset the UART timeout early so that we don't miss one */
+ UART_PUT_CR(port, ATMEL_US_STTTO);
+ dmastat = dmaengine_tx_status(chan,
+ atmel_port->cookie_rx,
+ &state);
+ if (dmastat == DMA_ERROR)
+ dev_err(port->dev, "DMA status err\n");
+ /* current transfer size should no larger than dma buffer */
+ pending = sg_dma_len(&atmel_port->sg_rx) - state.residue;
+ BUG_ON(pending > sg_dma_len(&atmel_port->sg_rx));
+
+ /*
+ * This will take the chars we have so far,
+ * ring->head will record the transfer size, only new bytes come
+ * will insert into the framework.
+ */
+ if (pending > ring->head) {
+ count = pending - ring->head;
+
+ atmel_rx_dma_flip_buffer(port, ring->buf + ring->head, count);
+
+ ring->head += count;
+ if (ring->head == sg_dma_len(&atmel_port->sg_rx))
+ ring->head = 0;
+
+ port->icount.rx += count;
+ }
+
+ UART_PUT_IER(port, ATMEL_US_TIMEOUT);
+}
+
static void atmel_rx_request_dma(struct atmel_uart_port *atmel_port)
{
struct uart_port *port;
@@ -880,6 +955,37 @@ static void atmel_rx_request_dma(struct atmel_uart_port *atmel_port)
}
}
+static int atmel_allocate_desc(struct uart_port *port)
+{
+ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
+ struct dma_async_tx_descriptor *desc;
+ struct dma_chan *chan = atmel_port->chan_rx;
+
+ if (!chan) {
+ dev_warn(port->dev, "No channel available\n");
+ goto err_dma;
+ }
+ /*
+ * Prepare a cyclic dma transfer, assign 2 descriptors,
+ * each one is half ring buffer size
+ */
+ desc = dmaengine_prep_dma_cyclic(chan,
+ sg_dma_address(&atmel_port->sg_rx),
+ sg_dma_len(&atmel_port->sg_rx),
+ sg_dma_len(&atmel_port->sg_rx)/2,
+ DMA_DEV_TO_MEM);
+ desc->callback = atmel_dma_rx_complete;
+ desc->callback_param = port;
+ atmel_port->desc_rx = desc;
+ atmel_port->cookie_rx = dmaengine_submit(desc);
+
+ return 0;
+
+err_dma:
+ atmel_rx_dma_release(atmel_port);
+ return -EINVAL;
+}
+
/*
* receive interrupt handler.
*/
@@ -907,6 +1013,13 @@ atmel_handle_receive(struct uart_port *port, unsigned int pending)
atmel_pdc_rxerr(port, pending);
}
+ if (atmel_use_dma_rx(port)) {
+ if (pending & ATMEL_US_TIMEOUT) {
+ UART_PUT_IDR(port, ATMEL_US_TIMEOUT);
+ tasklet_schedule(&atmel_port->tasklet);
+ }
+ }
+
/* Interrupt receive */
if (pending & ATMEL_US_RXRDY)
atmel_rx_chars(port);
@@ -1212,6 +1325,8 @@ static void atmel_tasklet_func(unsigned long data)
if (atmel_use_pdc_rx(port))
atmel_rx_from_pdc(port);
+ else if (atmel_use_dma_rx(port))
+ atmel_rx_from_dma(port);
else
atmel_rx_from_ring(port);
@@ -1297,8 +1412,11 @@ static int atmel_startup(struct uart_port *port)
if (atmel_use_dma_tx(port))
atmel_tx_request_dma(atmel_port);
- if (atmel_use_dma_rx(port))
+ if (atmel_use_dma_rx(port)) {
atmel_rx_request_dma(atmel_port);
+ if (atmel_allocate_desc(port))
+ return -EINVAL;
+ }
/*
* If there is a specific "open" function (to register
* control line interrupts)
@@ -1330,6 +1448,12 @@ static int atmel_startup(struct uart_port *port)
UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
/* enable PDC controller */
UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
+ } else if (atmel_use_dma_rx(port)) {
+ /* set UART timeout */
+ UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
+ UART_PUT_CR(port, ATMEL_US_STTTO);
+
+ UART_PUT_IER(port, ATMEL_US_TIMEOUT);
} else {
/* enable receive only */
UART_PUT_IER(port, ATMEL_US_RXRDY);
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH v3 16/16] ARM: dts: add AM33XX SPI support
From: Philip, Avinash @ 2012-10-29 9:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350566815-409-17-git-send-email-mporter@ti.com>
On Thu, Oct 18, 2012 at 18:56:55, Porter, Matt wrote:
> Adds AM33XX SPI support for am335x-bone and am335x-evm.
>
> Signed-off-by: Matt Porter <mporter@ti.com>
> ---
> arch/arm/boot/dts/am335x-bone.dts | 17 +++++++++++++++
> arch/arm/boot/dts/am335x-evm.dts | 9 ++++++++
> arch/arm/boot/dts/am33xx.dtsi | 43 +++++++++++++++++++++++++++++++++++++
> 3 files changed, 69 insertions(+)
>
> diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
> index 5510979..23edfd8 100644
> --- a/arch/arm/boot/dts/am335x-bone.dts
> +++ b/arch/arm/boot/dts/am335x-bone.dts
> @@ -18,6 +18,17 @@
> reg = <0x80000000 0x10000000>; /* 256 MB */
> };
>
> + am3358_pinmux: pinmux at 44e10800 {
> + spi1_pins: pinmux_spi1_pins {
> + pinctrl-single,pins = <
> + 0x190 0x13 /* mcasp0_aclkx.spi1_sclk, OUTPUT_PULLUP | MODE3 */
> + 0x194 0x33 /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
> + 0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
> + 0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */
> + >;
> + };
> + };
> +
Change to am33xx_pinmux.
> ocp {
> uart1: serial at 44e09000 {
> status = "okay";
> @@ -84,3 +95,9 @@
> &mmc1 {
> vmmc-supply = <&ldo3_reg>;
> };
> +
> +&spi1 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi1_pins>;
> +};
> diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
> index d63fce8..8d5f660 100644
> --- a/arch/arm/boot/dts/am335x-evm.dts
> +++ b/arch/arm/boot/dts/am335x-evm.dts
> @@ -124,3 +124,12 @@
> &mmc1 {
> vmmc-supply = <&vmmc_reg>;
> };
> +
> +&spi0 {
> + status = "okay";
> + spi-flash at 0 {
> + compatible = "spansion,s25fl064k", "m25p80";
> + spi-max-frequency = <24000000>;
> + reg = <0>;
> + };
> +};
In AM335x-evm, SPI flash available in profile #2 (am335x evm specific profiles).
So can you drop this changes as if I understood correctly, am335x-evm.dts will be
populated for devices present only on profile #0.
> diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
> index 26a6af7..063ecea 100644
> --- a/arch/arm/boot/dts/am33xx.dtsi
> +++ b/arch/arm/boot/dts/am33xx.dtsi
> @@ -40,6 +40,15 @@
> };
> };
>
> + am3358_pinmux: pinmux at 44e10800 {
> + compatible = "pinctrl-single";
> + reg = <0x44e10800 0x0238>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-single,register-width = <32>;
> + pinctrl-single,function-mask = <0x7f>;
> + };
> +
Pin ctrl support already submitted
http://git.kernel.org/?p=linux/kernel/git/bcousson/linux-omap-dt.git;a=commitdiff;h=3e0603e905d9ba662e8c1885ecb1d28bc454e448
Thanks
Avinash
> /*
> * XXX: Use a flat representation of the AM33XX interconnect.
> * The real AM33XX interconnect network is quite complex.Since
> @@ -261,6 +270,40 @@
> status = "disabled";
> };
>
> + spi0: spi at 48030000 {
> + compatible = "ti,omap4-mcspi";
> + ti,hwmods = "spi0";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x48030000 0x400>;
> + interrupt-parent = <&intc>;
> + interrupt = <65>;
> + dmas = <&edma 16
> + &edma 17
> + &edma 18
> + &edma 19>;
> + dma-names = "tx0", "rx0", "tx1", "rx1";
> + ti,spi-num-cs = <2>;
> + status = "disabled";
> + };
> +
> + spi1: spi at 481a0000 {
> + compatible = "ti,omap4-mcspi";
> + ti,hwmods = "spi1";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x481a0000 0x400>;
> + interrupt-parent = <&intc>;
> + interrupt = <125>;
> + dmas = <&edma 42
> + &edma 43
> + &edma 44
> + &edma 45>;
> + dma-names = "tx0", "rx0", "tx1", "rx1";
> + ti,spi-num-cs = <2>;
> + status = "disabled";
> + };
> +
> wdt2: wdt at 44e35000 {
> compatible = "ti,omap3-wdt";
> ti,hwmods = "wd_timer2";
> --
> 1.7.9.5
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
^ permalink raw reply
* [PATCH v3 3/4] arm: mvebu: move irq controller driver to drivers/irqchip
From: Sebastian Hesselbarth @ 2012-10-29 9:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351462748-5224-4-git-send-email-thomas.petazzoni@free-electrons.com>
On 10/28/2012 11:19 PM, Thomas Petazzoni wrote:
> Now that the drivers/irqchip/ directory has a minimal infrastructure
> to support the addition of irq controller driver, we move the irq
> controller driver for Armada 370 and Armada XP ARM SoCs from the
> arch/arm/mach-mvebu/ directory to the drivers/irqchip/ directory and
> update the irqchip infrastructure to take into account this new
> driver.
>
> [...]
> diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
> index 6b5a6e0..5148ffd 100644
> --- a/drivers/irqchip/Makefile
> +++ b/drivers/irqchip/Makefile
> @@ -1,2 +1,3 @@
> obj-$(CONFIG_IRQCHIP) += irqchip.o
> obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
> +obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o
Thomas,
using ARCH_MVEBU for enabling irq-armada-370-xp here will lead to
incompatibilities with Orion SoCs when they move over to ARCH_MVEBU.
Although, it is ok for the moment please choose either a CONFIG_
common for both Armada 370 and XP.
With a Kconfig within drivers/irqchip you could define a
ARMADA_370_XP_IRQ and select that in MACH_ARMADA_370 and MACH_ARMADA_XP
or MACH_ARMADA_370_XP, which all already exist.
As soon as the patch is through, I can provide (and use) a irq-orion
based on irqchip. I can provide it earlier but to actually use it there
are still some other patches required on Dove. Other Orions could
switch now, I guess.
Sebastian
^ permalink raw reply
* [PATCH 2/5] drivers: usb: otg: make twl6030_usb as a comparator driver to omap_usb2
From: kishon @ 2012-10-29 9:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <508E45CF.70303@ti.com>
Hi,
On Monday 29 October 2012 02:31 PM, Roger Quadros wrote:
> Hi Tony,
>
> On 10/26/2012 07:36 PM, Tony Lindgren wrote:
>> * Benoit Cousson <b-cousson@ti.com> [121026 08:23]:
>>> Hi Roger,
>>>
>>> On 10/26/2012 05:16 PM, Roger Quadros wrote:
>>>> Hi Kishon & Benoit,
>>>>
>>>> On 09/24/2012 12:06 PM, Rabin Vincent wrote:
>>>>> 2012/9/24 ABRAHAM, KISHON VIJAY <kishon@ti.com>:
>>>>>> On Sat, Sep 22, 2012 at 3:03 AM, Rabin Vincent <rabin@rab.in> wrote:
>>>>>>> USB doesn't work on pandaboard on linux-next, and bisection shows this
>>>>>>> patch. Unfortunately, I can't provide a dmesg log because USB is the
>>>>>>> only way I currently have to get one out(!), but presumably it's because
>>>>>>> this omap-usb2 device is never registered? Looks like this breaks
>>>>>>> non-dt USB on pandaboard; is that intended?
>>>>>>
>>>>>> Yes. omap-usb2 is *only* dt supported (New drivers shouldn't have the
>>>>>> old non-dt support).
>>>>>
>>>>> Well, USB used to work fine on Pandaboard without DT before the
>>>>> introduction of "omap-usb2", so one would expected it to continue
>>>>> working (until the board file is completely removed).
>>>>>
>>>>> Anyway, I've moved to DT now.
>>>>>
>>>>>> Some patches are queued only for 3.7.
>>>>>>
>>>>>> In case you want to use MUSB please use these patches on linux-next..
>>>>>> [PATCH v2] arm: omap: hwmod: make *phy_48m* as the main_clk of ocp2scp
>>>>>> [PATCH] ARM: OMAP2+: hwmod data: Fix ocp2scp_usb_phy and usb_host_hs
>>>>>> entries (from Benoit)
>>>>>> [PATCH 0/2] ARM: dts: Add subnode for ocp2scp (patch series)
>>>>>> [PATCH v3 0/3] ARM: dts: omap: add dt data for MUSB (patch series)
>>>>>
>>>>> I got these by merging in Benoit's for_3.7/dts_part2 on top of
>>>>> next-20120921. Thanks.
>>>>> --
>>>>> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
>>>>> the body of a message to majordomo at vger.kernel.org
>>>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>>>>
>>>>
>>>> I still can't get musb to work on 3.7-rc2. Apparently it is still
>>>> missing the patches from Benoit's for_3.7/dts_part2.
>>>>
>>>> Maybe I just need to wait for it to be merged?
>>>
>>> They are now in a for_3.8/dts. Unfortunately, one patch that was adding
>>> ctrl_module address in the USB data was rejected and thus I'm not sure
>>> it will work without that.
>>>
>>> I think Tony had an idea to map the ctrl_register to regulator fmwk or
>>> something like that.
>>
>> For device tree, we may be eventually able to handle the ctrl_register
>> using pinctrl-single.c and pinconf API. It probably does not make
>> sense to set it up as a regulator as the comparator can trigger errors
>> also for the pinconf related bits at least for MMC PBIAS.
>>
>>>> Till then, where can I get a tree where musb works on Panda?
>>
>> On panda, without using device tree, use v3.7-rc2 + the following patches:
>>
>> ARM: OMAP: ocp2scp: create omap device for ocp2scp
>> ARM: OMAP4: add _dev_attr_ to ocp2scp for representing usb_phy
>> drivers: bus: ocp2scp: add pdata support
>>
>
> The above 3 patches got it to work for me. Thanks for the hint.
>
>> Also you need to enable CONFIG_OMAP_USB2. No idea what all is needed
>> to use MUSB with device tree at this point.
>>
>
> Yes, you need to enable a bunch of other things which are not so easy to
> figure out for someone who has not worked with MUSB. Do you think we
> should enable musb and all dependencies in omap2plus_defconfig?
>
> One more thing to note is that building CONFIG_OMAP_USB2 as module
> breaks the kernel build with the following error.
>
> drivers/built-in.o: In function `twl4030_usb_irq':
> /work/linux-2.6/drivers/usb/otg/twl4030-usb.c:518: undefined reference
> to `omap_musb_mailbox'
> drivers/built-in.o: In function `twl4030_usb_phy_init':
> /work/linux-2.6/drivers/usb/otg/twl4030-usb.c:540: undefined reference
> to `omap_musb_mailbox'
> make: *** [vmlinux] Error 1
>
> I bet the error would come while building twl6030-usb.c too.
There are couple of fixes floating in the list to fix this.
https://patchwork.kernel.org/patch/1370291/
and an alternative fix here:
https://patchwork.kernel.org/patch/1409671/
Thanks
Kishon
^ permalink raw reply
* [PATCH v3 3/4] arm: mvebu: move irq controller driver to drivers/irqchip
From: Thomas Petazzoni @ 2012-10-29 9:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <508E49E0.8050606@gmail.com>
Sebastian,
On Mon, 29 Oct 2012 10:18:24 +0100, Sebastian Hesselbarth wrote:
> using ARCH_MVEBU for enabling irq-armada-370-xp here will lead to
> incompatibilities with Orion SoCs when they move over to ARCH_MVEBU.
Not really: the driver is probed depending on the DT compatible string.
So we can perfectly have two irqchip drivers being enabled on
ARCH_MVEBU.
> Although, it is ok for the moment please choose either a CONFIG_
> common for both Armada 370 and XP.
>
> With a Kconfig within drivers/irqchip you could define a
> ARMADA_370_XP_IRQ and select that in MACH_ARMADA_370 and MACH_ARMADA_XP
> or MACH_ARMADA_370_XP, which all already exist.
But agreed, I could use MACH_ARMADA_370_XP. I don't know if we want to
add Kconfig options for each irqchip driver.
> As soon as the patch is through, I can provide (and use) a irq-orion
> based on irqchip. I can provide it earlier but to actually use it there
> are still some other patches required on Dove. Other Orions could
> switch now, I guess.
Are you sure? The irqchip drivers only work for sub-architecture that
are fully converted to the Device Tree. And I don't think all of
mach-orion5x, mach-dove, mach-kirkwood and mach-mv78xx0 are converted
to the DT.
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* # (c) 2007, Joe Perches <joe@perches.com>
From: Vaibhav Hiremath @ 2012-10-29 9:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351498881-32482-1-git-send-email-hvaibhav@ti.com>
On 10/29/2012 1:51 PM, Vaibhav Hiremath wrote:
Ignore this patch/mail, I screwed up with my command while sending patches.
Sorry for noise.
Thanks,
Vaibhav
^ permalink raw reply
* [PATCH 2/5] ARM: PXA: Zipit Z2: Add USB host and device support
From: Vasily Khoruzhick @ 2012-10-29 9:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACTFLAOwUsWbqK-R1OLNfNTnkp7Mo3hFwu78dFKT8i8goTgdKw@mail.gmail.com>
On Mon, Oct 29, 2012 at 1:58 AM, Daniel Mack <zonque@gmail.com> wrote:
>> Any volunteers? :) It requires huge amount of work,
>
> Well, it's actually quite straight forward. With the changes that got merged
> to 3.7, pxa3xx platforms boot, and I also ported some pxa specific
> peripheral drivers that should work for both 2xx and 3xx. Adding CPU support
> for 27x should also just be a matter of some extra lines.
>
> So I would clearly say you should give the DT approach a try first and see
> which bits are missing. And I would vote for not taking any new features for
> the legacy board support files but just bugfixes.
Fair enough, I'll resend series without USB stuff (so it'll contain
only bugfixes)
Regards
Vasily
^ permalink raw reply
* [PATCH v3 3/4] arm: mvebu: move irq controller driver to drivers/irqchip
From: Sebastian Hesselbarth @ 2012-10-29 9:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121029102436.504d5053@skate>
On 10/29/2012 10:24 AM, Thomas Petazzoni wrote:
>> using ARCH_MVEBU for enabling irq-armada-370-xp here will lead to
>> incompatibilities with Orion SoCs when they move over to ARCH_MVEBU.
>
> Not really: the driver is probed depending on the DT compatible string.
> So we can perfectly have two irqchip drivers being enabled on
> ARCH_MVEBU.
I agreed but this will always build irq-armada-370-xp into the kernel
although I maybe want a orion-only kernel. Although multi-platform will
be great for ARM, I doubt that every kernel will be multi-platform?
>> With a Kconfig within drivers/irqchip you could define a
>> ARMADA_370_XP_IRQ and select that in MACH_ARMADA_370 and MACH_ARMADA_XP
>> or MACH_ARMADA_370_XP, which all already exist.
>
> But agreed, I could use MACH_ARMADA_370_XP. I don't know if we want to
> add Kconfig options for each irqchip driver.
Ok.
>> As soon as the patch is through, I can provide (and use) a irq-orion
>> based on irqchip. I can provide it earlier but to actually use it there
>> are still some other patches required on Dove. Other Orions could
>> switch now, I guess.
>
> Are you sure? The irqchip drivers only work for sub-architecture that
> are fully converted to the Device Tree. And I don't think all of
> mach-orion5x, mach-dove, mach-kirkwood and mach-mv78xx0 are converted
> to the DT.
Hmm, I do have an experimental branch of Dove with irqchip enabled that
works perfectly fine even with non-DT code in it. Actually, it is based
on 3.7-rc3 which means it is before your patches.
But the irq controller itself is referenced from DT, of course.
Sebastian
^ permalink raw reply
* [RFC 2/6] sched: add a new SD SHARE_POWERLINE flag for sched_domain
From: Vincent Guittot @ 2012-10-29 9:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5088066D.7000907@ti.com>
On 24 October 2012 17:17, Santosh Shilimkar <santosh.shilimkar@ti.com> wrote:
> Vincent,
>
> Few comments/questions.
>
>
> On Sunday 07 October 2012 01:13 PM, Vincent Guittot wrote:
>>
>> This new flag SD SHARE_POWERLINE reflects the sharing of the power rail
>> between the members of a domain. As this is the current assumption of the
>> scheduler, the flag is added to all sched_domain
>>
>> Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
>> ---
>> arch/ia64/include/asm/topology.h | 1 +
>> arch/tile/include/asm/topology.h | 1 +
>> include/linux/sched.h | 1 +
>> include/linux/topology.h | 3 +++
>> kernel/sched/core.c | 5 +++++
>> 5 files changed, 11 insertions(+)
>>
>> diff --git a/arch/ia64/include/asm/topology.h
>> b/arch/ia64/include/asm/topology.h
>> index a2496e4..065c720 100644
>> --- a/arch/ia64/include/asm/topology.h
>> +++ b/arch/ia64/include/asm/topology.h
>> @@ -65,6 +65,7 @@ void build_cpu_to_node_map(void);
>> | SD_BALANCE_EXEC \
>> | SD_BALANCE_FORK \
>> | SD_WAKE_AFFINE, \
>> + | arch_sd_share_power_line() \
>> .last_balance = jiffies, \
>> .balance_interval = 1, \
>> .nr_balance_failed = 0, \
>> diff --git a/arch/tile/include/asm/topology.h
>> b/arch/tile/include/asm/topology.h
>> index 7a7ce39..d39ed0b 100644
>> --- a/arch/tile/include/asm/topology.h
>> +++ b/arch/tile/include/asm/topology.h
>> @@ -72,6 +72,7 @@ static inline const struct cpumask *cpumask_of_node(int
>> node)
>> | 0*SD_PREFER_LOCAL \
>> | 0*SD_SHARE_CPUPOWER \
>> | 0*SD_SHARE_PKG_RESOURCES \
>> + | arch_sd_share_power_line() \
>> | 0*SD_SERIALIZE \
>> , \
>> .last_balance = jiffies, \
>> diff --git a/include/linux/sched.h b/include/linux/sched.h
>> index 4786b20..74f2daf 100644
>> --- a/include/linux/sched.h
>> +++ b/include/linux/sched.h
>> @@ -862,6 +862,7 @@ enum cpu_idle_type {
>> #define SD_WAKE_AFFINE 0x0020 /* Wake task to waking CPU
>> */
>> #define SD_PREFER_LOCAL 0x0040 /* Prefer to keep tasks
>> local to this domain */
>> #define SD_SHARE_CPUPOWER 0x0080 /* Domain members share cpu power
>> */
>> +#define SD_SHARE_POWERLINE 0x0100 /* Domain members share power
>> domain */
>
> If you ignore the current use of SD_SHARE_CPUPOWER, isn't the meaning of
> CPUPOWER and POWERLINE is same here. Just trying to understand the clear
> meaning of this new flag. Have you not considered SD_SHARE_CPUPOWER
> because it is being used for cpu_power and needs at least minimum two
> domains ? SD_PACKING would have been probably more appropriate based
> on the way it is being used in further series.
CPUPOWER reflects the share of hw ressources between cores like for
hyper threading. POWERLINE describes the fact that cores are sharing
the same power line amore precisely the powergate.
>
> Regards
> Santosh
>
^ permalink raw reply
* [PATCH 2/5] ARM: PXA: Zipit Z2: Add USB host and device support
From: Daniel Mack @ 2012-10-29 9:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CA+E=qVeup8QzqAiURzEfG8a2vp_rBJ-by8FORLEzSCfkxiyjtQ@mail.gmail.com>
On 29.10.2012 10:33, Vasily Khoruzhick wrote:
> On Mon, Oct 29, 2012 at 1:58 AM, Daniel Mack <zonque@gmail.com> wrote:
>>> Any volunteers? :) It requires huge amount of work,
>>
>> Well, it's actually quite straight forward. With the changes that got merged
>> to 3.7, pxa3xx platforms boot, and I also ported some pxa specific
>> peripheral drivers that should work for both 2xx and 3xx. Adding CPU support
>> for 27x should also just be a matter of some extra lines.
>>
>> So I would clearly say you should give the DT approach a try first and see
>> which bits are missing. And I would vote for not taking any new features for
>> the legacy board support files but just bugfixes.
>
> Fair enough, I'll resend series without USB stuff (so it'll contain
> only bugfixes)
I rather wanted to encourage you to work on the PXA2xx DT stuff :)
Please have a quick look at arch/arm/mach-pxa/pxa-dt.c - what it takes
for basic 270 support is just copying the logic that is there already
for the 3xx models.
Some parts like the uart, host-mode usb, mmc, gpio-leds, gpio-keys, i2c
etc are already finished and should work instantly. What's missing is
the spi controller and the display, but maybe you can help getting these
done?
Thanks,
Daniel
^ permalink raw reply
* [PATCH] ARM: AM33xx: add support for reboot
From: Daniel Mack @ 2012-10-29 9:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <79CD15C6BA57404B839C016229A409A83EB50073@DBDE01.ent.ti.com>
On 29.10.2012 05:31, Hiremath, Vaibhav wrote:
> On Sun, Oct 28, 2012 at 23:47:55, Daniel Mack wrote:
>> This patch adds the ability to reboot am33xx-based systems.
>>
>> Signed-off-by: Daniel Mack <zonque@gmail.com>
>> ---
>> arch/arm/mach-omap2/board-generic.c | 1 +
>> arch/arm/mach-omap2/prcm.c | 6 ++++++
>> 2 files changed, 7 insertions(+)
>>
>> diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
>> index 601ecdf..6a69ceb 100644
>> --- a/arch/arm/mach-omap2/board-generic.c
>> +++ b/arch/arm/mach-omap2/board-generic.c
>> @@ -114,6 +114,7 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
>> .init_machine = omap_generic_init,
>> .timer = &omap3_am33xx_timer,
>> .dt_compat = am33xx_boards_compat,
>> + .restart = omap_prcm_restart,
>> MACHINE_END
>> #endif
>>
>> diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
>> index 0f51e03..8a3068a 100644
>> --- a/arch/arm/mach-omap2/prcm.c
>> +++ b/arch/arm/mach-omap2/prcm.c
>> @@ -32,6 +32,7 @@
>> #include "clock2xxx.h"
>> #include "cm2xxx_3xxx.h"
>> #include "prm2xxx_3xxx.h"
>> +#include "prm33xx.h"
>> #include "prm44xx.h"
>> #include "prminst44xx.h"
>> #include "cminst44xx.h"
>> @@ -72,6 +73,11 @@ void omap_prcm_restart(char mode, const char *cmd)
>> omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
>> } else if (cpu_is_omap44xx()) {
>> omap4_prminst_global_warm_sw_reset(); /* never returns */
>> + } else if (soc_is_am33xx()) {
>> + prcm_offs = AM33XX_PRM_DEVICE_MOD;
>> + omap2_prm_set_mod_reg_bits(OMAP4430_RST_GLOBAL_COLD_SW_MASK,
>> + prcm_offs,
>> + AM33XX_PRM_RSTCTRL_OFFSET);
>
> This is not clean way of handling it, we should have something similar to
> omap4. Also we should use warm-reset here instead of cold.
>
> I have quickly created patch, can you please review and test is?
> I have tested it on AM335x EVM and Bone platform.
Works for me as well, thanks!
You can take my
Tested-by: Daniel Mack <zonque@gmail.com>
if you wish ...
>
>
> diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
> index 601ecdf..6a69ceb 100644
> --- a/arch/arm/mach-omap2/board-generic.c
> +++ b/arch/arm/mach-omap2/board-generic.c
> @@ -114,6 +114,7 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
> .init_machine = omap_generic_init,
> .timer = &omap3_am33xx_timer,
> .dt_compat = am33xx_boards_compat,
> + .restart = omap_prcm_restart,
> MACHINE_END
> #endif
>
> diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
> index 0f51e03..490f8f6 100644
> --- a/arch/arm/mach-omap2/prcm.c
> +++ b/arch/arm/mach-omap2/prcm.c
> @@ -33,6 +33,7 @@
> #include "cm2xxx_3xxx.h"
> #include "prm2xxx_3xxx.h"
> #include "prm44xx.h"
> +#include "prm33xx.h"
> #include "prminst44xx.h"
> #include "cminst44xx.h"
> #include "prm-regbits-24xx.h"
> @@ -72,6 +73,8 @@ void omap_prcm_restart(char mode, const char *cmd)
> omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
> } else if (cpu_is_omap44xx()) {
> omap4_prminst_global_warm_sw_reset(); /* never returns */
> + } else if (soc_is_am33xx()) {
> + am33xx_prm_global_warm_sw_reset(); /* never returns */
> } else {
> WARN_ON(1);
> }
> diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
> index e7dbb6c..505219d 100644
> --- a/arch/arm/mach-omap2/prm33xx.c
> +++ b/arch/arm/mach-omap2/prm33xx.c
> @@ -133,3 +133,18 @@ int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
>
> return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
> }
> +
> +void am33xx_prm_global_warm_sw_reset(void)
> +{
> + u32 v;
> +
> + v = am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
> + AM33XX_PRM_RSTCTRL_OFFSET);
> + v |= AM33XX_GLOBAL_WARM_SW_RST_MASK;
> + am33xx_prm_write_reg(v, AM33XX_PRM_DEVICE_MOD,
> + AM33XX_PRM_RSTCTRL_OFFSET);
> +
> + /* OCP barrier */
> + v = am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
> + AM33XX_PRM_RSTCTRL_OFFSET);
> +}
> diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
> index 3f25c56..cdfc694 100644
> --- a/arch/arm/mach-omap2/prm33xx.h
> +++ b/arch/arm/mach-omap2/prm33xx.h
> @@ -126,4 +126,5 @@ extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
> extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs);
> extern int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
> u16 rstctrl_offs, u16 rstst_offs);
> +extern void am33xx_prm_global_warm_sw_reset(void);
>
>
> Thanks,
> Vaibhav
>
^ permalink raw reply
* [PATCH v3 3/4] arm: mvebu: move irq controller driver to drivers/irqchip
From: Thomas Petazzoni @ 2012-10-29 9:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <508E4EB3.5060901@gmail.com>
Hello,
On Mon, 29 Oct 2012 10:38:59 +0100, Sebastian Hesselbarth wrote:
> > Not really: the driver is probed depending on the DT compatible string.
> > So we can perfectly have two irqchip drivers being enabled on
> > ARCH_MVEBU.
>
> I agreed but this will always build irq-armada-370-xp into the kernel
> although I maybe want a orion-only kernel. Although multi-platform will
> be great for ARM, I doubt that every kernel will be multi-platform?
Agreed.
> >> As soon as the patch is through, I can provide (and use) a irq-orion
> >> based on irqchip. I can provide it earlier but to actually use it there
> >> are still some other patches required on Dove. Other Orions could
> >> switch now, I guess.
> >
> > Are you sure? The irqchip drivers only work for sub-architecture that
> > are fully converted to the Device Tree. And I don't think all of
> > mach-orion5x, mach-dove, mach-kirkwood and mach-mv78xx0 are converted
> > to the DT.
>
> Hmm, I do have an experimental branch of Dove with irqchip enabled that
> works perfectly fine even with non-DT code in it. Actually, it is based
> on 3.7-rc3 which means it is before your patches.
>
> But the irq controller itself is referenced from DT, of course.
Yes, you need at least to probe the irq controller from DT. But neither
mach-orion5x nor mach-mv78xx0 have DT at all, and they need irq-orion.
I am currently in contact with an engineer from LaCie, who has put his
hands on a mach-orion5x platform, I hope to work with him to get DT
support in mach-orion5x.
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [RFC 2/6] sched: add a new SD SHARE_POWERLINE flag for sched_domain
From: Vincent Guittot @ 2012-10-29 9:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKfTPtDMQvsbudGm71UAv1xUE86CLP-ySB1PBYXB7HoFa7gOgQ@mail.gmail.com>
It looks like i need to describe more what
On 29 October 2012 10:40, Vincent Guittot <vincent.guittot@linaro.org> wrote:
> On 24 October 2012 17:17, Santosh Shilimkar <santosh.shilimkar@ti.com> wrote:
>> Vincent,
>>
>> Few comments/questions.
>>
>>
>> On Sunday 07 October 2012 01:13 PM, Vincent Guittot wrote:
>>>
>>> This new flag SD SHARE_POWERLINE reflects the sharing of the power rail
>>> between the members of a domain. As this is the current assumption of the
>>> scheduler, the flag is added to all sched_domain
>>>
>>> Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
>>> ---
>>> arch/ia64/include/asm/topology.h | 1 +
>>> arch/tile/include/asm/topology.h | 1 +
>>> include/linux/sched.h | 1 +
>>> include/linux/topology.h | 3 +++
>>> kernel/sched/core.c | 5 +++++
>>> 5 files changed, 11 insertions(+)
>>>
>>> diff --git a/arch/ia64/include/asm/topology.h
>>> b/arch/ia64/include/asm/topology.h
>>> index a2496e4..065c720 100644
>>> --- a/arch/ia64/include/asm/topology.h
>>> +++ b/arch/ia64/include/asm/topology.h
>>> @@ -65,6 +65,7 @@ void build_cpu_to_node_map(void);
>>> | SD_BALANCE_EXEC \
>>> | SD_BALANCE_FORK \
>>> | SD_WAKE_AFFINE, \
>>> + | arch_sd_share_power_line() \
>>> .last_balance = jiffies, \
>>> .balance_interval = 1, \
>>> .nr_balance_failed = 0, \
>>> diff --git a/arch/tile/include/asm/topology.h
>>> b/arch/tile/include/asm/topology.h
>>> index 7a7ce39..d39ed0b 100644
>>> --- a/arch/tile/include/asm/topology.h
>>> +++ b/arch/tile/include/asm/topology.h
>>> @@ -72,6 +72,7 @@ static inline const struct cpumask *cpumask_of_node(int
>>> node)
>>> | 0*SD_PREFER_LOCAL \
>>> | 0*SD_SHARE_CPUPOWER \
>>> | 0*SD_SHARE_PKG_RESOURCES \
>>> + | arch_sd_share_power_line() \
>>> | 0*SD_SERIALIZE \
>>> , \
>>> .last_balance = jiffies, \
>>> diff --git a/include/linux/sched.h b/include/linux/sched.h
>>> index 4786b20..74f2daf 100644
>>> --- a/include/linux/sched.h
>>> +++ b/include/linux/sched.h
>>> @@ -862,6 +862,7 @@ enum cpu_idle_type {
>>> #define SD_WAKE_AFFINE 0x0020 /* Wake task to waking CPU
>>> */
>>> #define SD_PREFER_LOCAL 0x0040 /* Prefer to keep tasks
>>> local to this domain */
>>> #define SD_SHARE_CPUPOWER 0x0080 /* Domain members share cpu power
>>> */
>>> +#define SD_SHARE_POWERLINE 0x0100 /* Domain members share power
>>> domain */
>>
>> If you ignore the current use of SD_SHARE_CPUPOWER, isn't the meaning of
>> CPUPOWER and POWERLINE is same here. Just trying to understand the clear
>> meaning of this new flag. Have you not considered SD_SHARE_CPUPOWER
>> because it is being used for cpu_power and needs at least minimum two
>> domains ? SD_PACKING would have been probably more appropriate based
>> on the way it is being used in further series.
>
> CPUPOWER reflects the share of hw ressources between cores like for
> hyper threading. POWERLINE describes the fact that cores are sharing
> the same power line amore precisely the powergate.
Sorry, the mail has been sent too early while I was writing it
CPUPOWER reflects the share of hw ressources between cores like for
hyper threading. POWERLINE describes the fact that cores are sharing
the same power line and more precisely the same power gating. It looks
like I need to describe more precisely what i would mean with
SHARE_POWERLINE.
I don't want to use PACKING because it's more a behavior than a
feature. If cores can power gate independently (!SD_SHARE_POWERLINE),
packing small tasks is one interesting behavior but it may be not the
only one. I want to make a difference between the HW configuration and
the behavior we want to have above it
Vincent
>>
>> Regards
>> Santosh
>>
^ permalink raw reply
* [PULL REQ] IXP4xx changes for Linux 3.7
From: Russell King - ARM Linux @ 2012-10-29 9:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <m3a9vkahci.fsf@intrepid.localdomain>
On Thu, Oct 18, 2012 at 12:01:17AM +0200, Krzysztof Halasa wrote:
> Hi,
>
> Arnd Bergmann <arnd@arndb.de> writes:
> > Also, never rebase your tree immediately before sending a pull
> > request.
>
> I did not, of course. My mail stated:
> "Build-tested for now. This is based on your current tree tip because it
> depends on commits following 3.6 release."
You're lucky that you didn't get flamed by Linus himself for that, as
others _have_ been in the past.
> Normally I wouldn't rebase, but had to (as you well knew) - because you
> commited a conflicting patch to this very IXP4xx arch. Using your logic,
> you were supposed to get an Ack from me (or from Imre) for this patch.
If you had *bothered* asking the arm-soc people to pull your tree
_instead_ of Linus, then that problem becomes the arm-soc's problem, not
yours. That means _you_ end up with _less_ work to do. Yet, instead
of seeing that benefit, whenever you've been asked to send your tree via
arm-soc, you throw your toys out of your pram and basically refuse.
So, you're making *more* work for yourself by not participating in
arm-soc (as I've explained to you before.)
The _ONLY_ thing you have to do is send your pull request to the arm-soc
people instead of Linus before the merge window opens. You don't need to
rebase your stuff on a different tree, you can still use Linus' tree as
a basis.
You have offered no technical reason why you can't participate in arm-soc
which has stood up to screutiny.
The only reasons you've offered seem to be:
1. it'll be more work (untrue)
2. you look after platforms which aren't in mainline and you're not submitting
to mainline.
Both of these a total nonsense arguments when it comes to the _route_ that
your patches make their way into mainline. They have absolutely no bearing
on the path your changes take AT ALL.
> Don't get me wrong. If I had time for this it could be different.
> Unfortunately IXP4xx is a legacy arch, and for me it's simply a hobby at
> this point. Given the raised barriers to participate, probably aimed at
> paid maintainers, I have to quit doing this.
As you're being difficult and not willing to co-operate, and for whatever
reason building this issue into a mountain, this unfortunately sounds to
me like a good thing. Hopefully, a more co-operative maintainer will step
up in your place who can see the benefits.
^ permalink raw reply
* [PATCH] ARM: AM33xx: add support for reboot
From: Hiremath, Vaibhav @ 2012-10-29 9:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <508E5121.9020304@gmail.com>
On Mon, Oct 29, 2012 at 15:19:21, Daniel Mack wrote:
> On 29.10.2012 05:31, Hiremath, Vaibhav wrote:
> > On Sun, Oct 28, 2012 at 23:47:55, Daniel Mack wrote:
> >> This patch adds the ability to reboot am33xx-based systems.
> >>
> >> Signed-off-by: Daniel Mack <zonque@gmail.com>
> >> ---
> >> arch/arm/mach-omap2/board-generic.c | 1 +
> >> arch/arm/mach-omap2/prcm.c | 6 ++++++
> >> 2 files changed, 7 insertions(+)
> >>
> >> diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
> >> index 601ecdf..6a69ceb 100644
> >> --- a/arch/arm/mach-omap2/board-generic.c
> >> +++ b/arch/arm/mach-omap2/board-generic.c
> >> @@ -114,6 +114,7 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
> >> .init_machine = omap_generic_init,
> >> .timer = &omap3_am33xx_timer,
> >> .dt_compat = am33xx_boards_compat,
> >> + .restart = omap_prcm_restart,
> >> MACHINE_END
> >> #endif
> >>
> >> diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
> >> index 0f51e03..8a3068a 100644
> >> --- a/arch/arm/mach-omap2/prcm.c
> >> +++ b/arch/arm/mach-omap2/prcm.c
> >> @@ -32,6 +32,7 @@
> >> #include "clock2xxx.h"
> >> #include "cm2xxx_3xxx.h"
> >> #include "prm2xxx_3xxx.h"
> >> +#include "prm33xx.h"
> >> #include "prm44xx.h"
> >> #include "prminst44xx.h"
> >> #include "cminst44xx.h"
> >> @@ -72,6 +73,11 @@ void omap_prcm_restart(char mode, const char *cmd)
> >> omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
> >> } else if (cpu_is_omap44xx()) {
> >> omap4_prminst_global_warm_sw_reset(); /* never returns */
> >> + } else if (soc_is_am33xx()) {
> >> + prcm_offs = AM33XX_PRM_DEVICE_MOD;
> >> + omap2_prm_set_mod_reg_bits(OMAP4430_RST_GLOBAL_COLD_SW_MASK,
> >> + prcm_offs,
> >> + AM33XX_PRM_RSTCTRL_OFFSET);
> >
> > This is not clean way of handling it, we should have something similar to
> > omap4. Also we should use warm-reset here instead of cold.
> >
> > I have quickly created patch, can you please review and test is?
> > I have tested it on AM335x EVM and Bone platform.
>
> Works for me as well, thanks!
>
> You can take my
>
> Tested-by: Daniel Mack <zonque@gmail.com>
>
Thanks Daniel for confirming. I will send out this patch ASAP with your
tested by.
Thanks,
Vaibhav
^ permalink raw reply
* [PATCH 1/2] pinctrl/: at91: fix warmings
From: Russell King - ARM Linux @ 2012-10-29 9:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351360392-8669-1-git-send-email-plagnioj@jcrosoft.com>
On Sat, Oct 27, 2012 at 07:53:11PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> /opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c: In function 'at91_pinctrl_probe_dt':
> /opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c:952:12: warning: assignment discards qualifiers from pointer target type
> /opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c: In function 'at91_gpio_probe':
> /opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c:1517:17: warning: assignment discards qualifiers from pointer target type
>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> ---
> drivers/pinctrl/pinctrl-at91.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
> index 0679643..6485d7e 100644
> --- a/drivers/pinctrl/pinctrl-at91.c
> +++ b/drivers/pinctrl/pinctrl-at91.c
> @@ -949,7 +949,7 @@ static int __devinit at91_pinctrl_probe_dt(struct platform_device *pdev,
> return -ENODEV;
>
> info->dev = &pdev->dev;
> - info->ops =
> + info->ops = (struct at91_pinctrl_mux_ops*)
> of_match_device(at91_pinctrl_of_match, &pdev->dev)->data;
Fix the type on info->ops instead, it probably wants to be const.
^ permalink raw reply
* [PATCH] ARM: OMAP2+: am33xx: Add PRM warm reset/reboot support
From: Vaibhav Hiremath @ 2012-10-29 9:59 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds reboot capability to all AM33XX based boards/EVM's,
by asserting PRM warm reset bit on 'reboot' command.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Afzal Mohammed <afzal@ti.com>
---
Tested on AM335xEVM and BeagleBone platform.
arch/arm/mach-omap2/board-generic.c | 1 +
arch/arm/mach-omap2/prcm.c | 3 +++
arch/arm/mach-omap2/prm33xx.c | 15 +++++++++++++++
arch/arm/mach-omap2/prm33xx.h | 1 +
4 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 601ecdf..6a69ceb 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -114,6 +114,7 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
.init_machine = omap_generic_init,
.timer = &omap3_am33xx_timer,
.dt_compat = am33xx_boards_compat,
+ .restart = omap_prcm_restart,
MACHINE_END
#endif
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index cff270a..07f163c 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -34,6 +34,7 @@
#include "cm2xxx_3xxx.h"
#include "prm2xxx_3xxx.h"
#include "prm44xx.h"
+#include "prm33xx.h"
#include "prminst44xx.h"
#include "cminst44xx.h"
#include "prm-regbits-24xx.h"
@@ -73,6 +74,8 @@ void omap_prcm_restart(char mode, const char *cmd)
omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
} else if (cpu_is_omap44xx()) {
omap4_prminst_global_warm_sw_reset(); /* never returns */
+ } else if (soc_is_am33xx()) {
+ am33xx_prm_global_warm_sw_reset(); /* never returns */
} else {
WARN_ON(1);
}
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 53ec9cb..657c3d0 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -135,6 +135,21 @@ int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
}
+void am33xx_prm_global_warm_sw_reset(void)
+{
+ u32 v;
+
+ v = am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
+ AM33XX_PRM_RSTCTRL_OFFSET);
+ v |= AM33XX_GLOBAL_WARM_SW_RST_MASK;
+ am33xx_prm_write_reg(v, AM33XX_PRM_DEVICE_MOD,
+ AM33XX_PRM_RSTCTRL_OFFSET);
+
+ /* OCP barrier */
+ v = am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
+ AM33XX_PRM_RSTCTRL_OFFSET);
+}
+
static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
{
am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK,
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 3f25c56..cdfc694 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -126,4 +126,5 @@ extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs);
extern int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
u16 rstctrl_offs, u16 rstst_offs);
+extern void am33xx_prm_global_warm_sw_reset(void);
#endif
--
1.7.0.4
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