* [PATCH 09/11] ARM: OMAP: Fix relative includes for debug-devices.h
From: Tony Lindgren @ 2012-10-30 23:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121030234852.25936.12482.stgit@muffinssi.local>
As discussed on linux-arm-kernel, we want to avoid
relative includes for the arch/arm/*omap* shared code:
http://www.spinics.net/lists/linux-omap/msg80520.html
Let's add plat/debug-devices.h for debug_card_init()
to fix the relative includes.
Note that drivers must not use this header as it will
break build for omap2+ CONFIG_MULTIPLATFORM builds.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/board-h4.c | 2 +-
arch/arm/plat-omap/debug-devices.c | 2 +-
arch/arm/plat-omap/include/plat/debug-devices.h | 7 -------
3 files changed, 2 insertions(+), 9 deletions(-)
rename arch/arm/{mach-omap2/debug-devices.h => plat-omap/include/plat/debug-devices.h} (54%)
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index bd11b0a..8668c72 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -33,7 +33,7 @@
#include <asm/mach/map.h>
#include <plat-omap/dma-omap.h>
-#include "debug-devices.h"
+#include <plat/debug-devices.h>
#include <video/omapdss.h>
#include <video/omap-panel-generic-dpi.h>
diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c
index 5a4678e..b49be51 100644
--- a/arch/arm/plat-omap/debug-devices.c
+++ b/arch/arm/plat-omap/debug-devices.c
@@ -16,7 +16,7 @@
#include <linux/smc91x.h>
#include <mach/hardware.h>
-#include "../mach-omap2/debug-devices.h"
+#include <plat/debug-devices.h>
/* Many OMAP development platforms reuse the same "debug board"; these
* platforms include H2, H3, H4, and Perseus2.
diff --git a/arch/arm/mach-omap2/debug-devices.h b/arch/arm/plat-omap/include/plat/debug-devices.h
similarity index 54%
rename from arch/arm/mach-omap2/debug-devices.h
rename to arch/arm/plat-omap/include/plat/debug-devices.h
index a4edbd2..8fc4287 100644
--- a/arch/arm/mach-omap2/debug-devices.h
+++ b/arch/arm/plat-omap/include/plat/debug-devices.h
@@ -1,9 +1,2 @@
-#ifndef _OMAP_DEBUG_DEVICES_H
-#define _OMAP_DEBUG_DEVICES_H
-
-#include <linux/types.h>
-
/* for TI reference platforms sharing the same debug card */
extern int debug_card_init(u32 addr, unsigned gpio);
-
-#endif
^ permalink raw reply related
* [PATCH 08/11] ARM: OMAP: Remove plat-omap/common.h
From: Tony Lindgren @ 2012-10-30 23:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121030234852.25936.12482.stgit@muffinssi.local>
Most of the prototypes in plat-omap/common.h are not
common to omap1 and omap2+, they are local to omap2+
and should not be in plat-omap/common.h.
The only shared function prototype in this file is
omap_init_clocksource_32k(), let's put that into
counter-32k.h.
Note that the new plat/counter-32k.h must not be
included from drivers, that will break omap2+ build
for CONFIG_MULTIPLATFORM.
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap1/common.h | 1 -
arch/arm/mach-omap1/timer32k.c | 1 +
arch/arm/mach-omap2/cm33xx.c | 2 -
arch/arm/mach-omap2/common.h | 5 ++-
.../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | 2 -
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 -
arch/arm/mach-omap2/prm33xx.c | 2 -
arch/arm/mach-omap2/prm_common.c | 1 -
arch/arm/mach-omap2/timer.c | 1 +
arch/arm/plat-omap/common.c | 1 -
arch/arm/plat-omap/common.h | 36 --------------------
arch/arm/plat-omap/counter_32k.c | 2 -
arch/arm/plat-omap/include/plat/counter-32k.h | 1 +
13 files changed, 6 insertions(+), 51 deletions(-)
delete mode 100644 arch/arm/plat-omap/common.h
create mode 100644 arch/arm/plat-omap/include/plat/counter-32k.h
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
index 3d40f6e..fc8c944 100644
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@ -26,7 +26,6 @@
#ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H
#define __ARCH_ARM_MACH_OMAP1_COMMON_H
-#include "../plat-omap/common.h"
#include <linux/mtd/mtd.h>
#include <linux/i2c-omap.h>
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 7452954..8936819 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -50,6 +50,7 @@
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
+#include <plat/counter-32k.h>
#include <plat/dmtimer.h>
#include <mach/hardware.h>
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index b4938ab..ed8dcaf 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -22,8 +22,6 @@
#include <linux/err.h>
#include <linux/io.h>
-#include "../plat-omap/common.h"
-
#include "cm.h"
#include "cm33xx.h"
#include "cm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index c925c80..426fcfc 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -34,8 +34,6 @@
#include <asm/proc-fns.h>
-#include "../plat-omap/common.h"
-
#include "i2c.h"
#include "serial.h"
@@ -345,5 +343,8 @@ struct omap2_hsmmc_info;
extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
extern void omap_reserve(void);
+struct omap_hwmod;
+extern int omap_dss_reset(struct omap_hwmod *);
+
#endif /* __ASSEMBLER__ */
#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index 05c6a59..40d6c93 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -12,8 +12,6 @@
#include <plat-omap/dma-omap.h>
-#include "../plat-omap/common.h"
-
#include "omap_hwmod.h"
#include "hdq1w.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 5b9be73..7a61328 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -30,8 +30,6 @@
#include <plat/dmtimer.h>
#include <plat/iommu.h>
-#include "../plat-omap/common.h"
-
#include "omap_hwmod.h"
#include "omap_hwmod_common_data.h"
#include "cm1_44xx.h"
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 624ade5..0d8abb5 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -19,8 +19,6 @@
#include <linux/err.h>
#include <linux/io.h>
-#include "../plat-omap/common.h"
-
#include "common.h"
#include "prm33xx.h"
#include "prm-regbits-33xx.h"
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 6fabbd8..3442227 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -24,7 +24,6 @@
#include <linux/interrupt.h>
#include <linux/slab.h>
-#include "../plat-omap/common.h"
#include <plat/prcm.h>
#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 95e4478..c5bc2cb 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -45,6 +45,7 @@
#include <asm/arch_timer.h>
#include "omap_hwmod.h"
#include "omap_device.h"
+#include <plat/counter-32k.h>
#include <plat/dmtimer.h>
#include "omap-pm.h"
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index a1555e0..bf6cd80 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -16,7 +16,6 @@
#include <linux/io.h>
#include <linux/dma-mapping.h>
-#include "common.h"
#include <plat-omap/dma-omap.h>
void __init omap_init_consistent_dma_size(void)
diff --git a/arch/arm/plat-omap/common.h b/arch/arm/plat-omap/common.h
deleted file mode 100644
index 8ae0542..0000000
--- a/arch/arm/plat-omap/common.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Header for shared OMAP code in plat-omap.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP_COMMON_H
-#define __ARCH_ARM_MACH_OMAP_COMMON_H
-
-extern int __init omap_init_clocksource_32k(void __iomem *vbase);
-
-extern void __init omap_check_revision(void);
-
-extern void omap_reserve(void);
-struct omap_hwmod;
-extern int omap_dss_reset(struct omap_hwmod *);
-
-#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 66bf3f9..f3771cd 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -22,8 +22,6 @@
#include <asm/mach/time.h>
#include <asm/sched_clock.h>
-#include "common.h"
-
/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
#define OMAP2_32KSYNCNT_REV_OFF 0x0
#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
diff --git a/arch/arm/plat-omap/include/plat/counter-32k.h b/arch/arm/plat-omap/include/plat/counter-32k.h
new file mode 100644
index 0000000..da000d4
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/counter-32k.h
@@ -0,0 +1 @@
+int omap_init_clocksource_32k(void __iomem *vbase);
^ permalink raw reply related
* [PATCH 07/11] ARM: OMAP: Move omap-pm-noop.c local to mach-omap2
From: Tony Lindgren @ 2012-10-30 23:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121030234852.25936.12482.stgit@muffinssi.local>
This code should be private to mach-omap2.
The only use for it in for omap1 has been in dmtimer.c
to check for context loss. However, omap1 does not
lose context during idle, so the code is not needed.
Further, omap1 timer has OMAP_TIMER_ALWON set, so omap1
was not hitting omap_pm_get_dev_context_loss_count()
test.
Cc: Jon Hunter <jon-hunter@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/Makefile | 1 +
arch/arm/mach-omap2/omap-pm-noop.c | 4 ++--
arch/arm/mach-omap2/timer.c | 2 ++
arch/arm/plat-omap/Makefile | 1 -
arch/arm/plat-omap/dmtimer.c | 17 ++++++++++-------
arch/arm/plat-omap/include/plat/dmtimer.h | 2 ++
6 files changed, 17 insertions(+), 10 deletions(-)
rename arch/arm/{plat-omap/omap-pm-noop.c => mach-omap2/omap-pm-noop.c} (99%)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index e3de5d4..b118ed5 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -70,6 +70,7 @@ obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o
obj-$(CONFIG_ARCH_OMAP4) += sleep44xx.o
obj-$(CONFIG_SOC_OMAP5) += omap-mpuss-lowpower.o sleep44xx.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
+obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o
obj-$(CONFIG_POWER_AVS_OMAP) += sr_device.o
obj-$(CONFIG_POWER_AVS_OMAP_CLASS3) += smartreflex-class3.o
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/mach-omap2/omap-pm-noop.c
similarity index 99%
rename from arch/arm/plat-omap/omap-pm-noop.c
rename to arch/arm/mach-omap2/omap-pm-noop.c
index 198685b..6a3be2b 100644
--- a/arch/arm/plat-omap/omap-pm-noop.c
+++ b/arch/arm/mach-omap2/omap-pm-noop.c
@@ -22,8 +22,8 @@
#include <linux/device.h>
#include <linux/platform_device.h>
-#include "../mach-omap2/omap_device.h"
-#include "../mach-omap2/omap-pm.h"
+#include "omap_device.h"
+#include "omap-pm.h"
static bool off_mode_enabled;
static int dummy_context_loss_counter;
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 565e575..95e4478 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -559,6 +559,8 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
if (timer_dev_attr)
pdata->timer_capability = timer_dev_attr->timer_capability;
+ pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
+
pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
NULL, 0, 0);
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 4bd0ace..50da9bf 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -19,4 +19,3 @@ obj-y += $(i2c-omap-m) $(i2c-omap-y)
# OMAP mailbox framework
obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
-obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 4a0b30a..9a0bbc4 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -45,8 +45,6 @@
#include <mach/hardware.h>
-#include "../mach-omap2/omap-pm.h"
-
static u32 omap_reserved_systimers;
static LIST_HEAD(omap_timer_list);
static DEFINE_SPINLOCK(dm_timer_lock);
@@ -349,7 +347,8 @@ int omap_dm_timer_start(struct omap_dm_timer *timer)
omap_dm_timer_enable(timer);
if (!(timer->capability & OMAP_TIMER_ALWON)) {
- if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) !=
+ if (timer->get_context_loss_count &&
+ timer->get_context_loss_count(&timer->pdev->dev) !=
timer->ctx_loss_count)
omap_timer_restore_context(timer);
}
@@ -378,9 +377,11 @@ int omap_dm_timer_stop(struct omap_dm_timer *timer)
__omap_dm_timer_stop(timer, timer->posted, rate);
- if (!(timer->capability & OMAP_TIMER_ALWON))
- timer->ctx_loss_count =
- omap_pm_get_dev_context_loss_count(&timer->pdev->dev);
+ if (!(timer->capability & OMAP_TIMER_ALWON)) {
+ if (timer->get_context_loss_count)
+ timer->ctx_loss_count =
+ timer->get_context_loss_count(&timer->pdev->dev);
+ }
/*
* Since the register values are computed and written within
@@ -496,7 +497,8 @@ int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
omap_dm_timer_enable(timer);
if (!(timer->capability & OMAP_TIMER_ALWON)) {
- if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) !=
+ if (timer->get_context_loss_count &&
+ timer->get_context_loss_count(&timer->pdev->dev) !=
timer->ctx_loss_count)
omap_timer_restore_context(timer);
}
@@ -730,6 +732,7 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
timer->reserved = omap_dm_timer_reserved_systimer(timer->id);
timer->pdev = pdev;
timer->capability = pdata->timer_capability;
+ timer->get_context_loss_count = pdata->get_context_loss_count;
/* Skip pm_runtime_enable for OMAP1 */
if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index 85868e9..3f5b9cf 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -94,6 +94,7 @@ struct dmtimer_platform_data {
/* set_timer_src - Only used for OMAP1 devices */
int (*set_timer_src)(struct platform_device *pdev, int source);
u32 timer_capability;
+ int (*get_context_loss_count)(struct device *);
};
int omap_dm_timer_reserve_systimer(int id);
@@ -263,6 +264,7 @@ struct omap_dm_timer {
unsigned reserved:1;
unsigned posted:1;
struct timer_regs context;
+ int (*get_context_loss_count)(struct device *);
int ctx_loss_count;
int revision;
u32 capability;
^ permalink raw reply related
* [PATCH 06/11] ARM: OMAP: Fix relative includes for shared i2c.h file
From: Tony Lindgren @ 2012-10-30 23:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121030234852.25936.12482.stgit@muffinssi.local>
As discussed on linux-arm-kernel, we want to avoid
relative includes for the arch/arm/*omap* shared code:
http://www.spinics.net/lists/linux-omap/msg80520.html
To fix this for the shared i2c.h, let's re-introduce
a minimal plat/i2c.h.
Note that drivers must not use this header as it will
break build for omap2+ CONFIG_MULTIPLATFORM builds.
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap1/common.h | 2 +-
arch/arm/mach-omap1/i2c.c | 2 +-
arch/arm/mach-omap2/i2c.h | 2 +-
arch/arm/plat-omap/i2c.c | 4 ++--
arch/arm/plat-omap/include/plat/i2c.h | 0
5 files changed, 5 insertions(+), 5 deletions(-)
rename arch/arm/plat-omap/{i2c.h => include/plat/i2c.h} (100%)
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
index 26e19d3..3d40f6e 100644
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@ -30,7 +30,7 @@
#include <linux/mtd/mtd.h>
#include <linux/i2c-omap.h>
-#include "../plat-omap/i2c.h"
+#include <plat/i2c.h>
#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
void omap7xx_map_io(void);
diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c
index 54097a2..faca808 100644
--- a/arch/arm/mach-omap1/i2c.c
+++ b/arch/arm/mach-omap1/i2c.c
@@ -23,7 +23,7 @@
#include <mach/mux.h>
#include "soc.h"
-#include "../plat-omap/i2c.h"
+#include <plat/i2c.h>
#define OMAP_I2C_SIZE 0x3f
#define OMAP1_I2C_BASE 0xfffb3800
diff --git a/arch/arm/mach-omap2/i2c.h b/arch/arm/mach-omap2/i2c.h
index 81dbb99..42b6f2e 100644
--- a/arch/arm/mach-omap2/i2c.h
+++ b/arch/arm/mach-omap2/i2c.h
@@ -19,7 +19,7 @@
*
*/
-#include "../plat-omap/i2c.h"
+#include <plat/i2c.h>
#ifndef __MACH_OMAP2_I2C_H
#define __MACH_OMAP2_I2C_H
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index d094273..4645dd4 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -31,9 +31,9 @@
#include <linux/err.h>
#include <linux/clk.h>
-#include <mach/irqs.h>
+#include <plat/i2c.h>
-#include "i2c.h"
+#include <mach/irqs.h>
#define OMAP_I2C_MAX_CONTROLLERS 4
static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
diff --git a/arch/arm/plat-omap/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h
similarity index 100%
rename from arch/arm/plat-omap/i2c.h
rename to arch/arm/plat-omap/include/plat/i2c.h
^ permalink raw reply related
* [PATCH 05/11] ARM: OMAP: Make plat-omap/i2c.c port checks local
From: Tony Lindgren @ 2012-10-30 23:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121030234852.25936.12482.stgit@muffinssi.local>
The common code should not have any omap1 or omap2+
specific code, and should not need to call the cpu_is_omap
macros.
The only remaining user for cpu_is_omap macros is
omap_i2c_nr_ports(). Let's make those checks in
the omap specific implementation of omap_i2c_add_bus()
instead in order to remove cpu_is_omap usage from
the common code.
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap1/i2c.c | 3 +++
arch/arm/mach-omap2/i2c.c | 16 ++++++++++++++++
arch/arm/plat-omap/i2c.c | 26 +++-----------------------
3 files changed, 22 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c
index 32bcbb8..54097a2 100644
--- a/arch/arm/mach-omap1/i2c.c
+++ b/arch/arm/mach-omap1/i2c.c
@@ -54,6 +54,9 @@ int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata,
struct platform_device *pdev;
struct resource *res;
+ if (bus_id > 1)
+ return -EINVAL;
+
omap1_i2c_mux_pins(bus_id);
pdev = &omap_i2c_devices[bus_id - 1];
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index ad55b94..4e63097 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -109,6 +109,19 @@ int omap_i2c_reset(struct omap_hwmod *oh)
return 0;
}
+static int __init omap_i2c_nr_ports(void)
+{
+ int ports = 0;
+
+ if (cpu_is_omap24xx())
+ ports = 2;
+ else if (cpu_is_omap34xx())
+ ports = 3;
+ else if (cpu_is_omap44xx())
+ ports = 4;
+ return ports;
+}
+
static const char name[] = "omap_i2c";
int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
@@ -121,6 +134,9 @@ int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
struct omap_i2c_bus_platform_data *pdata;
struct omap_i2c_dev_attr *dev_attr;
+ if (bus_id > omap_i2c_nr_ports())
+ return -EINVAL;
+
omap2_i2c_mux_pins(bus_id);
l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index be6deb7..d094273 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -33,9 +33,6 @@
#include <mach/irqs.h>
-#include "../mach-omap1/soc.h"
-#include "../mach-omap2/soc.h"
-
#include "i2c.h"
#define OMAP_I2C_MAX_CONTROLLERS 4
@@ -43,22 +40,6 @@ static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
-static int __init omap_i2c_nr_ports(void)
-{
- int ports = 0;
-
- if (cpu_class_is_omap1())
- ports = 1;
- else if (cpu_is_omap24xx())
- ports = 2;
- else if (cpu_is_omap34xx())
- ports = 3;
- else if (cpu_is_omap44xx())
- ports = 4;
-
- return ports;
-}
-
/**
* omap_i2c_bus_setup - Process command line options for the I2C bus speed
* @str: String of options
@@ -72,12 +53,11 @@ static int __init omap_i2c_nr_ports(void)
*/
static int __init omap_i2c_bus_setup(char *str)
{
- int ports;
int ints[3];
- ports = omap_i2c_nr_ports();
get_options(str, 3, ints);
- if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
+ if (ints[0] < 2 || ints[1] < 1 ||
+ ints[1] > OMAP_I2C_MAX_CONTROLLERS)
return 0;
i2c_pdata[ints[1] - 1].clkrate = ints[2];
i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
@@ -122,7 +102,7 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
{
int err;
- BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
+ BUG_ON(bus_id < 1 || bus_id > OMAP_I2C_MAX_CONTROLLERS);
if (info) {
err = i2c_register_board_info(bus_id, info, len);
^ permalink raw reply related
* [PATCH 04/11] ARM: OMAP: Move omap2+ specific parts of sram.c to mach-omap2
From: Tony Lindgren @ 2012-10-30 23:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121030234852.25936.12482.stgit@muffinssi.local>
Let's make the omap2+ specific parts private to mach-omap2.
This leaves just a minimal shared code into plat-omap like
it should be.
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/Makefile | 2
arch/arm/mach-omap2/sram.c | 305 ++++++++++++++++++++++++++++++++++++++++++
arch/arm/plat-omap/sram.c | 288 ----------------------------------------
3 files changed, 306 insertions(+), 289 deletions(-)
create mode 100644 arch/arm/mach-omap2/sram.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 46d9071..e3de5d4 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -5,7 +5,7 @@
# Common support
obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
- omap_device.o
+ omap_device.o sram.o
# INTCPS IP block support - XXX should be moved to drivers/
obj-$(CONFIG_ARCH_OMAP2) += irq.o
diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
new file mode 100644
index 0000000..0ff0f06
--- /dev/null
+++ b/arch/arm/mach-omap2/sram.c
@@ -0,0 +1,305 @@
+/*
+ *
+ * OMAP SRAM detection and management
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Written by Tony Lindgren <tony@atomide.com>
+ *
+ * Copyright (C) 2009-2012 Texas Instruments
+ * Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/fncpy.h>
+#include <asm/tlb.h>
+#include <asm/cacheflush.h>
+
+#include <asm/mach/map.h>
+
+#include "soc.h"
+#include "iomap.h"
+#include "prm2xxx_3xxx.h"
+#include "sdrc.h"
+#include "sram.h"
+
+#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
+#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
+#ifdef CONFIG_OMAP4_ERRATA_I688
+#define OMAP4_SRAM_PUB_PA OMAP4_SRAM_PA
+#else
+#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
+#endif
+#define OMAP5_SRAM_PA 0x40300000
+
+#define SRAM_BOOTLOADER_SZ 0x00
+
+#define OMAP24XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68005048)
+#define OMAP24XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68005050)
+#define OMAP24XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68005058)
+
+#define OMAP34XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68012848)
+#define OMAP34XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68012850)
+#define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858)
+#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880)
+#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048)
+
+#define GP_DEVICE 0x300
+
+#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
+
+static unsigned long omap_sram_start;
+static unsigned long omap_sram_skip;
+static unsigned long omap_sram_size;
+
+/*
+ * Depending on the target RAMFS firewall setup, the public usable amount of
+ * SRAM varies. The default accessible size for all device types is 2k. A GP
+ * device allows ARM11 but not other initiators for full size. This
+ * functionality seems ok until some nice security API happens.
+ */
+static int is_sram_locked(void)
+{
+ if (OMAP2_DEVICE_TYPE_GP == omap_type()) {
+ /* RAMFW: R/W access to all initiators for all qualifier sets */
+ if (cpu_is_omap242x()) {
+ __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
+ __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */
+ __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
+ }
+ if (cpu_is_omap34xx()) {
+ __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
+ __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */
+ __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
+ __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
+ __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
+ }
+ return 0;
+ } else
+ return 1; /* assume locked with no PPA or security driver */
+}
+
+/*
+ * The amount of SRAM depends on the core type.
+ * Note that we cannot try to test for SRAM here because writes
+ * to secure SRAM will hang the system. Also the SRAM is not
+ * yet mapped at this point.
+ */
+static void __init omap_detect_sram(void)
+{
+ omap_sram_skip = SRAM_BOOTLOADER_SZ;
+ if (is_sram_locked()) {
+ if (cpu_is_omap34xx()) {
+ omap_sram_start = OMAP3_SRAM_PUB_PA;
+ if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
+ (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
+ omap_sram_size = 0x7000; /* 28K */
+ omap_sram_skip += SZ_16K;
+ } else {
+ omap_sram_size = 0x8000; /* 32K */
+ }
+ } else if (cpu_is_omap44xx()) {
+ omap_sram_start = OMAP4_SRAM_PUB_PA;
+ omap_sram_size = 0xa000; /* 40K */
+ } else if (soc_is_omap54xx()) {
+ omap_sram_start = OMAP5_SRAM_PA;
+ omap_sram_size = SZ_128K; /* 128KB */
+ } else {
+ omap_sram_start = OMAP2_SRAM_PUB_PA;
+ omap_sram_size = 0x800; /* 2K */
+ }
+ } else {
+ if (soc_is_am33xx()) {
+ omap_sram_start = AM33XX_SRAM_PA;
+ omap_sram_size = 0x10000; /* 64K */
+ } else if (cpu_is_omap34xx()) {
+ omap_sram_start = OMAP3_SRAM_PA;
+ omap_sram_size = 0x10000; /* 64K */
+ } else if (cpu_is_omap44xx()) {
+ omap_sram_start = OMAP4_SRAM_PA;
+ omap_sram_size = 0xe000; /* 56K */
+ } else if (soc_is_omap54xx()) {
+ omap_sram_start = OMAP5_SRAM_PA;
+ omap_sram_size = SZ_128K; /* 128KB */
+ } else {
+ omap_sram_start = OMAP2_SRAM_PA;
+ if (cpu_is_omap242x())
+ omap_sram_size = 0xa0000; /* 640K */
+ else if (cpu_is_omap243x())
+ omap_sram_size = 0x10000; /* 64K */
+ }
+ }
+}
+
+/*
+ * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
+ */
+static void __init omap2_map_sram(void)
+{
+ int cached = 1;
+
+#ifdef CONFIG_OMAP4_ERRATA_I688
+ if (cpu_is_omap44xx()) {
+ omap_sram_start += PAGE_SIZE;
+ omap_sram_size -= SZ_16K;
+ }
+#endif
+ if (cpu_is_omap34xx()) {
+ /*
+ * SRAM must be marked as non-cached on OMAP3 since the
+ * CORE DPLL M2 divider change code (in SRAM) runs with the
+ * SDRAM controller disabled, and if it is marked cached,
+ * the ARM may attempt to write cache lines back to SDRAM
+ * which will cause the system to hang.
+ */
+ cached = 0;
+ }
+
+ omap_map_sram(omap_sram_start, omap_sram_size,
+ omap_sram_skip, cached);
+}
+
+static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+ u32 base_cs, u32 force_unlock);
+
+void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+ u32 base_cs, u32 force_unlock)
+{
+ BUG_ON(!_omap2_sram_ddr_init);
+ _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
+ base_cs, force_unlock);
+}
+
+static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
+ u32 mem_type);
+
+void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
+{
+ BUG_ON(!_omap2_sram_reprogram_sdrc);
+ _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
+}
+
+static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
+
+u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
+{
+ BUG_ON(!_omap2_set_prcm);
+ return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
+}
+
+#ifdef CONFIG_SOC_OMAP2420
+static int __init omap242x_sram_init(void)
+{
+ _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init,
+ omap242x_sram_ddr_init_sz);
+
+ _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc,
+ omap242x_sram_reprogram_sdrc_sz);
+
+ _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm,
+ omap242x_sram_set_prcm_sz);
+
+ return 0;
+}
+#else
+static inline int omap242x_sram_init(void)
+{
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_SOC_OMAP2430
+static int __init omap243x_sram_init(void)
+{
+ _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init,
+ omap243x_sram_ddr_init_sz);
+
+ _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc,
+ omap243x_sram_reprogram_sdrc_sz);
+
+ _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm,
+ omap243x_sram_set_prcm_sz);
+
+ return 0;
+}
+#else
+static inline int omap243x_sram_init(void)
+{
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_ARCH_OMAP3
+
+static u32 (*_omap3_sram_configure_core_dpll)(
+ u32 m2, u32 unlock_dll, u32 f, u32 inc,
+ u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
+ u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
+ u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
+ u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
+
+u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
+ u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
+ u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
+ u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
+ u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1)
+{
+ BUG_ON(!_omap3_sram_configure_core_dpll);
+ return _omap3_sram_configure_core_dpll(
+ m2, unlock_dll, f, inc,
+ sdrc_rfr_ctrl_0, sdrc_actim_ctrl_a_0,
+ sdrc_actim_ctrl_b_0, sdrc_mr_0,
+ sdrc_rfr_ctrl_1, sdrc_actim_ctrl_a_1,
+ sdrc_actim_ctrl_b_1, sdrc_mr_1);
+}
+
+void omap3_sram_restore_context(void)
+{
+ omap_sram_reset();
+
+ _omap3_sram_configure_core_dpll =
+ omap_sram_push(omap3_sram_configure_core_dpll,
+ omap3_sram_configure_core_dpll_sz);
+ omap_push_sram_idle();
+}
+
+static inline int omap34xx_sram_init(void)
+{
+ omap3_sram_restore_context();
+ return 0;
+}
+#else
+static inline int omap34xx_sram_init(void)
+{
+ return 0;
+}
+#endif /* CONFIG_ARCH_OMAP3 */
+
+static inline int am33xx_sram_init(void)
+{
+ return 0;
+}
+
+int __init omap_sram_init(void)
+{
+ omap_detect_sram();
+ omap2_map_sram();
+
+ if (cpu_is_omap242x())
+ omap242x_sram_init();
+ else if (cpu_is_omap2430())
+ omap243x_sram_init();
+ else if (soc_is_am33xx())
+ am33xx_sram_init();
+ else if (cpu_is_omap34xx())
+ omap34xx_sram_init();
+
+ return 0;
+}
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 6fd3216..743fc28 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -26,159 +26,14 @@
#include <asm/mach/map.h>
-#include "../mach-omap2/soc.h"
-#include "../mach-omap2/sram.h"
-
-/* XXX These "sideways" includes will disappear when sram.c becomes a driver */
-#include "../mach-omap2/iomap.h"
-#include "../mach-omap2/prm2xxx_3xxx.h"
-#include "../mach-omap2/sdrc.h"
-
-#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
-#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
-#ifdef CONFIG_OMAP4_ERRATA_I688
-#define OMAP4_SRAM_PUB_PA OMAP4_SRAM_PA
-#else
-#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
-#endif
-#define OMAP5_SRAM_PA 0x40300000
-
-#if defined(CONFIG_ARCH_OMAP2PLUS)
-#define SRAM_BOOTLOADER_SZ 0x00
-#else
-#define SRAM_BOOTLOADER_SZ 0x80
-#endif
-
-#define OMAP24XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68005048)
-#define OMAP24XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68005050)
-#define OMAP24XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68005058)
-
-#define OMAP34XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68012848)
-#define OMAP34XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68012850)
-#define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858)
-#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880)
-#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048)
-
-#define GP_DEVICE 0x300
-
#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
-static unsigned long omap_sram_start;
static void __iomem *omap_sram_base;
static unsigned long omap_sram_skip;
static unsigned long omap_sram_size;
static void __iomem *omap_sram_ceil;
/*
- * Depending on the target RAMFS firewall setup, the public usable amount of
- * SRAM varies. The default accessible size for all device types is 2k. A GP
- * device allows ARM11 but not other initiators for full size. This
- * functionality seems ok until some nice security API happens.
- */
-static int is_sram_locked(void)
-{
- if (OMAP2_DEVICE_TYPE_GP == omap_type()) {
- /* RAMFW: R/W access to all initiators for all qualifier sets */
- if (cpu_is_omap242x()) {
- __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
- __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */
- __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
- }
- if (cpu_is_omap34xx()) {
- __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
- __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */
- __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
- __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
- __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
- }
- return 0;
- } else
- return 1; /* assume locked with no PPA or security driver */
-}
-
-/*
- * The amount of SRAM depends on the core type.
- * Note that we cannot try to test for SRAM here because writes
- * to secure SRAM will hang the system. Also the SRAM is not
- * yet mapped at this point.
- */
-static void __init omap_detect_sram(void)
-{
- omap_sram_skip = SRAM_BOOTLOADER_SZ;
- if (cpu_class_is_omap2()) {
- if (is_sram_locked()) {
- if (cpu_is_omap34xx()) {
- omap_sram_start = OMAP3_SRAM_PUB_PA;
- if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
- (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
- omap_sram_size = 0x7000; /* 28K */
- omap_sram_skip += SZ_16K;
- } else {
- omap_sram_size = 0x8000; /* 32K */
- }
- } else if (cpu_is_omap44xx()) {
- omap_sram_start = OMAP4_SRAM_PUB_PA;
- omap_sram_size = 0xa000; /* 40K */
- } else if (soc_is_omap54xx()) {
- omap_sram_start = OMAP5_SRAM_PA;
- omap_sram_size = SZ_128K; /* 128KB */
- } else {
- omap_sram_start = OMAP2_SRAM_PUB_PA;
- omap_sram_size = 0x800; /* 2K */
- }
- } else {
- if (soc_is_am33xx()) {
- omap_sram_start = AM33XX_SRAM_PA;
- omap_sram_size = 0x10000; /* 64K */
- } else if (cpu_is_omap34xx()) {
- omap_sram_start = OMAP3_SRAM_PA;
- omap_sram_size = 0x10000; /* 64K */
- } else if (cpu_is_omap44xx()) {
- omap_sram_start = OMAP4_SRAM_PA;
- omap_sram_size = 0xe000; /* 56K */
- } else if (soc_is_omap54xx()) {
- omap_sram_start = OMAP5_SRAM_PA;
- omap_sram_size = SZ_128K; /* 128KB */
- } else {
- omap_sram_start = OMAP2_SRAM_PA;
- if (cpu_is_omap242x())
- omap_sram_size = 0xa0000; /* 640K */
- else if (cpu_is_omap243x())
- omap_sram_size = 0x10000; /* 64K */
- }
- }
- }
-}
-
-/*
- * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
- */
-static void __init omap_fix_and_map_sram(void)
-{
- int cached = 1;
-
-#ifdef CONFIG_OMAP4_ERRATA_I688
- if (cpu_is_omap44xx()) {
- omap_sram_start += PAGE_SIZE;
- omap_sram_size -= SZ_16K;
- }
-#endif
- if (cpu_is_omap34xx()) {
- /*
- * SRAM must be marked as non-cached on OMAP3 since the
- * CORE DPLL M2 divider change code (in SRAM) runs with the
- * SDRAM controller disabled, and if it is marked cached,
- * the ARM may attempt to write cache lines back to SDRAM
- * which will cause the system to hang.
- */
- cached = 0;
- }
-
- omap_map_sram(omap_sram_start, omap_sram_size,
- omap_sram_skip, cached);
-}
-
-/*
* Memory allocator for SRAM: calculates the new ceiling address
* for pushing a function using the fncpy API.
*
@@ -239,146 +94,3 @@ void __init omap_map_sram(unsigned long start, unsigned long size,
memset_io(omap_sram_base + omap_sram_skip, 0,
omap_sram_size - omap_sram_skip);
}
-
-#if defined(CONFIG_ARCH_OMAP2)
-
-static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
- u32 base_cs, u32 force_unlock);
-
-void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
- u32 base_cs, u32 force_unlock)
-{
- BUG_ON(!_omap2_sram_ddr_init);
- _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
- base_cs, force_unlock);
-}
-
-static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
- u32 mem_type);
-
-void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
-{
- BUG_ON(!_omap2_sram_reprogram_sdrc);
- _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
-}
-
-static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
-
-u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
-{
- BUG_ON(!_omap2_set_prcm);
- return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
-}
-#endif
-
-#ifdef CONFIG_SOC_OMAP2420
-static int __init omap242x_sram_init(void)
-{
- _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init,
- omap242x_sram_ddr_init_sz);
-
- _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc,
- omap242x_sram_reprogram_sdrc_sz);
-
- _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm,
- omap242x_sram_set_prcm_sz);
-
- return 0;
-}
-#else
-static inline int omap242x_sram_init(void)
-{
- return 0;
-}
-#endif
-
-#ifdef CONFIG_SOC_OMAP2430
-static int __init omap243x_sram_init(void)
-{
- _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init,
- omap243x_sram_ddr_init_sz);
-
- _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc,
- omap243x_sram_reprogram_sdrc_sz);
-
- _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm,
- omap243x_sram_set_prcm_sz);
-
- return 0;
-}
-#else
-static inline int omap243x_sram_init(void)
-{
- return 0;
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
-
-static u32 (*_omap3_sram_configure_core_dpll)(
- u32 m2, u32 unlock_dll, u32 f, u32 inc,
- u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
- u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
- u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
- u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
-
-u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
- u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
- u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
- u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
- u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1)
-{
- BUG_ON(!_omap3_sram_configure_core_dpll);
- return _omap3_sram_configure_core_dpll(
- m2, unlock_dll, f, inc,
- sdrc_rfr_ctrl_0, sdrc_actim_ctrl_a_0,
- sdrc_actim_ctrl_b_0, sdrc_mr_0,
- sdrc_rfr_ctrl_1, sdrc_actim_ctrl_a_1,
- sdrc_actim_ctrl_b_1, sdrc_mr_1);
-}
-
-void omap3_sram_restore_context(void)
-{
- omap_sram_reset();
-
- _omap3_sram_configure_core_dpll =
- omap_sram_push(omap3_sram_configure_core_dpll,
- omap3_sram_configure_core_dpll_sz);
- omap_push_sram_idle();
-}
-
-static inline int omap34xx_sram_init(void)
-{
- omap3_sram_restore_context();
- return 0;
-}
-#else
-static inline int omap34xx_sram_init(void)
-{
- return 0;
-}
-#endif /* CONFIG_ARCH_OMAP3 */
-
-static inline int am33xx_sram_init(void)
-{
- return 0;
-}
-
-#ifdef CONFIG_ARCH_OMAP2PLUS
-int __init omap_sram_init(void)
-{
- omap_detect_sram();
- omap_fix_and_map_sram();
-
- if (cpu_is_omap242x())
- omap242x_sram_init();
- else if (cpu_is_omap2430())
- omap243x_sram_init();
- else if (soc_is_am33xx())
- am33xx_sram_init();
- else if (cpu_is_omap34xx())
- omap34xx_sram_init();
-
- return 0;
-}
-#endif
^ permalink raw reply related
* [PATCH 03/11] ARM: OMAP: Move omap1 specific code to local sram.c
From: Tony Lindgren @ 2012-10-30 23:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121030234852.25936.12482.stgit@muffinssi.local>
Let's make the omap1 specific parts private to mach-omap1.
These should not be in the shared code.
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap1/Makefile | 3 +-
arch/arm/mach-omap1/sram-init.c | 76 +++++++++++++++++++++++++++++++++++++++
arch/arm/plat-omap/sram.c | 49 ++-----------------------
3 files changed, 81 insertions(+), 47 deletions(-)
create mode 100644 arch/arm/mach-omap1/sram-init.c
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index cd169c3..f0e69cb 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,7 +3,8 @@
#
# Common support
-obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
+obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \
+ serial.o devices.o dma.o
obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o
ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
diff --git a/arch/arm/mach-omap1/sram-init.c b/arch/arm/mach-omap1/sram-init.c
new file mode 100644
index 0000000..6431b0f
--- /dev/null
+++ b/arch/arm/mach-omap1/sram-init.c
@@ -0,0 +1,76 @@
+/*
+ * OMAP SRAM detection and management
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Written by Tony Lindgren <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/fncpy.h>
+#include <asm/tlb.h>
+#include <asm/cacheflush.h>
+
+#include <asm/mach/map.h>
+
+#include "soc.h"
+#include "sram.h"
+
+#define OMAP1_SRAM_PA 0x20000000
+#define SRAM_BOOTLOADER_SZ 0x80
+
+/*
+ * The amount of SRAM depends on the core type.
+ * Note that we cannot try to test for SRAM here because writes
+ * to secure SRAM will hang the system. Also the SRAM is not
+ * yet mapped at this point.
+ */
+static void __init omap_detect_and_map_sram(void)
+{
+ unsigned long omap_sram_skip = SRAM_BOOTLOADER_SZ;
+ unsigned long omap_sram_start = OMAP1_SRAM_PA;
+ unsigned long omap_sram_size;
+
+ if (cpu_is_omap7xx())
+ omap_sram_size = 0x32000; /* 200K */
+ else if (cpu_is_omap15xx())
+ omap_sram_size = 0x30000; /* 192K */
+ else if (cpu_is_omap1610() || cpu_is_omap1611() ||
+ cpu_is_omap1621() || cpu_is_omap1710())
+ omap_sram_size = 0x4000; /* 16K */
+ else {
+ pr_err("Could not detect SRAM size\n");
+ omap_sram_size = 0x4000;
+ }
+
+ omap_map_sram(omap_sram_start, omap_sram_size,
+ omap_sram_skip, 1);
+}
+
+static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
+
+void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
+{
+ BUG_ON(!_omap_sram_reprogram_clock);
+ /* On 730, bit 13 must always be 1 */
+ if (cpu_is_omap7xx())
+ ckctl |= 0x2000;
+ _omap_sram_reprogram_clock(dpllctl, ckctl);
+}
+
+int __init omap_sram_init(void)
+{
+ omap_detect_and_map_sram();
+ _omap_sram_reprogram_clock =
+ omap_sram_push(omap1_sram_reprogram_clock,
+ omap1_sram_reprogram_clock_sz);
+
+ return 0;
+}
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index aa2644a..6fd3216 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -26,8 +26,6 @@
#include <asm/mach/map.h>
-#include "../mach-omap1/soc.h"
-#include "../mach-omap1/sram.h"
#include "../mach-omap2/soc.h"
#include "../mach-omap2/sram.h"
@@ -36,7 +34,6 @@
#include "../mach-omap2/prm2xxx_3xxx.h"
#include "../mach-omap2/sdrc.h"
-#define OMAP1_SRAM_PA 0x20000000
#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
#ifdef CONFIG_OMAP4_ERRATA_I688
@@ -150,20 +147,6 @@ static void __init omap_detect_sram(void)
omap_sram_size = 0x10000; /* 64K */
}
}
- } else {
- omap_sram_start = OMAP1_SRAM_PA;
-
- if (cpu_is_omap7xx())
- omap_sram_size = 0x32000; /* 200K */
- else if (cpu_is_omap15xx())
- omap_sram_size = 0x30000; /* 192K */
- else if (cpu_is_omap1610() || cpu_is_omap1611() ||
- cpu_is_omap1621() || cpu_is_omap1710())
- omap_sram_size = 0x4000; /* 16K */
- else {
- pr_err("Could not detect SRAM size\n");
- omap_sram_size = 0x4000;
- }
}
}
@@ -257,32 +240,6 @@ void __init omap_map_sram(unsigned long start, unsigned long size,
omap_sram_size - omap_sram_skip);
}
-#ifdef CONFIG_ARCH_OMAP1
-
-static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
-
-void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
-{
- BUG_ON(!_omap_sram_reprogram_clock);
- /* On 730, bit 13 must always be 1 */
- if (cpu_is_omap7xx())
- ckctl |= 0x2000;
- _omap_sram_reprogram_clock(dpllctl, ckctl);
-}
-
-static int __init omap1_sram_init(void)
-{
- _omap_sram_reprogram_clock =
- omap_sram_push(omap1_sram_reprogram_clock,
- omap1_sram_reprogram_clock_sz);
-
- return 0;
-}
-
-#else
-#define omap1_sram_init() do {} while (0)
-#endif
-
#if defined(CONFIG_ARCH_OMAP2)
static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
@@ -407,14 +364,13 @@ static inline int am33xx_sram_init(void)
return 0;
}
+#ifdef CONFIG_ARCH_OMAP2PLUS
int __init omap_sram_init(void)
{
omap_detect_sram();
omap_fix_and_map_sram();
- if (!(cpu_class_is_omap2()))
- omap1_sram_init();
- else if (cpu_is_omap242x())
+ if (cpu_is_omap242x())
omap242x_sram_init();
else if (cpu_is_omap2430())
omap243x_sram_init();
@@ -425,3 +381,4 @@ int __init omap_sram_init(void)
return 0;
}
+#endif
^ permalink raw reply related
* [PATCH 02/11] ARM: OMAP: Introduce common omap_map_sram() and omap_sram_reset()
From: Tony Lindgren @ 2012-10-30 23:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121030234852.25936.12482.stgit@muffinssi.local>
This will allow us to separate out omap1 and omap2+ specific
code in the later patches.
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/plat-omap/include/plat/sram.h | 4 ++
arch/arm/plat-omap/sram.c | 64 +++++++++++++++++++++-----------
2 files changed, 46 insertions(+), 22 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h
index c60025a..ba45250 100644
--- a/arch/arm/plat-omap/include/plat/sram.h
+++ b/arch/arm/plat-omap/include/plat/sram.h
@@ -1,5 +1,9 @@
int omap_sram_init(void);
+void omap_map_sram(unsigned long start, unsigned long size,
+ unsigned long skip, int cached);
+void omap_sram_reset(void);
+
extern void *omap_sram_push_address(unsigned long size);
/* Macro to push a function to the internal SRAM, using the fncpy API */
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 3372929..aa2644a 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -170,13 +170,10 @@ static void __init omap_detect_sram(void)
/*
* Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
*/
-static void __init omap_map_sram(void)
+static void __init omap_fix_and_map_sram(void)
{
int cached = 1;
- if (omap_sram_size == 0)
- return;
-
#ifdef CONFIG_OMAP4_ERRATA_I688
if (cpu_is_omap44xx()) {
omap_sram_start += PAGE_SIZE;
@@ -194,22 +191,8 @@ static void __init omap_map_sram(void)
cached = 0;
}
- omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE);
- omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size,
- cached);
- if (!omap_sram_base) {
- pr_err("SRAM: Could not map\n");
- return;
- }
-
- omap_sram_ceil = omap_sram_base + omap_sram_size;
-
- /*
- * Looks like we need to preserve some bootloader code at the
- * beginning of SRAM for jumping to flash for reboot to work...
- */
- memset_io(omap_sram_base + omap_sram_skip, 0,
- omap_sram_size - omap_sram_skip);
+ omap_map_sram(omap_sram_start, omap_sram_size,
+ omap_sram_skip, cached);
}
/*
@@ -237,6 +220,43 @@ void *omap_sram_push_address(unsigned long size)
return (void *)omap_sram_ceil;
}
+/*
+ * The SRAM context is lost during off-idle and stack
+ * needs to be reset.
+ */
+void omap_sram_reset(void)
+{
+ omap_sram_ceil = omap_sram_base + omap_sram_size;
+}
+
+/*
+ * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
+ */
+void __init omap_map_sram(unsigned long start, unsigned long size,
+ unsigned long skip, int cached)
+{
+ if (size == 0)
+ return;
+
+ start = ROUND_DOWN(start, PAGE_SIZE);
+ omap_sram_size = size;
+ omap_sram_skip = skip;
+ omap_sram_base = __arm_ioremap_exec(start, size, cached);
+ if (!omap_sram_base) {
+ pr_err("SRAM: Could not map\n");
+ return;
+ }
+
+ omap_sram_reset();
+
+ /*
+ * Looks like we need to preserve some bootloader code at the
+ * beginning of SRAM for jumping to flash for reboot to work...
+ */
+ memset_io(omap_sram_base + omap_sram_skip, 0,
+ omap_sram_size - omap_sram_skip);
+}
+
#ifdef CONFIG_ARCH_OMAP1
static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
@@ -362,7 +382,7 @@ u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
void omap3_sram_restore_context(void)
{
- omap_sram_ceil = omap_sram_base + omap_sram_size;
+ omap_sram_reset();
_omap3_sram_configure_core_dpll =
omap_sram_push(omap3_sram_configure_core_dpll,
@@ -390,7 +410,7 @@ static inline int am33xx_sram_init(void)
int __init omap_sram_init(void)
{
omap_detect_sram();
- omap_map_sram();
+ omap_fix_and_map_sram();
if (!(cpu_class_is_omap2()))
omap1_sram_init();
^ permalink raw reply related
* [PATCH 01/11] ARM: OMAP: Split sram.h to local headers and minimal shared header
From: Tony Lindgren @ 2012-10-30 23:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121030234852.25936.12482.stgit@muffinssi.local>
Most of the defines are specific to omap1 and omap2+,
and should be in the local headers. Only minimal function
prototypes need to be shared.
As discussed on linux-arm-kernel, we want to avoid
relative includes for the arch/arm/*omap* shared code:
http://www.spinics.net/lists/linux-omap/msg80520.html
So this patch re-adds a minimal plat/sram.h.
The new plat/sram.h must not be included from drivers,
that will break build for omap2+ CONFIG_MULTIPLATFORM.
Note that this patch temporarily adds two more
relative includes; Those will be removed in the
following patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap1/clock.c | 3 +--
arch/arm/mach-omap1/clock_data.c | 3 +--
arch/arm/mach-omap1/devices.c | 3 +--
arch/arm/mach-omap1/pm.c | 4 ++--
arch/arm/mach-omap1/sram.h | 7 +++++++
arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 3 +--
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 3 +--
arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 3 +--
arch/arm/mach-omap2/io.c | 3 +--
arch/arm/mach-omap2/omap4-common.c | 2 --
arch/arm/mach-omap2/pm24xx.c | 5 +++--
arch/arm/mach-omap2/pm34xx.c | 4 ++--
arch/arm/mach-omap2/sdrc.c | 2 --
arch/arm/mach-omap2/sdrc2xxx.c | 3 +--
arch/arm/mach-omap2/sleep34xx.S | 3 +--
arch/arm/mach-omap2/sram.h | 26 +-------------------------
arch/arm/plat-omap/include/plat/sram.h | 12 ++++++++++++
arch/arm/plat-omap/sram.c | 5 +++--
18 files changed, 39 insertions(+), 55 deletions(-)
create mode 100644 arch/arm/mach-omap1/sram.h
rename arch/arm/{plat-omap/sram.h => mach-omap2/sram.h} (79%)
create mode 100644 arch/arm/plat-omap/include/plat/sram.h
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 931f3f6..4f5fd4a 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -24,12 +24,11 @@
#include <mach/hardware.h>
-#include "../plat-omap/sram.h"
-
#include "soc.h"
#include "iomap.h"
#include "clock.h"
#include "opp.h"
+#include "sram.h"
__u32 arm_idlect1_mask;
struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 28aea55..cb7c6ae 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -27,10 +27,9 @@
#include <mach/hardware.h>
#include <mach/usb.h> /* for OTG_BASE */
-#include "../plat-omap/sram.h"
-
#include "iomap.h"
#include "clock.h"
+#include "sram.h"
/* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */
#define IDL_CLKOUT_ARM_SHIFT 12
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 645668e..7155ed8 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -26,12 +26,11 @@
#include <mach/camera.h>
#include <mach/hardware.h>
-#include "../plat-omap/sram.h"
-
#include "common.h"
#include "clock.h"
#include "dma.h"
#include "mmc.h"
+#include "sram.h"
#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index b2c2328..66d663a 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -44,6 +44,7 @@
#include <linux/io.h>
#include <linux/atomic.h>
+#include <asm/fncpy.h>
#include <asm/system_misc.h>
#include <asm/irq.h>
#include <asm/mach/time.h>
@@ -56,11 +57,10 @@
#include <mach/irqs.h>
-#include "../plat-omap/sram.h"
-
#include "iomap.h"
#include "clock.h"
#include "pm.h"
+#include "sram.h"
static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE];
diff --git a/arch/arm/mach-omap1/sram.h b/arch/arm/mach-omap1/sram.h
new file mode 100644
index 0000000..d5a6c83
--- /dev/null
+++ b/arch/arm/mach-omap1/sram.h
@@ -0,0 +1,7 @@
+#include <plat/sram.h>
+
+extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
+
+/* Do not use these */
+extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
+extern unsigned long omap1_sram_reprogram_clock_sz;
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index 3432f91..0d2f14c 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -25,14 +25,13 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include "../plat-omap/sram.h"
-
#include "clock.h"
#include "clock2xxx.h"
#include "opp2xxx.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-24xx.h"
#include "sdrc.h"
+#include "sram.h"
/* #define DOWN_VARIABLE_DPLL 1 */ /* Experimental */
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index c66276b..a38ebb2 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -33,8 +33,6 @@
#include <linux/cpufreq.h>
#include <linux/slab.h>
-#include "../plat-omap/sram.h"
-
#include "soc.h"
#include "clock.h"
#include "clock2xxx.h"
@@ -42,6 +40,7 @@
#include "cm2xxx_3xxx.h"
#include "cm-regbits-24xx.h"
#include "sdrc.h"
+#include "sram.h"
const struct prcm_config *curr_prcm_set;
const struct prcm_config *rate_table;
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index 5510d92..6cf298e 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -21,12 +21,11 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include "../plat-omap/sram.h"
-
#include "clock.h"
#include "clock3xxx.h"
#include "clock34xx.h"
#include "sdrc.h"
+#include "sram.h"
#define CYCLES_PER_MHZ 1000000
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4fadc78..814f699 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -27,8 +27,6 @@
#include <plat-omap/dma-omap.h>
-#include "../plat-omap/sram.h"
-
#include "omap_hwmod.h"
#include "soc.h"
#include "iomap.h"
@@ -43,6 +41,7 @@
#include "omap-pm.h"
#include "sdrc.h"
#include "serial.h"
+#include "sram.h"
/*
* The machine specific code may provide the extra mapping besides the
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index d25845c..8a7fc04 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -25,8 +25,6 @@
#include <asm/mach/map.h>
#include <asm/memblock.h>
-#include "../plat-omap/sram.h"
-
#include "omap-wakeupgen.h"
#include "soc.h"
#include "common.h"
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 6d17e044..9a2f559 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -31,6 +31,8 @@
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>
+#include <asm/fncpy.h>
+
#include <asm/mach/time.h>
#include <asm/mach/irq.h>
#include <asm/mach-types.h>
@@ -38,8 +40,6 @@
#include <plat-omap/dma-omap.h>
-#include "../plat-omap/sram.h"
-
#include "soc.h"
#include "common.h"
#include "clock.h"
@@ -48,6 +48,7 @@
#include "cm2xxx_3xxx.h"
#include "cm-regbits-24xx.h"
#include "sdrc.h"
+#include "sram.h"
#include "pm.h"
#include "control.h"
#include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 160fa25..4c85762 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -32,6 +32,7 @@
#include <trace/events/power.h>
+#include <asm/fncpy.h>
#include <asm/suspend.h>
#include <asm/system_misc.h>
@@ -40,8 +41,6 @@
#include <plat/prcm.h>
#include <plat-omap/dma-omap.h>
-#include "../plat-omap/sram.h"
-
#include "soc.h"
#include "common.h"
#include "cm2xxx_3xxx.h"
@@ -52,6 +51,7 @@
#include "prm2xxx_3xxx.h"
#include "pm.h"
#include "sdrc.h"
+#include "sram.h"
#include "control.h"
/* pm34xx errata defined in pm.h */
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index 94d4082..c64ee19 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -23,8 +23,6 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include "../plat-omap/sram.h"
-
#include "common.h"
#include "clock.h"
#include "sdrc.h"
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index 3b8bfdf..20cc950 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -24,14 +24,13 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include "../plat-omap/sram.h"
-
#include "soc.h"
#include "iomap.h"
#include "common.h"
#include "prm2xxx_3xxx.h"
#include "clock.h"
#include "sdrc.h"
+#include "sram.h"
/* Memory timing, DLL mode flags */
#define M_DDR 1
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 75afe11..7046c3c 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -26,13 +26,12 @@
#include <asm/assembler.h>
-#include "../plat-omap/sram.h"
-
#include "omap34xx.h"
#include "iomap.h"
#include "cm2xxx_3xxx.h"
#include "prm2xxx_3xxx.h"
#include "sdrc.h"
+#include "sram.h"
#include "control.h"
/*
diff --git a/arch/arm/plat-omap/sram.h b/arch/arm/mach-omap2/sram.h
similarity index 79%
rename from arch/arm/plat-omap/sram.h
rename to arch/arm/mach-omap2/sram.h
index cefda2e..ca7277c 100644
--- a/arch/arm/plat-omap/sram.h
+++ b/arch/arm/mach-omap2/sram.h
@@ -1,6 +1,4 @@
/*
- * arch/arm/plat-omap/include/mach/sram.h
- *
* Interface for functions that need to be run in internal SRAM
*
* This program is free software; you can redistribute it and/or modify
@@ -8,26 +6,8 @@
* published by the Free Software Foundation.
*/
-#ifndef __ARCH_ARM_OMAP_SRAM_H
-#define __ARCH_ARM_OMAP_SRAM_H
-
#ifndef __ASSEMBLY__
-#include <asm/fncpy.h>
-
-int __init omap_sram_init(void);
-
-extern void *omap_sram_push_address(unsigned long size);
-
-/* Macro to push a function to the internal SRAM, using the fncpy API */
-#define omap_sram_push(funcp, size) ({ \
- typeof(&(funcp)) _res = NULL; \
- void *_sram_address = omap_sram_push_address(size); \
- if (_sram_address) \
- _res = fncpy(_sram_address, &(funcp), size); \
- _res; \
-})
-
-extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
+#include <plat/sram.h>
extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
u32 base_cs, u32 force_unlock);
@@ -44,9 +24,6 @@ extern u32 omap3_configure_core_dpll(
extern void omap3_sram_restore_context(void);
/* Do not use these */
-extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
-extern unsigned long omap1_sram_reprogram_clock_sz;
-
extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
extern unsigned long omap24xx_sram_reprogram_clock_sz;
@@ -104,4 +81,3 @@ static inline void omap_push_sram_idle(void) {}
#define OMAP4_SRAM_PA 0x40300000
#endif
#define AM33XX_SRAM_PA 0x40300000
-#endif
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h
new file mode 100644
index 0000000..c60025a
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/sram.h
@@ -0,0 +1,12 @@
+int omap_sram_init(void);
+
+extern void *omap_sram_push_address(unsigned long size);
+
+/* Macro to push a function to the internal SRAM, using the fncpy API */
+#define omap_sram_push(funcp, size) ({ \
+ typeof(&(funcp)) _res = NULL; \
+ void *_sram_address = omap_sram_push_address(size); \
+ if (_sram_address) \
+ _res = fncpy(_sram_address, &(funcp), size); \
+ _res; \
+})
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 70dcc22..3372929 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -20,15 +20,16 @@
#include <linux/init.h>
#include <linux/io.h>
+#include <asm/fncpy.h>
#include <asm/tlb.h>
#include <asm/cacheflush.h>
#include <asm/mach/map.h>
#include "../mach-omap1/soc.h"
+#include "../mach-omap1/sram.h"
#include "../mach-omap2/soc.h"
-
-#include "sram.h"
+#include "../mach-omap2/sram.h"
/* XXX These "sideways" includes will disappear when sram.c becomes a driver */
#include "../mach-omap2/iomap.h"
^ permalink raw reply related
* [PATCH 00/11] Fix relative includes for omaps introduced by recent clean-up
From: Tony Lindgren @ 2012-10-30 23:52 UTC (permalink / raw)
To: linux-arm-kernel
Hi all,
As discussed on this list, here are fixes to get rid of
the relative includes for omap that got introduced with
the recent clean-up.
This is based on what I have queued up in the
omap-for-v3.8/cleanup-headers branch at commit 986bfa5c.
Note that this series introduces few new plat/*.h files.
However, those files will not be used by the drivers:
sram.h
i2c.h
counter-32k.h
debug-devices.h
We still want to remove the remaining problem plat
headers as they are wrongly shared between drivers
and core omap code:
iommu2.h
iommu.h
iopgtable.h
iovmm.h
mailbox.h
omap-serial.h
prcm.h
vram.h
These headers will not work for omap2+ drivers when
we have CONFIG_MULTIPLATFORM set.
Regards,
Tony
---
Tony Lindgren (11):
ARM: OMAP: Split sram.h to local headers and minimal shared header
ARM: OMAP: Introduce common omap_map_sram() and omap_sram_reset()
ARM: OMAP: Move omap1 specific code to local sram.c
ARM: OMAP: Move omap2+ specific parts of sram.c to mach-omap2
ARM: OMAP: Make plat-omap/i2c.c port checks local
ARM: OMAP: Fix relative includes for shared i2c.h file
ARM: OMAP: Move omap-pm-noop.c local to mach-omap2
ARM: OMAP: Remove plat-omap/common.h
ARM: OMAP: Fix relative includes for debug-devices.h
ARM: OMAP: Remove cpu_is_omap usage from plat-omap/dma.c
ARM: OMAP1: Remove relative includes
arch/arm/mach-omap1/Makefile | 3
arch/arm/mach-omap1/clock.c | 3
arch/arm/mach-omap1/clock_data.c | 3
arch/arm/mach-omap1/common.h | 3
arch/arm/mach-omap1/devices.c | 3
arch/arm/mach-omap1/dma.c | 3
arch/arm/mach-omap1/i2c.c | 5
arch/arm/mach-omap1/include/mach/entry-macro.S | 2
arch/arm/mach-omap1/include/mach/hardware.h | 5
arch/arm/mach-omap1/include/mach/memory.h | 2
arch/arm/mach-omap1/include/mach/soc.h | 229 +++++++++++++
arch/arm/mach-omap1/iomap.h | 3
arch/arm/mach-omap1/pm.c | 4
arch/arm/mach-omap1/sleep.S | 2
arch/arm/mach-omap1/soc.h | 229 -------------
arch/arm/mach-omap1/sram-init.c | 76 ++++
arch/arm/mach-omap1/sram.h | 7
arch/arm/mach-omap1/timer32k.c | 1
arch/arm/mach-omap2/Makefile | 3
arch/arm/mach-omap2/board-h4.c | 2
arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 3
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 3
arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 3
arch/arm/mach-omap2/cm33xx.c | 2
arch/arm/mach-omap2/common.h | 5
arch/arm/mach-omap2/dma.c | 3
arch/arm/mach-omap2/i2c.c | 16 +
arch/arm/mach-omap2/i2c.h | 2
arch/arm/mach-omap2/io.c | 3
arch/arm/mach-omap2/omap-pm-noop.c | 4
arch/arm/mach-omap2/omap4-common.c | 2
.../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | 2
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2
arch/arm/mach-omap2/pm24xx.c | 5
arch/arm/mach-omap2/pm34xx.c | 4
arch/arm/mach-omap2/prm33xx.c | 2
arch/arm/mach-omap2/prm_common.c | 1
arch/arm/mach-omap2/sdrc.c | 2
arch/arm/mach-omap2/sdrc2xxx.c | 3
arch/arm/mach-omap2/sleep34xx.S | 3
arch/arm/mach-omap2/sram.c | 305 +++++++++++++++++
arch/arm/mach-omap2/sram.h | 26 -
arch/arm/mach-omap2/timer.c | 3
arch/arm/plat-omap/Makefile | 1
arch/arm/plat-omap/common.c | 1
arch/arm/plat-omap/common.h | 36 --
arch/arm/plat-omap/counter_32k.c | 2
arch/arm/plat-omap/debug-devices.c | 2
arch/arm/plat-omap/dma.c | 108 +++---
arch/arm/plat-omap/dmtimer.c | 17 +
arch/arm/plat-omap/i2c.c | 30 --
arch/arm/plat-omap/include/plat-omap/dma-omap.h | 19 +
arch/arm/plat-omap/include/plat/counter-32k.h | 1
arch/arm/plat-omap/include/plat/debug-devices.h | 7
arch/arm/plat-omap/include/plat/dmtimer.h | 2
arch/arm/plat-omap/include/plat/i2c.h | 0
arch/arm/plat-omap/include/plat/sram.h | 16 +
arch/arm/plat-omap/sram.c | 366 ++------------------
drivers/dma/omap-dma.c | 6
59 files changed, 815 insertions(+), 791 deletions(-)
create mode 100644 arch/arm/mach-omap1/include/mach/soc.h
create mode 100644 arch/arm/mach-omap1/sram-init.c
create mode 100644 arch/arm/mach-omap1/sram.h
rename arch/arm/{plat-omap/omap-pm-noop.c => mach-omap2/omap-pm-noop.c} (99%)
create mode 100644 arch/arm/mach-omap2/sram.c
rename arch/arm/{plat-omap/sram.h => mach-omap2/sram.h} (79%)
delete mode 100644 arch/arm/plat-omap/common.h
create mode 100644 arch/arm/plat-omap/include/plat/counter-32k.h
rename arch/arm/{mach-omap2/debug-devices.h => plat-omap/include/plat/debug-devices.h} (54%)
rename arch/arm/plat-omap/{i2c.h => include/plat/i2c.h} (100%)
create mode 100644 arch/arm/plat-omap/include/plat/sram.h
--
Signature
^ permalink raw reply
* [PATCH] mvebu-gpio: Disable blinking when enabling a GPIO for output
From: Linus Walleij @ 2012-10-30 23:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351427004-32110-1-git-send-email-jm@lentin.co.uk>
On Sun, Oct 28, 2012 at 1:23 PM, Jamie Lentin <jm@lentin.co.uk> wrote:
> The plat-orion GPIO driver would disable any pin blinking whenever
> using a pin for output. Do the same here, as a blinking LED will
> continue to blink regardless of what the GPIO pin level is.
>
> Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
OK applied to my fixes branch with Thomas' ACK.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v2 1/5] clk: samsung: add common clock framework support for Samsung platforms
From: Tomasz Figa @ 2012-10-30 23:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50905E60.6090005@gmail.com>
Hi Thomas, Sylwester,
On Wednesday 31 of October 2012 00:10:24 Sylwester Nawrocki wrote:
> >>> +/* register a samsung pll type clock */
> >>> +void __init samsung_clk_register_pll(const char *name, const char
> >>> **pnames, + struct device_node *np,
> >>> + int (*set_rate)(unsigned long rate),
> >>> + unsigned long (*get_rate)(unsigned long
> >>> rate)) +{
> >>> + struct samsung_pll_clock *clk_pll;
> >>> + struct clk *clk;
> >>> + struct clk_init_data init;
> >>> + int ret;
> >>> +
> >>> + clk_pll = kzalloc(sizeof(*clk_pll), GFP_KERNEL);
> >>> + if (!clk_pll) {
> >>> + pr_err("%s: could not allocate pll clk %s\n", __func__,
> >>> name); + return;
> >>> + }
> >>> +
> >>> + init.name = name;
> >>> + init.ops =&samsung_pll_clock_ops;
> >>> + init.flags = CLK_GET_RATE_NOCACHE;
> >>> + init.parent_names = pnames;
> >>> + init.num_parents = 1;
> >>> +
> >>> + clk_pll->set_rate = set_rate;
> >>> + clk_pll->get_rate = get_rate;
> >>> + clk_pll->hw.init =&init;
> >>> +
> >>> + /* register the clock */
> >>> + clk = clk_register(NULL,&clk_pll->hw);
> >>> + if (IS_ERR(clk)) {
> >>> + pr_err("%s: failed to register pll clock %s\n",
> >>> __func__,
> >>> + name);
> >>> + kfree(clk_pll);
> >>> + return;
> >>> + }
> >>> +
> >>> +#ifdef CONFIG_OF
> >>> + if (np)
> >>> + of_clk_add_provider(np, of_clk_src_simple_get, clk);
> >>> +#endif
> >>
> >> Is it really required to do clk_register() and of_clk_add_provider()
> >> for
> >> each single clock ? This seems more heavy than it could be. Looking at
> >
> > of_clk_add_provider call for every clock instance is not really
> > required but it does allow platform code to lookup the clock and
> > retrieve/display the clock speed. That was the intention to add a
> > lookup for all the clocks.
I'm not really sure if displaying clock speed is really a good
justification for increasing the list of system clocks almost by a factor
of three. This will make clock lookup a bit heavy.
You might display speed of several most important clocks directly from the
samsung clk driver using internal data, without the need of involving
generic clock lookup for this purpose.
>
> Hmm, do you mean calling clk_get() with NULL 'dev' argument ?
> It's probably not a big deal to look up the clocks root node and
> then use of_clk_get() function to find required clock ?
I believe that the intention was for it to work on non-DT platforms as
well. However I might have misunderstood your suggestion, could you
elaborate?
> >> drivers/clk/mxs/clk-imx28.c, it registers only single clock provider
> >> for
> >> whole group of clocks. Also, couldn't we statically define most of the
> >> clocks and still register them so they can be used with platforms
> >> using
> >> FDT ? Something along the lines of imx28 implementation
> >> (arch/arm/boot/dts /imx28.dtsi), where a clock is specified at
> >> consumer device node by a phandle to the clock controller node and a
> >> clock index ?
> >
> > We could do it that way. I was tempted to list out all the clocks in
> > device tree and then register them so that there is no static
> > definition of the clocks needed. You seem to prefer not to do that. I
> > am fine with either way, static or device tree based registration.
>
> Ok, it's also worth noting that clk_get() would have been more expensive
> when there would be a need to iterate over large number of clock
> providers. Indexed look up might be a better alternative.
I'm definitely for indexed lookup. With the ability to define constants in
device tree sources the main drawback of this solution being less readable
now disappeared and everything left are advantages.
> Exynos SoCs have fairly complex clock tree structure, I personally do
> find it harder to understand from a bit bulky description in form of a
> device tree node list. Comparing to the original Samsung clock API there
> is now more clock objects, since, e.g. single struct clk_clksrc is now
> represented by mux, div and gate clock group, which makes things
> slightly more complicated, i.e. there is even more clocks to be listed.
If it's about readability I tend to disagree. I find device tree much more
readable as a way of describing hardware than hardcoded data structures,
often using complex macros to keep the definitions short.
> >> Besides that, what bothers me with in the current approach is the
> >> clock consumers being defined through one big data structure together
> >> with the actual clocks. Not all clock objects are going to have
> >> consumers, some resources are waisted by using flat tables of those
> >> big data structure objects. Perhaps we could use two tables, one for
> >> the
> >> platform clocks and one for the consumers ? These common clock driver
> >> is intended to cover all Samsung SoC, I would expect all samsung
> >> sub-archs getting converted to use it eventually, with as many of them
> >> as possible then reworked to support device tree. It's a lot of work
> >> and is going to take some time, but it would be good to have it
> >> planned
> >> in advance. That said I'm not sure the common samsung clock driver in
> >> non-dt variant would be really a temporary thing.
> >
> > Non-dt support in Samsung common clock driver will be maintained. But
> > for existing Exynos4 non-dt platforms, it should be possible to
> > convert them to completely device tree based platforms.
>
> OK, let's then focus on device tree support for exynos4+ SoCs. I hope we
> could have the clocks statically defined and still freely accessible in
> the device tree.
Using the approach with indexed clocks inside a single provider would allow
to reuse the same internal SoC-specific data for both DT and non-DT
variants, without any data duplication. This is definitely an advantage.
> >>> +
> >>> +#ifdef CONFIG_OF
> >>> +/* register a samsung gate type clock instantiated from device tree
> >>> */
> >>> +void __init samsung_of_clk_register_gate(struct device_node *np)
> >>> +{
> >>> + struct samsung_gate_clock clk_gate;
> >>> + const char *clk_name = np->name;
> >>> + const char *parent_name;
> >>> + u32 reg_info[2];
> >>> +
> >>> + of_property_read_string(np, "clock-output-names",&clk_name);
> >>> + parent_name = of_clk_get_parent_name(np, 0);
> >>> + if (of_property_read_u32_array(np, "reg-info", reg_info, 2))
> >>> + pr_err("%s: invalid register info in node\n",
> >>> __func__);
> >>> +
> >>> + clk_gate.name = clk_name;
> >>> + clk_gate.parent_name = parent_name;
> >>> + clk_gate.reg = (void __iomem *)(reg_base + reg_info[0]);
> >>> + clk_gate.bit_idx = reg_info[1];
> >>> + clk_gate.dev_name = NULL;
> >>> + clk_gate.flags = 0;
> >>> + clk_gate.gate_flags = 0;
> >>
> >> Some clocks need CLK_SET_RATE_PARENT for the drivers to work
> >> as before. So far it is not set for any mux, div nor gate clock.
> >
> > Ok. I will fix this.
> >
> > So about the static vs device tree based clock registration, what
> > would you suggest?
>
> Defining the clocks statically has my preference, it would be nice to
> hear more opinions on that though. I think on a heavily utilised SoC
> the list of clock nodes could have grown significantly. And with
> preprocessor support at the dt compiler (not sure if it is already
> there) indexed clock definitions could be made more explicit.
>
> These are roughly our conclusions from discussing this patch series
> with Tomasz F.
Yes, as I said, I'm definitely for the single clock provider approach (aka
imx-like approach).
Best regards,
Tomasz Figa
^ permalink raw reply
* [PATCH v2 1/5] clk: samsung: add common clock framework support for Samsung platforms
From: Sylwester Nawrocki @ 2012-10-30 23:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJuYYwQuTcu_qRyLs8JXhUg=T36iuW_bKryxSVpBXm6iMbsH4w@mail.gmail.com>
Hi Thomas,
On 10/29/2012 11:09 AM, Thomas Abraham wrote:
> Hi Sylwester,
>
> Thanks for your comments. As usual, your comments are very helpful.
Thanks.
> On 22 October 2012 21:25, Sylwester Nawrocki<s.nawrocki@samsung.com> wrote:
>> Hi Thomas,
>>
>> On 10/07/2012 07:10 PM, Thomas Abraham wrote:
>>> All Samsung platforms include several types of clocks including fixed-rate,
>>> mux, divider and gate clock types. There are typically hundreds of such clocks
>>> on each of the Samsung platforms. To enable Samsung platforms to register these
>>> clocks using the common clock framework, a bunch of utility functions are
>>> introduced here which simplify the clock registration process.
>>>
>>> In addition to the basic types of clock supported by common clock framework,
>>> a Samsung specific representation of the PLL clocks is also introduced.
>>>
>>> Both legacy and device tree based Samsung platforms are supported. On legacy
>>> platforms, the clocks are statically instantiated and registered with common
>>> clock framework. On device tree enabled platforms, the device tree is
>>> searched and all clock nodes found are registered. It is also possible to
>>> register statically instantiated clocks on device tree enabled platforms.
>>>
>>> Cc: Mike Turquette<mturquette@ti.com>
>>> Cc: Kukjin Kim<kgene.kim@samsung.com>
>>> Signed-off-by: Thomas Abraham<thomas.abraham@linaro.org>
>>
>> Thanks for the patch. I'm trying to use this series on an Exynos4412
>> SoC based board. I think it wasn't tested with Exynos4x12 (with FDT
>> support), was it ?
>
> No, it has not been tested on any Exynos4x12 based board. I have
> tested it only for Exynos4210 based origen board.
OK, thanks. I've had some issues with the root clocks on Exynos4412
and I put this on a back burner for a while. I plan to get back to
this, possibly after ELCE/LinuxCon.
>>> ---
>>> drivers/clk/Makefile | 1 +
>>> drivers/clk/samsung/Makefile | 5 +
>>> drivers/clk/samsung/clk.c | 414 ++++++++++++++++++++++++++++++++++++++++++
>>> drivers/clk/samsung/clk.h | 212 +++++++++++++++++++++
>>> 4 files changed, 632 insertions(+), 0 deletions(-)
>>> create mode 100644 drivers/clk/samsung/Makefile
>>> create mode 100644 drivers/clk/samsung/clk.c
>>> create mode 100644 drivers/clk/samsung/clk.h
...
>>> +/* register a samsung pll type clock */
>>> +void __init samsung_clk_register_pll(const char *name, const char **pnames,
>>> + struct device_node *np,
>>> + int (*set_rate)(unsigned long rate),
>>> + unsigned long (*get_rate)(unsigned long rate))
>>> +{
>>> + struct samsung_pll_clock *clk_pll;
>>> + struct clk *clk;
>>> + struct clk_init_data init;
>>> + int ret;
>>> +
>>> + clk_pll = kzalloc(sizeof(*clk_pll), GFP_KERNEL);
>>> + if (!clk_pll) {
>>> + pr_err("%s: could not allocate pll clk %s\n", __func__, name);
>>> + return;
>>> + }
>>> +
>>> + init.name = name;
>>> + init.ops =&samsung_pll_clock_ops;
>>> + init.flags = CLK_GET_RATE_NOCACHE;
>>> + init.parent_names = pnames;
>>> + init.num_parents = 1;
>>> +
>>> + clk_pll->set_rate = set_rate;
>>> + clk_pll->get_rate = get_rate;
>>> + clk_pll->hw.init =&init;
>>> +
>>> + /* register the clock */
>>> + clk = clk_register(NULL,&clk_pll->hw);
>>> + if (IS_ERR(clk)) {
>>> + pr_err("%s: failed to register pll clock %s\n", __func__,
>>> + name);
>>> + kfree(clk_pll);
>>> + return;
>>> + }
>>> +
>>> +#ifdef CONFIG_OF
>>> + if (np)
>>> + of_clk_add_provider(np, of_clk_src_simple_get, clk);
>>> +#endif
>>
>> Is it really required to do clk_register() and of_clk_add_provider() for
>> each single clock ? This seems more heavy than it could be. Looking at
>
> of_clk_add_provider call for every clock instance is not really
> required but it does allow platform code to lookup the clock and
> retrieve/display the clock speed. That was the intention to add a
> lookup for all the clocks.
Hmm, do you mean calling clk_get() with NULL 'dev' argument ?
It's probably not a big deal to look up the clocks root node and
then use of_clk_get() function to find required clock ?
>> drivers/clk/mxs/clk-imx28.c, it registers only single clock provider for
>> whole group of clocks. Also, couldn't we statically define most of the
>> clocks and still register them so they can be used with platforms using
>> FDT ? Something along the lines of imx28 implementation (arch/arm/boot/dts
>> /imx28.dtsi), where a clock is specified at consumer device node by
>> a phandle to the clock controller node and a clock index ?
>
> We could do it that way. I was tempted to list out all the clocks in
> device tree and then register them so that there is no static
> definition of the clocks needed. You seem to prefer not to do that. I
> am fine with either way, static or device tree based registration.
Ok, it's also worth noting that clk_get() would have been more expensive
when there would be a need to iterate over large number of clock providers.
Indexed look up might be a better alternative.
Exynos SoCs have fairly complex clock tree structure, I personally do find
it harder to understand from a bit bulky description in form of a device
tree node list. Comparing to the original Samsung clock API there is now
more clock objects, since, e.g. single struct clk_clksrc is now represented
by mux, div and gate clock group, which makes things slightly more
complicated, i.e. there is even more clocks to be listed.
>> Besides that, what bothers me with in the current approach is the
>> clock consumers being defined through one big data structure together
>> with the actual clocks. Not all clock objects are going to have
>> consumers, some resources are waisted by using flat tables of those
>> big data structure objects. Perhaps we could use two tables, one for the
>> platform clocks and one for the consumers ? These common clock driver
>> is intended to cover all Samsung SoC, I would expect all samsung
>> sub-archs getting converted to use it eventually, with as many of them
>> as possible then reworked to support device tree. It's a lot of work
>> and is going to take some time, but it would be good to have it planned
>> in advance. That said I'm not sure the common samsung clock driver in
>> non-dt variant would be really a temporary thing.
>
> Non-dt support in Samsung common clock driver will be maintained. But
> for existing Exynos4 non-dt platforms, it should be possible to
> convert them to completely device tree based platforms.
OK, let's then focus on device tree support for exynos4+ SoCs. I hope we
could have the clocks statically defined and still freely accessible in
the device tree.
>>> + /*
>>> + * Register a clock lookup for the pll-type clock even if this
>>> + * has been instantiated from device tree. This helps to do
>>> + * clk_get() lookup on this clock for pruposes of displaying its
>>> + * clock speed at boot time.
>>> + */
>>> + ret = clk_register_clkdev(clk, name, NULL);
>>> + if (ret)
>>> + pr_err("%s: failed to register clock lookup for %s", __func__,
>>> + name);
>>> +}
...
>>> +
>>> +#ifdef CONFIG_OF
>>> +/* register a samsung gate type clock instantiated from device tree */
>>> +void __init samsung_of_clk_register_gate(struct device_node *np)
>>> +{
>>> + struct samsung_gate_clock clk_gate;
>>> + const char *clk_name = np->name;
>>> + const char *parent_name;
>>> + u32 reg_info[2];
>>> +
>>> + of_property_read_string(np, "clock-output-names",&clk_name);
>>> + parent_name = of_clk_get_parent_name(np, 0);
>>> + if (of_property_read_u32_array(np, "reg-info", reg_info, 2))
>>> + pr_err("%s: invalid register info in node\n", __func__);
>>> +
>>> + clk_gate.name = clk_name;
>>> + clk_gate.parent_name = parent_name;
>>> + clk_gate.reg = (void __iomem *)(reg_base + reg_info[0]);
>>> + clk_gate.bit_idx = reg_info[1];
>>> + clk_gate.dev_name = NULL;
>>> + clk_gate.flags = 0;
>>> + clk_gate.gate_flags = 0;
>>
>> Some clocks need CLK_SET_RATE_PARENT for the drivers to work
>> as before. So far it is not set for any mux, div nor gate clock.
>
> Ok. I will fix this.
>
> So about the static vs device tree based clock registration, what
> would you suggest?
Defining the clocks statically has my preference, it would be nice to
hear more opinions on that though. I think on a heavily utilised SoC
the list of clock nodes could have grown significantly. And with
preprocessor support at the dt compiler (not sure if it is already
there) indexed clock definitions could be made more explicit.
These are roughly our conclusions from discussing this patch series
with Tomasz F.
--
Thanks,
Sylwester
^ permalink raw reply
* [PATCH] ARM: shmobile: leave CONFIG_INOTIFY_USER enabled by default
From: Guennadi Liakhovetski @ 2012-10-30 23:03 UTC (permalink / raw)
To: linux-arm-kernel
CONFIG_INOTIFY_USER is enabled by default in its Kconfig. Disabling it
breaks udevd. Fix shmobile defconfig files to not specify this option
explicitly.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
Thanks to Randy for the hint :-)
diff --git a/arch/arm/configs/ap4evb_defconfig b/arch/arm/configs/ap4evb_defconfig
index 2eef85e..66894f7 100644
--- a/arch/arm/configs/ap4evb_defconfig
+++ b/arch/arm/configs/ap4evb_defconfig
@@ -46,7 +46,6 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_DNOTIFY is not set
-# CONFIG_INOTIFY_USER is not set
CONFIG_TMPFS=y
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_MAGIC_SYSRQ=y
diff --git a/arch/arm/configs/kota2_defconfig b/arch/arm/configs/kota2_defconfig
index b7735d6..fa83db1 100644
--- a/arch/arm/configs/kota2_defconfig
+++ b/arch/arm/configs/kota2_defconfig
@@ -112,7 +112,6 @@ CONFIG_LEDS_GPIO=y
CONFIG_LEDS_RENESAS_TPU=y
CONFIG_LEDS_TRIGGERS=y
# CONFIG_DNOTIFY is not set
-# CONFIG_INOTIFY_USER is not set
CONFIG_TMPFS=y
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_MAGIC_SYSRQ=y
diff --git a/arch/arm/configs/kzm9g_defconfig b/arch/arm/configs/kzm9g_defconfig
index ce99e3e..afbae28 100644
--- a/arch/arm/configs/kzm9g_defconfig
+++ b/arch/arm/configs/kzm9g_defconfig
@@ -124,7 +124,6 @@ CONFIG_STAGING=y
CONFIG_SENSORS_AK8975=y
CONFIG_IIO=y
# CONFIG_DNOTIFY is not set
-CONFIG_INOTIFY_USER=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
# CONFIG_MISC_FILESYSTEMS is not set
diff --git a/arch/arm/configs/mackerel_defconfig b/arch/arm/configs/mackerel_defconfig
index 7b79a0b..2098ce1 100644
--- a/arch/arm/configs/mackerel_defconfig
+++ b/arch/arm/configs/mackerel_defconfig
@@ -105,7 +105,6 @@ CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
# CONFIG_DNOTIFY is not set
-# CONFIG_INOTIFY_USER is not set
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
^ permalink raw reply related
* [PATCHv2] Input: omap4-keypad: Add pinctrl support
From: Rafael J. Wysocki @ 2012-10-30 22:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdac=ztY0vXQ8Mu6H8fiAO4aFSSF-A6O1Q==zKOKEsJegw@mail.gmail.com>
On Tuesday, October 30, 2012 10:51:11 PM Linus Walleij wrote:
> On Tue, Oct 30, 2012 at 7:37 PM, Mark Brown
> <broonie@opensource.wolfsonmicro.com> wrote:
>
> > More seriously the amount of time we seem to have been spending recently
> > on changes which end up requiring us to go through essentially every
> > driver and add code to them (often several times) doesn't seem like
> > we're doing a good job here.
>
> If this is your main concern you should be made aware that there
> are people out there planning to supplant the existing DT probe paths
> that are now being added to each and every ARM-related driver
> with an ACPI probe path as ARM servers come into the picture.
That's correct.
> > pinctrl is really noticable because it's
> > new but it's not the only thing. As a subsystem maintainer this code
> > just makes me want to add new subsystem features to pull the code out of
> > drivers but obviously that's not something that should be being done at
> > the subsystem level.
>
> We did manage to drag the power/voltage domain per se out
> of the AMBA bus, and recommend that people (like us) do that
> business using the power domains.
>
> I think most people (including OMAP) have bought
> into the concept of using the runtime PM framework and power
> domains to control the power domain switches.
>
> It's this wider concept of using the loose concept "PM resource
> domains" to control also clocks and pins that is at stake, and so
> far the runtime PM core people (Rafael and Magnus) has not said
> much so I think we need some kind of indication from them as to
> what is to happen, long-term, with drivers handling their own clocks
> and pins. Should it be centralized or not? If it's to be centralized it
> needs to become a large piece of infrastructure refactoring and
> needs the attention of Linaro and the like to happen.
Well, I personally think it should be centralized somehow. I'm not quite
sure how to achieve that, though.
Thanks,
Rafael
--
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.
^ permalink raw reply
* [PATCH 1/3] irqchip: Move ARM GIC to drivers/irqchip
From: Russell King - ARM Linux @ 2012-10-30 22:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50900C90.7070101@gmail.com>
On Tue, Oct 30, 2012 at 12:21:20PM -0500, Rob Herring wrote:
> Looking at this some more, arm64 doesn't need most of what's in gic.h.
> The register defines should be moved into the .c file. The remaining
> function declarations either are not needed (i.e. gic_init) or should
> should be done like the handle_irq function pointer init. We don't want
> to have platform code calling gic_cascade_irq or gic_raise_softirq
> directly.
Softirqs are about the SPIs which are used for SMP IPIs and platform
specific wakeup of CPUs. And platform code _needs_ to specify the
way IPIs are delivered on the platform. irqchip can't do that because
irqchip knows nothing about SPIs (neither does genirq.)
The thing about gic_cascade_irq() is that it's to do with handling the
(rare) case of having a system with two GICs cascaded together. There's
only one set of platforms I know of which has that kind of madness and
it's the ARM development platforms, where the baseboard has a GIC, and
the SMP tile has its own GIC as part of the SMP implementation.
Apart from that, gic_cascade_irq() should not be used - it should
probably be ifdef'd out when not on one of the ARM dev platforms which
suffer this weirdness.
^ permalink raw reply
* [PATCH V3 0/7] ARM: tegra30: cpuidle: add a powered-down state
From: Stephen Warren @ 2012-10-30 22:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351506501-600-1-git-send-email-josephl@nvidia.com>
On 10/29/2012 04:28 AM, Joseph Lo wrote:
> This adds a "powered-down" state for cpuidle. It's a power gating idle
> mode. It supports the secondary CPUs (i.e., CPU1-CPU3) to go into
> powered-down state independently. When any of the secondary CPUs go into
> this state, it can be power gated alone. There is a limitation on CPU0.
> The CPU0 can go into powered-down state only when all secondary CPU is
> offline. After CPU0 is in powered-down state, the CPU rail can be turned
> off.
This series doesn't seem to apply to Tegra's current for-next, nor
next-20121029. What is it based on?
Note: I did try merging "ARM: tegra: rename the file of "sleep-tXX" to
"sleep-tegraXX"" first, since I assume that's a dependency.
^ permalink raw reply
* [PATCH] ARM: zynq: move ttc timer code to drivers/clocksource
From: Arnd Bergmann @ 2012-10-30 22:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <508FBBA5.2080707@monstr.eu>
On Tuesday 30 October 2012, Michal Simek wrote:
> On 10/29/2012 07:56 PM, Josh Cartwright wrote:
> > Suggested cleanup by Arnd Bergmann. Move the ttc timer.c code to
> > drivers/clocksource, and out of the mach-zynq directory.
> >
> > The common.h (which only held the timer declaration) was renamed to
> > xilinx_ttc.h and moved into include/linux.
> >
> > Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
> > Cc: Arnd Bergmann <arnd@arndb.de>
> > ---
> > arch/arm/mach-zynq/Makefile | 2 +-
> > arch/arm/mach-zynq/common.c | 2 +-
> > arch/arm/mach-zynq/common.h | 24 ----
> > arch/arm/mach-zynq/timer.c | 298 ---------------------------------------
> > drivers/clocksource/Makefile | 1 +
> > drivers/clocksource/xilinx_ttc.c | 297 ++++++++++++++++++++++++++++++++++++++
> > include/linux/xilinx_ttc.h | 24 ++++
> > 7 files changed, 324 insertions(+), 324 deletions(-)
When you submit a patch that moves files around, please use the '-M' flag to
git-format-patch so we can see the actual changes instead of a file being
removed and another one added.
> > delete mode 100644 arch/arm/mach-zynq/common.h
> > delete mode 100644 arch/arm/mach-zynq/timer.c
> > create mode 100644 drivers/clocksource/xilinx_ttc.c
> > create mode 100644 include/linux/xilinx_ttc.h
>
> Really?
> If yes. shouldn't be there any better naming convention
> especially for headers. linux/clocksource/xilinx_ttc.h.
Moving it is certainly the right direction, but I think we need a better way to
handle those forward declarations. "struct sys_timer" is actually an ARM specific
structure, so we might just want to add all the forward declarations for the
timers into arch/arm/include/asm/mach/time.h. It's not ideal to do it like that,
but I think it's much better than having a new globally visible header for
each timer that is used on ARM.
Eventually, we might want to do something similar to what we are discussing
for the top-level IRQ controllers at the moment, where we just autodetect them
from DT if possible, so we don't need to have any pointer to the timer from
arch code at all.
Arnd
^ permalink raw reply
* [PATCH 1/3] irqchip: Move ARM GIC to drivers/irqchip
From: Thomas Petazzoni @ 2012-10-30 22:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50900C90.7070101@gmail.com>
Rob,
On Tue, 30 Oct 2012 12:21:20 -0500, Rob Herring wrote:
> > Right. I'll have to move it. I wasn't really thinking about arm64 until
> > this morning.
>
> Looking at this some more, arm64 doesn't need most of what's in gic.h.
> The register defines should be moved into the .c file. The remaining
> function declarations either are not needed (i.e. gic_init) or should
> should be done like the handle_irq function pointer init. We don't want
> to have platform code calling gic_cascade_irq or gic_raise_softirq
> directly. Perhaps we need to support this generically in irqchip code.
> So I'll leave them in the current header and arm64 can add the necessary
> support it needs.
The thing is that we have the same problem for the armada-370-xp
IRQ controller driver. In its current form, it doesn't need to expose
any symbol to the mach-mvebu code except the initialization function.
However, with the SMP support, we need to expose a bunch of symbols,
which kind of violates the whole idea of the drivers/irqchip
infrastructure, which was aiming at limiting the number of header files
added in <linux/irqchip/...> for each and every IRQ controller driver.
As you say, we maybe need to support thing like yyy_raise_softirq()
generically in the irqchip code.
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PULL REQ] IXP4xx changes for Linux 3.7
From: Arnd Bergmann @ 2012-10-30 22:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121029082940.GC2527@netboy.at.omicron.at>
On Monday 29 October 2012, Richard Cochran wrote:
> On Thu, Oct 18, 2012 at 12:01:17AM +0200, Krzysztof Halasa wrote:
> >
> > Don't get me wrong. If I had time for this it could be different.
> > Unfortunately IXP4xx is a legacy arch, and for me it's simply a hobby at
> > this point. Given the raised barriers to participate, probably aimed at
> > paid maintainers, I have to quit doing this.
> >
> > BTW since Imre has probably even much less time, it would be a good time
> > to find someone to maintain IXP4xx code. I will be publishing (from time
> > to time) my tree (I'm using the hw myself), so even simple
> > cherry-picking would probably make some sense.
>
> So if no one else wants to do this, then I am willing to look after
> the IXP code. I think that I do have the time for it.
Thanks for the offer!
Jason Cooper was also volunteering to help out with this, and even we can't
convince Krzysztof to continue doing it, there is also Imre who is officially
listed as maintainer for IXP4xx and who has not commented on this. As Krzysztof
mentions, he probably doesn't have much time for it, but I'd like to give
him the chance to comment as well.
I'm sure we can find some solution between the four of you. Right now, I think
we should focus on getting the bug fixes from Krzysztof's tree into mainline
and the stable kernels where applicable, and then establish a better working
mode for the future kernels.
Arnd
^ permalink raw reply
* [PATCH 3/7] ARM: tegra30: cpuidle: add LP2 driver for secondary CPUs
From: Stephen Warren @ 2012-10-30 22:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87sj8vr517.fsf@amiettinen-lnx.nvidia.com>
On 10/30/2012 04:03 PM, Antti P Miettinen wrote:
> Joseph Lo <josephl@nvidia.com> writes:
>>>>>> + writel(tegra_in_lp2.bits[0], tegra_cpu_lp2_mask);
>
> BTW, writel_relaxed() would probably be more than enough? IRAM is mapped
> stronly ordered, isn't it? And there's an explicit dsb(). And the mask
> is observed and written only by CPUs. If there are coherence issues,
> they would be in the fabric? And then neither CPU barriers nor L2 sync
> would help, you'd need a readback, right?
I expect there are many places where we simply default to using
readl/writel (e.g. due to cut/paste, their prevalence, etc.) rather than
explicitly using the _relaxed variants if we can. Perhaps we should do a
pass through all the Tegra code and clean that up sometime.
^ permalink raw reply
* [PATCH] mvebu-gpio: Disable blinking when enabling a GPIO for output
From: Thomas Petazzoni @ 2012-10-30 22:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdY-aAxJpA7qvKWzxLRC-5_eC6cOZr7wsTLsFprOSbJ6CA@mail.gmail.com>
Dear Linus Walleij,
On Tue, 30 Oct 2012 23:16:26 +0100, Linus Walleij wrote:
> Can I have some ACK on this thing from Andrew or Thomas say...
I just gave a formal ACK to the patch.
> Also is this a thing for the stable kernel -rc series or next
> merge window? I couldn't quite figure out if it was a regression.
I don't think it is really necessary to have it in the 3.7-rc series.
The driver has been introduced in 3.7, but technically speaking,
nothing is using it yet. Users will only be introduced in 3.8.
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH] mvebu-gpio: Disable blinking when enabling a GPIO for output
From: Thomas Petazzoni @ 2012-10-30 22:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351427004-32110-1-git-send-email-jm@lentin.co.uk>
On Sun, 28 Oct 2012 12:23:24 +0000, Jamie Lentin wrote:
> The plat-orion GPIO driver would disable any pin blinking whenever
> using a pin for output. Do the same here, as a blinking LED will
> continue to blink regardless of what the GPIO pin level is.
>
> Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH v4 4/5] ARM: annotate VMALLOC_END definition with _AC
From: Arnd Bergmann @ 2012-10-30 22:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3c9e591c-a29f-446b-9256-bb23ff6d840d@TX2EHSMHS014.ehs.local>
On Saturday 27 October 2012, Michal Simek wrote:
> > diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
> > index 08c1231..72904a2 100644
> > --- a/arch/arm/include/asm/pgtable.h
> > +++ b/arch/arm/include/asm/pgtable.h
> > @@ -40,7 +40,7 @@
> > */
> > #define VMALLOC_OFFSET (8*1024*1024)
> > #define VMALLOC_START (((unsigned long)high_memory +
> > VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
> > -#define VMALLOC_END 0xff000000UL
> > +#define VMALLOC_END _AC(0xff000000,UL)
>
> This shouldn't be the part of this series but should go to mainline through different tree.
> Arnd, Olof: Can you take this patch to your arm-soc tree?
>
> I don't think it is a good workstyle to propose it to mainline through zynq soc tree.
> What do you think?
The arm-soc tree is not the right place either, this is architecture code which is
in Russell's domain. I would suggest getting an Ack from Russell if he's ok with
it and then merging it together with your other changes into arm-soc.
Arnd
^ permalink raw reply
* [PATCH] mvebu-gpio: Disable blinking when enabling a GPIO for output
From: Linus Walleij @ 2012-10-30 22:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351427004-32110-1-git-send-email-jm@lentin.co.uk>
On Sun, Oct 28, 2012 at 1:23 PM, Jamie Lentin <jm@lentin.co.uk> wrote:
> The plat-orion GPIO driver would disable any pin blinking whenever
> using a pin for output. Do the same here, as a blinking LED will
> continue to blink regardless of what the GPIO pin level is.
>
> Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
> ---
> The power LED on the DNS-320/DNS-325 is left blinking by the bootloader,
> the LED turning steady indicates it's booted. The blinking needs to be
> disabled before setting the GPIO pin level has any effect.
>
> Apart from the custom init code running too soon, I think everything is
> working now.
>
> I haven't tested this on any other boards, so not sure if it's sensible
> beyond the kirkwood/orion world.
Can I have some ACK on this thing from Andrew or Thomas say...
Also is this a thing for the stable kernel -rc series or next
merge window? I couldn't quite figure out if it was a regression.
Yours,
Linus Walleij
^ permalink raw reply
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