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* [PATCH V4 3/7] ARM: OMAP3+: hwmod: Add AM33XX HWMOD data for davinci_mdio module
From: Mugunthan V N @ 2012-11-06 17:32 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1352223159-27504-1-git-send-email-mugunthanvnm@ti.com>

This patch adds hwmod entry for davinci MDIO module,
creating parent<->child relationship between CPSW and MDIO module.

This Parent-child relation is required in order to use common resources
like, clock, but still maintaining the logical separation between them.

CPGMAC SubSystem consist of various sub-modules, like, mdio, cpdma,
cpsw, etc... These sub-modules are also used in some of Davinci
family of devices, so separate and independent platform devices &
drivers for CPSW and MDIO is implemented.
In case of AM33XX, the resources are shared and common register
bit-field is provided to control module/clock enable/disable,
makes it difficult to handle common resources from both drivers.

So the solution is, create parent<->child relationship between
CPGMAC & MDIO modules.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Richard Cochran <richardcochran@gmail.com>
---
 arch/arm/mach-omap2/omap_hwmod_33xx_data.c |   31 ++++++++++++++++++++++++++++
 1 files changed, 31 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 59d5c1c..3125835 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -674,6 +674,7 @@ static struct omap_hwmod am33xx_cpgmac0_hwmod = {
 	.name		= "cpgmac0",
 	.class		= &am33xx_cpgmac0_hwmod_class,
 	.clkdm_name	= "cpsw_125mhz_clkdm",
+	.flags		= (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY),
 	.mpu_irqs	= am33xx_cpgmac0_irqs,
 	.main_clk	= "cpsw_125mhz_gclk",
 	.prcm		= {
@@ -685,6 +686,20 @@ static struct omap_hwmod am33xx_cpgmac0_hwmod = {
 };
 
 /*
+ * mdio class
+ */
+static struct omap_hwmod_class am33xx_mdio_hwmod_class = {
+	.name		= "davinci_mdio",
+};
+
+static struct omap_hwmod am33xx_mdio_hwmod = {
+	.name		= "davinci_mdio",
+	.class		= &am33xx_mdio_hwmod_class,
+	.clkdm_name	= "cpsw_125mhz_clkdm",
+	.main_clk	= "cpsw_125mhz_gclk",
+};
+
+/*
  * dcan class
  */
 static struct omap_hwmod_class am33xx_dcan_hwmod_class = {
@@ -2501,6 +2516,21 @@ static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = {
 	.user		= OCP_USER_MPU,
 };
 
+struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
+	{
+		.pa_start	= 0x4A101000,
+		.pa_end		= 0x4A101000 + SZ_256 - 1,
+	},
+	{ }
+};
+
+struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
+	.master		= &am33xx_cpgmac0_hwmod,
+	.slave		= &am33xx_mdio_hwmod,
+	.addr		= am33xx_mdio_addr_space,
+	.user		= OCP_USER_MPU,
+};
+
 static struct omap_hwmod_addr_space am33xx_elm_addr_space[] = {
 	{
 		.pa_start	= 0x48080000,
@@ -3371,6 +3401,7 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
 	&am33xx_l3_main__tptc2,
 	&am33xx_l3_s__usbss,
 	&am33xx_l4_hs__cpgmac0,
+	&am33xx_cpgmac0__mdio,
 	NULL,
 };
 
-- 
1.7.0.4

^ permalink raw reply related

* [PATCH V4 4/7] cpsw: simplify the setup of the register pointers
From: Mugunthan V N @ 2012-11-06 17:32 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1352223159-27504-1-git-send-email-mugunthanvnm@ti.com>

From: Richard Cochran <richardcochran@gmail.com>

Instead of having a host of different register offsets in the device tree,
this patch simplifies the CPSW code by letting the driver set the proper
register offsets automatically, based on the CPSW version.

Signed-off-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 Documentation/devicetree/bindings/net/cpsw.txt |   34 ----
 drivers/net/ethernet/ti/cpsw.c                 |  209 +++++++++--------------
 include/linux/platform_data/cpsw.h             |   19 --
 3 files changed, 82 insertions(+), 180 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/cpsw.txt b/Documentation/devicetree/bindings/net/cpsw.txt
index 2214607..6cf5d92 100644
--- a/Documentation/devicetree/bindings/net/cpsw.txt
+++ b/Documentation/devicetree/bindings/net/cpsw.txt
@@ -9,15 +9,7 @@ Required properties:
 			  number
 - interrupt-parent	: The parent interrupt controller
 - cpdma_channels 	: Specifies number of channels in CPDMA
-- host_port_no		: Specifies host port shift
-- cpdma_reg_ofs		: Specifies CPDMA submodule register offset
-- cpdma_sram_ofs	: Specifies CPDMA SRAM offset
-- ale_reg_ofs		: Specifies ALE submodule register offset
 - ale_entries		: Specifies No of entries ALE can hold
-- host_port_reg_ofs	: Specifies host port register offset
-- hw_stats_reg_ofs	: Specifies hardware statistics register offset
-- cpts_reg_ofs		: Specifies the offset of the CPTS registers
-- bd_ram_ofs		: Specifies internal desciptor RAM offset
 - bd_ram_size		: Specifies internal descriptor RAM size
 - rx_descs		: Specifies number of Rx descriptors
 - mac_control		: Specifies Default MAC control register content
@@ -26,8 +18,6 @@ Required properties:
 - cpts_active_slave	: Specifies the slave to use for time stamping
 - cpts_clock_mult	: Numerator to convert input clock ticks into nanoseconds
 - cpts_clock_shift	: Denominator to convert input clock ticks into nanoseconds
-- slave_reg_ofs		: Specifies slave register offset
-- sliver_reg_ofs	: Specifies slave sliver register offset
 - phy_id		: Specifies slave phy id
 - mac-address		: Specifies slave MAC address
 
@@ -49,15 +39,7 @@ Examples:
 		interrupts = <55 0x4>;
 		interrupt-parent = <&intc>;
 		cpdma_channels = <8>;
-		host_port_no = <0>;
-		cpdma_reg_ofs = <0x800>;
-		cpdma_sram_ofs = <0xa00>;
-		ale_reg_ofs = <0xd00>;
 		ale_entries = <1024>;
-		host_port_reg_ofs = <0x108>;
-		hw_stats_reg_ofs = <0x900>;
-		cpts_reg_ofs = <0xc00>;
-		bd_ram_ofs = <0x2000>;
 		bd_ram_size = <0x2000>;
 		no_bd_ram = <0>;
 		rx_descs = <64>;
@@ -67,15 +49,11 @@ Examples:
 		cpts_clock_mult = <0x80000000>;
 		cpts_clock_shift = <29>;
 		cpsw_emac0: slave at 0 {
-			slave_reg_ofs = <0x200>;
-			sliver_reg_ofs = <0xd80>;
 			phy_id = "davinci_mdio.16:00";
 			/* Filled in by U-Boot */
 			mac-address = [ 00 00 00 00 00 00 ];
 		};
 		cpsw_emac1: slave at 1 {
-			slave_reg_ofs = <0x300>;
-			sliver_reg_ofs = <0xdc0>;
 			phy_id = "davinci_mdio.16:01";
 			/* Filled in by U-Boot */
 			mac-address = [ 00 00 00 00 00 00 ];
@@ -87,15 +65,7 @@ Examples:
 		compatible = "ti,cpsw";
 		ti,hwmods = "cpgmac0";
 		cpdma_channels = <8>;
-		host_port_no = <0>;
-		cpdma_reg_ofs = <0x800>;
-		cpdma_sram_ofs = <0xa00>;
-		ale_reg_ofs = <0xd00>;
 		ale_entries = <1024>;
-		host_port_reg_ofs = <0x108>;
-		hw_stats_reg_ofs = <0x900>;
-		cpts_reg_ofs = <0xc00>;
-		bd_ram_ofs = <0x2000>;
 		bd_ram_size = <0x2000>;
 		no_bd_ram = <0>;
 		rx_descs = <64>;
@@ -105,15 +75,11 @@ Examples:
 		cpts_clock_mult = <0x80000000>;
 		cpts_clock_shift = <29>;
 		cpsw_emac0: slave at 0 {
-			slave_reg_ofs = <0x200>;
-			sliver_reg_ofs = <0xd80>;
 			phy_id = "davinci_mdio.16:00";
 			/* Filled in by U-Boot */
 			mac-address = [ 00 00 00 00 00 00 ];
 		};
 		cpsw_emac1: slave at 1 {
-			slave_reg_ofs = <0x300>;
-			sliver_reg_ofs = <0xdc0>;
 			phy_id = "davinci_mdio.16:01";
 			/* Filled in by U-Boot */
 			mac-address = [ 00 00 00 00 00 00 ];
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index 7007aba..f94aa8f 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -80,6 +80,29 @@ do {								\
 
 #define CPSW_VERSION_1		0x19010a
 #define CPSW_VERSION_2		0x19010c
+
+#define HOST_PORT_NUM		0
+#define SLIVER_SIZE		0x40
+
+#define CPSW1_HOST_PORT_OFFSET	0x028
+#define CPSW1_SLAVE_OFFSET	0x050
+#define CPSW1_SLAVE_SIZE	0x040
+#define CPSW1_CPDMA_OFFSET	0x100
+#define CPSW1_STATERAM_OFFSET	0x200
+#define CPSW1_CPTS_OFFSET	0x500
+#define CPSW1_ALE_OFFSET	0x600
+#define CPSW1_SLIVER_OFFSET	0x700
+
+#define CPSW2_HOST_PORT_OFFSET	0x108
+#define CPSW2_SLAVE_OFFSET	0x200
+#define CPSW2_SLAVE_SIZE	0x100
+#define CPSW2_CPDMA_OFFSET	0x800
+#define CPSW2_STATERAM_OFFSET	0xa00
+#define CPSW2_CPTS_OFFSET	0xc00
+#define CPSW2_ALE_OFFSET	0xd00
+#define CPSW2_SLIVER_OFFSET	0xd80
+#define CPSW2_BD_OFFSET		0x2000
+
 #define CPDMA_RXTHRESH		0x0c0
 #define CPDMA_RXFREE		0x0e0
 #define CPDMA_TXHDP		0x00
@@ -87,21 +110,6 @@ do {								\
 #define CPDMA_TXCP		0x40
 #define CPDMA_RXCP		0x60
 
-#define cpsw_dma_regs(base, offset)		\
-	(void __iomem *)((base) + (offset))
-#define cpsw_dma_rxthresh(base, offset)		\
-	(void __iomem *)((base) + (offset) + CPDMA_RXTHRESH)
-#define cpsw_dma_rxfree(base, offset)		\
-	(void __iomem *)((base) + (offset) + CPDMA_RXFREE)
-#define cpsw_dma_txhdp(base, offset)		\
-	(void __iomem *)((base) + (offset) + CPDMA_TXHDP)
-#define cpsw_dma_rxhdp(base, offset)		\
-	(void __iomem *)((base) + (offset) + CPDMA_RXHDP)
-#define cpsw_dma_txcp(base, offset)		\
-	(void __iomem *)((base) + (offset) + CPDMA_TXCP)
-#define cpsw_dma_rxcp(base, offset)		\
-	(void __iomem *)((base) + (offset) + CPDMA_RXCP)
-
 #define CPSW_POLL_WEIGHT	64
 #define CPSW_MIN_PACKET_SIZE	60
 #define CPSW_MAX_PACKET_SIZE	(1500 + 14 + 4 + 4)
@@ -629,8 +637,7 @@ static int cpsw_ndo_open(struct net_device *ndev)
 
 	pm_runtime_get_sync(&priv->pdev->dev);
 
-	reg = __raw_readl(&priv->regs->id_ver);
-	priv->version = reg;
+	reg = priv->version;
 
 	dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n",
 		 CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg),
@@ -995,15 +1002,16 @@ static const struct ethtool_ops cpsw_ethtool_ops = {
 	.get_ts_info	= cpsw_get_ts_info,
 };
 
-static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv)
+static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv,
+			    u32 slave_reg_ofs, u32 sliver_reg_ofs)
 {
 	void __iomem		*regs = priv->regs;
 	int			slave_num = slave->slave_num;
 	struct cpsw_slave_data	*data = priv->data.slave_data + slave_num;
 
 	slave->data	= data;
-	slave->regs	= regs + data->slave_reg_ofs;
-	slave->sliver	= regs + data->sliver_reg_ofs;
+	slave->regs	= regs + slave_reg_ofs;
+	slave->sliver	= regs + sliver_reg_ofs;
 }
 
 static int cpsw_probe_dt(struct cpsw_platform_data *data,
@@ -1051,8 +1059,6 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data,
 		return -EINVAL;
 	}
 
-	data->no_bd_ram = of_property_read_bool(node, "no_bd_ram");
-
 	if (of_property_read_u32(node, "cpdma_channels", &prop)) {
 		pr_err("Missing cpdma_channels property in the DT.\n");
 		ret = -EINVAL;
@@ -1060,34 +1066,6 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data,
 	}
 	data->channels = prop;
 
-	if (of_property_read_u32(node, "host_port_no", &prop)) {
-		pr_err("Missing host_port_no property in the DT.\n");
-		ret = -EINVAL;
-		goto error_ret;
-	}
-	data->host_port_num = prop;
-
-	if (of_property_read_u32(node, "cpdma_reg_ofs", &prop)) {
-		pr_err("Missing cpdma_reg_ofs property in the DT.\n");
-		ret = -EINVAL;
-		goto error_ret;
-	}
-	data->cpdma_reg_ofs = prop;
-
-	if (of_property_read_u32(node, "cpdma_sram_ofs", &prop)) {
-		pr_err("Missing cpdma_sram_ofs property in the DT.\n");
-		ret = -EINVAL;
-		goto error_ret;
-	}
-	data->cpdma_sram_ofs = prop;
-
-	if (of_property_read_u32(node, "ale_reg_ofs", &prop)) {
-		pr_err("Missing ale_reg_ofs property in the DT.\n");
-		ret = -EINVAL;
-		goto error_ret;
-	}
-	data->ale_reg_ofs = prop;
-
 	if (of_property_read_u32(node, "ale_entries", &prop)) {
 		pr_err("Missing ale_entries property in the DT.\n");
 		ret = -EINVAL;
@@ -1095,34 +1073,6 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data,
 	}
 	data->ale_entries = prop;
 
-	if (of_property_read_u32(node, "host_port_reg_ofs", &prop)) {
-		pr_err("Missing host_port_reg_ofs property in the DT.\n");
-		ret = -EINVAL;
-		goto error_ret;
-	}
-	data->host_port_reg_ofs = prop;
-
-	if (of_property_read_u32(node, "hw_stats_reg_ofs", &prop)) {
-		pr_err("Missing hw_stats_reg_ofs property in the DT.\n");
-		ret = -EINVAL;
-		goto error_ret;
-	}
-	data->hw_stats_reg_ofs = prop;
-
-	if (of_property_read_u32(node, "cpts_reg_ofs", &prop)) {
-		pr_err("Missing cpts_reg_ofs property in the DT.\n");
-		ret = -EINVAL;
-		goto error_ret;
-	}
-	data->cpts_reg_ofs = prop;
-
-	if (of_property_read_u32(node, "bd_ram_ofs", &prop)) {
-		pr_err("Missing bd_ram_ofs property in the DT.\n");
-		ret = -EINVAL;
-		goto error_ret;
-	}
-	data->bd_ram_ofs = prop;
-
 	if (of_property_read_u32(node, "bd_ram_size", &prop)) {
 		pr_err("Missing bd_ram_size property in the DT.\n");
 		ret = -EINVAL;
@@ -1156,22 +1106,6 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data,
 		}
 		slave_data->phy_id = phy_id;
 
-		if (of_property_read_u32(slave_node, "slave_reg_ofs", &prop)) {
-			pr_err("Missing slave[%d] slave_reg_ofs property\n", i);
-			ret = -EINVAL;
-			goto error_ret;
-		}
-		slave_data->slave_reg_ofs = prop;
-
-		if (of_property_read_u32(slave_node, "sliver_reg_ofs",
-					 &prop)) {
-			pr_err("Missing slave[%d] sliver_reg_ofs property\n",
-				i);
-			ret = -EINVAL;
-			goto error_ret;
-		}
-		slave_data->sliver_reg_ofs = prop;
-
 		mac_addr = of_get_mac_address(slave_node);
 		if (mac_addr)
 			memcpy(slave_data->mac_addr, mac_addr, ETH_ALEN);
@@ -1201,8 +1135,9 @@ static int __devinit cpsw_probe(struct platform_device *pdev)
 	struct cpsw_priv		*priv;
 	struct cpdma_params		dma_params;
 	struct cpsw_ale_params		ale_params;
-	void __iomem			*regs;
+	void __iomem			*ss_regs, *wr_regs;
 	struct resource			*res;
+	u32 slave_offset, sliver_offset, slave_size;
 	int ret = 0, i, k = 0;
 
 	ndev = alloc_etherdev(sizeof(struct cpsw_priv));
@@ -1270,15 +1205,14 @@ static int __devinit cpsw_probe(struct platform_device *pdev)
 		ret = -ENXIO;
 		goto clean_clk_ret;
 	}
-	regs = ioremap(priv->cpsw_res->start, resource_size(priv->cpsw_res));
-	if (!regs) {
+	ss_regs = ioremap(priv->cpsw_res->start, resource_size(priv->cpsw_res));
+	if (!ss_regs) {
 		dev_err(priv->dev, "unable to map i/o region\n");
 		goto clean_cpsw_iores_ret;
 	}
-	priv->regs = regs;
-	priv->host_port = data->host_port_num;
-	priv->host_port_regs = regs + data->host_port_reg_ofs;
-	priv->cpts.reg = regs + data->cpts_reg_ofs;
+	priv->regs = ss_regs;
+	priv->version = __raw_readl(&priv->regs->id_ver);
+	priv->host_port = HOST_PORT_NUM;
 
 	priv->cpsw_wr_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 	if (!priv->cpsw_wr_res) {
@@ -1292,32 +1226,59 @@ static int __devinit cpsw_probe(struct platform_device *pdev)
 		ret = -ENXIO;
 		goto clean_iomap_ret;
 	}
-	regs = ioremap(priv->cpsw_wr_res->start,
+	wr_regs = ioremap(priv->cpsw_wr_res->start,
 				resource_size(priv->cpsw_wr_res));
-	if (!regs) {
+	if (!wr_regs) {
 		dev_err(priv->dev, "unable to map i/o region\n");
 		goto clean_cpsw_wr_iores_ret;
 	}
-	priv->wr_regs = regs;
-
-	for_each_slave(priv, cpsw_slave_init, priv);
+	priv->wr_regs = wr_regs;
 
 	memset(&dma_params, 0, sizeof(dma_params));
+	memset(&ale_params, 0, sizeof(ale_params));
+
+	switch (priv->version) {
+	case CPSW_VERSION_1:
+		priv->host_port_regs = ss_regs + CPSW1_HOST_PORT_OFFSET;
+		priv->cpts.reg       = ss_regs + CPSW1_CPTS_OFFSET;
+		dma_params.dmaregs   = ss_regs + CPSW1_CPDMA_OFFSET;
+		dma_params.txhdp     = ss_regs + CPSW1_STATERAM_OFFSET;
+		ale_params.ale_regs  = ss_regs + CPSW1_ALE_OFFSET;
+		slave_offset         = CPSW1_SLAVE_OFFSET;
+		slave_size           = CPSW1_SLAVE_SIZE;
+		sliver_offset        = CPSW1_SLIVER_OFFSET;
+		dma_params.desc_mem_phys = 0;
+		break;
+	case CPSW_VERSION_2:
+		priv->host_port_regs = ss_regs + CPSW2_HOST_PORT_OFFSET;
+		priv->cpts.reg       = ss_regs + CPSW2_CPTS_OFFSET;
+		dma_params.dmaregs   = ss_regs + CPSW2_CPDMA_OFFSET;
+		dma_params.txhdp     = ss_regs + CPSW2_STATERAM_OFFSET;
+		ale_params.ale_regs  = ss_regs + CPSW2_ALE_OFFSET;
+		slave_offset         = CPSW2_SLAVE_OFFSET;
+		slave_size           = CPSW2_SLAVE_SIZE;
+		sliver_offset        = CPSW2_SLIVER_OFFSET;
+		dma_params.desc_mem_phys =
+			(u32 __force) priv->cpsw_res->start + CPSW2_BD_OFFSET;
+		break;
+	default:
+		dev_err(priv->dev, "unknown version 0x%08x\n", priv->version);
+		ret = -ENODEV;
+		goto clean_cpsw_wr_iores_ret;
+	}
+	for (i = 0; i < priv->data.slaves; i++) {
+		struct cpsw_slave *slave = &priv->slaves[i];
+		cpsw_slave_init(slave, priv, slave_offset, sliver_offset);
+		slave_offset  += slave_size;
+		sliver_offset += SLIVER_SIZE;
+	}
+
 	dma_params.dev		= &pdev->dev;
-	dma_params.dmaregs	= cpsw_dma_regs((u32)priv->regs,
-						data->cpdma_reg_ofs);
-	dma_params.rxthresh	= cpsw_dma_rxthresh((u32)priv->regs,
-						    data->cpdma_reg_ofs);
-	dma_params.rxfree	= cpsw_dma_rxfree((u32)priv->regs,
-						  data->cpdma_reg_ofs);
-	dma_params.txhdp	= cpsw_dma_txhdp((u32)priv->regs,
-						 data->cpdma_sram_ofs);
-	dma_params.rxhdp	= cpsw_dma_rxhdp((u32)priv->regs,
-						 data->cpdma_sram_ofs);
-	dma_params.txcp		= cpsw_dma_txcp((u32)priv->regs,
-						data->cpdma_sram_ofs);
-	dma_params.rxcp		= cpsw_dma_rxcp((u32)priv->regs,
-						data->cpdma_sram_ofs);
+	dma_params.rxthresh	= dma_params.dmaregs + CPDMA_RXTHRESH;
+	dma_params.rxfree	= dma_params.dmaregs + CPDMA_RXFREE;
+	dma_params.rxhdp	= dma_params.txhdp + CPDMA_RXHDP;
+	dma_params.txcp		= dma_params.txhdp + CPDMA_TXCP;
+	dma_params.rxcp		= dma_params.txhdp + CPDMA_RXCP;
 
 	dma_params.num_chan		= data->channels;
 	dma_params.has_soft_reset	= true;
@@ -1325,10 +1286,7 @@ static int __devinit cpsw_probe(struct platform_device *pdev)
 	dma_params.desc_mem_size	= data->bd_ram_size;
 	dma_params.desc_align		= 16;
 	dma_params.has_ext_regs		= true;
-	dma_params.desc_mem_phys        = data->no_bd_ram ? 0 :
-			(u32 __force)priv->cpsw_res->start + data->bd_ram_ofs;
-	dma_params.desc_hw_addr         = data->hw_ram_addr ?
-			data->hw_ram_addr : dma_params.desc_mem_phys ;
+	dma_params.desc_hw_addr         = dma_params.desc_mem_phys;
 
 	priv->dma = cpdma_ctlr_create(&dma_params);
 	if (!priv->dma) {
@@ -1348,10 +1306,7 @@ static int __devinit cpsw_probe(struct platform_device *pdev)
 		goto clean_dma_ret;
 	}
 
-	memset(&ale_params, 0, sizeof(ale_params));
 	ale_params.dev			= &ndev->dev;
-	ale_params.ale_regs		= (void *)((u32)priv->regs) +
-						((u32)data->ale_reg_ofs);
 	ale_params.ale_ageout		= ale_ageout;
 	ale_params.ale_entries		= data->ale_entries;
 	ale_params.ale_ports		= data->slaves;
diff --git a/include/linux/platform_data/cpsw.h b/include/linux/platform_data/cpsw.h
index b5c16c3..4b0ed74 100644
--- a/include/linux/platform_data/cpsw.h
+++ b/include/linux/platform_data/cpsw.h
@@ -18,8 +18,6 @@
 #include <linux/if_ether.h>
 
 struct cpsw_slave_data {
-	u32		slave_reg_ofs;
-	u32		sliver_reg_ofs;
 	const char	*phy_id;
 	int		phy_if;
 	u8		mac_addr[ETH_ALEN];
@@ -28,31 +26,14 @@ struct cpsw_slave_data {
 struct cpsw_platform_data {
 	u32	ss_reg_ofs;	/* Subsystem control register offset */
 	u32	channels;	/* number of cpdma channels (symmetric) */
-	u32	cpdma_reg_ofs;	/* cpdma register offset */
-	u32	cpdma_sram_ofs;	/* cpdma sram offset */
-
 	u32	slaves;		/* number of slave cpgmac ports */
 	struct cpsw_slave_data	*slave_data;
 	u32	cpts_active_slave; /* time stamping slave */
 	u32	cpts_clock_mult;  /* convert input clock ticks to nanoseconds */
 	u32	cpts_clock_shift; /* convert input clock ticks to nanoseconds */
-
-	u32	ale_reg_ofs;	/* address lookup engine reg offset */
 	u32	ale_entries;	/* ale table size */
-
-	u32	host_port_reg_ofs; /* cpsw cpdma host port registers */
-	u32     host_port_num; /* The port number for the host port */
-
-	u32	hw_stats_reg_ofs;  /* cpsw hardware statistics counters */
-	u32	cpts_reg_ofs;      /* cpts registers */
-
-	u32	bd_ram_ofs;   /* embedded buffer descriptor RAM offset*/
 	u32	bd_ram_size;  /*buffer descriptor ram size */
-	u32	hw_ram_addr; /*if the HW address for BD RAM is different */
-	bool	no_bd_ram; /* no embedded BD ram*/
-
 	u32	rx_descs;	/* Number of Rx Descriptios */
-
 	u32	mac_control;	/* Mac control register */
 };
 
-- 
1.7.0.4

^ permalink raw reply related

* [PATCH V4 5/7] arm/dts: am33xx: Add CPSW and MDIO module nodes for AM33XX
From: Mugunthan V N @ 2012-11-06 17:32 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1352223159-27504-1-git-send-email-mugunthanvnm@ti.com>

Add CPSW and MDIO related device tree data for AM33XX.
Also enable them into board/evm dts files by providing
respective phy-id.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Richard Cochran <richardcochran@gmail.com>
---
 arch/arm/boot/dts/am335x-bone.dts |    8 +++++++
 arch/arm/boot/dts/am335x-evm.dts  |    8 +++++++
 arch/arm/boot/dts/am33xx.dtsi     |   42 +++++++++++++++++++++++++++++++++++++
 3 files changed, 58 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index c634f87..e233cfa 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -78,3 +78,11 @@
 		};
 	};
 };
+
+&cpsw_emac0 {
+	phy_id = "4a101000.mdio:00";
+};
+
+&cpsw_emac1 {
+	phy_id = "4a101000.mdio:01";
+};
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 185d632..415c3b3 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -118,3 +118,11 @@
 		};
 	};
 };
+
+&cpsw_emac0 {
+	phy_id = "4a101000.mdio:00";
+};
+
+&cpsw_emac1 {
+	phy_id = "4a101000.mdio:01";
+};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index bb31bff..2a0c8fe 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -210,5 +210,47 @@
 			interrupt-parent = <&intc>;
 			interrupts = <91>;
 		};
+
+		mac: ethernet at 4A100000 {
+			compatible = "ti,cpsw";
+			ti,hwmods = "cpgmac0";
+			cpdma_channels = <8>;
+			ale_entries = <1024>;
+			bd_ram_size = <0x2000>;
+			no_bd_ram = <0>;
+			rx_descs = <64>;
+			mac_control = <0x20>;
+			slaves = <2>;
+			cpts_active_slave = <0>;
+			cpts_clock_mult = <0x80000000>;
+			cpts_clock_shift = <29>;
+			reg = <0x4a100000 0x800
+				0x4a101200 0x100
+				0x4a101000 0x100>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			interrupt-parent = <&intc>;
+			/* c0_rx_thresh_pend c0_rx_pend c0_tx_pend c0_misc_pend*/
+			interrupts = <40 41 42 43>;
+			ranges;
+			cpsw_emac0: slave at 0 {
+				phy_id = "davinci_mdio.16:00";
+				/* Filled in by U-Boot */
+				mac-address = [ 00 00 00 00 00 00 ];
+			};
+			cpsw_emac1: slave at 1 {
+				/* Filled in by U-Boot */
+				mac-address = [ 00 00 00 00 00 00 ];
+			};
+
+			davinci_mdio: mdio at 4a101000 {
+				compatible = "ti,davinci_mdio";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				ti,hwmods = "davinci_mdio";
+				bus_freq = <1000000>;
+				reg = <0x4a101000 0x100>;
+			};
+		};
 	};
 };
-- 
1.7.0.4

^ permalink raw reply related

* [PATCH V4 6/7] ARM: OMAP2+: omap2plus_defconfig: Enable CPSW support
From: Mugunthan V N @ 2012-11-06 17:32 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1352223159-27504-1-git-send-email-mugunthanvnm@ti.com>

Enable CPSW support in defconfig which is present in AM33xx SoC

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
---
 arch/arm/configs/omap2plus_defconfig |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index a4b330e..41b595e 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -242,3 +242,6 @@ CONFIG_CRC_ITU_T=y
 CONFIG_CRC7=y
 CONFIG_LIBCRC32C=y
 CONFIG_SOC_OMAP5=y
+CONFIG_TI_DAVINCI_MDIO=y
+CONFIG_TI_DAVINCI_CPDMA=y
+CONFIG_TI_CPSW=y
-- 
1.7.0.4

^ permalink raw reply related

* [PATCH V4 7/7] net: cpsw: halt network stack before halting the device during suspend
From: Mugunthan V N @ 2012-11-06 17:32 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1352223159-27504-1-git-send-email-mugunthanvnm@ti.com>

Move network stack halt APIs before halting the hardware to ensure no
packets are queued to hardware during closing the device during
suspend sequence.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
---
 drivers/net/ethernet/ti/cpsw.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index f94aa8f..b46dbb4 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -698,12 +698,12 @@ static int cpsw_ndo_stop(struct net_device *ndev)
 	struct cpsw_priv *priv = netdev_priv(ndev);
 
 	cpsw_info(priv, ifdown, "shutting down cpsw device\n");
-	cpsw_intr_disable(priv);
-	cpdma_ctlr_int_ctrl(priv->dma, false);
-	cpdma_ctlr_stop(priv->dma);
 	netif_stop_queue(priv->ndev);
 	napi_disable(&priv->napi);
 	netif_carrier_off(priv->ndev);
+	cpsw_intr_disable(priv);
+	cpdma_ctlr_int_ctrl(priv->dma, false);
+	cpdma_ctlr_stop(priv->dma);
 	cpsw_ale_stop(priv->ale);
 	for_each_slave(priv, cpsw_slave_stop, priv);
 	pm_runtime_put_sync(&priv->pdev->dev);
-- 
1.7.0.4

^ permalink raw reply related

* Building for MMU-less vexpress targets
From: Arnd Bergmann @ 2012-11-06 17:33 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20121106122011.GE29853@mudshark.cambridge.arm.com>

On Tuesday 06 November 2012, Will Deacon wrote:
> > ARCH_MULTIPLATFORM
> >       bool "Allow multiple platforms to be selected"
> >       select ARM_PATCH_PHYS_VIRT if !MMU
> >       select AUTO_ZRELADDR if !MMU
> 
> you mean if MMU, right?

Yes.

> > but maybe those actually work without MMU as well. I have never looked too
> > closely at NOMMU configurations, every time I tried, they were broken in
> > combination with something else I wanted to enable.
> 
> ARM_PATCH_PHYS_VIRT wouldn't make any sense, but I can't see why
> AUTO_ZRELADDR wouldn't be ok.

Ok.

> nommu-XIP kernels are a different kettle
> of fish, but we don't care about a decompressor there.

XIP is only supported on ARCH_PXA and ARCH_SA1100. I don't see either
of them moving to CONFIG_MULTIPLATFORM any time soon, given how much
work that would be. ARCH_MMP should be possible in the future, but
has never supported XIP so far.

> The real problem will hit with things like CONFIG_DRAM_BASE, where !MMU
> can't realistically support multiple platforms, so allowing
> ARCH_MULTIPLATFORM doesn't feel quite right either...

Anybody who wants to build a !MMU kernel already needs to tweak the
configuration quite a lot and usually knows more about the system than
a typical end user. Having to pick the correct DRAM_BASE probably
isn't too bad in that case, as long as the kernels actually build.

	Arnd

^ permalink raw reply

* [PATCH 15/16] mm: use vm_unmapped_area() on sparc32 architecture
From: David Miller @ 2012-11-06 17:41 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <5098BC7F.7090702@redhat.com>

From: Rik van Riel <riel@redhat.com>
Date: Tue, 06 Nov 2012 02:30:07 -0500

> On 11/05/2012 08:25 PM, David Miller wrote:
>> From: Michel Lespinasse <walken@google.com>
>> Date: Mon,  5 Nov 2012 14:47:12 -0800
>>
>>> Update the sparc32 arch_get_unmapped_area function to make use of
>>> vm_unmapped_area() instead of implementing a brute force search.
>>>
>>> Signed-off-by: Michel Lespinasse <walken@google.com>
>>
>> Hmmm...
>>
>>> -	if (flags & MAP_SHARED)
>>> -		addr = COLOUR_ALIGN(addr);
>>> -	else
>>> -		addr = PAGE_ALIGN(addr);
>>
>> What part of vm_unmapped_area() is going to duplicate this special
>> aligning logic we need on sparc?
>>
> 
> That would be this part:
> 
> +found:
> + /* We found a suitable gap. Clip it with the original low_limit. */
> +	if (gap_start < info->low_limit)
> +		gap_start = info->low_limit;
> +
> +	/* Adjust gap address to the desired alignment */
> + gap_start += (info->align_offset - gap_start) & info->align_mask;
> +
> +	VM_BUG_ON(gap_start + info->length > info->high_limit);
> +	VM_BUG_ON(gap_start + info->length > gap_end);
> +	return gap_start;
> +}

Ok, now I understand.  Works for me:

Acked-by: David S. Miller <davem@davemloft.net>

^ permalink raw reply

* [PATCH v3 2/4] arm: bcm2835: convert to the irqchip infrastructure
From: Josh Cartwright @ 2012-11-06 17:54 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20121106165639.GF1254@beefymiracle.amer.corp.natinst.com>

On Tue, Nov 06, 2012 at 10:56:39AM -0600, Josh Cartwright wrote:
> On Sun, Oct 28, 2012 at 11:19:06PM +0100, Thomas Petazzoni wrote:
> > Register the irq controller driver in the main
> > drivers/irqchip/irqchip.c file, and make sure that the initialization
> > function of the driver sets handle_arch_irq() appropriately. This
> > requires a bit of movement in the driver since the
> > bcm2835_handle_irq() must move before the armctrl_of_init() function
> > to avoid a forward declaration.
> > 
> > On the arch/arm side, use irqchip_init() as the ->init_irq() callback,
> > and remove the definition of ->handle_irq() since this is now done by
> > the irq controller driver.
> > 
> > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> > Acked-by: Stephen Warren <swarren@wwwdotorg.org>
> > Reviewed-by: Rob Herring <rob.herring@calxeda.com>
> > ---
> [..]
> > diff --git a/drivers/irqchip/irq-bcm2835.c b/drivers/irqchip/irq-bcm2835.c
> > index dc670cc..62d1dad 100644
> > --- a/drivers/irqchip/irq-bcm2835.c
> > +++ b/drivers/irqchip/irq-bcm2835.c
> [..]
> > @@ -199,8 +197,8 @@ static void armctrl_handle_shortcut(int bank, struct pt_regs *regs,
> >  	handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
> >  }
> >  
> > -asmlinkage void __exception_irq_entry bcm2835_handle_irq(
> > -	struct pt_regs *regs)
> > +static asmlinkage void __exception_irq_entry
> > +bcm2835_handle_irq(struct pt_regs *regs)
> >  {
> >  	u32 stat, irq;
> >  
> > diff --git a/drivers/irqchip/irqchip.c b/drivers/irqchip/irqchip.c
> > index 410f99f..e2496e4 100644
> > --- a/drivers/irqchip/irqchip.c
> > +++ b/drivers/irqchip/irqchip.c
> > @@ -14,6 +14,12 @@
> >  #include "irqchip.h"
> >  
> >  static const struct of_device_id irqchip_of_match[] __initconst = {
> > +#ifdef CONFIG_ARCH_BCM2835
> > +	{
> > +		.compatible = "brcm,bcm2835-armctrl-ic",
> > +		.data = bcm2835_irqchip_init,
> > +	},
> > +#endif
> >  	{},
> >  };
> >  
> > diff --git a/drivers/irqchip/irqchip.h b/drivers/irqchip/irqchip.h
> > index 1e7a5c2..1075537 100644
> > --- a/drivers/irqchip/irqchip.h
> > +++ b/drivers/irqchip/irqchip.h
> > @@ -11,4 +11,6 @@
> >  #ifndef _IRQCHIP_H
> >  #define _IRQCHIP_H
> >  
> > +int bcm2835_irqchip_init(struct device_node *node, struct device_node *parent);
> > +
> >  #endif
> 
> Could it make sense here to kill the irqchip.h private export, and
> instead rely on the linker to stitch together the builtin irqchip's
> of_device_id tables?
> 
> Something like:
> 
> drivers/irqchip/irq-bcm2835.c:
> 
> 	static bcm2835_irqchip_init(struct device_node *node, struct device_node *parent)
> 	{
> 		/*...*/
> 	}
> 
> 	static const struct of_device_id bcm2835_match[] __initconst = {
> 		{ .compatible = "brcm,bcm2835-armctrl-ic", .data = bcm2835_irqchip_init, },
> 		{},
> 	};
> 	DECLARE_IRQCHIP(bcm2835, bcm2835_match);
> 
> where include/linux/irqchip.h:
> 
> 	#define DECLARE_IRQCHIP(name,ids) \
> 		static of_device_id * __irqchip_##name##_matches __used \
> 		__attribute__((__section__(".init.irqchip"))) = ids
> 
> drivers/irqchip/irqchip.c:
> 
> 	void irqchip_init(void)
> 	{
> 		extern of_device_id *__irqchip_matches_start[], *__irqchip_matches_end[];
> 		struct of_device_id **matchesp;
> 
> 		matchesp = __irqchip_matches_start;
> 		while (matchesp < __irqchip_matches_end)
> 			of_irq_init(*matchesp);

Hmm...more thinking leads me to believe that calling of_irq_init()
multiple times with an incomplete set of irqchip descriptions isn't
going to work.

Nevertheless, the idea could be extended such that a single of_device_id
table is generated (instead of an array of pointers to incomplete an
incomplete table).

  Josh
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^ permalink raw reply

* BUG: ARM build failures due to Xen
From: Russell King - ARM Linux @ 2012-11-06 17:57 UTC (permalink / raw)
  To: linux-arm-kernel

My build system is giving me the following errors against an OMAP4
randconfig build against the latest Linus' kernel plus arm-soc:

ERROR: "privcmd_call" [drivers/xen/xen-privcmd.ko] undefined!
make[2]: *** [__modpost] Error 1
make[2]: Target `_modpost' not remade because of errors.
make[1]: *** [modules] Error 2
make: *** [sub-make] Error 2
make: Target `uImage' not remade because of errors.
make: Target `modules' not remade because of errors.

Full build results and configuration are here:

http://www.arm.linux.org.uk/developer/build/result.php?type=build&idx=2627
http://www.arm.linux.org.uk/developer/build/file.php?type=config&idx=2627

^ permalink raw reply

* [GIT PULL 3/3] omap prcm cleanup for v3.8 merge window, part1
From: Tony Lindgren @ 2012-11-06 17:59 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20121105185133.GC22301@quad.lixom.net>

* Olof Johansson <olof@lixom.net> [121105 10:53]:
> 
> The history of this branch looks a little odd. Did you mean to merge in
> cleanup-headers on top of Paul's branch in it? It seems to add no value -- all
> that code is already in our branch and it resolves no conflicts, etc.

Oh that was because I wanted to keep the header clean up separate
and Paul needed some base for further PRCM work that would not
conflict with the header changes. And I wanted to get the first
set of Paul's changes into linux next early to avoid a big pile
of pull requests later on.
 
> That being said, it causes no harm, and I've pulled it in as is.

OK thanks.

Regards,

Tony

^ permalink raw reply

* [PATCH] ARM: mxs: apf28dev: Add I2C, SPI and spidev support
From: Gwenhael Goavec-Merou @ 2012-11-06 18:16 UTC (permalink / raw)
  To: linux-arm-kernel


Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
---
 arch/arm/boot/dts/imx28-apf28dev.dts |   19 +++++++++++++++++++
 1 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/imx28-apf28dev.dts b/arch/arm/boot/dts/imx28-apf28dev.dts
index 1643d25..da7013d 100644
--- a/arch/arm/boot/dts/imx28-apf28dev.dts
+++ b/arch/arm/boot/dts/imx28-apf28dev.dts
@@ -27,6 +27,19 @@
 				status = "okay";
 			};
 
+			ssp2: ssp at 80014000 {
+				compatible = "fsl,imx28-spi";
+				pinctrl-names = "default";
+				pinctrl-0 = <&spi2_pins_a>;
+				status = "okay";
+
+				spidev: spidev at 0 {
+					compatible = "spidev";
+					spi-max-frequency = <40000000>;
+					reg = <0>;
+				};
+			};
+
 			pinctrl at 80018000 {
 				pinctrl-names = "default";
 				pinctrl-0 = <&hog_pins_apf28dev>;
@@ -74,6 +87,12 @@
 				status = "okay";
 			};
 
+			i2c0: i2c at 80058000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&i2c0_pins_a>;
+				status = "okay";
+			};
+
 			pwm: pwm at 80064000 {
 				pinctrl-names = "default";
 				pinctrl-0 = <&pwm3_pins_a &pwm4_pins_a>;
-- 
1.7.8.6

^ permalink raw reply related

* [PATCH v2 03/14] ARM: OMAP5: id: Add cpu id for ES versions
From: Tony Lindgren @ 2012-11-06 18:18 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <50939A81.8060508@ti.com>

* Roger Quadros <rogerq@ti.com> [121102 03:05]:
> Hi Santosh,
> 
> I believe the change from cpu_is_xxx() to soc_is_xxx() just for OMAP5
> leads to unnecessary confusion, even though soc_is_ is more technically
> correct.

All of them will be eventually soc_is_xxx() and private to
arch/arm/mach-omap2.

Regards,

Tony

^ permalink raw reply

* Building for MMU-less vexpress targets
From: Will Deacon @ 2012-11-06 18:34 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <201211061733.44781.arnd@arndb.de>

On Tue, Nov 06, 2012 at 05:33:44PM +0000, Arnd Bergmann wrote:
> On Tuesday 06 November 2012, Will Deacon wrote:
> > nommu-XIP kernels are a different kettle
> > of fish, but we don't care about a decompressor there.
> 
> XIP is only supported on ARCH_PXA and ARCH_SA1100. I don't see either
> of them moving to CONFIG_MULTIPLATFORM any time soon, given how much
> work that would be. ARCH_MMP should be possible in the future, but
> has never supported XIP so far.

Indeed, although I expect systems with M-class CPUs to make more use of XIP
(I believe Uwe's board does this and uses the framebuffer for main memory).

> > The real problem will hit with things like CONFIG_DRAM_BASE, where !MMU
> > can't realistically support multiple platforms, so allowing
> > ARCH_MULTIPLATFORM doesn't feel quite right either...
> 
> Anybody who wants to build a !MMU kernel already needs to tweak the
> configuration quite a lot and usually knows more about the system than
> a typical end user. Having to pick the correct DRAM_BASE probably
> isn't too bad in that case, as long as the kernels actually build.

Ok, that's fair enough. Patch below.

Cheers,

Will

--->8

    ARM: nommu: remove MMU dependency from ARCH_MULTIPLATFORM
    
    ARCH_MULTIPLATFORM is the only way to select ARCH_VEXPRESS, so remove
    the dependency on MMU and instead use it to predicate the selection of
    ARM_PATCH_PHYS_VIRT.
    
    Although running a multi-platform kernel on a selection of MMU-less
    targets might not yet be possible, the thing should build and targetting
    a nommu platform is already a fairly involved exercise.
    
    Cc: Arnd Bergmann <arnd@arndb.de>
    Cc: Pawel Moll <Pawel.Moll@arm.com>
    Signed-off-by: Will Deacon <will.deacon@arm.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 335e220..5758cfb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -264,8 +264,7 @@ choice
 
 config ARCH_MULTIPLATFORM
        bool "Allow multiple platforms to be selected"
-       depends on MMU
-       select ARM_PATCH_PHYS_VIRT
+       select ARM_PATCH_PHYS_VIRT if MMU
        select AUTO_ZRELADDR
        select COMMON_CLK
        select MULTI_IRQ_HANDLER

^ permalink raw reply related

* [PATCHv2 1/6] arch: Change defconfigs to point to g_mass_storage.
From: Tony Lindgren @ 2012-11-06 18:41 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20121106113157.GE11931@arwen.pp.htv.fi>

* Felipe Balbi <balbi@ti.com> [121106 03:40]:
> Hi,
> 
> On Fri, Nov 02, 2012 at 02:31:50PM +0100, Michal Nazarewicz wrote:
> > From: Michal Nazarewicz <mina86@mina86.com>
> > 
> > The File-backed Storage Gadget (g_file_storage) is being removed, since
> > it has been replaced by Mass Storage Gadget (g_mass_storage).  This commit
> > changes defconfigs point to the new gadget.
> > 
> > Signed-off-by: Michal Nazarewicz <mina86@mina86.com>
> 
> I need more Acks here. Only got one from Nicolas. Anyone else ?

For omaps:

Acked-by: Tony Lindgren <tony@atomide.com>

^ permalink raw reply

* [PATCHv2 1/6] arch: Change defconfigs to point to g_mass_storage.
From: Tony Lindgren @ 2012-11-06 18:42 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20121106184117.GJ6801@atomide.com>

* Tony Lindgren <tony@atomide.com> [121106 10:41]:
> * Felipe Balbi <balbi@ti.com> [121106 03:40]:
> > Hi,
> > 
> > On Fri, Nov 02, 2012 at 02:31:50PM +0100, Michal Nazarewicz wrote:
> > > From: Michal Nazarewicz <mina86@mina86.com>
> > > 
> > > The File-backed Storage Gadget (g_file_storage) is being removed, since
> > > it has been replaced by Mass Storage Gadget (g_mass_storage).  This commit
> > > changes defconfigs point to the new gadget.
> > > 
> > > Signed-off-by: Michal Nazarewicz <mina86@mina86.com>
> > 
> > I need more Acks here. Only got one from Nicolas. Anyone else ?
> 
> For omaps:
> 
> Acked-by: Tony Lindgren <tony@atomide.com>

Heh I guess no omap changes there, so probably not
worth adding then.

Tony

^ permalink raw reply

* [PATCH] [PATCH] remove pcm049 from Makefile
From: Tony Lindgren @ 2012-11-06 18:51 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <508FBDFD.9000700@mvista.com>

* Sergei Shtylyov <sshtylyov@mvista.com> [121030 04:49]:
> Hello.
> 
>    You forgot to sign off on the patch, so it can't be applied.

Any news on this? It's also missing the description.

Regards,

Tony

^ permalink raw reply

* [GIT PULL v2] ARM: OMAP: more hwmod/PRCM fixes for 3.7-rc
From: Tony Lindgren @ 2012-11-06 18:51 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <alpine.DEB.2.00.1211010252350.6693@utopia.booyaka.com>

* Paul Walmsley <paul@pwsan.com> [121031 19:54]:
> Hi Tony
> 
> The following changes since commit 8f0d8163b50e01f398b14bcd4dc039ac5ab18d64:
> 
>   Linux 3.7-rc3 (2012-10-28 12:24:48 -0700)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending.git tags/omap-fixes-b2-for-3.7-rc
> 
> for you to fetch changes up to bc05244e65f26b7b6f87e0964bfe277803914ed9:
> 
>   ARM: OMAP4: hwmod data: do not enable or reset the McPDM during kernel init (2012-10-31 05:02:31 -0600)
> 
> ----------------------------------------------------------------
> A few more OMAP fixes for the 3.7-rc timeframe.  Mostly hwmod fixes.
> This second revision includes a missing fix from Kevin for a GPIO problem.

Thanks pulling into omap-for-v3.7-rc4/fixes.

Regards,

Tony

^ permalink raw reply

* [GIT PULL] ARM: OMAP: PM: few more fixes for v3.7-rc
From: Tony Lindgren @ 2012-11-06 18:51 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <87objbczw8.fsf@deeprootsystems.com>

* Kevin Hilman <khilman@deeprootsystems.com> [121105 16:58]:
> Hi Tony,
> 
> Here's a couple more trivial fixes for v3.7-rc.
> 
> Thanks,
> 
> Kevin
> 
> 
> The following changes since commit 6f0c0580b70c89094b3422ba81118c7b959c7556:
> 
>   Linux 3.7-rc2 (2012-10-20 12:11:32 -0700)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git tags/for_3.7-rc5-fixes-pm
> 
> for you to fetch changes up to 73c503cb981394872db41dd5cde385cb5373b4b9:
> 
>   ARM: OMAP4: PM: fix regulator name for VDD_MPU (2012-11-05 16:30:29 -0800)
> 
> ----------------------------------------------------------------
> Minor OMAP PM fixes for v3.7-rc
> 

Thanks pulling into omap-for-v3.7-rc4/fixes.

Regards,

Tony

^ permalink raw reply

* [GIT PULL] Calxeda ECX-2000 support
From: Olof Johansson @ 2012-11-06 19:18 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <50917936.2030405@gmail.com>

On Wed, Oct 31, 2012 at 02:17:10PM -0500, Rob Herring wrote:
> Arnd, Olof,
> 
> Please pull support for Calxeda ECX-2000 SOC.
> 
> There will be a trivial conflict with the GIC move to drivers/irqchip once
> that goes in. 
> 
> Rob
> 
> The following changes since commit 8f0d8163b50e01f398b14bcd4dc039ac5ab18d64:
> 
>   Linux 3.7-rc3 (2012-10-28 12:24:48 -0700)
> 
> are available in the git repository at:
> 
>   git://sources.calxeda.com/kernel/linux.git tags/calxeda-ecx-2000
> 
> for you to fetch changes up to e095c0d122c09efabe7d4136ce77f72c636c4879:
> 
>   ARM: highbank: Add initial ECX-2000 support (2012-10-31 13:47:01 -0500)
> 

The addition of include of core.h in sysregs.h gives me a build error on
multi_v7_defconfig due to missing guard ifdefs. I've added the following
patch on top of your branch.


commit 9186cea8283b0d235719e82607a1aec81db7ab8d
Author:     Olof Johansson <olof@lixom.net>
AuthorDate: Tue Nov 6 11:09:10 2012 -0800
Commit:     Olof Johansson <olof@lixom.net>
CommitDate: Tue Nov 6 11:09:10 2012 -0800

    ARM: highbank: add ifdef guards to core.h
    
    Fixes build error due to multiple includes:
    
    In file included from arch/arm/mach-highbank/sysregs.h:23:0,
    from arch/arm/mach-highbank/system.c:20:
    arch/arm/mach-highbank/core.h:8:91: error: redefinition of 'highbank_lluart_map_io'
    In file included from arch/arm/mach-highbank/system.c:19:0:
    arch/arm/mach-highbank/core.h:8:91: note: previous definition of 'highbank_lluart_map_io' was here
    
    Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h
index 286ec82..068c687 100644
--- a/arch/arm/mach-highbank/core.h
+++ b/arch/arm/mach-highbank/core.h
@@ -1,3 +1,6 @@
+#ifndef __HIGHBANK_CORE_H
+#define __HIGHBANK_CORE_H
+
 extern void highbank_set_cpu_jump(int cpu, void *jump_addr);
 extern void highbank_clocks_init(void);
 extern void highbank_restart(char, const char *);
@@ -18,3 +21,5 @@ extern void highbank_smc1(int fn, int arg);
 extern void highbank_cpu_die(unsigned int cpu);
 
 extern struct smp_operations highbank_smp_ops;
+
+#endif

^ permalink raw reply related

* [PATCH v2 5/6] ARM: davinci: remoteproc board support for OMAP-L138 DSP
From: Tivy, Robert @ 2012-11-06 19:33 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <CA+V-a8uUHm5QEvzv4wxift2RTV5bLUVEJ8XBWyMZLSqNQssnhQ@mail.gmail.com>

Hi Prabhakar,

Thanks for your consideration, please see my response below...

> -----Original Message-----
> From: Prabhakar Lad [mailto:prabhakar.csengg at gmail.com]
> Sent: Monday, November 05, 2012 9:02 PM
> To: Tivy, Robert; Ben Gardiner
> Cc: davinci-linux-open-source at linux.davincidsp.com; linux-arm-
> kernel at lists.infradead.org; Marek Szyprowski
> Subject: Re: [PATCH v2 5/6] ARM: davinci: remoteproc board support for
> OMAP-L138 DSP
> 
> Hi Robert,
> 
> On Thu, Nov 1, 2012 at 7:22 PM, Ben Gardiner
> <bengardiner@nanometrics.ca> wrote:
> > Hi Rob,
> >
> > On Thu, Oct 25, 2012 at 4:35 PM, Robert Tivy <rtivy@ti.com> wrote:
> >> [...]
> >> @@ -660,6 +667,99 @@ int __init da850_register_mmcsd1(struct
> davinci_mmc_config *config)
> >>  }
> >>  #endif
> >>
> >> +static struct platform_device *da8xx_dsp;
> >> +
> >> +#ifdef CONFIG_CMA
> >> +
> >> +/*
> >> + * The following address range was chosen because the XDC Platform
> for
> >> + * OMAP-L138 DSP has this range as its default code/data placement.
> >> + */
> >> +#define DA8XX_RPROC_CMA_BASE  (0xc3000000)
> >> [...]
> >> +/*
> >> + * The following address range was chosen because the XDC Platform
> for
> >> + * OMAP-L138 DSP has this range as its default code/data placement.
> >> + *
> >> + * System integrators must ensure that Linux does not own this
> range.
> >> + */
> >> +#define DA_CONTIG_BASE (0xc3000000)
> >> +#define DA_CONTIG_SIZE (0x02000000)
> >
> Is there a specific requirement for the dsp dev to have the buffers
> from
> this '0xc3000000' address range only ? If yes then
> dma_declare_contiguous()
> is must to ensure contiguous memory so the above macros cant be
> avoided.
> If there isn't a requirement of a specific region for dsp device you
> can use a
> global CMA instead, so as to ensure you have contiguous memory.

The requirement is that the contiguous buffer matches the address range to which the DSP image was linked, including uninitialized sections that don't actually get loaded.

I was thinking of making those #defines into Kconfig variables, so that kernel sources don't need to be touched by the end customer.  Another alternative is to make them be kernel command line variables, which would prevent the need to even rebuild the kernel.  What are your thoughts regarding those alternatives?

The above address range was decided upon because it matches the RTSC platform's defined area for OMAP-L138 [1] (although, the customer can end up redefining that range).  One of the reasons that range was chosen for the RTSC platform is that it exists on boards with smaller DDR sizes.  In other words, for a board with 256MB of DDR, if a range at the top of the DDR address space was chosen then that DSP image wouldn't work with a board with only 128MB.

Regards,

- Rob

[1] http://rtsc.eclipse.org/cdoc-tip/index.html#ti/platforms/evmOMAPL138/Platform.html#per-instance_config_parameters, however, we extended the range an additional 16MB beyond the RTSC platform's range.

> 
> Regards,
> --Prabhakar Lad
> 
> > I am concerned with the rigidity of the memory hole as its definition
> > is currently proposed.
> >
> > As you noted DA_CONTIG_BASE and DA_CONTIG_SIZE must describe a range
> > that is not used by Linux. Ideally this hole would not be in the
> > middle of the usuable memory but instead at the top. For L138 boards
> > with larger DDR packages this would mean carrying a patch to this
> > file.
> >
> > I think the same also applies to DA8XX_RPROC_CMA_BASE but I have no
> > hands-on experience yet with CMA.
> >
> > Is there any other means by which the hole's location and size can be
> > specified which does not require patching this file? I imagine
> KConfig
> > would work, but is this an acceptable use of KConfig?
> >
> > Best Regards,
> > Ben Gardiner
> >
> > ---
> > Nanometrics Inc.
> > http://www.nanometrics.ca
> > _______________________________________________
> > Davinci-linux-open-source mailing list
> > Davinci-linux-open-source at linux.davincidsp.com
> > http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-
> source

^ permalink raw reply

* [GIT PULL] Calxeda ECX-2000 support
From: Rob Herring @ 2012-11-06 19:38 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20121106191819.GA11353@quad.lixom.net>

On 11/06/2012 01:18 PM, Olof Johansson wrote:
> On Wed, Oct 31, 2012 at 02:17:10PM -0500, Rob Herring wrote:
>> Arnd, Olof,
>>
>> Please pull support for Calxeda ECX-2000 SOC.
>>
>> There will be a trivial conflict with the GIC move to drivers/irqchip once
>> that goes in. 
>>
>> Rob
>>
>> The following changes since commit 8f0d8163b50e01f398b14bcd4dc039ac5ab18d64:
>>
>>   Linux 3.7-rc3 (2012-10-28 12:24:48 -0700)
>>
>> are available in the git repository at:
>>
>>   git://sources.calxeda.com/kernel/linux.git tags/calxeda-ecx-2000
>>
>> for you to fetch changes up to e095c0d122c09efabe7d4136ce77f72c636c4879:
>>
>>   ARM: highbank: Add initial ECX-2000 support (2012-10-31 13:47:01 -0500)
>>
> 
> The addition of include of core.h in sysregs.h gives me a build error on
> multi_v7_defconfig due to missing guard ifdefs. I've added the following
> patch on top of your branch.
> 
> 
> commit 9186cea8283b0d235719e82607a1aec81db7ab8d
> Author:     Olof Johansson <olof@lixom.net>
> AuthorDate: Tue Nov 6 11:09:10 2012 -0800
> Commit:     Olof Johansson <olof@lixom.net>
> CommitDate: Tue Nov 6 11:09:10 2012 -0800
> 
>     ARM: highbank: add ifdef guards to core.h
>     
>     Fixes build error due to multiple includes:
>     
>     In file included from arch/arm/mach-highbank/sysregs.h:23:0,
>     from arch/arm/mach-highbank/system.c:20:
>     arch/arm/mach-highbank/core.h:8:91: error: redefinition of 'highbank_lluart_map_io'
>     In file included from arch/arm/mach-highbank/system.c:19:0:
>     arch/arm/mach-highbank/core.h:8:91: note: previous definition of 'highbank_lluart_map_io' was here

Thanks, I didn't see that in my tree because I have follow-on patches
removing this based on the DEBUG_LL clean-up. Now that the dependency
from Stephen is in your tree, I need to send that to you as well.

Rob

>     
>     Signed-off-by: Olof Johansson <olof@lixom.net>
> 
> diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h
> index 286ec82..068c687 100644
> --- a/arch/arm/mach-highbank/core.h
> +++ b/arch/arm/mach-highbank/core.h
> @@ -1,3 +1,6 @@
> +#ifndef __HIGHBANK_CORE_H
> +#define __HIGHBANK_CORE_H
> +
>  extern void highbank_set_cpu_jump(int cpu, void *jump_addr);
>  extern void highbank_clocks_init(void);
>  extern void highbank_restart(char, const char *);
> @@ -18,3 +21,5 @@ extern void highbank_smc1(int fn, int arg);
>  extern void highbank_cpu_die(unsigned int cpu);
>  
>  extern struct smp_operations highbank_smp_ops;
> +
> +#endif
> 

^ permalink raw reply

* scheduler clock for MXS [Was: Re: Wakeup latency measured with SCHED_TRACER depends on HZ]
From: Russell King - ARM Linux @ 2012-11-06 20:04 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20121106134944.GE27643@S2100-06.ap.freescale.net>

On Tue, Nov 06, 2012 at 09:49:50PM +0800, Shawn Guo wrote:
> On Tue, Nov 06, 2012 at 10:12:29AM +0000, Russell King - ARM Linux wrote:
> > > [    0.000000] sched_clock: 16 bits at 32kHz, resolution 31250ns, wraps every 20
> > > 47ms
> > 
> > So where are you setting this up?  My guess is it's after time_init()
> > has done its stuff.
> 
> It gets set up in machine_desc->timer->init() which is called right
> in time_init() just before sched_clock_postinit().

Well.  I just tried an experiment with OMAP4:

[    0.000000] sched_clock: 16 bits at 32kHz, resolution 30517ns, wraps every 1999ms                                                                            

So, this is similar to yours, and there I get:

[    1.945281] ALSA device list:
[    1.948394]   #0: SDP4430
[    1.951324] Waiting 2sec before mounting root device...
[    2.926910] kjournald starting.  Commit interval 5 seconds
[    2.927001] EXT3-fs (mmcblk1p2): warning: maximal mount count reached, running e2fsck is recommended
[    3.041503] EXT3-fs (mmcblk1p2): using internal journal
[    3.051422] EXT3-fs (mmcblk1p2): recovery complete
[    3.056427] EXT3-fs (mmcblk1p2): mounted filesystem with writeback data mode
[    3.063842] VFS: Mounted root (ext3 filesystem) on device 179:26.
[    3.070404] Freeing init memory: 192K

So it appears to be working as designed.

^ permalink raw reply

* scheduler clock for MXS
From: Russell King - ARM Linux @ 2012-11-06 20:20 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20121106134630.GD27643@S2100-06.ap.freescale.net>

On Tue, Nov 06, 2012 at 09:46:31PM +0800, Shawn Guo wrote:
> On Tue, Nov 06, 2012 at 09:34:39AM +0100, Stanislav Meduna wrote:
> > Shawn: could you try change the
> >   update_sched_clock();
> > to
> >   sched_clock_poll(sched_clock_timer.data);
> > right after update_sched_clock call in setup_sched_clock?
> > 
> With the change, it still wraps at 2 seconds.

And there's no way that such a change could ever go into mainline; it
can mean that the timer is registered into the timer subsystem before
the timer subsystem has been initialised.  That's why we postpone that
part to time_init().

(And it has _always_ been intended that this sched_clock() implementation
would be usable by the time setup_arch() completes...)

^ permalink raw reply

* ARM: idle sleep time for hotplugged cpu
From: Steve Muckle @ 2012-11-06 20:24 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20121105091533.GB28327@n2100.arm.linux.org.uk>

On 11/05/12 01:15, Russell King - ARM Linux wrote:
> On Mon, Nov 05, 2012 at 09:23:38AM +0530, Taniya Das wrote:
>> I was looking at the arch/arm/process.c:cpu_die, I was wondering why we
>> do not exit from NOHZ for a hotplugged/offline cpu?
> 
> Offlined CPUs are not supposed to just 'return' from cpu_die(), and
> in actual fact they can't.

Although an offline CPU will not come back into the idle thread by
returning from cpu_die(), I believe the question about exiting nohz mode
before cpu_die() still stands.

>From arch/arm/process.c:cpu_idle() it appears a CPU could enter
pm_idle() for a while (in nohz mode), then execute the inner loop again
and call cpu_die(). Is there the potential for cpu idle time accounting
to get messed up here by not exiting nohz mode prior to the cpu dying,
so that missed ticks from nohz are properly accounted for?

thanks,
Steve

-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

^ permalink raw reply

* [PATCHv2 1/6] arch: Change defconfigs to point to g_mass_storage.
From: Felipe Balbi @ 2012-11-06 20:32 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20121106184227.GK6801@atomide.com>

Hi,

On Tue, Nov 06, 2012 at 10:42:27AM -0800, Tony Lindgren wrote:
> * Tony Lindgren <tony@atomide.com> [121106 10:41]:
> > * Felipe Balbi <balbi@ti.com> [121106 03:40]:
> > > Hi,
> > > 
> > > On Fri, Nov 02, 2012 at 02:31:50PM +0100, Michal Nazarewicz wrote:
> > > > From: Michal Nazarewicz <mina86@mina86.com>
> > > > 
> > > > The File-backed Storage Gadget (g_file_storage) is being removed, since
> > > > it has been replaced by Mass Storage Gadget (g_mass_storage).  This commit
> > > > changes defconfigs point to the new gadget.
> > > > 
> > > > Signed-off-by: Michal Nazarewicz <mina86@mina86.com>
> > > 
> > > I need more Acks here. Only got one from Nicolas. Anyone else ?
> > 
> > For omaps:
> > 
> > Acked-by: Tony Lindgren <tony@atomide.com>
> 
> Heh I guess no omap changes there, so probably not
> worth adding then.

omap1 is old, but it's still omap :-)

 arch/arm/configs/omap1_defconfig                   |    3 +--

-- 
balbi
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