* [PATCH v2 12/17] ARM: clps711x: autcpu12: Special driver for handling NAND memory is removed
From: Alexander Shiyan @ 2012-11-13 7:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201211121617.41304.arnd@arndb.de>
On Mon, 12 Nov 2012 16:17:41 +0000
Arnd Bergmann <arnd@arndb.de> wrote:
> On Saturday 10 November 2012, Alexander Shiyan wrote:
> > This patch provide migration to using "gpio-nand" and "basic-mmio-gpio"
> > drivers instead of using special driver for handling NAND memory.
> >
> > Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
>
> Applying this patch fails to build because it requires "GENERIC_GPIO" to be
> enabled in Kconfig, which is not enabled here.
All necessary symbols for build is present in patch:
[PATCH v2 16/17] ARM: clps711x: Update defconfig due latest changes and
new kernel symbols
--
Alexander Shiyan <shc_work@mail.ru>
^ permalink raw reply
* [RFC PATCH v4 2/2] ASoC: sam9g20-wm8731: convert to dt support
From: Mark Brown @ 2012-11-13 7:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121108152431.GJ4576@game.jcrosoft.org>
On Thu, Nov 08, 2012 at 04:24:31PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 15:57 Thu 08 Nov , Bo Shen wrote:
> > Signed-off-by: Bo Shen <voice.shen@atmel.com>
> > ---
> > Change since v3 RFC:
> > Remove dai node, remap ssc in place
> > without pinctrl added, so don't modify the dtsi file, will be added
> > soon
> until I see the pinctrl to test this no
> This code is untested
I see a version adding the DT pinmux stuff has now been posted but this
does seem a bit unfair, the code should be fine on a current ASoC branch
- it's only going to break after merging with the pinctrl support.
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* [PATCH] ARM: kirkwood: Add Plat'Home OpenBlocks A6 support
From: Nobuhiro Iwamatsu @ 2012-11-13 7:43 UTC (permalink / raw)
To: linux-arm-kernel
Add support for Plat'Home OpenBlocks A6 using the device tree
where possible.
This commit supports SATA, USB, ether and serial console.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2:
- Remove unnecessary value from bootargs.
- Update comment for MPP table.
- Remove kirkwood_uart0_init().
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/kirkwood-openblocks_a6.dts | 39 ++++++++++++++
arch/arm/configs/kirkwood_defconfig | 1 +
arch/arm/mach-kirkwood/Kconfig | 7 +++
arch/arm/mach-kirkwood/Makefile | 1 +
arch/arm/mach-kirkwood/board-dt.c | 4 ++
arch/arm/mach-kirkwood/board-openblocks_a6.c | 71 ++++++++++++++++++++++++++
arch/arm/mach-kirkwood/common.h | 6 +++
8 files changed, 131 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/kirkwood-openblocks_a6.dts
create mode 100644 arch/arm/mach-kirkwood/board-openblocks_a6.c
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b994045..ce053a4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -41,7 +41,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \
kirkwood-lschlv2.dtb \
kirkwood-lsxhl.dtb \
kirkwood-ts219-6281.dtb \
- kirkwood-ts219-6282.dtb
+ kirkwood-ts219-6282.dtb \
+ kirkwood-openblocks_a6.dtb
dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
msm8960-cdp.dtb
dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
new file mode 100644
index 0000000..4fb088d
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
@@ -0,0 +1,39 @@
+/dts-v1/;
+
+/include/ "kirkwood.dtsi"
+
+/ {
+ model = "Plat'Home OpenBlocksA6";
+ compatible = "plathome,openblocks-a6", "marvell,kirkwood-88f6283", "marvell,kirkwood";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ };
+
+ ocp at f1000000 {
+ serial at 12000 {
+ clock-frequency = <200000000>;
+ status = "ok";
+ };
+
+ serial at 12100 {
+ clock-frequency = <200000000>;
+ status = "ok";
+ };
+
+ nand at 3000000 {
+ chip-delay = <25>;
+ status = "okay";
+ };
+
+ sata at 80000 {
+ nr-ports = <1>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
index 74eee0c..8b5988c 100644
--- a/arch/arm/configs/kirkwood_defconfig
+++ b/arch/arm/configs/kirkwood_defconfig
@@ -27,6 +27,7 @@ CONFIG_MACH_GOFLEXNET_DT=y
CONFIG_MACH_LSXL_DT=y
CONFIG_MACH_IOMEGA_IX2_200_DT=y
CONFIG_MACH_KM_KIRKWOOD_DT=y
+CONFIG_MACH_OPENBLOCKS_A6_DT=y
CONFIG_MACH_TS219=y
CONFIG_MACH_TS41X=y
CONFIG_MACH_DOCKSTAR=y
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index 50bca50..830bb5c 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -130,6 +130,13 @@ config MACH_KM_KIRKWOOD_DT
Say 'Y' here if you want your kernel to support the
Keymile Kirkwood Reference Desgin, using Flattened Device Tree.
+config MACH_OPENBLOCKS_A6_DT
+ bool "Plat'Home OpenBlocks A6 (Flattened Device Tree)"
+ select ARCH_KIRKWOOD_DT
+ help
+ Say 'Y' here if you want your kernel to support the
+ Plat'Home OpenBlocks A6 (Flattened Device Tree).
+
config MACH_TS219
bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS"
help
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index 294779f..ee38f9d 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -31,3 +31,4 @@ obj-$(CONFIG_MACH_GOFLEXNET_DT) += board-goflexnet.o
obj-$(CONFIG_MACH_LSXL_DT) += board-lsxl.o
obj-$(CONFIG_MACH_IOMEGA_IX2_200_DT) += board-iomega_ix2_200.o
obj-$(CONFIG_MACH_KM_KIRKWOOD_DT) += board-km_kirkwood.o
+obj-$(CONFIG_MACH_OPENBLOCKS_A6_DT) += board-openblocks_a6.o
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index d94872f..c3aa0e2 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -94,6 +94,9 @@ static void __init kirkwood_dt_init(void)
if (of_machine_is_compatible("keymile,km_kirkwood"))
km_kirkwood_init();
+ if (of_machine_is_compatible("plathome,openblocks-a6"))
+ openblocks_a6_init();
+
of_platform_populate(NULL, kirkwood_dt_match_table,
kirkwood_auxdata_lookup, NULL);
}
@@ -110,6 +113,7 @@ static const char *kirkwood_dt_board_compat[] = {
"buffalo,lsxl",
"iom,ix2-200",
"keymile,km_kirkwood",
+ "plathome,openblocks-a6",
NULL
};
diff --git a/arch/arm/mach-kirkwood/board-openblocks_a6.c b/arch/arm/mach-kirkwood/board-openblocks_a6.c
new file mode 100644
index 0000000..e807e8c
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-openblocks_a6.c
@@ -0,0 +1,71 @@
+/*
+ * Copyright 2012 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * arch/arm/mach-kirkwood/board-openblocks_a6.c
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/clk.h>
+#include <linux/clk-private.h>
+#include "common.h"
+#include "mpp.h"
+
+static struct mv643xx_eth_platform_data openblocks_ge00_data = {
+ .phy_addr = MV643XX_ETH_PHY_ADDR(0),
+};
+
+static unsigned int openblocks_a6_mpp_config[] __initdata = {
+ MPP0_NF_IO2,
+ MPP1_NF_IO3,
+ MPP2_NF_IO4,
+ MPP3_NF_IO5,
+ MPP4_NF_IO6,
+ MPP5_NF_IO7,
+ MPP6_SYSRST_OUTn,
+ MPP8_UART1_RTS,
+ MPP9_UART1_CTS,
+ MPP10_UART0_TXD,
+ MPP11_UART0_RXD,
+ MPP13_UART1_TXD,
+ MPP14_UART1_RXD,
+ MPP15_UART0_RTS,
+ MPP16_UART0_CTS,
+ MPP18_NF_IO0,
+ MPP19_NF_IO1,
+ MPP20_GPIO, /* DIP SW0 */
+ MPP21_GPIO, /* DIP SW1 */
+ MPP22_GPIO, /* DIP SW2 */
+ MPP23_GPIO, /* DIP SW3 */
+ MPP24_GPIO, /* GPIO 0 */
+ MPP25_GPIO, /* GPIO 1 */
+ MPP26_GPIO, /* GPIO 2 */
+ MPP27_GPIO, /* GPIO 3 */
+ MPP28_GPIO, /* GPIO 4 */
+ MPP29_GPIO, /* GPIO 5 */
+ MPP30_GPIO, /* GPIO 6 */
+ MPP31_GPIO, /* GPIO 7 */
+ MPP36_TW1_SDA,
+ MPP37_TW1_SCK,
+ MPP38_GPIO, /* INIT */
+ MPP39_GPIO, /* USB OC */
+ MPP41_GPIO, /* LED: Red */
+ MPP42_GPIO, /* LED: Yellow */
+ MPP43_GPIO, /* LED: Green */
+ 0,
+};
+
+void __init openblocks_a6_init(void)
+{
+ /*
+ * Basic setup. Needs to be called early.
+ */
+ kirkwood_mpp_conf(openblocks_a6_mpp_config);
+ kirkwood_ehci_init();
+ kirkwood_ge00_init(&openblocks_ge00_data);
+}
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index bcffd7c..0d0159e 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -112,6 +112,12 @@ void km_kirkwood_init(void);
static inline void km_kirkwood_init(void) {};
#endif
+#ifdef CONFIG_MACH_OPENBLOCKS_A6_DT
+void openblocks_a6_init(void);
+#else
+static inline void openblocks_a6_init(void) {};
+#endif
+
/* early init functions not converted to fdt yet */
char *kirkwood_id(void);
void kirkwood_l2_init(void);
--
1.7.10.4
^ permalink raw reply related
* [PATCH 2/2] regulator: gpio-regulator: fix can't find regulator node in dt
From: Mark Brown @ 2012-11-13 7:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352714392-30497-1-git-send-email-Frank.Li@freescale.com>
On Mon, Nov 12, 2012 at 05:59:52PM +0800, Frank Li wrote:
> Need initilize of_node in regulator config when register regulator,
> otherwise regulator driver think it is no-dt device.
Applied, thanks.
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* usb clock not found on imx27 when using dt
From: s.hauer at pengutronix.de @ 2012-11-13 7:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50A15966.8040204@yahoo.fr>
On Mon, Nov 12, 2012 at 09:17:42PM +0100, trem wrote:
> On 12/11/12 08:54, s.hauer at pengutronix.de wrote:
> >On Sun, Nov 11, 2012 at 08:34:34PM +0000, Philippe Reynes wrote:
> >>Hi all,
> >>
> >>I try to add the support of usb on my armadeus apf27,
> >>but there is a problem when try to reclaim the clock.
> >>imx_usb mxc-ehci.0: Failed to get clock, err=-2
> >>
> >>To avoid adding too many attachment to this mail,
> >>I've put all the information on a website. You can
> >>found them here: http://ryu.zarb.org/~trem/armadeus/
> >>
> >>
> >>The initial issue is in the directory : 20121110
> >>
> >>boot-3.7-rc4.log : boot log with the issue
> >>linux-3.7-rc4.config : the configuration file for the kernel
> >>investifation.txt : the description of my investigation.
> >
> >You should really post the relevant bits on the mailing list. Nobody
> >visits websites for investigating your issue. Besides, it will not be
> >in the mailing list archives so people will not find it later.
>
> You're right, I add an archive with all log as attachment.
>
> >>
> >>
> >>I've tried to fix the clock issue, but another issue occurs.
> >>The information about this "fix" is in : 20121111
> >>boot-3.7-rc4.log : boot log with the new issue
> >>issue.txt : the description of the change done on the kernel
> >>
> >>I've got severals questions :
> >>- does my dts correct with usb change ?
> >>- does someone has already tested usb on imx27 with dt ?
> >
> >Please investigate in using the chipidea driver. This will be the way
> >forward for i.MX.
>
> I use the chipidea driver for the usb.
>
> The main issue is that the chipidea driver don't found the clock :
>
> [ 0.761693] imx_usb mxc-ehci.0: Failed to get clock, err=-2
> [ 0.767620] imx_usb: probe of mxc-ehci.0 failed with error -2
>
> The driver ci13xxx_imx request the clock in the probe function
> in the following line:
> data->clk = devm_clk_get(&pdev->dev, NULL);
> calling: clk = clk_get(dev, id);
> calling: clk_get_sys(dev_id, con_id);
> calling: clk_find(dev_id, con_id);
> with dev_id = mxc-ehci.0 and con_id = NULL
> This last function fail to found a clock.
>
> In the function mx27_clocks_init, several mxc-ehci.0
> clocks are registered, but all with a con_id.
>
> So the function clk_find fails.
>
> As I'm not really sure of the dts, I don't know if the problem
> is in the dts or in the driver (maybe both).
You have to register the lookups for the chipidea driver with
clk_register_clkdev(). The lookups are only what the name suggests:
lookups. They are no clocks by themselves. This means that you have to
add another lookup which matches the device name.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply
* [PATCH 1/2] regulator: gpio-regulator: doc: Fix wrong key gpio-enable
From: Mark Brown @ 2012-11-13 7:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352714308-27007-1-git-send-email-Frank.Li@freescale.com>
On Mon, Nov 12, 2012 at 05:58:28PM +0800, Frank Li wrote:
> Wrong description in binding document.
> Doc use "gpio-enable", but code use "enable-gpio"
Applied, thanks.
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* [PATCH] Fix typo in DT binding documentation for i.MX IPU3
From: Sascha Hauer @ 2012-11-13 7:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121112223340.20867.75319.stgit@localhost.localdomain>
On Mon, Nov 12, 2012 at 11:33:40PM +0100, Martin Fuzzey wrote:
> crtc should be crtcs in parallel display.
>
> Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
You might have to resend with Greg and dri-devel on Cc.
Sascha
>
> ---
>
> .../bindings/staging/imx-drm/fsl-imx-drm.txt | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/staging/imx-drm/fsl-imx-drm.txt b/Documentation/devicetree/bindings/staging/imx-drm/fsl-imx-drm.txt
> index 07654f0..68eff34 100644
> --- a/Documentation/devicetree/bindings/staging/imx-drm/fsl-imx-drm.txt
> +++ b/Documentation/devicetree/bindings/staging/imx-drm/fsl-imx-drm.txt
> @@ -23,7 +23,7 @@ Parallel display support
>
> Required properties:
> - compatible: Should be "fsl,imx-parallel-display"
> -- crtc: the crtc this display is connected to, see below
> +- crtcs: the crtc this display is connected to, see below
> Optional properties:
> - interface_pix_fmt: How this display is connected to the
> crtc. Currently supported types: "rgb24", "rgb565"
> @@ -36,6 +36,6 @@ example:
> display at di0 {
> compatible = "fsl,imx-parallel-display";
> edid = [edid-data];
> - crtc = <&ipu 0>;
> + crtcs = <&ipu 0>;
> interface-pix-fmt = "rgb24";
> };
>
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply
* linux-next: manual merge of the arm-soc tree with the net-next tree
From: Joachim Eastwood @ 2012-11-13 7:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121113151536.50d0292e8cb88b10686b576e@canb.auug.org.au>
On 13 November 2012 05:15, Stephen Rothwell <sfr@canb.auug.org.au> wrote:
> Hi all,
>
> Today's linux-next merge of the arm-soc tree got a conflict in
> drivers/net/ethernet/cadence/at91_ether.c between various commits from
> the net-next tree and commit bcd2360c1ff9 ("arm: at91: move platfarm_data
> to include/linux/platform_data/atmel.h") from the arm-soc tree.
>
> I fixed it up (I think - see below) and can carry the fix as necessary
> (no action is required).
>
> --
> Cheers,
> Stephen Rothwell sfr at canb.auug.org.au
>
> diff --cc drivers/net/ethernet/cadence/at91_ether.c
> index e7a476c,35fc6edb..0000000
> --- a/drivers/net/ethernet/cadence/at91_ether.c
> +++ b/drivers/net/ethernet/cadence/at91_ether.c
> @@@ -25,53 -31,728 +25,54 @@@
> #include <linux/clk.h>
> #include <linux/gfp.h>
> #include <linux/phy.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/of_net.h>
> +#include <linux/pinctrl/consumer.h>
> + #include <linux/platform_data/atmel.h>
The platform_data/atmel.h include shouldn't be necessary since the
driver already includes platform_data/macb.h.
Otherwise the fix up looks correct.
regards
Joachim Eastwood
^ permalink raw reply
* [PATCH] RFC: pinctrl: grab default handler with bus notifiers
From: Mark Brown @ 2012-11-13 6:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50A15A54.3090803@wwwdotorg.org>
On Mon, Nov 12, 2012 at 01:21:40PM -0700, Stephen Warren wrote:
> On 11/11/2012 05:22 AM, Linus Walleij wrote:
> > Another solution that was discussed was whether to move
> > the default pinctrl handle and state grab to the device
> > core as an optional field in struct device itself, but
> > I'd like to first propose this less intrusive mechanism.
> I think doing that approach makes a lot more sense; wouldn't it
> completely avoid the issues with deferred probe that this notifier-based
> method can't solve? It would also be very much in line with e.g.
> dev_get_regmap() - if every resource that a driver required were handled
> like that, then deferred probe could be significantly isolated into the
> driver core rather than in every driver...
I have to say that I agree with this, notifiers seem to make life more
complicated for limited gain. Otherwise I guess we could enhance
notifiers so that they're able to trigger deferrals?
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* [GIT PULL v3] Renesas ARM-based SoC boards for v3.8 #2
From: Mark Brown @ 2012-11-13 5:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201211122111.03440.arnd@arndb.de>
On Mon, Nov 12, 2012 at 09:11:03PM +0000, Arnd Bergmann wrote:
> * Always let the person that owns the dependency know that the changes in
> their tree are also included elsewhere and that things go bad if those
> changes get rebased after all, or won't make it into the merge window
> for some reason.
Please never pull anything from me unless there's a signed tag for it,
anything else I won't know about and may be rebased or vanish or
something.
> I have taken Mark on Cc to let him know about the dependency now, and I've
> merged ab6f6d85210c4d0265cf48e9958c04e08595055a (which has only shmobile
> specific ASoC patches) into the next/boards2 branch before merging your
> branch. This is still not perfect because it breaks bisection, but it's
> the best I could do aside from forcing you do do another round-trip.
What's the bisection problem?
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* [PATCH 1/2] ARM: kirkwood: Add Plat'Home OpenBlocks A6 support
From: Nobuhiro Iwamatsu @ 2012-11-13 5:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121112211958.GU24583@lunn.ch>
Hi, Andrew.
On Tue, Nov 13, 2012 at 6:19 AM, Andrew Lunn <andrew@lunn.ch> wrote:
> Hi Nobuhiro
>
>> >> + model = "Plat'Home OpenBlocksA6";
>> >> + compatible = "plathome,openblocks-a6", "marvell,kirkwood-88f6283", "marvell,kirkwood";
>> >
>> > Ah, interesting. A 88f6283. I'm a bit surprised this actually works!
>> > This variant is not listed in kirkwood_id(). So do you see messages
>> > like:
>> >
>> > "Device-Unknown"
>> >
>> > and
>> >
>> > "MPP setup: unknown kirkwood variant"
>>
>> No, I can not see these message.
>> 88f6283 is same as MV88F6282-Rev-A1. Because this has same CPU ID as
>> MV88F6282-Rev-A1.
>
> Ah. O.K.
>
> Is it pin compatible? Please take a look at
>
> https://github.com/lunn/linux/blob/v3.7-rc2-pinctrl-v2/drivers/pinctrl/mvebu/pinctrl-kirkwood.c
>
> and see if what is valid for 88f6282 is also valid for 88f6283.
>
> If its not compatible, we need to add this variant to the table.
I confirmed datasheet.
Yes, 88f6283 is pincompatible as 88f6282. 88f6283 does the clock down
of the 88f6282.
>
>> What kind of value should I set here?
>
> For the moment, keep to 88f6283. At the moment its not actually used.
> However, when we add pinctrl we will need to this about this some
> more, depending on if its pin compatible or not.
OK, I keep to 88f6283.
>
>> >> +static unsigned int openblocks_a6_mpp_config[] __initdata = {
>> >> + MPP0_NF_IO2,
>> >> + MPP1_NF_IO3,
>> >> + MPP2_NF_IO4,
>> >> + MPP3_NF_IO5,
>> >> + MPP4_NF_IO6,
>> >> + MPP5_NF_IO7,
>> >> + MPP6_SYSRST_OUTn,
>> >> + /* MPP7_GPO, */
>> >
>> > Any reason not to actually have MPP7_GPO here?
>> > Is it being used as a GPO line?
>>
>> Yes. MPP7 is assigned to GPO in this target boatd.
>> And GPO is not used.
>> The following is also the same.
>> If unnecessary, I will delete these lines.
>
> If they are not used, i would not list them.
>
OK, I will remove.
Best regards,
Nobuhiro
--
Nobuhiro Iwamatsu
iwamatsu at {nigauri.org / debian.org}
GPG ID: 40AD1FA6
^ permalink raw reply
* Build failure: OMAP4430 failed due to exynos4 pinctrl
From: Kukjin Kim @ 2012-11-13 5:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201211121440.13980.arnd@arndb.de>
Arnd Bergmann wrote:
>
[...]
> This won't work. A driver can't "select" and "depend on"
> another symbol at the same time.
>
Ooooops. You're right. I missed :-(
> This is what I came up with earlier.
>
> Arnd
> 8<----------------
> From a15cc6277a3a43c8b5c1dd90ca71732b2ffe2b18 Mon Sep 17 00:00:00 2001
> From: Arnd Bergmann <arnd@arndb.de>
> Date: Wed, 10 Oct 2012 13:31:45 +0000
> Subject: [PATCH] pinctrl: samsung: don't allow enabling pinctrl-samsung
> standalone
>
> The main samsung pinctrl module references the specific exynos4210
> pinctrl driver, which selects the main driver in Kconfig.
>
> Making the main driver a silent "bool" option avoid this potential
> build error if CONFIG_PINCTRL_SAMSUNG=y && CONFIG_PINCTRL_EXYNOS4=n:
>
> drivers/built-in.o:(.rodata+0x4e4): undefined reference to
> `exynos4210_pin_ctrl'
>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> Cc: Tomasz Figa <t.figa@samsung.com>
> Cc: Kyungmin Park <kyungmin.park@samsung.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Linus, can you pick this up in your pinctrl/fixes ree?
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
>
> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
> index 7bf914d..9f54bd4 100644
> --- a/drivers/pinctrl/Kconfig
> +++ b/drivers/pinctrl/Kconfig
> @@ -178,7 +178,7 @@ config PINCTRL_COH901
> ports of 8 GPIO pins each.
>
> config PINCTRL_SAMSUNG
> - bool "Samsung pinctrl driver"
> + bool
> select PINMUX
> select PINCONF
>
^ permalink raw reply
* [PATCH 3/3] ARM: config: tegra: enable SFLASH controller driver
From: Laxman Dewangan @ 2012-11-13 5:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352783021-25393-1-git-send-email-ldewangan@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
arch/arm/configs/tegra_defconfig | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index 9dac09b..39107b1 100644
--- a/arch/arm/configs/tegra_defconfig
+++ b/arch/arm/configs/tegra_defconfig
@@ -120,6 +120,7 @@ CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PINCTRL=y
CONFIG_I2C_TEGRA=y
CONFIG_SPI=y
+CONFIG_SPI_TEGRA20_SFLASH=y
CONFIG_SPI_TEGRA20_SLINK=y
CONFIG_GPIO_PCA953X_IRQ=y
CONFIG_GPIO_TPS6586X=y
--
1.7.1.1
^ permalink raw reply related
* [PATCH 2/3] ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dt
From: Laxman Dewangan @ 2012-11-13 5:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352783021-25393-1-git-send-email-ldewangan@nvidia.com>
Add OF_DEV_AUXDATA for sflash controller driver for Tegra20
board dt files.
Set the parent clock of sflash controller to PLLP and configure
clock to 20MHz.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
arch/arm/mach-tegra/board-dt-tegra20.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index 22f5a9b..1198e84 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -89,6 +89,7 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
&tegra_ehci3_pdata),
OF_DEV_AUXDATA("nvidia,tegra20-apbdma", TEGRA_APB_DMA_BASE, "tegra-apbdma", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra20-sflash", 0x7000c380, "spi", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D400, "spi_tegra.0", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D600, "spi_tegra.1", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D800, "spi_tegra.2", NULL),
@@ -112,6 +113,7 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
{ "sdmmc1", "pll_p", 48000000, false},
{ "sdmmc3", "pll_p", 48000000, false},
{ "sdmmc4", "pll_p", 48000000, false},
+ { "spi", "pll_p", 20000000, false },
{ "sbc1", "pll_p", 100000000, false },
{ "sbc2", "pll_p", 100000000, false },
{ "sbc3", "pll_p", 100000000, false },
--
1.7.1.1
^ permalink raw reply related
* [PATCH 1/3] ARM: tegra: dts: add sflash controller dt entry
From: Laxman Dewangan @ 2012-11-13 5:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352783021-25393-1-git-send-email-ldewangan@nvidia.com>
Nvidia's Tegra20 have the SPI (SFLASH) controller to
interface with spi flash device which is used for system
boot. Add DT entry for this controller.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
arch/arm/boot/dts/tegra20.dtsi | 10 ++++++++++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 71a650d..32cb09d 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -195,6 +195,16 @@
status = "disabled";
};
+ spi at 7000c380 {
+ compatible = "nvidia,tegra20-sflash";
+ reg = <0x7000c380 0x80>;
+ interrupts = <0 39 0x04>;
+ nvidia,dma-request-selector = <&apbdma 11>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
spi at 7000d400 {
compatible = "nvidia,tegra20-slink";
reg = <0x7000d400 0x200>;
--
1.7.1.1
^ permalink raw reply related
* [PATCH 0/3] ARM: tegra: dt: Add entry for tegra20 sflash controller.
From: Laxman Dewangan @ 2012-11-13 5:03 UTC (permalink / raw)
To: linux-arm-kernel
This patch series add the dt entry for tegra20 sflash controller,
add AUXDATA in board dt file for driver name and enable in tegra_defconfig.
Laxman Dewangan (3):
ARM: tegra: dts: add sflash controller dt entry
ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dt
ARM: config: tegra: enable SFLASH controller driver
arch/arm/boot/dts/tegra20.dtsi | 10 ++++++++++
arch/arm/configs/tegra_defconfig | 1 +
arch/arm/mach-tegra/board-dt-tegra20.c | 2 ++
3 files changed, 13 insertions(+), 0 deletions(-)
^ permalink raw reply
* [PATCH 0/7] ARM: remove init_consistent_dma_size() stub
From: Kukjin Kim @ 2012-11-13 4:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201211122121.16219.arnd@arndb.de>
Arnd Bergmann wrote:
>
> Applied patches 2-7 to next/cleanup branch, with the Acks that came in.
>
(- many guys in Cc)
Hi Arnd,
If possible, please adding my ack on Samsung stuff.
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply
* [PATCH 1/7] ARM: EXYNOS: add support for EXYNOS5440 SoC
From: Kukjin Kim @ 2012-11-13 4:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5432090.dpMO1fymRx@flatron>
Tomasz Figa wrote:
>
> Hi Kgene,
>
Hi,
[...]
> > void exynos5_restart(char mode, const char *cmd)
> > {
> > - __raw_writel(0x1, EXYNOS_SWRESET);
> > + u32 val;
> > + void __iomem *addr;
> > +
> > + if (of_machine_is_compatible("samsung,exynos5250")) {
> > + val = 0x1;
> > + addr = EXYNOS_SWRESET;
> > + } else if (of_machine_is_compatible("samsung,exynos5440")) {
> > + val = (0x10 << 20) | (0x1 << 16);
> > + addr = EXYNOS5440_SWRESET;
> > + } else {
> > + pr_err("%s: cannot support non-DT\n", __func__);
> > + return;
> > + }
>
> Why soc_is_XXX isn't used here? It should be faster and more correct than
> of_machine_is_compatible.
>
Well...let me check again.
> I can imagine the same board available with two different SoCs, for which
> of_machine_is_compatible wouldn't work.
>
I don't think so. Basically, the restart() depends on SoC not board in
addition, each board is supposed to have its own SoC not different SoCs.
[...]
> > -static char const *exynos5250_dt_compat[] __initdata = {
> > +static char const *exynos5_dt_compat[] __initdata = {
> > "samsung,exynos5250",
> > + "samsung,exynos5440",
> > NULL
> > };
>
> Something doesn't seem right here. How do you distinguish between
> MACH_EXYNOS5_DT and MACH_EXYNOS5440_DT if both have the same compatible
> matches?
>
I updated to support MACH_EXYNOS5440_DT with MACH_EXYNOS5_DT.
> Those machines doesn't seem to share much definitions, so maybe a separate
> mach-exynos5440-dt.c file would be a better approach?
>
See my updated patch.
> > @@ -96,11 +100,23 @@ DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5
> > (Flattened Device Tree)") /* Maintainer: Kukjin Kim
> > <kgene.kim@samsung.com> */
> > .init_irq = exynos5_init_irq,
> > .smp = smp_ops(exynos_smp_ops),
> > - .map_io = exynos5250_dt_map_io,
> > + .map_io = exynos5_dt_map_io,
> > .handle_irq = gic_handle_irq,
> > - .init_machine = exynos5250_dt_machine_init,
> > + .init_machine = exynos5_dt_machine_init,
> > .init_late = exynos_init_late,
> > .timer = &exynos4_timer,
> > - .dt_compat = exynos5250_dt_compat,
> > + .dt_compat = exynos5_dt_compat,
> > + .restart = exynos5_restart,
> > +MACHINE_END
> > +
> > +DT_MACHINE_START(EXYNOS5440_DT, "SAMSUNG EXYNOS5440 (Flattened Device
> > Tree)") + /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
> > + .init_irq = exynos5_init_irq,
> > + .smp = smp_ops(exynos_smp_ops),
> > + .map_io = exynos5_dt_map_io,
> > + .handle_irq = gic_handle_irq,
> > + .init_machine = exynos5_dt_machine_init,
> > + .timer = &exynos5_timer,
> > + .dt_compat = exynos5_dt_compat,
> > .restart = exynos5_restart,
>
> Since restarts for both differ, why not to add separate exynos5440 restart
> and use it here?
>
As I said above, I don't think so.
[...]
> > @@ -487,6 +489,9 @@ static void __init exynos4_timer_init(void)
> > exynos4x12_clk_init();
> > #endif
> >
> > + if (of_machine_is_compatible("samsung,exynos5440"))
> > + arch_timer_of_register();
> > +
>
> Why exynos4_timer_init is being touched here, if exynos5_timer_init is
> being added?
>
> I would rather keep exynos4_timer (which is used for all Exynos4 SoCs
> and for Exynos5250) as is and define new exynos5250_timer if it needs
> completely different initialization...
>
See updated patch.
[...]
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply
* [PATCH 1/7 v2] ARM: EXYNOS: add support for EXYNOS5440 SoC
From: Kukjin Kim @ 2012-11-13 4:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1351274153-3120-2-git-send-email-kgene.kim@samsung.com>
This patch adds support for EXYNOS5440 SoC which is including
ARM Cortex-A15 Quad cores.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
Changes since v1:
- Removed MACH_EXYNOS5440_DT because we can support it with MACH_EXYNOS5_DT
- Removed exynos_init_uarts() calling because it is not required for DT
- Removed GIC io-mapping entry because DT can support for runtime io-remapping
- Removed exynos5440_dt_irq_match[] table because of exynos5_dt_irq_match[]
- Removed UART resource because it is not required for DT
Note, this is based on Samsun COMMON CLK stuff submitted by Thomas Abraham.
arch/arm/mach-exynos/Kconfig | 12 ++++-
arch/arm/mach-exynos/Makefile | 2 +-
arch/arm/mach-exynos/common.c | 68 +++++++++++++++++++++++--
arch/arm/mach-exynos/include/mach/irqs.h | 5 ++
arch/arm/mach-exynos/include/mach/map.h | 5 ++
arch/arm/mach-exynos/include/mach/regs-pmu.h | 1 +
arch/arm/mach-exynos/mach-exynos5-dt.c | 22 +++++---
arch/arm/mach-exynos/mct.c | 11 +++-
arch/arm/mach-exynos/setup-i2c0.c | 2 +-
arch/arm/plat-samsung/include/plat/cpu.h | 8 +++
drivers/tty/serial/samsung.c | 3 +-
11 files changed, 118 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 1d0d083..418c051 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -68,6 +68,16 @@ config SOC_EXYNOS5250
help
Enable EXYNOS5250 SoC support
+config SOC_EXYNOS5440
+ bool "SAMSUNG EXYNOS5440"
+ default y
+ depends on ARCH_EXYNOS5
+ select ARM_ARCH_TIMER
+ select AUTO_ZRELADDR
+ select COMMON_CLK
+ help
+ Enable EXYNOS5440 SoC support
+
config EXYNOS4_MCT
bool
default y
@@ -418,9 +428,9 @@ config MACH_EXYNOS4_DT
config MACH_EXYNOS5_DT
bool "SAMSUNG EXYNOS5 Machine using device tree"
+ default y
depends on ARCH_EXYNOS5
select ARM_AMBA
- select SOC_EXYNOS5250
select USE_OF
help
Machine support for Samsung EXYNOS5 machine with device tree enabled.
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index ad66c9f4..0dcf389 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -13,7 +13,7 @@ obj- :=
# Core
obj-$(CONFIG_ARCH_EXYNOS) += common.o
-obj-$(CONFIG_ARCH_EXYNOS5) += clock-exynos5.o
+obj-$(CONFIG_SOC_EXYNOS5250) += clock-exynos5.o
obj-$(CONFIG_PM) += pm.o
obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 1ca2d88..2891ff4 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -58,9 +58,11 @@ static const char name_exynos4210[] = "EXYNOS4210";
static const char name_exynos4212[] = "EXYNOS4212";
static const char name_exynos4412[] = "EXYNOS4412";
static const char name_exynos5250[] = "EXYNOS5250";
+static const char name_exynos5440[] = "EXYNOS5440";
static void exynos4_map_io(void);
static void exynos5_map_io(void);
+static void exynos5440_map_io(void);
static void exynos5_init_clocks(int xtal);
static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no);
static int exynos_init(void);
@@ -95,6 +97,12 @@ static struct cpu_table cpu_ids[] __initdata = {
.init_uarts = exynos_init_uarts,
.init = exynos_init,
.name = name_exynos5250,
+ }, {
+ .idcode = EXYNOS5440_SOC_ID,
+ .idmask = EXYNOS5_SOC_MASK,
+ .map_io = exynos5440_map_io,
+ .init = exynos_init,
+ .name = name_exynos5440,
},
};
@@ -109,6 +117,15 @@ static struct map_desc exynos_iodesc[] __initdata = {
},
};
+static struct map_desc exynos5440_iodesc[] __initdata = {
+ {
+ .virtual = (unsigned long)S5P_VA_CHIPID,
+ .pfn = __phys_to_pfn(EXYNOS5440_PA_CHIPID),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ },
+};
+
static struct map_desc exynos4_iodesc[] __initdata = {
{
.virtual = (unsigned long)S3C_VA_SYS,
@@ -275,6 +292,15 @@ static struct map_desc exynos5_iodesc[] __initdata = {
},
};
+static struct map_desc exynos5440_iodesc0[] __initdata = {
+ {
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(EXYNOS5440_PA_UART0),
+ .length = SZ_512K,
+ .type = MT_DEVICE,
+ },
+};
+
void exynos4_restart(char mode, const char *cmd)
{
__raw_writel(0x1, S5P_SWRESET);
@@ -282,11 +308,29 @@ void exynos4_restart(char mode, const char *cmd)
void exynos5_restart(char mode, const char *cmd)
{
- __raw_writel(0x1, EXYNOS_SWRESET);
+ u32 val;
+ void __iomem *addr;
+
+ if (of_machine_is_compatible("samsung,exynos5250")) {
+ val = 0x1;
+ addr = EXYNOS_SWRESET;
+ } else if (of_machine_is_compatible("samsung,exynos5440")) {
+ val = (0x10 << 20) | (0x1 << 16);
+ addr = EXYNOS5440_SWRESET;
+ } else {
+ pr_err("%s: cannot support non-DT\n", __func__);
+ return;
+ }
+
+ __raw_writel(val, addr);
}
void __init exynos_init_late(void)
{
+ if (of_machine_is_compatible("samsung,exynos5440"))
+ /* to be supported later */
+ return;
+
exynos_pm_late_initcall();
}
@@ -299,7 +343,11 @@ void __init exynos_init_late(void)
void __init exynos_init_io(struct map_desc *mach_desc, int size)
{
/* initialize the io descriptors we need for initialization */
- iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
+ if (of_machine_is_compatible("samsung,exynos5440"))
+ iotable_init(exynos5440_iodesc, ARRAY_SIZE(exynos5440_iodesc));
+ else
+ iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
+
if (mach_desc)
iotable_init(mach_desc, size);
@@ -369,6 +417,11 @@ static void __init exynos5_map_io(void)
s3c64xx_spi_setname("exynos4210-spi");
}
+static void __init exynos5440_map_io(void)
+{
+ iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0));
+}
+
static void __init exynos5_init_clocks(int xtal)
{
printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
@@ -586,8 +639,9 @@ int __init combiner_of_init(struct device_node *np, struct device_node *parent)
return 0;
}
-static const struct of_device_id exynos4_dt_irq_match[] = {
+static const struct of_device_id exynos_dt_irq_match[] = {
{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+ { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, },
{ .compatible = "samsung,exynos4210-combiner",
.data = combiner_of_init, },
{},
@@ -604,7 +658,7 @@ void __init exynos4_init_irq(void)
gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
#ifdef CONFIG_OF
else
- of_irq_init(exynos4_dt_irq_match);
+ of_irq_init(exynos_dt_irq_match);
#endif
if (!of_have_populated_dt())
@@ -621,7 +675,7 @@ void __init exynos4_init_irq(void)
void __init exynos5_init_irq(void)
{
#ifdef CONFIG_OF
- of_irq_init(exynos4_dt_irq_match);
+ of_irq_init(exynos_dt_irq_match);
#endif
/*
* The parameters of s5p_init_irq() are for VIC init.
@@ -651,7 +705,7 @@ static int __init exynos4_l2x0_cache_init(void)
{
int ret;
- if (soc_is_exynos5250())
+ if (soc_is_exynos5250() || soc_is_exynos5440())
return 0;
ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
@@ -992,6 +1046,8 @@ static int __init exynos_init_irq_eint(void)
}
}
#endif
+ if (soc_is_exynos5440())
+ return 0;
if (soc_is_exynos5250())
exynos_eint_base = ioremap(EXYNOS5_PA_GPIO1, SZ_4K);
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 35bced6..f43a96c 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -333,6 +333,11 @@
#define EXYNOS5_IRQ_FIMC_LITE1 IRQ_SPI(126)
#define EXYNOS5_IRQ_RP_TIMER IRQ_SPI(127)
+/* EXYNOS5440 */
+
+#define EXYNOS5440_IRQ_UART0 IRQ_SPI(2)
+#define EXYNOS5440_IRQ_UART1 IRQ_SPI(3)
+
#define EXYNOS5_IRQ_PMU COMBINER_IRQ(1, 2)
#define EXYNOS5_IRQ_SYSMMU_GSC0_0 COMBINER_IRQ(2, 0)
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 8480849..aa3760e 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -53,6 +53,7 @@
#define EXYNOS4_PA_ONENAND_DMA 0x0C600000
#define EXYNOS_PA_CHIPID 0x10000000
+#define EXYNOS5440_PA_CHIPID 0x00160000
#define EXYNOS4_PA_SYSCON 0x10010000
#define EXYNOS5_PA_SYSCON 0x10050100
@@ -281,6 +282,10 @@
#define EXYNOS5_PA_UART3 0x12C30000
#define EXYNOS5_SZ_UART SZ_256
+#define EXYNOS5440_PA_UART0 0x000B0000
+#define EXYNOS5440_PA_UART1 0x000C0000
+#define EXYNOS5440_SZ_UART SZ_256
+
#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
index d4e392b..c0b74f3 100644
--- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@ -31,6 +31,7 @@
#define S5P_SWRESET S5P_PMUREG(0x0400)
#define EXYNOS_SWRESET S5P_PMUREG(0x0400)
+#define EXYNOS5440_SWRESET S5P_PMUREG(0x00C4)
#define S5P_WAKEUP_STAT S5P_PMUREG(0x0600)
#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604)
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index db1cd8e..3b82a1a 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -75,20 +75,24 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
{},
};
-static void __init exynos5250_dt_map_io(void)
+static void __init exynos5_dt_map_io(void)
{
exynos_init_io(NULL, 0);
- s3c24xx_init_clocks(24000000);
+
+ if (of_machine_is_compatible("samsung,exynos5250"))
+ s3c24xx_init_clocks(24000000);
}
-static void __init exynos5250_dt_machine_init(void)
+static void __init exynos5_dt_machine_init(void)
{
- of_platform_populate(NULL, of_default_bus_match_table,
- exynos5250_auxdata_lookup, NULL);
+ if (of_machine_is_compatible("samsung,exynos5250"))
+ of_platform_populate(NULL, of_default_bus_match_table,
+ exynos5250_auxdata_lookup, NULL);
}
-static char const *exynos5250_dt_compat[] __initdata = {
+static char const *exynos5_dt_compat[] __initdata = {
"samsung,exynos5250",
+ "samsung,exynos5440",
NULL
};
@@ -96,11 +100,11 @@ DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
.init_irq = exynos5_init_irq,
.smp = smp_ops(exynos_smp_ops),
- .map_io = exynos5250_dt_map_io,
+ .map_io = exynos5_dt_map_io,
.handle_irq = gic_handle_irq,
- .init_machine = exynos5250_dt_machine_init,
+ .init_machine = exynos5_dt_machine_init,
.init_late = exynos_init_late,
.timer = &exynos4_timer,
- .dt_compat = exynos5250_dt_compat,
+ .dt_compat = exynos5_dt_compat,
.restart = exynos5_restart,
MACHINE_END
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index cc3805a..8d05cf1 100644
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -19,7 +19,9 @@
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/percpu.h>
+#include <linux/of.h>
+#include <asm/arch_timer.h>
#include <asm/hardware/gic.h>
#include <asm/localtimer.h>
@@ -478,7 +480,7 @@ static void __init exynos4_timer_resources(void)
#endif /* CONFIG_LOCAL_TIMERS */
}
-static void __init exynos4_timer_init(void)
+static void __init exynos_timer_init(void)
{
#ifdef CONFIG_COMMON_CLK
if (soc_is_exynos4210())
@@ -487,6 +489,11 @@ static void __init exynos4_timer_init(void)
exynos4x12_clk_init();
#endif
+ if (soc_is_exynos5440()) {
+ arch_timer_of_register();
+ return;
+ }
+
if ((soc_is_exynos4210()) || (soc_is_exynos5250()))
mct_int_type = MCT_INT_SPI;
else
@@ -498,5 +505,5 @@ static void __init exynos4_timer_init(void)
}
struct sys_timer exynos4_timer = {
- .init = exynos4_timer_init,
+ .init = exynos_timer_init,
};
diff --git a/arch/arm/mach-exynos/setup-i2c0.c b/arch/arm/mach-exynos/setup-i2c0.c
index 5700f23..e2d9dfb 100644
--- a/arch/arm/mach-exynos/setup-i2c0.c
+++ b/arch/arm/mach-exynos/setup-i2c0.c
@@ -20,7 +20,7 @@ struct platform_device; /* don't need the contents */
void s3c_i2c0_cfg_gpio(struct platform_device *dev)
{
- if (soc_is_exynos5250())
+ if (soc_is_exynos5250() || soc_is_exynos5440())
/* will be implemented with gpio function */
return;
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index ace4451..e0072ce 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -43,6 +43,7 @@ extern unsigned long samsung_cpu_id;
#define EXYNOS4_CPU_MASK 0xFFFE0000
#define EXYNOS5250_SOC_ID 0x43520000
+#define EXYNOS5440_SOC_ID 0x54400000
#define EXYNOS5_SOC_MASK 0xFFFFF000
#define IS_SAMSUNG_CPU(name, id, mask) \
@@ -62,6 +63,7 @@ IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
+IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \
@@ -130,6 +132,12 @@ IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
# define soc_is_exynos5250() 0
#endif
+#if defined(CONFIG_SOC_EXYNOS5440)
+# define soc_is_exynos5440() is_samsung_exynos5440()
+#else
+# define soc_is_exynos5440() 0
+#endif
+
#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
#ifndef KHZ
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 7f04717..0e26a16 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1646,7 +1646,8 @@ static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = {
#endif
#if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212) || \
- defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250)
+ defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250) || \
+ defined(CONFIG_SOC_EXYNOS5440)
static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = {
.info = &(struct s3c24xx_uart_info) {
.name = "Samsung Exynos4 UART",
--
1.7.4.1
^ permalink raw reply related
* [PATCH v2] Add support for generic BCM SoC chipsets
From: Stephen Warren @ 2012-11-13 4:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352645834-10173-1-git-send-email-csd@broadcom.com>
On 11/11/2012 07:57 AM, Christian Daudt wrote:
> In order to start upstreaming Broadcom SoC support, create
> a starting hierarchy, arch and dts files.
> The first support SoC family that is planned is the
> BCM281XX (BCM28145/28150/28155/28160) family of dual A9 mobile SoC cores
> This code is just the skeleton code for get the machine upstreamed. It
> has been made MULTIPLATFORM compatible.
> Next steps
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> +dtb-$(CONFIG_ARCH_BCM) += capri-brt.dtb
I think that needs to be renamed too.
> diff --git a/arch/arm/boot/dts/bcm281xx.dtsi b/arch/arm/boot/dts/bcm281xx.dtsi
> +/ {
> + model = "BCM281xx SoC";
> + compatible = "bcm,bcm281xx";
I think this should list the specific SoC rather than (or perhaps in
addition to) a wildcard.
Out of curiosity though, what kind of differences exist between the
various SoCs this wildcard is intended to cover;
bcm28145/28150/28155/28160? Are they simply package/pinout differences,
or something more involved?
> + uart at 3e000000 {
> + compatible = "snps,dw-apb-uart";
As I mentioned in my earlier reply, I think this should indicate the
specific instantiation of the IP too; something like
bcm,bcm28160-dw-apb-uart.
> diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
> + help
> + This enables support for system based on Broadcom SoCs.
> + It currently supports BCM28145/28150/28155/28160 chips.
The indentation looks a little odd there.
> diff --git a/arch/arm/mach-bcm/board_bcm.c b/arch/arm/mach-bcm/board_bcm.c
> +static const char * const capri_dt_compat[] = { "bcm,capri", NULL, };
I think that needs to be updated too.
^ permalink raw reply
* linux-next: manual merge of the arm-soc tree with the usb tree
From: Stephen Rothwell @ 2012-11-13 4:20 UTC (permalink / raw)
To: linux-arm-kernel
Hi all,
Today's linux-next merge of the arm-soc tree got a conflict in arch/arm/configs/stamp9g20_defconfig between commit 77614e025061 ("arch: Change defconfigs to point to g_mass_storage") from the usb tree and commit 2484575268e2 ("arm: at91: drop machine defconfig") from the arm-soc tree.
The latter deleted the file so I did that and can carry the fix as
necessary (no action is required).
--
Cheers,
Stephen Rothwell sfr at canb.auug.org.au
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^ permalink raw reply
* linux-next: manual merge of the arm-soc tree with the pinctrl tree
From: Stephen Rothwell @ 2012-11-13 4:17 UTC (permalink / raw)
To: linux-arm-kernel
Hi all,
Today's linux-next merge of the arm-soc tree got a conflict in
drivers/tty/serial/atmel_serial.c between commit 784557decc48 ("tty:
atmel_serial: add pinctrl support") from the pinctrl tree and commit
bcd2360c1ff9 ("arm: at91: move platfarm_data to
include/linux/platform_data/atmel.h") from the arm-soc tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwell sfr at canb.auug.org.au
diff --cc drivers/tty/serial/atmel_serial.c
index 65f891b,5660ec2..0000000
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@@ -39,7 -39,7 +39,8 @@@
#include <linux/atmel_pdc.h>
#include <linux/atmel_serial.h>
#include <linux/uaccess.h>
+#include <linux/pinctrl/consumer.h>
+ #include <linux/platform_data/atmel.h>
#include <asm/io.h>
#include <asm/ioctls.h>
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^ permalink raw reply
* linux-next: manual merge of the arm-soc tree with the net-next tree
From: Stephen Rothwell @ 2012-11-13 4:15 UTC (permalink / raw)
To: linux-arm-kernel
Hi all,
Today's linux-next merge of the arm-soc tree got a conflict in
drivers/net/ethernet/cadence/at91_ether.c between various commits from
the net-next tree and commit bcd2360c1ff9 ("arm: at91: move platfarm_data
to include/linux/platform_data/atmel.h") from the arm-soc tree.
I fixed it up (I think - see below) and can carry the fix as necessary
(no action is required).
--
Cheers,
Stephen Rothwell sfr at canb.auug.org.au
diff --cc drivers/net/ethernet/cadence/at91_ether.c
index e7a476c,35fc6edb..0000000
--- a/drivers/net/ethernet/cadence/at91_ether.c
+++ b/drivers/net/ethernet/cadence/at91_ether.c
@@@ -25,53 -31,728 +25,54 @@@
#include <linux/clk.h>
#include <linux/gfp.h>
#include <linux/phy.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_net.h>
+#include <linux/pinctrl/consumer.h>
+ #include <linux/platform_data/atmel.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-#include <asm/mach-types.h>
-
-#include <mach/at91rm9200_emac.h>
-#include <asm/gpio.h>
-
-#include "at91_ether.h"
-
-#define DRV_NAME "at91_ether"
-#define DRV_VERSION "1.0"
-
-#define LINK_POLL_INTERVAL (HZ)
-
-/* ..................................................................... */
-
-/*
- * Read from a EMAC register.
- */
-static inline unsigned long at91_emac_read(struct at91_private *lp, unsigned int reg)
-{
- return __raw_readl(lp->emac_base + reg);
-}
-
-/*
- * Write to a EMAC register.
- */
-static inline void at91_emac_write(struct at91_private *lp, unsigned int reg, unsigned long value)
-{
- __raw_writel(value, lp->emac_base + reg);
-}
-
-/* ........................... PHY INTERFACE ........................... */
-
-/*
- * Enable the MDIO bit in MAC control register
- * When not called from an interrupt-handler, access to the PHY must be
- * protected by a spinlock.
- */
-static void enable_mdi(struct at91_private *lp)
-{
- unsigned long ctl;
-
- ctl = at91_emac_read(lp, AT91_EMAC_CTL);
- at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_MPE); /* enable management port */
-}
-
-/*
- * Disable the MDIO bit in the MAC control register
- */
-static void disable_mdi(struct at91_private *lp)
-{
- unsigned long ctl;
-
- ctl = at91_emac_read(lp, AT91_EMAC_CTL);
- at91_emac_write(lp, AT91_EMAC_CTL, ctl & ~AT91_EMAC_MPE); /* disable management port */
-}
-
-/*
- * Wait until the PHY operation is complete.
- */
-static inline void at91_phy_wait(struct at91_private *lp)
-{
- unsigned long timeout = jiffies + 2;
-
- while (!(at91_emac_read(lp, AT91_EMAC_SR) & AT91_EMAC_SR_IDLE)) {
- if (time_after(jiffies, timeout)) {
- printk("at91_ether: MIO timeout\n");
- break;
- }
- cpu_relax();
- }
-}
-
-/*
- * Write value to the a PHY register
- * Note: MDI interface is assumed to already have been enabled.
- */
-static void write_phy(struct at91_private *lp, unsigned char phy_addr, unsigned char address, unsigned int value)
-{
- at91_emac_write(lp, AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_W
- | ((phy_addr & 0x1f) << 23) | (address << 18) | (value & AT91_EMAC_DATA));
-
- /* Wait until IDLE bit in Network Status register is cleared */
- at91_phy_wait(lp);
-}
-
-/*
- * Read value stored in a PHY register.
- * Note: MDI interface is assumed to already have been enabled.
- */
-static void read_phy(struct at91_private *lp, unsigned char phy_addr, unsigned char address, unsigned int *value)
-{
- at91_emac_write(lp, AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_R
- | ((phy_addr & 0x1f) << 23) | (address << 18));
-
- /* Wait until IDLE bit in Network Status register is cleared */
- at91_phy_wait(lp);
-
- *value = at91_emac_read(lp, AT91_EMAC_MAN) & AT91_EMAC_DATA;
-}
-
-/* ........................... PHY MANAGEMENT .......................... */
-
-/*
- * Access the PHY to determine the current link speed and mode, and update the
- * MAC accordingly.
- * If no link or auto-negotiation is busy, then no changes are made.
- */
-static void update_linkspeed(struct net_device *dev, int silent)
-{
- struct at91_private *lp = netdev_priv(dev);
- unsigned int bmsr, bmcr, lpa, mac_cfg;
- unsigned int speed, duplex;
-
- if (!mii_link_ok(&lp->mii)) { /* no link */
- netif_carrier_off(dev);
- if (!silent)
- printk(KERN_INFO "%s: Link down.\n", dev->name);
- return;
- }
-
- /* Link up, or auto-negotiation still in progress */
- read_phy(lp, lp->phy_address, MII_BMSR, &bmsr);
- read_phy(lp, lp->phy_address, MII_BMCR, &bmcr);
- if (bmcr & BMCR_ANENABLE) { /* AutoNegotiation is enabled */
- if (!(bmsr & BMSR_ANEGCOMPLETE))
- return; /* Do nothing - another interrupt generated when negotiation complete */
-
- read_phy(lp, lp->phy_address, MII_LPA, &lpa);
- if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF)) speed = SPEED_100;
- else speed = SPEED_10;
- if ((lpa & LPA_100FULL) || (lpa & LPA_10FULL)) duplex = DUPLEX_FULL;
- else duplex = DUPLEX_HALF;
- } else {
- speed = (bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10;
- duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
- }
-
- /* Update the MAC */
- mac_cfg = at91_emac_read(lp, AT91_EMAC_CFG) & ~(AT91_EMAC_SPD | AT91_EMAC_FD);
- if (speed == SPEED_100) {
- if (duplex == DUPLEX_FULL) /* 100 Full Duplex */
- mac_cfg |= AT91_EMAC_SPD | AT91_EMAC_FD;
- else /* 100 Half Duplex */
- mac_cfg |= AT91_EMAC_SPD;
- } else {
- if (duplex == DUPLEX_FULL) /* 10 Full Duplex */
- mac_cfg |= AT91_EMAC_FD;
- else {} /* 10 Half Duplex */
- }
- at91_emac_write(lp, AT91_EMAC_CFG, mac_cfg);
-
- if (!silent)
- printk(KERN_INFO "%s: Link now %i-%s\n", dev->name, speed, (duplex == DUPLEX_FULL) ? "FullDuplex" : "HalfDuplex");
- netif_carrier_on(dev);
-}
-
-/*
- * Handle interrupts from the PHY
- */
-static irqreturn_t at91ether_phy_interrupt(int irq, void *dev_id)
-{
- struct net_device *dev = (struct net_device *) dev_id;
- struct at91_private *lp = netdev_priv(dev);
- unsigned int phy;
-
- /*
- * This hander is triggered on both edges, but the PHY chips expect
- * level-triggering. We therefore have to check if the PHY actually has
- * an IRQ pending.
- */
- enable_mdi(lp);
- if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) {
- read_phy(lp, lp->phy_address, MII_DSINTR_REG, &phy); /* ack interrupt in Davicom PHY */
- if (!(phy & (1 << 0)))
- goto done;
- }
- else if (lp->phy_type == MII_LXT971A_ID) {
- read_phy(lp, lp->phy_address, MII_ISINTS_REG, &phy); /* ack interrupt in Intel PHY */
- if (!(phy & (1 << 2)))
- goto done;
- }
- else if (lp->phy_type == MII_BCM5221_ID) {
- read_phy(lp, lp->phy_address, MII_BCMINTR_REG, &phy); /* ack interrupt in Broadcom PHY */
- if (!(phy & (1 << 0)))
- goto done;
- }
- else if (lp->phy_type == MII_KS8721_ID) {
- read_phy(lp, lp->phy_address, MII_TPISTATUS, &phy); /* ack interrupt in Micrel PHY */
- if (!(phy & ((1 << 2) | 1)))
- goto done;
- }
- else if (lp->phy_type == MII_T78Q21x3_ID) { /* ack interrupt in Teridian PHY */
- read_phy(lp, lp->phy_address, MII_T78Q21INT_REG, &phy);
- if (!(phy & ((1 << 2) | 1)))
- goto done;
- }
- else if (lp->phy_type == MII_DP83848_ID) {
- read_phy(lp, lp->phy_address, MII_DPPHYSTS_REG, &phy); /* ack interrupt in DP83848 PHY */
- if (!(phy & (1 << 7)))
- goto done;
- }
-
- update_linkspeed(dev, 0);
-
-done:
- disable_mdi(lp);
-
- return IRQ_HANDLED;
-}
-
-/*
- * Initialize and enable the PHY interrupt for link-state changes
- */
-static void enable_phyirq(struct net_device *dev)
-{
- struct at91_private *lp = netdev_priv(dev);
- unsigned int dsintr, irq_number;
- int status;
-
- if (!gpio_is_valid(lp->board_data.phy_irq_pin)) {
- /*
- * PHY doesn't have an IRQ pin (RTL8201, DP83847, AC101L),
- * or board does not have it connected.
- */
- mod_timer(&lp->check_timer, jiffies + LINK_POLL_INTERVAL);
- return;
- }
-
- irq_number = gpio_to_irq(lp->board_data.phy_irq_pin);
- status = request_irq(irq_number, at91ether_phy_interrupt, 0, dev->name, dev);
- if (status) {
- printk(KERN_ERR "at91_ether: PHY IRQ %d request failed - status %d!\n", irq_number, status);
- return;
- }
-
- spin_lock_irq(&lp->lock);
- enable_mdi(lp);
-
- if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { /* for Davicom PHY */
- read_phy(lp, lp->phy_address, MII_DSINTR_REG, &dsintr);
- dsintr = dsintr & ~0xf00; /* clear bits 8..11 */
- write_phy(lp, lp->phy_address, MII_DSINTR_REG, dsintr);
- }
- else if (lp->phy_type == MII_LXT971A_ID) { /* for Intel PHY */
- read_phy(lp, lp->phy_address, MII_ISINTE_REG, &dsintr);
- dsintr = dsintr | 0xf2; /* set bits 1, 4..7 */
- write_phy(lp, lp->phy_address, MII_ISINTE_REG, dsintr);
- }
- else if (lp->phy_type == MII_BCM5221_ID) { /* for Broadcom PHY */
- dsintr = (1 << 15) | ( 1 << 14);
- write_phy(lp, lp->phy_address, MII_BCMINTR_REG, dsintr);
- }
- else if (lp->phy_type == MII_KS8721_ID) { /* for Micrel PHY */
- dsintr = (1 << 10) | ( 1 << 8);
- write_phy(lp, lp->phy_address, MII_TPISTATUS, dsintr);
- }
- else if (lp->phy_type == MII_T78Q21x3_ID) { /* for Teridian PHY */
- read_phy(lp, lp->phy_address, MII_T78Q21INT_REG, &dsintr);
- dsintr = dsintr | 0x500; /* set bits 8, 10 */
- write_phy(lp, lp->phy_address, MII_T78Q21INT_REG, dsintr);
- }
- else if (lp->phy_type == MII_DP83848_ID) { /* National Semiconductor DP83848 PHY */
- read_phy(lp, lp->phy_address, MII_DPMISR_REG, &dsintr);
- dsintr = dsintr | 0x3c; /* set bits 2..5 */
- write_phy(lp, lp->phy_address, MII_DPMISR_REG, dsintr);
- read_phy(lp, lp->phy_address, MII_DPMICR_REG, &dsintr);
- dsintr = dsintr | 0x3; /* set bits 0,1 */
- write_phy(lp, lp->phy_address, MII_DPMICR_REG, dsintr);
- }
-
- disable_mdi(lp);
- spin_unlock_irq(&lp->lock);
-}
-
-/*
- * Disable the PHY interrupt
- */
-static void disable_phyirq(struct net_device *dev)
-{
- struct at91_private *lp = netdev_priv(dev);
- unsigned int dsintr;
- unsigned int irq_number;
-
- if (!gpio_is_valid(lp->board_data.phy_irq_pin)) {
- del_timer_sync(&lp->check_timer);
- return;
- }
-
- spin_lock_irq(&lp->lock);
- enable_mdi(lp);
-
- if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { /* for Davicom PHY */
- read_phy(lp, lp->phy_address, MII_DSINTR_REG, &dsintr);
- dsintr = dsintr | 0xf00; /* set bits 8..11 */
- write_phy(lp, lp->phy_address, MII_DSINTR_REG, dsintr);
- }
- else if (lp->phy_type == MII_LXT971A_ID) { /* for Intel PHY */
- read_phy(lp, lp->phy_address, MII_ISINTE_REG, &dsintr);
- dsintr = dsintr & ~0xf2; /* clear bits 1, 4..7 */
- write_phy(lp, lp->phy_address, MII_ISINTE_REG, dsintr);
- }
- else if (lp->phy_type == MII_BCM5221_ID) { /* for Broadcom PHY */
- read_phy(lp, lp->phy_address, MII_BCMINTR_REG, &dsintr);
- dsintr = ~(1 << 14);
- write_phy(lp, lp->phy_address, MII_BCMINTR_REG, dsintr);
- }
- else if (lp->phy_type == MII_KS8721_ID) { /* for Micrel PHY */
- read_phy(lp, lp->phy_address, MII_TPISTATUS, &dsintr);
- dsintr = ~((1 << 10) | (1 << 8));
- write_phy(lp, lp->phy_address, MII_TPISTATUS, dsintr);
- }
- else if (lp->phy_type == MII_T78Q21x3_ID) { /* for Teridian PHY */
- read_phy(lp, lp->phy_address, MII_T78Q21INT_REG, &dsintr);
- dsintr = dsintr & ~0x500; /* clear bits 8, 10 */
- write_phy(lp, lp->phy_address, MII_T78Q21INT_REG, dsintr);
- }
- else if (lp->phy_type == MII_DP83848_ID) { /* National Semiconductor DP83848 PHY */
- read_phy(lp, lp->phy_address, MII_DPMICR_REG, &dsintr);
- dsintr = dsintr & ~0x3; /* clear bits 0, 1 */
- write_phy(lp, lp->phy_address, MII_DPMICR_REG, dsintr);
- read_phy(lp, lp->phy_address, MII_DPMISR_REG, &dsintr);
- dsintr = dsintr & ~0x3c; /* clear bits 2..5 */
- write_phy(lp, lp->phy_address, MII_DPMISR_REG, dsintr);
- }
-
- disable_mdi(lp);
- spin_unlock_irq(&lp->lock);
-
- irq_number = gpio_to_irq(lp->board_data.phy_irq_pin);
- free_irq(irq_number, dev); /* Free interrupt handler */
-}
-
-/*
- * Perform a software reset of the PHY.
- */
-#if 0
-static void reset_phy(struct net_device *dev)
-{
- struct at91_private *lp = netdev_priv(dev);
- unsigned int bmcr;
-
- spin_lock_irq(&lp->lock);
- enable_mdi(lp);
-
- /* Perform PHY reset */
- write_phy(lp, lp->phy_address, MII_BMCR, BMCR_RESET);
-
- /* Wait until PHY reset is complete */
- do {
- read_phy(lp, lp->phy_address, MII_BMCR, &bmcr);
- } while (!(bmcr & BMCR_RESET));
-
- disable_mdi(lp);
- spin_unlock_irq(&lp->lock);
-}
-#endif
-
-static void at91ether_check_link(unsigned long dev_id)
-{
- struct net_device *dev = (struct net_device *) dev_id;
- struct at91_private *lp = netdev_priv(dev);
-
- enable_mdi(lp);
- update_linkspeed(dev, 1);
- disable_mdi(lp);
-
- mod_timer(&lp->check_timer, jiffies + LINK_POLL_INTERVAL);
-}
-
-/*
- * Perform any PHY-specific initialization.
- */
-static void __init initialize_phy(struct at91_private *lp)
-{
- unsigned int val;
-
- spin_lock_irq(&lp->lock);
- enable_mdi(lp);
-
- if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) {
- read_phy(lp, lp->phy_address, MII_DSCR_REG, &val);
- if ((val & (1 << 10)) == 0) /* DSCR bit 10 is 0 -- fiber mode */
- lp->phy_media = PORT_FIBRE;
- } else if (machine_is_csb337()) {
- /* mix link activity status into LED2 link state */
- write_phy(lp, lp->phy_address, MII_LEDCTRL_REG, 0x0d22);
- } else if (machine_is_ecbat91())
- write_phy(lp, lp->phy_address, MII_LEDCTRL_REG, 0x156A);
-
- disable_mdi(lp);
- spin_unlock_irq(&lp->lock);
-}
-
-/* ......................... ADDRESS MANAGEMENT ........................ */
-
-/*
- * NOTE: Your bootloader must always set the MAC address correctly before
- * booting into Linux.
- *
- * - It must always set the MAC address after reset, even if it doesn't
- * happen to access the Ethernet while it's booting. Some versions of
- * U-Boot on the AT91RM9200-DK do not do this.
- *
- * - Likewise it must store the addresses in the correct byte order.
- * MicroMonitor (uMon) on the CSB337 does this incorrectly (and
- * continues to do so, for bug-compatibility).
- */
-
-static short __init unpack_mac_address(struct net_device *dev, unsigned int hi, unsigned int lo)
-{
- char addr[6];
-
- if (machine_is_csb337()) {
- addr[5] = (lo & 0xff); /* The CSB337 bootloader stores the MAC the wrong-way around */
- addr[4] = (lo & 0xff00) >> 8;
- addr[3] = (lo & 0xff0000) >> 16;
- addr[2] = (lo & 0xff000000) >> 24;
- addr[1] = (hi & 0xff);
- addr[0] = (hi & 0xff00) >> 8;
- }
- else {
- addr[0] = (lo & 0xff);
- addr[1] = (lo & 0xff00) >> 8;
- addr[2] = (lo & 0xff0000) >> 16;
- addr[3] = (lo & 0xff000000) >> 24;
- addr[4] = (hi & 0xff);
- addr[5] = (hi & 0xff00) >> 8;
- }
-
- if (is_valid_ether_addr(addr)) {
- memcpy(dev->dev_addr, &addr, 6);
- return 1;
- }
- return 0;
-}
-
-/*
- * Set the ethernet MAC address in dev->dev_addr
- */
-static void __init get_mac_address(struct net_device *dev)
-{
- struct at91_private *lp = netdev_priv(dev);
-
- /* Check Specific-Address 1 */
- if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA1H), at91_emac_read(lp, AT91_EMAC_SA1L)))
- return;
- /* Check Specific-Address 2 */
- if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA2H), at91_emac_read(lp, AT91_EMAC_SA2L)))
- return;
- /* Check Specific-Address 3 */
- if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA3H), at91_emac_read(lp, AT91_EMAC_SA3L)))
- return;
- /* Check Specific-Address 4 */
- if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA4H), at91_emac_read(lp, AT91_EMAC_SA4L)))
- return;
-
- printk(KERN_ERR "at91_ether: Your bootloader did not configure a MAC address.\n");
-}
-
-/*
- * Program the hardware MAC address from dev->dev_addr.
- */
-static void update_mac_address(struct net_device *dev)
-{
- struct at91_private *lp = netdev_priv(dev);
-
- at91_emac_write(lp, AT91_EMAC_SA1L, (dev->dev_addr[3] << 24) | (dev->dev_addr[2] << 16) | (dev->dev_addr[1] << 8) | (dev->dev_addr[0]));
- at91_emac_write(lp, AT91_EMAC_SA1H, (dev->dev_addr[5] << 8) | (dev->dev_addr[4]));
-
- at91_emac_write(lp, AT91_EMAC_SA2L, 0);
- at91_emac_write(lp, AT91_EMAC_SA2H, 0);
-}
-
-/*
- * Store the new hardware address in dev->dev_addr, and update the MAC.
- */
-static int set_mac_address(struct net_device *dev, void* addr)
-{
- struct sockaddr *address = addr;
-
- if (!is_valid_ether_addr(address->sa_data))
- return -EADDRNOTAVAIL;
-
- memcpy(dev->dev_addr, address->sa_data, dev->addr_len);
- update_mac_address(dev);
+#include "macb.h"
- printk("%s: Setting MAC address to %pM\n", dev->name,
- dev->dev_addr);
+/* 1518 rounded up */
+#define MAX_RBUFF_SZ 0x600
+/* max number of receive buffers */
+#define MAX_RX_DESCR 9
- return 0;
-}
-
-static int inline hash_bit_value(int bitnr, __u8 *addr)
-{
- if (addr[bitnr / 8] & (1 << (bitnr % 8)))
- return 1;
- return 0;
-}
-
-/*
- * The hash address register is 64 bits long and takes up two locations in the memory map.
- * The least significant bits are stored in EMAC_HSL and the most significant
- * bits in EMAC_HSH.
- *
- * The unicast hash enable and the multicast hash enable bits in the network configuration
- * register enable the reception of hash matched frames. The destination address is
- * reduced to a 6 bit index into the 64 bit hash register using the following hash function.
- * The hash function is an exclusive or of every sixth bit of the destination address.
- * hash_index[5] = da[5] ^ da[11] ^ da[17] ^ da[23] ^ da[29] ^ da[35] ^ da[41] ^ da[47]
- * hash_index[4] = da[4] ^ da[10] ^ da[16] ^ da[22] ^ da[28] ^ da[34] ^ da[40] ^ da[46]
- * hash_index[3] = da[3] ^ da[09] ^ da[15] ^ da[21] ^ da[27] ^ da[33] ^ da[39] ^ da[45]
- * hash_index[2] = da[2] ^ da[08] ^ da[14] ^ da[20] ^ da[26] ^ da[32] ^ da[38] ^ da[44]
- * hash_index[1] = da[1] ^ da[07] ^ da[13] ^ da[19] ^ da[25] ^ da[31] ^ da[37] ^ da[43]
- * hash_index[0] = da[0] ^ da[06] ^ da[12] ^ da[18] ^ da[24] ^ da[30] ^ da[36] ^ da[42]
- * da[0] represents the least significant bit of the first byte received, that is, the multicast/
- * unicast indicator, and da[47] represents the most significant bit of the last byte
- * received.
- * If the hash index points to a bit that is set in the hash register then the frame will be
- * matched according to whether the frame is multicast or unicast.
- * A multicast match will be signalled if the multicast hash enable bit is set, da[0] is 1 and
- * the hash index points to a bit set in the hash register.
- * A unicast match will be signalled if the unicast hash enable bit is set, da[0] is 0 and the
- * hash index points to a bit set in the hash register.
- * To receive all multicast frames, the hash register should be set with all ones and the
- * multicast hash enable bit should be set in the network configuration register.
- */
-
-/*
- * Return the hash index value for the specified address.
- */
-static int hash_get_index(__u8 *addr)
-{
- int i, j, bitval;
- int hash_index = 0;
-
- for (j = 0; j < 6; j++) {
- for (i = 0, bitval = 0; i < 8; i++)
- bitval ^= hash_bit_value(i*6 + j, addr);
-
- hash_index |= (bitval << j);
- }
-
- return hash_index;
-}
-
-/*
- * Add multicast addresses to the internal multicast-hash table.
- */
-static void at91ether_sethashtable(struct net_device *dev)
+/* Initialize and start the Receiver and Transmit subsystems */
+static int at91ether_start(struct net_device *dev)
{
- struct at91_private *lp = netdev_priv(dev);
- struct netdev_hw_addr *ha;
- unsigned long mc_filter[2];
- unsigned int bitnr;
-
- mc_filter[0] = mc_filter[1] = 0;
-
- netdev_for_each_mc_addr(ha, dev) {
- bitnr = hash_get_index(ha->addr);
- mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
- }
-
- at91_emac_write(lp, AT91_EMAC_HSL, mc_filter[0]);
- at91_emac_write(lp, AT91_EMAC_HSH, mc_filter[1]);
-}
+ struct macb *lp = netdev_priv(dev);
+ dma_addr_t addr;
+ u32 ctl;
+ int i;
-/*
- * Enable/Disable promiscuous and multicast modes.
- */
-static void at91ether_set_multicast_list(struct net_device *dev)
-{
- struct at91_private *lp = netdev_priv(dev);
- unsigned long cfg;
-
- cfg = at91_emac_read(lp, AT91_EMAC_CFG);
-
- if (dev->flags & IFF_PROMISC) /* Enable promiscuous mode */
- cfg |= AT91_EMAC_CAF;
- else if (dev->flags & (~IFF_PROMISC)) /* Disable promiscuous mode */
- cfg &= ~AT91_EMAC_CAF;
-
- if (dev->flags & IFF_ALLMULTI) { /* Enable all multicast mode */
- at91_emac_write(lp, AT91_EMAC_HSH, -1);
- at91_emac_write(lp, AT91_EMAC_HSL, -1);
- cfg |= AT91_EMAC_MTI;
- } else if (!netdev_mc_empty(dev)) { /* Enable specific multicasts */
- at91ether_sethashtable(dev);
- cfg |= AT91_EMAC_MTI;
- } else if (dev->flags & (~IFF_ALLMULTI)) { /* Disable all multicast mode */
- at91_emac_write(lp, AT91_EMAC_HSH, 0);
- at91_emac_write(lp, AT91_EMAC_HSL, 0);
- cfg &= ~AT91_EMAC_MTI;
+ lp->rx_ring = dma_alloc_coherent(&lp->pdev->dev,
+ MAX_RX_DESCR * sizeof(struct macb_dma_desc),
+ &lp->rx_ring_dma, GFP_KERNEL);
+ if (!lp->rx_ring) {
+ netdev_err(dev, "unable to alloc rx ring DMA buffer\n");
+ return -ENOMEM;
}
- at91_emac_write(lp, AT91_EMAC_CFG, cfg);
-}
-
-/* ......................... ETHTOOL SUPPORT ........................... */
-
-static int mdio_read(struct net_device *dev, int phy_id, int location)
-{
- struct at91_private *lp = netdev_priv(dev);
- unsigned int value;
-
- read_phy(lp, phy_id, location, &value);
- return value;
-}
-
-static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
-{
- struct at91_private *lp = netdev_priv(dev);
-
- write_phy(lp, phy_id, location, value);
-}
-
-static int at91ether_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
-{
- struct at91_private *lp = netdev_priv(dev);
- int ret;
-
- spin_lock_irq(&lp->lock);
- enable_mdi(lp);
-
- ret = mii_ethtool_gset(&lp->mii, cmd);
-
- disable_mdi(lp);
- spin_unlock_irq(&lp->lock);
+ lp->rx_buffers = dma_alloc_coherent(&lp->pdev->dev,
+ MAX_RX_DESCR * MAX_RBUFF_SZ,
+ &lp->rx_buffers_dma, GFP_KERNEL);
+ if (!lp->rx_buffers) {
+ netdev_err(dev, "unable to alloc rx data DMA buffer\n");
- if (lp->phy_media == PORT_FIBRE) { /* override media type since mii.c doesn't know */
- cmd->supported = SUPPORTED_FIBRE;
- cmd->port = PORT_FIBRE;
+ dma_free_coherent(&lp->pdev->dev,
+ MAX_RX_DESCR * sizeof(struct macb_dma_desc),
+ lp->rx_ring, lp->rx_ring_dma);
+ lp->rx_ring = NULL;
+ return -ENOMEM;
}
- return ret;
-}
-
-static int at91ether_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
-{
- struct at91_private *lp = netdev_priv(dev);
- int ret;
-
- spin_lock_irq(&lp->lock);
- enable_mdi(lp);
-
- ret = mii_ethtool_sset(&lp->mii, cmd);
-
- disable_mdi(lp);
- spin_unlock_irq(&lp->lock);
-
- return ret;
-}
-
-static int at91ether_nwayreset(struct net_device *dev)
-{
- struct at91_private *lp = netdev_priv(dev);
- int ret;
-
- spin_lock_irq(&lp->lock);
- enable_mdi(lp);
-
- ret = mii_nway_restart(&lp->mii);
-
- disable_mdi(lp);
- spin_unlock_irq(&lp->lock);
-
- return ret;
-}
-
-static void at91ether_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
-{
- strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
- strlcpy(info->version, DRV_VERSION, sizeof(info->version));
- strlcpy(info->bus_info, dev_name(dev->dev.parent), sizeof(info->bus_info));
-}
-
-static const struct ethtool_ops at91ether_ethtool_ops = {
- .get_settings = at91ether_get_settings,
- .set_settings = at91ether_set_settings,
- .get_drvinfo = at91ether_get_drvinfo,
- .nway_reset = at91ether_nwayreset,
- .get_link = ethtool_op_get_link,
-};
-
-static int at91ether_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
-{
- struct at91_private *lp = netdev_priv(dev);
- int res;
-
- if (!netif_running(dev))
- return -EINVAL;
-
- spin_lock_irq(&lp->lock);
- enable_mdi(lp);
- res = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL);
- disable_mdi(lp);
- spin_unlock_irq(&lp->lock);
-
- return res;
-}
-
-/* ................................ MAC ................................ */
-
-/*
- * Initialize and start the Receiver and Transmit subsystems
- */
-static void at91ether_start(struct net_device *dev)
-{
- struct at91_private *lp = netdev_priv(dev);
- struct recv_desc_bufs *dlist, *dlist_phys;
- int i;
- unsigned long ctl;
-
- dlist = lp->dlist;
- dlist_phys = lp->dlist_phys;
-
+ addr = lp->rx_buffers_dma;
for (i = 0; i < MAX_RX_DESCR; i++) {
- dlist->descriptors[i].addr = (unsigned int) &dlist_phys->recv_buf[i][0];
- dlist->descriptors[i].size = 0;
+ lp->rx_ring[i].addr = addr;
+ lp->rx_ring[i].ctrl = 0;
+ addr += MAX_RBUFF_SZ;
}
/* Set the Wrap bit on the last descriptor */
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* linux-next: manual merge of the arm-soc tree with the usb tree
From: Stephen Rothwell @ 2012-11-13 4:06 UTC (permalink / raw)
To: linux-arm-kernel
Hi all,
Today's linux-next merge of the arm-soc tree got a conflict in
arch/arm/configs/afeb9260_defconfig between commit 77614e025061 ("arch:
Change defconfigs to point to g_mass_storage") from the usb tree and
commit 2484575268e2 ("arm: at91: drop machine defconfig") from the
arm-soc tree.
The latter deletes the file, so I did that and can carry the fix as
necessary (no action is required).
--
Cheers,
Stephen Rothwell sfr at canb.auug.org.au
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* [PATCH 4/4] sh: clkfwk: fixup unsed variable warning
From: Simon Horman @ 2012-11-13 3:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1352776212-3211-1-git-send-email-horms@verge.net.au>
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
This patch solves above warning
${LINUX}/drivers/sh/clk/cpg.c:404:6: warning: \
unused variable 'val' [-Wunused-variable]
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
---
drivers/sh/clk/cpg.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/sh/clk/cpg.c b/drivers/sh/clk/cpg.c
index b3dc441..5aedcdf 100644
--- a/drivers/sh/clk/cpg.c
+++ b/drivers/sh/clk/cpg.c
@@ -401,7 +401,6 @@ static int fsidiv_enable(struct clk *clk)
static int fsidiv_set_rate(struct clk *clk, unsigned long rate)
{
- u32 val;
int idx;
idx = (clk->parent->rate / rate) & 0xffff;
--
1.7.10.4
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