* [PATCH] ARM: Dove: move CuBox led pinctrl to gpio-leds node
From: Jason Cooper @ 2013-01-12 21:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1356646870-2903-1-git-send-email-sebastian.hesselbarth@gmail.com>
Sebastian,
On Thu, Dec 27, 2012 at 11:21:10PM +0100, Sebastian Hesselbarth wrote:
> gpio-leds has support for pinctrl allocation, make use of it.
>
> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Jason Cooper <jason@lakedaemon.net>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: linux-kernel at vger.kernel.org
> ---
> arch/arm/boot/dts/dove-cubox.dts | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/dove-cubox.dts b/arch/arm/boot/dts/dove-cubox.dts
> index cdee96f..bed5b62 100644
> --- a/arch/arm/boot/dts/dove-cubox.dts
> +++ b/arch/arm/boot/dts/dove-cubox.dts
> @@ -17,6 +17,9 @@
>
> leds {
> compatible = "gpio-leds";
> + pinctrl-0 = <&pmx_gpio_18>;
> + pinctrl-names = "default";
> +
> power {
> label = "Power";
> gpios = <&gpio0 18 1>;
> @@ -47,7 +50,7 @@
> };
>
> &pinctrl {
> - pinctrl-0 = <&pmx_gpio_12 &pmx_gpio_18>;
> + pinctrl-0 = <&pmx_gpio_12>;
> pinctrl-names = "default";
>
> pmx_gpio_12: pmx-gpio-12 {
> --
> 1.7.10.4
I'm getting a merge conflict wit hthe above:
&pinctrl {
<<<<<<< HEAD
pinctrl-0 = <&pmx_gpio_18>;
=======
pinctrl-0 = <&pmx_gpio_12>;
>>>>>>> ARM: Dove: move CuBox led pinctrl to gpio-leds node
pinctrl-names = "default";
pmx_gpio_18: pmx-gpio-18 {
marvell,pins = "mpp18";
marvell,function = "gpio";
};
};
Am I missing something?
thx,
Jason.
^ permalink raw reply
* [PATCH 1/4] ARM: Kirkwood: Add pinctrl of TWSI1 to 88f6282
From: Jason Cooper @ 2013-01-12 21:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1356230077-15340-1-git-send-email-iwamatsu@nigauri.org>
On Sun, Dec 23, 2012 at 11:34:34AM +0900, Nobuhiro Iwamatsu wrote:
> The 88f6282 has one more TWSI(TWSI1). This add the information to enable
> pinctl of TWSI1.
>
> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
> ---
Patches 1,3 and 4 applied to mvebu/dt (#2 already in mvebu/fixes).
thx,
Jason.
^ permalink raw reply
* [PATCH v2 2/3] ARM: use clockevents_config_and_register() where possible
From: Jason Cooper @ 2013-01-12 21:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1357991406-22778-3-git-send-email-shawn.guo@linaro.org>
On Sat, Jan 12, 2013 at 07:50:05PM +0800, Shawn Guo wrote:
> The clockevent core is able to figure out the best mult and shift,
> calculate min_delta_ns and max_delta_ns, with the necessary info passed
> into clockevents_config_and_register(). Use this combined configure
> and register function where possible to make the codes less error prone
> and gain some positive diff stat.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> Reviewed-by: Anton Vorontsov <cbouatmailru@gmail.com>
> Acked-by: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Jason Cooper <jason@lakedaemon.net>
> Tested-by: Roland Stigge <stigge@antcom.de>
> Acked-by: Eric Miao <eric.y.miao@gmail.com>
> Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
> Cc: David Brown <davidb@codeaurora.org>
> Tested-by: Tony Lindgren <tony@atomide.com>
> Acked-by: Barry Song <baohua.song@csr.com>
> Tested-by: Stephen Warren <swarren@nvidia.com>
> Acked-by: Tony Prisk <linux@prisktech.co.nz>
> Cc: Lennert Buytenhek <buytenh@wantstofly.org>
> Cc: Wan ZongShun <mcuos.com@gmail.com>
> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
> Acked-by: Arnd Bergmann <arnd@arndb.de>
> ---
...
> arch/arm/plat-orion/time.c | 6 +-----
...
Acked-by: Jason Cooper <jason@lakedaemon.net>
thx,
Jason.
^ permalink raw reply
* [PATCH v2 0/3] Use helper clockevents_config_and_register()
From: Arnd Bergmann @ 2013-01-12 21:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1357991406-22778-1-git-send-email-shawn.guo@linaro.org>
On Saturday 12 January 2013, Shawn Guo wrote:
> The clockevent core is able to figure out the best mult and shift,
> calculate min_delta_ns and max_delta_ns, with the necessary info passed
> into clockevents_config_and_register(). Use this handy helper to make
> the drivers less error prone and save some LOC.
>
> Changes since v1:
> - Add one patch to export clockevents_config_and_register for fixing
> the error [1] reported by Fengguang.
> - Add Acked-by and Tested-by tags given by people (Thanks!)
>
> [1] http://thread.gmane.org/gmane.linux.ports.arm.kernel/209152
Very nice series!
Acked-by: Arnd Bergmann <arnd@arndb.de>
^ permalink raw reply
* [PATCH 10/14] PCI: tegra: Move PCIe driver to drivers/pci/host
From: Arnd Bergmann @ 2013-01-12 21:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130112123640.GA22505@avionic-0098.adnet.avionic-design.de>
On Saturday 12 January 2013, Thierry Reding wrote:
> > I already hinted at that in one of the other subthreads. Having such a
> > multiplex would also allow the driver to be built as a module. I had
> > already thought about this when I was working on an earlier version of
> > these patches. Basically these would be two ops attached to the host
> > bridge, and the generic arch_setup_msi_irq() could then look that up
> > given the struct pci_dev that is passed to it and call this new per-
> > host bridge .setup_msi_irq().
>
> struct pci_ops looks like a good place to put these. They'll be
> available from each struct pci_bus, so should be easy to call from
> arch_setup_msi_irq().
>
> Any objections?
>
struct pci_ops has a long history of being specifically about
config space read/write operations, so on the one hand it does
not feel like the right place to put interrupt specific operations,
but on the other hand, the name sounds appropriate and I cannot
think of any other place to put this, so it's fine with me.
The only alternative I can think of is to introduce a new
structure next to it in struct pci_bus, but that feels a bit
pointless. Maybe Bjorn has a preference one way or the other.
Arnd
^ permalink raw reply
* [PATCH] ARM: S3C64XX: Fix up IRQ mapping for balblair on Cragganmore
From: Mark Brown @ 2013-01-12 18:42 UTC (permalink / raw)
To: linux-arm-kernel
From: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
We are using S3C_EINT(4) instead of S3C_EINT(5).
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable at vger.kernel.org
---
arch/arm/mach-s3c64xx/mach-crag6410-module.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index 553059f..755c0bb 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -47,7 +47,7 @@ static struct spi_board_info wm1253_devs[] = {
.bus_num = 0,
.chip_select = 0,
.mode = SPI_MODE_0,
- .irq = S3C_EINT(5),
+ .irq = S3C_EINT(4),
.controller_data = &wm0010_spi_csinfo,
.platform_data = &wm0010_pdata,
},
--
1.7.10.4
^ permalink raw reply related
* [GIT PULL] irqchip init infrastructure and GIC/VIC move
From: Rob Herring @ 2013-01-12 17:37 UTC (permalink / raw)
To: linux-arm-kernel
Arnd, Olof,
Please pull for 3.9. This is the initial infrastructure and conversion
of the GIC and VIC to use it. Several people are waiting for the irqchip
infrastructure to go in in order to convert other irqchip code over.
I've left "static asmlinkage" in on the irq handlers. There's been no
more discussion, so I think we are in agreement. If asmlinkage defines
the procedure call convention for assembly calls, then it still makes
sense to have it on a static function called thru a function pointer.
Rob
The following changes since commit 9931faca02c604c22335f5a935a501bb2ace6e20:
Linux 3.8-rc3 (2013-01-09 18:59:55 -0800)
are available in the git repository at:
git://sources.calxeda.com/kernel/linux.git tags/gic-vic-to-irqchip
for you to fetch changes up to 9e47b8bf9815523a5816f2f83e73b13812d74014:
irqchip: Move ARM vic.h to include/linux/irqchip/arm-vic.h (2013-01-12 10:52:16 -0600)
----------------------------------------------------------------
Initial irqchip init infrastructure and GIC and VIC clean-ups
This creates irqchip initialization infrastructure from Thomas
Petazzoni. The VIC and GIC irqchip code is moved to drivers/irqchips
and adapted to use the new infrastructure. All DT enabled platforms
using GIC and VIC are converted over to use the new irqchip_init.
----------------------------------------------------------------
Rob Herring (16):
ARM: GIC: remove assembly ifdefs from gic.h
ARM: GIC: remove direct use of gic_raise_softirq
ARM: GIC: set handle_arch_irq in GIC initialization
ARM: remove mach .handle_irq for GIC users
irqchip: Move ARM GIC to drivers/irqchip
ARM: use common irqchip_init for GIC init
irqchip: Move ARM gic.h to include/linux/irqchip/arm-gic.h
ARM: VIC: shrink down vic.h
ARM: VIC: set handle_arch_irq in VIC initialization
ARM: remove mach .handle_irq for VIC users
ARM: remove unneeded vic.h includes
ARM: samsung: remove unused tick.h
irqchip: Move ARM VIC to drivers/irqchip
ARM: spear: use common irqchip_init function
ARM: picoxcell: use common irqchip_init function
irqchip: Move ARM vic.h to include/linux/irqchip/arm-vic.h
Srinidhi Kasagar (1):
ARM: mach-ux500: use SGI0 to wake up the other core
Thomas Petazzoni (3):
irqchip: add to the directories part of the IRQ subsystem in MAINTAINERS
irqchip: add basic infrastructure
arm: add set_handle_irq() to register the parent IRQ controller handler function
MAINTAINERS | 1 +
arch/arm/common/Kconfig | 23 -----
arch/arm/common/Makefile | 2 -
arch/arm/include/asm/mach/irq.h | 1 +
arch/arm/kernel/irq.c | 10 +++
arch/arm/kernel/smp.c | 3 +-
arch/arm/kernel/smp_twd.c | 1 -
arch/arm/mach-bcm/board_bcm.c | 17 +---
arch/arm/mach-cns3xxx/cns3420vb.c | 2 -
arch/arm/mach-cns3xxx/core.c | 2 +-
arch/arm/mach-ep93xx/adssphere.c | 2 -
arch/arm/mach-ep93xx/core.c | 3 +-
arch/arm/mach-ep93xx/edb93xx.c | 9 --
arch/arm/mach-ep93xx/gesbc9312.c | 2 -
arch/arm/mach-ep93xx/micro9.c | 5 --
arch/arm/mach-ep93xx/simone.c | 2 -
arch/arm/mach-ep93xx/snappercl15.c | 2 -
arch/arm/mach-ep93xx/ts72xx.c | 2 -
arch/arm/mach-ep93xx/vision_ep9307.c | 2 -
arch/arm/mach-exynos/common.c | 10 ++-
arch/arm/mach-exynos/include/mach/regs-irq.h | 2 +-
arch/arm/mach-exynos/mach-armlex4210.c | 2 -
arch/arm/mach-exynos/mach-exynos4-dt.c | 2 -
arch/arm/mach-exynos/mach-exynos5-dt.c | 2 -
arch/arm/mach-exynos/mach-nuri.c | 2 -
arch/arm/mach-exynos/mach-origen.c | 2 -
arch/arm/mach-exynos/mach-smdk4x12.c | 3 -
arch/arm/mach-exynos/mach-smdkv310.c | 3 -
arch/arm/mach-exynos/mach-universal_c210.c | 2 -
arch/arm/mach-exynos/mct.c | 1 -
arch/arm/mach-exynos/platsmp.c | 6 +-
arch/arm/mach-highbank/highbank.c | 11 +--
arch/arm/mach-highbank/platsmp.c | 6 +-
arch/arm/mach-imx/common.h | 1 -
arch/arm/mach-imx/gpc.c | 2 +-
arch/arm/mach-imx/mach-imx6q.c | 10 +--
arch/arm/mach-imx/platsmp.c | 4 +-
arch/arm/mach-msm/board-dt-8660.c | 16 +---
arch/arm/mach-msm/board-dt-8960.c | 16 +---
arch/arm/mach-msm/platsmp.c | 6 +-
arch/arm/mach-msm/timer.c | 1 -
arch/arm/mach-netx/generic.c | 2 +-
arch/arm/mach-netx/nxdb500.c | 2 -
arch/arm/mach-netx/nxdkn.c | 2 -
arch/arm/mach-netx/nxeb500hmi.c | 2 -
arch/arm/mach-nomadik/board-nhk8815.c | 2 -
arch/arm/mach-nomadik/cpu-8815.c | 2 +-
arch/arm/mach-omap2/board-4430sdp.c | 3 +-
arch/arm/mach-omap2/board-generic.c | 3 -
arch/arm/mach-omap2/board-omap4panda.c | 3 +-
arch/arm/mach-omap2/omap-smp.c | 6 +-
arch/arm/mach-omap2/omap-wakeupgen.c | 3 +-
arch/arm/mach-omap2/omap4-common.c | 11 +--
arch/arm/mach-picoxcell/common.c | 15 +---
arch/arm/mach-realview/core.c | 1 -
arch/arm/mach-realview/platsmp.c | 3 -
arch/arm/mach-realview/realview_eb.c | 3 +-
arch/arm/mach-realview/realview_pb1176.c | 3 +-
arch/arm/mach-realview/realview_pb11mp.c | 3 +-
arch/arm/mach-realview/realview_pba8.c | 3 +-
arch/arm/mach-realview/realview_pbx.c | 3 +-
arch/arm/mach-s3c64xx/common.c | 2 +-
arch/arm/mach-s3c64xx/include/mach/regs-irq.h | 1 -
arch/arm/mach-s3c64xx/include/mach/tick.h | 2 +
arch/arm/mach-s3c64xx/mach-anw6410.c | 2 -
arch/arm/mach-s3c64xx/mach-crag6410.c | 2 -
arch/arm/mach-s3c64xx/mach-hmt.c | 2 -
arch/arm/mach-s3c64xx/mach-mini6410.c | 2 -
arch/arm/mach-s3c64xx/mach-ncp.c | 2 -
arch/arm/mach-s3c64xx/mach-real6410.c | 2 -
arch/arm/mach-s3c64xx/mach-smartq5.c | 2 -
arch/arm/mach-s3c64xx/mach-smartq7.c | 2 -
arch/arm/mach-s3c64xx/mach-smdk6400.c | 2 -
arch/arm/mach-s3c64xx/mach-smdk6410.c | 2 -
arch/arm/mach-s5p64x0/include/mach/regs-irq.h | 1 -
arch/arm/mach-s5p64x0/include/mach/tick.h | 29 ------
arch/arm/mach-s5p64x0/mach-smdk6440.c | 2 -
arch/arm/mach-s5p64x0/mach-smdk6450.c | 2 -
arch/arm/mach-s5pc100/include/mach/regs-irq.h | 1 -
arch/arm/mach-s5pc100/include/mach/tick.h | 2 +
arch/arm/mach-s5pc100/mach-smdkc100.c | 2 -
arch/arm/mach-s5pv210/include/mach/regs-irq.h | 1 -
arch/arm/mach-s5pv210/include/mach/tick.h | 26 ------
arch/arm/mach-s5pv210/mach-aquila.c | 2 -
arch/arm/mach-s5pv210/mach-goni.c | 2 -
arch/arm/mach-s5pv210/mach-smdkc110.c | 2 -
arch/arm/mach-s5pv210/mach-smdkv210.c | 2 -
arch/arm/mach-s5pv210/mach-torbreck.c | 2 -
arch/arm/mach-shmobile/board-ag5evm.c | 3 +-
arch/arm/mach-shmobile/board-kota2.c | 3 +-
arch/arm/mach-shmobile/board-kzm9d.c | 2 -
arch/arm/mach-shmobile/board-kzm9g.c | 3 +-
arch/arm/mach-shmobile/board-marzen.c | 2 -
arch/arm/mach-shmobile/intc-r8a7779.c | 2 +-
arch/arm/mach-shmobile/intc-sh73a0.c | 2 +-
arch/arm/mach-shmobile/platsmp.c | 3 -
arch/arm/mach-shmobile/setup-emev2.c | 17 +---
arch/arm/mach-shmobile/smp-emev2.c | 4 +-
arch/arm/mach-shmobile/smp-r8a7779.c | 2 +-
arch/arm/mach-shmobile/smp-sh73a0.c | 2 +-
arch/arm/mach-socfpga/platsmp.c | 4 +-
arch/arm/mach-socfpga/socfpga.c | 14 +--
arch/arm/mach-spear13xx/include/mach/generic.h | 1 -
arch/arm/mach-spear13xx/platsmp.c | 4 +-
arch/arm/mach-spear13xx/spear1310.c | 5 +-
arch/arm/mach-spear13xx/spear1340.c | 5 +-
arch/arm/mach-spear13xx/spear13xx.c | 13 +--
arch/arm/mach-spear3xx/include/mach/generic.h | 1 -
arch/arm/mach-spear3xx/spear300.c | 5 +-
arch/arm/mach-spear3xx/spear310.c | 5 +-
arch/arm/mach-spear3xx/spear320.c | 5 +-
arch/arm/mach-spear3xx/spear3xx.c | 16 ----
arch/arm/mach-spear6xx/spear6xx.c | 16 +---
arch/arm/mach-sunxi/sunxi.c | 2 -
arch/arm/mach-tegra/board-dt-tegra20.c | 3 -
arch/arm/mach-tegra/board-dt-tegra30.c | 2 -
arch/arm/mach-tegra/common.c | 10 +--
arch/arm/mach-tegra/irq.c | 3 +-
arch/arm/mach-tegra/platsmp.c | 4 +-
arch/arm/mach-u300/core.c | 3 +-
arch/arm/mach-ux500/board-mop500.c | 5 --
arch/arm/mach-ux500/cpu-db8500.c | 2 -
arch/arm/mach-ux500/cpu.c | 10 +--
arch/arm/mach-ux500/platsmp.c | 6 +-
arch/arm/mach-versatile/core.c | 2 +-
arch/arm/mach-versatile/versatile_ab.c | 2 -
arch/arm/mach-versatile/versatile_dt.c | 2 -
arch/arm/mach-versatile/versatile_pb.c | 2 -
arch/arm/mach-vexpress/ct-ca9x4.c | 4 +-
arch/arm/mach-vexpress/platsmp.c | 3 -
arch/arm/mach-vexpress/v2m.c | 16 +---
arch/arm/mach-zynq/common.c | 17 +---
arch/arm/plat-samsung/s5p-irq-eint.c | 3 +-
arch/arm/plat-samsung/s5p-irq.c | 3 +-
arch/arm/plat-versatile/platsmp.c | 4 +-
drivers/irqchip/Kconfig | 27 ++++++
drivers/irqchip/Makefile | 6 +-
arch/arm/common/gic.c => drivers/irqchip/irq-gic.c | 59 +++++++-----
arch/arm/common/vic.c => drivers/irqchip/irq-vic.c | 95 ++++++++++++--------
drivers/irqchip/irqchip.c | 30 +++++++
drivers/irqchip/irqchip.h | 29 ++++++
drivers/irqchip/spear-shirq.c | 5 ++
drivers/mfd/db8500-prcmu.c | 2 +-
include/asm-generic/vmlinux.lds.h | 12 ++-
include/linux/irqchip.h | 16 ++++
.../gic.h => include/linux/irqchip/arm-gic.h | 15 +---
.../vic.h => include/linux/irqchip/arm-vic.h | 25 +-----
147 files changed, 338 insertions(+), 607 deletions(-)
delete mode 100644 arch/arm/mach-s5p64x0/include/mach/tick.h
delete mode 100644 arch/arm/mach-s5pv210/include/mach/tick.h
rename arch/arm/common/gic.c => drivers/irqchip/irq-gic.c (97%)
rename arch/arm/common/vic.c => drivers/irqchip/irq-vic.c (92%)
create mode 100644 drivers/irqchip/irqchip.c
create mode 100644 drivers/irqchip/irqchip.h
create mode 100644 include/linux/irqchip.h
rename arch/arm/include/asm/hardware/gic.h => include/linux/irqchip/arm-gic.h (77%)
rename arch/arm/include/asm/hardware/vic.h => include/linux/irqchip/arm-vic.h (63%)
^ permalink raw reply
* [PATCH V2 2/6] ARM: tegra20: cpuidle: add powered-down state for secondary CPU
From: Nicolas Pitre @ 2013-01-12 17:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1357888829.2034.39.camel@jlo-ubuntu-64.nvidia.com>
On Fri, 11 Jan 2013, Joseph Lo wrote:
> Hi Lorenzo,
>
> On Wed, 2012-12-05 at 18:50 +0800, Lorenzo Pieralisi wrote:
> > On Wed, Dec 05, 2012 at 10:01:49AM +0000, Joseph Lo wrote:
> > > The powered-down state of Tegra20 requires power gating both CPU cores.
> > > When the secondary CPU requests to enter powered-down state, it saves
> > > its own contexts and then enters WFI. The Tegra20 had a limition to
> > > power down both CPU cores. The secondary CPU must waits for CPU0 in
> > > powered-down state too. If the secondary CPU be woken up before CPU0
> > > entering powered-down state, then it needs to restore its CPU states
> > > and waits for next chance.
> > >
> > > Be aware of that, you may see the legacy power state "LP2" in the code
> > > which is exactly the same meaning of "CPU power down".
> > >
> > > Based on the work by:
> > > Colin Cross <ccross@android.com>
> > > Gary King <gking@nvidia.com>
> > >
> > > Signed-off-by: Joseph Lo <josephl@nvidia.com>
> > > +
> > > +#ifdef CONFIG_PM_SLEEP
> > > +/*
> > > + * tegra_pen_lock
> > > + *
> > > + * spinlock implementation with no atomic test-and-set and no coherence
> > > + * using Peterson's algorithm on strongly-ordered registers
> > > + * used to synchronize a cpu waking up from wfi with entering lp2 on idle
> > > + *
> > > + * SCRATCH37 = r1 = !turn (inverted from Peterson's algorithm)
> > > + * on cpu 0:
> > > + * SCRATCH38 = r2 = flag[0]
> > > + * SCRATCH39 = r3 = flag[1]
> > > + * on cpu1:
> > > + * SCRATCH39 = r2 = flag[1]
> > > + * SCRATCH38 = r3 = flag[0]
> > > + *
> > > + * must be called with MMU on
> > > + * corrupts r0-r3, r12
> > > + */
> > > +ENTRY(tegra_pen_lock)
> > > + mov32 r3, TEGRA_PMC_VIRT
> > > + cpu_id r0
> > > + add r1, r3, #PMC_SCRATCH37
> > > + cmp r0, #0
> > > + addeq r2, r3, #PMC_SCRATCH38
> > > + addeq r3, r3, #PMC_SCRATCH39
> > > + addne r2, r3, #PMC_SCRATCH39
> > > + addne r3, r3, #PMC_SCRATCH38
> > > +
> > > + mov r12, #1
> > > + str r12, [r2] @ flag[cpu] = 1
> > > + dsb
> > > + str r12, [r1] @ !turn = cpu
> > > +1: dsb
> > > + ldr r12, [r3]
> > > + cmp r12, #1 @ flag[!cpu] == 1?
> > > + ldreq r12, [r1]
> > > + cmpeq r12, r0 @ !turn == cpu?
> > > + beq 1b @ while !turn == cpu && flag[!cpu] == 1
> > > +
> > > + mov pc, lr @ locked
> > > +ENDPROC(tegra_pen_lock)
> > > +
> > > +ENTRY(tegra_pen_unlock)
> > > + dsb
> > > + mov32 r3, TEGRA_PMC_VIRT
> > > + cpu_id r0
> > > + cmp r0, #0
> > > + addeq r2, r3, #PMC_SCRATCH38
> > > + addne r2, r3, #PMC_SCRATCH39
> > > + mov r12, #0
> > > + str r12, [r2]
> > > + mov pc, lr
> > > +ENDPROC(tegra_pen_unlock)
> >
> > There is an ongoing work to make this locking scheme for MMU/coherency off
> > paths ARM generic, and we do not want to merge yet another platform specific
> > locking mechanism. I will point you to the patchset when it hits LAK.
> >
>
> You did mention there is an ARM generic locking scheme for MMU/coherency
> off case before. Do you mean the patch below?
>
> https://patchwork.kernel.org/patch/1957911/
> https://patchwork.kernel.org/patch/1957901/
>
> I gave it a review today. Looks it can't fit our usage for CPU idle
> powered-down mode on Tegra20.
>
> The generic mechanism only can be used when CPUs in non coherent world.
> But our usage needs the mechanism could be used in both coherent and non
> coherent case. OK. The case is we need to sync the status about the CPU1
> was ready to power down. In this case, the CPU0 is still in coherent
> world but the CPU1 isn't. So we need the locking scheme could be still
> safe in this situation.
Those patches above are dealing with CPUs coming back up. If you look
at the rest of the series, especially the DCSCB one providing real usage
example, you'll see that we do have a mix of coherent and non-coherent
states that need to coordinate amongst themselves.
> And the proposed scheme looks only for b.L system?
It was initiated for b.L hence the name, but that is applicable to other
systems as well.
Nicolas
^ permalink raw reply
* [PATCH] ARM: let CPUs not being able to run in ARM mode enter in THUMB mode
From: Nicolas Pitre @ 2013-01-12 17:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130111155150.GL14860@pengutronix.de>
On Fri, 11 Jan 2013, Uwe Kleine-K?nig wrote:
> Hi Jonny,
>
> On Fri, Jan 11, 2013 at 03:34:39PM +0000, Jonathan Austin wrote:
> > Hi Uwe,
> > On 11/01/13 11:39, Uwe Kleine-K?nig wrote:
> > >Some ARM cores are not capable to run in ARM mode (e.g. Cortex-M3). So
> > >obviously these cannot enter the kernel in ARM mode. Make an exception
> > >for them and let them enter in THUMB mode.
> >
> > Clearly something like this is necessary, but it isn't something I'd
> > like for people to start using *unless* they have a THUMB only CPU
> > (for example, to work around dodgy boot-loaders, etc)
> >
> > Seeing as there are no THUMB-only CPUs with an MMU, I think we could
> > safely constrain this change to:
> > a) depend on !MMU
> > b) only touch head-nommu.S
> >
> > Does that cause any issue for what you're doing.
> Would be ok for me, too. I don't care much.
Please do so then. I had the same concern.
Nicolas
^ permalink raw reply
* [PATCH 0/4] arm: vt8500: Add support for Wondermedia WM8750/WM8850
From: Olof Johansson @ 2013-01-12 17:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1357960044.8515.0.camel@gitbox>
On Sat, Jan 12, 2013 at 04:07:24PM +1300, Tony Prisk wrote:
> > I suggest that you split off the last three (and rebase them to be
> > independent), and apply them to a multiplatform branch for vt8500. Then the
> > last one is a soc branch that goes on top of the multiplatform branch (i.e. you
> > build it on top of multiplatform). That way we can pull in the multiplatform
> > changes together with those for other platforms, and then take the wm8{7,8}50
> > branch goes in with the other new-soc support from other platforms.
> >
> > Does that make sense? I'll be happy to provide more explanation if it doesn't.
> >
> > -Olof
>
> I think I understand - pull requests to follow.
Looks good, thanks for fixing it up. Next time feel free to change to
fresh subjects on the pull requests. :)
I don't see your PGP key uploaded to the public key servers, and you
likely don't have it signed by anyone else. If you have a chance, please
try to get it signed by a few people. Ideal time to do that is if you're
going to any conferences, but there are also local people around the
world that can meet up sometimes.
-Olof
^ permalink raw reply
* [PATCH 0/4] arm: vt8500: Add support for Wondermedia WM8750/WM8850
From: Olof Johansson @ 2013-01-12 17:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1357960189.8515.4.camel@gitbox>
On Sat, Jan 12, 2013 at 04:09:49PM +1300, Tony Prisk wrote:
> The following changes since commit
> ce3f386fdf10d79eaf6ebd63bb7adbd95f08f9f0:
>
> arm: vt8500: Remove remaining mach includes (2013-01-12 15:47:39
> +1300)
>
> are available in the git repository at:
>
> git://server.prisktech.co.nz/git/linuxwmt.git tags/armsoc-3.9
Thanks, I pulled this in as vt8500/wm8x50
-Olof
^ permalink raw reply
* [PATCH 0/4] arm: vt8500: Add support for Wondermedia WM8750/WM8850
From: Olof Johansson @ 2013-01-12 17:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1357960163.8515.3.camel@gitbox>
On Sat, Jan 12, 2013 at 04:09:23PM +1300, Tony Prisk wrote:
> The following changes since commit
> d1c3ed669a2d452cacfb48c2d171a1f364dae2ed:
>
> Linux 3.8-rc2 (2013-01-02 18:13:21 -0800)
>
> are available in the git repository at:
>
> git://server.prisktech.co.nz/git/linuxwmt.git
> tags/vt8500-multiplatform-3.9
Thanks, pulled in as vt8500/multiplatform.
-Olof
^ permalink raw reply
* [PATCH 08/16] ARM: bL_platsmp.c: make sure the GIC interface of a dying CPU is disabled
From: Nicolas Pitre @ 2013-01-12 16:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F10799.3000501@ti.com>
On Sat, 12 Jan 2013, Santosh Shilimkar wrote:
> On Saturday 12 January 2013 12:37 AM, Nicolas Pitre wrote:
> > On Fri, 11 Jan 2013, Santosh Shilimkar wrote:
> >
> > > On Thursday 10 January 2013 05:50 AM, Nicolas Pitre wrote:
> > > > Otherwise there might be some interrupts or IPIs becoming pending and
> > > > the
> > > > CPU will not enter low power mode when doing a WFI. The effect of this
> > > > is a CPU that loops back into the kernel, go through the first man
> > > > election, signals itself as alive, and prevent the cluster from being
> > > > shut down.
> > > >
> > > > This could benefit from a better solution.
> > > >
> > > > Signed-off-by: Nicolas Pitre <nico@linaro.org>
> > > > ---
> > > > arch/arm/common/bL_platsmp.c | 1 +
> > > > arch/arm/common/gic.c | 6 ++++++
> > > > arch/arm/include/asm/hardware/gic.h | 2 ++
> > > > 3 files changed, 9 insertions(+)
> > > >
> > > > diff --git a/arch/arm/common/bL_platsmp.c b/arch/arm/common/bL_platsmp.c
> > > > index 0ae44123bf..6a3b251b97 100644
> > > > --- a/arch/arm/common/bL_platsmp.c
> > > > +++ b/arch/arm/common/bL_platsmp.c
> > > > @@ -68,6 +68,7 @@ static void __ref bL_cpu_die(unsigned int cpu)
> > > > pcpu = mpidr & 0xff;
> > > > pcluster = (mpidr >> 8) & 0xff;
> > > > bL_set_entry_vector(pcpu, pcluster, NULL);
> > > > + gic_cpu_if_down();
> > >
> > > So for a case where CPU still don't power down for some reason even
> > > after CPU interface is disabled, can not listen to and SGI or PPI.
> > > Not sure if this happens on big.LITTLE but i have seen one such issue
> > > on Cortex-A9 based SOC.
> >
> > Here the problem was the reverse i.e. a CPU wouldn't go down because
> > some pending SGIs prevented that.
> >
> I understood that part. What I was saying is, with CPU IF disabled and
> if CPU doesn't enter into the intended low power state and if the wakeup
> mechanism on that CPU is SGI/SPI, CPU may never wakeup and can lead to
> dead lock. I have seen this scenario on OMAP especially in CPUidle path.
Obviously, on the CPU idle path, you should not turn off the GIC
interface as this might lose the ability to wake the CPU up with a
pending interrupt, if your system is so configured.
Here this is the CPU hot unplug path and we don't want the CPU to be
awaken at all until we explicitly do something to wake it back up.
However, in theory, all interrupts should have been migrated away from
this CPU, so there shouldn't be any need for this. I should revisit the
test that led me to create this patch.
> It may not be relevant for switcher considering, you almost force CPU to
> enter to low power state :-)
The switcher doesn't use cpu_die() but calls into bL_cpu_power_down()
directly.
Nicolas
^ permalink raw reply
* [PATCH 1/2] ARM: shmobile: sh73a0: Add CPU sleep suspend
From: Bastian Hecht @ 2013-01-12 15:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <Pine.LNX.4.64.1301111031220.2604@axis700.grange>
Hi Guennadi, hi Simon,
yes somehow a chunk is missing from my original patch in the patch of
the next branch that got merged from soc2. I've prepared a revert of
the bad patch and a corrected version, but now I'm unsure if that
helps at all. Finally you don't want to get that fixups pulled into
the mainline.
It seems to me to be a real mess to correct some patch somewhere in
the middle of merged patch stacks. If I can help Simon, please let me
know.
Cheers,
Bastian
2013/1/11 Guennadi Liakhovetski <g.liakhovetski@gmx.de>:
> Hi Simon
>
> On Fri, 14 Dec 2012, Simon Horman wrote:
>
>> On Fri, Dec 14, 2012 at 12:23:06PM +0900, Magnus Damm wrote:
>> > On Wed, Dec 5, 2012 at 9:13 PM, Bastian Hecht <hechtb@gmail.com> wrote:
>> > > From: Bastian Hecht <hechtb@gmail.com>
>> > >
>> > > Add the lighest possible sleep mode on Cortex-A9 cores: CPU sleep. It is
>> > > entered by a simple dsb and wfi instruction via cpu_do_idle(). As just
>> > > clocks are stopped there is no need to save or restore any state of the
>> > > system.
>> > >
>> > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
>> >
>> > Acked-by: Magnus Damm <damm@opensource.se>
>>
>> Hi Bastian,
>>
>> could you please re-spin this series on top of the soc5 or next
>> branches of my renesas tree on kernel.org?
>>
>> Feel free to include Magnus's Ack unless you make any
>> non-trivial changes.
>
> It looks like this commit in your tree
>
> http://git.kernel.org/?p=linux/kernel/git/horms/renesas.git;a=commitdiff;h=1662b83628a0c6fd6d8a2a0dcf9b67577906e75b
>
> is broken, am I right?
>
> Thanks
> Guennadi
> ---
> Guennadi Liakhovetski, Ph.D.
> Freelance Open-Source Software Developer
> http://www.open-technology.de/
^ permalink raw reply
* [PATCH 0/2 v2] at91/ssc: fixes on ASoC tree for 3.8
From: Jean-Christophe PLAGNIOL-VILLARD @ 2013-01-12 13:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130111195331.GA2533@quad.lixom.net>
On 11:53 Fri 11 Jan , Olof Johansson wrote:
> On Fri, Jan 11, 2013 at 07:39:49PM +0000, Mark Brown wrote:
> > On Fri, Jan 11, 2013 at 10:52:19AM -0800, Olof Johansson wrote:
> > > On Fri, Jan 11, 2013 at 6:08 AM, Nicolas Ferre <nicolas.ferre@atmel.com> wrote:
> > >
> > > > This material was designed to enter Mark's fixes queue, but as discussed with
> > > > Olof, we can imagine merging everything through arm-soc or split the series (of
> > > > 2 patches) and let them progress upstream separated (option that I do not like
> > > > even if I know that the consequences are not so dramatic).
> > > > So please, Olof, if you feel confortable with this series, tell us what you
> > > > prefer and we will make our best to make this material go forward...
> >
> > > You're setting yourself up for awkward merges. The driver change is
> > > strongly dependent on the device tree change by failing probe unless
> > > the device tree update is there, while before this patch, it still
> > > worked.
> >
> > This is partly my fault for getting grumpy about adding the bolier plate
> > code without error checking - overall Linus' change to do the get in the
> > core seems like the most sane approach here.
> >
> > > But to be honest, I don't think this is a fix, it's a feature that you
> > > just didn't include in time for the merge window. I don't really see
> > > them as appropriate 3.8 material at this point.
> >
> > Jean-Christophe has been most insistent that pinctrl support is now
> > manadatory for all AT91 systems using device tree.
>
> That's a noble goal but enforcing it early gives everyone a lot of pain, and
> quite honestly doesn't make sense. During transition it's better to be lenient
> and allow both old and new methods (without breakage), unless it causes
> significant extra churn.
except here we can not as the same ip manage gpio & pinctrl
so no choice we need to do the switch at once
and that's why we wait 1 more release to do the switch so erveryone can play
with it before
Best Regards,
J.
^ permalink raw reply
* [PATCH v2 0/2] Add imx6q-cpufreq driver support
From: Rafael J. Wysocki @ 2013-01-12 13:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1357806863-6899-1-git-send-email-shawn.guo@linaro.org>
On Thursday, January 10, 2013 04:34:21 PM Shawn Guo wrote:
> Changes since v1:
> - Drop patch "PM / OPP: Export more symbols for module usage", as
> there is already one "[PATCH 5/6 v9] power: export opp cpufreq
> functions" from Mark Langsdorf.
> - Instead of having cpu_dev be the struct device retrieved from
> get_cpu_device(), have it be &pdev->dev, so that we can use managed
> functions to simplified the cleanup path.
> - Use dev_* rather than pr_* for message output
> - Fix Typos and others commented by Viresh and Sascha.
>
> Once the first patch gets accepted, I will apply the second one for
> going through arm-soc tree.
>
> Shawn Guo (2):
> cpufreq: add imx6q-cpufreq driver
> ARM: imx: enable imx6q-cpufreq support
I would prefer these two to go through the arm-soc tree if that's not a problem.
Thanks,
Rafael
--
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.
^ permalink raw reply
* [PATCH 10/14] PCI: tegra: Move PCIe driver to drivers/pci/host
From: Thierry Reding @ 2013-01-12 12:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130111154516.GA25335@avionic-0098.adnet.avionic-design.de>
On Fri, Jan 11, 2013 at 04:45:16PM +0100, Thierry Reding wrote:
> On Fri, Jan 11, 2013 at 03:36:14PM +0000, Arnd Bergmann wrote:
> > On Friday 11 January 2013, Thierry Reding wrote:
> > > Right, it'll need #ifdefs around the arch_{setup,teardown}_msi_irq(). Or
> > > select PCI_MSI unconditionally. Once this is merged I was going to post
> > > a patch that enables PCI_MSI in tegra_defconfig anyway. But it might be
> > > better to keep it optional anyway since the remainder of the code copes
> > > with it properly.
> > >
> > Actually, we need something better than that. You cannot define
> > arch_setup_msi_irq in a tegra specific pci host driver, because that
> > will seriously mess up other platforms in multiplatform configurations
> > by giving a link error when they also define this function, or with a
> > run-time error when they don't support it.
> >
> > I think what we should do here is fix it the right way by adding
> > a pci host specific callback rather than an architecture specific
> > callback in drivers/pci/msi.c. There is already a default version
> > of arch_setup_msi_irqs (with s), and we can probably do the
> > same for arch_setup_msi_irq (without s) to fall back to the
> > arch version for most architectures.
> > Most architectures (at least powerpc, sparc, ia64 and x86) already
> > multiplex the msi handlers internally, but ARM does not because
> > there is only one implementation (iop33x) at the moment.
> >
> > We can add a generix multiplex and then move architectures over to
> > use it.
>
> I already hinted at that in one of the other subthreads. Having such a
> multiplex would also allow the driver to be built as a module. I had
> already thought about this when I was working on an earlier version of
> these patches. Basically these would be two ops attached to the host
> bridge, and the generic arch_setup_msi_irq() could then look that up
> given the struct pci_dev that is passed to it and call this new per-
> host bridge .setup_msi_irq().
struct pci_ops looks like a good place to put these. They'll be
available from each struct pci_bus, so should be easy to call from
arch_setup_msi_irq().
Any objections?
Thierry
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^ permalink raw reply
* [PATCH 3/4] ARM: imx: restore uncompress.h to a common place
From: Arnd Bergmann @ 2013-01-12 11:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130112110438.GB14865@S2101-09.ap.freescale.net>
On Saturday 12 January 2013, Shawn Guo wrote:
> On Sat, Jan 12, 2013 at 07:25:56AM +0100, Dirk Behme wrote:
> > In case you touch these patches again, you might check if the above
> > path and file name in the file header should be adapted to the new
> > file location, too.
> >
> I would not bother to update that. To me, it's quite pointless to have
> a full file name there. If I can choose, I would remove it completely.
I agree, they tend to all get wrong over time. It's not worth
removing those statements all at once, but I also remove them
when moving files and I remember.
Arnd
^ permalink raw reply
* [PATCH v2 3/3] clocksource: use clockevents_config_and_register() where possible
From: Shawn Guo @ 2013-01-12 11:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1357991406-22778-1-git-send-email-shawn.guo@linaro.org>
The clockevent core is able to figure out the best mult and shift,
calculate min_delta_ns and max_delta_ns, with the necessary info passed
into clockevents_config_and_register(). Use this combined configure
and register function where possible to make the codes less error prone
and gain some positive diff stat.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Andres Salomon <dilinger@queued.net>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/clocksource/cs5535-clockevt.c | 11 ++---------
drivers/clocksource/sunxi_timer.c | 11 ++---------
drivers/clocksource/tcb_clksrc.c | 7 +------
3 files changed, 5 insertions(+), 24 deletions(-)
diff --git a/drivers/clocksource/cs5535-clockevt.c b/drivers/clocksource/cs5535-clockevt.c
index d927938..ea21048 100644
--- a/drivers/clocksource/cs5535-clockevt.c
+++ b/drivers/clocksource/cs5535-clockevt.c
@@ -100,7 +100,6 @@ static struct clock_event_device cs5535_clockevent = {
.set_mode = mfgpt_set_mode,
.set_next_event = mfgpt_next_event,
.rating = 250,
- .shift = 32
};
static irqreturn_t mfgpt_tick(int irq, void *dev_id)
@@ -169,17 +168,11 @@ static int __init cs5535_mfgpt_init(void)
cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_SETUP, val);
/* Set up the clock event */
- cs5535_clockevent.mult = div_sc(MFGPT_HZ, NSEC_PER_SEC,
- cs5535_clockevent.shift);
- cs5535_clockevent.min_delta_ns = clockevent_delta2ns(0xF,
- &cs5535_clockevent);
- cs5535_clockevent.max_delta_ns = clockevent_delta2ns(0xFFFE,
- &cs5535_clockevent);
-
printk(KERN_INFO DRV_NAME
": Registering MFGPT timer as a clock event, using IRQ %d\n",
timer_irq);
- clockevents_register_device(&cs5535_clockevent);
+ clockevents_config_and_register(&cs5535_clockevent, MFGPT_HZ,
+ 0xF, 0xFFFE);
return 0;
diff --git a/drivers/clocksource/sunxi_timer.c b/drivers/clocksource/sunxi_timer.c
index 3cd1bd3..f911866 100644
--- a/drivers/clocksource/sunxi_timer.c
+++ b/drivers/clocksource/sunxi_timer.c
@@ -74,7 +74,6 @@ static int sunxi_clkevt_next_event(unsigned long evt,
static struct clock_event_device sunxi_clockevent = {
.name = "sunxi_tick",
- .shift = 32,
.rating = 300,
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.set_mode = sunxi_clkevt_mode,
@@ -154,16 +153,10 @@ static void __init sunxi_timer_init(void)
val = readl(timer_base + TIMER_CTL_REG);
writel(val | TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG);
- sunxi_clockevent.mult = div_sc(rate / TIMER_SCAL,
- NSEC_PER_SEC,
- sunxi_clockevent.shift);
- sunxi_clockevent.max_delta_ns = clockevent_delta2ns(0xff,
- &sunxi_clockevent);
- sunxi_clockevent.min_delta_ns = clockevent_delta2ns(0x1,
- &sunxi_clockevent);
sunxi_clockevent.cpumask = cpumask_of(0);
- clockevents_register_device(&sunxi_clockevent);
+ clockevents_config_and_register(&sunxi_clockevent, rate / TIMER_SCAL,
+ 0x1, 0xff);
}
struct sys_timer sunxi_timer = {
diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
index 32cb929..8a61872 100644
--- a/drivers/clocksource/tcb_clksrc.c
+++ b/drivers/clocksource/tcb_clksrc.c
@@ -157,7 +157,6 @@ static struct tc_clkevt_device clkevt = {
.name = "tc_clkevt",
.features = CLOCK_EVT_FEAT_PERIODIC
| CLOCK_EVT_FEAT_ONESHOT,
- .shift = 32,
/* Should be lower than at91rm9200's system timer */
.rating = 125,
.set_next_event = tc_next_event,
@@ -196,13 +195,9 @@ static void __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
timer_clock = clk32k_divisor_idx;
- clkevt.clkevt.mult = div_sc(32768, NSEC_PER_SEC, clkevt.clkevt.shift);
- clkevt.clkevt.max_delta_ns
- = clockevent_delta2ns(0xffff, &clkevt.clkevt);
- clkevt.clkevt.min_delta_ns = clockevent_delta2ns(1, &clkevt.clkevt) + 1;
clkevt.clkevt.cpumask = cpumask_of(0);
- clockevents_register_device(&clkevt.clkevt);
+ clockevents_config_and_register(&clkevt.clkevt, 32768, 1, 0xffff);
setup_irq(irq, &tc_irqaction);
}
--
1.7.9.5
^ permalink raw reply related
* [PATCH v2 2/3] ARM: use clockevents_config_and_register() where possible
From: Shawn Guo @ 2013-01-12 11:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1357991406-22778-1-git-send-email-shawn.guo@linaro.org>
The clockevent core is able to figure out the best mult and shift,
calculate min_delta_ns and max_delta_ns, with the necessary info passed
into clockevents_config_and_register(). Use this combined configure
and register function where possible to make the codes less error prone
and gain some positive diff stat.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: Anton Vorontsov <cbouatmailru@gmail.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Tested-by: Roland Stigge <stigge@antcom.de>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: David Brown <davidb@codeaurora.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Acked-by: Barry Song <baohua.song@csr.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Tony Prisk <linux@prisktech.co.nz>
Cc: Lennert Buytenhek <buytenh@wantstofly.org>
Cc: Wan ZongShun <mcuos.com@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-at91/at91rm9200_time.c | 7 ++-----
arch/arm/mach-cns3xxx/core.c | 13 +++----------
arch/arm/mach-exynos/mct.c | 18 ++++--------------
| 6 +-----
arch/arm/mach-imx/epit.c | 15 +++------------
arch/arm/mach-imx/time.c | 15 +++------------
arch/arm/mach-ixp4xx/common.c | 11 ++---------
arch/arm/mach-lpc32xx/timer.c | 9 +--------
arch/arm/mach-mmp/time.c | 7 ++-----
arch/arm/mach-msm/timer.c | 6 +-----
arch/arm/mach-mxs/timer.c | 24 +++++-------------------
arch/arm/mach-netx/time.c | 10 ++--------
arch/arm/mach-omap1/time.c | 11 ++---------
arch/arm/mach-omap1/timer32k.c | 12 ++----------
arch/arm/mach-omap2/timer.c | 13 +++----------
arch/arm/mach-prima2/timer.c | 10 ++--------
arch/arm/mach-pxa/time.c | 8 ++------
arch/arm/mach-sa1100/time.c | 8 ++------
arch/arm/mach-tegra/timer.c | 8 ++------
arch/arm/mach-vt8500/timer.c | 9 ++-------
arch/arm/mach-w90x900/time.c | 10 ++--------
arch/arm/plat-iop/time.c | 9 ++-------
arch/arm/plat-orion/time.c | 6 +-----
arch/arm/plat-samsung/s5p-time.c | 9 +--------
arch/arm/plat-spear/time.c | 8 +-------
25 files changed, 53 insertions(+), 209 deletions(-)
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index cafe988..20a28ac 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
static struct clock_event_device clkevt = {
.name = "at91_tick",
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
- .shift = 32,
.rating = 150,
.set_next_event = clkevt32k_next_event,
.set_mode = clkevt32k_mode,
@@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void)
at91_st_write(AT91_ST_RTMR, 1);
/* Setup timer clockevent, with minimum of two ticks (important!!) */
- clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
- clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
- clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
clkevt.cpumask = cpumask_of(0);
- clockevents_register_device(&clkevt);
+ clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
+ 2, AT91_ST_ALMV);
/* register clocksource */
clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index 031805b..3eb74d1 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -134,7 +134,6 @@ static int cns3xxx_timer_set_next_event(unsigned long evt,
static struct clock_event_device cns3xxx_tmr1_clockevent = {
.name = "cns3xxx timer1",
- .shift = 8,
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.set_mode = cns3xxx_timer_set_mode,
.set_next_event = cns3xxx_timer_set_next_event,
@@ -145,15 +144,9 @@ static struct clock_event_device cns3xxx_tmr1_clockevent = {
static void __init cns3xxx_clockevents_init(unsigned int timer_irq)
{
cns3xxx_tmr1_clockevent.irq = timer_irq;
- cns3xxx_tmr1_clockevent.mult =
- div_sc((cns3xxx_cpu_clock() >> 3) * 1000000, NSEC_PER_SEC,
- cns3xxx_tmr1_clockevent.shift);
- cns3xxx_tmr1_clockevent.max_delta_ns =
- clockevent_delta2ns(0xffffffff, &cns3xxx_tmr1_clockevent);
- cns3xxx_tmr1_clockevent.min_delta_ns =
- clockevent_delta2ns(0xf, &cns3xxx_tmr1_clockevent);
-
- clockevents_register_device(&cns3xxx_tmr1_clockevent);
+ clockevents_config_and_register(&cns3xxx_tmr1_clockevent,
+ (cns3xxx_cpu_clock() >> 3) * 1000000,
+ 0xf, 0xffffffff);
}
/*
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index 57668eb..070d51e 100644
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -255,13 +255,9 @@ static struct irqaction mct_comp_event_irq = {
static void exynos4_clockevent_init(void)
{
- clockevents_calc_mult_shift(&mct_comp_device, clk_rate, 5);
- mct_comp_device.max_delta_ns =
- clockevent_delta2ns(0xffffffff, &mct_comp_device);
- mct_comp_device.min_delta_ns =
- clockevent_delta2ns(0xf, &mct_comp_device);
mct_comp_device.cpumask = cpumask_of(0);
- clockevents_register_device(&mct_comp_device);
+ clockevents_config_and_register(&mct_comp_device, clk_rate,
+ 0xf, 0xffffffff);
if (soc_is_exynos5250())
setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq);
@@ -404,14 +400,8 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)
evt->set_mode = exynos4_tick_set_mode;
evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
evt->rating = 450;
-
- clockevents_calc_mult_shift(evt, clk_rate / (TICK_BASE_CNT + 1), 5);
- evt->max_delta_ns =
- clockevent_delta2ns(0x7fffffff, evt);
- evt->min_delta_ns =
- clockevent_delta2ns(0xf, evt);
-
- clockevents_register_device(evt);
+ clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
+ 0xf, 0x7fffffff);
exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
--git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index 3b54196..a9918b6 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -101,12 +101,8 @@ static void __init footbridge_timer_init(void)
setup_irq(ce->irq, &footbridge_timer_irq);
- clockevents_calc_mult_shift(ce, mem_fclk_21285, 5);
- ce->max_delta_ns = clockevent_delta2ns(0xffffff, ce);
- ce->min_delta_ns = clockevent_delta2ns(0x000004, ce);
ce->cpumask = cpumask_of(smp_processor_id());
-
- clockevents_register_device(ce);
+ clockevents_config_and_register(ce, mem_fclk_21285, 0x4, 0xffffff);
}
struct sys_timer footbridge_timer = {
diff --git a/arch/arm/mach-imx/epit.c b/arch/arm/mach-imx/epit.c
index 04a5961..e02de18 100644
--- a/arch/arm/mach-imx/epit.c
+++ b/arch/arm/mach-imx/epit.c
@@ -178,7 +178,6 @@ static struct irqaction epit_timer_irq = {
static struct clock_event_device clockevent_epit = {
.name = "epit",
.features = CLOCK_EVT_FEAT_ONESHOT,
- .shift = 32,
.set_mode = epit_set_mode,
.set_next_event = epit_set_next_event,
.rating = 200,
@@ -186,18 +185,10 @@ static struct clock_event_device clockevent_epit = {
static int __init epit_clockevent_init(struct clk *timer_clk)
{
- unsigned int c = clk_get_rate(timer_clk);
-
- clockevent_epit.mult = div_sc(c, NSEC_PER_SEC,
- clockevent_epit.shift);
- clockevent_epit.max_delta_ns =
- clockevent_delta2ns(0xfffffffe, &clockevent_epit);
- clockevent_epit.min_delta_ns =
- clockevent_delta2ns(0x800, &clockevent_epit);
-
clockevent_epit.cpumask = cpumask_of(0);
-
- clockevents_register_device(&clockevent_epit);
+ clockevents_config_and_register(&clockevent_epit,
+ clk_get_rate(timer_clk),
+ 0x800, 0xfffffffe);
return 0;
}
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c
index f017302..62769df 100644
--- a/arch/arm/mach-imx/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -256,7 +256,6 @@ static struct irqaction mxc_timer_irq = {
static struct clock_event_device clockevent_mxc = {
.name = "mxc_timer1",
.features = CLOCK_EVT_FEAT_ONESHOT,
- .shift = 32,
.set_mode = mxc_set_mode,
.set_next_event = mx1_2_set_next_event,
.rating = 200,
@@ -264,21 +263,13 @@ static struct clock_event_device clockevent_mxc = {
static int __init mxc_clockevent_init(struct clk *timer_clk)
{
- unsigned int c = clk_get_rate(timer_clk);
-
if (timer_is_v2())
clockevent_mxc.set_next_event = v2_set_next_event;
- clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC,
- clockevent_mxc.shift);
- clockevent_mxc.max_delta_ns =
- clockevent_delta2ns(0xfffffffe, &clockevent_mxc);
- clockevent_mxc.min_delta_ns =
- clockevent_delta2ns(0xff, &clockevent_mxc);
-
clockevent_mxc.cpumask = cpumask_of(0);
-
- clockevents_register_device(&clockevent_mxc);
+ clockevents_config_and_register(&clockevent_mxc,
+ clk_get_rate(timer_clk),
+ 0xff, 0xfffffffe);
return 0;
}
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 8c0c0e2..65ff98c 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -523,22 +523,15 @@ static struct clock_event_device clockevent_ixp4xx = {
.name = "ixp4xx timer1",
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.rating = 200,
- .shift = 24,
.set_mode = ixp4xx_set_mode,
.set_next_event = ixp4xx_set_next_event,
};
static void __init ixp4xx_clockevent_init(void)
{
- clockevent_ixp4xx.mult = div_sc(IXP4XX_TIMER_FREQ, NSEC_PER_SEC,
- clockevent_ixp4xx.shift);
- clockevent_ixp4xx.max_delta_ns =
- clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx);
- clockevent_ixp4xx.min_delta_ns =
- clockevent_delta2ns(0xf, &clockevent_ixp4xx);
clockevent_ixp4xx.cpumask = cpumask_of(0);
-
- clockevents_register_device(&clockevent_ixp4xx);
+ clockevents_config_and_register(&clockevent_ixp4xx, IXP4XX_TIMER_FREQ,
+ 0xf, 0xfffffffe);
}
void ixp4xx_restart(char mode, const char *cmd)
diff --git a/arch/arm/mach-lpc32xx/timer.c b/arch/arm/mach-lpc32xx/timer.c
index c40667c..502b3c6 100644
--- a/arch/arm/mach-lpc32xx/timer.c
+++ b/arch/arm/mach-lpc32xx/timer.c
@@ -70,7 +70,6 @@ static void lpc32xx_clkevt_mode(enum clock_event_mode mode,
static struct clock_event_device lpc32xx_clkevt = {
.name = "lpc32xx_clkevt",
.features = CLOCK_EVT_FEAT_ONESHOT,
- .shift = 32,
.rating = 300,
.set_next_event = lpc32xx_clkevt_next_event,
.set_mode = lpc32xx_clkevt_mode,
@@ -141,14 +140,8 @@ static void __init lpc32xx_timer_init(void)
setup_irq(IRQ_LPC32XX_TIMER0, &lpc32xx_timer_irq);
/* Setup the clockevent structure. */
- lpc32xx_clkevt.mult = div_sc(clkrate, NSEC_PER_SEC,
- lpc32xx_clkevt.shift);
- lpc32xx_clkevt.max_delta_ns = clockevent_delta2ns(-1,
- &lpc32xx_clkevt);
- lpc32xx_clkevt.min_delta_ns = clockevent_delta2ns(1,
- &lpc32xx_clkevt) + 1;
lpc32xx_clkevt.cpumask = cpumask_of(0);
- clockevents_register_device(&lpc32xx_clkevt);
+ clockevents_config_and_register(&lpc32xx_clkevt, clkrate, 1, -1);
/* Use timer1 as clock source. */
__raw_writel(LPC32XX_TIMER_CNTR_TCR_RESET,
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 936447c..86a18b3 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -141,7 +141,6 @@ static void timer_set_mode(enum clock_event_mode mode,
static struct clock_event_device ckevt = {
.name = "clockevent",
.features = CLOCK_EVT_FEAT_ONESHOT,
- .shift = 32,
.rating = 200,
.set_next_event = timer_set_next_event,
.set_mode = timer_set_mode,
@@ -198,15 +197,13 @@ void __init timer_init(int irq)
setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE);
- ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift);
- ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt);
- ckevt.min_delta_ns = clockevent_delta2ns(MIN_DELTA, &ckevt);
ckevt.cpumask = cpumask_of(0);
setup_irq(irq, &timer_irq);
clocksource_register_hz(&cksrc, CLOCK_TICK_RATE);
- clockevents_register_device(&ckevt);
+ clockevents_config_and_register(&ckevt, CLOCK_TICK_RATE,
+ MIN_DELTA, MAX_DELTA);
}
#ifdef CONFIG_OF
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 476549a..b9e7449 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -144,13 +144,9 @@ static int __cpuinit msm_local_timer_setup(struct clock_event_device *evt)
evt->rating = msm_clockevent.rating;
evt->set_mode = msm_timer_set_mode;
evt->set_next_event = msm_timer_set_next_event;
- evt->shift = msm_clockevent.shift;
- evt->mult = div_sc(GPT_HZ, NSEC_PER_SEC, evt->shift);
- evt->max_delta_ns = clockevent_delta2ns(0xf0000000, evt);
- evt->min_delta_ns = clockevent_delta2ns(4, evt);
*__this_cpu_ptr(msm_evt.percpu_evt) = evt;
- clockevents_register_device(evt);
+ clockevents_config_and_register(evt, GPT_HZ, 4, 0xf0000000);
enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING);
return 0;
}
diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c
index 856f4c7..27451b1 100644
--- a/arch/arm/mach-mxs/timer.c
+++ b/arch/arm/mach-mxs/timer.c
@@ -195,7 +195,6 @@ static void mxs_set_mode(enum clock_event_mode mode,
static struct clock_event_device mxs_clockevent_device = {
.name = "mxs_timrot",
.features = CLOCK_EVT_FEAT_ONESHOT,
- .shift = 32,
.set_mode = mxs_set_mode,
.set_next_event = timrotv2_set_next_event,
.rating = 200,
@@ -203,25 +202,12 @@ static struct clock_event_device mxs_clockevent_device = {
static int __init mxs_clockevent_init(struct clk *timer_clk)
{
- unsigned int c = clk_get_rate(timer_clk);
-
- mxs_clockevent_device.mult =
- div_sc(c, NSEC_PER_SEC, mxs_clockevent_device.shift);
- mxs_clockevent_device.cpumask = cpumask_of(0);
- if (timrot_is_v1()) {
+ if (timrot_is_v1())
mxs_clockevent_device.set_next_event = timrotv1_set_next_event;
- mxs_clockevent_device.max_delta_ns =
- clockevent_delta2ns(0xfffe, &mxs_clockevent_device);
- mxs_clockevent_device.min_delta_ns =
- clockevent_delta2ns(0xf, &mxs_clockevent_device);
- } else {
- mxs_clockevent_device.max_delta_ns =
- clockevent_delta2ns(0xfffffffe, &mxs_clockevent_device);
- mxs_clockevent_device.min_delta_ns =
- clockevent_delta2ns(0xf, &mxs_clockevent_device);
- }
-
- clockevents_register_device(&mxs_clockevent_device);
+ mxs_clockevent_device.cpumask = cpumask_of(0);
+ clockevents_config_and_register(&mxs_clockevent_device,
+ clk_get_rate(timer_clk), 0xf,
+ timrot_is_v1() ? 0xfffe : 0xfffffffe);
return 0;
}
diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c
index e24c141..d780a93 100644
--- a/arch/arm/mach-netx/time.c
+++ b/arch/arm/mach-netx/time.c
@@ -76,7 +76,6 @@ static int netx_set_next_event(unsigned long evt,
static struct clock_event_device netx_clockevent = {
.name = "netx-timer" __stringify(TIMER_CLOCKEVENT),
- .shift = 32,
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.set_next_event = netx_set_next_event,
.set_mode = netx_set_mode,
@@ -140,16 +139,11 @@ static void __init netx_timer_init(void)
clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE),
"netx_timer", CLOCK_TICK_RATE, 200, 32, clocksource_mmio_readl_up);
- netx_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC,
- netx_clockevent.shift);
- netx_clockevent.max_delta_ns =
- clockevent_delta2ns(0xfffffffe, &netx_clockevent);
/* with max_delta_ns >= delta2ns(0x800) the system currently runs fine.
* Adding some safety ... */
- netx_clockevent.min_delta_ns =
- clockevent_delta2ns(0xa00, &netx_clockevent);
netx_clockevent.cpumask = cpumask_of(0);
- clockevents_register_device(&netx_clockevent);
+ clockevents_config_and_register(&netx_clockevent, CLOCK_TICK_RATE,
+ 0xa00, 0xfffffffe);
}
struct sys_timer netx_timer = {
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 4d4816f..5b7c556 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -145,7 +145,6 @@ static void omap_mpu_set_mode(enum clock_event_mode mode,
static struct clock_event_device clockevent_mpu_timer1 = {
.name = "mpu_timer1",
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
- .shift = 32,
.set_next_event = omap_mpu_set_next_event,
.set_mode = omap_mpu_set_mode,
};
@@ -170,15 +169,9 @@ static __init void omap_init_mpu_timer(unsigned long rate)
setup_irq(INT_TIMER1, &omap_mpu_timer1_irq);
omap_mpu_timer_start(0, (rate / HZ) - 1, 1);
- clockevent_mpu_timer1.mult = div_sc(rate, NSEC_PER_SEC,
- clockevent_mpu_timer1.shift);
- clockevent_mpu_timer1.max_delta_ns =
- clockevent_delta2ns(-1, &clockevent_mpu_timer1);
- clockevent_mpu_timer1.min_delta_ns =
- clockevent_delta2ns(1, &clockevent_mpu_timer1);
-
clockevent_mpu_timer1.cpumask = cpumask_of(0);
- clockevents_register_device(&clockevent_mpu_timer1);
+ clockevents_config_and_register(&clockevent_mpu_timer1, rate,
+ 1, -1);
}
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 41152fa..0b74246 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -140,7 +140,6 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode,
static struct clock_event_device clockevent_32k_timer = {
.name = "32k-timer",
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
- .shift = 32,
.set_next_event = omap_32k_timer_set_next_event,
.set_mode = omap_32k_timer_set_mode,
};
@@ -165,16 +164,9 @@ static __init void omap_init_32k_timer(void)
{
setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
- clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC,
- NSEC_PER_SEC,
- clockevent_32k_timer.shift);
- clockevent_32k_timer.max_delta_ns =
- clockevent_delta2ns(0xfffffffe, &clockevent_32k_timer);
- clockevent_32k_timer.min_delta_ns =
- clockevent_delta2ns(1, &clockevent_32k_timer);
-
clockevent_32k_timer.cpumask = cpumask_of(0);
- clockevents_register_device(&clockevent_32k_timer);
+ clockevents_config_and_register(&clockevent_32k_timer,
+ OMAP_32K_TICKS_PER_SEC, 1, 0xfffffffe);
}
/*
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 691aa67..3e2ffdb 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -131,7 +131,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
static struct clock_event_device clockevent_gpt = {
.name = "gp_timer",
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
- .shift = 32,
.rating = 300,
.set_next_event = omap2_gp_timer_set_next_event,
.set_mode = omap2_gp_timer_set_mode,
@@ -340,17 +339,11 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
__omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
- clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
- clockevent_gpt.shift);
- clockevent_gpt.max_delta_ns =
- clockevent_delta2ns(0xffffffff, &clockevent_gpt);
- clockevent_gpt.min_delta_ns =
- clockevent_delta2ns(3, &clockevent_gpt);
- /* Timer internal resynch latency. */
-
clockevent_gpt.cpumask = cpu_possible_mask;
clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
- clockevents_register_device(&clockevent_gpt);
+ clockevents_config_and_register(&clockevent_gpt, clkev.rate,
+ 3, /* Timer internal resynch latency */
+ 0xffffffff);
pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
gptimer_id, clkev.rate);
diff --git a/arch/arm/mach-prima2/timer.c b/arch/arm/mach-prima2/timer.c
index d95bf25..4f69e67 100644
--- a/arch/arm/mach-prima2/timer.c
+++ b/arch/arm/mach-prima2/timer.c
@@ -175,15 +175,9 @@ static u32 notrace sirfsoc_read_sched_clock(void)
static void __init sirfsoc_clockevent_init(void)
{
- clockevents_calc_mult_shift(&sirfsoc_clockevent, CLOCK_TICK_RATE, 60);
-
- sirfsoc_clockevent.max_delta_ns =
- clockevent_delta2ns(-2, &sirfsoc_clockevent);
- sirfsoc_clockevent.min_delta_ns =
- clockevent_delta2ns(2, &sirfsoc_clockevent);
-
sirfsoc_clockevent.cpumask = cpumask_of(0);
- clockevents_register_device(&sirfsoc_clockevent);
+ clockevents_config_and_register(&sirfsoc_clockevent, CLOCK_TICK_RATE,
+ 2, -2);
}
/* initialize the kernel jiffy timer source */
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 4bc47d6..08cc47f 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -113,18 +113,14 @@ static void __init pxa_timer_init(void)
setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate);
- clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4);
- ckevt_pxa_osmr0.max_delta_ns =
- clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
- ckevt_pxa_osmr0.min_delta_ns =
- clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1;
ckevt_pxa_osmr0.cpumask = cpumask_of(0);
setup_irq(IRQ_OST0, &pxa_ost0_irq);
clocksource_mmio_init(OSCR, "oscr0", clock_tick_rate, 200, 32,
clocksource_mmio_readl_up);
- clockevents_register_device(&ckevt_pxa_osmr0);
+ clockevents_config_and_register(&ckevt_pxa_osmr0, clock_tick_rate,
+ MIN_OSCR_DELTA * 2, 0x7fffffff);
}
#ifdef CONFIG_PM
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 80702c9..6e980da 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -91,18 +91,14 @@ static void __init sa1100_timer_init(void)
setup_sched_clock(sa1100_read_sched_clock, 32, 3686400);
- clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4);
- ckevt_sa1100_osmr0.max_delta_ns =
- clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0);
- ckevt_sa1100_osmr0.min_delta_ns =
- clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1;
ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
setup_irq(IRQ_OST0, &sa1100_timer_irq);
clocksource_mmio_init(OSCR, "oscr", CLOCK_TICK_RATE, 200, 32,
clocksource_mmio_readl_up);
- clockevents_register_device(&ckevt_sa1100_osmr0);
+ clockevents_config_and_register(&ckevt_sa1100_osmr0, 3686400,
+ MIN_OSCR_DELTA * 2, 0x7fffffff);
}
#ifdef CONFIG_PM
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index e4863f3..bc86161 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -259,14 +259,10 @@ static void __init tegra_init_timer(void)
BUG();
}
- clockevents_calc_mult_shift(&tegra_clockevent, 1000000, 5);
- tegra_clockevent.max_delta_ns =
- clockevent_delta2ns(0x1fffffff, &tegra_clockevent);
- tegra_clockevent.min_delta_ns =
- clockevent_delta2ns(0x1, &tegra_clockevent);
tegra_clockevent.cpumask = cpu_all_mask;
tegra_clockevent.irq = tegra_timer_irq.irq;
- clockevents_register_device(&tegra_clockevent);
+ clockevents_config_and_register(&tegra_clockevent, 1000000,
+ 0x1, 0x1fffffff);
#ifdef CONFIG_HAVE_ARM_TWD
twd_local_timer_of_register();
#endif
diff --git a/arch/arm/mach-vt8500/timer.c b/arch/arm/mach-vt8500/timer.c
index 3dd21a4..ed66cf0 100644
--- a/arch/arm/mach-vt8500/timer.c
+++ b/arch/arm/mach-vt8500/timer.c
@@ -168,17 +168,12 @@ void __init vt8500_timer_init(void)
pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n",
__func__, clocksource.name);
- clockevents_calc_mult_shift(&clockevent, VT8500_TIMER_HZ, 4);
-
- /* copy-pasted from mach-msm; no idea */
- clockevent.max_delta_ns =
- clockevent_delta2ns(0xf0000000, &clockevent);
- clockevent.min_delta_ns = clockevent_delta2ns(4, &clockevent);
clockevent.cpumask = cpumask_of(0);
if (setup_irq(timer_irq, &irq))
pr_err("%s: setup_irq failed for %s\n", __func__,
clockevent.name);
- clockevents_register_device(&clockevent);
+ clockevents_config_and_register(&clockevent, VT8500_TIMER_HZ,
+ 4, 0xf0000000);
}
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c
index fa27c49..b61ab3e 100644
--- a/arch/arm/mach-w90x900/time.c
+++ b/arch/arm/mach-w90x900/time.c
@@ -91,7 +91,6 @@ static int nuc900_clockevent_setnextevent(unsigned long evt,
static struct clock_event_device nuc900_clockevent_device = {
.name = "nuc900-timer0",
- .shift = 32,
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.set_mode = nuc900_clockevent_setmode,
.set_next_event = nuc900_clockevent_setnextevent,
@@ -133,15 +132,10 @@ static void __init nuc900_clockevents_init(void)
__raw_writel(RESETINT, REG_TISR);
setup_irq(IRQ_TIMER0, &nuc900_timer0_irq);
- nuc900_clockevent_device.mult = div_sc(rate, NSEC_PER_SEC,
- nuc900_clockevent_device.shift);
- nuc900_clockevent_device.max_delta_ns = clockevent_delta2ns(0xffffffff,
- &nuc900_clockevent_device);
- nuc900_clockevent_device.min_delta_ns = clockevent_delta2ns(0xf,
- &nuc900_clockevent_device);
nuc900_clockevent_device.cpumask = cpumask_of(0);
- clockevents_register_device(&nuc900_clockevent_device);
+ clockevents_config_and_register(&nuc900_clockevent_device, rate,
+ 0xf, 0xffffffff);
}
static void __init nuc900_clocksource_init(void)
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index cbfbbe4..837a2d5 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -156,14 +156,9 @@ void __init iop_init_time(unsigned long tick_rate)
write_tmr0(timer_ctl & ~IOP_TMR_EN);
write_tisr(1);
setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq);
- clockevents_calc_mult_shift(&iop_clockevent,
- tick_rate, IOP_MIN_RANGE);
- iop_clockevent.max_delta_ns =
- clockevent_delta2ns(0xfffffffe, &iop_clockevent);
- iop_clockevent.min_delta_ns =
- clockevent_delta2ns(0xf, &iop_clockevent);
iop_clockevent.cpumask = cpumask_of(0);
- clockevents_register_device(&iop_clockevent);
+ clockevents_config_and_register(&iop_clockevent, tick_rate,
+ 0xf, 0xfffffffe);
/*
* Set up free-running clocksource timer 1.
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 0f4fa86..5d5ac0f 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -156,7 +156,6 @@ orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
static struct clock_event_device orion_clkevt = {
.name = "orion_tick",
.features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
- .shift = 32,
.rating = 300,
.set_next_event = orion_clkevt_next_event,
.set_mode = orion_clkevt_mode,
@@ -221,9 +220,6 @@ orion_time_init(void __iomem *_bridge_base, u32 _bridge_timer1_clr_mask,
* Setup clockevent timer (interrupt-driven).
*/
setup_irq(irq, &orion_timer_irq);
- orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift);
- orion_clkevt.max_delta_ns = clockevent_delta2ns(0xfffffffe, &orion_clkevt);
- orion_clkevt.min_delta_ns = clockevent_delta2ns(1, &orion_clkevt);
orion_clkevt.cpumask = cpumask_of(0);
- clockevents_register_device(&orion_clkevt);
+ clockevents_config_and_register(&orion_clkevt, tclk, 1, 0xfffffffe);
}
diff --git a/arch/arm/plat-samsung/s5p-time.c b/arch/arm/plat-samsung/s5p-time.c
index 028b6e8..798268b 100644
--- a/arch/arm/plat-samsung/s5p-time.c
+++ b/arch/arm/plat-samsung/s5p-time.c
@@ -274,15 +274,8 @@ static void __init s5p_clockevent_init(void)
clock_rate = clk_get_rate(tin_event);
clock_count_per_tick = clock_rate / HZ;
- clockevents_calc_mult_shift(&time_event_device,
- clock_rate, S5PTIMER_MIN_RANGE);
- time_event_device.max_delta_ns =
- clockevent_delta2ns(-1, &time_event_device);
- time_event_device.min_delta_ns =
- clockevent_delta2ns(1, &time_event_device);
-
time_event_device.cpumask = cpumask_of(0);
- clockevents_register_device(&time_event_device);
+ clockevents_config_and_register(&time_event_device, clock_rate, 1, -1);
irq_number = timer_source.event_id + IRQ_TIMER0;
setup_irq(irq_number, &s5p_clock_event_irq);
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
index 03321af..bd5c53c 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/plat-spear/time.c
@@ -186,15 +186,9 @@ static void __init spear_clockevent_init(int irq)
tick_rate = clk_get_rate(gpt_clk);
tick_rate >>= CTRL_PRESCALER16;
- clockevents_calc_mult_shift(&clkevt, tick_rate, SPEAR_MIN_RANGE);
-
- clkevt.max_delta_ns = clockevent_delta2ns(0xfff0,
- &clkevt);
- clkevt.min_delta_ns = clockevent_delta2ns(3, &clkevt);
-
clkevt.cpumask = cpumask_of(0);
- clockevents_register_device(&clkevt);
+ clockevents_config_and_register(&clkevt, tick_rate, 3, 0xfff0);
setup_irq(irq, &spear_timer_irq);
}
--
1.7.9.5
^ permalink raw reply related
* [PATCH v2 1/3] clockevents: export clockevents_config_and_register for module use
From: Shawn Guo @ 2013-01-12 11:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1357991406-22778-1-git-send-email-shawn.guo@linaro.org>
clockevents_config_and_register is a handy helper for clockevent
drivers, some of which might support module build, so export the symbol.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
---
kernel/time/clockevents.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/time/clockevents.c b/kernel/time/clockevents.c
index 30b6de0..c6d6400 100644
--- a/kernel/time/clockevents.c
+++ b/kernel/time/clockevents.c
@@ -339,6 +339,7 @@ void clockevents_config_and_register(struct clock_event_device *dev,
clockevents_config(dev, freq);
clockevents_register_device(dev);
}
+EXPORT_SYMBOL_GPL(clockevents_config_and_register);
/**
* clockevents_update_freq - Update frequency and reprogram a clock event device.
--
1.7.9.5
^ permalink raw reply related
* [PATCH v2 0/3] Use helper clockevents_config_and_register()
From: Shawn Guo @ 2013-01-12 11:50 UTC (permalink / raw)
To: linux-arm-kernel
The clockevent core is able to figure out the best mult and shift,
calculate min_delta_ns and max_delta_ns, with the necessary info passed
into clockevents_config_and_register(). Use this handy helper to make
the drivers less error prone and save some LOC.
Changes since v1:
- Add one patch to export clockevents_config_and_register for fixing
the error [1] reported by Fengguang.
- Add Acked-by and Tested-by tags given by people (Thanks!)
[1] http://thread.gmane.org/gmane.linux.ports.arm.kernel/209152
Shawn Guo (3):
clockevents: export clockevents_config_and_register for module use
ARM: use clockevents_config_and_register() where possible
clocksource: use clockevents_config_and_register() where possible
arch/arm/mach-at91/at91rm9200_time.c | 7 ++-----
arch/arm/mach-cns3xxx/core.c | 13 +++----------
arch/arm/mach-exynos/mct.c | 18 ++++--------------
arch/arm/mach-footbridge/dc21285-timer.c | 6 +-----
arch/arm/mach-imx/epit.c | 15 +++------------
arch/arm/mach-imx/time.c | 15 +++------------
arch/arm/mach-ixp4xx/common.c | 11 ++---------
arch/arm/mach-lpc32xx/timer.c | 9 +--------
arch/arm/mach-mmp/time.c | 7 ++-----
arch/arm/mach-msm/timer.c | 6 +-----
arch/arm/mach-mxs/timer.c | 24 +++++-------------------
arch/arm/mach-netx/time.c | 10 ++--------
arch/arm/mach-omap1/time.c | 11 ++---------
arch/arm/mach-omap1/timer32k.c | 12 ++----------
arch/arm/mach-omap2/timer.c | 13 +++----------
arch/arm/mach-prima2/timer.c | 10 ++--------
arch/arm/mach-pxa/time.c | 8 ++------
arch/arm/mach-sa1100/time.c | 8 ++------
arch/arm/mach-tegra/timer.c | 8 ++------
arch/arm/mach-vt8500/timer.c | 9 ++-------
arch/arm/mach-w90x900/time.c | 10 ++--------
arch/arm/plat-iop/time.c | 9 ++-------
arch/arm/plat-orion/time.c | 6 +-----
arch/arm/plat-samsung/s5p-time.c | 9 +--------
arch/arm/plat-spear/time.c | 8 +-------
drivers/clocksource/cs5535-clockevt.c | 11 ++---------
drivers/clocksource/sunxi_timer.c | 11 ++---------
drivers/clocksource/tcb_clksrc.c | 7 +------
kernel/time/clockevents.c | 1 +
29 files changed, 59 insertions(+), 233 deletions(-)
--
1.7.9.5
^ permalink raw reply
* [PATCH RFT 3/3] ARM: tegra: dts: seaboard: enable keyboard
From: Laxman Dewangan @ 2013-01-12 11:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130112104730.GQ23505@n2100.arm.linux.org.uk>
On Saturday 12 January 2013 04:17 PM, Russell King - ARM Linux wrote:
> On Sat, Jan 12, 2013 at 04:04:28PM +0530, Laxman Dewangan wrote:
>> Going through clock driver, the clk_get() should return error pointer or
>> valid pointer, atleast not NULL.
> No. clk_get() will return whatever value the 'clk' pointer found in
> the clk_lookup structure contains. Or it will return an error pointer.
>
> This topic has had enough discussion in the past that I'll say: go and
> look up in the archives emails from me on this subject. I've been very
> clear over the years about this.
>
>> Probably our clock driver is returning to NULL and hence issue is
>> becasue whole world, it check for IS_ERR or !IS_ERR() and null clk
>> pointer treated as !IS_ERR().
> Probably not. As far as _drivers_ go, either the clk cookie is an error
> (IS_ERR() is true) _OR_ it is valid to be passed back into the clock API.
> You will find statements from me in the past to that: whatever clk_get()
> returns which is _not_ an error must be accepted by the rest of the clk
> API.
Ok, Should we document that after clk_get(), we should check for
IS_ERR() only for validation. The way you explain earlier.
Documentation does not have this.
/**
struct clk *clk;
clk = clk_get(NULL, "my_gateable_clk");
clk_prepare(clk);
clk_enable(clk);
**/
The clk.h explain this:
* Returns a struct clk corresponding to the clock producer, or
* valid IS_ERR() condition containing errno.
The IS_ERR() return false for the null pointer. So as per you, it should
be valid if the IS_ERR() false for returned pointer and hence NULL
pointer should be valid for the clock driver.
Now we need to change the tegra_periph_reset_*() to accept the null pointer.
> Drivers never dereference the returned clk, so why should they care about
> anything other than "is it an error" given by IS_ERR(). (notice the lack
> of question mark, that's not a question to be answered.)
The issue is that information is getting passed to other part fo driver
where it is dereferencing the pointer. Probably we need to work on the
reset part also to move as part of clock driver to avoid this crash.
^ permalink raw reply
* [PATCH 3/4] ARM: imx: restore uncompress.h to a common place
From: Shawn Guo @ 2013-01-12 11:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F101F4.8080009@gmail.com>
On Sat, Jan 12, 2013 at 07:25:56AM +0100, Dirk Behme wrote:
> On 12.12.2012 14:45, Shawn Guo wrote:
> >Restore arch/arm/plat-mxc/include/mach/uncompress.h removed by commit
> >3995eb8 (ARM: imx: merge plat-mxc into mach-imx) to a common place as
> >arch/arm/include/debug/uncompress/imx.h.
> >
> >Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> >---
> ...
> >+++ b/arch/arm/include/debug/uncompress/imx.h
> ...
> >+ * arch/arm/plat-mxc/include/mach/uncompress.h
>
> In case you touch these patches again, you might check if the above
> path and file name in the file header should be adapted to the new
> file location, too.
>
I would not bother to update that. To me, it's quite pointless to have
a full file name there. If I can choose, I would remove it completely.
Shawn
^ permalink raw reply
* [PATCH RFT 3/3] ARM: tegra: dts: seaboard: enable keyboard
From: Russell King - ARM Linux @ 2013-01-12 10:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F13C34.3020808@nvidia.com>
On Sat, Jan 12, 2013 at 04:04:28PM +0530, Laxman Dewangan wrote:
> Going through clock driver, the clk_get() should return error pointer or
> valid pointer, atleast not NULL.
No. clk_get() will return whatever value the 'clk' pointer found in
the clk_lookup structure contains. Or it will return an error pointer.
This topic has had enough discussion in the past that I'll say: go and
look up in the archives emails from me on this subject. I've been very
clear over the years about this.
> Probably our clock driver is returning to NULL and hence issue is
> becasue whole world, it check for IS_ERR or !IS_ERR() and null clk
> pointer treated as !IS_ERR().
Probably not. As far as _drivers_ go, either the clk cookie is an error
(IS_ERR() is true) _OR_ it is valid to be passed back into the clock API.
You will find statements from me in the past to that: whatever clk_get()
returns which is _not_ an error must be accepted by the rest of the clk
API.
Drivers never dereference the returned clk, so why should they care about
anything other than "is it an error" given by IS_ERR(). (notice the lack
of question mark, that's not a question to be answered.)
^ permalink raw reply
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