* [V3 PATCH 11/25] arm: mmp2: change the defintion of usb devices
From: Haojian Zhuang @ 2013-01-17 9:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130117090902.GE10814@arwen.pp.htv.fi>
On Thu, Jan 17, 2013 at 5:12 PM, Felipe Balbi <balbi@ti.com> wrote:
> On Tue, Jan 15, 2013 at 01:19:04AM -0500, Chao Xie wrote:
>> add the udc/otg/ehci devices for mmp2
>>
>> Signed-off-by: Chao Xie <chao.xie@marvell.com>
>
> Haojian, can I get an Acked-by for this patch or will you carry it
> yourself ?
>
> Likewise for all other arch/arm/* patches in this series
>
> --
> balbi
Sure. You can apply these patches.
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
^ permalink raw reply
* [[PATCH v2]] OMAP: omap4-panda: add WiLink shared transport power functions
From: Peter Ujfalusi @ 2013-01-17 9:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358415316.6252.20.camel@cumari.coelho.fi>
Hi Luca,
On 01/17/2013 10:35 AM, Luciano Coelho wrote:
>> I just wonder how this is going to work with DT... You are not going to have
>> the ability to use callback in this form.
>> I think the GPIO handling should be done in the driver itself rather than in
>> the board file.
>
> I agree. The problem is that it used to be in the ti-st driver itself,
> but it has been removed in a patch that says "different platforms have
> begun to have their own ways to power-up/down the chip." (eccf2979
> drivers/misc/ti-st: remove gpio handling).
Hrm, this is a strange patch for sure. Coming at times when we all suppose to
move to DT and get rid of such callbacks for drivers.
> This needs to be clarified first. I think we could use this for now and
> later fix this properly (hopefully move it back to the ti-st driver).
Can the offending patch be reverted?
As I said to Felipe, I don't have any objections against this patch. It fits
the purpose. But with the DT support (and removing callbacks to platform code)
you are going to have fair amount work.
--
P?ter
^ permalink raw reply
* [[PATCH v2]] OMAP: omap4-panda: add WiLink shared transport power functions
From: Peter Ujfalusi @ 2013-01-17 9:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130117093417.GH10814@arwen.pp.htv.fi>
On 01/17/2013 10:34 AM, Felipe Balbi wrote:
>> I just wonder how this is going to work with DT... You are not going to have
>> the ability to use callback in this form.
>> I think the GPIO handling should be done in the driver itself rather than in
>> the board file.
>
> that can (should ?) be moved to ti-st eventually. In fact I don't know
> why it was removed in the first place, we would need Pavan to help us
> with that query.
Yes, this is a good question. I don't know what is the spacial thing platforms
need to do in the callback..
> Still, for -rc, the minimal patch had to be cooked, right ?
Sure it need to be fixed. I would try to revert the patch which caused the
issue (eccf2979 drivers/misc/ti-st: remove gpio handling).
Should fix the legacy boot, but it is going to be even bigger fun to move to
DT (and get rid of the callbacks).
I don't have anything against this patch as such. Just wanted to point out the
obvious that the comfort of callbacks are not going to be around in some cases.
--
P?ter
^ permalink raw reply
* [PATCH 1/6] ARM: sunxi: Add pinctrl driver for Allwinner SoCs
From: Linus Walleij @ 2013-01-17 9:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50EAEED2.8020003@free-electrons.com>
On Mon, Jan 7, 2013 at 4:50 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Le 07/01/2013 00:46, Linus Walleij a ?crit :
>> or similar, as you see 2 mA for each added driver stage. The driver can
>> convert to any internal representation...
>
> Ok, I will do it.
>
> Do you have other comments on the driver that I should wait for before
> sending a v3?
Not really, I'm walking my inbox (which has again exploded) maybe
you've already sent new patches...
Thanks,
Linus Walleij
^ permalink raw reply
* [PATCH V5 1/3] clk: tegra: add Tegra specific clocks
From: Peter De Schrijver @ 2013-01-17 9:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358369575-7325-1-git-send-email-swarren@wwwdotorg.org>
> +static struct clk *_tegra_clk_register_pll(const char *name,
> + const char *parent_name, void __iomem *clk_base,
> + void __iomem *pmc, unsigned long flags,
> + unsigned long fixed_rate,
> + struct tegra_clk_pll_params *pll_params, u8 pll_flags,
> + struct tegra_clk_pll_freq_table *freq_table, spinlock_t *lock,
> + bool plle)
> +{
> + struct tegra_clk_pll *pll;
> + struct clk *clk;
> + struct clk_init_data init;
> +
> + pll = kzalloc(sizeof(*pll), GFP_KERNEL);
> + if (!pll)
> + return ERR_PTR(-ENOMEM);
> +
> + init.name = name;
> + init.ops = plle ? &tegra_clk_plle_ops : &tegra_clk_pll_ops;
> + init.flags = flags;
> + init.parent_names = (parent_name ? &parent_name : NULL);
> + init.num_parents = (parent_name ? 1 : 0);
> +
> + pll->clk_base = clk_base;
> + pll->pmc = pmc;
> +
> + pll->freq_table = freq_table;
> + pll->params = pll_params;
> + pll->fixed_rate = fixed_rate;
> + pll->flags = pll_flags;
> + pll->lock = lock;
> +
> + pll->divp_shift = PLL_BASE_DIVP_SHIFT;
> + pll->divp_width = PLL_BASE_DIVP_WIDTH;
> + pll->divn_shift = PLL_BASE_DIVN_SHIFT;
> + pll->divn_width = PLL_BASE_DIVN_WIDTH;
> + pll->divm_shift = PLL_BASE_DIVM_SHIFT;
> + pll->divm_width = PLL_BASE_DIVM_WIDTH;
> +
> + /* Data in .init is copied by clk_register(), so stack variable OK */
> + pll->hw.init = &init;
> +
> + clk = clk_register(NULL, &pll->hw);
> + if (IS_ERR(clk))
> + kfree(pll);
> +
> + return clk;
> +}
> +
> +struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
> + void __iomem *clk_base, void __iomem *pmc,
> + unsigned long flags, unsigned long fixed_rate,
> + struct tegra_clk_pll_params *pll_params, u8 pll_flags,
> + struct tegra_clk_pll_freq_table *freq_table, spinlock_t *lock)
> +{
> + return _tegra_clk_register_pll(name, parent_name, clk_base, pmc,
> + flags, fixed_rate, pll_params, pll_flags, freq_table,
> + lock, false);
> +}
> +
> +struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
> + void __iomem *clk_base, void __iomem *pmc,
> + unsigned long flags, unsigned long fixed_rate,
> + struct tegra_clk_pll_params *pll_params, u8 pll_flags,
> + struct tegra_clk_pll_freq_table *freq_table, spinlock_t *lock)
> +{
> + return _tegra_clk_register_pll(name, parent_name, clk_base, pmc,
> + flags, fixed_rate, pll_params, pll_flags, freq_table,
> + lock, true);
> +}
For Tegra114 I will need to introduce more new PLL types. So instead of using
a boolean plle, maybe just pass a pointer to the relevant struct clk_ops? This
will make extension for Tegra114 easier.
Cheers,
Peter.
^ permalink raw reply
* [RFC PATCH 2/6] ARM: OMAP: USB: Add phy binding information
From: Roger Quadros @ 2013-01-17 9:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358348462-27693-3-git-send-email-kishon@ti.com>
On 01/16/2013 05:00 PM, Kishon Vijay Abraham I wrote:
> This is in preparation for the changes in PHY library to support adding
> and getting multiple PHYs of the same type. In the new design, the
> binding information between the PHY and the USB controller should be
> specified in the platform specific initialization code. So it's been
> done for OMAP platforms here.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> This kind-of binding should be done in all the platforms (I've done only
> for OMAP platform).
> arch/arm/mach-omap2/usb-musb.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
> index 9d27e3f..bbe2fa5 100644
> --- a/arch/arm/mach-omap2/usb-musb.c
> +++ b/arch/arm/mach-omap2/usb-musb.c
> @@ -24,6 +24,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/io.h>
> #include <linux/usb/musb.h>
> +#include <linux/usb/phy.h>
>
> #include "omap_device.h"
> #include "soc.h"
> @@ -85,8 +86,12 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
> musb_plat.mode = board_data->mode;
> musb_plat.extvbus = board_data->extvbus;
>
> - if (cpu_is_omap44xx())
> + if (cpu_is_omap44xx()) {
> musb_plat.has_mailbox = true;
> + usb_bind_phy("musb-hdrc.0.auto", 0, "omap-usb2.1.auto");
> + } else if (cpu_is_omap34xx()) {
> + usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
> + }
Are you sure than these OMAP platforms cannot be wired in any other way
to the PHY?
If they can be then this association must come from the board files or
device tree.
>
> if (soc_is_am35xx()) {
> oh_name = "am35x_otg_hs";
>
--
cheers,
-roger
^ permalink raw reply
* [RFC PATCH 1/6] usb: otg: Add an API to bind the USB controller and PHY
From: Roger Quadros @ 2013-01-17 9:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358348462-27693-2-git-send-email-kishon@ti.com>
On 01/16/2013 05:00 PM, Kishon Vijay Abraham I wrote:
> New platforms are added which has multiple PHY's (of same type) and
> which has multiple USB controllers. The binding information has to be
> present in the PHY library (otg.c) in order for it to return the
> appropriate PHY whenever the USB controller request for the PHY. So
> added a new API to pass the binding information. This API should be
> called by platform specific initialization code.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> drivers/usb/otg/otg.c | 37 +++++++++++++++++++++++++++++++++++++
> include/linux/usb/phy.h | 22 ++++++++++++++++++++++
> 2 files changed, 59 insertions(+)
>
> diff --git a/drivers/usb/otg/otg.c b/drivers/usb/otg/otg.c
> index a30c041..492ba2f 100644
> --- a/drivers/usb/otg/otg.c
> +++ b/drivers/usb/otg/otg.c
> @@ -18,6 +18,7 @@
> #include <linux/usb/otg.h>
>
> static LIST_HEAD(phy_list);
> +static LIST_HEAD(phy_bind_list);
> static DEFINE_SPINLOCK(phy_lock);
>
> static struct usb_phy *__usb_find_phy(struct list_head *list,
> @@ -201,6 +202,42 @@ void usb_remove_phy(struct usb_phy *x)
> }
> EXPORT_SYMBOL(usb_remove_phy);
>
> +/**
> + * usb_bind_phy - bind the phy and the controller that uses the phy
> + * @dev_name: the device name of the device that will bind to the phy
> + * @index: index to specify the port number
> + * @phy_dev_name: the device name of the phy
> + *
> + * Fills the phy_bind structure with the dev_name and phy_dev_name. This will
> + * be used when the phy driver registers the phy and when the controller
> + * requests this phy.
> + *
> + * To be used by platform specific initialization code.
> + */
> +struct usb_phy_bind __init *usb_bind_phy(const char *dev_name, u8 index,
> + const char *phy_dev_name)
> +{
> + struct usb_phy_bind *phy_bind;
> + unsigned long flags;
> +
> + phy_bind = kzalloc(sizeof(*phy_bind), GFP_KERNEL);
> + if (!phy_bind) {
> + pr_err("phy_bind(): No memory for phy_bind");
Function name in comment doesn't match the actual.
Instead, you could use
pr_err("%s ...", __func__);
> + return ERR_PTR(-ENOMEM);
> + }
> +
> + phy_bind->dev_name = dev_name;
> + phy_bind->phy_dev_name = phy_dev_name;
> + phy_bind->index = index;
> +
> + spin_lock_irqsave(&phy_lock, flags);
> + list_add_tail(&phy_bind->list, &phy_bind_list);
> + spin_unlock_irqrestore(&phy_lock, flags);
> +
> + return phy_bind;
> +}
> +EXPORT_SYMBOL_GPL(usb_bind_phy);
> +
> const char *otg_state_string(enum usb_otg_state state)
> {
> switch (state) {
> diff --git a/include/linux/usb/phy.h b/include/linux/usb/phy.h
> index a29ae1e..fbeab1a 100644
> --- a/include/linux/usb/phy.h
> +++ b/include/linux/usb/phy.h
> @@ -106,6 +106,21 @@ struct usb_phy {
> enum usb_device_speed speed);
> };
>
> +/**
> + * struct usb_phy_bind - represent the binding for the phy
> + * @dev_name: the device name of the device that will bind to the phy
> + * @phy_dev_name: the device name of the phy
> + * @index: used if a single controller uses multiple phys
> + * @phy: reference to the phy
> + * @list: to maintain a linked list of the binding information
> + */
> +struct usb_phy_bind {
> + const char *dev_name;
> + const char *phy_dev_name;
> + u8 index;
> + struct usb_phy *phy;
> + struct list_head list;
> +};
>
> /* for board-specific init logic */
> extern int usb_add_phy(struct usb_phy *, enum usb_phy_type type);
> @@ -151,6 +166,8 @@ extern struct usb_phy *devm_usb_get_phy(struct device *dev,
> enum usb_phy_type type);
> extern void usb_put_phy(struct usb_phy *);
> extern void devm_usb_put_phy(struct device *dev, struct usb_phy *x);
> +extern struct usb_phy_bind *usb_bind_phy(const char *dev_name, u8 index,
> + const char *phy_dev_name);
> #else
> static inline struct usb_phy *usb_get_phy(enum usb_phy_type type)
> {
> @@ -171,6 +188,11 @@ static inline void devm_usb_put_phy(struct device *dev, struct usb_phy *x)
> {
> }
>
> +static inline struct usb_phy_bind *usb_bind_phy(const char *dev_name, u8 index,
> + const char *phy_dev_name)
> +{
> + return NULL;
> +}
> #endif
>
> static inline int
>
Controllers like ehci-omap which don't need OTG functionality would
benefit from this API. Can we make these PHY APIs not dependent on OTG /
OTG_UTILS?
cheers,
-roger
^ permalink raw reply
* [[PATCH v2]] OMAP: omap4-panda: add WiLink shared transport power functions
From: Luciano Coelho @ 2013-01-17 9:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F7C4A7.5060202@ti.com>
On Thu, 2013-01-17 at 10:30 +0100, Peter Ujfalusi wrote:
> Hi Luca,
Hi P?ter!
> On 01/16/2013 10:45 PM, Luciano Coelho wrote:
> > static struct ti_st_plat_data wilink_platform_data = {
> > - .nshutdown_gpio = 46,
> > .dev_name = "/dev/ttyO1",
> > .flow_cntrl = 1,
> > .baud_rate = 3000000,
> > - .chip_enable = NULL,
> > - .suspend = NULL,
> > - .resume = NULL,
> > + .chip_enable = plat_kim_chip_enable,
> > + .chip_disable = plat_kim_chip_disable,
>
> I just wonder how this is going to work with DT... You are not going to have
> the ability to use callback in this form.
> I think the GPIO handling should be done in the driver itself rather than in
> the board file.
I agree. The problem is that it used to be in the ti-st driver itself,
but it has been removed in a patch that says "different platforms have
begun to have their own ways to power-up/down the chip." (eccf2979
drivers/misc/ti-st: remove gpio handling).
This needs to be clarified first. I think we could use this for now and
later fix this properly (hopefully move it back to the ti-st driver).
--
Cheers,
Luca.
^ permalink raw reply
* [[PATCH v2]] OMAP: omap4-panda: add WiLink shared transport power functions
From: Felipe Balbi @ 2013-01-17 9:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F7C4A7.5060202@ti.com>
On Thu, Jan 17, 2013 at 10:30:15AM +0100, Peter Ujfalusi wrote:
> Hi Luca,
>
> On 01/16/2013 10:45 PM, Luciano Coelho wrote:
> > The code to enable and disable the WiLink shared transport has been
> > removed from the TI-ST driver, so it must be implemented in the board
> > files instead. Add the relevant operations to Panda's board file.
> >
> > Additionally, add the UART2 muxing data, so it's properly configured.
> >
> > Cc: stable <stable@vger.kernel.org> [3.7]
> > Signed-off-by: Luciano Coelho <coelho@ti.com>
> > ---
> >
> > In v2: use gpio_request_one() instead of gpio_request() and
> > gpio_direction_output(). (Thanks Fabio!)
> >
> > arch/arm/mach-omap2/board-omap4panda.c | 50 +++++++++++++++++++++++++++++---
> > 1 file changed, 46 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
> > index 5c8e9ce..f44fccf 100644
> > --- a/arch/arm/mach-omap2/board-omap4panda.c
> > +++ b/arch/arm/mach-omap2/board-omap4panda.c
> > @@ -51,18 +51,50 @@
> > #define GPIO_HUB_NRESET 62
> > #define GPIO_WIFI_PMENA 43
> > #define GPIO_WIFI_IRQ 53
> > +#define GPIO_BT_EN 46
> >
> > /* wl127x BT, FM, GPS connectivity chip */
> > +static int plat_kim_chip_enable(struct kim_data_s *kim_data)
> > +{
> > + gpio_set_value(GPIO_BT_EN, GPIO_LOW);
> > + mdelay(5);
> > + gpio_set_value(GPIO_BT_EN, GPIO_HIGH);
> > + mdelay(100);
> > +
> > + return 0;
> > +}
> > +
> > +static int plat_kim_chip_disable(struct kim_data_s *kim_data)
> > +{
> > + gpio_set_value(GPIO_BT_EN, GPIO_LOW);
> > + mdelay(1);
> > + gpio_set_value(GPIO_BT_EN, GPIO_HIGH);
> > + mdelay(1);
> > + gpio_set_value(GPIO_BT_EN, GPIO_LOW);
> > +
> > + return 0;
> > +}
> > +
> > static struct ti_st_plat_data wilink_platform_data = {
> > - .nshutdown_gpio = 46,
> > .dev_name = "/dev/ttyO1",
> > .flow_cntrl = 1,
> > .baud_rate = 3000000,
> > - .chip_enable = NULL,
> > - .suspend = NULL,
> > - .resume = NULL,
> > + .chip_enable = plat_kim_chip_enable,
> > + .chip_disable = plat_kim_chip_disable,
>
> I just wonder how this is going to work with DT... You are not going to have
> the ability to use callback in this form.
> I think the GPIO handling should be done in the driver itself rather than in
> the board file.
that can (should ?) be moved to ti-st eventually. In fact I don't know
why it was removed in the first place, we would need Pavan to help us
with that query.
Still, for -rc, the minimal patch had to be cooked, right ?
--
balbi
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* [PATCH v2] ARM: spear3xx: Fix pl080-related build failure
From: Viresh Kumar @ 2013-01-17 9:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358413763-21507-1-git-send-email-thierry.reding@avionic-design.de>
On Thu, Jan 17, 2013 at 2:39 PM, Thierry Reding
<thierry.reding@avionic-design.de> wrote:
> Include linux/amba/pl080.h to pull in the various PL080_* macros.
>
> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
> ---
> arch/arm/mach-spear3xx/spear3xx.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
> index f9d754f..7c218d9 100644
> --- a/arch/arm/mach-spear3xx/spear3xx.c
> +++ b/arch/arm/mach-spear3xx/spear3xx.c
> @@ -14,6 +14,7 @@
> #define pr_fmt(fmt) "SPEAr3xx: " fmt
>
> #include <linux/amba/pl022.h>
> +#include <linux/amba/pl080.h>
> #include <linux/amba/pl08x.h>
> #include <linux/io.h>
> #include <plat/pl080.h>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
^ permalink raw reply
* [PATCH v5 1/3] usb: fsl-mxc-udc: replace cpu_is_xxx() with platform_device_id
From: Felipe Balbi @ 2013-01-17 9:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130117092829.GA8251@nchen-desktop>
Hi,
On Thu, Jan 17, 2013 at 05:28:30PM +0800, Peter Chen wrote:
<trimming>
> > > > From what I understand balbi's comment, he dislikes this full list of
> > > > device id. Instead, he prefers to something like below.
> > > >
> > > > static const struct platform_device_id fsl_udc_devtype[] = {
> > > > {
> > > > .name = "imx-udc-mx27",
> > > > }, {
> > > > .name = "imx-udc-mx51",
> > > > }
> > > > };
> > > >
> > > > It basically tells that we are handling two type of devices here, one
> > > > is imx-udc-mx27 type and the other is imx-udc-mx51 type, with mx25/31/35
> > > > completely compatible with mx27 type. We choose mx27 instead of mx25
> > > > to define the type because mx27 Si came out earlier than mx25. That
> > > > said, we generally choose the earlies SoC name to define a particular
> > > > version of IP block, since hardware version is mostly unavailable or
> > > > unreliable.
> > > >
> > > > But that also means in platform code which create the platform_device,
> > > > you will need to use name "imx-udc-mx27" for even mx25/31/35.
> > > >
> > > > imx_fsl_usb2_udc_data_entry_single(MX25, "imx-udc-mx27");
> > > > imx_fsl_usb2_udc_data_entry_single(MX31, "imx-udc-mx27");
> > > > imx_fsl_usb2_udc_data_entry_single(MX35, "imx-udc-mx27");
> > > >
> > > > Considering this is a piece of code we will not use for any new
> > > > hardware, I'm fine with either way.
> > > >
> > > > So, balbi, it's all your call to accept the series as it is or ask for
> > > > another iteration.
> >
> > right :-)
> >
> > > Thanks Shawn. Let's see Felipe's comment, nevertheless, I will send v6 patch
> > > due to a compile error at mx25
> >
> > Shawn is right.
>
> In fact, this driver is just the temp solution, we will use chipidea
> in future, so just take all i.mx usb as two kinds of ip are ok.
>
> Do you want me to change like Shawn said, or current version is ok?
yes, please resend with changes.
--
balbi
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* [[PATCH v2]] OMAP: omap4-panda: add WiLink shared transport power functions
From: Peter Ujfalusi @ 2013-01-17 9:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358372702-13102-1-git-send-email-coelho@ti.com>
Hi Luca,
On 01/16/2013 10:45 PM, Luciano Coelho wrote:
> The code to enable and disable the WiLink shared transport has been
> removed from the TI-ST driver, so it must be implemented in the board
> files instead. Add the relevant operations to Panda's board file.
>
> Additionally, add the UART2 muxing data, so it's properly configured.
>
> Cc: stable <stable@vger.kernel.org> [3.7]
> Signed-off-by: Luciano Coelho <coelho@ti.com>
> ---
>
> In v2: use gpio_request_one() instead of gpio_request() and
> gpio_direction_output(). (Thanks Fabio!)
>
> arch/arm/mach-omap2/board-omap4panda.c | 50 +++++++++++++++++++++++++++++---
> 1 file changed, 46 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
> index 5c8e9ce..f44fccf 100644
> --- a/arch/arm/mach-omap2/board-omap4panda.c
> +++ b/arch/arm/mach-omap2/board-omap4panda.c
> @@ -51,18 +51,50 @@
> #define GPIO_HUB_NRESET 62
> #define GPIO_WIFI_PMENA 43
> #define GPIO_WIFI_IRQ 53
> +#define GPIO_BT_EN 46
>
> /* wl127x BT, FM, GPS connectivity chip */
> +static int plat_kim_chip_enable(struct kim_data_s *kim_data)
> +{
> + gpio_set_value(GPIO_BT_EN, GPIO_LOW);
> + mdelay(5);
> + gpio_set_value(GPIO_BT_EN, GPIO_HIGH);
> + mdelay(100);
> +
> + return 0;
> +}
> +
> +static int plat_kim_chip_disable(struct kim_data_s *kim_data)
> +{
> + gpio_set_value(GPIO_BT_EN, GPIO_LOW);
> + mdelay(1);
> + gpio_set_value(GPIO_BT_EN, GPIO_HIGH);
> + mdelay(1);
> + gpio_set_value(GPIO_BT_EN, GPIO_LOW);
> +
> + return 0;
> +}
> +
> static struct ti_st_plat_data wilink_platform_data = {
> - .nshutdown_gpio = 46,
> .dev_name = "/dev/ttyO1",
> .flow_cntrl = 1,
> .baud_rate = 3000000,
> - .chip_enable = NULL,
> - .suspend = NULL,
> - .resume = NULL,
> + .chip_enable = plat_kim_chip_enable,
> + .chip_disable = plat_kim_chip_disable,
I just wonder how this is going to work with DT... You are not going to have
the ability to use callback in this form.
I think the GPIO handling should be done in the driver itself rather than in
the board file.
> };
>
> +static int wilink_st_init(void)
> +{
> + int status;
> +
> + status = gpio_request_one(GPIO_BT_EN, GPIOF_OUT_INIT_LOW, "kim");
> + if (status)
> + pr_err("%s: failed to request gpio %d\n", __func__,
> + GPIO_BT_EN);
> +
> + return status;
> +}
> +
> static struct platform_device wl1271_device = {
> .name = "kim",
> .id = -1,
> @@ -397,6 +429,12 @@ static struct omap_board_mux board_mux[] __initdata = {
> OMAP_PULL_ENA),
> OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
>
> + /* UART2 - BT/FM/GPS shared transport */
> + OMAP4_MUX(UART2_CTS, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
> + OMAP4_MUX(UART2_RTS, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
> + OMAP4_MUX(UART2_RX, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
> + OMAP4_MUX(UART2_TX, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
> +
> { .reg_offset = OMAP_MUX_TERMINATOR },
> };
>
> @@ -433,6 +471,10 @@ static void __init omap4_panda_init(void)
> if (ret)
> pr_err("error setting wl12xx data: %d\n", ret);
>
> + ret = wilink_st_init();
> + if (ret)
> + pr_err("WiLink shared transport init failed: %d\n", ret);
> +
> omap4_panda_init_rev();
> omap4_panda_i2c_init();
> platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
>
--
P?ter
^ permalink raw reply
* [PATCH v5 1/3] usb: fsl-mxc-udc: replace cpu_is_xxx() with platform_device_id
From: Peter Chen @ 2013-01-17 9:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130117091422.GF10814@arwen.pp.htv.fi>
On Thu, Jan 17, 2013 at 11:14:22AM +0200, Felipe Balbi wrote:
> On Wed, Jan 16, 2013 at 09:48:25AM +0800, Peter Chen wrote:
> > On Tue, Jan 15, 2013 at 10:03:46PM +0800, Shawn Guo wrote:
> > > On Tue, Jan 15, 2013 at 10:29:33AM +0800, Peter Chen wrote:
> > > > As mach/hardware.h is deleted, we need to use platform_device_id to
> > > > differentiate SoCs. Besides, one cpu_is_mx35 is useless as it has
> > > > already used pdata to differentiate runtime
> > > >
> > > > Meanwhile we update the platform code accordingly.
> > > >
> > > > Signed-off-by: Peter Chen <peter.chen@freescale.com>
> > > > ---
> > > > arch/arm/mach-imx/devices/devices-common.h | 1 +
> > > > arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c | 15 ++++---
> > > > drivers/usb/gadget/fsl_mxc_udc.c | 24 +++++-------
> > > > drivers/usb/gadget/fsl_udc_core.c | 42 +++++++++++++--------
> > > > 4 files changed, 45 insertions(+), 37 deletions(-)
> > >
> > > Since we are splitting the original patch anyway, it's a bit strange
> > > to me that you are mixing arch/arm/mach-imx and drivers/usb/gadget
> > > in this patch. I'm fine with it, since I assume all the patches to
> > > go via USB tree anyway.
> > >
> > > >
> > > > diff --git a/arch/arm/mach-imx/devices/devices-common.h b/arch/arm/mach-imx/devices/devices-common.h
> > > > index 6277baf..9bd5777 100644
> > > > --- a/arch/arm/mach-imx/devices/devices-common.h
> > > > +++ b/arch/arm/mach-imx/devices/devices-common.h
> > > > @@ -63,6 +63,7 @@ struct platform_device *__init imx_add_flexcan(
> > > >
> > > > #include <linux/fsl_devices.h>
> > > > struct imx_fsl_usb2_udc_data {
> > > > + const char *devid;
> > > > resource_size_t iobase;
> > > > resource_size_t irq;
> > > > };
> > > > diff --git a/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
> > > > index 37e4439..fb527c7 100644
> > > > --- a/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
> > > > +++ b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
> > > > @@ -11,35 +11,36 @@
> > > > #include "../hardware.h"
> > > > #include "devices-common.h"
> > > >
> > > > -#define imx_fsl_usb2_udc_data_entry_single(soc) \
> > > > +#define imx_fsl_usb2_udc_data_entry_single(soc, _devid) \
> > > > { \
> > > > + .devid = _devid, \
> > > > .iobase = soc ## _USB_OTG_BASE_ADDR, \
> > > > .irq = soc ## _INT_USB_OTG, \
> > > > }
> > > >
> > > > #ifdef CONFIG_SOC_IMX25
> > > > const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data __initconst =
> > > > - imx_fsl_usb2_udc_data_entry_single(MX25);
> > > > + imx_fsl_usb2_udc_data_entry_single(MX25, "imx-udc-mx25");
> > > > #endif /* ifdef CONFIG_SOC_IMX25 */
> > > >
> > > > #ifdef CONFIG_SOC_IMX27
> > > > const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst =
> > > > - imx_fsl_usb2_udc_data_entry_single(MX27);
> > > > + imx_fsl_usb2_udc_data_entry_single(MX27, "imx-udc-mx27");
> > > > #endif /* ifdef CONFIG_SOC_IMX27 */
> > > >
> > > > #ifdef CONFIG_SOC_IMX31
> > > > const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data __initconst =
> > > > - imx_fsl_usb2_udc_data_entry_single(MX31);
> > > > + imx_fsl_usb2_udc_data_entry_single(MX31, "imx-udc-mx31");
> > > > #endif /* ifdef CONFIG_SOC_IMX31 */
> > > >
> > > > #ifdef CONFIG_SOC_IMX35
> > > > const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data __initconst =
> > > > - imx_fsl_usb2_udc_data_entry_single(MX35);
> > > > + imx_fsl_usb2_udc_data_entry_single(MX35, "imx-udc-mx35");
> > > > #endif /* ifdef CONFIG_SOC_IMX35 */
> > > >
> > > > #ifdef CONFIG_SOC_IMX51
> > > > const struct imx_fsl_usb2_udc_data imx51_fsl_usb2_udc_data __initconst =
> > > > - imx_fsl_usb2_udc_data_entry_single(MX51);
> > > > + imx_fsl_usb2_udc_data_entry_single(MX51, "imx-udc-mx51");
> > > > #endif
> > > >
> > > > struct platform_device *__init imx_add_fsl_usb2_udc(
> > > > @@ -57,7 +58,7 @@ struct platform_device *__init imx_add_fsl_usb2_udc(
> > > > .flags = IORESOURCE_IRQ,
> > > > },
> > > > };
> > > > - return imx_add_platform_device_dmamask("fsl-usb2-udc", -1,
> > > > + return imx_add_platform_device_dmamask(data->devid, -1,
> > > > res, ARRAY_SIZE(res),
> > > > pdata, sizeof(*pdata), DMA_BIT_MASK(32));
> > > > }
> > >
> > > <snip>
> > >
> > > > +static const struct platform_device_id fsl_udc_devtype[] = {
> > > > + {
> > > > + .name = "imx-udc-mx25",
> > > > + }, {
> > > > + .name = "imx-udc-mx27",
> > > > + }, {
> > > > + .name = "imx-udc-mx31",
> > > > + }, {
> > > > + .name = "imx-udc-mx35",
> > > > + }, {
> > > > + .name = "imx-udc-mx51",
> > > > + }
> > > > +};
> > >
> > > From what I understand balbi's comment, he dislikes this full list of
> > > device id. Instead, he prefers to something like below.
> > >
> > > static const struct platform_device_id fsl_udc_devtype[] = {
> > > {
> > > .name = "imx-udc-mx27",
> > > }, {
> > > .name = "imx-udc-mx51",
> > > }
> > > };
> > >
> > > It basically tells that we are handling two type of devices here, one
> > > is imx-udc-mx27 type and the other is imx-udc-mx51 type, with mx25/31/35
> > > completely compatible with mx27 type. We choose mx27 instead of mx25
> > > to define the type because mx27 Si came out earlier than mx25. That
> > > said, we generally choose the earlies SoC name to define a particular
> > > version of IP block, since hardware version is mostly unavailable or
> > > unreliable.
> > >
> > > But that also means in platform code which create the platform_device,
> > > you will need to use name "imx-udc-mx27" for even mx25/31/35.
> > >
> > > imx_fsl_usb2_udc_data_entry_single(MX25, "imx-udc-mx27");
> > > imx_fsl_usb2_udc_data_entry_single(MX31, "imx-udc-mx27");
> > > imx_fsl_usb2_udc_data_entry_single(MX35, "imx-udc-mx27");
> > >
> > > Considering this is a piece of code we will not use for any new
> > > hardware, I'm fine with either way.
> > >
> > > So, balbi, it's all your call to accept the series as it is or ask for
> > > another iteration.
>
> right :-)
>
> > Thanks Shawn. Let's see Felipe's comment, nevertheless, I will send v6 patch
> > due to a compile error at mx25
>
> Shawn is right.
In fact, this driver is just the temp solution, we will use chipidea
in future, so just take all i.mx usb as two kinds of ip are ok.
Do you want me to change like Shawn said, or current version is ok?
>
> --
> balbi
--
Best Regards,
Peter Chen
^ permalink raw reply
* [PATCH v5 1/3] usb: fsl-mxc-udc: replace cpu_is_xxx() with platform_device_id
From: Felipe Balbi @ 2013-01-17 9:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130116014824.GD16514@nchen-desktop>
On Wed, Jan 16, 2013 at 09:48:25AM +0800, Peter Chen wrote:
> On Tue, Jan 15, 2013 at 10:03:46PM +0800, Shawn Guo wrote:
> > On Tue, Jan 15, 2013 at 10:29:33AM +0800, Peter Chen wrote:
> > > As mach/hardware.h is deleted, we need to use platform_device_id to
> > > differentiate SoCs. Besides, one cpu_is_mx35 is useless as it has
> > > already used pdata to differentiate runtime
> > >
> > > Meanwhile we update the platform code accordingly.
> > >
> > > Signed-off-by: Peter Chen <peter.chen@freescale.com>
> > > ---
> > > arch/arm/mach-imx/devices/devices-common.h | 1 +
> > > arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c | 15 ++++---
> > > drivers/usb/gadget/fsl_mxc_udc.c | 24 +++++-------
> > > drivers/usb/gadget/fsl_udc_core.c | 42 +++++++++++++--------
> > > 4 files changed, 45 insertions(+), 37 deletions(-)
> >
> > Since we are splitting the original patch anyway, it's a bit strange
> > to me that you are mixing arch/arm/mach-imx and drivers/usb/gadget
> > in this patch. I'm fine with it, since I assume all the patches to
> > go via USB tree anyway.
> >
> > >
> > > diff --git a/arch/arm/mach-imx/devices/devices-common.h b/arch/arm/mach-imx/devices/devices-common.h
> > > index 6277baf..9bd5777 100644
> > > --- a/arch/arm/mach-imx/devices/devices-common.h
> > > +++ b/arch/arm/mach-imx/devices/devices-common.h
> > > @@ -63,6 +63,7 @@ struct platform_device *__init imx_add_flexcan(
> > >
> > > #include <linux/fsl_devices.h>
> > > struct imx_fsl_usb2_udc_data {
> > > + const char *devid;
> > > resource_size_t iobase;
> > > resource_size_t irq;
> > > };
> > > diff --git a/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
> > > index 37e4439..fb527c7 100644
> > > --- a/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
> > > +++ b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
> > > @@ -11,35 +11,36 @@
> > > #include "../hardware.h"
> > > #include "devices-common.h"
> > >
> > > -#define imx_fsl_usb2_udc_data_entry_single(soc) \
> > > +#define imx_fsl_usb2_udc_data_entry_single(soc, _devid) \
> > > { \
> > > + .devid = _devid, \
> > > .iobase = soc ## _USB_OTG_BASE_ADDR, \
> > > .irq = soc ## _INT_USB_OTG, \
> > > }
> > >
> > > #ifdef CONFIG_SOC_IMX25
> > > const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data __initconst =
> > > - imx_fsl_usb2_udc_data_entry_single(MX25);
> > > + imx_fsl_usb2_udc_data_entry_single(MX25, "imx-udc-mx25");
> > > #endif /* ifdef CONFIG_SOC_IMX25 */
> > >
> > > #ifdef CONFIG_SOC_IMX27
> > > const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst =
> > > - imx_fsl_usb2_udc_data_entry_single(MX27);
> > > + imx_fsl_usb2_udc_data_entry_single(MX27, "imx-udc-mx27");
> > > #endif /* ifdef CONFIG_SOC_IMX27 */
> > >
> > > #ifdef CONFIG_SOC_IMX31
> > > const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data __initconst =
> > > - imx_fsl_usb2_udc_data_entry_single(MX31);
> > > + imx_fsl_usb2_udc_data_entry_single(MX31, "imx-udc-mx31");
> > > #endif /* ifdef CONFIG_SOC_IMX31 */
> > >
> > > #ifdef CONFIG_SOC_IMX35
> > > const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data __initconst =
> > > - imx_fsl_usb2_udc_data_entry_single(MX35);
> > > + imx_fsl_usb2_udc_data_entry_single(MX35, "imx-udc-mx35");
> > > #endif /* ifdef CONFIG_SOC_IMX35 */
> > >
> > > #ifdef CONFIG_SOC_IMX51
> > > const struct imx_fsl_usb2_udc_data imx51_fsl_usb2_udc_data __initconst =
> > > - imx_fsl_usb2_udc_data_entry_single(MX51);
> > > + imx_fsl_usb2_udc_data_entry_single(MX51, "imx-udc-mx51");
> > > #endif
> > >
> > > struct platform_device *__init imx_add_fsl_usb2_udc(
> > > @@ -57,7 +58,7 @@ struct platform_device *__init imx_add_fsl_usb2_udc(
> > > .flags = IORESOURCE_IRQ,
> > > },
> > > };
> > > - return imx_add_platform_device_dmamask("fsl-usb2-udc", -1,
> > > + return imx_add_platform_device_dmamask(data->devid, -1,
> > > res, ARRAY_SIZE(res),
> > > pdata, sizeof(*pdata), DMA_BIT_MASK(32));
> > > }
> >
> > <snip>
> >
> > > +static const struct platform_device_id fsl_udc_devtype[] = {
> > > + {
> > > + .name = "imx-udc-mx25",
> > > + }, {
> > > + .name = "imx-udc-mx27",
> > > + }, {
> > > + .name = "imx-udc-mx31",
> > > + }, {
> > > + .name = "imx-udc-mx35",
> > > + }, {
> > > + .name = "imx-udc-mx51",
> > > + }
> > > +};
> >
> > From what I understand balbi's comment, he dislikes this full list of
> > device id. Instead, he prefers to something like below.
> >
> > static const struct platform_device_id fsl_udc_devtype[] = {
> > {
> > .name = "imx-udc-mx27",
> > }, {
> > .name = "imx-udc-mx51",
> > }
> > };
> >
> > It basically tells that we are handling two type of devices here, one
> > is imx-udc-mx27 type and the other is imx-udc-mx51 type, with mx25/31/35
> > completely compatible with mx27 type. We choose mx27 instead of mx25
> > to define the type because mx27 Si came out earlier than mx25. That
> > said, we generally choose the earlies SoC name to define a particular
> > version of IP block, since hardware version is mostly unavailable or
> > unreliable.
> >
> > But that also means in platform code which create the platform_device,
> > you will need to use name "imx-udc-mx27" for even mx25/31/35.
> >
> > imx_fsl_usb2_udc_data_entry_single(MX25, "imx-udc-mx27");
> > imx_fsl_usb2_udc_data_entry_single(MX31, "imx-udc-mx27");
> > imx_fsl_usb2_udc_data_entry_single(MX35, "imx-udc-mx27");
> >
> > Considering this is a piece of code we will not use for any new
> > hardware, I'm fine with either way.
> >
> > So, balbi, it's all your call to accept the series as it is or ask for
> > another iteration.
right :-)
> Thanks Shawn. Let's see Felipe's comment, nevertheless, I will send v6 patch
> due to a compile error at mx25
Shawn is right.
--
balbi
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* [V3 PATCH 11/25] arm: mmp2: change the defintion of usb devices
From: Felipe Balbi @ 2013-01-17 9:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358230758-10176-12-git-send-email-chao.xie@marvell.com>
On Tue, Jan 15, 2013 at 01:19:04AM -0500, Chao Xie wrote:
> add the udc/otg/ehci devices for mmp2
>
> Signed-off-by: Chao Xie <chao.xie@marvell.com>
Haojian, can I get an Acked-by for this patch or will you carry it
yourself ?
Likewise for all other arch/arm/* patches in this series
--
balbi
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* [PATCH v6 03/22] mfd: omap-usb-tll: Use devm_kzalloc/ioremap and clean up error path
From: Roger Quadros @ 2013-01-17 9:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F70164.3080105@mvista.com>
On 01/16/2013 09:37 PM, Sergei Shtylyov wrote:
> Hello.
>
> On 01/16/2013 05:43 PM, Roger Quadros wrote:
>
>> Use devm_ variants of kzalloc() and ioremap(). Simplify the error path.
>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> ---
>> drivers/mfd/omap-usb-tll.c | 36 +++++++++++-------------------------
>> 1 files changed, 11 insertions(+), 25 deletions(-)
>
>> diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c
>> index 9658e18..53ed10b 100644
>> --- a/drivers/mfd/omap-usb-tll.c
>> +++ b/drivers/mfd/omap-usb-tll.c
> [...]
>> - base = ioremap(res->start, resource_size(res));
>> + base = devm_request_and_ioremap(dev, res);
>> if (!base) {
>> - dev_err(dev, "TLL ioremap failed\n");
>> ret = -ENOMEM;
>
> -EADDRNOTAVAIL as the comment to devm_request_and_ioremap() suggests.
>
I changed it deliberately to ENOMEM, as I could not find EADDRNOTAVAIL
defined in all architectures.
ENOMEM shouldn't harm.
cheers,
-roger
^ permalink raw reply
* [PATCH v2 1/1] block: blk-merge: don't merge the pages with non-contiguous descriptors
From: James Bottomley @ 2013-01-17 9:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130116231857.GU2668@htj.dyndns.org>
On Wed, 2013-01-16 at 15:18 -0800, Tejun Heo wrote:
> On Wed, Jan 16, 2013 at 10:32:35AM +0000, James Bottomley wrote:
> > diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
> > index 6b2fb87..ab88c5b 100644
> > --- a/arch/arm/mm/dma-mapping.c
> > +++ b/arch/arm/mm/dma-mapping.c
> > @@ -809,7 +809,7 @@ static void dma_cache_maint_page(struct page *page, unsigned long offset,
> > op(vaddr, len, dir);
> > }
> > offset = 0;
> > - page++;
> > + page = pfn_to_page(page_to_pfn(page) + 1);
>
> Probably page = nth_page(page, 1) is the better form.
It's the same thing.
I'd actually prefer page = pfn_to_page(page_to_pfn(page) + 1); because
it makes the code look like the hack it is. The preferred form for all
iterators like this should be to iterate over the pfn instead of a
pointer into the page arrays, because that will always work correctly no
matter how many weird and wonderful memory schemes we come up with.
James
^ permalink raw reply
* [PATCH] ata: sata_mv: fix sg_tbl_pool alignment
From: Soeren Moch @ 2013-01-17 9:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130116175203.GK25500@titan.lakedaemon.net>
On 16.01.2013 18:52, Jason Cooper wrote:
> On Wed, Jan 16, 2013 at 06:05:59PM +0100, Soeren Moch wrote:
>> On 16.01.2013 16:50, Jason Cooper wrote:
>>> On Wed, Jan 16, 2013 at 09:55:55AM +0100, Soeren Moch wrote:
>>>> On 16.01.2013 04:24, Soeren Moch wrote:
>>>>> On 16.01.2013 03:40, Jason Cooper wrote:
>>>>>> On Wed, Jan 16, 2013 at 01:17:59AM +0100, Soeren Moch wrote:
>>>>>>> On 15.01.2013 22:56, Jason Cooper wrote:
>>>>>>>> On Tue, Jan 15, 2013 at 03:16:17PM -0500, Jason Cooper wrote:
>>>
>>>> OK, I could trigger the error
>>>> ERROR: 1024 KiB atomic DMA coherent pool is too small!
>>>> Please increase it with coherent_pool= kernel parameter!
>>>> only with em28xx sticks and sata, dib0700 sticks removed.
>>>
>>> Did you test the reverse scenario? ie dib0700 with sata_mv and no
>>> em28xx.
>>
>> Maybe I can test this next night.
>
> Please do, this will tell us if it is in the USB drivers or lower
> (something in common).
Until now there is no error with dib0700 + sata, without em28xx.
But to be sure that there is absolutely no problem with this setting
we probably need additional testing hours.
BTW, these dib0700 sticks use usb bulk transfers (and maybe smaller
dma buffers?).
Regards,
Soeren
^ permalink raw reply
* [PATCH] ARM: spear3xx: Fix pl080-related build failure
From: Thierry Reding @ 2013-01-17 9:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOh2x=mnHtqGD17fF8TVU4uX3ceHD8dDRv_k9NwWqk=FDJg=nQ@mail.gmail.com>
On Thu, Jan 17, 2013 at 02:05:58PM +0530, Viresh Kumar wrote:
> On Thu, Jan 17, 2013 at 1:59 PM, Thierry Reding
> <thierry.reding@avionic-design.de> wrote:
> > Include linux/amba/pl08x.h to pull in the various PL080_* macros.
> >
> > Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
> > ---
> > arch/arm/mach-spear3xx/spear3xx.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
> > index f9d754f..7c218d9 100644
> > --- a/arch/arm/mach-spear3xx/spear3xx.c
> > +++ b/arch/arm/mach-spear3xx/spear3xx.c
> > @@ -14,6 +14,7 @@
> > #define pr_fmt(fmt) "SPEAr3xx: " fmt
> >
> > #include <linux/amba/pl022.h>
> > +#include <linux/amba/pl080.h>
> > #include <linux/amba/pl08x.h>
> > #include <linux/io.h>
> > #include <plat/pl080.h>
>
> Hi Thierry,
>
> Thanks for fixing it up. Though the log doesn't match the change well.
Yes, you're right. I've sent an updated patch.
Thierry
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^ permalink raw reply
* [PATCH v2] ARM: spear3xx: Fix pl080-related build failure
From: Thierry Reding @ 2013-01-17 9:09 UTC (permalink / raw)
To: linux-arm-kernel
Include linux/amba/pl080.h to pull in the various PL080_* macros.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
---
arch/arm/mach-spear3xx/spear3xx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index f9d754f..7c218d9 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -14,6 +14,7 @@
#define pr_fmt(fmt) "SPEAr3xx: " fmt
#include <linux/amba/pl022.h>
+#include <linux/amba/pl080.h>
#include <linux/amba/pl08x.h>
#include <linux/io.h>
#include <plat/pl080.h>
--
1.8.1.1
^ permalink raw reply related
* [PATCH v8 3/3] Cortex-M3: Add support for exception handling
From: Uwe Kleine-König @ 2013-01-17 8:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358413196-5609-1-git-send-email-u.kleine-koenig@pengutronix.de>
This patch implements the exception handling for the ARMv7-M
architecture (pretty different from the A or R profiles).
It bases on work done earlier by Catalin for 2.6.33 but was nearly
completely rewritten to use a pt_regs layout compatible to the A
profile.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
arch/arm/kernel/entry-common.S | 4 ++
| 148 ++++++++++++++++++++++++++++++++++++++++
arch/arm/kernel/entry-v7m.S | 134 ++++++++++++++++++++++++++++++++++++
arch/arm/kernel/process.c | 4 ++
arch/arm/kernel/ptrace.c | 3 +
5 files changed, 293 insertions(+)
create mode 100644 arch/arm/kernel/entry-v7m.S
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 3471175..48d8dc0 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -339,6 +339,9 @@ ENDPROC(ftrace_stub)
.align 5
ENTRY(vector_swi)
+#ifdef CONFIG_CPU_V7M
+ v7m_exception_entry
+#else
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Calling r0 - r12
ARM( add r8, sp, #S_PC )
@@ -349,6 +352,7 @@ ENTRY(vector_swi)
str lr, [sp, #S_PC] @ Save calling PC
str r8, [sp, #S_PSR] @ Save CPSR
str r0, [sp, #S_OLD_R0] @ Save OLD_R0
+#endif
zero_fp
/*
--git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 9a8531e..33d9900 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -44,6 +44,145 @@
#endif
.endm
+#ifdef CONFIG_CPU_V7M
+/*
+ * ARMv7-M exception entry/exit macros.
+ *
+ * xPSR, ReturnAddress(), LR (R14), R12, R3, R2, R1, and R0 are
+ * automatically saved on the current stack (32 words) before
+ * switching to the exception stack (SP_main).
+ *
+ * If exception is taken while in user mode, SP_main is
+ * empty. Otherwise, SP_main is aligned to 64 bit automatically
+ * (CCR.STKALIGN set).
+ *
+ * Linux assumes that the interrupts are disabled when entering an
+ * exception handler and it may BUG if this is not the case. Interrupts
+ * are disabled during entry and reenabled in the exit macro.
+ *
+ * v7m_exception_fast_exit is used when returning from interrupts.
+ *
+ * v7m_exception_slow_exit is used when returning from SVC or PendSV.
+ * When returning to kernel mode, we don't return from exception.
+ */
+ .macro v7m_exception_entry
+ @ determine the location of the registers saved by the core during
+ @ exception entry. Depending on the mode the cpu was in when the
+ @ exception happend that is either on the main or the process stack.
+ @ Bit 2 of EXC_RETURN stored in the lr register specifies which stack
+ @ was used.
+ tst lr, #0x4
+ mrsne r12, psp
+ moveq r12, sp
+
+ @ we cannot rely on r0-r3 and r12 matching the value saved in the
+ @ exception frame because of tail-chaining. So these have to be
+ @ reloaded.
+ ldmia r12!, {r0-r3}
+
+ @ Linux expects to have irqs off. Do it here before taking stack space
+ cpsid i
+
+ sub sp, #S_FRAME_SIZE-S_IP
+ stmdb sp!, {r0-r11}
+
+ @ load saved r12, lr, return address and xPSR.
+ @ r0-r7 are used for signals and never touched from now on. Clobbering
+ @ r8-r12 is OK.
+ mov r9, r12
+ ldmia r9!, {r8, r10-r12}
+
+ @ calculate the original stack pointer value.
+ @ r9 currently points to the memory location just above the auto saved
+ @ xPSR. If the FP extension is implemented and bit 4 of EXC_RETURN is 0
+ @ then space was allocated for FP state. That is space for 18 32-bit
+ @ values. (If FP extension is unimplemented, bit 4 is 1.)
+ @ Additionally the cpu might automatically 8-byte align the stack. Bit 9
+ @ of the saved xPSR specifies if stack aligning took place. In this case
+ @ another 32-bit value is included in the stack.
+
+ tst lr, #0x10
+ addeq r9, r9, #576
+
+ tst r12, 0x100
+ addne r9, r9, #4
+
+ @ store saved r12 using str to have a register to hold the base for stm
+ str r8, [sp, #S_IP]
+ add r8, sp, #S_SP
+ @ store r13-r15, xPSR
+ stmia r8!, {r9-r12}
+ @ store r0 once more and EXC_RETURN
+ stmia r8, {r0, lr}
+ .endm
+
+ .macro v7m_exception_fast_exit
+ @ registers r0-r3 and r12 are automatically restored on exception
+ @ return. r4-r7 were not clobbered in v7m_exception_entry so for
+ @ correctness they don't need to be restored. So only r8-r11 must be
+ @ restored here. The easiest way to do so is to restore r0-r7, too.
+ ldmia sp!, {r0-r11}
+ add sp, #S_FRAME_SIZE-S_IP
+ cpsie i
+ bx lr
+ .endm
+
+ .macro v7m_exception_slow_exit ret_r0
+ cpsid i
+ ldr lr, [sp, #S_EXC_RET] @ read exception LR
+ tst lr, #0x8
+ bne 1f @ go to thread mode using exception return
+
+ /*
+ * return to kernel thread
+ * sp is already set up (and might be unset in pt_regs), so only
+ * restore r0-r12 and pc
+ */
+ ldmia sp, {r0-r12}
+ ldr lr, [sp, #S_PC]
+ add sp, sp, #S_FRAME_SIZE
+ cpsie i
+ bx lr
+
+1: /*
+ * return to userspace
+ */
+
+ @ read original r12, sp, lr, pc and xPSR
+ add r12, sp, #S_IP
+ ldmia r12, {r1-r5}
+
+ @ handle stack aligning
+ tst r5, #0x100
+ subne r2, r2, #4
+
+ @ skip over stack space for fp saving
+ tst lr, #0x10
+ subeq r2, r2, #576
+
+ @ write basic exception frame
+ stmdb r2!, {r1, r3-r5}
+ ldmia sp, {r1, r3-r5}
+ .if \ret_r0
+ stmdb r2!, {r0, r3-r5}
+ .else
+ stmdb r2!, {r1, r3-r5}
+ .endif
+
+ @ restore process sp
+ msr psp, r2
+
+ @ restore original r4-r11
+ ldmia sp!, {r0-r11}
+
+ @ restore main sp
+ add sp, sp, #S_FRAME_SIZE-S_IP
+
+ cpsie i
+ bx lr
+ .endm
+#endif /* CONFIG_CPU_V7M */
+
@
@ Store/load the USER SP and LR registers by switching to the SYS
@ mode. Useful in Thumb-2 mode where "stm/ldm rd, {sp, lr}^" is not
@@ -131,6 +270,14 @@
rfeia sp!
.endm
+#ifdef CONFIG_CPU_V7M
+ .macro restore_user_regs, fast = 0, offset = 0
+ .if \offset
+ add sp, #\offset
+ .endif
+ v7m_exception_slow_exit ret_r0 = \fast
+ .endm
+#else /* !CONFIG_CPU_V7M */
.macro restore_user_regs, fast = 0, offset = 0
clrex @ clear the exclusive monitor
mov r2, sp
@@ -147,6 +294,7 @@
add sp, sp, #S_FRAME_SIZE - S_SP
movs pc, lr @ return & move spsr_svc into cpsr
.endm
+#endif /* CONFIG_CPU_V7M */
.macro get_thread_info, rd
mov \rd, sp
diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S
new file mode 100644
index 0000000..842394c
--- /dev/null
+++ b/arch/arm/kernel/entry-v7m.S
@@ -0,0 +1,134 @@
+/*
+ * linux/arch/arm/kernel/entry-v7m.S
+ *
+ * Copyright (C) 2008 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Low-level vector interface routines for the ARMv7-M architecture
+ */
+#include <asm/memory.h>
+#include <asm/glue.h>
+#include <asm/thread_notify.h>
+
+#include <mach/entry-macro.S>
+
+#include "entry-header.S"
+
+#ifdef CONFIG_PREEMPT
+#error "CONFIG_PREEMPT not supported on the current ARMv7M implementation"
+#endif
+#ifdef CONFIG_TRACE_IRQFLAGS
+#error "CONFIG_TRACE_IRQFLAGS not supported on the current ARMv7M implementation"
+#endif
+
+__invalid_entry:
+ v7m_exception_entry
+ adr r0, strerr
+ mrs r1, ipsr
+ mov r2, lr
+ bl printk
+ mov r0, sp
+ bl show_regs
+1: b 1b
+ENDPROC(__invalid_entry)
+
+strerr: .asciz "\nUnhandled exception: IPSR = %08lx LR = %08lx\n"
+
+ .align 2
+__irq_entry:
+ v7m_exception_entry
+
+ @
+ @ Invoke the IRQ handler
+ @
+ mrs r0, ipsr
+ and r0, #0xff
+ sub r0, #16 @ IRQ number
+ mov r1, sp
+ @ routine called with r0 = irq number, r1 = struct pt_regs *
+ bl asm_do_IRQ
+
+ @
+ @ Check for any pending work if returning to user
+ @
+ ldr lr, [sp, #S_EXC_RET]
+ tst lr, #0x8 @ check the return stack
+ beq 2f @ returning to handler mode
+ get_thread_info tsk
+ ldr r1, [tsk, #TI_FLAGS]
+ tst r1, #_TIF_WORK_MASK
+ beq 2f @ no work pending
+ ldr r1, =0xe000ed04 @ ICSR
+ mov r0, #1 << 28 @ ICSR.PENDSVSET
+ str r0, [r1] @ raise PendSV
+
+2:
+ v7m_exception_fast_exit
+ENDPROC(__irq_entry)
+
+__pendsv_entry:
+ v7m_exception_entry
+
+ ldr r1, =0xe000ed04 @ ICSR
+ mov r0, #1 << 27 @ ICSR.PENDSVCLR
+ str r0, [r1] @ clear PendSV
+
+ @ execute the pending work, including reschedule
+ get_thread_info tsk
+ mov why, #0
+ b ret_to_user
+ENDPROC(__pendsv_entry)
+
+/*
+ * Register switch for ARMv7-M processors.
+ * r0 = previous task_struct, r1 = previous thread_info, r2 = next thread_info
+ * previous and next are guaranteed not to be the same.
+ */
+ENTRY(__switch_to)
+ .fnstart
+ .cantunwind
+ add ip, r1, #TI_CPU_SAVE
+ stmia ip!, {r4 - r11} @ Store most regs on stack
+ str sp, [ip], #4
+ str lr, [ip], #4
+ mov r5, r0
+ add r4, r2, #TI_CPU_SAVE
+ ldr r0, =thread_notify_head
+ mov r1, #THREAD_NOTIFY_SWITCH
+ bl atomic_notifier_call_chain
+ mov ip, r4
+ mov r0, r5
+ ldmia ip!, {r4 - r11} @ Load all regs saved previously
+ ldr sp, [ip]
+ ldr pc, [ip, #4]!
+ .fnend
+ENDPROC(__switch_to)
+
+ .data
+ .align 8
+/*
+ * Vector table (64 words => 256 bytes natural alignment)
+ */
+ENTRY(vector_table)
+ .long 0 @ 0 - Reset stack pointer
+ .long __invalid_entry @ 1 - Reset
+ .long __invalid_entry @ 2 - NMI
+ .long __invalid_entry @ 3 - HardFault
+ .long __invalid_entry @ 4 - MemManage
+ .long __invalid_entry @ 5 - BusFault
+ .long __invalid_entry @ 6 - UsageFault
+ .long __invalid_entry @ 7 - Reserved
+ .long __invalid_entry @ 8 - Reserved
+ .long __invalid_entry @ 9 - Reserved
+ .long __invalid_entry @ 10 - Reserved
+ .long vector_swi @ 11 - SVCall
+ .long __invalid_entry @ 12 - Debug Monitor
+ .long __invalid_entry @ 13 - Reserved
+ .long __pendsv_entry @ 14 - PendSV
+ .long __invalid_entry @ 15 - SysTick
+ .rept 64 - 16
+ .long __irq_entry @ 16..64 - External Interrupts
+ .endr
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 90084a6..3d745d4 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -387,6 +387,10 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start,
*childregs = *regs;
childregs->ARM_r0 = 0;
childregs->ARM_sp = stack_start;
+#if defined CONFIG_CPU_V7M
+ /* Return to Thread mode with Process stack */
+ childregs->ARM_EXC_RET = 0xfffffffdUL;
+#endif
} else {
memset(childregs, 0, sizeof(struct pt_regs));
thread->cpu_context.r4 = stk_sz;
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 739db3a..55df1d5 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -87,6 +87,9 @@ static const struct pt_regs_offset regoffset_table[] = {
REG_OFFSET_NAME(pc),
REG_OFFSET_NAME(cpsr),
REG_OFFSET_NAME(ORIG_r0),
+#ifdef CONFIG_CPU_V7M
+ REG_OFFSET_NAME(EXC_RET),
+#endif
REG_OFFSET_END,
};
--
1.7.10.4
^ permalink raw reply related
* [PATCH v8 2/3] Cortex-M3: Add base support for Cortex-M3
From: Uwe Kleine-König @ 2013-01-17 8:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358413196-5609-1-git-send-email-u.kleine-koenig@pengutronix.de>
From: Catalin Marinas <catalin.marinas@arm.com>
This patch adds the base support for the Cortex-M3 processor (ARMv7-M
architecture). It consists of the corresponding arch/arm/mm/ files and
various #ifdef's around the kernel. Exception handling is implemented by
a subsequent patch.
[ukleinek: squash in some changes originating from commit
b5717ba (Cortex-M3: Add support for the Microcontroller Prototyping System)
from the v2.6.33-arm1 patch stack, port to post 3.6, drop zImage
support, drop reorganisation of pt_regs, assert CONFIG_V7M doesn't leak
into installed headers and a few cosmetic changes]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
arch/arm/include/asm/assembler.h | 13 ++-
arch/arm/include/asm/cputype.h | 3 +
arch/arm/include/asm/glue-cache.h | 25 ++++++
arch/arm/include/asm/glue-df.h | 8 ++
arch/arm/include/asm/glue-proc.h | 9 ++
arch/arm/include/asm/irqflags.h | 22 +++--
arch/arm/include/asm/processor.h | 7 ++
arch/arm/include/asm/ptrace.h | 8 ++
arch/arm/include/asm/system_info.h | 1 +
arch/arm/include/uapi/asm/ptrace.h | 36 ++++++--
arch/arm/kernel/asm-offsets.c | 3 +
arch/arm/kernel/head-nommu.S | 9 +-
arch/arm/kernel/setup.c | 13 ++-
arch/arm/kernel/traps.c | 2 +
arch/arm/mm/nommu.c | 2 +
arch/arm/mm/proc-v7m.S | 161 ++++++++++++++++++++++++++++++++++++
16 files changed, 303 insertions(+), 19 deletions(-)
create mode 100644 arch/arm/mm/proc-v7m.S
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 2ef9581..ab7c02c 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -136,7 +136,11 @@
* assumes FIQs are enabled, and that the processor is in SVC mode.
*/
.macro save_and_disable_irqs, oldcpsr
+#ifdef CONFIG_CPU_V7M
+ mrs \oldcpsr, primask
+#else
mrs \oldcpsr, cpsr
+#endif
disable_irq
.endm
@@ -150,7 +154,11 @@
* guarantee that this will preserve the flags.
*/
.macro restore_irqs_notrace, oldcpsr
+#ifdef CONFIG_CPU_V7M
+ msr primask, \oldcpsr
+#else
msr cpsr_c, \oldcpsr
+#endif
.endm
.macro restore_irqs, oldcpsr
@@ -229,7 +237,10 @@
#endif
.endm
-#ifdef CONFIG_THUMB2_KERNEL
+#if defined(CONFIG_CPU_V7M)
+ .macro setmode, mode, reg
+ .endm
+#elif defined(CONFIG_THUMB2_KERNEL)
.macro setmode, mode, reg
mov \reg, #\mode
msr cpsr_c, \reg
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index cb47d28..5bd8cb6 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -46,6 +46,9 @@ extern unsigned int processor_id;
: "cc"); \
__val; \
})
+#elif defined(CONFIG_CPU_V7M)
+#define read_cpuid(reg) (*(unsigned int *)0xe000ed00)
+#define read_cpuid_ext(reg) 0
#else
#define read_cpuid(reg) (processor_id)
#define read_cpuid_ext(reg) 0
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
index cca9f15..ea98658 100644
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -125,10 +125,35 @@
# endif
#endif
+#if defined(CONFIG_CPU_V7M)
+# ifdef _CACHE
+# error "Multi-cache not supported on ARMv7-M"
+# else
+# define _CACHE nop
+# endif
+#endif
+
#if !defined(_CACHE) && !defined(MULTI_CACHE)
#error Unknown cache maintenance model
#endif
+#ifndef __ASSEMBLER__
+static inline void nop_flush_icache_all(void) { }
+static inline void nop_flush_kern_cache_all(void) { }
+static inline void nop_flush_kern_cache_louis(void) { }
+static inline void nop_flush_user_cache_all(void) { }
+static inline void nop_flush_user_cache_range(unsigned long a, unsigned long b, unsigned int c) { }
+
+static inline void nop_coherent_kern_range(unsigned long a, unsigned long b) { }
+static inline int nop_coherent_user_range(unsigned long a, unsigned long b) { return 0; }
+static inline void nop_flush_kern_dcache_area(void *a, size_t s) { }
+
+static inline void nop_dma_flush_range(const void *a, const void *b) { }
+
+static inline void nop_dma_map_area(const void *s, size_t l, int f) { }
+static inline void nop_dma_unmap_area(const void *s, size_t l, int f) { }
+#endif
+
#ifndef MULTI_CACHE
#define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all)
#define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all)
diff --git a/arch/arm/include/asm/glue-df.h b/arch/arm/include/asm/glue-df.h
index 8cacbcd..1f2339c 100644
--- a/arch/arm/include/asm/glue-df.h
+++ b/arch/arm/include/asm/glue-df.h
@@ -95,6 +95,14 @@
# endif
#endif
+#ifdef CONFIG_CPU_ABRT_NOMMU
+# ifdef CPU_DABORT_HANDLER
+# define MULTI_DABORT 1
+# else
+# define CPU_DABORT_HANDLER nommu_early_abort
+# endif
+#endif
+
#ifndef CPU_DABORT_HANDLER
#error Unknown data abort handler type
#endif
diff --git a/arch/arm/include/asm/glue-proc.h b/arch/arm/include/asm/glue-proc.h
index ac1dd54..f2f39bc 100644
--- a/arch/arm/include/asm/glue-proc.h
+++ b/arch/arm/include/asm/glue-proc.h
@@ -230,6 +230,15 @@
# endif
#endif
+#ifdef CONFIG_CPU_V7M
+# ifdef CPU_NAME
+# undef MULTI_CPU
+# define MULTI_CPU
+# else
+# define CPU_NAME cpu_v7m
+# endif
+#endif
+
#ifndef MULTI_CPU
#define cpu_proc_init __glue(CPU_NAME,_proc_init)
#define cpu_proc_fin __glue(CPU_NAME,_proc_fin)
diff --git a/arch/arm/include/asm/irqflags.h b/arch/arm/include/asm/irqflags.h
index 1e6cca5..3b763d6 100644
--- a/arch/arm/include/asm/irqflags.h
+++ b/arch/arm/include/asm/irqflags.h
@@ -8,6 +8,16 @@
/*
* CPU interrupt mask handling.
*/
+#ifdef CONFIG_CPU_V7M
+#define IRQMASK_REG_NAME_R "primask"
+#define IRQMASK_REG_NAME_W "primask"
+#define IRQMASK_I_BIT 1
+#else
+#define IRQMASK_REG_NAME_R "cpsr"
+#define IRQMASK_REG_NAME_W "cpsr_c"
+#define IRQMASK_I_BIT PSR_I_BIT
+#endif
+
#if __LINUX_ARM_ARCH__ >= 6
static inline unsigned long arch_local_irq_save(void)
@@ -15,7 +25,7 @@ static inline unsigned long arch_local_irq_save(void)
unsigned long flags;
asm volatile(
- " mrs %0, cpsr @ arch_local_irq_save\n"
+ " mrs %0, " IRQMASK_REG_NAME_R " @ arch_local_irq_save\n"
" cpsid i"
: "=r" (flags) : : "memory", "cc");
return flags;
@@ -129,7 +139,7 @@ static inline unsigned long arch_local_save_flags(void)
{
unsigned long flags;
asm volatile(
- " mrs %0, cpsr @ local_save_flags"
+ " mrs %0, " IRQMASK_REG_NAME_R " @ local_save_flags"
: "=r" (flags) : : "memory", "cc");
return flags;
}
@@ -140,7 +150,7 @@ static inline unsigned long arch_local_save_flags(void)
static inline void arch_local_irq_restore(unsigned long flags)
{
asm volatile(
- " msr cpsr_c, %0 @ local_irq_restore"
+ " msr " IRQMASK_REG_NAME_W ", %0 @ local_irq_restore"
:
: "r" (flags)
: "memory", "cc");
@@ -148,8 +158,8 @@ static inline void arch_local_irq_restore(unsigned long flags)
static inline int arch_irqs_disabled_flags(unsigned long flags)
{
- return flags & PSR_I_BIT;
+ return flags & IRQMASK_I_BIT;
}
-#endif
-#endif
+#endif /* ifdef __KERNEL__ */
+#endif /* ifndef __ASM_ARM_IRQFLAGS_H */
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 06e7d50..5e61b88 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -49,7 +49,14 @@ struct thread_struct {
#ifdef CONFIG_MMU
#define nommu_start_thread(regs) do { } while (0)
#else
+#ifndef CONFIG_CPU_V7M
#define nommu_start_thread(regs) regs->ARM_r10 = current->mm->start_data
+#else
+#define nommu_start_thread(regs) do { \
+ regs->ARM_r10 = current->mm->start_data; \
+ regs->ARM_EXC_RET = 0xfffffffdL; \
+} while (0)
+#endif
#endif
#define start_thread(regs,pc,sp) \
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h
index 3d52ee1..67661e8 100644
--- a/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@ -14,7 +14,11 @@
#ifndef __ASSEMBLY__
struct pt_regs {
+#ifdef CONFIG_CPU_V7M
+ unsigned long uregs[20];
+#else
unsigned long uregs[18];
+#endif
};
#define user_mode(regs) \
@@ -45,6 +49,7 @@ struct pt_regs {
*/
static inline int valid_user_regs(struct pt_regs *regs)
{
+#ifndef CONFIG_CPU_V7M
unsigned long mode = regs->ARM_cpsr & MODE_MASK;
/*
@@ -67,6 +72,9 @@ static inline int valid_user_regs(struct pt_regs *regs)
regs->ARM_cpsr |= USR_MODE;
return 0;
+#else /* ifndef CONFIG_CPU_V7M */
+ return 1;
+#endif
}
static inline long regs_return_value(struct pt_regs *regs)
diff --git a/arch/arm/include/asm/system_info.h b/arch/arm/include/asm/system_info.h
index dfd386d..720ea03 100644
--- a/arch/arm/include/asm/system_info.h
+++ b/arch/arm/include/asm/system_info.h
@@ -11,6 +11,7 @@
#define CPU_ARCH_ARMv5TEJ 7
#define CPU_ARCH_ARMv6 8
#define CPU_ARCH_ARMv7 9
+#define CPU_ARCH_ARMv7M 10
#ifndef __ASSEMBLY__
diff --git a/arch/arm/include/uapi/asm/ptrace.h b/arch/arm/include/uapi/asm/ptrace.h
index 96ee092..d3be66e 100644
--- a/arch/arm/include/uapi/asm/ptrace.h
+++ b/arch/arm/include/uapi/asm/ptrace.h
@@ -34,28 +34,47 @@
/*
* PSR bits
+ * Note on V7M there is no mode contained in the PSR
*/
#define USR26_MODE 0x00000000
#define FIQ26_MODE 0x00000001
#define IRQ26_MODE 0x00000002
#define SVC26_MODE 0x00000003
+#if defined(__KERNEL__) && defined(CONFIG_CPU_V7M)
+/*
+ * Use 0 here to get code right that creates a userspace
+ * or kernel space thread.
+ */
+#define USR_MODE 0x00000000
+#define SVC_MODE 0x00000000
+#else
#define USR_MODE 0x00000010
+#define SVC_MODE 0x00000013
+#endif
#define FIQ_MODE 0x00000011
#define IRQ_MODE 0x00000012
-#define SVC_MODE 0x00000013
#define ABT_MODE 0x00000017
#define HYP_MODE 0x0000001a
#define UND_MODE 0x0000001b
#define SYSTEM_MODE 0x0000001f
#define MODE32_BIT 0x00000010
#define MODE_MASK 0x0000001f
-#define PSR_T_BIT 0x00000020
-#define PSR_F_BIT 0x00000040
-#define PSR_I_BIT 0x00000080
-#define PSR_A_BIT 0x00000100
-#define PSR_E_BIT 0x00000200
-#define PSR_J_BIT 0x01000000
-#define PSR_Q_BIT 0x08000000
+
+#define V4_PSR_T_BIT 0x00000020 /* >= V4T, but not V7M */
+#define V7M_PSR_T_BIT 0x01000000
+#if defined(__KERNEL__) && defined(CONFIG_CPU_V7M)
+#define PSR_T_BIT V7M_PSR_T_BIT
+#else
+/* for compatibility */
+#define PSR_T_BIT V4_PSR_T_BIT
+#endif
+
+#define PSR_F_BIT 0x00000040 /* >= V4, but not V7M */
+#define PSR_I_BIT 0x00000080 /* >= V4, but not V7M */
+#define PSR_A_BIT 0x00000100 /* >= V6, but not V7M */
+#define PSR_E_BIT 0x00000200 /* >= V6, but not V7M */
+#define PSR_J_BIT 0x01000000 /* >= V5J, but not V7M */
+#define PSR_Q_BIT 0x08000000 /* >= V5E, including V7M */
#define PSR_V_BIT 0x10000000
#define PSR_C_BIT 0x20000000
#define PSR_Z_BIT 0x40000000
@@ -125,6 +144,7 @@ struct pt_regs {
#define ARM_r1 uregs[1]
#define ARM_r0 uregs[0]
#define ARM_ORIG_r0 uregs[17]
+#define ARM_EXC_RET uregs[18]
/*
* The size of the user-visible VFP state as seen by PTRACE_GET/SETVFPREGS
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index c985b48..5fe9ace 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -93,6 +93,9 @@ int main(void)
DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc));
DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr));
DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0));
+#ifdef CONFIG_CPU_V7M
+ DEFINE(S_EXC_RET, offsetof(struct pt_regs, ARM_EXC_RET));
+#endif
DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
BLANK();
#ifdef CONFIG_CACHE_L2X0
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 278cfc1..c391c05 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -44,10 +44,13 @@ ENTRY(stext)
setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
@ and irqs disabled
-#ifndef CONFIG_CPU_CP15
- ldr r9, =CONFIG_PROCESSOR_ID
-#else
+#if defined(CONFIG_CPU_CP15)
mrc p15, 0, r9, c0, c0 @ get processor id
+#elif defined(CONFIG_CPU_V7M)
+ ldr r9, =0xe000ed00 @ CPUID register address
+ ldr r9, [r9]
+#else
+ ldr r9, =CONFIG_PROCESSOR_ID
#endif
bl __lookup_processor_type @ r5=procinfo r9=cpuid
movs r10, r5 @ invalid processor (r5=0)?
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index da1d1aa..3cca0c8 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -128,7 +128,9 @@ struct stack {
u32 und[3];
} ____cacheline_aligned;
+#ifndef CONFIG_CPU_V7M
static struct stack stacks[NR_CPUS];
+#endif
char elf_platform[ELF_PLATFORM_SIZE];
EXPORT_SYMBOL(elf_platform);
@@ -207,7 +209,7 @@ static const char *proc_arch[] = {
"5TEJ",
"6TEJ",
"7",
- "?(11)",
+ "7M",
"?(12)",
"?(13)",
"?(14)",
@@ -216,6 +218,12 @@ static const char *proc_arch[] = {
"?(17)",
};
+#ifdef CONFIG_CPU_V7M
+static int __get_cpu_architecture(void)
+{
+ return CPU_ARCH_ARMv7M;
+}
+#else
static int __get_cpu_architecture(void)
{
int cpu_arch;
@@ -248,6 +256,7 @@ static int __get_cpu_architecture(void)
return cpu_arch;
}
+#endif
int __pure cpu_architecture(void)
{
@@ -375,6 +384,7 @@ static void __init feat_v6_fixup(void)
*/
void cpu_init(void)
{
+#ifndef CONFIG_CPU_V7M
unsigned int cpu = smp_processor_id();
struct stack *stk = &stacks[cpu];
@@ -419,6 +429,7 @@ void cpu_init(void)
"I" (offsetof(struct stack, und[0])),
PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
: "r14");
+#endif
}
int __cpu_logical_map[NR_CPUS];
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index b0179b8..12d976b 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -819,6 +819,7 @@ static void __init kuser_get_tls_init(unsigned long vectors)
void __init early_trap_init(void *vectors_base)
{
+#ifndef CONFIG_CPU_V7M
unsigned long vectors = (unsigned long)vectors_base;
extern char __stubs_start[], __stubs_end[];
extern char __vectors_start[], __vectors_end[];
@@ -850,4 +851,5 @@ void __init early_trap_init(void *vectors_base)
flush_icache_range(vectors, vectors + PAGE_SIZE);
modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
+#endif
}
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index d51225f..4bc8ae5 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -20,12 +20,14 @@
void __init arm_mm_memblock_reserve(void)
{
+#ifndef CONFIG_CPU_V7M
/*
* Register the exception vector page.
* some architectures which the DRAM is the exception vector to trap,
* alloc_page breaks with error, although it is not NULL, but "0."
*/
memblock_reserve(CONFIG_VECTORS_BASE, PAGE_SIZE);
+#endif
}
void __init sanity_check_meminfo(void)
diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
new file mode 100644
index 0000000..2b8eb97
--- /dev/null
+++ b/arch/arm/mm/proc-v7m.S
@@ -0,0 +1,161 @@
+/*
+ * linux/arch/arm/mm/proc-v7m.S
+ *
+ * Copyright (C) 2008 ARM Ltd.
+ * Copyright (C) 2001 Deep Blue Solutions Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This is the "shell" of the ARMv7-M processor support.
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+ENTRY(cpu_v7m_proc_init)
+ mov pc, lr
+ENDPROC(cpu_v7m_proc_init)
+
+ENTRY(cpu_v7m_proc_fin)
+ mov pc, lr
+ENDPROC(cpu_v7m_proc_fin)
+
+/*
+ * cpu_v7m_reset(loc)
+ *
+ * Perform a soft reset of the system. Put the CPU into the
+ * same state as it would be if it had been reset, and branch
+ * to what would be the reset vector.
+ *
+ * - loc - location to jump to for soft reset
+ */
+ .align 5
+ENTRY(cpu_v7m_reset)
+ mov pc, r0
+ENDPROC(cpu_v7m_reset)
+
+/*
+ * cpu_v7m_do_idle()
+ *
+ * Idle the processor (eg, wait for interrupt).
+ *
+ * IRQs are already disabled.
+ */
+ENTRY(cpu_v7m_do_idle)
+ wfi
+ mov pc, lr
+ENDPROC(cpu_v7m_do_idle)
+
+ENTRY(cpu_v7m_dcache_clean_area)
+ mov pc, lr
+ENDPROC(cpu_v7m_dcache_clean_area)
+
+/*
+ * There is no MMU, so here is nothing to do.
+ */
+ENTRY(cpu_v7m_switch_mm)
+ mov pc, lr
+ENDPROC(cpu_v7m_switch_mm)
+
+cpu_v7m_name:
+ .ascii "ARMv7-M Processor"
+ .align
+
+ .section ".text.init", #alloc, #execinstr
+
+/*
+ * __v7m_setup
+ *
+ * This should be able to cover all ARMv7-M cores.
+ */
+__v7m_setup:
+ @ Configure the vector table base address
+ ldr r0, =0xe000ed08 @ vector table base address
+ ldr r12, =vector_table
+ str r12, [r0]
+
+ @ Lower the priority of the SVC and PendSV exceptions
+ ldr r0, =0xe000ed1c
+ mov r5, #0x80000000
+ str r5, [r0] @ set SVC priority
+ ldr r0, =0xe000ed20
+ mov r5, #0x00800000
+ str r5, [r0] @ set PendSV priority
+
+ @ SVC to run the kernel in this mode
+ adr r0, BSYM(1f)
+ ldr r5, [r12, #11 * 4] @ read the SVC vector entry
+ str r0, [r12, #11 * 4] @ write the temporary SVC vector entry
+ mov r6, lr @ save LR
+ mov r7, sp @ save SP
+ ldr sp, =__v7m_setup_stack_top
+ cpsie i
+ svc #0
+1: cpsid i
+ str r5, [r12, #11 * 4] @ restore the original SVC vector entry
+ mov lr, r6 @ restore LR
+ mov sp, r7 @ restore SP
+
+ @ Special-purpose control register
+ mov r0, #1
+ msr control, r0 @ Thread mode has unpriviledged access
+
+ @ Configure the System Control Register
+ ldr r0, =0xe000ed14 @ system control register
+ ldr r12, [r0]
+ orr r12, #1 << 9 @ STKALIGN
+ str r12, [r0]
+ mov pc, lr
+ENDPROC(__v7m_setup)
+
+ .align 2
+ .type v7m_processor_functions, #object
+ENTRY(v7m_processor_functions)
+ .word nommu_early_abort
+ .word cpu_v7m_proc_init
+ .word cpu_v7m_proc_fin
+ .word cpu_v7m_reset
+ .word cpu_v7m_do_idle
+ .word cpu_v7m_dcache_clean_area
+ .word cpu_v7m_switch_mm
+ .word 0 @ cpu_v7m_set_pte_ext
+ .word legacy_pabort
+ .size v7m_processor_functions, . - v7m_processor_functions
+
+ .type cpu_arch_name, #object
+cpu_arch_name:
+ .asciz "armv7m"
+ .size cpu_arch_name, . - cpu_arch_name
+
+ .type cpu_elf_name, #object
+cpu_elf_name:
+ .asciz "v7m"
+ .size cpu_elf_name, . - cpu_elf_name
+ .align
+
+ .section ".proc.info.init", #alloc, #execinstr
+
+ /*
+ * Match any ARMv7-M processor core.
+ */
+ .type __v7m_proc_info, #object
+__v7m_proc_info:
+ .long 0x000f0000 @ Required ID value
+ .long 0x000f0000 @ Mask for ID
+ .long 0 @ proc_info_list.__cpu_mm_mmu_flags
+ .long 0 @ proc_info_list.__cpu_io_mmu_flags
+ b __v7m_setup @ proc_info_list.__cpu_flush
+ .long cpu_arch_name
+ .long cpu_elf_name
+ .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
+ .long cpu_v7m_name
+ .long v7m_processor_functions @ proc_info_list.proc
+ .long 0 @ proc_info_list.tlb
+ .long 0 @ proc_info_list.user
+ .long 0 @ proc_info_list.cache
+ .size __v7m_proc_info, . - __v7m_proc_info
+
+__v7m_setup_stack:
+ .space 4 * 8 @ 8 registers
+__v7m_setup_stack_top:
--
1.7.10.4
^ permalink raw reply related
* [PATCH v8 1/3] ARM: make cr_alignment read-only #ifndef CONFIG_CPU_CP15
From: Uwe Kleine-König @ 2013-01-17 8:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358413196-5609-1-git-send-email-u.kleine-koenig@pengutronix.de>
This makes cr_alignment a constant 0 to break code that tries to modify
the value as it's likely that it's built on wrong assumption when
CONFIG_CPU_CP15 isn't defined. For code that is only reading the value 0
is more or less a fine value to report. As suggested by Nicolas this is
cleaner than to #ifdef out all uses.
Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
arch/arm/include/asm/cp15.h | 16 +++++++++++++++-
arch/arm/kernel/head-common.S | 9 +++++++--
arch/arm/mm/alignment.c | 2 ++
arch/arm/mm/mmu.c | 17 +++++++++++++++++
4 files changed, 41 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/cp15.h b/arch/arm/include/asm/cp15.h
index 5ef4d80..1f3262e 100644
--- a/arch/arm/include/asm/cp15.h
+++ b/arch/arm/include/asm/cp15.h
@@ -42,6 +42,8 @@
#define vectors_high() (0)
#endif
+#ifdef CONFIG_CPU_CP15
+
extern unsigned long cr_no_alignment; /* defined in entry-armv.S */
extern unsigned long cr_alignment; /* defined in entry-armv.S */
@@ -82,6 +84,18 @@ static inline void set_copro_access(unsigned int val)
isb();
}
-#endif
+#else /* ifdef CONFIG_CPU_CP15 */
+
+/*
+ * cr_alignment and cr_no_alignment are tightly coupled to cp15 (at least in the
+ * minds of the developers). Yielding 0 for machines without a cp15 (and making
+ * it read-only) is fine for most cases and saves quite some #ifdeffery.
+ */
+#define cr_no_alignment UL(0)
+#define cr_alignment UL(0)
+
+#endif /* ifdef CONFIG_CPU_CP15 / else */
+
+#endif /* ifndef __ASSEMBLY__ */
#endif
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index 854bd22..5b391a6 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -98,8 +98,9 @@ __mmap_switched:
str r9, [r4] @ Save processor ID
str r1, [r5] @ Save machine type
str r2, [r6] @ Save atags pointer
- bic r4, r0, #CR_A @ Clear 'A' bit
- stmia r7, {r0, r4} @ Save control register values
+ cmp r7, #0
+ bicne r4, r0, #CR_A @ Clear 'A' bit
+ stmneia r7, {r0, r4} @ Save control register values
b start_kernel
ENDPROC(__mmap_switched)
@@ -113,7 +114,11 @@ __mmap_switched_data:
.long processor_id @ r4
.long __machine_arch_type @ r5
.long __atags_pointer @ r6
+#ifdef CONFIG_CPU_CP15
.long cr_alignment @ r7
+#else
+ .long 0 @ r7
+#endif
.long init_thread_union + THREAD_START_SP @ sp
.size __mmap_switched_data, . - __mmap_switched_data
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index b9f60eb..5748094 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -962,12 +962,14 @@ static int __init alignment_init(void)
return -ENOMEM;
#endif
+#ifdef CONFIG_CPU_CP15
if (cpu_is_v6_unaligned()) {
cr_alignment &= ~CR_A;
cr_no_alignment &= ~CR_A;
set_cr(cr_alignment);
ai_usermode = safe_usermode(ai_usermode, false);
}
+#endif
hook_fault_code(FAULT_CODE_ALIGNMENT, do_alignment, SIGBUS, BUS_ADRALN,
"alignment exception");
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 941dfb9..92abdb8 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -97,6 +97,7 @@ static struct cachepolicy cache_policies[] __initdata = {
}
};
+#ifdef CONFIG_CPU_CP15
/*
* These are useful for identifying cache coherency
* problems by allowing the cache or the cache and
@@ -195,6 +196,22 @@ void adjust_cr(unsigned long mask, unsigned long set)
}
#endif
+#else /* ifdef CONFIG_CPU_CP15 */
+
+static int __init early_cachepolicy(char *p)
+{
+ pr_warning("cachepolicy kernel parameter not supported without cp15\n");
+}
+early_param("cachepolicy", early_cachepolicy);
+
+static int __init noalign_setup(char *__unused)
+{
+ pr_warning("noalign kernel parameter not supported without cp15\n");
+}
+__setup("noalign", noalign_setup);
+
+#endif /* ifdef CONFIG_CPU_CP15 / else */
+
#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_XN
#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_AP_WRITE
--
1.7.10.4
^ permalink raw reply related
* [PATCH v8 0/3] Cortex-M3 series once more
From: Uwe Kleine-König @ 2013-01-17 8:59 UTC (permalink / raw)
To: linux-arm-kernel
Based on Jonny's comments I changed a few more details. The diff to v7
can be found below after the diffstat. These are:
- describe why a #define for cr_alignment is OK in both the
commit log and a comment in the header file
- a work around for errata 752419 that newer gcc warns about
- add a few more comments for better readability
- a whitespace fix
I think the updates are minor enough to still allow the patches to go
into v3.9-rc1. Russell, what do you think? You can pull them from
git://git.pengutronix.de/git/ukl/linux.git for-next
still based on v3.7-rc1 + your commit "ARM: fix oops on initial entry to
userspace with Thumb2 kernels".
Catalin Marinas (1):
Cortex-M3: Add base support for Cortex-M3
Uwe Kleine-K?nig (2):
ARM: make cr_alignment read-only #ifndef CONFIG_CPU_CP15
Cortex-M3: Add support for exception handling
arch/arm/include/asm/assembler.h | 13 ++-
arch/arm/include/asm/cp15.h | 16 +++-
arch/arm/include/asm/cputype.h | 3 +
arch/arm/include/asm/glue-cache.h | 25 ++++++
arch/arm/include/asm/glue-df.h | 8 ++
arch/arm/include/asm/glue-proc.h | 9 ++
arch/arm/include/asm/irqflags.h | 22 +++--
arch/arm/include/asm/processor.h | 7 ++
arch/arm/include/asm/ptrace.h | 8 ++
arch/arm/include/asm/system_info.h | 1 +
arch/arm/include/uapi/asm/ptrace.h | 36 ++++++--
arch/arm/kernel/asm-offsets.c | 3 +
arch/arm/kernel/entry-common.S | 4 +
| 148 +++++++++++++++++++++++++++++++++
arch/arm/kernel/entry-v7m.S | 134 ++++++++++++++++++++++++++++++
arch/arm/kernel/head-common.S | 9 +-
arch/arm/kernel/head-nommu.S | 9 +-
arch/arm/kernel/process.c | 4 +
arch/arm/kernel/ptrace.c | 3 +
arch/arm/kernel/setup.c | 13 ++-
arch/arm/kernel/traps.c | 2 +
arch/arm/mm/alignment.c | 2 +
arch/arm/mm/mmu.c | 17 ++++
arch/arm/mm/nommu.c | 2 +
arch/arm/mm/proc-v7m.S | 161 ++++++++++++++++++++++++++++++++++++
25 files changed, 637 insertions(+), 22 deletions(-)
create mode 100644 arch/arm/kernel/entry-v7m.S
create mode 100644 arch/arm/mm/proc-v7m.S
The incremental changes since v7 are:
diff --git a/arch/arm/include/asm/cp15.h b/arch/arm/include/asm/cp15.h
index d814435..1f3262e 100644
--- a/arch/arm/include/asm/cp15.h
+++ b/arch/arm/include/asm/cp15.h
@@ -86,6 +86,11 @@ static inline void set_copro_access(unsigned int val)
#else /* ifdef CONFIG_CPU_CP15 */
+/*
+ * cr_alignment and cr_no_alignment are tightly coupled to cp15 (at least in the
+ * minds of the developers). Yielding 0 for machines without a cp15 (and making
+ * it read-only) is fine for most cases and saves quite some #ifdeffery.
+ */
#define cr_no_alignment UL(0)
#define cr_alignment UL(0)
diff --git a/arch/arm/include/uapi/asm/ptrace.h b/arch/arm/include/uapi/asm/ptrace.h
index 2ae7d1b..d3be66e 100644
--- a/arch/arm/include/uapi/asm/ptrace.h
+++ b/arch/arm/include/uapi/asm/ptrace.h
@@ -144,7 +144,7 @@ struct pt_regs {
#define ARM_r1 uregs[1]
#define ARM_r0 uregs[0]
#define ARM_ORIG_r0 uregs[17]
-#define ARM_EXC_RET uregs[18]
+#define ARM_EXC_RET uregs[18]
/*
* The size of the user-visible VFP state as seen by PTRACE_GET/SETVFPREGS
diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S
index a0991dc..842394c 100644
--- a/arch/arm/kernel/entry-v7m.S
+++ b/arch/arm/kernel/entry-v7m.S
@@ -102,8 +102,8 @@ ENTRY(__switch_to)
mov ip, r4
mov r0, r5
ldmia ip!, {r4 - r11} @ Load all regs saved previously
- ldr sp, [ip], #4
- ldr pc, [ip]
+ ldr sp, [ip]
+ ldr pc, [ip, #4]!
.fnend
ENDPROC(__switch_to)
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index 2f560c5..5b391a6 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -117,7 +117,7 @@ __mmap_switched_data:
#ifdef CONFIG_CPU_CP15
.long cr_alignment @ r7
#else
- .long 0
+ .long 0 @ r7
#endif
.long init_thread_union + THREAD_START_SP @ sp
.size __mmap_switched_data, . - __mmap_switched_data
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index b675918..92abdb8 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -196,7 +196,7 @@ void adjust_cr(unsigned long mask, unsigned long set)
}
#endif
-#else
+#else /* ifdef CONFIG_CPU_CP15 */
static int __init early_cachepolicy(char *p)
{
@@ -210,7 +210,7 @@ static int __init noalign_setup(char *__unused)
}
__setup("noalign", noalign_setup);
-#endif
+#endif /* ifdef CONFIG_CPU_CP15 / else */
#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_XN
#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_AP_WRITE
--
1.7.10.4
^ permalink raw reply related
* [PATCH v2 1/1] block: blk-merge: don't merge the pages with non-contiguous descriptors
From: James Bottomley @ 2013-01-17 8:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130116231401.GV23505@n2100.arm.linux.org.uk>
On Wed, 2013-01-16 at 23:14 +0000, Russell King - ARM Linux wrote:
> On Wed, Jan 16, 2013 at 10:32:35AM +0000, James Bottomley wrote:
> > On Wed, 2013-01-16 at 12:07 +0530, Subhash Jadavani wrote:
> >
> > > Now consider this call stack from MMC block driver (this is on the ARmv7
> > > based board):
> > > [ 98.918174] [<c001b50c>] (v7_dma_inv_range+0x30/0x48) from
> > > [<c0017b8c>] (dma_cache_maint_page+0x1c4/0x24c)
> > > [ 98.927819] [<c0017b8c>] (dma_cache_maint_page+0x1c4/0x24c) from
> > > [<c0017c28>] (___dma_page_cpu_to_dev+0x14/0x1c)
> > > [ 98.937982] [<c0017c28>] (___dma_page_cpu_to_dev+0x14/0x1c) from
> > > [<c0017ff8>] (dma_map_sg+0x3c/0x114)
> >
> > OK, so this is showing that ARM itself is making the assumption that the
> > pages are contiguous in the page offset map.
> >
> > Fix this by doing the increment via the pfn, which will do the right
> > thing whatever the memory model.
> >
> > Signed-off-by: James Bottomley <JBottomley@Parallels.com>
>
> Ok. What would you like the patch summary line for this to be -
> the existing one seems to be a little wrong given the content of
> this patch...
how about
arm: fix struct page iterator in dma_cache_maint() to work with
sparsemem
?
James
> >
> > ---
> >
> > diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
> > index 6b2fb87..ab88c5b 100644
> > --- a/arch/arm/mm/dma-mapping.c
> > +++ b/arch/arm/mm/dma-mapping.c
> > @@ -809,7 +809,7 @@ static void dma_cache_maint_page(struct page *page, unsigned long offset,
> > op(vaddr, len, dir);
> > }
> > offset = 0;
> > - page++;
> > + page = pfn_to_page(page_to_pfn(page) + 1);
> > left -= len;
> > } while (left);
> > }
> >
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> --
> To unsubscribe from this list: send the line "unsubscribe linux-scsi" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
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