* [PATCH v7 22/22] mdf: omap-usb-host: get rid of build warning
From: Roger Quadros @ 2013-01-17 11:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358422231-24736-1-git-send-email-rogerq@ti.com>
Fixes the below build warning when driver is built-in.
drivers/mfd/omap-usb-host.c:750:12: warning:
?usbhs_omap_remove? defined but not used [-Wunused-function]
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
drivers/mfd/omap-usb-host.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index a1f73dc..b726a74 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -778,7 +778,7 @@ static struct platform_driver usbhs_omap_driver = {
.owner = THIS_MODULE,
.pm = &usbhsomap_dev_pm_ops,
},
- .remove = __exit_p(usbhs_omap_remove),
+ .remove = usbhs_omap_remove,
};
MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
--
1.7.4.1
^ permalink raw reply related
* [PATCH v5 5/9] ARM: davinci: New reset functionality/API provided for Davinci DSP
From: Sekhar Nori @ 2013-01-17 11:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1357863807-380-6-git-send-email-rtivy@ti.com>
On 1/11/2013 5:53 AM, Robert Tivy wrote:
> Since there is no general "reset" support for SoC devices, and since the
> remoteproc driver needs explicit control of the DSP's reset line, a new
> Davinci-specific API is added.
>
> This private API will disappear with DT migration. Some discussion
> regarding a proposed DT "reset" binding is here:
> https://patchwork.kernel.org/patch/1635051/
>
> Modified davinci_clk_init() to set clk "reset" function for clocks
> that indicate PSC_LRST support. Also fixed indentation issue with
> function opening curly brace.
>
> Signed-off-by: Robert Tivy <rtivy@ti.com>
I applied this patch for v3.9. The subject seemed too long with repeated
references to davinci so I shortened it to:
ARM: davinci: psc: introduce reset API
> --- a/arch/arm/mach-davinci/include/mach/psc.h
> +++ b/arch/arm/mach-davinci/include/mach/psc.h
> @@ -246,6 +246,7 @@
>
> #define MDSTAT_STATE_MASK 0x3f
> #define PDSTAT_STATE_MASK 0x1f
> +#define MDCTL_LRST BIT(8)
> #define MDCTL_FORCE BIT(31)
> #define PDCTL_NEXT BIT(0)
> #define PDCTL_EPCGOOD BIT(8)
> @@ -253,6 +254,8 @@
> #ifndef __ASSEMBLER__
>
> extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
> +extern void davinci_psc_reset_config(unsigned int ctlr, unsigned int id,
> + bool reset);
I felt the word 'config' in the name is not really required since the
functionality is fixed (as opposed to the davinci_psc_config() function
which could do multiple configurations)
I updated the function name to davinci_psc_reset() when I committed the
patch locally.
Hope that's okay with you.
Thanks,
Sekhar
^ permalink raw reply
* [PATCH v2 1/1] block: blk-merge: don't merge the pages with non-contiguous descriptors
From: Russell King - ARM Linux @ 2013-01-17 11:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358421561.2394.27.camel@dabdike.int.hansenpartnership.com>
On Thu, Jan 17, 2013 at 11:19:21AM +0000, James Bottomley wrote:
> On Thu, 2013-01-17 at 11:04 +0000, Russell King - ARM Linux wrote:
> > On Thu, Jan 17, 2013 at 11:01:47AM +0000, James Bottomley wrote:
> > > On Thu, 2013-01-17 at 10:47 +0000, Russell King - ARM Linux wrote:
> > > > Also, couldn't the addition of the scatterlist offset to the page also
> > > > be buggy too?
> > >
> > > No, fortunately, offset must be within the first page from the point of
> > > view of block generated sg lists. As long as nothing within arm
> > > violates this, it should be a safe assumption ... although the code
> > > seems to assume otherwise.
> >
> > Are you absolutely sure about that? I believe I have seen cases where
> > that has been violated in the past, though it was many years ago.
>
> >From the point of view of the block layer, absolutely: the scatterlist
> is generated from an array of bio_vecs. Each bio_vec is a page, offset
> and length element and obeys the rule that offset must be within the
> page and offset + length cannot stray over the page.
Well, I found it when working on the mmc stuff initially, long before
it got complex. The scatterlists were unmodified from the block layer,
and I'm positive I saw occasions where the offset in the scatter lists
were larger than PAGE_SIZE.
> >From the point of view of other arm stuff, I don't know.
I'm not talking about anything ARM specific here.
^ permalink raw reply
* [PATCH v7 14/22] mfd: omap-usb-host: cleanup clock management code
From: Felipe Balbi @ 2013-01-17 11:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358422231-24736-15-git-send-email-rogerq@ti.com>
On Thu, Jan 17, 2013 at 01:30:23PM +0200, Roger Quadros wrote:
> All ports have similarly named port clocks so we can
> bunch them into a port data structure and use for loop
> to enable/disable the clocks.
>
> Dynamically allocate and get clocks based on number of ports
> available on the platform
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> ---
> drivers/mfd/omap-usb-host.c | 180 ++++++++++++++++++++++++------------------
> 1 files changed, 103 insertions(+), 77 deletions(-)
>
> diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
> index 779588b..c75b79d 100644
> --- a/drivers/mfd/omap-usb-host.c
> +++ b/drivers/mfd/omap-usb-host.c
> @@ -92,13 +92,12 @@
>
> struct usbhs_hcd_omap {
> int nports;
> + struct clk **utmi_clk;
>
> struct clk *xclk60mhsp1_ck;
> struct clk *xclk60mhsp2_ck;
> - struct clk *utmi_p1_fck;
> - struct clk *usbhost_p1_fck;
> - struct clk *utmi_p2_fck;
> - struct clk *usbhost_p2_fck;
> + struct clk *utmi_p1_gfclk;
> + struct clk *utmi_p2_gfclk;
> struct clk *init_60m_fclk;
> struct clk *ehci_logic_fck;
>
> @@ -276,6 +275,7 @@ static int usbhs_runtime_resume(struct device *dev)
> struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
> struct usbhs_omap_platform_data *pdata = omap->pdata;
> unsigned long flags;
> + int i, r;
>
> dev_dbg(dev, "usbhs_runtime_resume\n");
>
> @@ -285,13 +285,18 @@ static int usbhs_runtime_resume(struct device *dev)
> if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck))
> clk_enable(omap->ehci_logic_fck);
>
> - if (is_ehci_tll_mode(pdata->port_mode[0]))
> - clk_enable(omap->usbhost_p1_fck);
> - if (is_ehci_tll_mode(pdata->port_mode[1]))
> - clk_enable(omap->usbhost_p2_fck);
> -
> - clk_enable(omap->utmi_p1_fck);
> - clk_enable(omap->utmi_p2_fck);
> + for (i = 0; i < omap->nports; i++) {
> + if (is_ehci_tll_mode(pdata->port_mode[i])) {
> + if (omap->utmi_clk[i]) {
> + r = clk_enable(omap->utmi_clk[i]);
> + if (r) {
> + dev_err(dev,
> + "Can't enable port %d clk : %d\n",
> + i, r);
> + }
> + }
> + }
> + }
you can decrease indentation here a little bit:
for (i = 0; i < omap->nports; i++) {
if (!is_ehci_tll_mode(pdata->port_mode[i]))
continue;
if (!omap->utmi_clk[i])
continue;
r = clk_enable(omap->utmi_clk[i]);
if (r) {
dev_err(dev,
"Can't enable port %d clk : %d\n",
i, r);
}
}
> @@ -303,18 +308,18 @@ static int usbhs_runtime_suspend(struct device *dev)
> struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
> struct usbhs_omap_platform_data *pdata = omap->pdata;
> unsigned long flags;
> + int i;
>
> dev_dbg(dev, "usbhs_runtime_suspend\n");
>
> spin_lock_irqsave(&omap->lock, flags);
>
> - if (is_ehci_tll_mode(pdata->port_mode[0]))
> - clk_disable(omap->usbhost_p1_fck);
> - if (is_ehci_tll_mode(pdata->port_mode[1]))
> - clk_disable(omap->usbhost_p2_fck);
> -
> - clk_disable(omap->utmi_p2_fck);
> - clk_disable(omap->utmi_p1_fck);
> + for (i = 0; i < omap->nports; i++) {
> + if (is_ehci_tll_mode(pdata->port_mode[i])) {
> + if (omap->utmi_clk[i])
> + clk_disable(omap->utmi_clk[i]);
> + }
> + }
same as above.
--
balbi
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* [PATCH v7 15/22] mfd: omap-usb-host: Manage HSIC clocks for HSIC mode
From: Felipe Balbi @ 2013-01-17 11:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358422231-24736-16-git-send-email-rogerq@ti.com>
Hi,
On Thu, Jan 17, 2013 at 01:30:24PM +0200, Roger Quadros wrote:
> @@ -598,6 +639,24 @@ static int usbhs_omap_probe(struct platform_device *pdev)
> clkname, PTR_ERR(pclk));
> else
> omap->utmi_clk[i] = pclk;
> +
> + snprintf(clkname, sizeof(clkname),
> + "usb_host_hs_hsic480m_p%d_clk", i + 1);
do we really need to know the exact clock node name ?
--
balbi
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* [PATCH 1/3] mtd: omap-onenand: pass device_node in platform data
From: Artem Bityutskiy @ 2013-01-17 11:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CALF0-+Xpvn45ZXOawyFzkqMt5t7--CLZYhkr6RwRX7WWnqdnqw@mail.gmail.com>
On Tue, 2013-01-15 at 19:48 -0300, Ezequiel Garcia wrote:
> I saw you have acked the gpmc patch on nand.
> Can I add your Acked-by on this one, when I send the rebased patch set?
Yes, I saw this series which depends on Daniel Mack's work. It looks
good. You can add
Acked-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
--
Best Regards,
Artem Bityutskiy
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* [PATCH v7 17/22] mfd: omap-usb-host: clean up omap_usbhs_init()
From: Felipe Balbi @ 2013-01-17 11:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358422231-24736-18-git-send-email-rogerq@ti.com>
Hi,
On Thu, Jan 17, 2013 at 01:30:26PM +0200, Roger Quadros wrote:
> + if (is_omap_usbhs_rev1(omap))
> + reg = omap_usbhs_rev1_hostconfig(omap, reg);
> + else if (is_omap_usbhs_rev2(omap))
> + reg = omap_usbhs_rev2_hostconfig(omap, reg);
Any way you could maybe:
rev = omap_usbhs_revision(omap)
switch(rev) {
case REV1:
foo();
break;
case REV2:
bar();
break;
default: /* highest revision */
baz();
}
could be done in a later patch however.
--
balbi
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* [PATCH v7 18/22] USB: ehci-omap: Don't free gpios that we didn't request
From: Felipe Balbi @ 2013-01-17 11:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358422231-24736-19-git-send-email-rogerq@ti.com>
On Thu, Jan 17, 2013 at 01:30:27PM +0200, Roger Quadros wrote:
> This driver does not request any gpios so don't free them.
> Fixes L3 bus error on multiple modprobe/rmmod of ehci_hcd
> with ehci-omap in use.
>
> CC: Alan Stern <stern@rowland.harvard.edu>
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
should this go to stable ?
--
balbi
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* [PATCH v7 22/22] mdf: omap-usb-host: get rid of build warning
From: Felipe Balbi @ 2013-01-17 11:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358422231-24736-23-git-send-email-rogerq@ti.com>
On Thu, Jan 17, 2013 at 01:30:31PM +0200, Roger Quadros wrote:
> Fixes the below build warning when driver is built-in.
>
> drivers/mfd/omap-usb-host.c:750:12: warning:
> ?usbhs_omap_remove? defined but not used [-Wunused-function]
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
should this go to stable too ?
(though it's not really a bug, so doesn't really matter, I guess).
--
balbi
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* [PATCH v7 00/22] OMAP USB Host cleanup
From: Felipe Balbi @ 2013-01-17 11:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358422231-24736-1-git-send-email-rogerq@ti.com>
Hi,
On Thu, Jan 17, 2013 at 01:30:09PM +0200, Roger Quadros wrote:
> Hi,
>
> This patchset addresses the following
>
> - Consolidate USB Host platform data.
> - Avoid addressing clocks one by one by name and use a for loop + bunch
> of cleanups.
> - Get number of channels/ports dynamically either from revision register
> or from platform data. Avoids getting clocks that are not present.
> - Add OMAP5 and HSIC mode (Not tested).
>
> v7:
> - Updated patch 4 to not hold a spinlock when using clk_get().
> - Updated patches 3 and 11 to return -EADDRNOTAVAIL on failure of
> demv_request_and_ioremap().
>
> v6:
> - Added USB Host platform data consolidation patch as the first patch.
> based on request from Tony.
> - Rebased on v3.8-rc3.
>
> v5:
> - Rebased on top of todays arm-soc/for-next.
> - Removed the clock merging patch from the list.
> - Updated patches 14, 19 and 20 to accomodate the above change.
> - Added patch 22 to fix a build warning.
>
> v4:
> - Added appropriate maintainers in to/cc.
> - minor print message fix in patch 23 to maintain consistency.
>
> v3:
> - Rebased on arm-soc/for-next commit f979306c4d38d213c6977aaf3b1115e8ded71e3a.
> - Rearranged patch that get rids of cpu_is_omap..() macros.
> - Coding style fixes.
>
> v2:
> - Clocks are allocated dynamically based on number of ports available
> on the platform.
> - Reduced console spam if non critical clocks are not found on the platform.
> - Get rid of cpu_is_.. macros from USB host driver.
>
> cheers,
> -roger
>
> The following changes since commit 9931faca02c604c22335f5a935a501bb2ace6e20:
>
> Linux 3.8-rc3 (2013-01-09 18:59:55 -0800)
>
> are available in the git repository at:
> git at github.com:rogerq/linux.git linux-usbhost12-part
not everybody has account on github, you need to set url to something
non-authenticated and pushurl to the ssh url.
anyway, after fixing a few comments on the patches below, I guess this
is all ready for mailine, you can add to the entire series:
Reviewed-by: Felipe Balbi <balbi@ti.com>
--
balbi
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* [PATCH 1/3] MTD: at91: atmel_nand: for PMECC, add code to choose the ecc bits and sector size according to the ONFI parameter ECC requirement.
From: Artem Bityutskiy @ 2013-01-17 11:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F664BC.7@atmel.com>
On Wed, 2013-01-16 at 16:28 +0800, Josh Wu wrote:
> Hi, Artem
>
> On 1/15/2013 8:26 PM, Artem Bityutskiy wrote:
> > I cannot compile this patch:
> >
> > ERROR (phandle_references): Reference to non-existent node or label "pinctrl_ssc0_tx"
> >
> > ERROR: Input tree has errors, aborting (use -f to force output)
> > make[2]: *** [arch/arm/boot/dts/at91sam9g20ek.dtb] Error 2
>
> As Bo Shen already mentioned, they are caused by ssc pinctrl patches. it
> will be merged in next rc or late.
Then ping me when the patches are ready to go, please.
--
Best Regards,
Artem Bityutskiy
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* [PATCH 1/2] ARM: DT: tegra: Add Colibri T20 512MB COM
From: Lucas Stach @ 2013-01-17 11:59 UTC (permalink / raw)
To: linux-arm-kernel
This adds the device tree include file for the Toradex Colibri T20
Computer on Module (COM). It's only valid for the 512MB RAM version of
the module, as the 256MB version needs different EMC tables and flash
configuration. To make this clear the suffix -512 was added to the board
compatible string.
The Colibri T20 uses a Tegra2 SoC and has onboard USB Ethernet and AC97
sound.
Still some things like onboard NAND support missing, but should be a
good base for further development.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
Documentation/devicetree/bindings/arm/tegra.txt | 1 +
arch/arm/boot/dts/tegra20-colibri-512.dtsi | 505 ++++++++++++++++++++++++
2 files changed, 506 insertions(+)
create mode 100644 arch/arm/boot/dts/tegra20-colibri-512.dtsi
diff --git a/Documentation/devicetree/bindings/arm/tegra.txt b/Documentation/devicetree/bindings/arm/tegra.txt
index a5d3353..ccd4ef4 100644
--- a/Documentation/devicetree/bindings/arm/tegra.txt
+++ b/Documentation/devicetree/bindings/arm/tegra.txt
@@ -30,3 +30,4 @@ board-specific compatible values:
nvidia,seaboard
nvidia,ventana
nvidia,whistler
+ toradex,colibri_t20-512
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
new file mode 100644
index 0000000..334ff02
--- /dev/null
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -0,0 +1,505 @@
+/include/ "tegra20.dtsi"
+
+/ {
+ model = "Toradex Colibri T20 512MB";
+ compatible = "toradex,colibri_t20-512", "nvidia,tegra20";
+
+ memory {
+ reg = <0x00000000 0x20000000>;
+ };
+
+ host1x {
+ hdmi {
+ vdd-supply = <&hdmi_vdd_reg>;
+ pll-supply = <&hdmi_pll_reg>;
+
+ nvidia,ddc-i2c-bus = <&i2c_ddc>;
+ nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+ };
+ };
+
+ pinmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ state_default: pinmux {
+ audio_refclk {
+ nvidia,pins = "cdev1";
+ nvidia,function = "plla_out";
+ nvidia,pull = <0>;
+ nvidia,tristate = <0>;
+ };
+ crt {
+ nvidia,pins = "crtp";
+ nvidia,function = "crt";
+ nvidia,pull = <0>;
+ nvidia,tristate = <1>;
+ };
+ dap3 {
+ nvidia,pins = "dap3";
+ nvidia,function = "dap3";
+ nvidia,pull = <0>;
+ nvidia,tristate = <0>;
+ };
+ displaya {
+ nvidia,pins = "ld0", "ld1", "ld2", "ld3",
+ "ld4", "ld5", "ld6", "ld7", "ld8",
+ "ld9", "ld10", "ld11", "ld12", "ld13",
+ "ld14", "ld15", "ld16", "ld17",
+ "lhs", "lpw0", "lpw2", "lsc0",
+ "lsc1", "lsck", "lsda", "lspi", "lvs";
+ nvidia,function = "displaya";
+ nvidia,tristate = <1>;
+ };
+ gpio_dte {
+ nvidia,pins = "dte";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <0>;
+ nvidia,tristate = <0>;
+ };
+ gpio_gmi {
+ nvidia,pins = "ata", "atc", "atd", "ate",
+ "dap1", "dap2", "dap4", "gpu", "irrx",
+ "irtx", "spia", "spib", "spic";
+ nvidia,function = "gmi";
+ nvidia,pull = <0>;
+ nvidia,tristate = <0>;
+ };
+ gpio_pta {
+ nvidia,pins = "pta";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <0>;
+ nvidia,tristate = <0>;
+ };
+ gpio_uac {
+ nvidia,pins = "uac";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <0>;
+ nvidia,tristate = <0>;
+ };
+ hdint {
+ nvidia,pins = "hdint";
+ nvidia,function = "hdmi";
+ nvidia,tristate = <1>;
+ };
+ i2c1 {
+ nvidia,pins = "rm";
+ nvidia,function = "i2c1";
+ nvidia,pull = <0>;
+ nvidia,tristate = <1>;
+ };
+ i2c3 {
+ nvidia,pins = "dtf";
+ nvidia,function = "i2c3";
+ nvidia,pull = <0>;
+ nvidia,tristate = <1>;
+ };
+ i2cddc {
+ nvidia,pins = "ddc";
+ nvidia,function = "i2c2";
+ nvidia,pull = <2>;
+ nvidia,tristate = <1>;
+ };
+ i2cp {
+ nvidia,pins = "i2cp";
+ nvidia,function = "i2cp";
+ nvidia,pull = <0>;
+ nvidia,tristate = <0>;
+ };
+ irda {
+ nvidia,pins = "uad";
+ nvidia,function = "irda";
+ nvidia,pull = <0>;
+ nvidia,tristate = <1>;
+ };
+ nand {
+ nvidia,pins = "kbca", "kbcc", "kbcd",
+ "kbce", "kbcf";
+ nvidia,function = "nand";
+ nvidia,pull = <0>;
+ nvidia,tristate = <0>;
+ };
+ owc {
+ nvidia,pins = "owc";
+ nvidia,function = "owr";
+ nvidia,pull = <0>;
+ nvidia,tristate = <1>;
+ };
+ pmc {
+ nvidia,pins = "pmc";
+ nvidia,function = "pwr_on";
+ nvidia,tristate = <0>;
+ };
+ pwm {
+ nvidia,pins = "sdb", "sdc", "sdd";
+ nvidia,function = "pwm";
+ nvidia,tristate = <1>;
+ };
+ sdio4 {
+ nvidia,pins = "atb", "gma", "gme";
+ nvidia,function = "sdio4";
+ nvidia,pull = <0>;
+ nvidia,tristate = <1>;
+ };
+ spi1 {
+ nvidia,pins = "spid", "spie", "spif";
+ nvidia,function = "spi1";
+ nvidia,pull = <0>;
+ nvidia,tristate = <1>;
+ };
+ spi4 {
+ nvidia,pins = "slxa", "slxc", "slxd", "slxk";
+ nvidia,function = "spi4";
+ nvidia,pull = <0>;
+ nvidia,tristate = <1>;
+ };
+ uarta {
+ nvidia,pins = "sdio1";
+ nvidia,function = "uarta";
+ nvidia,pull = <0>;
+ nvidia,tristate = <1>;
+ };
+ uartd {
+ nvidia,pins = "gmc";
+ nvidia,function = "uartd";
+ nvidia,pull = <0>;
+ nvidia,tristate = <1>;
+ };
+ ulpi {
+ nvidia,pins = "uaa", "uab", "uda";
+ nvidia,function = "ulpi";
+ nvidia,pull = <0>;
+ nvidia,tristate = <0>;
+ };
+ ulpi_refclk {
+ nvidia,pins = "cdev2";
+ nvidia,function = "pllp_out4";
+ nvidia,pull = <0>;
+ nvidia,tristate = <0>;
+ };
+ usb_gpio {
+ nvidia,pins = "spig", "spih";
+ nvidia,function = "spi2_alt";
+ nvidia,pull = <0>;
+ nvidia,tristate = <0>;
+ };
+ vi {
+ nvidia,pins = "dta", "dtb", "dtc", "dtd";
+ nvidia,function = "vi";
+ nvidia,pull = <0>;
+ nvidia,tristate = <1>;
+ };
+ vi_sc {
+ nvidia,pins = "csus";
+ nvidia,function = "vi_sensor_clk";
+ nvidia,pull = <0>;
+ nvidia,tristate = <1>;
+ };
+ };
+ };
+
+ i2c at 7000c000 {
+ clock-frequency = <400000>;
+ };
+
+ i2c_ddc: i2c at 7000c400 {
+ clock-frequency = <100000>;
+ };
+
+ i2c at 7000c500 {
+ clock-frequency = <400000>;
+ };
+
+ i2c at 7000d000 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ pmic: tps6586x at 34 {
+ compatible = "ti,tps6586x";
+ reg = <0x34>;
+ interrupts = <0 86 0x4>;
+
+ ti,system-power-controller;
+
+ #gpio-cells = <2>;
+ gpio-controller;
+
+ sys-supply = <&vdd_5v0_reg>;
+ vin-sm0-supply = <&sys_reg>;
+ vin-sm1-supply = <&sys_reg>;
+ vin-sm2-supply = <&sys_reg>;
+ vinldo01-supply = <&sm2_reg>;
+ vinldo23-supply = <&sm2_reg>;
+ vinldo4-supply = <&sm2_reg>;
+ vinldo678-supply = <&sm2_reg>;
+ vinldo9-supply = <&sm2_reg>;
+
+ regulators {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sys_reg: regulator at 0 {
+ reg = <0>;
+ regulator-compatible = "sys";
+ regulator-name = "vdd_sys";
+ regulator-always-on;
+ };
+
+ regulator at 1 {
+ reg = <1>;
+ regulator-compatible = "sm0";
+ regulator-name = "vdd_sm0,vdd_core";
+ regulator-min-microvolt = <1275000>;
+ regulator-max-microvolt = <1275000>;
+ regulator-always-on;
+ };
+
+ regulator at 2 {
+ reg = <2>;
+ regulator-compatible = "sm1";
+ regulator-name = "vdd_sm1,vdd_cpu";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ };
+
+ sm2_reg: regulator at 3 {
+ reg = <3>;
+ regulator-compatible = "sm2";
+ regulator-name = "vdd_sm2,vin_ldo*";
+ regulator-min-microvolt = <3700000>;
+ regulator-max-microvolt = <3700000>;
+ regulator-always-on;
+ };
+
+ /* LDO0 is not connected to anything */
+
+ regulator at 5 {
+ reg = <5>;
+ regulator-compatible = "ldo1";
+ regulator-name = "vdd_ldo1,avdd_pll*";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ };
+
+ regulator at 6 {
+ reg = <6>;
+ regulator-compatible = "ldo2";
+ regulator-name = "vdd_ldo2,vdd_rtc";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ /* LDO3 is not connected to anything */
+
+ regulator at 8 {
+ reg = <8>;
+ regulator-compatible = "ldo4";
+ regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo5_reg: regulator at 9 {
+ reg = <9>;
+ regulator-compatible = "ldo5";
+ regulator-name = "vdd_ldo5,vcore_mmc,vdd_fuse";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ regulator at 10 {
+ reg = <10>;
+ regulator-compatible = "ldo6";
+ regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ hdmi_vdd_reg: regulator at 11 {
+ reg = <11>;
+ regulator-compatible = "ldo7";
+ regulator-name = "vdd_ldo7,avdd_hdmi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ hdmi_pll_reg: regulator at 12 {
+ reg = <12>;
+ regulator-compatible = "ldo8";
+ regulator-name = "vdd_ldo8,avdd_hdmi_pll";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ regulator at 13 {
+ reg = <13>;
+ regulator-compatible = "ldo9";
+ regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <2850000>;
+ regulator-always-on;
+ };
+
+ regulator at 14 {
+ reg = <14>;
+ regulator-compatible = "ldo_rtc";
+ regulator-name = "vdd_rtc_out,vdd_cell";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+ };
+ };
+
+ temperature-sensor at 4c {
+ compatible = "national,lm95245";
+ reg = <0x4c>;
+ };
+ };
+
+ memory-controller at 7000f400 {
+ emc-table at 83250 {
+ reg = <83250>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <83250>;
+ nvidia,emc-registers = < 0x00000005 0x00000011
+ 0x00000004 0x00000002 0x00000004 0x00000004
+ 0x00000001 0x0000000a 0x00000002 0x00000002
+ 0x00000001 0x00000001 0x00000003 0x00000004
+ 0x00000003 0x00000009 0x0000000c 0x0000025f
+ 0x00000000 0x00000003 0x00000003 0x00000002
+ 0x00000002 0x00000001 0x00000008 0x000000c8
+ 0x00000003 0x00000005 0x00000003 0x0000000c
+ 0x00000002 0x00000000 0x00000000 0x00000002
+ 0x00000000 0x00000000 0x00000083 0x00520006
+ 0x00000010 0x00000008 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000 >;
+ };
+ emc-table at 133200 {
+ reg = <133200>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <133200>;
+ nvidia,emc-registers = < 0x00000008 0x00000019
+ 0x00000006 0x00000002 0x00000004 0x00000004
+ 0x00000001 0x0000000a 0x00000002 0x00000002
+ 0x00000002 0x00000001 0x00000003 0x00000004
+ 0x00000003 0x00000009 0x0000000c 0x0000039f
+ 0x00000000 0x00000003 0x00000003 0x00000002
+ 0x00000002 0x00000001 0x00000008 0x000000c8
+ 0x00000003 0x00000007 0x00000003 0x0000000c
+ 0x00000002 0x00000000 0x00000000 0x00000002
+ 0x00000000 0x00000000 0x00000083 0x00510006
+ 0x00000010 0x00000008 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000 >;
+ };
+ emc-table at 166500 {
+ reg = <166500>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <166500>;
+ nvidia,emc-registers = < 0x0000000a 0x00000021
+ 0x00000008 0x00000003 0x00000004 0x00000004
+ 0x00000002 0x0000000a 0x00000003 0x00000003
+ 0x00000002 0x00000001 0x00000003 0x00000004
+ 0x00000003 0x00000009 0x0000000c 0x000004df
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000003 0x00000001 0x00000009 0x000000c8
+ 0x00000003 0x00000009 0x00000004 0x0000000c
+ 0x00000002 0x00000000 0x00000000 0x00000002
+ 0x00000000 0x00000000 0x00000083 0x004f0006
+ 0x00000010 0x00000008 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000 >;
+ };
+ emc-table at 333000 {
+ reg = <333000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <333000>;
+ nvidia,emc-registers = < 0x00000014 0x00000041
+ 0x0000000f 0x00000005 0x00000004 0x00000005
+ 0x00000003 0x0000000a 0x00000005 0x00000005
+ 0x00000004 0x00000001 0x00000003 0x00000004
+ 0x00000003 0x00000009 0x0000000c 0x000009ff
+ 0x00000000 0x00000003 0x00000003 0x00000005
+ 0x00000005 0x00000001 0x0000000e 0x000000c8
+ 0x00000003 0x00000011 0x00000006 0x0000000c
+ 0x00000002 0x00000000 0x00000000 0x00000002
+ 0x00000000 0x00000000 0x00000083 0x00380006
+ 0x00000010 0x00000008 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000 >;
+ };
+ };
+
+ ac97: ac97 {
+ status = "okay";
+ nvidia,codec-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
+ nvidia,codec-sync-gpio = <&gpio 120 0>; /* gpio PP0 */
+ };
+
+ serial at 70006000 {
+ clock-frequency = <216000000>;
+ };
+
+ serial at 70006300 {
+ clock-frequency = <216000000>;
+ };
+
+ usb at c5000000 {
+ dr_mode = "otg";
+ };
+
+ usb at c5004000 {
+ status = "okay";
+ nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+ };
+
+ sdhci at c8000600 {
+ cd-gpios = <&gpio 23 0>; /* gpio PC7 */
+ vmmc-supply = <&ldo5_reg>;
+ vqmmc-supply = <&vcc_sd_reg>;
+ };
+
+ sound {
+ compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
+ "nvidia,tegra-audio-wm9712";
+ nvidia,model = "Colibri T20 AC97 Audio";
+
+ nvidia,audio-routing =
+ "Headphone", "HPOUTL",
+ "Headphone", "HPOUTR",
+ "LineIn", "LINEINL",
+ "LineIn", "LINEINR",
+ "Mic", "MIC1";
+
+ nvidia,ac97-controller = <&ac97>;
+ };
+
+ com_regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vdd_5v0_reg: com_reg0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "vdd_5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ int_usb_reg: com_reg1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "usb2_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-boot-on;
+ regulator-always-on;
+ gpio = <&gpio 217 0>;
+ };
+ };
+};
--
1.8.0.2
^ permalink raw reply related
* [PATCH 2/2] ARM: DT: tegra: Add Toradex Iris carrier board with T20 512MB COM
From: Lucas Stach @ 2013-01-17 11:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358423961-24318-1-git-send-email-dev@lynxeye.de>
This adds the device tree for the Toradex Iris carrier board used
together with a Colibri T20 512MB COM.
The Iris has the following features, in brackets the current status:
- DVI and VGA output through DVI-I connector (DVI-D enabled and tested)
- LVDS output
- 1 USB host port (enabled and tested)
- 1 USB OTG port (enabled)
- 100 MBit Ethernet (enabled and tested)
- 5 UART ports (2 on 10way headers enabled and tested)
- 1 MicroSD Slot (enabled and tested)
- Audio connectors (enabled, only HP out and Line-in tested)
- i2c RTC
- GPIO connector (enabled, only sparsely tested)
- external i2c bus
- 4 PWM out
- analog in
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
Documentation/devicetree/bindings/arm/tegra.txt | 1 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/tegra20-iris-512.dts | 88 +++++++++++++++++++++++++
3 files changed, 90 insertions(+)
create mode 100644 arch/arm/boot/dts/tegra20-iris-512.dts
diff --git a/Documentation/devicetree/bindings/arm/tegra.txt b/Documentation/devicetree/bindings/arm/tegra.txt
index ccd4ef4..ed9c853 100644
--- a/Documentation/devicetree/bindings/arm/tegra.txt
+++ b/Documentation/devicetree/bindings/arm/tegra.txt
@@ -31,3 +31,4 @@ board-specific compatible values:
nvidia,ventana
nvidia,whistler
toradex,colibri_t20-512
+ toradex,iris
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 5c13de2..b756c51 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -134,6 +134,7 @@ dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun4i-a10-cubieboard.dtb \
sun5i-a13-olinuxino.dtb
dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
+ tegra20-iris-512.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
tegra20-plutux.dtb \
diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-iris-512.dts
new file mode 100644
index 0000000..22959a1
--- /dev/null
+++ b/arch/arm/boot/dts/tegra20-iris-512.dts
@@ -0,0 +1,88 @@
+/dts-v1/;
+
+/include/ "tegra20-colibri-512.dtsi"
+
+/ {
+ model = "Toradex Colibri T20 512MB on Iris";
+ compatible = "toradex,iris", "toradex,colibri_t20-512", "nvidia,tegra20";
+
+ host1x {
+ hdmi {
+ status = "okay";
+ };
+ };
+
+ pinmux {
+ state_default: pinmux {
+ hdint {
+ nvidia,tristate = <0>;
+ };
+
+ i2cddc {
+ nvidia,tristate = <0>;
+ };
+
+ sdio4 {
+ nvidia,tristate = <0>;
+ };
+
+ uarta {
+ nvidia,tristate = <0>;
+ };
+
+ uartd {
+ nvidia,tristate = <0>;
+ };
+ };
+ };
+
+ usb at c5000000 {
+ status = "okay";
+ };
+
+ usb at c5008000 {
+ status = "okay";
+ };
+
+ serial at 70006000 {
+ status = "okay";
+ };
+
+ serial at 70006300 {
+ status = "okay";
+ };
+
+ i2c_ddc: i2c at 7000c400 {
+ status = "okay";
+ };
+
+ sdhci at c8000600 {
+ status = "okay";
+ bus-width = <4>;
+ };
+
+ board_regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb_host_vbus {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "usb_host_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ gpio = <&gpio 178 0>;
+ };
+
+ vcc_sd_reg: regulator at 3 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+ };
+};
--
1.8.0.2
^ permalink raw reply related
* [PATCH] ARM: shmobile: sh73a0: Use generic irqchip_init()
From: Thierry Reding @ 2013-01-17 12:00 UTC (permalink / raw)
To: linux-arm-kernel
The asm/hardware/gic.h header does no longer exist and the corresponding
functionality was moved to linux/irqchip.h and linux/irqchip/arm-gic.h
respectively. gic_handle_irq() and of_irq_init() are no longer available
either and have been replaced by irqchip_init().
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
---
arch/arm/mach-shmobile/board-kzm9g-reference.c | 1 -
arch/arm/mach-shmobile/intc-sh73a0.c | 9 ++-------
arch/arm/mach-shmobile/setup-sh73a0.c | 2 --
3 files changed, 2 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
index 04e9ae5..08c95dd 100644
--- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
@@ -90,7 +90,6 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g-reference")
.init_early = sh73a0_add_early_devices_dt,
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = sh73a0_init_irq_dt,
- .handle_irq = gic_handle_irq,
.init_machine = kzm_init,
.init_late = shmobile_init_late,
.init_time = shmobile_timer_init,
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index fc7c8da..91faba6 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -21,9 +21,9 @@
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/irq.h>
-#include <linux/of_irq.h>
#include <linux/io.h>
#include <linux/sh_intc.h>
+#include <linux/irqchip.h>
#include <linux/irqchip/arm-gic.h>
#include <mach/intc.h>
#include <mach/irqs.h>
@@ -462,14 +462,9 @@ void __init sh73a0_init_irq(void)
}
#ifdef CONFIG_OF
-static const struct of_device_id irq_of_match[] __initconst = {
- { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
- { },
-};
-
void __init sh73a0_init_irq_dt(void)
{
- of_irq_init(irq_of_match);
+ irqchip_init();
gic_arch_extn.irq_set_wake = sh73a0_set_wake;
}
#endif
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index abf1eb0..2ecd668 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -36,7 +36,6 @@
#include <mach/irqs.h>
#include <mach/sh73a0.h>
#include <mach/common.h>
-#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/mach/arch.h>
@@ -892,7 +891,6 @@ DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)")
.init_early = sh73a0_add_early_devices_dt,
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = sh73a0_init_irq_dt,
- .handle_irq = gic_handle_irq,
.init_machine = sh73a0_add_standard_devices_dt,
.init_time = shmobile_timer_init,
.dt_compat = sh73a0_boards_compat_dt,
--
1.8.1.1
^ permalink raw reply related
* [PATCH 0/4] gpio: introduce descriptor-based interface
From: Greg Ungerer @ 2013-01-17 12:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkda6dqAj+DzrMCnKET7Z9PtuW0+k9ea3YDL8Z1D=oFVRpQ@mail.gmail.com>
Hi Linus,
(My gerg at snapgear.com email no longer gets to me, gerg at uclinux.org is
the best direct email for me now).
On 01/17/2013 09:15 PM, Linus Walleij wrote:
> On Thu, Jan 10, 2013 at 11:08 AM, Arnd Bergmann <arnd@arndb.de> wrote:
>
>> I've tried to find platforms that don't yet use GPIOLIB and fortunately
>> there are very few left:
>>
>> I found two that provide the generic gpio interfaces when gpiolib
>> is disabled, but use gpiolib otherwise for the same hardware,
>> arch/m68k/include/asm/mcfgpio.h and arch/blackfin/include/asm/gpio.h.
>> I would assume that we can simply remove the non-gpiolib shortcut
>> here at cost of a small overhead.
>
> Geert/Greg: interested in looking into this issue?
>
> The GPIO maintainers want to get rid of non-gpiolib platforms.
Steven King did most of the ColdFire GPIO work (CC'ed on this).
Steven: are you happy to drop the non-gpiolib support?
Regards
Greg
^ permalink raw reply
* [PATCH v4 0/3] mtd: nand: OMAP: ELM error correction support for BCH ecc
From: Artem Bityutskiy @ 2013-01-17 12:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <518397C60809E147AF5323E0420B992E3EA5DFA9@DBDE01.ent.ti.com>
On Wed, 2013-01-16 at 12:22 +0000, Philip, Avinash wrote:
> > This series is based on linux 3.8-rc2 and tested with [1].
> > Also this patch series depend on [1] for NAND flash device
> > tree data and gpmc nand device tree binding documentation updates.
> >
> > 1. [PATCH v7 0/5] OMAP GPMC DT bindings
> > http://www.spinics.net/lists/linux-omap/msg83505.html
> >
> > Tested on am335x-evm for BCH 4 and 8 bit error correction.
>
> Can you apply this patch series on l2-mtd tree as it will help RBL compatibility
> ecc layout for NAND flash in am335x-platforms and hardware based BCH error
> correction.
OK, I've applied them. I dropped the part that updates the
documentation. Please, handle it separately when Daniel's patches are
in.
Pushed to l2-mtd.git, thanks!
--
Best Regards,
Artem Bityutskiy
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^ permalink raw reply
* [PATCH v7 14/22] mfd: omap-usb-host: cleanup clock management code
From: Roger Quadros @ 2013-01-17 12:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130117114401.GE18978@arwen.pp.htv.fi>
On 01/17/2013 01:44 PM, Felipe Balbi wrote:
> On Thu, Jan 17, 2013 at 01:30:23PM +0200, Roger Quadros wrote:
>> All ports have similarly named port clocks so we can
>> bunch them into a port data structure and use for loop
>> to enable/disable the clocks.
>>
>> Dynamically allocate and get clocks based on number of ports
>> available on the platform
>>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> ---
>> drivers/mfd/omap-usb-host.c | 180 ++++++++++++++++++++++++------------------
>> 1 files changed, 103 insertions(+), 77 deletions(-)
>>
>> diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
>> index 779588b..c75b79d 100644
>> --- a/drivers/mfd/omap-usb-host.c
>> +++ b/drivers/mfd/omap-usb-host.c
>> @@ -92,13 +92,12 @@
>>
>> struct usbhs_hcd_omap {
>> int nports;
>> + struct clk **utmi_clk;
>>
>> struct clk *xclk60mhsp1_ck;
>> struct clk *xclk60mhsp2_ck;
>> - struct clk *utmi_p1_fck;
>> - struct clk *usbhost_p1_fck;
>> - struct clk *utmi_p2_fck;
>> - struct clk *usbhost_p2_fck;
>> + struct clk *utmi_p1_gfclk;
>> + struct clk *utmi_p2_gfclk;
>> struct clk *init_60m_fclk;
>> struct clk *ehci_logic_fck;
>>
>> @@ -276,6 +275,7 @@ static int usbhs_runtime_resume(struct device *dev)
>> struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
>> struct usbhs_omap_platform_data *pdata = omap->pdata;
>> unsigned long flags;
>> + int i, r;
>>
>> dev_dbg(dev, "usbhs_runtime_resume\n");
>>
>> @@ -285,13 +285,18 @@ static int usbhs_runtime_resume(struct device *dev)
>> if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck))
>> clk_enable(omap->ehci_logic_fck);
>>
>> - if (is_ehci_tll_mode(pdata->port_mode[0]))
>> - clk_enable(omap->usbhost_p1_fck);
>> - if (is_ehci_tll_mode(pdata->port_mode[1]))
>> - clk_enable(omap->usbhost_p2_fck);
>> -
>> - clk_enable(omap->utmi_p1_fck);
>> - clk_enable(omap->utmi_p2_fck);
>> + for (i = 0; i < omap->nports; i++) {
>> + if (is_ehci_tll_mode(pdata->port_mode[i])) {
>> + if (omap->utmi_clk[i]) {
>> + r = clk_enable(omap->utmi_clk[i]);
>> + if (r) {
>> + dev_err(dev,
>> + "Can't enable port %d clk : %d\n",
>> + i, r);
>> + }
>> + }
>> + }
>> + }
>
> you can decrease indentation here a little bit:
>
> for (i = 0; i < omap->nports; i++) {
> if (!is_ehci_tll_mode(pdata->port_mode[i]))
> continue;
>
> if (!omap->utmi_clk[i])
> continue;
>
> r = clk_enable(omap->utmi_clk[i]);
> if (r) {
> dev_err(dev,
> "Can't enable port %d clk : %d\n",
> i, r);
> }
> }
OK.
--
cheers,
-roger
^ permalink raw reply
* [PATCH v7 15/22] mfd: omap-usb-host: Manage HSIC clocks for HSIC mode
From: Roger Quadros @ 2013-01-17 12:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130117114522.GF18978@arwen.pp.htv.fi>
On 01/17/2013 01:45 PM, Felipe Balbi wrote:
> Hi,
>
> On Thu, Jan 17, 2013 at 01:30:24PM +0200, Roger Quadros wrote:
>> @@ -598,6 +639,24 @@ static int usbhs_omap_probe(struct platform_device *pdev)
>> clkname, PTR_ERR(pclk));
>> else
>> omap->utmi_clk[i] = pclk;
>> +
>> + snprintf(clkname, sizeof(clkname),
>> + "usb_host_hs_hsic480m_p%d_clk", i + 1);
>
> do we really need to know the exact clock node name ?
>
I think so. Do you have a better suggestion?
--
cheers,
-roger
^ permalink raw reply
* [RFC PATCH 2/6] ARM: OMAP: USB: Add phy binding information
From: Vivek Gautam @ 2013-01-17 12:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358348462-27693-3-git-send-email-kishon@ti.com>
Hi Kishon,
On Wed, Jan 16, 2013 at 8:30 PM, Kishon Vijay Abraham I <kishon@ti.com> wrote:
> This is in preparation for the changes in PHY library to support adding
> and getting multiple PHYs of the same type. In the new design, the
> binding information between the PHY and the USB controller should be
> specified in the platform specific initialization code. So it's been
> done for OMAP platforms here.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> This kind-of binding should be done in all the platforms (I've done only
> for OMAP platform).
> arch/arm/mach-omap2/usb-musb.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
> index 9d27e3f..bbe2fa5 100644
> --- a/arch/arm/mach-omap2/usb-musb.c
> +++ b/arch/arm/mach-omap2/usb-musb.c
> @@ -24,6 +24,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/io.h>
> #include <linux/usb/musb.h>
> +#include <linux/usb/phy.h>
>
> #include "omap_device.h"
> #include "soc.h"
> @@ -85,8 +86,12 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
> musb_plat.mode = board_data->mode;
> musb_plat.extvbus = board_data->extvbus;
>
> - if (cpu_is_omap44xx())
> + if (cpu_is_omap44xx()) {
> musb_plat.has_mailbox = true;
> + usb_bind_phy("musb-hdrc.0.auto", 0, "omap-usb2.1.auto");
> + } else if (cpu_is_omap34xx()) {
> + usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
> + }
Just trying to understand things here.
Is the device name we are using here the platform device name (pdev->name) ?
If i am not wrong then for devices added through device tree
the device name would actually include the device address in the string,
wouldn't that make things somewhat weird, since we will have to add
such bindings
using this address string.
one more doubt please :)
is it possible to bind phy in the controllers' driver somehow ?
>
> if (soc_is_am35xx()) {
> oh_name = "am35x_otg_hs";
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Thanks & Regards
Vivek
^ permalink raw reply
* [PATCH v2 0/3] at91: PMECC: enable PMECC in dt for at91sam9x5ek, at91sam9n12ek
From: Artem Bityutskiy @ 2013-01-17 12:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358393072-14794-1-git-send-email-josh.wu@atmel.com>
On Thu, 2013-01-17 at 11:24 +0800, Josh Wu wrote:
> Those patches will enable PMECC in dt parameters for at91sam9x5ek, at91sam9n12ek.
> The driver will check minimum required ecc on ONFI parameter from NAND flash.
> If pmecc-cap in dts doesn't meet the requirement then driver reports a error.
>
> v2: rebase to v3.8-rc3. And wrapped the commit message.
Please, whenever you know your patch-set depends on something which is
not yet in Linuse's tree, _always_ explicitly say about this.
--
Best Regards,
Artem Bityutskiy
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* [PATCH v7 17/22] mfd: omap-usb-host: clean up omap_usbhs_init()
From: Roger Quadros @ 2013-01-17 12:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130117114804.GG18978@arwen.pp.htv.fi>
On 01/17/2013 01:48 PM, Felipe Balbi wrote:
> Hi,
>
> On Thu, Jan 17, 2013 at 01:30:26PM +0200, Roger Quadros wrote:
>> + if (is_omap_usbhs_rev1(omap))
>> + reg = omap_usbhs_rev1_hostconfig(omap, reg);
>> + else if (is_omap_usbhs_rev2(omap))
>> + reg = omap_usbhs_rev2_hostconfig(omap, reg);
>
> Any way you could maybe:
>
> rev = omap_usbhs_revision(omap)
> switch(rev) {
> case REV1:
> foo();
> break;
> case REV2:
> bar();
> break;
> default: /* highest revision */
> baz();
> }
>
> could be done in a later patch however.
>
I'll fix it in this series.
--
cheers,
-roger
^ permalink raw reply
* [PATCH] sdma-imx: Add SDMA firmware for Freescale i.MX SOCs
From: Fabio Estevam @ 2013-01-17 12:16 UTC (permalink / raw)
To: linux-arm-kernel
Add SDMA firmware for Freescale i.MX SOCs.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
LICENCE.fsl_firmware | 140 +++++++++++++++++++++++++++++++++++++++++++
WHENCE | 13 ++++
imx/sdma/sdma-imx25-to1.bin | Bin 0 -> 694 bytes
imx/sdma/sdma-imx31-to2.bin | Bin 0 -> 3762 bytes
imx/sdma/sdma-imx35-to2.bin | Bin 0 -> 1746 bytes
imx/sdma/sdma-imx51.bin | Bin 0 -> 1894 bytes
imx/sdma/sdma-imx53.bin | Bin 0 -> 1406 bytes
imx/sdma/sdma-imx6q-to1.bin | Bin 0 -> 1838 bytes
8 files changed, 153 insertions(+)
create mode 100644 LICENCE.fsl_firmware
create mode 100644 imx/sdma/sdma-imx25-to1.bin
create mode 100644 imx/sdma/sdma-imx31-to2.bin
create mode 100644 imx/sdma/sdma-imx35-to2.bin
create mode 100644 imx/sdma/sdma-imx51.bin
create mode 100644 imx/sdma/sdma-imx53.bin
create mode 100644 imx/sdma/sdma-imx6q-to1.bin
diff --git a/LICENCE.fsl_firmware b/LICENCE.fsl_firmware
new file mode 100644
index 0000000..a1fef32
--- /dev/null
+++ b/LICENCE.fsl_firmware
@@ -0,0 +1,140 @@
+FREESCALE SEMICONDUCTOR SOFTWARE LICENSE AGREEMENT
+
+This is a legal agreement between you (either as an individual or as an
+authorized representative of your employer) and Freescale
+Semiconductor, Inc. ("Freescale"). It concerns your rights to use this
+file and any accompanying written materials (the "Software"). In
+consideration for Freescale allowing you to access the Software, you
+are agreeing to be bound by the terms of this Agreement. If you do not
+agree to all of the terms of this Agreement, do not download the
+Software. If you change your mind later, stop using the Software and
+delete all copies of the Software in your possession or control. Any
+copies of the Software that you have already distributed, where
+permitted, and do not destroy will continue to be governed by this
+Agreement. Your prior use will also continue to be governed by this
+Agreement.
+
+LICENSE GRANT.? Freescale grants to you, free of charge, the
+non-exclusive, non-transferable right (1) to reproduce the Software,
+(2) to distribute the Software, and (3) to sublicense to others the
+right to use the distributed Software. The Software is provided to you
+only in object (machine-readable) form. You may exercise the rights
+above only with respect to such object form. You may not translate,
+reverse engineer, decompile, or disassemble the Software except to the
+extent applicable law specifically prohibits such restriction. In
+addition, you must prohibit your sublicensees from doing the same. If
+you violate any of the terms or restrictions of this Agreement,
+Freescale may immediately terminate this Agreement, and require that
+you stop using and delete all copies of the Software in your possession
+or control.
+
+COPYRIGHT.? The Software is licensed to you, not sold. Freescale owns
+the Software, and United States copyright laws and international treaty
+provisions protect the Software. Therefore, you must treat the Software
+like any other copyrighted material (e.g. a book or musical
+recording). You may not use or copy the Software for any other purpose
+than what is described in this Agreement. Except as expressly provided
+herein, Freescale does not grant to you any express or implied rights
+under any Freescale or third-party patents, copyrights, trademarks, or
+trade secrets. Additionally, you must reproduce and apply any copyright
+or other proprietary rights notices included on or embedded in the
+Software to any copies or derivative works made thereof, in whole or in
+part, if any.
+
+SUPPORT.? Freescale is NOT obligated to provide any support, upgrades
+or new releases of the Software. If you wish, you may contact Freescale
+and report problems and provide suggestions regarding the
+Software. Freescale has no obligation whatsoever to respond in any way
+to such a problem report or suggestion. Freescale may make changes to
+the Software at any time, without any obligation to notify or provide
+updated versions of the Software to you.
+
+NO WARRANTY.? TO THE MAXIMUM EXTENT PERMITTED BY LAW, FREESCALE
+EXPRESSLY DISCLAIMS ANY WARRANTY FOR THE SOFTWARE. THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR
+IMPLIED, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
+NON-INFRINGEMENT. YOU ASSUME THE ENTIRE RISK ARISING OUT OF THE USE OR
+PERFORMANCE OF THE SOFTWARE, OR ANY SYSTEMS YOU DESIGN USING THE
+SOFTWARE (IF ANY). NOTHING IN THIS AGREEMENT MAY BE CONSTRUED AS A
+WARRANTY OR REPRESENTATION BY FREESCALE THAT THE SOFTWARE OR ANY
+DERIVATIVE WORK DEVELOPED WITH OR INCORPORATING THE SOFTWARE WILL BE
+FREE FROM INFRINGEMENT OF THE INTELLECTUAL PROPERTY RIGHTS OF THIRD
+PARTIES.
+
+INDEMNITY.? You agree to fully defend and indemnify Freescale from any
+and all claims, liabilities, and costs (including reasonable attorney's
+fees) related to (1) your use (including your sublicensee's use, if
+permitted) of the Software or (2) your violation of the terms and
+conditions of this Agreement.
+
+LIMITATION OF LIABILITY.? IN NO EVENT WILL FREESCALE BE LIABLE, WHETHER
+IN CONTRACT, TORT, OR OTHERWISE, FOR ANY INCIDENTAL, SPECIAL, INDIRECT,
+CONSEQUENTIAL OR PUNITIVE DAMAGES, INCLUDING, BUT NOT LIMITED TO,
+DAMAGES FOR ANY LOSS OF USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL
+LOSS, OR LOST PROFITS, SAVINGS, OR REVENUES TO THE FULL EXTENT SUCH MAY
+BE DISCLAIMED BY LAW.
+
+COMPLIANCE WITH LAWS; EXPORT RESTRICTIONS. This software may be
+subject to the U.S. Export Regulations and/or the regulatory authority
+of the country in which the download takes place. By downloading this
+software you understand and agree to comply with all applicable export
+control regulations when further transferring or exporting the software
+either as downloaded or as integrated into other software or
+commodities.
+
+GOVERNMENT USE.? Use of the Software and any corresponding
+documentation, if any, is provided with RESTRICTED RIGHTS. Use,
+duplication or disclosure by the Government is subject to restrictions
+as set forth in subparagraph (c)(1)(ii) of The Rights in Technical Data
+and Computer Software clause at DFARS 252.227-7013 or subparagraphs
+(c)(l) and (2) of the Commercial Computer Software--Restricted Rights
+at 48 CFR 52.227-19, as applicable. Manufacturer is Freescale
+Semiconductor, Inc., 6501 William Cannon Drive West, Austin, TX, 78735.
+
+HIGH RISK ACTIVITIES.? You acknowledge that the Software is not fault
+tolerant and is not designed, manufactured or intended by Freescale for
+incorporation into products intended for use or resale in on-line
+control equipment in hazardous, dangerous to life or potentially
+life-threatening environments requiring fail-safe performance, such as
+in the operation of nuclear facilities, aircraft navigation or
+communication systems, air traffic control, direct life support
+machines or weapons systems, in which the failure of products could
+lead directly to death, personal injury or severe physical or
+environmental damage ("High Risk Activities"). You specifically
+represent and warrant that you will not use the Software or any
+derivative work of the Software for High Risk Activities.
+
+CHOICE OF LAW; VENUE; LIMITATIONS.? You agree that the statutes and
+laws of the United States and the State of Texas, USA, without regard
+to conflicts of laws principles, will apply to all matters relating to
+this Agreement or the Software, and you agree that any litigation will
+be subject to the exclusive jurisdiction of the state or federal courts
+in Texas, USA. You agree that regardless of any statute or law to the
+contrary, any claim or cause of action arising out of or related to
+this Agreement or the Software must be filed within one (1) year after
+such claim or cause of action arose or be forever barred.
+
+PRODUCT LABELING.? You are not authorized to use any Freescale
+trademarks, brand names, or logos.
+
+ENTIRE AGREEMENT.? This Agreement constitutes the entire agreement
+between you and Freescale regarding the subject matter of this
+Agreement, and supersedes all prior communications, negotiations,
+understandings, agreements or representations, either written or oral,
+if any. This Agreement may only be amended in written form, executed by
+you and Freescale.
+
+SEVERABILITY.? If any provision of this Agreement is held for any
+reason to be invalid or unenforceable, then the remaining provisions of
+this Agreement will be unimpaired and, unless a modification or
+replacement of the invalid or unenforceable provision is further held
+to deprive you or Freescale of a material benefit, in which case the
+Agreement will immediately terminate, the invalid or unenforceable
+provision will be replaced with a provision that is valid and
+enforceable and that comes closest to the intention underlying the
+invalid or unenforceable provision.
+
+NO WAIVER.? The waiver by Freescale of any breach of any provision of
+this Agreement will not operate or be construed as a waiver of any
+other or a subsequent breach of the same or a different provision.
diff --git a/WHENCE b/WHENCE
index 96142c2..64892f5 100644
--- a/WHENCE
+++ b/WHENCE
@@ -2046,3 +2046,16 @@ Downloaded from http://linuxwireless.org/en/users/Drivers/carl9170
Licence: GPLv2. Some build scripts use the New BSD (3-clause) licence.
--------------------------------------------------------------------------
+
+Driver: imx-sdma -- Freescale i.MX SDMA driver
+
+File: imx/sdma/sdma-imx25-to1.bin
+File: imx/sdma/sdma-imx31-to2.bin
+File: imx/sdma/sdma-imx35-to2.bin
+File: imx/sdma/sdma-imx51.bin
+File: imx/sdma/sdma-imx53.bin
+File: imx/sdma/sdma-imx6q-to1.bin
+
+License: Redistributable. See LICENCE.fsl_firmware for details
+
+--------------------------------------------------------------------------
diff --git a/imx/sdma/sdma-imx25-to1.bin b/imx/sdma/sdma-imx25-to1.bin
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--
1.7.9.5
^ permalink raw reply related
* [PATCH v7 15/22] mfd: omap-usb-host: Manage HSIC clocks for HSIC mode
From: Felipe Balbi @ 2013-01-17 12:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F7EA2A.2080705@ti.com>
On Thu, Jan 17, 2013 at 02:10:18PM +0200, Roger Quadros wrote:
> On 01/17/2013 01:45 PM, Felipe Balbi wrote:
> > Hi,
> >
> > On Thu, Jan 17, 2013 at 01:30:24PM +0200, Roger Quadros wrote:
> >> @@ -598,6 +639,24 @@ static int usbhs_omap_probe(struct platform_device *pdev)
> >> clkname, PTR_ERR(pclk));
> >> else
> >> omap->utmi_clk[i] = pclk;
> >> +
> >> + snprintf(clkname, sizeof(clkname),
> >> + "usb_host_hs_hsic480m_p%d_clk", i + 1);
> >
> > do we really need to know the exact clock node name ?
> >
> I think so. Do you have a better suggestion?
update CLKDEV entries ? I mean, what if we have a new OMAP or AMxxxx
device with a different clock name ? That will be a big bummer.
--
balbi
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* [PATCH v2] mtd: vt8500: Add support for Wondermedia Serial Flash Controller
From: Artem Bityutskiy @ 2013-01-17 12:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358421664.2731.228.camel@sauron.fi.intel.com>
On Thu, 2013-01-17 at 13:21 +0200, Artem Bityutskiy wrote:
> Probably this should also be outside of the driver, since it is not
> specific to this driver.
Take a look at this huge array which constantly gets updated with new
chips (see git log):
drivers/mtd/devices/m25p80.c
static const struct spi_device_id m25p_ids[]
I think this should be generalized and shared across the drivers.
--
Best Regards,
Artem Bityutskiy
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* [RFC PATCH 2/6] ARM: OMAP: USB: Add phy binding information
From: kishon @ 2013-01-17 12:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAFp+6iGEC9KgfuQz6nqnAY5JrmtPG=HkGw5yjKw7-1=8AG_=dg@mail.gmail.com>
Hi,
On Thursday 17 January 2013 05:41 PM, Vivek Gautam wrote:
> Hi Kishon,
>
>
> On Wed, Jan 16, 2013 at 8:30 PM, Kishon Vijay Abraham I <kishon@ti.com> wrote:
>> This is in preparation for the changes in PHY library to support adding
>> and getting multiple PHYs of the same type. In the new design, the
>> binding information between the PHY and the USB controller should be
>> specified in the platform specific initialization code. So it's been
>> done for OMAP platforms here.
>>
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> ---
>> This kind-of binding should be done in all the platforms (I've done only
>> for OMAP platform).
>> arch/arm/mach-omap2/usb-musb.c | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
>> index 9d27e3f..bbe2fa5 100644
>> --- a/arch/arm/mach-omap2/usb-musb.c
>> +++ b/arch/arm/mach-omap2/usb-musb.c
>> @@ -24,6 +24,7 @@
>> #include <linux/dma-mapping.h>
>> #include <linux/io.h>
>> #include <linux/usb/musb.h>
>> +#include <linux/usb/phy.h>
>>
>> #include "omap_device.h"
>> #include "soc.h"
>> @@ -85,8 +86,12 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
>> musb_plat.mode = board_data->mode;
>> musb_plat.extvbus = board_data->extvbus;
>>
>> - if (cpu_is_omap44xx())
>> + if (cpu_is_omap44xx()) {
>> musb_plat.has_mailbox = true;
>> + usb_bind_phy("musb-hdrc.0.auto", 0, "omap-usb2.1.auto");
>> + } else if (cpu_is_omap34xx()) {
>> + usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
>> + }
>
> Just trying to understand things here.
> Is the device name we are using here the platform device name (pdev->name) ?
it's pdev->dev.name.
> If i am not wrong then for devices added through device tree
> the device name would actually include the device address in the string,
Ideally for device tree, devm_usb_get_phy_by_phandle() introduced in the
5th patch of this series should be used.
usb_bind_phy should be called from platform specific initialization
files (like your board file), which won't get executed in dt boot.
> wouldn't that make things somewhat weird, since we will have to add
> such bindings
> using this address string.
>
> one more doubt please :)
> is it possible to bind phy in the controllers' driver somehow ?
Thats not going to be good. Why do you need to do that?
Thanks
Kishon
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