* [PATCH 10/10] ARM: OMAP5: Enable build and frameowrk initialisations
From: Santosh Shilimkar @ 2013-01-18 15:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358522856-12180-1-git-send-email-santosh.shilimkar@ti.com>
Include the OMAP5 data files in build. Initialise the voltage, power,
clock domains and the clock tree.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/Makefile | 6 +++++-
arch/arm/mach-omap2/io.c | 9 +++++++++
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 947cafe..5ab0b7c 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -123,6 +123,7 @@ obj-$(CONFIG_ARCH_OMAP4) += voltagedomains44xx_data.o
obj-$(CONFIG_SOC_AM33XX) += $(voltagedomain-common)
obj-$(CONFIG_SOC_AM33XX) += voltagedomains33xx_data.o
obj-$(CONFIG_SOC_OMAP5) += $(voltagedomain-common)
+obj-$(CONFIG_SOC_OMAP5) += voltagedomains54xx_data.o
# OMAP powerdomain framework
powerdomain-common += powerdomain.o powerdomain-common.o
@@ -137,6 +138,7 @@ obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o
obj-$(CONFIG_SOC_AM33XX) += $(powerdomain-common)
obj-$(CONFIG_SOC_AM33XX) += powerdomains33xx_data.o
obj-$(CONFIG_SOC_OMAP5) += $(powerdomain-common)
+obj-$(CONFIG_SOC_OMAP5) += powerdomains54xx_data.o
# PRCM clockdomain control
clockdomain-common += clockdomain.o
@@ -152,6 +154,7 @@ obj-$(CONFIG_ARCH_OMAP4) += clockdomains44xx_data.o
obj-$(CONFIG_SOC_AM33XX) += $(clockdomain-common)
obj-$(CONFIG_SOC_AM33XX) += clockdomains33xx_data.o
obj-$(CONFIG_SOC_OMAP5) += $(clockdomain-common)
+obj-$(CONFIG_SOC_OMAP5) += clockdomains54xx_data.o
# Clock framework
obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o
@@ -171,7 +174,7 @@ obj-$(CONFIG_ARCH_OMAP4) += $(clock-common) cclock44xx_data.o
obj-$(CONFIG_ARCH_OMAP4) += dpll3xxx.o dpll44xx.o
obj-$(CONFIG_SOC_AM33XX) += $(clock-common) dpll3xxx.o
obj-$(CONFIG_SOC_AM33XX) += cclock33xx_data.o
-obj-$(CONFIG_SOC_OMAP5) += $(clock-common)
+obj-$(CONFIG_SOC_OMAP5) += $(clock-common) cclock54xx_data.o
obj-$(CONFIG_SOC_OMAP5) += dpll3xxx.o dpll44xx.o
# OMAP2 clock rate set data (old "OPP" data)
@@ -194,6 +197,7 @@ obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o
obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o
obj-$(CONFIG_SOC_AM33XX) += omap_hwmod_33xx_data.o
obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o
+obj-$(CONFIG_SOC_OMAP5) += omap_hwmod_54xx_data.o
# EMU peripherals
obj-$(CONFIG_OMAP3_EMU) += emu.o
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 2c3fdd6..a1da83e 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -38,6 +38,7 @@
#include "clock2xxx.h"
#include "clock3xxx.h"
#include "clock44xx.h"
+#include "clock54xx.h"
#include "omap-pm.h"
#include "sdrc.h"
#include "control.h"
@@ -618,7 +619,15 @@ void __init omap5_init_early(void)
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap_prm_base_init();
omap_cm_base_init();
+ omap44xx_prm_init();
omap5xxx_check_revision();
+ omap54xx_voltagedomains_init();
+ omap54xx_powerdomains_init();
+ omap54xx_clockdomains_init();
+ omap54xx_hwmod_init();
+ omap_hwmod_init_postsetup();
+ omap5xxx_clk_init();
+
}
#endif
--
1.7.9.5
^ permalink raw reply related
* [PATCH 0/5] ARM: OMAP5: Misc fixes
From: Santosh Shilimkar @ 2013-01-18 15:32 UTC (permalink / raw)
To: linux-arm-kernel
Series contains few random fixes needed for OMAP5 es2.0 boot going.
There is no depedency with data files for this series and can be
applied indepedently.
Tested on OMAP5 uEVM and sEVM boards.
The following changes since commit 7d1f9aeff1ee4a20b1aeb377dd0f579fe9647619:
Linux 3.8-rc4 (2013-01-17 19:25:45 -0800)
are available in the git repository at:
git://github.com/SantoshShilimkar/linux.git for_3.9/omap5_misc_fixes
for you to fetch changes up to 4bedcaba7da88d06cde60aa595dfe57ddd8495cc:
ARM: dts: OMAP5: Specify nonsecure PPI IRQ for arch timer (2013-01-18 20:47:42 +0530)
----------------------------------------------------------------
Rajendra Nayak (1):
ARM: dts: OMAP5: Specify nonsecure PPI IRQ for arch timer
Santosh Shilimkar (4):
ARM: OMAP5: Update SOC id detection code for ES2
ARM: OMAP2+: timer: Update the OMAP5 clocksource name as per clock
data
ARM: OMAP: prm: Allow prm init to success on OMAP5 SOCs
ARM: dts: omap5-evm: Update available memory to 2032 MB
arch/arm/boot/dts/omap5-evm.dts | 2 +-
arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++----
arch/arm/mach-omap2/id.c | 16 +++++++++++++---
arch/arm/mach-omap2/prm44xx.c | 2 +-
arch/arm/mach-omap2/soc.h | 2 ++
arch/arm/mach-omap2/timer.c | 5 +++--
6 files changed, 32 insertions(+), 11 deletions(-)
--
1.7.9.5
^ permalink raw reply
* [PATCH 1/5] ARM: OMAP5: Update SOC id detection code for ES2
From: Santosh Shilimkar @ 2013-01-18 15:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358523141-12295-1-git-send-email-santosh.shilimkar@ti.com>
Update OMAP5 ES2 idcode and make ES2 as default detection.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/id.c | 16 +++++++++++++---
arch/arm/mach-omap2/soc.h | 2 ++
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 45cc7ed4..ed6f407 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -519,22 +519,32 @@ void __init omap5xxx_check_revision(void)
case 0xb942:
switch (rev) {
case 0:
- default:
omap_revision = OMAP5430_REV_ES1_0;
+ break;
+ case 1:
+ omap_revision = OMAP5430_REV_ES2_0;
+ break;
+ default:
+ omap_revision = OMAP5430_REV_ES2_0;
}
break;
case 0xb998:
switch (rev) {
case 0:
- default:
omap_revision = OMAP5432_REV_ES1_0;
+ break;
+ case 1:
+ omap_revision = OMAP5432_REV_ES2_0;
+ break;
+ default:
+ omap_revision = OMAP5432_REV_ES2_0;
}
break;
default:
/* Unknown default to latest silicon rev as default*/
- omap_revision = OMAP5430_REV_ES1_0;
+ omap_revision = OMAP5430_REV_ES2_0;
}
pr_info("OMAP%04x ES%d.0\n",
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index f31d907..4c90b3b 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -404,7 +404,9 @@ IS_OMAP_TYPE(3430, 0x3430)
#define OMAP54XX_CLASS 0x54000054
#define OMAP5430_REV_ES1_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8))
+#define OMAP5430_REV_ES2_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x20 << 8))
#define OMAP5432_REV_ES1_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8))
+#define OMAP5432_REV_ES2_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8))
void omap2xxx_check_revision(void);
void omap3xxx_check_revision(void);
--
1.7.9.5
^ permalink raw reply related
* [PATCH 2/5] ARM: OMAP2+: timer: Update the OMAP5 clocksource name as per clock data
From: Santosh Shilimkar @ 2013-01-18 15:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358523141-12295-1-git-send-email-santosh.shilimkar@ti.com>
OMAP5 clockdata has different sys clock clock node name. Fix the timer code
to take care of it.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/timer.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 691aa67..a0a1b14 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -62,6 +62,7 @@
#define OMAP2_MPU_SOURCE "sys_ck"
#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE
#define OMAP4_MPU_SOURCE "sys_clkin_ck"
+#define OMAP5_MPU_SOURCE "sys_clkin"
#define OMAP2_32K_SOURCE "func_32k_ck"
#define OMAP3_32K_SOURCE "omap_32k_fck"
#define OMAP4_32K_SOURCE "sys_32k_ck"
@@ -498,7 +499,7 @@ static void __init realtime_counter_init(void)
pr_err("%s: ioremap failed\n", __func__);
return;
}
- sys_clk = clk_get(NULL, "sys_clkin_ck");
+ sys_clk = clk_get(NULL, OMAP5_MPU_SOURCE);
if (IS_ERR(sys_clk)) {
pr_err("%s: failed to get system clock handle\n", __func__);
iounmap(base);
@@ -638,7 +639,7 @@ OMAP_SYS_TIMER(4, local);
#ifdef CONFIG_SOC_OMAP5
OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
- 2, OMAP4_MPU_SOURCE);
+ 2, OMAP5_MPU_SOURCE);
static void __init omap5_realtime_timer_init(void)
{
int err;
--
1.7.9.5
^ permalink raw reply related
* [PATCH 3/5] ARM: OMAP: prm: Allow prm init to success on OMAP5 SOCs
From: Santosh Shilimkar @ 2013-01-18 15:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358523141-12295-1-git-send-email-santosh.shilimkar@ti.com>
Allow prm init to success on OMAP5 SOCs.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/prm44xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index c05a343..1aae198 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -650,7 +650,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
int __init omap44xx_prm_init(void)
{
- if (!cpu_is_omap44xx())
+ if (!cpu_is_omap44xx() && !soc_is_omap54xx())
return 0;
return prm_register(&omap44xx_prm_ll_data);
--
1.7.9.5
^ permalink raw reply related
* [PATCH 4/5] ARM: dts: omap5-evm: Update available memory to 2032 MB
From: Santosh Shilimkar @ 2013-01-18 15:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358523141-12295-1-git-send-email-santosh.shilimkar@ti.com>
On OMAP5 to detect invalid/bad memory accesses, 16MB of DDR is used as a trap.
Hence available memory for linux OS is 2032 MB on boards popullated with 2 GB
memory.
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/boot/dts/omap5-evm.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/omap5-evm.dts b/arch/arm/boot/dts/omap5-evm.dts
index 8722c15..b0e218a 100644
--- a/arch/arm/boot/dts/omap5-evm.dts
+++ b/arch/arm/boot/dts/omap5-evm.dts
@@ -16,7 +16,7 @@
memory {
device_type = "memory";
- reg = <0x80000000 0x80000000>; /* 2 GB */
+ reg = <0x80000000 0x7F000000>; /* 2032 MB */
};
vmmcsd_fixed: fixedregulator-mmcsd {
--
1.7.9.5
^ permalink raw reply related
* [PATCH 5/5] ARM: dts: OMAP5: Specify nonsecure PPI IRQ for arch timer
From: Santosh Shilimkar @ 2013-01-18 15:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358523141-12295-1-git-send-email-santosh.shilimkar@ti.com>
From: Rajendra Nayak <rnayak@ti.com>
Specify both secure as well as nonsecure PPI IRQ for arch
timer. This fixes the following errors seen on DT OMAP5 boot..
[ 0.000000] arch_timer: No interrupt available, giving up
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 790bb2a..7a78d1b 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -35,8 +35,12 @@
compatible = "arm,cortex-a15";
timer {
compatible = "arm,armv7-timer";
- /* 14th PPI IRQ, active low level-sensitive */
- interrupts = <1 14 0x308>;
+ /*
+ * PPI secure/nonsecure IRQ,
+ * active low level-sensitive
+ */
+ interrupts = <1 13 0x308>,
+ <1 14 0x308>;
clock-frequency = <6144000>;
};
};
@@ -44,8 +48,12 @@
compatible = "arm,cortex-a15";
timer {
compatible = "arm,armv7-timer";
- /* 14th PPI IRQ, active low level-sensitive */
- interrupts = <1 14 0x308>;
+ /*
+ * PPI secure/nonsecure IRQ,
+ * active low level-sensitive
+ */
+ interrupts = <1 13 0x308>,
+ <1 14 0x308>;
clock-frequency = <6144000>;
};
};
--
1.7.9.5
^ permalink raw reply related
* [PATCH] ARM: OMAP2: Fix missing omap2xxx_clkt_vps_xxx function calls
From: Jon Hunter @ 2013-01-18 15:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.DEB.2.00.1301172320460.14118@utopia.booyaka.com>
Hi Paul,
On 01/17/2013 05:24 PM, Paul Walmsley wrote:
>
> Here's the updated version (at the bottom of this message). Seems to work
> based on a quick test on 2430SDP.
>
> # shutdown -r -n now
> shutdown: sending all processes the TERM signal...
> shutdown: sending all processes the KILL signal.
> shutdown: turning off swap
> shutdown: unmounting all file systems
> umount: /debug: not mounted
> umount: /run/shm: not mounted
> umount: /dev: not mounted
> umount: /tmp: not mounted
> umount: /run/lock: not mounted
> umount: /run: not mounted
> umount: /lib/init/rw: not found
> Please stand by while rebooting the system.
> [ 79.635925] Disabling non-boot CPUs ...
> [ 79.640197] Restarting system.
>
>
> U-Boot 1.1.4 (Mar 18 2007 - 12:22:00)
>
> OMAP2430C-GP revision 3, PRCM #5A
> TI 2430SDP 1.1 Version + mDDR (Boot NOR)
> DRAM: 128 MB
> Flash: 192 MB
> NAND:64 MB
> In: serial
> Out: serial
> Err: serial
> Hit any key to stop autoboot: 0
>
>
> ... etc. ...
>
>
> - Paul
>
>
> From: Jon Hunter <jon-hunter@ti.com>
> Date: Thu, 10 Jan 2013 14:53:29 -0600
> Subject: [PATCH] ARM: OMAP2: Fix missing omap2xxx_clkt_vps_late_init function
> calls
>
> During the migration to the common clock framework, calls to the
> functions omap2xxx_clkt_vps_late_init() were not preserved for
> OMAP2420 and OMAP2430. This causes the variables "sys_ck_rate" and
> "curr_prcm_set" to be uninitialised on boot. On reboot, this causes the
> following error message to be displayed because the appropriate MPU
> clock frequency (derived from sys_ck_rate) cannot be found.
>
> "Could not set MPU rate to 4294MHz"
>
> Fix this by adding back calls to omap2xxx_clkt_vps_late_init() in the
> OMAP2420 and OMAP2430 clock initialisation code.
>
> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
> [paul at pwsan.com: dropped the duplicated call to
> omap2xxx_clkt_vps_check_bootloader_rates() after consultation with Jon;
> updated patch description]
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> ---
> arch/arm/mach-omap2/cclock2420_data.c | 2 ++
> arch/arm/mach-omap2/cclock2430_data.c | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/arch/arm/mach-omap2/cclock2420_data.c b/arch/arm/mach-omap2/cclock2420_data.c
> index 7e5febe..ab7e952 100644
> --- a/arch/arm/mach-omap2/cclock2420_data.c
> +++ b/arch/arm/mach-omap2/cclock2420_data.c
> @@ -1935,6 +1935,8 @@ int __init omap2420_clk_init(void)
> omap2_init_clk_hw_omap_clocks(c->lk.clk);
> }
>
> + omap2xxx_clkt_vps_late_init();
> +
> omap2_clk_disable_autoidle_all();
>
> omap2_clk_enable_init_clocks(enable_init_clks,
> diff --git a/arch/arm/mach-omap2/cclock2430_data.c b/arch/arm/mach-omap2/cclock2430_data.c
> index eda079b..eb3dab6 100644
> --- a/arch/arm/mach-omap2/cclock2430_data.c
> +++ b/arch/arm/mach-omap2/cclock2430_data.c
> @@ -2050,6 +2050,8 @@ int __init omap2430_clk_init(void)
> omap2_init_clk_hw_omap_clocks(c->lk.clk);
> }
>
> + omap2xxx_clkt_vps_late_init();
> +
> omap2_clk_disable_autoidle_all();
>
> omap2_clk_enable_init_clocks(enable_init_clks,
Thanks! Looks good to me.
Jon
^ permalink raw reply
* [PATCH 5/5] ARM: dts: OMAP5: Specify nonsecure PPI IRQ for arch timer
From: Marc Zyngier @ 2013-01-18 16:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358523141-12295-6-git-send-email-santosh.shilimkar@ti.com>
On 18/01/13 15:32, Santosh Shilimkar wrote:
> From: Rajendra Nayak <rnayak@ti.com>
>
> Specify both secure as well as nonsecure PPI IRQ for arch
> timer. This fixes the following errors seen on DT OMAP5 boot..
>
> [ 0.000000] arch_timer: No interrupt available, giving up
>
> Cc: Benoit Cousson <b-cousson@ti.com>
>
> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++----
> 1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> index 790bb2a..7a78d1b 100644
> --- a/arch/arm/boot/dts/omap5.dtsi
> +++ b/arch/arm/boot/dts/omap5.dtsi
> @@ -35,8 +35,12 @@
> compatible = "arm,cortex-a15";
> timer {
> compatible = "arm,armv7-timer";
> - /* 14th PPI IRQ, active low level-sensitive */
> - interrupts = <1 14 0x308>;
> + /*
> + * PPI secure/nonsecure IRQ,
> + * active low level-sensitive
> + */
> + interrupts = <1 13 0x308>,
> + <1 14 0x308>;
Care to add the virtual and HYP timer interrupts? So KVM can get a
chance to run on this HW...
> clock-frequency = <6144000>;
> };
> };
> @@ -44,8 +48,12 @@
> compatible = "arm,cortex-a15";
> timer {
> compatible = "arm,armv7-timer";
> - /* 14th PPI IRQ, active low level-sensitive */
> - interrupts = <1 14 0x308>;
> + /*
> + * PPI secure/nonsecure IRQ,
> + * active low level-sensitive
> + */
> + interrupts = <1 13 0x308>,
> + <1 14 0x308>;
Same here.
> clock-frequency = <6144000>;
> };
> };
>
Thanks,
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply
* [PATCH] ARM: imx: Remove mach-mx51_3ds board
From: Fabio Estevam @ 2013-01-18 16:04 UTC (permalink / raw)
To: linux-arm-kernel
From: Fabio Estevam <fabio.estevam@freescale.com>
mach-mx51_3ds only supports old silicon version of MX51 and was replaced
with mx51 babbage, which is the official MX51 development board.
No need to maintain it anymore.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/configs/imx_v6_v7_defconfig | 1 -
arch/arm/mach-imx/Kconfig | 13 ---
arch/arm/mach-imx/Makefile | 1 -
arch/arm/mach-imx/mach-mx51_3ds.c | 174 ----------------------------------
4 files changed, 189 deletions(-)
delete mode 100644 arch/arm/mach-imx/mach-mx51_3ds.c
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 6966713..6dddbf8 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -32,7 +32,6 @@ CONFIG_MACH_PCM043=y
CONFIG_MACH_MX35_3DS=y
CONFIG_MACH_VPR200=y
CONFIG_MACH_IMX51_DT=y
-CONFIG_MACH_MX51_3DS=y
CONFIG_MACH_EUKREA_CPUIMX51SD=y
CONFIG_SOC_IMX53=y
CONFIG_SOC_IMX6Q=y
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 0a2349d..1c2fa8b 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -777,19 +777,6 @@ config MACH_MX51_BABBAGE
u-boot. This includes specific configurations for the board and its
peripherals.
-config MACH_MX51_3DS
- bool "Support MX51PDK (3DS)"
- select IMX_HAVE_PLATFORM_IMX2_WDT
- select IMX_HAVE_PLATFORM_IMX_KEYPAD
- select IMX_HAVE_PLATFORM_IMX_UART
- select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
- select IMX_HAVE_PLATFORM_SPI_IMX
- select MXC_DEBUG_BOARD
- select SOC_IMX51
- help
- Include support for MX51PDK (3DS) platform. This includes specific
- configurations for the board and its peripherals.
-
config MACH_EUKREA_CPUIMX51SD
bool "Support Eukrea CPUIMX51SD module"
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 0634b31..9742007 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -103,7 +103,6 @@ endif
# i.MX5 based machines
obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
-obj-$(CONFIG_MACH_MX51_3DS) += mach-mx51_3ds.o
obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o
obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd51-baseboard.o
obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o
diff --git a/arch/arm/mach-imx/mach-mx51_3ds.c b/arch/arm/mach-imx/mach-mx51_3ds.c
deleted file mode 100644
index 2d23651..0000000
--- a/arch/arm/mach-imx/mach-mx51_3ds.c
+++ /dev/null
@@ -1,174 +0,0 @@
-/*
- * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
- * Copyright (C) 2010 Jason Wang <jason77.wang@gmail.com>
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-#include <linux/irq.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <linux/gpio.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/time.h>
-
-#include "3ds_debugboard.h"
-#include "common.h"
-#include "devices-imx51.h"
-#include "hardware.h"
-#include "iomux-mx51.h"
-
-#define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28)
-
-static iomux_v3_cfg_t mx51_3ds_pads[] = {
- /* UART1 */
- MX51_PAD_UART1_RXD__UART1_RXD,
- MX51_PAD_UART1_TXD__UART1_TXD,
- MX51_PAD_UART1_RTS__UART1_RTS,
- MX51_PAD_UART1_CTS__UART1_CTS,
-
- /* UART2 */
- MX51_PAD_UART2_RXD__UART2_RXD,
- MX51_PAD_UART2_TXD__UART2_TXD,
- MX51_PAD_EIM_D25__UART2_CTS,
- MX51_PAD_EIM_D26__UART2_RTS,
-
- /* UART3 */
- MX51_PAD_UART3_RXD__UART3_RXD,
- MX51_PAD_UART3_TXD__UART3_TXD,
- MX51_PAD_EIM_D24__UART3_CTS,
- MX51_PAD_EIM_D27__UART3_RTS,
-
- /* CPLD PARENT IRQ PIN */
- MX51_PAD_GPIO1_6__GPIO1_6,
-
- /* KPP */
- MX51_PAD_KEY_ROW0__KEY_ROW0,
- MX51_PAD_KEY_ROW1__KEY_ROW1,
- MX51_PAD_KEY_ROW2__KEY_ROW2,
- MX51_PAD_KEY_ROW3__KEY_ROW3,
- MX51_PAD_KEY_COL0__KEY_COL0,
- MX51_PAD_KEY_COL1__KEY_COL1,
- MX51_PAD_KEY_COL2__KEY_COL2,
- MX51_PAD_KEY_COL3__KEY_COL3,
- MX51_PAD_KEY_COL4__KEY_COL4,
- MX51_PAD_KEY_COL5__KEY_COL5,
-
- /* eCSPI2 */
- MX51_PAD_NANDF_RB2__ECSPI2_SCLK,
- MX51_PAD_NANDF_RB3__ECSPI2_MISO,
- MX51_PAD_NANDF_D15__ECSPI2_MOSI,
- MX51_PAD_NANDF_D12__GPIO3_28,
-};
-
-/* Serial ports */
-static const struct imxuart_platform_data uart_pdata __initconst = {
- .flags = IMXUART_HAVE_RTSCTS,
-};
-
-static int mx51_3ds_board_keymap[] = {
- KEY(0, 0, KEY_1),
- KEY(0, 1, KEY_2),
- KEY(0, 2, KEY_3),
- KEY(0, 3, KEY_F1),
- KEY(0, 4, KEY_UP),
- KEY(0, 5, KEY_F2),
-
- KEY(1, 0, KEY_4),
- KEY(1, 1, KEY_5),
- KEY(1, 2, KEY_6),
- KEY(1, 3, KEY_LEFT),
- KEY(1, 4, KEY_SELECT),
- KEY(1, 5, KEY_RIGHT),
-
- KEY(2, 0, KEY_7),
- KEY(2, 1, KEY_8),
- KEY(2, 2, KEY_9),
- KEY(2, 3, KEY_F3),
- KEY(2, 4, KEY_DOWN),
- KEY(2, 5, KEY_F4),
-
- KEY(3, 0, KEY_0),
- KEY(3, 1, KEY_OK),
- KEY(3, 2, KEY_ESC),
- KEY(3, 3, KEY_ENTER),
- KEY(3, 4, KEY_MENU),
- KEY(3, 5, KEY_BACK)
-};
-
-static const struct matrix_keymap_data mx51_3ds_map_data __initconst = {
- .keymap = mx51_3ds_board_keymap,
- .keymap_size = ARRAY_SIZE(mx51_3ds_board_keymap),
-};
-
-static int mx51_3ds_spi2_cs[] = {
- MXC_SPI_CS(0),
- MX51_3DS_ECSPI2_CS,
-};
-
-static const struct spi_imx_master mx51_3ds_ecspi2_pdata __initconst = {
- .chipselect = mx51_3ds_spi2_cs,
- .num_chipselect = ARRAY_SIZE(mx51_3ds_spi2_cs),
-};
-
-static struct spi_board_info mx51_3ds_spi_nor_device[] = {
- {
- .modalias = "m25p80",
- .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
- .bus_num = 1,
- .chip_select = 1,
- .mode = SPI_MODE_0,
- .platform_data = NULL,},
-};
-
-/*
- * Board specific initialization.
- */
-static void __init mx51_3ds_init(void)
-{
- imx51_soc_init();
-
- mxc_iomux_v3_setup_multiple_pads(mx51_3ds_pads,
- ARRAY_SIZE(mx51_3ds_pads));
-
- imx51_add_imx_uart(0, &uart_pdata);
- imx51_add_imx_uart(1, &uart_pdata);
- imx51_add_imx_uart(2, &uart_pdata);
-
- imx51_add_ecspi(1, &mx51_3ds_ecspi2_pdata);
- spi_register_board_info(mx51_3ds_spi_nor_device,
- ARRAY_SIZE(mx51_3ds_spi_nor_device));
-
- if (mxc_expio_init(MX51_CS5_BASE_ADDR, IMX_GPIO_NR(1, 6)))
- printk(KERN_WARNING "Init of the debugboard failed, all "
- "devices on the board are unusable.\n");
-
- imx51_add_sdhci_esdhc_imx(0, NULL);
- imx51_add_imx_keypad(&mx51_3ds_map_data);
- imx51_add_imx2_wdt(0);
-}
-
-static void __init mx51_3ds_timer_init(void)
-{
- mx51_clocks_init(32768, 24000000, 22579200, 0);
-}
-
-MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board")
- /* Maintainer: Freescale Semiconductor, Inc. */
- .atag_offset = 0x100,
- .map_io = mx51_map_io,
- .init_early = imx51_init_early,
- .init_irq = mx51_init_irq,
- .handle_irq = imx51_handle_irq,
- .init_time = mx51_3ds_timer_init,
- .init_machine = mx51_3ds_init,
- .init_late = imx51_init_late,
- .restart = mxc_restart,
-MACHINE_END
--
1.7.9.5
^ permalink raw reply related
* [PATCH] clk: Deduplicate exit code in clk_set_rate
From: Nestor Ovroy @ 2013-01-18 16:07 UTC (permalink / raw)
To: linux-arm-kernel
On non-out case 'return ret;' is equivalent to 'return 0;' as the ret
variable is initialized at 0 and never changed.
Signed-off-by: Nestor Ovroy <novroy@riseup.net>
---
drivers/clk/clk.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 251e45d..0e21d7a 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -948,13 +948,10 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
}
/* change the rates */
clk_change_rate(top);
- mutex_unlock(&prepare_lock);
-
- return 0;
out:
mutex_unlock(&prepare_lock);
return ret;
}
--
1.7.10.4
^ permalink raw reply related
* [PATCH] Documentation at91-pinctrl: fix typo and add some details
From: Richard Genoud @ 2013-01-18 16:38 UTC (permalink / raw)
To: linux-arm-kernel
The relation between PIN_BANK numbers and pio letters wasn't made very
clear.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
index 3a26812..bc50899 100644
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
@@ -81,7 +81,8 @@ PA31 TXD4
Required properties for pin configuration node:
- atmel,pins: 4 integers array, represents a group of pins mux and config
setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
- The PERIPH 0 means gpio.
+ The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
+ PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
Bits used for CONFIG:
PULL_UP (1 << 0): indicate this pin need a pull up.
@@ -126,7 +127,7 @@ pinctrl@fffff400 {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<1 14 0x1 0x0 /* PB14 periph A */
- 1 15 0x1 0x1>; /* PB15 periph with pullup */
+ 1 15 0x1 0x1>; /* PB15 periph A with pullup */
};
};
};
--
1.7.2.5
^ permalink raw reply related
* [PATCH] at91sam9x5 DTS: correct wrong PIO BANK values on u(s)arts
From: Richard Genoud @ 2013-01-18 16:41 UTC (permalink / raw)
To: linux-arm-kernel
The PIN_BANK 3 is for PDxx pins, not PCxx pins.
And PIN_BANK 1 is for PBxx, not PIN_BANK 0.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
---
arch/arm/boot/dts/at91sam9x5.dtsi | 24 ++++++++++++------------
1 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 8148bd9..80cd9ad 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -159,12 +159,12 @@
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
- <3 27 0x3 0x0>; /* PC27 periph C */
+ <2 27 0x3 0x0>; /* PC27 periph C */
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
- <3 28 0x3 0x0>; /* PC28 periph C */
+ <2 28 0x3 0x0>; /* PC28 periph C */
};
};
@@ -177,46 +177,46 @@
pinctrl_uart2_rts: uart2_rts-0 {
atmel,pins =
- <0 0 0x2 0x0>; /* PB0 periph B */
+ <1 0 0x2 0x0>; /* PB0 periph B */
};
pinctrl_uart2_cts: uart2_cts-0 {
atmel,pins =
- <0 1 0x2 0x0>; /* PB1 periph B */
+ <1 1 0x2 0x0>; /* PB1 periph B */
};
};
usart3 {
pinctrl_uart3: usart3-0 {
atmel,pins =
- <3 23 0x2 0x1 /* PC22 periph B with pullup */
- 3 23 0x2 0x0>; /* PC23 periph B */
+ <2 23 0x2 0x1 /* PC22 periph B with pullup */
+ 2 23 0x2 0x0>; /* PC23 periph B */
};
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
- <3 24 0x2 0x0>; /* PC24 periph B */
+ <2 24 0x2 0x0>; /* PC24 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
- <3 25 0x2 0x0>; /* PC25 periph B */
+ <2 25 0x2 0x0>; /* PC25 periph B */
};
};
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
- <3 8 0x3 0x0 /* PC8 periph C */
- 3 9 0x3 0x1>; /* PC9 periph C with pullup */
+ <2 8 0x3 0x0 /* PC8 periph C */
+ 2 9 0x3 0x1>; /* PC9 periph C with pullup */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
- <3 16 0x3 0x0 /* PC16 periph C */
- 3 17 0x3 0x1>; /* PC17 periph C with pullup */
+ <2 16 0x3 0x0 /* PC16 periph C */
+ 2 17 0x3 0x1>; /* PC17 periph C with pullup */
};
};
--
1.7.2.5
^ permalink raw reply related
* [PATCH] at91sam9x5 DTS: add SCK USART pins
From: Richard Genoud @ 2013-01-18 16:42 UTC (permalink / raw)
To: linux-arm-kernel
The SCK pins where missing in usarts pinctrl.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
---
arch/arm/boot/dts/at91sam9x5.dtsi | 20 ++++++++++++++++++++
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 80cd9ad..4c8ed08 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -148,6 +148,11 @@
atmel,pins =
<0 3 0x1 0x0>; /* PA3 periph A */
};
+
+ pinctrl_usart0_sck: usart0_sck-0 {
+ atmel,pins =
+ <0 4 0x1 0x0>; /* PA4 periph A */
+ };
};
usart1 {
@@ -166,6 +171,11 @@
atmel,pins =
<2 28 0x3 0x0>; /* PC28 periph C */
};
+
+ pinctrl_usart1_sck: usart1_sck-0 {
+ atmel,pins =
+ <2 28 0x3 0x0>; /* PC29 periph C */
+ };
};
usart2 {
@@ -184,6 +194,11 @@
atmel,pins =
<1 1 0x2 0x0>; /* PB1 periph B */
};
+
+ pinctrl_usart2_sck: usart2_sck-0 {
+ atmel,pins =
+ <1 2 0x2 0x0>; /* PB2 periph B */
+ };
};
usart3 {
@@ -202,6 +217,11 @@
atmel,pins =
<2 25 0x2 0x0>; /* PC25 periph B */
};
+
+ pinctrl_usart3_sck: usart3_sck-0 {
+ atmel,pins =
+ <2 26 0x2 0x0>; /* PC26 periph B */
+ };
};
uart0 {
--
1.7.2.5
^ permalink raw reply related
* [PATCH] ARM: tegra: DTS: whistler: enable keyboard
From: Stephen Warren @ 2013-01-18 16:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358488723-23184-1-git-send-email-ldewangan@nvidia.com>
On 01/17/2013 10:58 PM, Laxman Dewangan wrote:
> Enable tegra based keyboard controller and populate the key mapping
> for whistler.
>
> With this patch, HOME, BACK, POWER and MENU keys will work.
> Still other keys which are in ROW3 and ROW4 will not work as it
> conflicts with KBC pins on SDIO2 pinmux.
Thanks, applied to Tegra's for-3.9/dt branch.
^ permalink raw reply
* [PATCH 1/1] ARM: Add API to detect SCU base address from CP15
From: Stephen Warren @ 2013-01-18 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358506755-13705-1-git-send-email-hdoyu@nvidia.com>
On 01/18/2013 03:59 AM, Hiroshi Doyu wrote:
> Add API to detect SCU base address from CP15.
So this patch appears to be a dependency for the Tegra114 series from
Hiroshi. As such, I need to get it into the Tegra tree somehow.
What I'd like to propose is that I put this one patch in a topic branch
based on v3.8-rcN, send a pull request to arm-soc containing that
branch, and then merge the branch into the Tegra tree. This will allow
anyone else to use the patch in code destined for 3.9.
Or, if nobody else wants to use this function, I could just apply it
directly to the Tegra tree.
But either way, I'd need an ack from a core ARM maintainer in order to
apply this (well, v2 once it's posted).
^ permalink raw reply
* [PATCH 5/5] ARM: dts: OMAP5: Specify nonsecure PPI IRQ for arch timer
From: Santosh Shilimkar @ 2013-01-18 17:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F97207.1030706@arm.com>
On Friday 18 January 2013 09:32 PM, Marc Zyngier wrote:
> On 18/01/13 15:32, Santosh Shilimkar wrote:
>> From: Rajendra Nayak <rnayak@ti.com>
>>
>> Specify both secure as well as nonsecure PPI IRQ for arch
>> timer. This fixes the following errors seen on DT OMAP5 boot..
>>
>> [ 0.000000] arch_timer: No interrupt available, giving up
>>
>> Cc: Benoit Cousson <b-cousson@ti.com>
>>
>> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
>> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
>> ---
>> arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++----
>> 1 file changed, 12 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>> index 790bb2a..7a78d1b 100644
>> --- a/arch/arm/boot/dts/omap5.dtsi
>> +++ b/arch/arm/boot/dts/omap5.dtsi
>> @@ -35,8 +35,12 @@
>> compatible = "arm,cortex-a15";
>> timer {
>> compatible = "arm,armv7-timer";
>> - /* 14th PPI IRQ, active low level-sensitive */
>> - interrupts = <1 14 0x308>;
>> + /*
>> + * PPI secure/nonsecure IRQ,
>> + * active low level-sensitive
>> + */
>> + interrupts = <1 13 0x308>,
>> + <1 14 0x308>;
>
> Care to add the virtual and HYP timer interrupts? So KVM can get a
> chance to run on this HW...
>
Thanks Marc for spotting it. Will take care of it.
Regards
Santosh
^ permalink raw reply
* [PATCH 5/5] ARM: dts: OMAP5: Specify nonsecure PPI IRQ for arch timer
From: Marc Zyngier @ 2013-01-18 17:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F97FA4.9010608@ti.com>
On 18/01/13 17:00, Santosh Shilimkar wrote:
> On Friday 18 January 2013 09:32 PM, Marc Zyngier wrote:
>> On 18/01/13 15:32, Santosh Shilimkar wrote:
>>> From: Rajendra Nayak <rnayak@ti.com>
>>>
>>> Specify both secure as well as nonsecure PPI IRQ for arch
>>> timer. This fixes the following errors seen on DT OMAP5 boot..
>>>
>>> [ 0.000000] arch_timer: No interrupt available, giving up
>>>
>>> Cc: Benoit Cousson <b-cousson@ti.com>
>>>
>>> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
>>> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
>>> ---
>>> arch/arm/boot/dts/omap5.dtsi | 16 ++++++++++++----
>>> 1 file changed, 12 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>>> index 790bb2a..7a78d1b 100644
>>> --- a/arch/arm/boot/dts/omap5.dtsi
>>> +++ b/arch/arm/boot/dts/omap5.dtsi
>>> @@ -35,8 +35,12 @@
>>> compatible = "arm,cortex-a15";
>>> timer {
>>> compatible = "arm,armv7-timer";
>>> - /* 14th PPI IRQ, active low level-sensitive */
>>> - interrupts = <1 14 0x308>;
>>> + /*
>>> + * PPI secure/nonsecure IRQ,
>>> + * active low level-sensitive
>>> + */
>>> + interrupts = <1 13 0x308>,
>>> + <1 14 0x308>;
>>
>> Care to add the virtual and HYP timer interrupts? So KVM can get a
>> chance to run on this HW...
>>
> Thanks Marc for spotting it. Will take care of it.
I just realised something silly... You have one timer node *per cpu*,
and this is not really expected.
The driver really wants one single node. See
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts for an example.
Oh, and your GIC node could do with some updating too (no VGIC regs or
interrupt).
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply
* [PATCH 08/10] ARM: OMAP5: hwmod data: Create initial OMAP5 SOC hwmod data
From: Tony Lindgren @ 2013-01-18 17:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358522856-12180-9-git-send-email-santosh.shilimkar@ti.com>
Hi,
* Santosh Shilimkar <santosh.shilimkar@ti.com> [130118 07:30]:
> From: Benoit Cousson <b-cousson@ti.com>
>
> Adding the hwmod data for OMAP54xx platforms.
> --- /dev/null
> +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
> +/* bb2d */
> +static struct omap_hwmod_irq_info omap54xx_bb2d_irqs[] = {
> + { .irq = 125 + OMAP54XX_IRQ_GIC_START },
> + { .irq = -1 }
> +};
...
> +/* c2c */
> +static struct omap_hwmod_irq_info omap54xx_c2c_irqs[] = {
> + { .irq = 88 + OMAP54XX_IRQ_GIC_START },
> + { .irq = -1 }
> +};
...
> +static struct omap_hwmod_dma_info omap54xx_c2c_sdma_reqs[] = {
> + { .dma_req = 68 + OMAP54XX_DMA_REQ_START },
> + { .dma_req = -1 }
> +};
> +static struct omap_hwmod_addr_space omap54xx_elm_addrs[] = {
> + {
> + .pa_start = 0x48078000,
> + .pa_end = 0x48078fff,
> + .flags = ADDR_TYPE_RT
> + },
> + { }
> +};
...
> +static struct omap_hwmod_addr_space omap54xx_emif1_addrs[] = {
> + {
> + .pa_start = 0x4c000000,
> + .pa_end = 0x4c0003ff,
> + .flags = ADDR_TYPE_RT
> + },
> + { }
> +};
As discussed earlier on this list, let's not duplicate the standard
resources here as they already are supposed to come from device tree.
Whatever issues prevent us from dropping the duplicate data here need
to be fixed. I believe Benoit already had some scripts/patches for
that and was just waiting for the DMA binding to get merged?
Regards,
Tony
^ permalink raw reply
* [GIT PULL] clockevents: decouple broadcast mechanism from drivers
From: Mark Rutland @ 2013-01-18 17:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130117172910.GA10070@e106331-lin.cambridge.arm.com>
Hello,
As has been pointed out elsewhere, in my haste to fix this up I made a
typo in the first patch, preventing it from building.
Apologies for the confusion. I've created a new branch with a corrected
and tested version. Please see the pull request below.
Thanks,
Mark.
The following changes since commit 9931faca02c604c22335f5a935a501bb2ace6e20:
Linux 3.8-rc3 (2013-01-09 18:59:55 -0800)
are available in the git repository at:
git://linux-arm.org/linux-mr.git for-tglx/timer-broadcast-v2
for you to fetch changes up to 041d14f475c4436d9fb9a7c94842154c42fd1b65:
clockevents: Add generic timer broadcast function (2013-01-18 17:07:36 +0000)
----------------------------------------------------------------
Mark Rutland (2):
clockevents: Add generic timer broadcast receiver
clockevents: Add generic timer broadcast function
include/linux/clockchips.h | 9 +++++++++
kernel/time/Kconfig | 4 ++++
kernel/time/tick-broadcast.c | 28 ++++++++++++++++++++++++++++
3 files changed, 41 insertions(+)
^ permalink raw reply
* [PATCH 07/10] ARM: OMAP5: clock data: Add OMAP54XX full clock tree and headers
From: Tony Lindgren @ 2013-01-18 17:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358522856-12180-8-git-send-email-santosh.shilimkar@ti.com>
* Santosh Shilimkar <santosh.shilimkar@ti.com> [130118 07:30]:
> From: Rajendra Nayak <rnayak@ti.com>
>
> Add the clock tree related data for OMAP54xx platforms.
>
> Cc: Paul Walmsley <paul@pwsan.com>
>
> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
> [santosh.shilimkar at ti.com: Generated es2.0 data]
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> As mentioned in the summary, this patch will be updated once the
> movement of clock data to drivers/clock is clear.
Yes let's first fix up the issues prevent us from moving all the
cclock*_data.c files to live under drivers/clock/omap.
It seems that fixing this issue boils down to rearranging some
clock related headers in arch/arm/mach-omap2, and then populating
some of the clock data dynamically. Or am I missing something?
Regards,
Tony
^ permalink raw reply
* [[PATCH v2]] OMAP: omap4-panda: add WiLink shared transport power functions
From: Tony Lindgren @ 2013-01-18 17:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358499533.6252.80.camel@cumari.coelho.fi>
* Luciano Coelho <coelho@ti.com> [130118 01:03]:
> On Thu, 2013-01-17 at 15:16 -0800, Tony Lindgren wrote:
> > * Luciano Coelho <coelho@ti.com> [130117 10:04]:
> > > But this patch is pretty small and simple, so why not include it to at
> > > least fix the breakage in 3.7 and 3.8? Whether you take it or not now
> > > won't make any difference in the 5k LOC in these kernel versions.
> >
> > Well we are planning to drop the non-DT support for omap4 as soon as it's
> > usable with DT. For omap4 we are only carrying SDP and panda support to
> > make this transition easier. The only bindings missing AFAIK are wl12xx and
> > USB.
>
> In my view this is a regression and it should be fixed with as simple a
> patch as possible. The alternative to my solution is to revert the
> patch that removed the enable/disable from the ti-st driver *and* fix
> u-boot, because if it doesn't mux the UART2 pins properly (and it
> doesn't) the shared transport still won't work.
Fixing the muxing here makes sense naturally as we cannot do that in the driver
until we've flipped things over to use DT.
But I don't think we should fix the driver regression by adding more platform
callbacks as we are getting rid of them anyways.
> > If we add this, then it implies we're somehow supporting it, which is not
> > the way to go IMHO as we need to get rid of these platform callbacks instead.
>
> It's a regression fix, not a new feature. I also think these callbacks
> are silly, but it's the quickest solution I found for 3.7 and 3.8.
Right, so how about let's fix the regression in the driver, and add the
muxing to platform init code?
> > What's your estimate of having minimal wl12xx WLAN DT binding available?
>
> To tell you the truth, I haven't even started looking into DT for wl12xx
> myself. So I have no idea when it will be ready. Benoit has been
> looking into it, but I don't know how far he is.
If it's going to take long we should just init the platform data for
it temporarily even in the DT boot case until the binding is available.
Regards,
Tony
^ permalink raw reply
* [[PATCH v2]] OMAP: omap4-panda: add WiLink shared transport power functions
From: Tony Lindgren @ 2013-01-18 17:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F91FE2.3020402@ti.com>
* Peter Ujfalusi <peter.ujfalusi@ti.com> [130118 02:15]:
> Hi Tony,
>
> On 01/18/2013 12:16 AM, Tony Lindgren wrote:
> > Well we are planning to drop the non-DT support for omap4 as soon as it's
> > usable with DT.
>
> Exactly, but right now we do have legacy and legacy should work in order to
> help for example Luca to make the final push which allows us to move to DT
> only for OMAP4.
Yeah I'm suggesting we should do the muxing in the platform code and fix the
regression in the driver. But not add the new platform callbacks.
> > For omap4 we are only carrying SDP and panda support to
> > make this transition easier. The only bindings missing AFAIK are wl12xx and
> > USB.
> >
> > If we add this, then it implies we're somehow supporting it, which is not
> > the way to go IMHO as we need to get rid of these platform callbacks instead.
>
> IMHO we should keep these boards working as long as we have the legacy board
> support for them.
Naturally. We cannot flip over to DT only boot until we have usable system :)
And to me "usable system" means being able to use my pandaboard es with a lapdock
for work things.
Currently it seems that we need the following working with DT to have panda
and blaze usable:
1. MMC (done)
2. USB (patches pending for EHCI and MUSB)
3. Ethernet (done for blaze, needs USB for panda)
4. DSS (various drivers pending, probably still needs some platform init code)
5. WLAN (no binding, needs platform init until done)
6. Audio (done?)
The DMA binding is still pending, but these devices should also work without it
until we have the binding. And various miscellaneous drivers we can init with
the platform code until the bindings are done.
> So what is the policy now regarding to 'old' legacy but still used OMAP4 board
> files? I think we should still maintain them, but the effort to get rid of
> them should be the highest priority.
Yes only minimal fixes. We should not add any new features to them as that will
just complicate the conversion to DT. Once we have a usable system booting with DT,
we can ust drop the old omap4 board-*.c files.
Regards,
Tony
^ permalink raw reply
* [[PATCH v2]] OMAP: omap4-panda: add WiLink shared transport power functions
From: Felipe Balbi @ 2013-01-18 17:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130118173635.GE15361@atomide.com>
Hi,
On Fri, Jan 18, 2013 at 09:36:35AM -0800, Tony Lindgren wrote:
> * Luciano Coelho <coelho@ti.com> [130118 01:03]:
> > On Thu, 2013-01-17 at 15:16 -0800, Tony Lindgren wrote:
> > > * Luciano Coelho <coelho@ti.com> [130117 10:04]:
> > > > But this patch is pretty small and simple, so why not include it to at
> > > > least fix the breakage in 3.7 and 3.8? Whether you take it or not now
> > > > won't make any difference in the 5k LOC in these kernel versions.
> > >
> > > Well we are planning to drop the non-DT support for omap4 as soon as it's
> > > usable with DT. For omap4 we are only carrying SDP and panda support to
> > > make this transition easier. The only bindings missing AFAIK are wl12xx and
> > > USB.
> >
> > In my view this is a regression and it should be fixed with as simple a
> > patch as possible. The alternative to my solution is to revert the
> > patch that removed the enable/disable from the ti-st driver *and* fix
> > u-boot, because if it doesn't mux the UART2 pins properly (and it
> > doesn't) the shared transport still won't work.
>
> Fixing the muxing here makes sense naturally as we cannot do that in the driver
> until we've flipped things over to use DT.
>
> But I don't think we should fix the driver regression by adding more platform
> callbacks as we are getting rid of them anyways.
it's not adding more callbacks, solely implementing them as it should
have been done on Pavan's original patch.
> > > What's your estimate of having minimal wl12xx WLAN DT binding available?
> >
> > To tell you the truth, I haven't even started looking into DT for wl12xx
> > myself. So I have no idea when it will be ready. Benoit has been
> > looking into it, but I don't know how far he is.
>
> If it's going to take long we should just init the platform data for
> it temporarily even in the DT boot case until the binding is available.
which will boil down to having those platform_data callbacks to have it
at least functional. How will Luca test DT conversion if ti-st isn't
even functional ?
--
balbi
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20130118/5dbd12a2/attachment-0001.sig>
^ permalink raw reply
* [PATCH 4/7] clk: highbank: Use common of_clk_init() function
From: Mike Turquette @ 2013-01-18 17:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1357282858-2112-4-git-send-email-pgaikwad@nvidia.com>
Quoting Prashant Gaikwad (2013-01-03 23:00:55)
> Use common of_clk_init() function for clocks initialization.
>
> Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Rob,
Can I get a Tested-by from you before I take this?
Thanks,
Mike
> ---
> arch/arm/mach-highbank/core.h | 1 -
> arch/arm/mach-highbank/highbank.c | 3 ++-
> drivers/clk/clk-highbank.c | 18 ++++--------------
> 3 files changed, 6 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h
> index 80235b4..3f65206 100644
> --- a/arch/arm/mach-highbank/core.h
> +++ b/arch/arm/mach-highbank/core.h
> @@ -2,7 +2,6 @@
> #define __HIGHBANK_CORE_H
>
> extern void highbank_set_cpu_jump(int cpu, void *jump_addr);
> -extern void highbank_clocks_init(void);
> extern void highbank_restart(char, const char *);
> extern void __iomem *scu_base_addr;
>
> diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
> index f6ca285..fb148da 100644
> --- a/arch/arm/mach-highbank/highbank.c
> +++ b/arch/arm/mach-highbank/highbank.c
> @@ -25,6 +25,7 @@
> #include <linux/of_address.h>
> #include <linux/smp.h>
> #include <linux/amba/bus.h>
> +#include <linux/clk-provider.h>
>
> #include <asm/arch_timer.h>
> #include <asm/cacheflush.h>
> @@ -116,7 +117,7 @@ static void __init highbank_timer_init(void)
> WARN_ON(!timer_base);
> irq = irq_of_parse_and_map(np, 0);
>
> - highbank_clocks_init();
> + of_clk_init(NULL);
> lookup.clk = of_clk_get(np, 0);
> clkdev_add(&lookup);
>
> diff --git a/drivers/clk/clk-highbank.c b/drivers/clk/clk-highbank.c
> index 52fecad..5d1de2e 100644
> --- a/drivers/clk/clk-highbank.c
> +++ b/drivers/clk/clk-highbank.c
> @@ -314,33 +314,23 @@ static void __init hb_pll_init(struct device_node *node)
> {
> hb_clk_init(node, &clk_pll_ops);
> }
> +CLK_OF_DECLARE(hb_pll, "calxeda,hb-pll-clock", hb_pll_init);
>
> static void __init hb_a9periph_init(struct device_node *node)
> {
> hb_clk_init(node, &a9periphclk_ops);
> }
> +CLK_OF_DECLARE(hb_a9periph, "calxeda,hb-a9periph-clock", hb_a9periph_init);
>
> static void __init hb_a9bus_init(struct device_node *node)
> {
> struct clk *clk = hb_clk_init(node, &a9bclk_ops);
> clk_prepare_enable(clk);
> }
> +CLK_OF_DECLARE(hb_a9bus, "calxeda,hb-a9bus-clock", hb_a9bus_init);
>
> static void __init hb_emmc_init(struct device_node *node)
> {
> hb_clk_init(node, &periclk_ops);
> }
> -
> -static const __initconst struct of_device_id clk_match[] = {
> - { .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
> - { .compatible = "calxeda,hb-pll-clock", .data = hb_pll_init, },
> - { .compatible = "calxeda,hb-a9periph-clock", .data = hb_a9periph_init, },
> - { .compatible = "calxeda,hb-a9bus-clock", .data = hb_a9bus_init, },
> - { .compatible = "calxeda,hb-emmc-clock", .data = hb_emmc_init, },
> - {}
> -};
> -
> -void __init highbank_clocks_init(void)
> -{
> - of_clk_init(clk_match);
> -}
> +CLK_OF_DECLARE(hb_emmc, "calxeda,hb-emmc-clock", hb_emmc_init);
> --
> 1.7.4.1
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox