* [PATCH] power: reset: qnap-poweroff: Fix License String
From: Uwe Kleine-König @ 2013-01-21 8:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130120204728.GA16339@lizard.gateway.2wire.net>
Hello Anton,
On Sun, Jan 20, 2013 at 12:47:29PM -0800, Anton Vorontsov wrote:
> On Sun, Jan 20, 2013 at 09:13:36PM +0100, Uwe Kleine-K?nig wrote:
> > On Tue, Jan 08, 2013 at 07:15:26PM +0100, Andrew Lunn wrote:
> > > GPLv2+ is not a valid license string. Replace it with one that is.
> > >
> > > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> > > ---
> > > drivers/power/reset/qnap-poweroff.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/power/reset/qnap-poweroff.c b/drivers/power/reset/qnap-poweroff.c
> > > index ca0b476..8af772b 100644
> > > --- a/drivers/power/reset/qnap-poweroff.c
> > > +++ b/drivers/power/reset/qnap-poweroff.c
> > > @@ -121,4 +121,4 @@ module_platform_driver(qnap_power_off_driver);
> > >
> > > MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch>");
> > > MODULE_DESCRIPTION("QNAP Power off driver");
> > > -MODULE_LICENSE("GPLv2+");
> > > +MODULE_LICENSE("GPL v2");
> > This change is wrong.
> >
> > According to include/linux/module.h "GPL v2" means exactly that: version
> > 2. As the file specifies v2 or later in the header you have to use "GPL"
> > which means v2 or later.
>
> Does it even make sense to have the two separate things ("GPL v2" and
> "GPL")?
Yeah. If you had another OS project that uses GPL-4 you can just copy
over a GPL-2+ driver to it, not an GPL-2 driver. So assuming the kernel
will stay at GPL-2 forever it doesn't make any difference for the
kernel. But other projects might benefit. (And if in the future someone
might want to change the kernel to GPL-4, she only needs to contact the
GPL-2 authors and can legally change GPL-2+ to GPL-4+.)
> Suppose there is a global change that modifies a bunch of drivers, some of
> them are GPLv2+. Now, the author of the global change is submitting it
> under "GPL v2 only" license, which, by definition, turns any GPLv2+ code
> into "GPL v2 only", right?
See http://yarchive.net/comp/linux/dual_license_bsd_gpl.html for Linus'
POV. It's an old mail, but I think it still applies.
> So, changing from GPLv2+ to "GPL v2 only" is OK, but not the other way
> around.
OK as in (probably) legal. OK as in fair is questionable.
> IANAL, tho.
ditto.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [PATCH V4] Add apf51 basic support
From: Shawn Guo @ 2013-01-21 7:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358722529-19982-1-git-send-email-laurent.cans@gmail.com>
On Sun, Jan 20, 2013 at 11:55:29PM +0100, Laurent Cans wrote:
> Signed-off-by: Laurent Cans <laurent.cans@gmail.com>
> Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
> ---
> Differences between v3 and v4
> - introduce new file in Documentation directory
> - remove useless property in clock node
Added the prefix "ARM: dts: " for subject and applied the patch.
BTW, empty commit log is nice. Please avoid in the future.
Shawn
^ permalink raw reply
* [v2 1/1] ARM: Add API to detect SCU base address from CP15
From: Hiroshi Doyu @ 2013-01-21 7:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F97E19.8070607@wwwdotorg.org>
Add API to detect SCU base address from CP15.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
For usage: http://patchwork.ozlabs.org/patch/212013/
---
arch/arm/include/asm/smp_scu.h | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/include/asm/smp_scu.h b/arch/arm/include/asm/smp_scu.h
index 4eb6d00..1733ec7 100644
--- a/arch/arm/include/asm/smp_scu.h
+++ b/arch/arm/include/asm/smp_scu.h
@@ -6,6 +6,18 @@
#define SCU_PM_POWEROFF 3
#ifndef __ASSEMBLER__
+
+#include <asm/cputype.h>
+
+static inline phys_addr_t scu_get_base(void)
+{
+ if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9) {
+ phys_addr_t pa;
+ asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (pa));
+ return pa;
+ }
+ return 0;
+}
unsigned int scu_get_core_count(void __iomem *);
void scu_enable(void __iomem *);
int scu_power_mode(void __iomem *, unsigned int);
--
1.7.9.5
^ permalink raw reply related
* [PATCH v3] sdma-imx: Add SDMA firmware for Freescale i.MX SOCs
From: Shawn Guo @ 2013-01-21 7:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKGA1b=4o58nMP5ez6V1d20vFXbYx3Lqq2YDcXGgnOGBy4OTzw@mail.gmail.com>
On Fri, Jan 18, 2013 at 01:13:14PM -0600, Matt Sealey wrote:
> > imx/sdma/sdma-imx25.bin | Bin 0 -> 694 bytes
> > imx/sdma/sdma-imx31.bin | Bin 0 -> 3762 bytes
> > imx/sdma/sdma-imx35.bin | Bin 0 -> 1746 bytes
> > imx/sdma/sdma-imx51.bin | Bin 0 -> 1894 bytes
> > imx/sdma/sdma-imx53.bin | Bin 0 -> 1406 bytes
> > imx/sdma/sdma-imx6q.bin | Bin 0 -> 1838 bytes
>
> Hi Fabio,
>
> You are an absolute star; but I would suggest only that sdma-imx6q.bin
> is misnamed here, since this firmware works on *all* i.MX6 models
> (Quad, Dual, DualLite, Solo, SoloLite) and not just q for Quad.. is
> there any reason why it would have to have this very
> SoC-variant-specific naming convention if we also dropped support for
> naming tapeouts for each chip?
>
SoC-variant-specific naming convention is widely used in device tree
binding for versioning. I would say in this case that all other i.MX6
models' SDMA firmware is completely compatible with imx6q's.
Shawn
^ permalink raw reply
* [RFC v2 12/18] ARM: OMAP2+: timer: Add suspend-resume callbacks for clockevent device
From: Bedia, Vaibhav @ 2013-01-21 7:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F8DCD7.707@ti.com>
On Fri, Jan 18, 2013 at 10:55:43, Shilimkar, Santosh wrote:
> On Friday 18 January 2013 12:15 AM, Jon Hunter wrote:
> >
> > On 01/10/2013 10:37 PM, Bedia, Vaibhav wrote:
> >> On Tue, Jan 08, 2013 at 20:45:10, Shilimkar, Santosh wrote:
> >>> On Monday 31 December 2012 06:37 PM, Vaibhav Bedia wrote:
> >>>> The current OMAP timer code registers two timers -
> >>>> one as clocksource and one as clockevent.
> >>>> AM33XX has only one usable timer in the WKUP domain
> >>>> so one of the timers needs suspend-resume support
> >>>> to restore the configuration to pre-suspend state.
> >>>>
> >>>> commit adc78e6 (timekeeping: Add suspend and resume
> >>>> of clock event devices) introduced .suspend and .resume
> >>>> callbacks for clock event devices. Leverages these
> >>>> callbacks to have AM33XX clockevent timer which is
> >>>> in not in WKUP domain to behave properly across system
> >>>> suspend.
> >>>>
> >>>> Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
> >>>> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> >>>> Cc: Benoit Cousson <b-cousson@ti.com>
> >>>> Cc: Paul Walmsley <paul@pwsan.com>
> >>>> Cc: Kevin Hilman <khilman@deeprootsystems.com>
> >>>> Cc: Vaibhav Hiremath <hvaibhav@ti.com>
> >>>> Cc: Jon Hunter <jon-hunter@ti.com>
> >>>> ---
> >>>> v1->v2:
> >>>> Get rid of harcoded timer id.
> >>>> Note: since a platform device is not created for these timer
> >>>> instances and because there's very minimal change needed for
> >>>> restarting the timer a full blown context save and restore
> >>>> has been skipped.
> >>>>
> >>>> arch/arm/mach-omap2/timer.c | 33 +++++++++++++++++++++++++++++++++
> >>>> 1 files changed, 33 insertions(+), 0 deletions(-)
> >>>>
> >>>> diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
> >>>> index 691aa67..38f9cbc 100644
> >>>> --- a/arch/arm/mach-omap2/timer.c
> >>>> +++ b/arch/arm/mach-omap2/timer.c
> >>>> @@ -128,6 +128,36 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
> >>>> }
> >>>> }
> >>>>
> >>>> +static void omap_clkevt_suspend(struct clock_event_device *unused)
> >>>> +{
> >>>> + char name[10];
> >>>> + struct omap_hwmod *oh;
> >>>> +
> >>>> + sprintf(name, "timer%d", clkev.id);
> >>>> + oh = omap_hwmod_lookup(name);
> >>>> + if (!oh)
> >>>> + return;
> >>>> +
> >>>> + __omap_dm_timer_stop(&clkev, 1, clkev.rate);
> >>>> + omap_hwmod_idle(oh);
> >>>> +}
> >>>> +
> >>>> +static void omap_clkevt_resume(struct clock_event_device *unused)
> >>>> +{
> >>>> + char name[10];
> >>>> + struct omap_hwmod *oh;
> >>>> +
> >>>> + sprintf(name, "timer%d", clkev.id);
> >>>> + oh = omap_hwmod_lookup(name);
> >>>> + if (!oh)
> >>>> + return;
> >>>> +
> >>>> + omap_hwmod_enable(oh);
> >>>> + __omap_dm_timer_load_start(&clkev,
> >>>> + OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
> >>>> + __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
> >>>> +}
> >>>> +
> >>> Am still bit uncomfortable with direct hwmod usage in the suspend/resmue
> >>> hooks.
> >>>
> >>> Jon, Any alternatives you can think of ?
> >>>
> >>
> >> Jon,
> >>
> >> Any suggestions here?
> >
> > Sorry completed this missed this!
> >
> > Unfortunately, I don't have any good suggestions here. However, I am
> > wondering if the suspend/resume handlers can just be calls to
> > omap_hwmod_idle/enable and we can remove these __omap_dm_timer_xxxx
> > calls (I don't think they are needed). Furthermore, my understanding is
> > this is only needed for AM335x (per the changelog), and so we should not
> > add suspend/resume handlers for all OMAP2+ based devices.
> >
> I agree with the direction.
>
I need to retain the call to enable the interrupt but the others can be dropped.
Will take care of this and the comment on invoking the suspend/resume handlers
only for AM335x in the next version.
Regards,
Vaibhav
^ permalink raw reply
* [RFC v2 12/18] ARM: OMAP2+: timer: Add suspend-resume callbacks for clockevent device
From: Bedia, Vaibhav @ 2013-01-21 7:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F845A8.50502@ti.com>
Hi Jon,
On Fri, Jan 18, 2013 at 00:10:40, Hunter, Jon wrote:
>
> On 12/31/2012 07:07 AM, Vaibhav Bedia wrote:
> > The current OMAP timer code registers two timers -
> > one as clocksource and one as clockevent.
> > AM33XX has only one usable timer in the WKUP domain
> > so one of the timers needs suspend-resume support
> > to restore the configuration to pre-suspend state.
> >
> > commit adc78e6 (timekeeping: Add suspend and resume
> > of clock event devices) introduced .suspend and .resume
> > callbacks for clock event devices. Leverages these
> > callbacks to have AM33XX clockevent timer which is
> > in not in WKUP domain to behave properly across system
> > suspend.
> >
> > Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
> > Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > Cc: Benoit Cousson <b-cousson@ti.com>
> > Cc: Paul Walmsley <paul@pwsan.com>
> > Cc: Kevin Hilman <khilman@deeprootsystems.com>
> > Cc: Vaibhav Hiremath <hvaibhav@ti.com>
> > Cc: Jon Hunter <jon-hunter@ti.com>
> > ---
> > v1->v2:
> > Get rid of harcoded timer id.
> > Note: since a platform device is not created for these timer
> > instances and because there's very minimal change needed for
> > restarting the timer a full blown context save and restore
> > has been skipped.
> >
> > arch/arm/mach-omap2/timer.c | 33 +++++++++++++++++++++++++++++++++
> > 1 files changed, 33 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
> > index 691aa67..38f9cbc 100644
> > --- a/arch/arm/mach-omap2/timer.c
> > +++ b/arch/arm/mach-omap2/timer.c
> > @@ -128,6 +128,36 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
> > }
> > }
> >
> > +static void omap_clkevt_suspend(struct clock_event_device *unused)
> > +{
> > + char name[10];
> > + struct omap_hwmod *oh;
> > +
> > + sprintf(name, "timer%d", clkev.id);
> > + oh = omap_hwmod_lookup(name);
> > + if (!oh)
> > + return;
> > +
> > + __omap_dm_timer_stop(&clkev, 1, clkev.rate);
>
> I am not sure you need to call __omap_dm_timer_stop() here. This should
> have already been called as timekeeping_suspend() will call
> omap2_gp_timer_set_mode() to shutdown the timer.
You are right, i can drop the call to __omap_dm_timer_stop().
>
> > + omap_hwmod_idle(oh);
> > +}
> > +
> > +static void omap_clkevt_resume(struct clock_event_device *unused)
> > +{
> > + char name[10];
> > + struct omap_hwmod *oh;
> > +
> > + sprintf(name, "timer%d", clkev.id);
> > + oh = omap_hwmod_lookup(name);
> > + if (!oh)
> > + return;
> > +
> > + omap_hwmod_enable(oh);
> > + __omap_dm_timer_load_start(&clkev,
> > + OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
> > + __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
>
> Similarly here, I am not sure these __omap_dm_timer_xxxx calls are needed.
I went through the code again. __omap_dm_timer_load_start() is invoked
from omap2_gp_timer_set_mode() with the auto-reload flag when setting the
mode to CLOCK_EVT_MODE_PERIODIC and without the auto-reload flag in
omap2_gp_timer_set_next_event(). So looks like this call can be dropped.
But I do need the call to __omap_dm_timer_int_enable() to re-enable the
interrupts from the timer.
>
> > +}
> > +
> > static struct clock_event_device clockevent_gpt = {
> > .name = "gp_timer",
> > .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
> > @@ -135,6 +165,8 @@ static struct clock_event_device clockevent_gpt = {
> > .rating = 300,
> > .set_next_event = omap2_gp_timer_set_next_event,
> > .set_mode = omap2_gp_timer_set_mode,
> > + .suspend = omap_clkevt_suspend,
> > + .resume = omap_clkevt_resume,
>
> AFAIK, this is only applicable for AM335x devices and so should not be
> added for all.
>
Agreed. Will address this in the next version.
> > };
> >
> > static struct property device_disabled = {
> > @@ -323,6 +355,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
> > int res;
> >
> > clkev.errata = omap_dm_timer_get_errata();
> > + clkev.id = gptimer_id;
>
> We should not use gptimer_id anymore. This will go away once the
> migration to dev-tree is completed. You may be better off storing the
> oh_name in the clock_event_device name field and passing to the
> suspend/resume handlers.
>
Currently the name field in clock_event_device is set to "gp_timer". Should I set
the name in omap2_gp_clockevent_init() based on the gptimer_id?
Regards,
Vaibhav
^ permalink raw reply
* [PATCH v2 1/2] ARM: shmobile: sh73a0: Use generic irqchip_init()
From: Thierry Reding @ 2013-01-21 7:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130121005439.GF19062@verge.net.au>
On Mon, Jan 21, 2013 at 09:54:39AM +0900, Simon Horman wrote:
> On Fri, Jan 18, 2013 at 08:16:12AM +0100, Thierry Reding wrote:
> > The asm/hardware/gic.h header does no longer exist and the corresponding
> > functionality was moved to linux/irqchip.h and linux/irqchip/arm-gic.h
> > respectively. gic_handle_irq() and of_irq_init() are no longer available
> > either and have been replaced by irqchip_init().
>
> asm/hardware/gic.h Seems to still exist in Linus's tree.
> Could you let me know which tree of which branch I should depend on
> in order to apply this change?
I found this when doing an automated build over all ARM defconfigs on
linux-next.
Commit 520f7bd73354f003a9a59937b28e4903d985c420 "irqchip: Move ARM gic.h
to include/linux/irqchip/arm-gic.h" moved the file and was merged
through Olof Johansson's next/cleanup and for-next branches.
Adding Olof on Cc since I'm not quite sure myself about how this is
handled.
Thierry
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^ permalink raw reply
* [RESEND PATCH v9 0/2] usb: phy: samsung: Introducing usb phy driver for samsung SoCs
From: Praveen Paneri @ 2013-01-21 6:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130118184619.GA1991@arwen.pp.htv.fi>
Hi Felipe,
On Sat, Jan 19, 2013 at 12:16 AM, Felipe Balbi <balbi@ti.com> wrote:
> Hi,
>
> On Fri, Jan 18, 2013 at 02:30:21PM +0530, Praveen Paneri wrote:
>> Changes from v8:
>> Resending this patch series after rebasing to the latest usb-next branch.
>> Rewording inline comments for better readability.
>> Removed IS_ENABLED(CONFIG_OF) as pdev->dev.of_node is enough to check for dt support.
>> Using of_match_ptr to add of_match_table to platform_driver structure.
>> Removed unnecessary variables.
>>
>> Changes from v7:
>> Rebased to the latest usb-next branch.
>> Separating arch patches from these driver patches.
>>
>> Changes from v6:
>> Modified register definitions according to the existing ones.
>> Changed default PHY clk selection for SoCs.
>> Improved binding text and rebased to the latest usb-next.
>>
>> Changes from v5:
>> Moved clk_get() to driver's probe function. Now reference clock frequency
>> selection value is stored in samsung_usbphy structure for later use. Used
>> IS_ENABLED() instead of #ifdef in samsung_usbphy_get_driver_data().
>>
>> Changes from v4:
>> Moved header file contents to driver's source file
>> Removed unnecessary print message from driver's probe function
>> Dropped the Free Software Foundation address from the header
>>
>> Changes from v3:
>> Replaced susbsys_initcall()/module_exit() by module_platform_driver().
>> Accordingly in the hsotg driver returned -EPROBE_DEFER until phy driver
>> is registered
>> Removed unnecessary devm_usb_put_phy() call from the hsotg driver remove.
>>
>> Changes from v2:
>> Changed the driver filenames to samsung-usbphy
>> Rectified coding style related errors
>>
>> Changes from v1:
>> Rebased patches to latest usb-next branch
>> Changed the name 'sec_usbphy' to 'samsung_usbphy'
>>
>> This patch set introduces a phy driver for samsung SoCs. It uses the existing
>> transceiver infrastructure to provide phy control functions. Use of this driver
>> can be extended for usb host phy as well. Over the period of time all the phy
>> related code for most of the samsung SoCs can be integrated here.
>> Removing the existing phy code from mach-s3c64xx. Same can be done for other SoCs
>> when they start supporting this phy driver.
>> This driver is tested with smdk6410 and Exynos4210(with DT).
>>
>> Praveen Paneri (2):
>> usb: phy: samsung: Introducing usb phy driver for hsotg
>> usb: s3c-hsotg: Adding phy driver support
>
> Can you check on my xceiv branch if this is applied correctly ?
Yes! It is applied fine.
Thanks :)
Praveen
>
> thanks
>
> --
> balbi
^ permalink raw reply
* [PATCH 2/2] ARM: davinci: da850: add OF_DEV_AUXDATA entry for eth0.
From: Prabhakar Lad @ 2013-01-21 6:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358749759-20517-1-git-send-email-prabhakar.lad@ti.com>
From: Lad, Prabhakar <prabhakar.lad@ti.com>
Add OF_DEV_AUXDATA for eth0 driver in da850 board dt
file to use emac clock.
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
Cc: davinci-linux-open-source at linux.davincidsp.com
Cc: netdev at vger.kernel.org
Cc: devicetree-discuss at lists.ozlabs.org
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Heiko Schocher <hs@denx.de>
---
arch/arm/mach-davinci/da8xx-dt.c | 9 ++++++++-
1 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index 37c27af..d548a38 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -37,11 +37,18 @@ static void __init da8xx_init_irq(void)
of_irq_init(da8xx_irq_match);
}
+struct of_dev_auxdata da850_evm_auxdata_lookup[] __initdata = {
+ OF_DEV_AUXDATA("ti,davinci-dm6467-emac", 0x01e20000, "davinci_emac.1",
+ NULL),
+ {}
+};
+
#ifdef CONFIG_ARCH_DAVINCI_DA850
static void __init da850_init_machine(void)
{
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ of_platform_populate(NULL, of_default_bus_match_table,
+ da850_evm_auxdata_lookup, NULL);
da8xx_uart_clk_enable();
}
--
1.7.4.1
^ permalink raw reply related
* [PATCH 1/2] ARM: davinci: da850: add DT node for eth0.
From: Prabhakar Lad @ 2013-01-21 6:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358749759-20517-1-git-send-email-prabhakar.lad@ti.com>
From: Lad, Prabhakar <prabhakar.lad@ti.com>
Add eth0 device tree node information to da850 by
providing interrupt details and local mac address of eth0.
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
Cc: davinci-linux-open-source at linux.davincidsp.com
Cc: netdev at vger.kernel.org
Cc: devicetree-discuss at lists.ozlabs.org
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Heiko Schocher <hs@denx.de>
---
arch/arm/boot/dts/da850-evm.dts | 3 +++
arch/arm/boot/dts/da850.dtsi | 15 +++++++++++++++
2 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
index 37dc5a3..a1d6e3e 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -24,5 +24,8 @@
serial2: serial at 1d0d000 {
status = "okay";
};
+ eth0: emac at 1e20000 {
+ status = "okay";
+ };
};
};
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 640ab75..309cc99 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -56,5 +56,20 @@
interrupt-parent = <&intc>;
status = "disabled";
};
+ eth0: emac at 1e20000 {
+ compatible = "ti,davinci-dm6467-emac";
+ reg = <0x220000 0x4000>;
+ ti,davinci-ctrl-reg-offset = <0x3000>;
+ ti,davinci-ctrl-mod-reg-offset = <0x2000>;
+ ti,davinci-ctrl-ram-offset = <0>;
+ ti,davinci-ctrl-ram-size = <0x2000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <33
+ 34
+ 35
+ 36
+ >;
+ interrupt-parent = <&intc>;
+ };
};
};
--
1.7.4.1
^ permalink raw reply related
* [PATCH 0/2] ARM: davinci: da850: add ethernet driver DT support
From: Prabhakar Lad @ 2013-01-21 6:29 UTC (permalink / raw)
To: linux-arm-kernel
From: Lad, Prabhakar <prabhakar.lad@ti.com>
This patch set enables Ethernet support through device tree model.
Patches are available on [1] for testing.
[1] http://git.linuxtv.org/mhadli/v4l-dvb-davinci_devices.git/shortlog/refs/heads/da850_dt
Lad, Prabhakar (2):
ARM: davinci: da850: add DT node for eth0.
ARM: davinci: da850: add OF_DEV_AUXDATA entry for eth0.
arch/arm/boot/dts/da850-evm.dts | 3 +++
arch/arm/boot/dts/da850.dtsi | 15 +++++++++++++++
arch/arm/mach-davinci/da8xx-dt.c | 9 ++++++++-
3 files changed, 26 insertions(+), 1 deletions(-)
--
1.7.4.1
^ permalink raw reply
* Compilation problem with drivers/staging/zsmalloc when !SMP on ARM
From: Minchan Kim @ 2013-01-21 5:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130119044602.GC5391@phenom.dumpdata.com>
On Fri, Jan 18, 2013 at 11:46:02PM -0500, Konrad Rzeszutek Wilk wrote:
> On Fri, Jan 18, 2013 at 07:11:32PM -0600, Matt Sealey wrote:
> > On Fri, Jan 18, 2013 at 3:08 PM, Russell King - ARM Linux
> > <linux@arm.linux.org.uk> wrote:
> > > On Fri, Jan 18, 2013 at 02:24:15PM -0600, Matt Sealey wrote:
> > >> Hello all,
> > >>
> > >> I wonder if anyone can shed some light on this linking problem I have
> > >> right now. If I configure my kernel without SMP support (it is a very
> > >> lean config for i.MX51 with device tree support only) I hit this error
> > >> on linking:
> > >
> > > Yes, I looked at this, and I've decided that I will _not_ fix this export,
> > > neither will I accept a patch to add an export.
> >
> > Understood..
> >
> > > As far as I can see, this code is buggy in a SMP environment. There's
> > > apparantly no guarantee that:
> > >
> > > 1. the mapping will be created on a particular CPU.
> > > 2. the mapping will then be used only on this specific CPU.
> > > 3. no guarantee that another CPU won't speculatively prefetch from this
> > > region.
> > > 4. when the mapping is torn down, no guarantee that it's the same CPU that
> > > used the happing.
> > >
> > > So, the use of the local TLB flush leaves all the other CPUs potentially
> > > containing TLB entries for this mapping.
> >
> > I'm gonna put this out to the maintainers (Konrad, and Seth since he
> > committed it) that if this code is buggy it gets taken back out, even
> > if it makes zsmalloc "slow" on ARM, for the following reasons:
>
> Just to make sure I understand, you mean don't use page table
> mapping but instead use copying?
>
> >
> > * It's buggy on SMP as Russell describes above
> > * It might not be buggy on UP (opposite to Russell's description above
> > as the restrictions he states do not exist), but that would imply an
> > export for a really core internal MM function nobody should be using
> > anyway
> > * By that assessment, using that core internal MM function on SMP is
> > also bad voodoo that zsmalloc should not be doing
>
> 'local_tlb_flush' is bad voodoo?
>
> >
> > It also either smacks of a lack of comprehensive testing or defiance
> > of logic that nobody ever built the code without CONFIG_SMP, which
> > means it was only tested on a bunch of SMP ARM systems (I'm guessing..
> > Pandaboard? :) or UP systems with SMP/SMP_ON_UP enabled (to expand on
> > that guess, maybe Beagleboard in some multiplatform Beagle/Panda
> > hybrid kernel). I am sure I was reading the mailing lists when that
> > patch was discussed, coded and committed and my guess is correct. In
> > this case, what we have here anyway is code which when PROPERLY
> > configured as so..
>
> The initial patch were done on x86. Then Seth did the work to make sure
> it worked on PPC. Munchin looked on ARM and that is it.
s/Munchin/Minchan
>
> If you have an ARM server that you would be willing to part with I would
> be thrilled to look at it.
>
> >
> > diff --git a/drivers/staging/zsmalloc/zsmalloc-main.c
> > b/drivers/staging/zsmalloc/zsmalloc-main.c
> > index 09a9d35..ecf75fb 100644
> > --- a/drivers/staging/zsmalloc/zsmalloc-main.c
> > +++ b/drivers/staging/zsmalloc/zsmalloc-main.c
> > @@ -228,7 +228,7 @@ struct zs_pool {
> > * mapping rather than copying
> > * for object mapping.
> > */
> > -#if defined(CONFIG_ARM)
> > +#if defined(CONFIG_ARM) && defined(CONFIG_SMP)
> > #define USE_PGTABLE_MAPPING
I don't get it. How to prevent the problem Russel described?
The problem is that other CPU can prefetch _speculatively_ under us.
> > #endif
> >
> > .. such that it even compiles in both "guess" configurations, the
> > slower Cortex-A8 600MHz single core system gets to use the slow copy
> > path and the dual-core 1GHz+ Cortex-A9 (with twice the RAM..) gets to
> > use the fast mapping path. Essentially all the patch does is "improve
> > performance" on the fastest, best-configured, large-amounts-of-RAM,
> > lots-of-CPU-performance ARM systems (OMAP4+, Snapdragon, Exynos4+,
> > marvell armada, i.MX6..) while introducing the problems Russell
> > describes, and leave performance exactly the same and potentially far
> > more stable on the slower, memory-limited ARM machines.
>
> Any ideas on how to detect that?
> >
> > Given the purpose of zsmalloc, zram, zcache etc. this somewhat defies
> > logic. If it's not making the memory-limited, slow ARM systems run
> > better, what's the point?
> >
> > So in summary I suggest "we" (Greg? or is it Seth's responsibility?)
> > should just back out that whole USE_PGTABLE_MAPPING chunk of code
> > introduced with f553646. Then Russell can carry on randconfiging and I
> > can build for SMP and UP and get the same code.. with less bugs.
>
> I get that you want to have this fixed right now. I think having it
> fixed the right way is a better choice. Lets discuss that first
> before we start tossing patches to disable parts of it.
If I don't miss something, we could have 2 choice.
1) use flush_tlb_kernel_range instead of local_flush_tlb_kernel_range
Or
2) use only memory copy
I guess everybody want 2 because it makes code very simple and maintainable.
Even, rencently Joonsoo sent optimize patch.
Look at https://lkml.org/lkml/2013/1/16/68 so zram/zcache effect caused by 2
would be minimized.
But please give me the time and I will borrow quad-core embedded target board
and test 1 on the phone with Seth's benchmark.
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
--
Kind regards,
Minchan Kim
^ permalink raw reply
* [PATCH] ARM: imx: Remove mach-mx51_3ds board
From: Shawn Guo @ 2013-01-21 5:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358525079-26429-1-git-send-email-festevam@gmail.com>
On Fri, Jan 18, 2013 at 02:04:39PM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> mach-mx51_3ds only supports old silicon version of MX51 and was replaced
> with mx51 babbage, which is the official MX51 development board.
>
> No need to maintain it anymore.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Applied, thanks.
^ permalink raw reply
* [PATCH v5 6/9] ARM: davinci: Remoteproc driver support for OMAP-L138 DSP
From: Sekhar Nori @ 2013-01-21 5:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1357863807-380-7-git-send-email-rtivy@ti.com>
On 1/11/2013 5:53 AM, Robert Tivy wrote:
> Adding a remoteproc driver implementation for OMAP-L138 DSP
>
> Signed-off-by: Robert Tivy <rtivy@ti.com>
> ---
> drivers/remoteproc/Kconfig | 23 ++
> drivers/remoteproc/Makefile | 1 +
> drivers/remoteproc/davinci_remoteproc.c | 307 ++++++++++++++++++++++++
> include/linux/platform_data/da8xx-remoteproc.h | 33 +++
naming the driver davinci_remoteproc.c and platform data as
da8xx-remoteproc.h is odd. The driver looks really specific to omap-l138
so may be call the driver da8xx-remoteproc.c?
> diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
> index 96ce101..7d3a5e0 100644
> --- a/drivers/remoteproc/Kconfig
> +++ b/drivers/remoteproc/Kconfig
> @@ -41,4 +41,27 @@ config STE_MODEM_RPROC
> This can be either built-in or a loadable module.
> If unsure say N.
>
> +config DAVINCI_REMOTEPROC
> + tristate "DaVinci DA850/OMAPL138 remoteproc support (EXPERIMENTAL)"
> + depends on ARCH_DAVINCI_DA850
> + select REMOTEPROC
> + select RPMSG
> + select FW_LOADER
> + select CMA
> + default n
> + help
> + Say y here to support DaVinci DA850/OMAPL138 remote processors
> + via the remote processor framework.
> +
> + You want to say y here in order to enable AMP
> + use-cases to run on your platform (multimedia codecs are
> + offloaded to remote DSP processors using this framework).
> +
> + It's safe to say n here if you're not interested in multimedia
> + offloading or just want a bare minimum kernel.
> + This feature is considered EXPERIMENTAL, due to it not having
> + any previous exposure to the general public and therefore
> + limited developer-based testing.
This is probably true in general for remoteproc (I am being warned a lot
by the framework when using it) so may be you can drop this specific
reference.
> diff --git a/drivers/remoteproc/davinci_remoteproc.c b/drivers/remoteproc/davinci_remoteproc.c
> new file mode 100644
> index 0000000..fc6fd72
> --- /dev/null
> +++ b/drivers/remoteproc/davinci_remoteproc.c
> @@ -0,0 +1,307 @@
> +/*
> + * Remote processor machine-specific module for Davinci
> + *
> + * Copyright (C) 2011-2012 Texas Instruments, Inc.
2013?
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + */
> +
> +#define pr_fmt(fmt) "%s: " fmt, __func__
You dont seem to be using this anywhere.
> +
> +#include <linux/kernel.h>
> +#include <linux/err.h>
> +#include <linux/printk.h>
> +#include <linux/bitops.h>
> +#include <linux/platform_device.h>
> +#include <linux/remoteproc.h>
> +#include <linux/platform_data/da8xx-remoteproc.h>
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/interrupt.h>
> +#include <linux/irq.h>
It will be nice to keep this sorted. It avoids duplicate includes later.
> +static char *fw_name;
> +module_param(fw_name, charp, S_IRUGO);
> +MODULE_PARM_DESC(fw_name, "\n\t\tName of DSP firmware file in /lib/firmware");
> +
> +/*
> + * OMAP-L138 Technical References:
> + * http://www.ti.com/product/omap-l138
> + */
> +#define SYSCFG_CHIPSIG_OFFSET 0x174
> +#define SYSCFG_CHIPSIG_CLR_OFFSET 0x178
> +#define SYSCFG_CHIPINT0 (1 << 0)
> +#define SYSCFG_CHIPINT1 (1 << 1)
> +#define SYSCFG_CHIPINT2 (1 << 2)
> +#define SYSCFG_CHIPINT3 (1 << 3)
You can use BIT(x) here.
> +
> +/**
> + * struct davinci_rproc - davinci remote processor state
> + * @rproc: rproc handle
> + */
> +struct davinci_rproc {
> + struct rproc *rproc;
> + struct clk *dsp_clk;
> +};
> +
> +static void __iomem *syscfg0_base;
> +static struct platform_device *remoteprocdev;
> +static struct irq_data *irq_data;
> +static void (*ack_fxn)(struct irq_data *data);
> +static int irq;
> +
> +/**
> + * handle_event() - inbound virtqueue message workqueue function
> + *
> + * This funciton is registered as a kernel thread and is scheduled by the
> + * kernel handler.
> + */
> +static irqreturn_t handle_event(int irq, void *p)
> +{
> + struct rproc *rproc = platform_get_drvdata(remoteprocdev);
> +
> + /* Process incoming buffers on our vring */
> + while (IRQ_HANDLED == rproc_vq_interrupt(rproc, 0))
> + ;
> +
> + /* Must allow wakeup of potenitally blocking senders: */
> + rproc_vq_interrupt(rproc, 1);
> +
> + return IRQ_HANDLED;
> +}
> +
> +/**
> + * davinci_rproc_callback() - inbound virtqueue message handler
> + *
> + * This handler is invoked directly by the kernel whenever the remote
> + * core (DSP) has modified the state of a virtqueue. There is no
> + * "payload" message indicating the virtqueue index as is the case with
> + * mailbox-based implementations on OMAP4. As such, this handler "polls"
> + * each known virtqueue index for every invocation.
> + */
> +static irqreturn_t davinci_rproc_callback(int irq, void *p)
> +{
> + if (readl(syscfg0_base + SYSCFG_CHIPSIG_OFFSET) & SYSCFG_CHIPINT0) {
personally I think using a variable to read the register and then
testing its value inside if() is more readable.
> + /* Clear interrupt level source */
> + writel(SYSCFG_CHIPINT0,
> + syscfg0_base + SYSCFG_CHIPSIG_CLR_OFFSET);
> +
> + /*
> + * ACK intr to AINTC.
> + *
> + * It has already been ack'ed by the kernel before calling
> + * this function, but since the ARM<->DSP interrupts in the
> + * CHIPSIG register are "level" instead of "pulse" variety,
> + * we need to ack it after taking down the level else we'll
> + * be called again immediately after returning.
> + */
> + ack_fxn(irq_data);
Don't really like interrupt controller functions being invoked like this
but I don't understand the underlying issue well enough to suggest an
alternate.
> +
> + return IRQ_WAKE_THREAD;
> + }
> +
> + return IRQ_HANDLED;
> +}
> +
> +static int davinci_rproc_start(struct rproc *rproc)
> +{
> + struct platform_device *pdev = to_platform_device(rproc->dev.parent);
> + struct device *dev = rproc->dev.parent;
> + struct davinci_rproc *drproc = rproc->priv;
> + struct clk *dsp_clk;
> + struct resource *r;
> + unsigned long host1cfg_physaddr;
> + unsigned int host1cfg_offset;
> + int ret;
> +
> + remoteprocdev = pdev;
> +
> + /* hw requires the start (boot) address be on 1KB boundary */
> + if (rproc->bootaddr & 0x3ff) {
> + dev_err(dev, "invalid boot address: must be aligned to 1KB\n");
> +
> + return -EINVAL;
> + }
> +
> + r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Along with moving this to probe as Ohad requested, you can use
devm_request_and_ioremap() to simplify the error paths here. Have a look
at: Documentation/driver-model/devres.txt
> + if (IS_ERR_OR_NULL(r)) {
> + dev_err(dev, "platform_get_resource() error: %ld\n",
> + PTR_ERR(r));
> +
> + return PTR_ERR(r);
> + }
> + host1cfg_physaddr = (unsigned long)r->start;
> +
> + irq = platform_get_irq(pdev, 0);
> + if (irq < 0) {
> + dev_err(dev, "platform_get_irq(pdev, 0) error: %d\n", irq);
> +
> + return irq;
> + }
> +
> + irq_data = irq_get_irq_data(irq);
> + if (IS_ERR_OR_NULL(irq_data)) {
> + dev_err(dev, "irq_get_irq_data(%d) error: %ld\n",
> + irq, PTR_ERR(irq_data));
> +
> + return PTR_ERR(irq_data);
> + }
> + ack_fxn = irq_data->chip->irq_ack;
> +
> + ret = request_threaded_irq(irq, davinci_rproc_callback, handle_event,
> + 0, "davinci-remoteproc", drproc);
> + if (ret) {
> + dev_err(dev, "request_threaded_irq error: %d\n", ret);
> +
> + return ret;
> + }
> +
> + syscfg0_base = ioremap(host1cfg_physaddr & PAGE_MASK, SZ_4K);
> + host1cfg_offset = offset_in_page(host1cfg_physaddr);
> + writel(rproc->bootaddr, syscfg0_base + host1cfg_offset);
> +
> + dsp_clk = clk_get(dev, NULL);
devm_clk_get() here.
> + if (IS_ERR_OR_NULL(dsp_clk)) {
> + dev_err(dev, "clk_get error: %ld\n", PTR_ERR(dsp_clk));
> + ret = PTR_ERR(dsp_clk);
> + goto fail;
> + }
> + clk_enable(dsp_clk);
> + davinci_clk_reset_deassert(dsp_clk);
> +
> + drproc->dsp_clk = dsp_clk;
> +
> + return 0;
> +fail:
> + free_irq(irq, drproc);
> + iounmap(syscfg0_base);
> +
> + return ret;
> +}
> +
> +static int davinci_rproc_stop(struct rproc *rproc)
> +{
> + struct davinci_rproc *drproc = rproc->priv;
> + struct clk *dsp_clk = drproc->dsp_clk;
> +
> + clk_disable(dsp_clk);
> + clk_put(dsp_clk);
> + iounmap(syscfg0_base);
> + free_irq(irq, drproc);
> +
> + return 0;
> +}
> +
> +/* kick a virtqueue */
> +static void davinci_rproc_kick(struct rproc *rproc, int vqid)
> +{
> + int timed_out;
> + unsigned long timeout;
> +
> + timed_out = 0;
> + timeout = jiffies + HZ/100;
> +
> + /* Poll for ack from other side first */
> + while (readl(syscfg0_base + SYSCFG_CHIPSIG_OFFSET) &
> + SYSCFG_CHIPINT2)
If there is a context switch here long enough ..
> + if (time_after(jiffies, timeout)) {
.. then time_after() might return true and you will erroneously report a
timeout even though hardware is working perfectly fine.
Thanks,
Sekhar
^ permalink raw reply
* [PATCH 1/9] ARM: OMAP2+: AM33XX: CM: Get rid of unncessary header inclusions
From: Bedia, Vaibhav @ 2013-01-21 5:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F94085.3030704@mvista.com>
On Fri, Jan 18, 2013 at 18:01:01, Sergei Shtylyov wrote:
> On 18-01-2013 11:19, Vaibhav Bedia wrote:
>
> > Some of the included header files are not needed so
> > remove them.
>
> > Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
> > Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > ---
> > Change from RFC version:
> > No change
>
> > arch/arm/mach-omap2/cm33xx.h | 7 +------
> > 1 files changed, 1 insertions(+), 6 deletions(-)
>
> > diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
> > index 5fa0b62..8009e13 100644
> > --- a/arch/arm/mach-omap2/cm33xx.h
> > +++ b/arch/arm/mach-omap2/cm33xx.h
> > @@ -17,16 +17,11 @@
> > #ifndef __ARCH_ARM_MACH_OMAP2_CM_33XX_H
> > #define __ARCH_ARM_MACH_OMAP2_CM_33XX_H
> >
> > -#include <linux/delay.h>
> > -#include <linux/errno.h>
> > -#include <linux/err.h>
> > -#include <linux/io.h>
> > -
> > #include "common.h"
> >
> > #include "cm.h"
> > #include "cm-regbits-33xx.h"
> > -#include "cm33xx.h"
> > +#include "iomap.h"
>
> You don't comment on this addition in the changelog...
Hmm... ok. Will clarify this in the changelog for v2.
Regards,
Vaibhav
^ permalink raw reply
* [PATCH 0/9] ARM: OMAP2+: AM33XX: Misc fixes/updates
From: Bedia, Vaibhav @ 2013-01-21 5:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358493569-17142-1-git-send-email-vaibhav.bedia@ti.com>
Hi Paul, Benoit,
On Fri, Jan 18, 2013 at 12:49:20, Bedia, Vaibhav wrote:
> Hi,
>
> The following patches were earlier posted as part the AM33XX
> suspend-resume support series [1]. Based on the suggestion
> from Santosh Shilimkar <santosh.shilimkar@ti.com> i have split
> out the changes which update the various data files related
> to AM33XX support.
>
> These patches apply on top of v3.8-rc3
>
> Regards,
> Vaibhav
>
> [1] http://marc.info/?l=linux-arm-kernel&m=135698501821074&w=2
>
> Vaibhav Bedia (9):
> ARM: OMAP2+: AM33XX: CM: Get rid of unncessary header inclusions
> ARM: OMAP2+: AM33XX: CM/PRM: Use __ASSEMBLER__ macros in header files
> ARM: OMAP2+: AM33XX: hwmod: Register OCMC RAM hwmod
> ARM: OMAP2+: AM33XX: hwmod: Update TPTC0 hwmod with the right flags
> ARM: OMAP2+: AM33XX: hwmod: Fixup cpgmac0 hwmod entry
> ARM: OMAP2+: AM33XX: hwmod: Update the WKUP-M3 hwmod with reset
> status bit
> ARM: OMAP2+: AM33XX: Update the hardreset API
> ARM: DTS: AM33XX: Add nodes for OCMC RAM and WKUP-M3
> ARM: OMAP2+: AM33XX: control: Add some control module registers and
> APIs
>
Any comments on these before I resend addressing the comments from Sergei?
Regards,
Vaibhav
^ permalink raw reply
* [PATCH 4/9] ARM: OMAP2+: AM33XX: hwmod: Update TPTC0 hwmod with the right flags
From: Bedia, Vaibhav @ 2013-01-21 5:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50F94001.5050703@mvista.com>
On Fri, Jan 18, 2013 at 17:58:49, Sergei Shtylyov wrote:
> Hello.
>
> On 18-01-2013 11:19, Vaibhav Bedia wrote:
>
> > Third Party Transfer Controller (TPTC0) needs to be idled and
> > put to standby under SW control. Add the appropriate flags in
> > the TPTC0 hwmod entry.
>
> > Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
> > Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > ---
> > Change from RFC version:
> > Clarify TPTC in the changelog
>
> > arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 +
> > 1 files changed, 1 insertions(+), 0 deletions(-)
>
> > diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
> > index 8280f11..f2f408c 100644
> > --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
> > +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
> > @@ -1823,6 +1823,7 @@ static struct omap_hwmod am33xx_tptc0_hwmod = {
> > .class = &am33xx_tptc_hwmod_class,
> > .clkdm_name = "l3_clkdm",
> > .mpu_irqs = am33xx_tptc0_irqs,
> > + .flags = (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY),
>
> Parens not needed here.
>
Will drop it in v2.
Regards,
Vaibhav
^ permalink raw reply
* [PATCH v2] video: Kconfig: Specify the SoCs that make use of FB_IMX
From: Shawn Guo @ 2013-01-21 3:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358590537-5013-1-git-send-email-festevam@gmail.com>
On Sat, Jan 19, 2013 at 08:15:37AM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> FB_IMX is the framebuffer driver used by MX1, MX21, MX25 and MX27 processors.
>
> Pass this information to the Kconfig text to make it clear.
>
> Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> Shawn,
>
> Could you get this one also via your tree?
>
> No response from the fb maintainer for months on this one.
>
Ok. Applied.
^ permalink raw reply
* [PATCH] of: fix incorrect return value of of_find_matching_node_and_match()
From: Thomas Abraham @ 2013-01-21 3:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50FCB5B9.8000802@gmail.com>
On 20 January 2013 19:27, Rob Herring <robherring2@gmail.com> wrote:
> On 01/20/2013 03:56 PM, Thomas Abraham wrote:
>> On 20 January 2013 13:50, Rob Herring <robherring2@gmail.com> wrote:
>>> On 01/19/2013 12:20 PM, Thomas Abraham wrote:
>>>> The of_find_matching_node_and_match() function incorrectly sets the matched
>>>> entry to 'matches' when the compatible value of a node matches one of the
>>>> possible values. This results in incorrectly selecting the the first entry in
>>>> the 'matches' list as the matched entry. Fix this by noting down the result of
>>>> the call to of_match_node() and setting that as the matched entry.
>>>
>>> Looks fine, but is this breaking something in 3.8 or can it wait for 3.9?
>>
>> Yes, it can wait for 3.9. I am using this function while adding device
>> tree support for timers on exynos platform which will probably merged
>> in 3.9.
>
> Applied for 3.9. It's in my for-next branch on sources.calxeda.com. This
> is a stable branch.
>
> Rob
Thank you Rob.
Regards,
Thomas.
^ permalink raw reply
* [PATCH] of: fix incorrect return value of of_find_matching_node_and_match()
From: Rob Herring @ 2013-01-21 3:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJuYYwT++66UUT5wdZh=B=VC7s2=T4w0qO6G7CEG6eCHT5WBCg@mail.gmail.com>
On 01/20/2013 03:56 PM, Thomas Abraham wrote:
> On 20 January 2013 13:50, Rob Herring <robherring2@gmail.com> wrote:
>> On 01/19/2013 12:20 PM, Thomas Abraham wrote:
>>> The of_find_matching_node_and_match() function incorrectly sets the matched
>>> entry to 'matches' when the compatible value of a node matches one of the
>>> possible values. This results in incorrectly selecting the the first entry in
>>> the 'matches' list as the matched entry. Fix this by noting down the result of
>>> the call to of_match_node() and setting that as the matched entry.
>>
>> Looks fine, but is this breaking something in 3.8 or can it wait for 3.9?
>
> Yes, it can wait for 3.9. I am using this function while adding device
> tree support for timers on exynos platform which will probably merged
> in 3.9.
Applied for 3.9. It's in my for-next branch on sources.calxeda.com. This
is a stable branch.
Rob
>
> Thanks,
> Thomas.
>
>>
>> Rob
>>
>>>
>>> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
>>> ---
>>> drivers/of/base.c | 6 ++++--
>>> 1 files changed, 4 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/of/base.c b/drivers/of/base.c
>>> index 2390ddb..960ae5b 100644
>>> --- a/drivers/of/base.c
>>> +++ b/drivers/of/base.c
>>> @@ -612,6 +612,7 @@ struct device_node *of_find_matching_node_and_match(struct device_node *from,
>>> const struct of_device_id **match)
>>> {
>>> struct device_node *np;
>>> + const struct of_device_id *m;
>>>
>>> if (match)
>>> *match = NULL;
>>> @@ -619,9 +620,10 @@ struct device_node *of_find_matching_node_and_match(struct device_node *from,
>>> read_lock(&devtree_lock);
>>> np = from ? from->allnext : of_allnodes;
>>> for (; np; np = np->allnext) {
>>> - if (of_match_node(matches, np) && of_node_get(np)) {
>>> + m = of_match_node(matches, np);
>>> + if (m && of_node_get(np)) {
>>> if (match)
>>> - *match = matches;
>>> + *match = m;
>>> break;
>>> }
>>> }
>>>
^ permalink raw reply
* [PATCH v2 2/9] ARM: PRIMA2: enable AUTO_ZRELADDR for SIRF in Kconfig
From: Barry Song @ 2013-01-21 2:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130116113834.GC10218@e106331-lin.cambridge.arm.com>
2013/1/16 Mark Rutland <mark.rutland@arm.com>:
> On Wed, Jan 16, 2013 at 05:53:28AM +0000, Barry Song wrote:
>> From: Barry Song <Baohua.Song@csr.com>
>>
>> prima2 and marco have different memory base address. prima2
>> begins from 0 and marco begins from
>
> Runaway commit message.
missed information.... thanks!
>
>>
>> Signed-off-by: Barry Song <Baohua.Song@csr.com>
>> ---
>> arch/arm/Kconfig | 1 +
>> 1 files changed, 1 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>> index f95ba14..13f89a2 100644
>> --- a/arch/arm/Kconfig
>> +++ b/arch/arm/Kconfig
>> @@ -394,6 +394,7 @@ config ARCH_GEMINI
>> config ARCH_SIRF
>> bool "CSR SiRF"
>> select ARCH_REQUIRE_GPIOLIB
>> + select AUTO_ZRELADDR
>> select COMMON_CLK
>> select GENERIC_CLOCKEVENTS
>> select GENERIC_IRQ_CHIP
>> --
>> 1.7.5.4
-barry
^ permalink raw reply
* [PATCH v2 1/9] ARM: PRIMA2: add CSR SiRFmarco device tree .dts
From: Barry Song @ 2013-01-21 2:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130116113759.GB10218@e106331-lin.cambridge.arm.com>
Hi Mark,
thanks very much for reviewing.
2013/1/16 Mark Rutland <mark.rutland@arm.com>:
> Hello,
>
> This looks pretty good. I've tried to give a more thorough review this time,
> so hopefully these comments should be my last.
>
> On Wed, Jan 16, 2013 at 05:53:27AM +0000, Barry Song wrote:
>> From: Barry Song <Baohua.Song@csr.com>
>>
>> SiRFmarco is a dual-core cortex-a9 SMP SoC from CSR. this patch
>> adds the .dtsi and a basic evb board .dts for it.
>>
>> Signed-off-by: Barry Song <Baohua.Song@csr.com>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> ---
>> arch/arm/boot/dts/marco-evb.dts | 51 +++
>> arch/arm/boot/dts/marco.dtsi | 756 +++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 807 insertions(+), 0 deletions(-)
>> create mode 100644 arch/arm/boot/dts/marco-evb.dts
>> create mode 100644 arch/arm/boot/dts/marco.dtsi
>>
>> diff --git a/arch/arm/boot/dts/marco-evb.dts b/arch/arm/boot/dts/marco-evb.dts
>> new file mode 100644
>> index 0000000..4e68d3c
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/marco-evb.dts
>> @@ -0,0 +1,51 @@
>> +/*
>> + * DTS file for CSR SiRFmarco Evaluation Board
>> + *
>> + * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
>> + *
>> + * Licensed under GPLv2 or later.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +/include/ "marco.dtsi"
>> +
>> +/ {
>> + model = "CSR SiRFmarco Evaluation Board";
>> + compatible = "sirf,marco", "sirf,marco-cb";
>
> Shouldn't "sirf,marco-cb" come before "sirf,marco", so we have the most
> specific match first?
agree.
>
> It would also be nice if both compatible strings were documented.
will have it in Documentation/devicetree/bindings/arm/sirf.txt
>
>> +
>> + memory {
>> + reg = <0x40000000 0x60000000>;
>> + };
>> +
>> + axi {
>> + peri-iobg {
>> + uart1: uart at cc060000 {
>> + status = "okay";
>> + };
>> + i2c0: i2c at cc0e0000 {
>> + status = "okay";
>> + fpga-cpld at 4d {
>> + compatible = "sirf,fpga-cpld";
>> + reg = <0x4d>;
>> + };
>> + };
>> + spi1: spi at cc170000 {
>> + status = "okay";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&spi1_pins_a>;
>> + spi at 0 {
>> + compatible = "spidev";
>> + reg = <0>;
>> + spi-max-frequency = <1000000>;
>> + };
>> + };
>> + pci-iobg {
>> + sd0: sdhci at cd000000 {
>> + bus-width = <8>;
>> + status = "okay";
>> + };
>> + };
>> + };
>> + };
>> +};
>> diff --git a/arch/arm/boot/dts/marco.dtsi b/arch/arm/boot/dts/marco.dtsi
>> new file mode 100644
>> index 0000000..d6bad50
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/marco.dtsi
>> @@ -0,0 +1,756 @@
>> +/*
>> + * DTS file for CSR SiRFmarco SoC
>> + *
>> + * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
>> + *
>> + * Licensed under GPLv2 or later.
>> + */
>> +
>> +/include/ "skeleton.dtsi"
>> +/ {
>> + compatible = "sirf,marco";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + interrupt-parent = <&gic>;
>> +
>> + cpus {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + cpu at 0 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a9";
>> + reg = <0>;
>> + };
>> + cpu at 1 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a9";
>> + reg = <1>;
>> + };
>> + };
>
> Nice to see the reg properties present :)
>
> Do the CPUs support the performance monitors extension, and if so are
> interrupts wired up?
>
> If so it'd be nice to see a pmu node:
>
> pmu {
> compatible = "arm,cortex-a9-pmu";
> interrupts = <cpu0-irq>,
> <cpu1-irq>;
> };
>
as there is a driver arch/arm/kernel/perf_event_cpu.c commited on Jul
29 2012, pmu nodes are really necessary if there is one in SoC.
the problem is we are using a fpga, and not sure the final design, so
i'd like to keep this and some following detailed IC issues you
comment to the future fixes.
>> +
>> + axi {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0x40000000 0x40000000 0xa0000000>;
>> +
>> + l2-cache-controller at c0030000 {
>> + compatible = "sirf,marco-pl310-cache", "arm,pl310-cache";
>> + reg = <0xc0030000 0x1000>;
>> + interrupts = <0 59 0>;
>> + arm,tag-latency = <1 1 1>;
>> + arm,data-latency = <1 1 1>;
>> + arm,filter-ranges = <0x40000000 0x80000000>;
>> + };
>> +
>> + gic: interrupt-controller at c0011000 {
>> + compatible = "arm,cortex-a9-gic";
>> + interrupt-controller;
>> + #interrupt-cells = <3>;
>> + reg = <0xc0011000 0x1000>,
>> + <0xc0010100 0x0100>;
>> + };
>> +
>> + rstc-iobg {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0xc2000000 0xc2000000 0x1000000>;
>> +
>> + reset-controller at c2000000 {
>> + compatible = "sirf,marco-rstc";
>> + reg = <0xc2000000 0x10000>;
>> + };
>> + };
>> +
>> + sys-iobg {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0xc3000000 0xc3000000 0x1000000>;
>> +
>> + clock-controller at c3000000 {
>> + compatible = "sirf,marco-clkc";
>> + reg = <0xc3000000 0x1000>;
>> + interrupts = <0 3 0>;
>> + };
>> +
>> + rsc-controller at c3010000 {
>> + compatible = "sirf,marco-rsc";
>> + reg = <0xc3010000 0x1000>;
>> + };
>
> I assume an update for the clk-prima2 driver is going out in a separate series
> to enable these compatible strings?
yes. there are more PLLs, dividers and clk gates in marco than prima2.
i'll have seperate patches for them, for the moment, i can't as clk
tree is not included in the fpga.
>
> Is the hardware backwards compatible with the prima2 variant? If so, you could
> append the sirf,prima2 variant to the compatible lists and save a lot of churn
> in drivers.
not completely compatible. for the performance consideration, marco
has splitted many shared registers to SET/CLEAR pair to avoid frequent
read-modify-write.
>
>> + };
>> +
>> + mem-iobg {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0xc4000000 0xc4000000 0x1000000>;
>> +
>> + memory-controller at c4000000 {
>> + compatible = "sirf,marco-memc";
>> + reg = <0xc4000000 0x10000>;
>> + interrupts = <0 27 0>;
>> + };
>
> Again, if this is compatible with the prima2 variant, it'd be good to append
> the prima2 variant's compatible string.
>
>> + };
>> +
>> + disp-iobg0 {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0xc5000000 0xc5000000 0x1000000>;
>> +
>> + display0 at c5000000 {
>> + compatible = "sirf,marco-lcd";
>> + reg = <0xc5000000 0x10000>;
>> + interrupts = <0 30 0>;
>> + };
>> +
>> + vpp0 at c5010000 {
>> + compatible = "sirf,marco-vpp";
>> + reg = <0xc5010000 0x10000>;
>> + interrupts = <0 31 0>;
>> + };
>
> And again, though I can't find any string matching "sirf,.*-lcd" or
> "sirf,.*-vpp" in v3.8-rc3.
i'd like to leave the confirmation of them to the day IC is fixed and
related drivers are begun.
for the moment, all teams need a basic Linux infrasture and baseline
to move things ahead.
>
>> + };
>> +
>> + disp-iobg1 {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0xc6000000 0xc6000000 0x1000000>;
>> +
>> + display1 at c6000000 {
>> + compatible = "sirf,marco-lcd";
>> + reg = <0xc6000000 0x10000>;
>> + interrupts = <0 62 0>;
>> + };
>> +
>> + vpp1 at c6010000 {
>> + compatible = "sirf,marco-vpp";
>> + reg = <0xc6010000 0x10000>;
>> + interrupts = <0 63 0>;
>> + };
>
> And again.
>
>> + };
>> +
>> + graphics-iobg {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0xc8000000 0xc8000000 0x1000000>;
>> +
>> + graphics at c8000000 {
>> + compatible = "powervr,sgx540";
>> + reg = <0xc8000000 0x1000000>;
>> + interrupts = <0 6 0>;
>> + };
>> + };
>> +
>> + multimedia-iobg {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0xc9000000 0xc9000000 0x1000000>;
>> +
>> + multimedia at a0000000 {
>> + compatible = "sirf,marco-video-codec";
>
> And again. I'll stop with the compatible string pedantry here, but if any
> hardware with a "sirf,marco-.*" string is compatible with a prima2 variant,
> it'd be good to append the prima2 string to the end of the compatible list.
agree.
>
>> + reg = <0xc9000000 0x1000000>;
>> + interrupts = <0 5 0>;
>> + };
>> + };
>> +
>> + dsp-iobg {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0xca000000 0xca000000 0x2000000>;
>> +
>> + dspif at ca000000 {
>> + compatible = "sirf,marco-dspif";
>> + reg = <0xca000000 0x10000>;
>> + interrupts = <0 9 0>;
>> + };
>> +
>> + gps at ca010000 {
>> + compatible = "sirf,marco-gps";
>> + reg = <0xca010000 0x10000>;
>> + interrupts = <0 7 0>;
>> + };
>> +
>> + dsp at cb000000 {
>> + compatible = "sirf,marco-dsp";
>> + reg = <0xcb000000 0x1000000>;
>> + interrupts = <0 8 0>;
>> + };
>> + };
>> +
>> + peri-iobg {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0xcc000000 0xcc000000 0x2000000>;
>> +
>> + timer at cc020000 {
>> + compatible = "sirf,marco-tick";
>> + reg = <0xcc020000 0x1000>;
>> + interrupts = <0 0 0>,
>> + <0 1 0>,
>> + <0 2 0>,
>> + <0 49 0>,
>> + <0 50 0>,
>> + <0 51 0>;
>> + };
>> +
>> + nand at cc030000 {
>> + compatible = "sirf,marco-nand";
>> + reg = <0xcc030000 0x10000>;
>> + interrupts = <0 41 0>;
>> + };
>> +
>> + audio at cc040000 {
>> + compatible = "sirf,marco-audio";
>> + reg = <0xcc040000 0x10000>;
>> + interrupts = <0 35 0>;
>> + };
>> +
>> + uart0: uart at cc050000 {
>> + cell-index = <0>;
>> + compatible = "sirf,marco-uart";
>> + reg = <0xcc050000 0x1000>;
>> + interrupts = <0 17 0>;
>> + fifosize = <128>;
>> + status = "disabled";
>> + };
>> +
>> + uart1: uart at cc060000 {
>> + cell-index = <1>;
>> + compatible = "sirf,marco-uart";
>> + reg = <0xcc060000 0x1000>;
>> + interrupts = <0 18 0>;
>> + fifosize = <32>;
>> + status = "disabled";
>> + };
>> +
>> + uart2: uart at cc070000 {
>> + cell-index = <2>;
>> + compatible = "sirf,marco-uart";
>> + reg = <0xcc070000 0x1000>;
>> + interrupts = <0 19 0>;
>> + fifosize = <128>;
>> + status = "disabled";
>> + };
>> +
>> + uart3: uart at cc190000 {
>> + cell-index = <3>;
>> + compatible = "sirf,marco-uart";
>> + reg = <0xcc190000 0x1000>;
>> + interrupts = <0 66 0>;
>> + fifosize = <128>;
>> + status = "disabled";
>> + };
>> +
>> + uart4: uart at cc1a0000 {
>> + cell-index = <4>;
>> + compatible = "sirf,marco-uart";
>> + reg = <0xcc1a0000 0x1000>;
>> + interrupts = <0 69 0>;
>> + fifosize = <128>;
>> + status = "disabled";
>> + };
>> +
>> + usp0: usp at cc080000 {
>> + cell-index = <0>;
>> + compatible = "sirf,marco-usp";
>> + reg = <0xcc080000 0x10000>;
>> + interrupts = <0 20 0>;
>> + status = "disabled";
>> + };
>> +
>> + usp1: usp at cc090000 {
>> + cell-index = <1>;
>> + compatible = "sirf,marco-usp";
>> + reg = <0xcc090000 0x10000>;
>> + interrupts = <0 21 0>;
>> + status = "disabled";
>> + };
>> +
>> + usp2: usp at cc0a0000 {
>> + cell-index = <2>;
>> + compatible = "sirf,marco-usp";
>> + reg = <0xcc0a0000 0x10000>;
>> + interrupts = <0 22 0>;
>> + status = "disabled";
>> + };
>> +
>> + dmac0: dma-controller at cc0b0000 {
>> + cell-index = <0>;
>> + compatible = "sirf,marco-dmac";
>> + reg = <0xcc0b0000 0x10000>;
>> + interrupts = <0 12 0>;
>> + };
>> +
>> + dmac1: dma-controller at cc160000 {
>> + cell-index = <1>;
>> + compatible = "sirf,marco-dmac";
>> + reg = <0xcc160000 0x10000>;
>> + interrupts = <0 13 0>;
>> + };
>> +
>> + vip at cc0c0000 {
>> + compatible = "sirf,marco-vip";
>> + reg = <0xcc0c0000 0x10000>;
>> + };
>> +
>> + spi0: spi at cc0d0000 {
>> + cell-index = <0>;
>> + compatible = "sirf,marco-spi";
>> + reg = <0xcc0d0000 0x10000>;
>> + interrupts = <0 15 0>;
>> + sirf,spi-num-chipselects = <1>;
>> + cs-gpios = <&gpio 0 0>;
>> + sirf,spi-dma-rx-channel = <25>;
>> + sirf,spi-dma-tx-channel = <20>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "disabled";
>> + };
>> +
>> + spi1: spi at cc170000 {
>> + cell-index = <1>;
>> + compatible = "sirf,marco-spi";
>> + reg = <0xcc170000 0x10000>;
>> + interrupts = <0 16 0>;
>> + sirf,spi-num-chipselects = <1>;
>> + cs-gpios = <&gpio 0 0>;
>> + sirf,spi-dma-rx-channel = <12>;
>> + sirf,spi-dma-tx-channel = <13>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "disabled";
>> + };
>> +
>> + i2c0: i2c at cc0e0000 {
>> + cell-index = <0>;
>> + compatible = "sirf,marco-i2c";
>> + reg = <0xcc0e0000 0x10000>;
>> + interrupts = <0 24 0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "disabled";
>> + };
>> +
>> + i2c1: i2c at cc0f0000 {
>> + cell-index = <1>;
>> + compatible = "sirf,marco-i2c";
>> + reg = <0xcc0f0000 0x10000>;
>> + interrupts = <0 25 0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "disabled";
>> + };
>> +
>> + tsc at cc110000 {
>> + compatible = "sirf,marco-tsc";
>> + reg = <0xcc110000 0x10000>;
>> + interrupts = <0 33 0>;
>> + };
>> +
>> + gpio: pinctrl at cc120000 {
>> + #gpio-cells = <2>;
>> + #interrupt-cells = <2>;
>> + compatible = "sirf,marco-pinctrl";
>
> It would be nice if there were a patch adding the "sirf,marco-pinctrl"
> compatible string to the pinctrl/pinctrl-sirf.txt devicetree binding doc (given
> the pinctrl-sirf driver handles the string already).
yes. definitely there will be when i make pinctrl-sirf completely work
on marco, for the moment, it is not verifiable as pinmux is not
enabled in the fpga.
>
>> + reg = <0xcc120000 0x10000>;
>> + interrupts = <0 43 0>,
>> + <0 44 0>,
>> + <0 45 0>,
>> + <0 46 0>,
>> + <0 47 0>;
>> + gpio-controller;
>> + interrupt-controller;
>> +
>> + lcd_16pins_a: lcd0 at 0 {
>
> Is the lcd0 name special to the driver/subsystem?
>
> If not, it would be nice to change lcd0 at N to lcd0_N -- ePAPR says the
> unit-address should match the reg property, and if there's no reg property the
> unit-address must be omitted.
agree. it seems prima2.dtsi has the same issue. i'll have a fix for
prima2 as well.
we will still have some chances to change the pinmux mapping in the
marco.dtsi in the future with the fix of ic.
>
> The same goes for all the remaining nodes within gpio.
>
>> + lcd {
>> + sirf,pins = "lcd_16bitsgrp";
>> + sirf,function = "lcd_16bits";
>> + };
>> + };
>> + lcd_18pins_a: lcd0 at 1 {
>> + lcd {
>> + sirf,pins = "lcd_18bitsgrp";
>> + sirf,function = "lcd_18bits";
>> + };
>> + };
>> + lcd_24pins_a: lcd0 at 2 {
>> + lcd {
>> + sirf,pins = "lcd_24bitsgrp";
>> + sirf,function = "lcd_24bits";
>> + };
>> + };
>> + lcdrom_pins_a: lcdrom0 at 0 {
>> + lcd {
>> + sirf,pins = "lcdromgrp";
>> + sirf,function = "lcdrom";
>> + };
>> + };
>> + uart0_pins_a: uart0 at 0 {
>> + uart {
>> + sirf,pins = "uart0grp";
>> + sirf,function = "uart0";
>> + };
>> + };
>> + uart1_pins_a: uart1 at 0 {
>> + uart {
>> + sirf,pins = "uart1grp";
>> + sirf,function = "uart1";
>> + };
>> + };
>> + uart2_pins_a: uart2 at 0 {
>> + uart {
>> + sirf,pins = "uart2grp";
>> + sirf,function = "uart2";
>> + };
>> + };
>> + uart2_noflow_pins_a: uart2 at 1 {
>> + uart {
>> + sirf,pins = "uart2_nostreamctrlgrp";
>> + sirf,function = "uart2_nostreamctrl";
>> + };
>> + };
>> + spi0_pins_a: spi0 at 0 {
>> + spi {
>> + sirf,pins = "spi0grp";
>> + sirf,function = "spi0";
>> + };
>> + };
>> + spi1_pins_a: spi1 at 0 {
>> + spi {
>> + sirf,pins = "spi1grp";
>> + sirf,function = "spi1";
>> + };
>> + };
>> + i2c0_pins_a: i2c0 at 0 {
>> + i2c {
>> + sirf,pins = "i2c0grp";
>> + sirf,function = "i2c0";
>> + };
>> + };
>> + i2c1_pins_a: i2c1 at 0 {
>> + i2c {
>> + sirf,pins = "i2c1grp";
>> + sirf,function = "i2c1";
>> + };
>> + };
>> + pwm0_pins_a: pwm0 at 0 {
>> + pwm {
>> + sirf,pins = "pwm0grp";
>> + sirf,function = "pwm0";
>> + };
>> + };
>> + pwm1_pins_a: pwm1 at 0 {
>> + pwm {
>> + sirf,pins = "pwm1grp";
>> + sirf,function = "pwm1";
>> + };
>> + };
>> + pwm2_pins_a: pwm2 at 0 {
>> + pwm {
>> + sirf,pins = "pwm2grp";
>> + sirf,function = "pwm2";
>> + };
>> + };
>> + pwm3_pins_a: pwm3 at 0 {
>> + pwm {
>> + sirf,pins = "pwm3grp";
>> + sirf,function = "pwm3";
>> + };
>> + };
>> + gps_pins_a: gps at 0 {
>> + gps {
>> + sirf,pins = "gpsgrp";
>> + sirf,function = "gps";
>> + };
>> + };
>> + vip_pins_a: vip at 0 {
>> + vip {
>> + sirf,pins = "vipgrp";
>> + sirf,function = "vip";
>> + };
>> + };
>> + sdmmc0_pins_a: sdmmc0 at 0 {
>> + sdmmc0 {
>> + sirf,pins = "sdmmc0grp";
>> + sirf,function = "sdmmc0";
>> + };
>> + };
>> + sdmmc1_pins_a: sdmmc1 at 0 {
>> + sdmmc1 {
>> + sirf,pins = "sdmmc1grp";
>> + sirf,function = "sdmmc1";
>> + };
>> + };
>> + sdmmc2_pins_a: sdmmc2 at 0 {
>> + sdmmc2 {
>> + sirf,pins = "sdmmc2grp";
>> + sirf,function = "sdmmc2";
>> + };
>> + };
>> + sdmmc3_pins_a: sdmmc3 at 0 {
>> + sdmmc3 {
>> + sirf,pins = "sdmmc3grp";
>> + sirf,function = "sdmmc3";
>> + };
>> + };
>> + sdmmc4_pins_a: sdmmc4 at 0 {
>> + sdmmc4 {
>> + sirf,pins = "sdmmc4grp";
>> + sirf,function = "sdmmc4";
>> + };
>> + };
>> + sdmmc5_pins_a: sdmmc5 at 0 {
>> + sdmmc5 {
>> + sirf,pins = "sdmmc5grp";
>> + sirf,function = "sdmmc5";
>> + };
>> + };
>> + i2s_pins_a: i2s at 0 {
>> + i2s {
>> + sirf,pins = "i2sgrp";
>> + sirf,function = "i2s";
>> + };
>> + };
>> + ac97_pins_a: ac97 at 0 {
>> + ac97 {
>> + sirf,pins = "ac97grp";
>> + sirf,function = "ac97";
>> + };
>> + };
>> + nand_pins_a: nand at 0 {
>> + nand {
>> + sirf,pins = "nandgrp";
>> + sirf,function = "nand";
>> + };
>> + };
>> + usp0_pins_a: usp0 at 0 {
>> + usp0 {
>> + sirf,pins = "usp0grp";
>> + sirf,function = "usp0";
>> + };
>> + };
>> + usp1_pins_a: usp1 at 0 {
>> + usp1 {
>> + sirf,pins = "usp1grp";
>> + sirf,function = "usp1";
>> + };
>> + };
>> + usp2_pins_a: usp2 at 0 {
>> + usp2 {
>> + sirf,pins = "usp2grp";
>> + sirf,function = "usp2";
>> + };
>> + };
>> + usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus at 0 {
>> + usb0_utmi_drvbus {
>> + sirf,pins = "usb0_utmi_drvbusgrp";
>> + sirf,function = "usb0_utmi_drvbus";
>> + };
>> + };
>> + usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus at 0 {
>> + usb1_utmi_drvbus {
>> + sirf,pins = "usb1_utmi_drvbusgrp";
>> + sirf,function = "usb1_utmi_drvbus";
>> + };
>> + };
>> + warm_rst_pins_a: warm_rst at 0 {
>> + warm_rst {
>> + sirf,pins = "warm_rstgrp";
>> + sirf,function = "warm_rst";
>> + };
>> + };
>> + pulse_count_pins_a: pulse_count at 0 {
>> + pulse_count {
>> + sirf,pins = "pulse_countgrp";
>> + sirf,function = "pulse_count";
>> + };
>> + };
>> + cko0_rst_pins_a: cko0_rst at 0 {
>> + cko0_rst {
>> + sirf,pins = "cko0_rstgrp";
>> + sirf,function = "cko0_rst";
>> + };
>> + };
>> + cko1_rst_pins_a: cko1_rst at 0 {
>> + cko1_rst {
>> + sirf,pins = "cko1_rstgrp";
>> + sirf,function = "cko1_rst";
>> + };
>> + };
>> + };
>> +
>> + pwm at cc130000 {
>> + compatible = "sirf,marco-pwm";
>> + reg = <0xcc130000 0x10000>;
>> + };
>> +
>> + efusesys at cc140000 {
>> + compatible = "sirf,marco-efuse";
>> + reg = <0xcc140000 0x10000>;
>> + };
>> +
>> + pulsec at cc150000 {
>> + compatible = "sirf,marco-pulsec";
>> + reg = <0xcc150000 0x10000>;
>> + interrupts = <0 48 0>;
>> + };
>> +
>> + pci-iobg {
>> + compatible = "sirf,marco-pciiobg", "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0xcd000000 0xcd000000 0x1000000>;
>> +
>> + sd0: sdhci at cd000000 {
>> + cell-index = <0>;
>> + compatible = "sirf,marco-sdhc";
>> + reg = <0xcd000000 0x100000>;
>> + interrupts = <0 38 0>;
>> + status = "disabled";
>> + };
>> +
>> + sd1: sdhci at cd100000 {
>> + cell-index = <1>;
>> + compatible = "sirf,marco-sdhc";
>> + reg = <0xcd100000 0x100000>;
>> + interrupts = <0 38 0>;
>> + status = "disabled";
>> + };
>> +
>> + sd2: sdhci at cd200000 {
>> + cell-index = <2>;
>> + compatible = "sirf,marco-sdhc";
>> + reg = <0xcd200000 0x100000>;
>> + interrupts = <0 23 0>;
>> + status = "disabled";
>> + };
>> +
>> + sd3: sdhci at cd300000 {
>> + cell-index = <3>;
>> + compatible = "sirf,marco-sdhc";
>> + reg = <0xcd300000 0x100000>;
>> + interrupts = <0 23 0>;
>> + status = "disabled";
>> + };
>> +
>> + sd4: sdhci at cd400000 {
>> + cell-index = <4>;
>> + compatible = "sirf,marco-sdhc";
>> + reg = <0xcd400000 0x100000>;
>> + interrupts = <0 39 0>;
>> + status = "disabled";
>> + };
>> +
>> + sd5: sdhci at cd500000 {
>> + cell-index = <5>;
>> + compatible = "sirf,marco-sdhc";
>> + reg = <0xcd500000 0x100000>;
>> + interrupts = <0 39 0>;
>> + status = "disabled";
>> + };
>> +
>> + pci-copy at cd900000 {
>> + compatible = "sirf,marco-pcicp";
>> + reg = <0xcd900000 0x100000>;
>> + interrupts = <0 40 0>;
>> + };
>> +
>> + rom-interface at cda00000 {
>> + compatible = "sirf,marco-romif";
>> + reg = <0xcda00000 0x100000>;
>> + };
>> + };
>> + };
>> +
>> + rtc-iobg {
>> + compatible = "sirf,marco-rtciobg", "sirf-marco-rtciobg-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + reg = <0xc1000000 0x10000>;
>> +
>> + gpsrtc at 1000 {
>> + compatible = "sirf,marco-gpsrtc";
>> + reg = <0x1000 0x1000>;
>> + interrupts = <0 55 0>,
>> + <0 56 0>,
>> + <0 57 0>;
>> + };
>> +
>> + sysrtc at 2000 {
>> + compatible = "sirf,marco-sysrtc";
>> + reg = <0x2000 0x1000>;
>> + interrupts = <0 52 0>,
>> + <0 53 0>,
>> + <0 54 0>;
>> + };
>> +
>> + pwrc at 3000 {
>> + compatible = "sirf,marco-pwrc";
>> + reg = <0x3000 0x1000>;
>> + interrupts = <0 32 0>;
>> + };
>> + };
>> +
>> + uus-iobg {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0xce000000 0xce000000 0x1000000>;
>> +
>> + usb0: usb at ce000000 {
>> + compatible = "chipidea,ci13611a-marco";
>> + reg = <0xce000000 0x10000>;
>> + interrupts = <0 10 0>;
>> + };
>> +
>> + usb1: usb at ce010000 {
>> + compatible = "chipidea,ci13611a-marco";
>> + reg = <0xce010000 0x10000>;
>> + interrupts = <0 11 0>;
>> + };
>> +
>> + security at ce020000 {
>> + compatible = "sirf,marco-security";
>> + reg = <0xce020000 0x10000>;
>> + interrupts = <0 42 0>;
>> + };
>> + };
>> +
>> + can-iobg {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0xd0000000 0xd0000000 0x1000000>;
>> +
>> + can0: can at d0000000 {
>> + compatible = "sirf,marco-can";
>> + reg = <0xd0000000 0x10000>;
>> + };
>> +
>> + can1: can at d0010000 {
>> + compatible = "sirf,marco-can";
>> + reg = <0xd0010000 0x10000>;
>> + };
>> + };
>> +
>> + lvds-iobg {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0xd1000000 0xd1000000 0x1000000>;
>> +
>> + lvds at d1000000 {
>> + compatible = "sirf,marco-lvds";
>> + reg = <0xd1000000 0x10000>;
>> + interrupts = <0 64 0>;
>> + };
>> + };
>> + };
>> +};
>
> If you're able to deal with all that, you can add:
>
> Reviewed-by: Mark Rutland <mark.rutland@arm.com>
>
> For the compatible strings, it would be good if those devices which need
> special treatment compared to prima2 (and thus can't fall back on the prima2
> compatible strings) were listed in the commit message to aid review. Either
> that or list the ones which are compatible, whichever list is shorter.
yes. almost all can handled except some detailed and compatible
hardware isssues, as i want to leave them to the day ic is fixed and
related drivers are begun.
for the moment, building the infrasture is necessary as other teams
can build their drivers and verified apps on it.
>
> Thanks,
> Mark.
>
-barry
^ permalink raw reply
* [PATCH v2 1/1] usb: chipidea: imx: Add system suspend/resume API
From: Peter Chen @ 2013-01-21 2:30 UTC (permalink / raw)
To: linux-arm-kernel
During the system suspend/resume procedure, the USB also
needs to go suspend/resume procedure, this patch adds
related APIs. It is tested at i.mx6q sabrelite. Meanwhile,
it fixes the bug that the USB will out of work after
system suspend/resume.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
---
Changes for v2:
- Add tested-by from Shawn Guo
- Using dev_get_drvdata to get driver data
drivers/usb/chipidea/bits.h | 1 +
drivers/usb/chipidea/ci13xxx_imx.c | 59 ++++++++++++++++++++++++++++++++++++
2 files changed, 60 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/chipidea/bits.h b/drivers/usb/chipidea/bits.h
index ba9c6ef..d1467bb 100644
--- a/drivers/usb/chipidea/bits.h
+++ b/drivers/usb/chipidea/bits.h
@@ -47,6 +47,7 @@
#define PORTSC_FPR BIT(6)
#define PORTSC_SUSP BIT(7)
#define PORTSC_HSP BIT(9)
+#define PORTSC_PHCD BIT(23) /* phy suspend mode */
#define PORTSC_PTC (0x0FUL << 16)
/* DEVLC */
diff --git a/drivers/usb/chipidea/ci13xxx_imx.c b/drivers/usb/chipidea/ci13xxx_imx.c
index 342eab0..ff11cee 100644
--- a/drivers/usb/chipidea/ci13xxx_imx.c
+++ b/drivers/usb/chipidea/ci13xxx_imx.c
@@ -25,6 +25,7 @@
#include <linux/mfd/syscon.h>
#include "ci.h"
+#include "bits.h"
#include "ci13xxx_imx.h"
#define pdev_to_phy(pdev) \
@@ -321,6 +322,61 @@ static int ci13xxx_imx_remove(struct platform_device *pdev)
return 0;
}
+#ifdef CONFIG_PM
+static int ci13xxx_imx_suspend(struct device *dev)
+{
+ struct ci13xxx_imx_data *data = dev_get_drvdata(dev);
+ struct platform_device *plat_ci;
+ struct ci13xxx *ci;
+
+ plat_ci = data->ci_pdev;
+ ci = platform_get_drvdata(plat_ci);
+
+ hw_write(ci, OP_PORTSC, PORTSC_PHCD, PORTSC_PHCD);
+
+ if (data->phy)
+ usb_phy_set_suspend(data->phy, 1);
+
+ clk_disable_unprepare(data->clk);
+
+ return 0;
+}
+
+static int ci13xxx_imx_resume(struct device *dev)
+{
+ int ret;
+ struct ci13xxx_imx_data *data = dev_get_drvdata(dev);
+ struct platform_device *plat_ci;
+ struct ci13xxx *ci;
+
+ plat_ci = data->ci_pdev;
+ ci = platform_get_drvdata(plat_ci);
+
+ ret = clk_prepare_enable(data->clk);
+ if (ret) {
+ dev_err(dev,
+ "Failed to prepare or enable clock, err=%d\n", ret);
+ return ret;
+ }
+
+ if (hw_read(ci, OP_PORTSC, PORTSC_PHCD)) {
+ hw_write(ci, OP_PORTSC, PORTSC_PHCD, 0);
+ /* Some clks sync between Controller and USB PHY */
+ mdelay(1);
+ }
+
+ if (data->phy)
+ usb_phy_set_suspend(data->phy, 0);
+
+ return ret;
+}
+
+static const struct dev_pm_ops ci13xxx_imx_pm_ops = {
+ .suspend = ci13xxx_imx_suspend,
+ .resume = ci13xxx_imx_resume,
+};
+#endif
+
static const struct of_device_id ci13xxx_imx_dt_ids[] = {
{ .compatible = "fsl,imx27-usb", },
{ /* sentinel */ }
@@ -334,6 +390,9 @@ static struct platform_driver ci13xxx_imx_driver = {
.name = "imx_usb",
.owner = THIS_MODULE,
.of_match_table = ci13xxx_imx_dt_ids,
+#ifdef CONFIG_PM
+ .pm = &ci13xxx_imx_pm_ops,
+#endif
},
};
--
1.7.0.4
^ permalink raw reply related
* [GIT PULL] Renesas ARM-based SoC v3.9
From: Olof Johansson @ 2013-01-21 2:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130121003237.GA2639@verge.net.au>
On Sun, Jan 20, 2013 at 4:32 PM, Simon Horman <horms@verge.net.au> wrote:
> On Wed, Jan 16, 2013 at 03:37:53PM +0900, Simon Horman wrote:
>> Hi Olof, Hi Arnd,
>>
>> I have some complex dependencies for mach-shmobile for v3.9
>> and as such I am sending this email outline the dependencies
>> of branches on each other. I have also included the multiple
>> pull requests below though I am happy to post them
>> individually including the patches they comprise if you
>> have no objections to the way the branch dependencies are arranged.
>>
>> I would also be happy to supply a single branch with all changes
>> with or without merge commits.
>>
>> All branches are present in the renesas tree
>> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git
>
> Ping.
I replied 4 days ago, did you not get that?
-Olof
^ permalink raw reply
* [RESEND PATCH v5 7/7] usb: chipidea: imx: add internal vbus regulator control
From: Peter Chen @ 2013-01-21 1:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358733418-17969-1-git-send-email-peter.chen@freescale.com>
- For host, the vbus should always be on.
- For otg, the vbus is off defaultly, the vbus needs to be
turned on/off when usb role switches.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
---
drivers/usb/chipidea/ci.h | 2 +
drivers/usb/chipidea/ci13xxx_imx.c | 80 ++++++++++++++++++++++++++++--------
2 files changed, 64 insertions(+), 18 deletions(-)
diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index 00939e6..342b430 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -135,6 +135,7 @@ struct hw_bank {
* @hcd: pointer to usb_hcd for ehci host driver
* @otg: for otg support
* @events: events for otg, and handled at ci_role_work
+ * @reg_vbus: used to control internal vbus regulator
*/
struct ci13xxx {
struct device *dev;
@@ -174,6 +175,7 @@ struct ci13xxx {
struct usb_otg otg;
bool id_event;
bool b_sess_valid_event;
+ struct regulator *reg_vbus;
};
static inline struct ci_role_driver *ci_role(struct ci13xxx *ci)
diff --git a/drivers/usb/chipidea/ci13xxx_imx.c b/drivers/usb/chipidea/ci13xxx_imx.c
index 3b91ff4..4c9df98 100644
--- a/drivers/usb/chipidea/ci13xxx_imx.c
+++ b/drivers/usb/chipidea/ci13xxx_imx.c
@@ -88,14 +88,47 @@ EXPORT_SYMBOL_GPL(usbmisc_get_init_data);
static struct ci13xxx_platform_data ci13xxx_imx_platdata = {
.name = "ci13xxx_imx",
.flags = CI13XXX_REQUIRE_TRANSCEIVER |
- CI13XXX_DISABLE_STREAMING,
+ CI13XXX_DISABLE_STREAMING |
+ CI13XXX_REGS_SHARED,
.capoffset = DEF_CAPOFFSET,
};
+static int ci13xxx_otg_set_vbus(struct usb_otg *otg, bool enabled)
+{
+ struct ci13xxx *ci = container_of(otg, struct ci13xxx, otg);
+ struct regulator *reg_vbus = ci->reg_vbus;
+ int ret;
+
+ WARN_ON(!reg_vbus);
+
+ if (reg_vbus) {
+ if (enabled) {
+ ret = regulator_enable(reg_vbus);
+ if (ret) {
+ dev_err(ci->dev,
+ "Failed to enable vbus regulator, ret=%d\n",
+ ret);
+ return ret;
+ }
+ } else {
+ ret = regulator_disable(reg_vbus);
+ if (ret) {
+ dev_err(ci->dev,
+ "Failed to disable vbus regulator, ret=%d\n",
+ ret);
+ return ret;
+ }
+ }
+ }
+
+ return 0;
+}
+
static int ci13xxx_imx_probe(struct platform_device *pdev)
{
struct ci13xxx_imx_data *data;
struct platform_device *plat_ci, *phy_pdev;
+ struct ci13xxx *ci;
struct device_node *phy_np;
struct resource *res;
struct regulator *reg_vbus;
@@ -152,20 +185,11 @@ static int ci13xxx_imx_probe(struct platform_device *pdev)
}
}
- /* we only support host now, so enable vbus here */
reg_vbus = devm_regulator_get(&pdev->dev, "vbus");
- if (!IS_ERR(reg_vbus)) {
- ret = regulator_enable(reg_vbus);
- if (ret) {
- dev_err(&pdev->dev,
- "Failed to enable vbus regulator, err=%d\n",
- ret);
- goto put_np;
- }
+ if (!IS_ERR(reg_vbus))
data->reg_vbus = reg_vbus;
- } else {
+ else
reg_vbus = NULL;
- }
ci13xxx_imx_platdata.phy = data->phy;
@@ -175,7 +199,7 @@ static int ci13xxx_imx_probe(struct platform_device *pdev)
if (!pdev->dev.dma_mask) {
ret = -ENOMEM;
dev_err(&pdev->dev, "Failed to alloc dma_mask!\n");
- goto err;
+ goto put_np;
}
*pdev->dev.dma_mask = DMA_BIT_MASK(32);
dma_set_coherent_mask(&pdev->dev, *pdev->dev.dma_mask);
@@ -186,7 +210,7 @@ static int ci13xxx_imx_probe(struct platform_device *pdev)
if (ret) {
dev_err(&pdev->dev,
"usbmisc init failed, ret=%d\n", ret);
- goto err;
+ goto put_np;
}
}
@@ -198,24 +222,44 @@ static int ci13xxx_imx_probe(struct platform_device *pdev)
dev_err(&pdev->dev,
"Can't register ci_hdrc platform device, err=%d\n",
ret);
- goto err;
+ goto put_np;
}
data->ci_pdev = plat_ci;
platform_set_drvdata(pdev, data);
+ ci = platform_get_drvdata(plat_ci);
+ /*
+ * Internal vbus on/off policy
+ * - Always on for host only function
+ * - Always off for gadget only function
+ * - call otg.set_vbus to control on/off according usb role
+ */
+
+ if (ci->roles[CI_ROLE_HOST] && !ci->roles[CI_ROLE_GADGET]
+ && reg_vbus) {
+ ret = regulator_enable(reg_vbus);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "Failed to enable vbus regulator, ret=%d\n",
+ ret);
+ goto put_np;
+ }
+ } else if (ci->is_otg) {
+ ci->otg.set_vbus = ci13xxx_otg_set_vbus;
+ ci->reg_vbus = data->reg_vbus;
+ }
+
pm_runtime_no_callbacks(&pdev->dev);
pm_runtime_enable(&pdev->dev);
return 0;
-err:
- if (reg_vbus)
- regulator_disable(reg_vbus);
put_np:
if (phy_np)
of_node_put(phy_np);
clk_disable_unprepare(data->clk);
+
return ret;
}
--
1.7.0.4
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