* [PATCH v2] mm: dmapool: use provided gfp flags for all dma_alloc_coherent() calls
From: Andrew Lunn @ 2013-01-23 18:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <51001BEE.9020201@web.de>
> >>
> >
> >Now (in the last hour) stable, occasionally lower numbers:
> >3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
> >3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
> >3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
> >3396 3396 3396 3396 3396 3396 3396 3396 3396 3365 3396 3394 3396 3396
> >3396 3396 3373 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
> >3396 3353 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
> >3394 3396 3396 3396 3396 3396 3396 3396
> >
> >Before the last pool exhaustion going down:
> >3395 3395 3389 3379 3379 3374 3367 3360 3352 3343 3343 3343 3342 3336
> >3332 3324 3318 3314 3310 3307 3305 3299 3290 3283 3279 3272 3266 3265
> >3247 3247 3247 3242 3236 3236
> >
> Here I stopped vdr (and so closed all dvb_demux devices), the number
> was remaining the same 3236, even after restart of vdr (and restart
> of streaming).
So it does suggest a leak. Probably somewhere on an error path,
e.g. its lost video sync.
Andrew
^ permalink raw reply
* [PATCH v2 2/3] arm: mvebu: Enable USB controllers on Armada 370/XP boards
From: Ezequiel Garcia @ 2013-01-23 18:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130123190352.2d001218@skate>
Hi Thomas,
On Wed, Jan 23, 2013 at 3:03 PM, Thomas Petazzoni
<thomas.petazzoni@free-electrons.com> wrote:
> On Wed, 23 Jan 2013 14:04:42 -0300, Ezequiel Garcia wrote:
>
>> from the OpenBlocks AX3-4 board dts file, since you mentioned this
>> board uses that USB
>> port for a PCIe connector -- if I understood correctly.
>
> No. The OpenBlocks has a different USB controller that sits on the PCIe
> bus. There is nothing like a PCIe port that uses a USB port, that
> doesn't make sense.
>
Mmm... indeed, I got it completely wrong.
>> So, IMHO, if OpenBlocks uses third USB port to connect some PCIe
>> controller, we should activate it in the dts file.
>>
>> What do you think?
>
> No, see above.
>
So, what do you think about the patch series to be pushed as it is?
--
Ezequiel
^ permalink raw reply
* [GIT PULL] psci client-side implementation for 3.9
From: Will Deacon @ 2013-01-23 18:05 UTC (permalink / raw)
To: linux-arm-kernel
Hello again guys,
Please pull my PSCI client-side implementation for 3.9. This is used by
the mach-virt platform, for which I'll send another pull request later
on (since there are some timer dependencies that need resolving first).
As before, I'll keep this branch stable so others can base against it.
Thanks,
Will
--->8
The following changes since commit 9931faca02c604c22335f5a935a501bb2ace6e20:
Linux 3.8-rc3 (2013-01-09 18:59:55 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git for-rmk/virt/psci
for you to fetch changes up to 2bdd424f26be1c98b6e3d9acfffb5559c131c888:
ARM: psci: add support for PSCI invocations from the kernel (2013-01-10 21:10:20 +0000)
----------------------------------------------------------------
Will Deacon (4):
ARM: opcodes: add missing include of linux/linkage.h
ARM: opcodes: add opcodes definitions for ARM security extensions
ARM: psci: add devicetree binding for describing PSCI firmware
ARM: psci: add support for PSCI invocations from the kernel
Documentation/devicetree/bindings/arm/psci.txt | 55 ++++++++++++++++++++++++++++++++++++++++++++++++
arch/arm/Kconfig | 10 +++++++++
arch/arm/include/asm/opcodes-sec.h | 24 +++++++++++++++++++++
arch/arm/include/asm/opcodes.h | 1 +
arch/arm/include/asm/psci.h | 36 +++++++++++++++++++++++++++++++
arch/arm/kernel/Makefile | 1 +
arch/arm/kernel/psci.c | 211 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
7 files changed, 338 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/psci.txt
create mode 100644 arch/arm/include/asm/opcodes-sec.h
create mode 100644 arch/arm/include/asm/psci.h
create mode 100644 arch/arm/kernel/psci.c
^ permalink raw reply
* [PATCH v2 2/3] arm: mvebu: Enable USB controllers on Armada 370/XP boards
From: Thomas Petazzoni @ 2013-01-23 18:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CALF0-+XJEXJ2B3NLu5DvyxaDuuMNP=zk+z8QUd4GTQULW3BpyA@mail.gmail.com>
Dear Ezequiel Garcia,
On Wed, 23 Jan 2013 14:04:42 -0300, Ezequiel Garcia wrote:
> from the OpenBlocks AX3-4 board dts file, since you mentioned this
> board uses that USB
> port for a PCIe connector -- if I understood correctly.
No. The OpenBlocks has a different USB controller that sits on the PCIe
bus. There is nothing like a PCIe port that uses a USB port, that
doesn't make sense.
> So, IMHO, if OpenBlocks uses third USB port to connect some PCIe
> controller, we should activate it in the dts file.
>
> What do you think?
No, see above.
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [GIT PULL] perf updates for 3.9
From: Will Deacon @ 2013-01-23 18:03 UTC (permalink / raw)
To: linux-arm-kernel
Hi Russell, Arnd, Olof,
Please can you pull these perf updates for 3.9? They should go via both
rmk and arm-soc as they are a dependency for kvm and some Tegra SCU
stuff. I'll keep this branch stable, so others can base against it if
they like.
Cheers,
Will
--->8
The following changes since commit 9931faca02c604c22335f5a935a501bb2ace6e20:
Linux 3.8-rc3 (2013-01-09 18:59:55 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git for-rmk/perf
for you to fetch changes up to 9dcbf466559f6f2f55d60eb5a1bbebc8e694b52a:
ARM: perf: simplify __hw_perf_event_init err handling (2013-01-18 16:54:30 +0000)
----------------------------------------------------------------
Christoffer Dall (2):
ARM: Define CPU part numbers and implementors
ARM: Use implementor and part defines from cputype.h
Mark Rutland (3):
ARM: perf: handle armpmu_register failing
ARM: perf: remove unnecessary checks for idx < 0
ARM: perf: simplify __hw_perf_event_init err handling
Will Deacon (2):
ARM: perf: remove redundant NULL check on cpu_pmu
ARM: perf: don't pretend to support counting of L1I writes
arch/arm/include/asm/cputype.h | 33 +++++++++++++++++++++++++++++++++
arch/arm/kernel/perf_event.c | 16 +++-------------
arch/arm/kernel/perf_event_cpu.c | 51 +++++++++++++++++++++++++++------------------------
arch/arm/kernel/perf_event_v6.c | 4 ++--
arch/arm/kernel/perf_event_v7.c | 18 +++++++++---------
arch/arm/kernel/perf_event_xscale.c | 2 +-
6 files changed, 75 insertions(+), 49 deletions(-)
^ permalink raw reply
* [GIT PULL] hyp-boot updates for 3.9
From: Will Deacon @ 2013-01-23 18:00 UTC (permalink / raw)
To: linux-arm-kernel
Hi Russell,
Here is the other half of my hyp-boot collection (you took the first
half as fixes for 3.8), targetted for 3.9.
Cheers,
Will
--->8
The following changes since commit 9931faca02c604c22335f5a935a501bb2ace6e20:
Linux 3.8-rc3 (2013-01-09 18:59:55 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git for-rmk/virt/hyp-boot/updates
for you to fetch changes up to 651134b01240aad44a0eed141e946d835aa93579:
ARM: virt: hide CONFIG_ARM_VIRT_EXT from user (2013-01-10 21:09:33 +0000)
----------------------------------------------------------------
Russell King (1):
ARM: virt: avoid clobbering lr when forcing svc mode
Will Deacon (2):
ARM: virt: use PSR_N_BIT for detecting boot CPU mode mismatch
ARM: virt: hide CONFIG_ARM_VIRT_EXT from user
arch/arm/include/asm/assembler.h | 10 +++-------
arch/arm/include/asm/virt.h | 4 ++--
arch/arm/mm/Kconfig | 10 +++-------
3 files changed, 8 insertions(+), 16 deletions(-)
^ permalink raw reply
* [PATCH 4/4] irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
From: Catalin Marinas @ 2013-01-23 17:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358963974-5496-1-git-send-email-catalin.marinas@arm.com>
All the calls to gic_secondary_init() pass 0 as the first argument.
Since this function is called on each CPU when starting, it can be done
in a platform-independent way via a CPU notifier registered by the GIC
code.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Simon Horman <horms@verge.net.au>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
---
Randomly chosen CPU notifier priority. I can add a definition somewhere
though they don't seem to be used much and cause conflicts.
arch/arm/mach-exynos/platsmp.c | 8 --------
arch/arm/mach-highbank/platsmp.c | 7 -------
arch/arm/mach-imx/platsmp.c | 12 ------------
arch/arm/mach-msm/platsmp.c | 8 --------
arch/arm/mach-omap2/omap-smp.c | 7 -------
arch/arm/mach-shmobile/smp-emev2.c | 7 -------
arch/arm/mach-shmobile/smp-r8a7779.c | 7 -------
arch/arm/mach-shmobile/smp-sh73a0.c | 7 -------
arch/arm/mach-socfpga/platsmp.c | 12 ------------
arch/arm/mach-spear13xx/platsmp.c | 8 --------
arch/arm/mach-tegra/platsmp.c | 8 --------
arch/arm/mach-ux500/platsmp.c | 8 --------
arch/arm/plat-versatile/platsmp.c | 8 --------
drivers/irqchip/irq-gic.c | 28 +++++++++++++++++++++-------
include/linux/irqchip/arm-gic.h | 1 -
15 files changed, 21 insertions(+), 115 deletions(-)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index a083e05..a0e8ff7 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -20,7 +20,6 @@
#include <linux/jiffies.h>
#include <linux/smp.h>
#include <linux/io.h>
-#include <linux/irqchip/arm-gic.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
@@ -77,13 +76,6 @@ static DEFINE_SPINLOCK(boot_lock);
static void __cpuinit exynos_secondary_init(unsigned int cpu)
{
/*
- * if any interrupts are already enabled for the primary
- * core (e.g. timer irq), then they will not have been enabled
- * for us: do so
- */
- gic_secondary_init(0);
-
- /*
* let the primary processor know we're out of the
* pen, then head off into the C entry point
*/
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c
index 8797a70..a984573 100644
--- a/arch/arm/mach-highbank/platsmp.c
+++ b/arch/arm/mach-highbank/platsmp.c
@@ -17,7 +17,6 @@
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/io.h>
-#include <linux/irqchip/arm-gic.h>
#include <asm/smp_scu.h>
@@ -25,11 +24,6 @@
extern void secondary_startup(void);
-static void __cpuinit highbank_secondary_init(unsigned int cpu)
-{
- gic_secondary_init(0);
-}
-
static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
highbank_set_cpu_jump(cpu, secondary_startup);
@@ -67,7 +61,6 @@ static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)
struct smp_operations highbank_smp_ops __initdata = {
.smp_init_cpus = highbank_smp_init_cpus,
.smp_prepare_cpus = highbank_smp_prepare_cpus,
- .smp_secondary_init = highbank_secondary_init,
.smp_boot_secondary = highbank_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_die = highbank_cpu_die,
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index b2872ec..7f63dda 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -12,7 +12,6 @@
#include <linux/init.h>
#include <linux/smp.h>
-#include <linux/irqchip/arm-gic.h>
#include <asm/page.h>
#include <asm/smp_scu.h>
#include <asm/mach/map.h>
@@ -42,16 +41,6 @@ void __init imx_scu_map_io(void)
scu_base = IMX_IO_ADDRESS(base);
}
-static void __cpuinit imx_secondary_init(unsigned int cpu)
-{
- /*
- * if any interrupts are already enabled for the primary
- * core (e.g. timer irq), then they will not have been enabled
- * for us: do so
- */
- gic_secondary_init(0);
-}
-
static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
imx_set_cpu_jump(cpu, v7_secondary_startup);
@@ -86,7 +75,6 @@ static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
struct smp_operations imx_smp_ops __initdata = {
.smp_init_cpus = imx_smp_init_cpus,
.smp_prepare_cpus = imx_smp_prepare_cpus,
- .smp_secondary_init = imx_secondary_init,
.smp_boot_secondary = imx_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_die = imx_cpu_die,
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 42932865..00cdb0a 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -15,7 +15,6 @@
#include <linux/jiffies.h>
#include <linux/smp.h>
#include <linux/io.h>
-#include <linux/irqchip/arm-gic.h>
#include <asm/cacheflush.h>
#include <asm/cputype.h>
@@ -42,13 +41,6 @@ static inline int get_core_count(void)
static void __cpuinit msm_secondary_init(unsigned int cpu)
{
/*
- * if any interrupts are already enabled for the primary
- * core (e.g. timer irq), then they will not have been enabled
- * for us: do so
- */
- gic_secondary_init(0);
-
- /*
* let the primary processor know we're out of the
* pen, then head off into the C entry point
*/
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 3616779..c6ce880 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -67,13 +67,6 @@ static void __cpuinit omap4_secondary_init(unsigned int cpu)
4, 0, 0, 0, 0, 0);
/*
- * If any interrupts are already enabled for the primary
- * core (e.g. timer irq), then they will not have been enabled
- * for us: do so
- */
- gic_secondary_init(0);
-
- /*
* Synchronise with the boot thread.
*/
spin_lock(&boot_lock);
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index 953eb1f..384e27d 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -23,7 +23,6 @@
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/delay.h>
-#include <linux/irqchip/arm-gic.h>
#include <mach/common.h>
#include <mach/emev2.h>
#include <asm/smp_plat.h>
@@ -85,11 +84,6 @@ static int __maybe_unused emev2_cpu_kill(unsigned int cpu)
}
-static void __cpuinit emev2_secondary_init(unsigned int cpu)
-{
- gic_secondary_init(0);
-}
-
static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
cpu = cpu_logical_map(cpu);
@@ -124,7 +118,6 @@ static void __init emev2_smp_init_cpus(void)
struct smp_operations emev2_smp_ops __initdata = {
.smp_init_cpus = emev2_smp_init_cpus,
.smp_prepare_cpus = emev2_smp_prepare_cpus,
- .smp_secondary_init = emev2_secondary_init,
.smp_boot_secondary = emev2_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_kill = emev2_cpu_kill,
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 3a4acf2..9949065 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -23,7 +23,6 @@
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/delay.h>
-#include <linux/irqchip/arm-gic.h>
#include <mach/common.h>
#include <mach/r8a7779.h>
#include <asm/smp_plat.h>
@@ -132,11 +131,6 @@ static int __maybe_unused r8a7779_cpu_kill(unsigned int cpu)
}
-static void __cpuinit r8a7779_secondary_init(unsigned int cpu)
-{
- gic_secondary_init(0);
-}
-
static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
struct r8a7779_pm_ch *ch = NULL;
@@ -186,7 +180,6 @@ static void __init r8a7779_smp_init_cpus(void)
struct smp_operations r8a7779_smp_ops __initdata = {
.smp_init_cpus = r8a7779_smp_init_cpus,
.smp_prepare_cpus = r8a7779_smp_prepare_cpus,
- .smp_secondary_init = r8a7779_secondary_init,
.smp_boot_secondary = r8a7779_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_kill = r8a7779_cpu_kill,
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 9812ea3..f3b4912 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -23,7 +23,6 @@
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/delay.h>
-#include <linux/irqchip/arm-gic.h>
#include <mach/common.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
@@ -59,11 +58,6 @@ static unsigned int __init sh73a0_get_core_count(void)
return scu_get_core_count(scu_base);
}
-static void __cpuinit sh73a0_secondary_init(unsigned int cpu)
-{
- gic_secondary_init(0);
-}
-
static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
cpu = cpu_logical_map(cpu);
@@ -138,7 +132,6 @@ static void sh73a0_cpu_die(unsigned int cpu)
struct smp_operations sh73a0_smp_ops __initdata = {
.smp_init_cpus = sh73a0_smp_init_cpus,
.smp_prepare_cpus = sh73a0_smp_prepare_cpus,
- .smp_secondary_init = sh73a0_secondary_init,
.smp_boot_secondary = sh73a0_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_kill = sh73a0_cpu_kill,
diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c
index 4e9e69d..4b468ef 100644
--- a/arch/arm/mach-socfpga/platsmp.c
+++ b/arch/arm/mach-socfpga/platsmp.c
@@ -22,7 +22,6 @@
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
-#include <linux/irqchip/arm-gic.h>
#include <asm/cacheflush.h>
#include <asm/smp_scu.h>
@@ -33,16 +32,6 @@
extern void __iomem *sys_manager_base_addr;
extern void __iomem *rst_manager_base_addr;
-static void __cpuinit socfpga_secondary_init(unsigned int cpu)
-{
- /*
- * if any interrupts are already enabled for the primary
- * core (e.g. timer irq), then they will not have been enabled
- * for us: do so
- */
- gic_secondary_init(0);
-}
-
static int __cpuinit socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
@@ -106,7 +95,6 @@ static void socfpga_cpu_die(unsigned int cpu)
struct smp_operations socfpga_smp_ops __initdata = {
.smp_init_cpus = socfpga_smp_init_cpus,
.smp_prepare_cpus = socfpga_smp_prepare_cpus,
- .smp_secondary_init = socfpga_secondary_init,
.smp_boot_secondary = socfpga_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_die = socfpga_cpu_die,
diff --git a/arch/arm/mach-spear13xx/platsmp.c b/arch/arm/mach-spear13xx/platsmp.c
index af4ade6..551c69c 100644
--- a/arch/arm/mach-spear13xx/platsmp.c
+++ b/arch/arm/mach-spear13xx/platsmp.c
@@ -15,7 +15,6 @@
#include <linux/jiffies.h>
#include <linux/io.h>
#include <linux/smp.h>
-#include <linux/irqchip/arm-gic.h>
#include <asm/cacheflush.h>
#include <asm/smp_scu.h>
#include <mach/spear.h>
@@ -28,13 +27,6 @@ static void __iomem *scu_base = IOMEM(VA_SCU_BASE);
static void __cpuinit spear13xx_secondary_init(unsigned int cpu)
{
/*
- * if any interrupts are already enabled for the primary
- * core (e.g. timer irq), then they will not have been enabled
- * for us: do so
- */
- gic_secondary_init(0);
-
- /*
* let the primary processor know we're out of the
* pen, then head off into the C entry point
*/
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index c72e249..dea94d2 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -18,7 +18,6 @@
#include <linux/jiffies.h>
#include <linux/smp.h>
#include <linux/io.h>
-#include <linux/irqchip/arm-gic.h>
#include <linux/clk/tegra.h>
#include <asm/cacheflush.h>
@@ -45,13 +44,6 @@ static void __iomem *scu_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE);
static void __cpuinit tegra_secondary_init(unsigned int cpu)
{
- /*
- * if any interrupts are already enabled for the primary
- * core (e.g. timer irq), then they will not have been enabled
- * for us: do so
- */
- gic_secondary_init(0);
-
cpumask_set_cpu(cpu, &tegra_cpu_init_mask);
}
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index b8adac9..b4d0735 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -16,7 +16,6 @@
#include <linux/device.h>
#include <linux/smp.h>
#include <linux/io.h>
-#include <linux/irqchip/arm-gic.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
@@ -55,13 +54,6 @@ static DEFINE_SPINLOCK(boot_lock);
static void __cpuinit ux500_secondary_init(unsigned int cpu)
{
/*
- * if any interrupts are already enabled for the primary
- * core (e.g. timer irq), then they will not have been enabled
- * for us: do so
- */
- gic_secondary_init(0);
-
- /*
* let the primary processor know we're out of the
* pen, then head off into the C entry point
*/
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c
index f2ac155..1e1b2d7 100644
--- a/arch/arm/plat-versatile/platsmp.c
+++ b/arch/arm/plat-versatile/platsmp.c
@@ -14,7 +14,6 @@
#include <linux/device.h>
#include <linux/jiffies.h>
#include <linux/smp.h>
-#include <linux/irqchip/arm-gic.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
@@ -37,13 +36,6 @@ static DEFINE_SPINLOCK(boot_lock);
void __cpuinit versatile_secondary_init(unsigned int cpu)
{
/*
- * if any interrupts are already enabled for the primary
- * core (e.g. timer irq), then they will not have been enabled
- * for us: do so
- */
- gic_secondary_init(0);
-
- /*
* let the primary processor know we're out of the
* pen, then head off into the C entry point
*/
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index ef1429a..f103cb8 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -28,6 +28,7 @@
#include <linux/module.h>
#include <linux/list.h>
#include <linux/smp.h>
+#include <linux/cpu.h>
#include <linux/cpu_pm.h>
#include <linux/cpumask.h>
#include <linux/io.h>
@@ -678,6 +679,25 @@ static int gic_irq_domain_xlate(struct irq_domain *d,
return 0;
}
+#ifdef CONFIG_SMP
+static int __cpuinit gic_secondary_init(struct notifier_block *nfb,
+ unsigned long action, void *hcpu)
+{
+ if (action == CPU_STARTING)
+ gic_cpu_init(&gic_data[0]);
+ return NOTIFY_OK;
+}
+
+/*
+ * Notifier for enabling the GIC CPU interface. Set an arbitrarily high
+ * priority because the GIC needs to be up before the ARM generic timers.
+ */
+static struct notifier_block __cpuinitdata gic_cpu_notifier = {
+ .notifier_call = gic_secondary_init,
+ .priority = 100,
+};
+#endif
+
const struct irq_domain_ops gic_irq_domain_ops = {
.map = gic_irq_domain_map,
.xlate = gic_irq_domain_xlate,
@@ -768,6 +788,7 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
#ifdef CONFIG_SMP
set_smp_cross_call(gic_raise_softirq);
+ register_cpu_notifier(&gic_cpu_notifier);
#endif
set_handle_irq(gic_handle_irq);
@@ -778,13 +799,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
gic_pm_init(gic);
}
-void __cpuinit gic_secondary_init(unsigned int gic_nr)
-{
- BUG_ON(gic_nr >= MAX_GIC_NR);
-
- gic_cpu_init(&gic_data[gic_nr]);
-}
-
#ifdef CONFIG_OF
static int gic_cnt __initdata = 0;
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
index a67ca55..59e59b3 100644
--- a/include/linux/irqchip/arm-gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -36,7 +36,6 @@ extern struct irq_chip gic_arch_extn;
void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
u32 offset, struct device_node *);
-void gic_secondary_init(unsigned int);
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
static inline void gic_init(unsigned int nr, int start,
^ permalink raw reply related
* [PATCH 3/4] irqchip: gic: Call handle_bad_irq() directly
From: Catalin Marinas @ 2013-01-23 17:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358963974-5496-1-git-send-email-catalin.marinas@arm.com>
Previously, the gic_handle_cascade_irq() function was calling the
ARM-specific do_bad_IRQ() function which calls handle_bad_irq() after
acquiring the desk->lock. Locking the cascaded IRQ desc is not needed
for error reporting, so just call handle_bad_irq() directly.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
---
drivers/irqchip/irq-gic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 54b86f0..ef1429a 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -323,7 +323,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
cascade_irq = irq_find_mapping(chip_data->domain, gic_irq);
if (unlikely(gic_irq < 32 || gic_irq > 1020))
- do_bad_IRQ(cascade_irq, desc);
+ handle_bad_irq(cascade_irq, desc);
else
generic_handle_irq(cascade_irq);
^ permalink raw reply related
* [PATCH 2/4] arm: Move chained_irq_(enter|exit) to a generic file
From: Catalin Marinas @ 2013-01-23 17:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358963974-5496-1-git-send-email-catalin.marinas@arm.com>
These functions have been introduced by commit 10a8c383 (irq: introduce
entry and exit functions for chained handlers) in asm/mach/irq.h. This
patch moves them to linux/irqchip/chained_irq.h so that generic irqchip
drivers do not rely on architecture specific header files.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/include/asm/mach/irq.h | 31 --------------------
arch/arm/mach-at91/gpio.c | 3 +-
arch/arm/mach-exynos/common.c | 1 +
arch/arm/plat-samsung/irq-vic-timer.c | 3 +-
arch/arm/plat-samsung/s5p-irq-gpioint.c | 3 +-
drivers/irqchip/irq-gic.c | 2 +-
include/linux/irqchip/chained_irq.h | 52 +++++++++++++++++++++++++++++++++
7 files changed, 57 insertions(+), 38 deletions(-)
create mode 100644 include/linux/irqchip/chained_irq.h
diff --git a/arch/arm/include/asm/mach/irq.h b/arch/arm/include/asm/mach/irq.h
index 749d505..2092ee1 100644
--- a/arch/arm/include/asm/mach/irq.h
+++ b/arch/arm/include/asm/mach/irq.h
@@ -30,35 +30,4 @@ do { \
raw_spin_unlock(&desc->lock); \
} while(0)
-#ifndef __ASSEMBLY__
-/*
- * Entry/exit functions for chained handlers where the primary IRQ chip
- * may implement either fasteoi or level-trigger flow control.
- */
-static inline void chained_irq_enter(struct irq_chip *chip,
- struct irq_desc *desc)
-{
- /* FastEOI controllers require no action on entry. */
- if (chip->irq_eoi)
- return;
-
- if (chip->irq_mask_ack) {
- chip->irq_mask_ack(&desc->irq_data);
- } else {
- chip->irq_mask(&desc->irq_data);
- if (chip->irq_ack)
- chip->irq_ack(&desc->irq_data);
- }
-}
-
-static inline void chained_irq_exit(struct irq_chip *chip,
- struct irq_desc *desc)
-{
- if (chip->irq_eoi)
- chip->irq_eoi(&desc->irq_data);
- else
- chip->irq_unmask(&desc->irq_data);
-}
-#endif
-
#endif
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index c5d7e1e..e3a64cf 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -23,8 +23,7 @@
#include <linux/io.h>
#include <linux/irqdomain.h>
#include <linux/of_address.h>
-
-#include <asm/mach/irq.h>
+#include <linux/irqchip/chained_irq.h>
#include <mach/hardware.h>
#include <mach/at91_pio.h>
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 7f01a92..60dad95 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -25,6 +25,7 @@
#include <linux/irqchip.h>
#include <linux/of_address.h>
#include <linux/irqchip/arm-gic.h>
+#include <linux/irqchip/chained_irq.h>
#include <asm/proc-fns.h>
#include <asm/exception.h>
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
index f980cf3..047a2f8 100644
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -17,14 +17,13 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
+#include <linux/irqchip/chained_irq.h>
#include <mach/map.h>
#include <plat/cpu.h>
#include <plat/irq-vic-timer.h>
#include <plat/regs-timer.h>
-#include <asm/mach/irq.h>
-
static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
{
struct irq_chip *chip = irq_get_chip(irq);
diff --git a/arch/arm/plat-samsung/s5p-irq-gpioint.c b/arch/arm/plat-samsung/s5p-irq-gpioint.c
index bae5613..d450671 100644
--- a/arch/arm/plat-samsung/s5p-irq-gpioint.c
+++ b/arch/arm/plat-samsung/s5p-irq-gpioint.c
@@ -17,13 +17,12 @@
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/slab.h>
+#include <linux/irqchip/chained_irq.h>
#include <mach/map.h>
#include <plat/gpio-core.h>
#include <plat/gpio-cfg.h>
-#include <asm/mach/irq.h>
-
#define GPIO_BASE(chip) ((void __iomem *)((unsigned long)((chip)->base) & 0xFFFFF000u))
#define CON_OFFSET 0x700
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 69d9a39..54b86f0 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -38,12 +38,12 @@
#include <linux/interrupt.h>
#include <linux/percpu.h>
#include <linux/slab.h>
+#include <linux/irqchip/chained_irq.h>
#include <linux/irqchip/arm-gic.h>
#include <asm/irq.h>
#include <asm/exception.h>
#include <asm/smp_plat.h>
-#include <asm/mach/irq.h>
#include "irqchip.h"
diff --git a/include/linux/irqchip/chained_irq.h b/include/linux/irqchip/chained_irq.h
new file mode 100644
index 0000000..adf4c30
--- /dev/null
+++ b/include/linux/irqchip/chained_irq.h
@@ -0,0 +1,52 @@
+/*
+ * Chained IRQ handlers support.
+ *
+ * Copyright (C) 2011 ARM Ltd.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __IRQCHIP_CHAINED_IRQ_H
+#define __IRQCHIP_CHAINED_IRQ_H
+
+#include <linux/irq.h>
+
+/*
+ * Entry/exit functions for chained handlers where the primary IRQ chip
+ * may implement either fasteoi or level-trigger flow control.
+ */
+static inline void chained_irq_enter(struct irq_chip *chip,
+ struct irq_desc *desc)
+{
+ /* FastEOI controllers require no action on entry. */
+ if (chip->irq_eoi)
+ return;
+
+ if (chip->irq_mask_ack) {
+ chip->irq_mask_ack(&desc->irq_data);
+ } else {
+ chip->irq_mask(&desc->irq_data);
+ if (chip->irq_ack)
+ chip->irq_ack(&desc->irq_data);
+ }
+}
+
+static inline void chained_irq_exit(struct irq_chip *chip,
+ struct irq_desc *desc)
+{
+ if (chip->irq_eoi)
+ chip->irq_eoi(&desc->irq_data);
+ else
+ chip->irq_unmask(&desc->irq_data);
+}
+
+#endif /* __IRQCHIP_CHAINED_IRQ_H */
^ permalink raw reply related
* [PATCH 1/4] arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h
From: Catalin Marinas @ 2013-01-23 17:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358963974-5496-1-git-send-email-catalin.marinas@arm.com>
This patch prepares the removal of <asm/mach/irq.h> include in the
GIC and VIC irqchip drivers.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
---
arch/arm/include/asm/irq.h | 5 +++++
arch/arm/include/asm/mach/irq.h | 5 -----
drivers/irqchip/irq-vic.c | 2 +-
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h
index 35c21c3..53c15de 100644
--- a/arch/arm/include/asm/irq.h
+++ b/arch/arm/include/asm/irq.h
@@ -30,6 +30,11 @@ extern void asm_do_IRQ(unsigned int, struct pt_regs *);
void handle_IRQ(unsigned int, struct pt_regs *);
void init_IRQ(void);
+#ifdef CONFIG_MULTI_IRQ_HANDLER
+extern void (*handle_arch_irq)(struct pt_regs *);
+extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
+#endif
+
#endif
#endif
diff --git a/arch/arm/include/asm/mach/irq.h b/arch/arm/include/asm/mach/irq.h
index 18c8830..749d505 100644
--- a/arch/arm/include/asm/mach/irq.h
+++ b/arch/arm/include/asm/mach/irq.h
@@ -20,11 +20,6 @@ struct seq_file;
extern void init_FIQ(int);
extern int show_fiq_list(struct seq_file *, int);
-#ifdef CONFIG_MULTI_IRQ_HANDLER
-extern void (*handle_arch_irq)(struct pt_regs *);
-extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
-#endif
-
/*
* This is for easy migration, but should be changed in the source
*/
diff --git a/drivers/irqchip/irq-vic.c b/drivers/irqchip/irq-vic.c
index 3cf97aa..e38cb00 100644
--- a/drivers/irqchip/irq-vic.c
+++ b/drivers/irqchip/irq-vic.c
@@ -33,7 +33,7 @@
#include <linux/irqchip/arm-vic.h>
#include <asm/exception.h>
-#include <asm/mach/irq.h>
+#include <asm/irq.h>
#include "irqchip.h"
^ permalink raw reply related
* [PATCH 0/4] Preparatory GIC patches for arm64 support
From: Catalin Marinas @ 2013-01-23 17:59 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
These patches are primarily aimed at reducing the irq-gic.c dependency
on arch/arm and allow it to be used with arch/arm64. The last patch
removes the explicit gic_secondary_init() call from the ARM platform
code.
We still have a non-generic asm/smp_plat.h include for cpu_logical_map()
but I couldn't find a better place to move it (asm/cpu.h isn't generic
either, though more widely used than smp_plat.h).
The patches are based on linux-next as they require Rob's GIC irqhip
move.
Catalin
Catalin Marinas (4):
arm: Move the set_handle_irq and handle_arch_irq declarations to
asm/irq.h
arm: Move chained_irq_(enter|exit) to a generic file
irqchip: gic: Call handle_bad_irq() directly
irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
arch/arm/include/asm/irq.h | 5 ++++
arch/arm/include/asm/mach/irq.h | 36 -----------------------
arch/arm/mach-at91/gpio.c | 3 +-
arch/arm/mach-exynos/common.c | 1 +
arch/arm/mach-exynos/platsmp.c | 8 -----
arch/arm/mach-highbank/platsmp.c | 7 -----
arch/arm/mach-imx/platsmp.c | 12 --------
arch/arm/mach-msm/platsmp.c | 8 -----
arch/arm/mach-omap2/omap-smp.c | 7 -----
arch/arm/mach-shmobile/smp-emev2.c | 7 -----
arch/arm/mach-shmobile/smp-r8a7779.c | 7 -----
arch/arm/mach-shmobile/smp-sh73a0.c | 7 -----
arch/arm/mach-socfpga/platsmp.c | 12 --------
arch/arm/mach-spear13xx/platsmp.c | 8 -----
arch/arm/mach-tegra/platsmp.c | 8 -----
arch/arm/mach-ux500/platsmp.c | 8 -----
arch/arm/plat-samsung/irq-vic-timer.c | 3 +-
arch/arm/plat-samsung/s5p-irq-gpioint.c | 3 +-
arch/arm/plat-versatile/platsmp.c | 8 -----
drivers/irqchip/irq-gic.c | 32 ++++++++++++++------
drivers/irqchip/irq-vic.c | 2 +-
include/linux/irqchip/arm-gic.h | 1 -
include/linux/irqchip/chained_irq.h | 52 +++++++++++++++++++++++++++++++++
23 files changed, 85 insertions(+), 160 deletions(-)
create mode 100644 include/linux/irqchip/chained_irq.h
^ permalink raw reply
* [GIT PULL] hw_breakpoint updates for 3.9
From: Will Deacon @ 2013-01-23 17:58 UTC (permalink / raw)
To: linux-arm-kernel
Hi Russell,
Please pull these hw_breakpoint updates for 3.9. Nothing major here but
some basic support for debug powerdown with recent CPUs.
Cheers,
Will
--->8
The following changes since commit 9931faca02c604c22335f5a935a501bb2ace6e20:
Linux 3.8-rc3 (2013-01-09 18:59:55 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git for-rmk/hw-breakpoint
for you to fetch changes up to 9a6eb310eaa5336b89a27a0bbb78da4bba35f6f1:
ARM: hw_breakpoint: Debug powerdown support for self-hosted debug (2013-01-10 21:13:07 +0000)
----------------------------------------------------------------
Dietmar Eggemann (3):
ARM: coresight: common definition for (OS) Lock Access Register key value
ARM: hw_breakpoint: Check function for OS Save and Restore mechanism
ARM: hw_breakpoint: Debug powerdown support for self-hosted debug
arch/arm/include/asm/cti.h | 10 +++-------
arch/arm/include/asm/hardware/coresight.h | 6 +++---
arch/arm/include/asm/hw_breakpoint.h | 3 +++
arch/arm/kernel/hw_breakpoint.c | 61 +++++++++++++++++++++++++++++++++++++++++++++++++++++--------
4 files changed, 62 insertions(+), 18 deletions(-)
^ permalink raw reply
* [PATCH 2/2] ARM: dts: omap3-overo: Add audio support
From: Florian Vaussard @ 2013-01-23 17:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358963812-19947-1-git-send-email-florian.vaussard@epfl.ch>
Add the needed sections to enable audio support on Overo.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
---
arch/arm/boot/dts/omap3-overo.dtsi | 14 ++++++++++++++
1 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
index 800be29..81341fa 100644
--- a/arch/arm/boot/dts/omap3-overo.dtsi
+++ b/arch/arm/boot/dts/omap3-overo.dtsi
@@ -23,6 +23,14 @@
max-brightness = <127>;
};
};
+
+ sound {
+ compatible = "ti,omap-twl4030";
+ ti,model = "overo";
+
+ ti,mcbsp = <&mcbsp2>;
+ ti,codec = <&twl_audio>;
+ };
};
&i2c1 {
@@ -32,6 +40,12 @@
reg = <0x48>;
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
interrupt-parent = <&intc>;
+
+ twl_audio: audio {
+ compatible = "ti,twl4030-audio";
+ codec {
+ };
+ };
};
};
--
1.7.5.4
^ permalink raw reply related
* [PATCH 1/2] ARM: dts: omap3-overo: Add support for pwm-leds
From: Florian Vaussard @ 2013-01-23 17:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358963812-19947-1-git-send-email-florian.vaussard@epfl.ch>
Convert the on-board LED connected to the TWL4030 (LEDB) to use
pwm-leds.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
---
arch/arm/boot/dts/omap3-overo.dtsi | 9 +++++----
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
index 89808ce..800be29 100644
--- a/arch/arm/boot/dts/omap3-overo.dtsi
+++ b/arch/arm/boot/dts/omap3-overo.dtsi
@@ -14,12 +14,13 @@
/include/ "omap3.dtsi"
/ {
- leds {
- compatible = "gpio-leds";
+ pwmleds {
+ compatible = "pwm-leds";
+
overo {
label = "overo:blue:COM";
- gpios = <&twl_gpio 19 0>;
- linux,default-trigger = "mmc0";
+ pwms = <&twl_pwmled 1 7812500>;
+ max-brightness = <127>;
};
};
};
--
1.7.5.4
^ permalink raw reply related
* [PATCH 0/2] ARM: dts: omap3-overo: Add pwm-leds and audio support
From: Florian Vaussard @ 2013-01-23 17:56 UTC (permalink / raw)
To: linux-arm-kernel
Hello Benoit,
This patchset adds some new DT supports to the Overo products.
The first patch converts the PMIC LEDB output to use the pwm-leds,
newly merged in your branch for_3.9/dts. The second patch
adds the audio support.
Best regards,
Florian
Florian Vaussard (2):
ARM: dts: omap3-overo: Add support for pwm-leds
ARM: dts: omap3-overo: Add audio support
arch/arm/boot/dts/omap3-overo.dtsi | 23 +++++++++++++++++++----
1 files changed, 19 insertions(+), 4 deletions(-)
--
1.7.5.4
^ permalink raw reply
* [PATCH v2 1/3] arm: mvebu: Add support for USB host controllers in Armada 370/XP
From: Jason Cooper @ 2013-01-23 17:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CALF0-+W8dVLHF66VKni+5ZsQpFd=cGDXE0TD=dRc1B=ptrAMUg@mail.gmail.com>
On Wed, Jan 23, 2013 at 02:06:12PM -0300, Ezequiel Garcia wrote:
> Jason,
>
> On Wed, Jan 23, 2013 at 12:26 PM, Ezequiel Garcia <ezequiel.garcia@free-electrons.com> wrote:
> > The Armada 370 and Armada XP SoC has an Orion EHCI USB controller.
> > This patch adds support for this controller in Armada 370
> > and Armada XP SoC common device tree files.
> >
> > Cc: Lior Amsalem <alior@marvell.com>
> > Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> > Tested-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
> > Tested-by: Florian Fainelli <florian@openwrt.org>
> > Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> > Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
> > ---
> > Changes from v1:
> > * Remove uneeded USB_ARCH_HAS_EHCI selection as noted by Florian.
> >
> > arch/arm/boot/dts/armada-370-xp.dtsi | 15 +++++++++++++++
> > arch/arm/boot/dts/armada-370.dtsi | 9 +++++++++
> > arch/arm/boot/dts/armada-xp.dtsi | 17 +++++++++++++++++
> > 3 files changed, 41 insertions(+), 0 deletions(-)
>
> Do you think we're still in time to get this series into v3.9 (given
> we decide soon on the OpenBlocks issue)?
That shouldn't be a problem.
thx,
Jason.
^ permalink raw reply
* ARM: hw_breakpoint mismatch breakpoint behaves unexpectedly like a match breakpoint on ARM_DEBUG_ARCH_V7_ECP14
From: Valentin Pistol @ 2013-01-23 17:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130123145007.GB26811@mudshark.cambridge.arm.com>
> > So it was managing its own breakpoints and instruction decoding (like
> > gdb would) but didn't take advantage of either mismatch support or
> > hw_breakpoints?
>
> Correct. The code also didn't handle newer instructions especially well,
> with issues on SMP too. Given that the request is only supposed to be
> implemented for architectures with hardware single-step, it made sense to
> remove the code.
Makes sense, thanks for clarifying.
>
> > I'm wondering how pervasive the required changes are to support
> > SINGLESTEP with mismatch breakpoints.
> > If you think it's a good idea I'm very willing to try and add-in such support.
> > Please let me know if there's some obvious issues about going forward
> > with this that you may be aware of.
>
> Given that ARMv8 has hardware single-step, I'd be inclined to implement
> that instead so that we don't have to overload the SINGLESTEP request later
> on. Alternatively, you could implement something like PTRACE_HBPSTEP but I
> think you will run into some problems:
That's very interesting. I'm not very familiar with ARMv8, could you
expand a bit on what exactly ARMv8 provides that offers that hardware
single-step that ARMv7 does not?
Seems it's different than the mismatch breakpoints, which I thought
are sufficient for the task.
>
> 1. Alignment restrictions. Stepping something like a 32-bit Thumb
> instruction on a halfword boundary will need *two* breakpoints to
> be added and handled appropriately.
>
> 2. Interaction with mismatch breakpoints being used internally by
> the kernel. You might be ok here, but you want to check the code
> which uses mismatch breakpoints to step over breakpoints and
> watchpoints.
Thanks for providing this insight.
I'm aware of arch/arm/kernel/hw_breakpoint.c and kernel/ptrace.c using
single-step.
Are you thinking of other parts of the kernel as well?
Regarding the existing code to single-step breakpoints and
watchpoints, does it have to do with the trap semantics or is there
more to it?
For instance upon a breakpoint return the faulting instruction will
re-execute, causing a trap loop, hence the need to step over it.
But then again wouldn't this be avoided by unsetting the breakpoint
before returning from the handler?
Regards,
Valentin
^ permalink raw reply
* [PATCH V4 0/5] ARM: tegra20: cpuidle: add power-down state
From: Stephen Warren @ 2013-01-23 17:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358323807-30157-1-git-send-email-josephl@nvidia.com>
On 01/16/2013 01:10 AM, Joseph Lo wrote:
> This adds a "powered-down" state in cpuidle for Tegra20. It requires power
> gating both CPU cores. When the CPU1 requests to enter "powered-down"
> state, it saves its own state and then enters WFI. When the CPU0 requests
> the same state, it attempts to put the CPU1 into reset to prevent it from
> waking up. Then power down both CPUs together and turn off the CPU rail.
>
> If the CPU1 be woken up before CPU0 entering powered-down state, then it
> needs to restore it's CPU state and waits for next chance.
I have applied this series to Tegra's for-3.9/soc branch.
^ permalink raw reply
* [PATCH v2] mm: dmapool: use provided gfp flags for all dma_alloc_coherent() calls
From: Soeren Moch @ 2013-01-23 17:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <510018B4.9040903@web.de>
On 23.01.2013 18:07, Soeren Moch wrote:
> On 23.01.2013 17:25, Andrew Lunn wrote:
>> On Wed, Jan 23, 2013 at 04:30:53PM +0100, Soeren Moch wrote:
>>> On 19.01.2013 19:59, Andrew Lunn wrote:
>>>>> Please find attached a debug log generated with your patch.
>>>>>
>>>>> I used the sata disk and two em28xx dvb sticks, no other usb devices,
>>>>> no ethernet cable connected, tuners on saa716x-based card not used.
>>>>>
>>>>> What I can see in the log: a lot of coherent mappings from sata_mv
>>>>> and orion_ehci, a few from mv643xx_eth, no other coherent mappings.
>>>>> All coherent mappings are page aligned, some of them (from orion_ehci)
>>>>> are not really small (as claimed in __alloc_from_pool).
>>>>>
>>>>> I don't believe in a memory leak. When I restart vdr (the application
>>>>> utilizing the dvb sticks) then there is enough dma memory available
>>>>> again.
>>>>
>>>> Hi Soeren
>>>>
>>>> We should be able to rule out a leak. Mount debugfg and then:
>>>>
>>>> while [ /bin/true ] ; do cat /debug/dma-api/num_free_entries ; sleep
>>>> 60 ; done
>>>>
>>>> while you are capturing. See if the number goes down.
>>>>
>>>> Andrew
>>>
>>> Now I built a kernel with debugfs enabled.
>>> It is not clear to me what I can see from the
>>> dma-api/num_free_entries output. After reboot (vdr running) I see
>>> decreasing numbers (3453 3452 3445 3430...), min_free_entries is
>>> lower (3390). Sometimes the output is constant for several minutes (
>>> 3396 3396 3396 3396 3396,...)
>>
>> We are interesting in the long term behavior. Does it gradually go
>> down? Or is it stable? If it goes down over time, its clearly a leak
>> somewhere.
>>
>
> Now (in the last hour) stable, occasionally lower numbers:
> 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
> 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
> 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
> 3396 3396 3396 3396 3396 3396 3396 3396 3396 3365 3396 3394 3396 3396
> 3396 3396 3373 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
> 3396 3353 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
> 3394 3396 3396 3396 3396 3396 3396 3396
>
> Before the last pool exhaustion going down:
> 3395 3395 3389 3379 3379 3374 3367 3360 3352 3343 3343 3343 3342 3336
> 3332 3324 3318 3314 3310 3307 3305 3299 3290 3283 3279 3272 3266 3265
> 3247 3247 3247 3242 3236 3236
>
Here I stopped vdr (and so closed all dvb_demux devices), the number was
remaining the same 3236, even after restart of vdr (and restart of
streaming).
> Soeren
^ permalink raw reply
* [PATCH v2] mm: dmapool: use provided gfp flags for all dma_alloc_coherent() calls
From: Soeren Moch @ 2013-01-23 17:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130123162515.GK13482@lunn.ch>
On 23.01.2013 17:25, Andrew Lunn wrote:
> On Wed, Jan 23, 2013 at 04:30:53PM +0100, Soeren Moch wrote:
>> On 19.01.2013 19:59, Andrew Lunn wrote:
>>>> Please find attached a debug log generated with your patch.
>>>>
>>>> I used the sata disk and two em28xx dvb sticks, no other usb devices,
>>>> no ethernet cable connected, tuners on saa716x-based card not used.
>>>>
>>>> What I can see in the log: a lot of coherent mappings from sata_mv
>>>> and orion_ehci, a few from mv643xx_eth, no other coherent mappings.
>>>> All coherent mappings are page aligned, some of them (from orion_ehci)
>>>> are not really small (as claimed in __alloc_from_pool).
>>>>
>>>> I don't believe in a memory leak. When I restart vdr (the application
>>>> utilizing the dvb sticks) then there is enough dma memory available
>>>> again.
>>>
>>> Hi Soeren
>>>
>>> We should be able to rule out a leak. Mount debugfg and then:
>>>
>>> while [ /bin/true ] ; do cat /debug/dma-api/num_free_entries ; sleep 60 ; done
>>>
>>> while you are capturing. See if the number goes down.
>>>
>>> Andrew
>>
>> Now I built a kernel with debugfs enabled.
>> It is not clear to me what I can see from the
>> dma-api/num_free_entries output. After reboot (vdr running) I see
>> decreasing numbers (3453 3452 3445 3430...), min_free_entries is
>> lower (3390). Sometimes the output is constant for several minutes (
>> 3396 3396 3396 3396 3396,...)
>
> We are interesting in the long term behavior. Does it gradually go
> down? Or is it stable? If it goes down over time, its clearly a leak
> somewhere.
>
Now (in the last hour) stable, occasionally lower numbers:
3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
3396 3396 3396 3396 3396 3396 3396 3396 3396 3365 3396 3394 3396 3396
3396 3396 3373 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
3396 3353 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
3394 3396 3396 3396 3396 3396 3396 3396
Before the last pool exhaustion going down:
3395 3395 3389 3379 3379 3374 3367 3360 3352 3343 3343 3343 3342 3336
3332 3324 3318 3314 3310 3307 3305 3299 3290 3283 3279 3272 3266 3265
3247 3247 3247 3242 3236 3236
Soeren
^ permalink raw reply
* [PATCH v2 1/3] arm: mvebu: Add support for USB host controllers in Armada 370/XP
From: Ezequiel Garcia @ 2013-01-23 17:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358954792-16160-1-git-send-email-ezequiel.garcia@free-electrons.com>
Jason,
On Wed, Jan 23, 2013 at 12:26 PM, Ezequiel Garcia
<ezequiel.garcia@free-electrons.com> wrote:
> The Armada 370 and Armada XP SoC has an Orion EHCI USB controller.
> This patch adds support for this controller in Armada 370
> and Armada XP SoC common device tree files.
>
> Cc: Lior Amsalem <alior@marvell.com>
> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Tested-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
> Tested-by: Florian Fainelli <florian@openwrt.org>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
> ---
> Changes from v1:
> * Remove uneeded USB_ARCH_HAS_EHCI selection as noted by Florian.
>
> arch/arm/boot/dts/armada-370-xp.dtsi | 15 +++++++++++++++
> arch/arm/boot/dts/armada-370.dtsi | 9 +++++++++
> arch/arm/boot/dts/armada-xp.dtsi | 17 +++++++++++++++++
> 3 files changed, 41 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
> index 28276fe..fa025c4 100644
> --- a/arch/arm/boot/dts/armada-370-xp.dtsi
> +++ b/arch/arm/boot/dts/armada-370-xp.dtsi
> @@ -145,6 +145,21 @@
> clocks = <&gateclk 17>;
> status = "disabled";
> };
> +
> + usb at d0050000 {
> + compatible = "marvell,orion-ehci";
> + reg = <0xd0050000 0x500>;
> + interrupts = <45>;
> + status = "disabled";
> + };
> +
> + usb at d0051000 {
> + compatible = "marvell,orion-ehci";
> + reg = <0xd0051000 0x500>;
> + interrupts = <46>;
> + status = "disabled";
> + };
> +
> };
> };
>
> diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
> index 88f9bab..8188d13 100644
> --- a/arch/arm/boot/dts/armada-370.dtsi
> +++ b/arch/arm/boot/dts/armada-370.dtsi
> @@ -144,5 +144,14 @@
> dmacap,memset;
> };
> };
> +
> + usb at d0050000 {
> + clocks = <&coreclk 0>;
> + };
> +
> + usb at d0051000 {
> + clocks = <&coreclk 0>;
> + };
> +
> };
> };
> diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
> index 2e37ef1..c22a0c8 100644
> --- a/arch/arm/boot/dts/armada-xp.dtsi
> +++ b/arch/arm/boot/dts/armada-xp.dtsi
> @@ -134,5 +134,22 @@
> dmacap,memset;
> };
> };
> +
> + usb at d0050000 {
> + clocks = <&gateclk 18>;
> + };
> +
> + usb at d0051000 {
> + clocks = <&gateclk 19>;
> + };
> +
> + usb at d0052000 {
> + compatible = "marvell,orion-ehci";
> + reg = <0xd0052000 0x500>;
> + interrupts = <47>;
> + clocks = <&gateclk 20>;
> + status = "disabled";
> + };
> +
> };
> };
> --
> 1.7.8.6
>
Do you think we're still in time to get this series into v3.9 (given
we decide soon on the OpenBlocks issue)?
Thanks,
--
Ezequiel
^ permalink raw reply
* [PATCH v2 2/3] arm: mvebu: Enable USB controllers on Armada 370/XP boards
From: Ezequiel Garcia @ 2013-01-23 17:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358954792-16160-2-git-send-email-ezequiel.garcia@free-electrons.com>
Hi Nobuhiro,
On Wed, Jan 23, 2013 at 12:26 PM, Ezequiel Garcia
<ezequiel.garcia@free-electrons.com> wrote:
> This patch activates every USB port provided by each SoC.
> Except for Armada XP Openblocks AX3-4 board,
> where we enable only the first two USB ports
> until we have more information on the third one usage.
>
> Cc: Lior Amsalem <alior@marvell.com>
> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
> Tested-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
> Tested-by: Florian Fainelli <florian@openwrt.org>
> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
> ---
> Changes from v1:
> * Squashed separate per-board patches into this one,
> as suggested by Arnd.
> * Remove usb at d0052000 activation in OpenBlocks AX3-4
> until we have more information about it.
>
> arch/arm/boot/dts/armada-370-db.dts | 8 ++++++++
> arch/arm/boot/dts/armada-370-mirabox.dts | 8 ++++++++
> arch/arm/boot/dts/armada-xp-db.dts | 12 ++++++++++++
> arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 6 ++++++
> 4 files changed, 34 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
> index 8e66a7c..3d93902 100644
> --- a/arch/arm/boot/dts/armada-370-db.dts
> +++ b/arch/arm/boot/dts/armada-370-db.dts
> @@ -74,5 +74,13 @@
> status = "disabled";
> /* No CD or WP GPIOs */
> };
> +
> + usb at d0050000 {
> + status = "okay";
> + };
> +
> + usb at d0051000 {
> + status = "okay";
> + };
> };
> };
> diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts
> index 1864820..dd0c57d 100644
> --- a/arch/arm/boot/dts/armada-370-mirabox.dts
> +++ b/arch/arm/boot/dts/armada-370-mirabox.dts
> @@ -62,5 +62,13 @@
> * Wifi/Bluetooth chip
> */
> };
> +
> + usb at d0050000 {
> + status = "okay";
> + };
> +
> + usb at d0051000 {
> + status = "okay";
> + };
> };
> };
> diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
> index c7035c5..c84e1fe 100644
> --- a/arch/arm/boot/dts/armada-xp-db.dts
> +++ b/arch/arm/boot/dts/armada-xp-db.dts
> @@ -97,5 +97,17 @@
> status = "okay";
> /* No CD or WP GPIOs */
> };
> +
> + usb at d0050000 {
> + status = "okay";
> + };
> +
> + usb at d0051000 {
> + status = "okay";
> + };
> +
> + usb at d0052000 {
> + status = "okay";
> + };
> };
> };
> diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
> index ec36864..3818a82 100644
> --- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
> +++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
> @@ -133,5 +133,11 @@
> nr-ports = <2>;
> status = "okay";
> };
> + usb at d0050000 {
> + status = "okay";
> + };
> + usb at d0051000 {
> + status = "okay";
> + };
> };
> };
> --
> 1.7.8.6
>
I'd like to bring this patch to your attention.
As you can see, I've removed the
usb at d0052000 {
status = "okay";
};
from the OpenBlocks AX3-4 board dts file, since you mentioned this
board uses that USB
port for a PCIe connector -- if I understood correctly.
It's interesting to note that Mirabox board doesn't provide direct
access to its USB ports either,
but instead they are used to connect a GL827L MMC card reader.
However, we activate USB ports anyway, since it's needed for that to work fine.
So, IMHO, if OpenBlocks uses third USB port to connect some PCIe controller,
we should activate it in the dts file.
What do you think?
--
Ezequiel
^ permalink raw reply
* Kernel API for SGI usage
From: Russell King - ARM Linux @ 2013-01-23 17:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CANudz+sMppk5UZK+Vf_hWZYZzPJMunhPJQs0qbu1-dPy9WRikA@mail.gmail.com>
On Thu, Jan 24, 2013 at 12:51:50AM +0800, loody wrote:
> hi Russell:
>
> 2013/1/24 Russell King - ARM Linux <linux@arm.linux.org.uk>:
> > On Thu, Jan 24, 2013 at 12:39:54AM +0800, loody wrote:
> >> hi all:
> >> The other cores on my Soc need SGI to be waken up from reset state.
> >> Could any one header and functions I need to include and used for?
> >
> > That's almost what every platform does. Plenty of examples in the
> > platform SMP code for you to look at.
> Nice to meet you
> Would you please show me a hint or function name for reference?
>
> Appreciate your help, @_@
It even comes with comments:
/*
* Send the secondary CPU a soft interrupt, thereby causing
* the boot monitor to read the system wide flags register,
* and branch to the address found there.
*/
gic_raise_softirq(cpumask_of(cpu), 0);
^ permalink raw reply
* [PATCH] ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi
From: Stephen Warren @ 2013-01-23 16:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358960222-22705-1-git-send-email-swarren@wwwdotorg.org>
On 01/23/2013 09:57 AM, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>
>
> No Tegra30 Platform is running PLL_P at another rate than 408MHz, nor is
> any using any other PLL as UART source clock. Move attribute into SoC
> level dtsi file to slim down board DT files.
I have applied this to Tegra's for-3.9/dt branch.
^ permalink raw reply
* [PATCH] ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi
From: Stephen Warren @ 2013-01-23 16:57 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
No Tegra30 Platform is running PLL_P at another rate than 408MHz, nor is
any using any other PLL as UART source clock. Move attribute into SoC
level dtsi file to slim down board DT files.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
arch/arm/boot/dts/tegra30-beaver.dts | 1 -
arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 --
arch/arm/boot/dts/tegra30.dtsi | 5 +++++
3 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 0f296a4..8ff2ff2 100644
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -90,7 +90,6 @@
serial at 70006000 {
status = "okay";
- clock-frequency = <408000000>;
};
i2c at 7000c000 {
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index ff6b68f..1749927 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -120,13 +120,11 @@
serial at 70006000 {
status = "okay";
- clock-frequency = <408000000>;
};
serial at 70006200 {
compatible = "nvidia,tegra30-hsuart";
status = "okay";
- clock-frequency = <408000000>;
};
i2c at 7000c000 {
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index ff4a0ca..313fa71 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -234,6 +234,7 @@
reg = <0x70006000 0x40>;
reg-shift = <2>;
interrupts = <0 36 0x04>;
+ clock-frequency = <408000000>;
nvidia,dma-request-selector = <&apbdma 8>;
clocks = <&tegra_car 6>;
status = "disabled";
@@ -243,6 +244,7 @@
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
reg = <0x70006040 0x40>;
reg-shift = <2>;
+ clock-frequency = <408000000>;
interrupts = <0 37 0x04>;
nvidia,dma-request-selector = <&apbdma 9>;
clocks = <&tegra_car 160>;
@@ -253,6 +255,7 @@
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
reg = <0x70006200 0x100>;
reg-shift = <2>;
+ clock-frequency = <408000000>;
interrupts = <0 46 0x04>;
nvidia,dma-request-selector = <&apbdma 10>;
clocks = <&tegra_car 55>;
@@ -263,6 +266,7 @@
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
reg = <0x70006300 0x100>;
reg-shift = <2>;
+ clock-frequency = <408000000>;
interrupts = <0 90 0x04>;
nvidia,dma-request-selector = <&apbdma 19>;
clocks = <&tegra_car 65>;
@@ -273,6 +277,7 @@
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
reg = <0x70006400 0x100>;
reg-shift = <2>;
+ clock-frequency = <408000000>;
interrupts = <0 91 0x04>;
nvidia,dma-request-selector = <&apbdma 20>;
clocks = <&tegra_car 66>;
--
1.7.10.4
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