* [v4 4/6] ARM: dt: tegra114: Add new board, Dalmore
From: Hiroshi Doyu @ 2013-01-24 11:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359025829-22306-1-git-send-email-hdoyu@nvidia.com>
Add a new evaluation board, Dalmore for Tegra 114 family.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
---
arch/arm/boot/dts/Makefile | 3 ++-
arch/arm/boot/dts/tegra114-dalmore.dts | 21 +++++++++++++++++++++
2 files changed, 23 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/tegra114-dalmore.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e44da40..88ea9fc 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -143,7 +143,8 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra20-ventana.dtb \
tegra20-whistler.dtb \
tegra30-cardhu-a02.dtb \
- tegra30-cardhu-a04.dtb
+ tegra30-cardhu-a04.dtb \
+ tegra114-dalmore.dtb
dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
vexpress-v2p-ca9.dtb \
vexpress-v2p-ca15-tc1.dtb \
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts
new file mode 100644
index 0000000..a30aca6
--- /dev/null
+++ b/arch/arm/boot/dts/tegra114-dalmore.dts
@@ -0,0 +1,21 @@
+/dts-v1/;
+
+/include/ "tegra114.dtsi"
+
+/ {
+ model = "NVIDIA Tegra114 Dalmore evaluation board";
+ compatible = "nvidia,dalmore", "nvidia,tegra114";
+
+ memory {
+ reg = <0x80000000 0x40000000>;
+ };
+
+ serial at 70006300 {
+ status = "okay";
+ clock-frequency = <408000000>;
+ };
+
+ pmc {
+ nvidia,invert-interrupt;
+ };
+};
--
1.7.9.5
^ permalink raw reply related
* [v4 5/6] ARM: dt: tegra114: Add new board, Pluto
From: Hiroshi Doyu @ 2013-01-24 11:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359025829-22306-1-git-send-email-hdoyu@nvidia.com>
Add a new evaluation board, Pluto for Tegra 114 family.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
---
arch/arm/boot/dts/Makefile | 3 ++-
arch/arm/boot/dts/tegra114-pluto.dts | 21 +++++++++++++++++++++
2 files changed, 23 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/tegra114-pluto.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 88ea9fc..b53f18f 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -144,7 +144,8 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra20-whistler.dtb \
tegra30-cardhu-a02.dtb \
tegra30-cardhu-a04.dtb \
- tegra114-dalmore.dtb
+ tegra114-dalmore.dtb \
+ tegra114-pluto.dtb
dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
vexpress-v2p-ca9.dtb \
vexpress-v2p-ca15-tc1.dtb \
diff --git a/arch/arm/boot/dts/tegra114-pluto.dts b/arch/arm/boot/dts/tegra114-pluto.dts
new file mode 100644
index 0000000..9bea8f5
--- /dev/null
+++ b/arch/arm/boot/dts/tegra114-pluto.dts
@@ -0,0 +1,21 @@
+/dts-v1/;
+
+/include/ "tegra114.dtsi"
+
+/ {
+ model = "NVIDIA Tegra114 Pluto evaluation board";
+ compatible = "nvidia,pluto", "nvidia,tegra114";
+
+ memory {
+ reg = <0x80000000 0x40000000>;
+ };
+
+ serial at 70006300 {
+ status = "okay";
+ clock-frequency = <408000000>;
+ };
+
+ pmc {
+ nvidia,invert-interrupt;
+ };
+};
--
1.7.9.5
^ permalink raw reply related
* [v4 6/6] ARM: tegra: Add initial support for Tegra114 SoC.
From: Hiroshi Doyu @ 2013-01-24 11:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359025829-22306-1-git-send-email-hdoyu@nvidia.com>
Add new Tegra 114 SoC support.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
---
arch/arm/mach-tegra/Kconfig | 10 +++++++
arch/arm/mach-tegra/Makefile | 1 +
arch/arm/mach-tegra/board-dt-tegra114.c | 48 +++++++++++++++++++++++++++++++
arch/arm/mach-tegra/common.c | 1 +
4 files changed, 60 insertions(+)
create mode 100644 arch/arm/mach-tegra/board-dt-tegra114.c
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index abc688f..eada60f 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -45,6 +45,16 @@ config ARCH_TEGRA_3x_SOC
Support for NVIDIA Tegra T30 processor family, based on the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
+config ARCH_TEGRA_114_SOC
+ bool "Enable support for Tegra114 family"
+ select ARM_GIC
+ select CPU_V7
+ select ARM_L1_CACHE_SHIFT_6
+ select ARM_ARCH_TIMER
+ help
+ Support for NVIDIA Tegra T114 processor family, based on the
+ ARM CortexA15MP CPU
+
config TEGRA_PCI
bool "PCI Express support"
depends on ARCH_TEGRA_2x_SOC
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 432f2a5..e1eaf30 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_TEGRA_PCI) += pcie.o
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += board-dt-tegra20.o
obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o
+obj-$(CONFIG_ARCH_TEGRA_114_SOC) += board-dt-tegra114.o
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += board-harmony-pcie.o
diff --git a/arch/arm/mach-tegra/board-dt-tegra114.c b/arch/arm/mach-tegra/board-dt-tegra114.c
new file mode 100644
index 0000000..3ed17ce
--- /dev/null
+++ b/arch/arm/mach-tegra/board-dt-tegra114.c
@@ -0,0 +1,48 @@
+/*
+ * NVIDIA Tegra114 device tree board support
+ *
+ * Copyright (C) 2013 NVIDIA Corporation
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/clocksource.h>
+
+#include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
+
+#include "board.h"
+#include "common.h"
+
+static void __init tegra114_dt_init(void)
+{
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char * const tegra114_dt_board_compat[] = {
+ "nvidia,tegra114",
+ NULL,
+};
+
+DT_MACHINE_START(TEGRA114_DT, "NVIDIA Tegra114 (Flattened Device Tree)")
+ .smp = smp_ops(tegra_smp_ops),
+ .map_io = tegra_map_common_io,
+ .init_early = tegra30_init_early,
+ .init_irq = tegra_dt_init_irq,
+ .handle_irq = gic_handle_irq,
+ .init_time = clocksource_of_init,
+ .init_machine = tegra114_dt_init,
+ .init_late = tegra_init_late,
+ .restart = tegra_assert_system_reset,
+ .dt_compat = tegra114_dt_board_compat,
+MACHINE_END
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 87dd69c..2f13513 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -59,6 +59,7 @@ u32 tegra_uart_config[4] = {
#ifdef CONFIG_OF
static const struct of_device_id tegra_dt_irq_match[] __initconst = {
+ { .compatible = "arm,cortex-a15-gic", .data = gic_of_init },
{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
{ }
};
--
1.7.9.5
^ permalink raw reply related
* OMAP4 randconfig failure: Zynq
From: Russell King - ARM Linux @ 2013-01-24 11:11 UTC (permalink / raw)
To: linux-arm-kernel
The OMAP4 randconfig build last night failed with this error:
arch/arm/mach-zynq/common.c:99:14: error: 'irqchip_init' undeclared here (not in a function)
Full details at the usual place -
http://www.arm.linux.org.uk/developer/build/
^ permalink raw reply
* [V5 PATCH 26/26] usb: ehci: ehci-mv: add device tree support
From: Mark Rutland @ 2013-01-24 11:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359009530-28182-27-git-send-email-chao.xie@marvell.com>
On Thu, Jan 24, 2013 at 06:38:50AM +0000, Chao Xie wrote:
> All blocks are removed. Add the device tree support for ehci.
Similarly to the last two patches, could you please add a binding document?
> Signed-off-by: Chao Xie <chao.xie@marvell.com>
> Acked-by: Alan Stern <stern@rowland.harvard.edu>
> ---
> drivers/usb/host/ehci-mv.c | 105 +++++++++++++++++++++++++++++++++----------
> 1 files changed, 80 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/usb/host/ehci-mv.c b/drivers/usb/host/ehci-mv.c
> index 171e145..79eca0c 100644
> --- a/drivers/usb/host/ehci-mv.c
> +++ b/drivers/usb/host/ehci-mv.c
> @@ -13,6 +13,7 @@
> #include <linux/module.h>
> #include <linux/platform_device.h>
> #include <linux/clk.h>
> +#include <linux/of.h>
> #include <linux/err.h>
> #include <linux/usb/otg.h>
> #include <linux/usb/mv_usb2.h>
> @@ -32,11 +33,9 @@ struct ehci_hcd_mv {
>
> struct usb_phy *otg;
>
> - struct mv_usb_platform_data *pdata;
> -
> /* clock source and total clock number */
> unsigned int clknum;
> - struct clk *clk[0];
> + struct clk **clk;
> };
>
> static void ehci_clock_enable(struct ehci_hcd_mv *ehci_mv)
> @@ -138,22 +137,55 @@ static const struct hc_driver mv_ehci_hc_driver = {
> .bus_resume = ehci_bus_resume,
> };
>
> +static int mv_ehci_parse_dt(struct platform_device *pdev,
> + struct ehci_hcd_mv *ehci_mv)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + unsigned int clks_num;
> + int i, ret;
> + const char *clk_name;
> +
> + if (!np)
> + return 1;
Perhaps -ENODEV?
> +
> + clks_num = of_property_count_strings(np, "clocks");
> + if (clks_num < 0)
> + return clks_num;
> +
> + ehci_mv->clk = devm_kzalloc(&pdev->dev,
> + sizeof(struct clk *) * clks_num, GFP_KERNEL);
> + if (ehci_mv->clk == NULL)
> + return -ENOMEM;
> +
> + for (i = 0; i < clks_num; i++) {
> + ret = of_property_read_string_index(np, "clocks", i,
> + &clk_name);
> + if (ret)
> + return ret;
> + ehci_mv->clk[i] = clk_get(NULL, clk_name);
> + if (IS_ERR(ehci_mv->clk[i]))
> + return PTR_ERR(ehci_mv->clk[i]);
> + }
> +
> + ehci_mv->clknum = clks_num;
> +
> + ret = of_property_read_u32(np, "mode", &ehci_mv->mode);
> + if (ret)
> + return ret;
Again, this is a bad idea.
> +
> + return 0;
> +}
> +
> static int mv_ehci_probe(struct platform_device *pdev)
> {
> - struct mv_usb_platform_data *pdata = pdev->dev.platform_data;
> struct usb_hcd *hcd;
> struct ehci_hcd *ehci;
> struct ehci_hcd_mv *ehci_mv;
> struct resource *r;
> - int clk_i, retval = -ENODEV;
> + int retval = -ENODEV;
> u32 offset;
> size_t size;
>
> - if (!pdata) {
> - dev_err(&pdev->dev, "missing platform_data\n");
> - return -ENODEV;
> - }
> -
> if (usb_disabled())
> return -ENODEV;
>
> @@ -161,7 +193,7 @@ static int mv_ehci_probe(struct platform_device *pdev)
> if (!hcd)
> return -ENOMEM;
>
> - size = sizeof(*ehci_mv) + sizeof(struct clk *) * pdata->clknum;
> + size = sizeof(*ehci_mv);
> ehci_mv = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
> if (ehci_mv == NULL) {
> dev_err(&pdev->dev, "cannot allocate ehci_hcd_mv\n");
> @@ -170,19 +202,36 @@ static int mv_ehci_probe(struct platform_device *pdev)
> }
>
> platform_set_drvdata(pdev, ehci_mv);
> - ehci_mv->pdata = pdata;
> ehci_mv->hcd = hcd;
>
> - ehci_mv->clknum = pdata->clknum;
> - for (clk_i = 0; clk_i < ehci_mv->clknum; clk_i++) {
> - ehci_mv->clk[clk_i] =
> - devm_clk_get(&pdev->dev, pdata->clkname[clk_i]);
> - if (IS_ERR(ehci_mv->clk[clk_i])) {
> - dev_err(&pdev->dev, "error get clck \"%s\"\n",
> - pdata->clkname[clk_i]);
> - retval = PTR_ERR(ehci_mv->clk[clk_i]);
> - goto err_clear_drvdata;
> + retval = mv_ehci_parse_dt(pdev, ehci_mv);
> + if (retval > 0) {
Is this why you returned 1 from mv_ehci_parse_dt? So you only do this if you
don't have a dt node?
If so, why not rip the check (and positive error code) out of mv_ehci_parse_dt,
and then here:
if (pdev->dev.of_node) {
retval = mv_ehci_parse_dt(pdev, ehci_mv);
} else
fall back to mv_usb_platform_data ...
}
That makes it obvious that one side depends on dt and the other's a fallback,
and doesn't rely on nonstandard return code behaviour.
Also, why not return immediately if mv_ehci_parse_dt fails?
[...]
Thanks,
Mark.
^ permalink raw reply
* Soc MC13783: Improve driver to handle LineIn
From: Gaëtan Carlier @ 2013-01-24 11:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <510101FE.4060307@gmail.com>
Hi,
On 01/24/2013 10:42 AM, Ga?tan Carlier wrote:
> Hello,
> I would like to improve MC13783 driver to be able to control bypass of
> LineIn (RXINR/L) and feed Analog LineIn stream into ouput Mixer via
> ADDRXIN flag.
By cleaning-up/rewriting my code, I get the bypass working.
Now I will try to put a mixer widget referenced "Mixer, Adder, Balance"
in "Audio Ouput Section Diagram" of User's guide to be able to select
which analog audio stream will be fed into selector then I will add
control to be able to select needed SOC_DAPM_OUTPUT.
Is there a way to defined state of a SND_SOC_DAPM_SWITCH to 1 or 0 by
default ?
> This first step one is for test purpose but I also need to select
> RXINR/L as capture source (I saw in RM that CODEC must be enabled and
> only RXINR flag must be selected as input) but nothing seems to be
> captured this is why I need bypass working to test input level, and so on.
>
> I try to create a Mixer based on other driver but it doesn't work.
> I try to finc information about widget macro SND_SOC_DAPM_* but it is
> hard to find something relevant.
> * Which widgets can be link together ?
> * Is there functional difference between VIRT and non-VIRT widget ?
>
> I will post my code in some minutes after clean-up.
>
> Thanks a lot.
> Ga?tan Carlier.
Thanks,
Ga?tan Carlier.
^ permalink raw reply
* [PATCH v2 1/2] clk: divider: prepare for minimum divider
From: Mohammed, Afzal @ 2013-01-24 11:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130123214053.9205.49804@quantum>
Hi Mike,
On Thu, Jan 24, 2013 at 03:10:53, Mike Turquette wrote:
> Quoting Afzal Mohammed (2013-01-23 03:38:52)
> > Some of clocks can have a limit on minimum divider value that can be
> > programmed, prepare for such a support.
> > Add a new field min_div for the basic divider clock and a new dynamic
> > clock divider registration function where minimum divider value can
> > be specified. Keep behaviour of existing divider clock registration
> > functions, static initialization helpers as was earlier.
> My first question is whether the minimum divider you plan to use is an
> actual constraint of the hardware (e.g. the clock controller ip only
> lets program two bits which divide by 4, 5, 6 or 7, where 4 is the
> minimum divider) or if this is a functional constraint (e.g. the clock
> hardware can divide by a lower value, but you never want that since it
> results in non-functional video/audio/whatever). If this is more of a
> functional constraint then perhaps a new api like clk_set_min_rate makes
> more sense.
It is a functional constraint: divider has 8 bits and it can have
all possible values (0 to 255) and divider value corresponds to
value set in the 8 bits. But depending on the modes the minimum
value that can be configured (to get display working) varies.
Eg. For raster mode (which the driver is presently supporting), it
can take a minimum value of 2, while in LIDD (LCD interface display
driver) mode it can take a min value of 1.
Here min rate is not a constraint w.r.t divider in LCDC IP, but
rather min divider.
As it is the case, you prefer a clk_divider_set_min_div()?
>
> Secondly, have you looked into using the rate-table option provided by
> the basic divider clock? Can you explain how this is not a good fit for
> your needs? Perhaps there are too many divisor values so the table
> would be large?
Divider values can range from 2-255 (254 possible values), so I believe
it is not a suitable candidate here (also divider to values have 1-to-1
mapping)
Regards
Afzal
^ permalink raw reply
* [PATCH 2/6] ARM: davinci: da850: add DT node for I2C0
From: Vishwanathrao Badarkhe, Manish @ 2013-01-24 11:35 UTC (permalink / raw)
To: linux-arm-kernel
Add I2C0 device tree node information to da850-evm.
Also, add I2C0 pin muxing information in da850-evm.
Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
---
Depends on patch
http://comments.gmane.org/gmane.linux.davinci/25993
arch/arm/boot/dts/da850-evm.dts | 15 +++++++++++++++
arch/arm/boot/dts/da850.dtsi | 10 ++++++++++
2 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
index 8cac9d2..3d8290a 100755
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -27,5 +27,20 @@
serial2: serial at 1d0d000 {
status = "okay";
};
+ i2c0 at 1c22000 {
+ status = "okay";
+ };
+ };
+};
+&pmx_core {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &i2c0_pins
+ >;
+
+ i2c0_pins: pinmux_i2c0_pins{
+ pinctrl-single,bits = <
+ 0x10 0x00002200 0x0000ff00 /* I2C0_SDA,I2C0_SCL */
+ >;
};
};
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 1e6d090..f5ee811 100755
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -66,5 +66,15 @@
interrupt-parent = <&intc>;
status = "disabled";
};
+ i2c0 at 1c22000 {
+ compatible = "ti,davinci-i2c";
+ reg = <0x22000 0x1000>;
+ clock-frequency = <100000>;
+ interrupts = <15>;
+ interrupt-parent = <&intc>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
};
--
1.7.4.1
^ permalink raw reply related
* [PATCH v6 01/15] ARM: Add page table and page defines needed by KVM
From: Catalin Marinas @ 2013-01-24 11:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130116175726.29147.57548.stgit@ubuntu>
Hi Christoffer,
On Wed, Jan 16, 2013 at 05:57:26PM +0000, Christoffer Dall wrote:
> diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h
> index a3f3792..6ef8afd 100644
> --- a/arch/arm/include/asm/pgtable-3level.h
> +++ b/arch/arm/include/asm/pgtable-3level.h
> @@ -104,11 +104,29 @@
> */
> #define L_PGD_SWAPPER (_AT(pgdval_t, 1) << 55) /* swapper_pg_dir entry */
>
> +/*
> + * 2nd stage PTE definitions for LPAE.
> + */
> +#define L_PTE_S2_MT_UNCACHED (_AT(pteval_t, 0x5) << 2) /* MemAttr[3:0] */
> +#define L_PTE_S2_MT_WRITETHROUGH (_AT(pteval_t, 0xa) << 2) /* MemAttr[3:0] */
> +#define L_PTE_S2_MT_WRITEBACK (_AT(pteval_t, 0xf) << 2) /* MemAttr[3:0] */
> +#define L_PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[1] */
> +#define L_PTE_S2_RDWR (_AT(pteval_t, 2) << 6) /* HAP[2:1] */
Why is this called L_PTE_S2_RDWR? The ARM ARM shows HAP[2:1] as 0b11 for
read/write and 0b10 for WRONLY.
> --- a/arch/arm/include/asm/pgtable.h
> +++ b/arch/arm/include/asm/pgtable.h
> @@ -70,6 +70,9 @@ extern void __pgd_error(const char *file, int line, pgd_t);
>
> extern pgprot_t pgprot_user;
> extern pgprot_t pgprot_kernel;
> +extern pgprot_t pgprot_hyp_device;
> +extern pgprot_t pgprot_s2;
> +extern pgprot_t pgprot_s2_device;
>
> #define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b))
>
> @@ -82,6 +85,10 @@ extern pgprot_t pgprot_kernel;
> #define PAGE_READONLY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
> #define PAGE_KERNEL _MOD_PROT(pgprot_kernel, L_PTE_XN)
> #define PAGE_KERNEL_EXEC pgprot_kernel
> +#define PAGE_HYP _MOD_PROT(pgprot_kernel, L_PTE_HYP)
> +#define PAGE_HYP_DEVICE _MOD_PROT(pgprot_hyp_device, L_PTE_HYP)
> +#define PAGE_S2 _MOD_PROT(pgprot_s2, L_PTE_S2_RDONLY)
> +#define PAGE_S2_DEVICE _MOD_PROT(pgprot_s2_device, L_PTE_USER | L_PTE_S2_RDONLY)
Are these S2 read-only by default?
--
Catalin
^ permalink raw reply
* [PATCH v1 0/6] USB: Add support for multiple PHYs of same type
From: Mohammed, Afzal @ 2013-01-24 11:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50FFF31D.2070908@ti.com>
Hi Kishon,
On Wed, Jan 23, 2013 at 19:56:37, ABRAHAM, KISHON VIJAY wrote:
> On Wednesday 23 January 2013 07:28 PM, Mohammed, Afzal wrote:
> > USB first instance of am335x works in mainline as of now.
> Can you check if this series indeed breaks am335x?
>
> Thanks for your help.
Do you have a tree having these changes, it would be easier for me.
Regards
Afzal
^ permalink raw reply
* [PATCH v2 09/16] ARM: vexpress: Select the correct SMP operations at run-time
From: Jon Medhurst (Tixy) @ 2013-01-24 11:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359008879-9015-10-git-send-email-nicolas.pitre@linaro.org>
On Thu, 2013-01-24 at 01:27 -0500, Nicolas Pitre wrote:
> From: Jon Medhurst <tixy@linaro.org>
>
> Signed-off-by: Jon Medhurst <tixy@linaro.org>
> ---
Should this patch be split into two. One to introduce the new smp_init
hook, and one to make vexpress use it? With descriptions like:
-----------------------------------------------------------------------
ARM: kernel: Enable selection of SMP operations at boot time
Add a new 'smp_init' hook to machine_desc so platforms can specify a
function to be used to setup smp ops instead of having a statically
defined value.
-----------------------------------------------------------------------
ARM: vexpress: Select multi-cluster SMP operation if required
-----------------------------------------------------------------------
--
Tixy
> arch/arm/include/asm/mach/arch.h | 3 +++
> arch/arm/kernel/setup.c | 5 ++++-
> arch/arm/mach-vexpress/core.h | 2 ++
> arch/arm/mach-vexpress/platsmp.c | 12 ++++++++++++
> arch/arm/mach-vexpress/v2m.c | 2 +-
> 5 files changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
> index 917d4fcfd9..3d01c6d6c3 100644
> --- a/arch/arm/include/asm/mach/arch.h
> +++ b/arch/arm/include/asm/mach/arch.h
> @@ -17,8 +17,10 @@ struct pt_regs;
> struct smp_operations;
> #ifdef CONFIG_SMP
> #define smp_ops(ops) (&(ops))
> +#define smp_init_ops(ops) (&(ops))
> #else
> #define smp_ops(ops) (struct smp_operations *)NULL
> +#define smp_init_ops(ops) (void (*)(void))NULL
> #endif
>
> struct machine_desc {
> @@ -42,6 +44,7 @@ struct machine_desc {
> unsigned char reserve_lp2 :1; /* never has lp2 */
> char restart_mode; /* default restart mode */
> struct smp_operations *smp; /* SMP operations */
> + void (*smp_init)(void);
> void (*fixup)(struct tag *, char **,
> struct meminfo *);
> void (*reserve)(void);/* reserve mem blocks */
> diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
> index 3f6cbb2e3e..41edca8582 100644
> --- a/arch/arm/kernel/setup.c
> +++ b/arch/arm/kernel/setup.c
> @@ -768,7 +768,10 @@ void __init setup_arch(char **cmdline_p)
> arm_dt_init_cpu_maps();
> #ifdef CONFIG_SMP
> if (is_smp()) {
> - smp_set_ops(mdesc->smp);
> + if(mdesc->smp_init)
> + (*mdesc->smp_init)();
> + else
> + smp_set_ops(mdesc->smp);
> smp_init_cpus();
> }
> #endif
> diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h
> index f134cd4a85..3a761fd76c 100644
> --- a/arch/arm/mach-vexpress/core.h
> +++ b/arch/arm/mach-vexpress/core.h
> @@ -6,6 +6,8 @@
>
> void vexpress_dt_smp_map_io(void);
>
> +void vexpress_smp_init_ops(void);
> +
> extern struct smp_operations vexpress_smp_ops;
>
> extern void vexpress_cpu_die(unsigned int cpu);
> diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
> index c5d70de9bb..e62a08b561 100644
> --- a/arch/arm/mach-vexpress/platsmp.c
> +++ b/arch/arm/mach-vexpress/platsmp.c
> @@ -12,6 +12,7 @@
> #include <linux/errno.h>
> #include <linux/smp.h>
> #include <linux/io.h>
> +#include <linux/of.h>
> #include <linux/of_fdt.h>
> #include <linux/vexpress.h>
>
> @@ -206,3 +207,14 @@ struct smp_operations __initdata vexpress_smp_ops = {
> .cpu_die = vexpress_cpu_die,
> #endif
> };
> +
> +void __init vexpress_smp_init_ops(void)
> +{
> + struct smp_operations *ops = &vexpress_smp_ops;
> +#ifdef CONFIG_BIG_LITTLE
> + extern struct smp_operations bL_smp_ops;
> + if(of_find_compatible_node(NULL, NULL, "arm,cci"))
> + ops = &bL_smp_ops;
> +#endif
> + smp_set_ops(ops);
> +}
> diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
> index 011661a6c5..34172bd504 100644
> --- a/arch/arm/mach-vexpress/v2m.c
> +++ b/arch/arm/mach-vexpress/v2m.c
> @@ -494,7 +494,7 @@ static const char * const v2m_dt_match[] __initconst = {
>
> DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
> .dt_compat = v2m_dt_match,
> - .smp = smp_ops(vexpress_smp_ops),
> + .smp_init = smp_init_ops(vexpress_smp_init_ops),
> .map_io = v2m_dt_map_io,
> .init_early = v2m_dt_init_early,
> .init_irq = v2m_dt_init_irq,
^ permalink raw reply
* [PATCH 2/4] drm/i2c: nxp-tda998x (v2)
From: Daniel Vetter @ 2013-01-24 11:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358894185-21617-3-git-send-email-robdclark@gmail.com>
On Tue, Jan 22, 2013 at 04:36:23PM -0600, Rob Clark wrote:
> Driver for the NXP TDA998X i2c hdmi encoder slave.
>
> v1: original
> v2: fix npix/nline programming
>
> Signed-off-by: Rob Clark <robdclark@gmail.com>
Just one bikeshed, otherwise
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[cut]
> +static void
> +reg_set(struct drm_encoder *encoder, uint16_t reg, uint8_t val)
> +{
> + reg_write(encoder, reg, reg_read(encoder, reg) | val);
> +}
> +
> +static void
> +reg_clear(struct drm_encoder *encoder, uint16_t reg, uint8_t val)
> +{
> + reg_write(encoder, reg, reg_read(encoder, reg) & ~val);
> +}
What about drivers/base/regmap? I haven't looked to closely yet and never
used it in code, but there's a presentation [1] and it sounds like it
provides some nice (and more important standardized) helper stuff for
debug, tracing, ...
Since encoder slave drivers tend to be utterly boring register bashing and
we expect tons of time, I think high levels of standardization would be
really useful. Care to look into this a bit?
Cheers, Daniel
1: http://free-electrons.com/blog/fosdem2012-videos/
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply
* [PATCH 5/6] ARM: regulator: add tps6507x device tree data
From: Mark Brown @ 2013-01-24 12:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359024920-32190-6-git-send-email-manishv.b@ti.com>
On Thu, Jan 24, 2013 at 04:25:19PM +0530, Vishwanathrao Badarkhe, Manish wrote:
> ---
> arch/arm/boot/dts/tps6507x.dtsi | 47 +++++++++++++++++++++++++++++++++++++++
Why are you putting this in arch/arm?
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* [PATCH 6/6 v14] gpio: Add block gpio to several gpio drivers
From: Stijn Devriendt @ 2013-01-24 12:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358856404-8975-7-git-send-email-stigge@antcom.de>
On Tue, Jan 22, 2013 at 1:06 PM, Roland Stigge <stigge@antcom.de> wrote:
> This patch adds block GPIO support to several gpio drivers.
>
> This implements block GPIO only for some selected drivers since block GPIO is
> an optional feature which may not be suitable for every GPIO hardware. (With
> automatic fallback to the single GPIO functions if not available in a driver.)
>
> Signed-off-by: Roland Stigge <stigge@antcom.de>
>
> For pinctrl-at91.c:
> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
>
> ---
>
> +static void lpc32xx_gpio_set_block_p3(struct gpio_chip *chip,
> + unsigned long mask,
> + unsigned long values)
> +{
> + struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip);
> + u32 set_bits = values & mask;
> + u32 clr_bits = ~values & mask;
> +
> + /* States of GPIO 0-5 start at bit 25 */
> + set_bits <<= 25;
> + clr_bits <<= 25;
> +
> + /* Note: On LPC32xx, GPOs can only be set at once or cleared at once,
> + * but not set and cleared at once
> + */
> + if (set_bits)
> + __raw_writel(set_bits, group->gpio_grp->outp_set);
> + if (clr_bits)
> + __raw_writel(clr_bits, group->gpio_grp->outp_clr);
> +}
> +
In my patch, I go out of the way of this kind of thing for a simple reason:
You may generate incorrect timing by doing this.
As a fictive example, consider the i2c-bitbang driver, which you could optimize
by using block-gpio with sda/scl in a single block. By offering the
block-gpio API
even when you cannot set all bits at once, you could cause timing issues.
You might be toggling the clock line before pushing out data, for example.
The same holds below, for a driver that has separate hi/lo bits.
Regards,
Stijn
^ permalink raw reply
* [RFC PATCH 6/6] ARM: kirkwood: consolidate mv643xx_eth init for DT
From: Jason Cooper @ 2013-01-24 12:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130124062323.GB21297@lunn.ch>
On Thu, Jan 24, 2013 at 07:23:23AM +0100, Andrew Lunn wrote:
> > > +static void kirkwood_gige_dt_init(void) {
> > > + int i;
> > > +
> > > + for (i = 0; kw_dt_gige[i].compatible != NULL; i++) {
> > > + if (of_machine_is_compatible(kw_dt_gige[i].compatible)) {
> > > +
> > > + if (kw_dt_gige[i].phy_addr00 != MV643XX_ETH_PHY_NONE) {
> > > + struct mv643xx_eth_platform_data d = {
> > > + .phy_addr = kw_dt_gige[i].phy_addr00,
> > > + };
> > > + kirkwood_ge00_init(&d);
> > > + }
> > > +
> > > + if (kw_dt_gige[i].phy_addr01 != MV643XX_ETH_PHY_NONE) {
> > > + struct mv643xx_eth_platform_data d = {
> > > + .phy_addr = kw_dt_gige[i].phy_addr01,
> > > + };
> > > + kirkwood_ge01_init(&d);
> > > + }
> > > +
> > > + break;
> > > + }
> >
> > meh, hindsight is 50/50 :-) Much more readable this way, I think:
> >
> > if (of_machine_is_compatible(kw_dt_gige[i].compatible)) {
> > struct mv643xx_eth_platform_data d;
> >
> > if (kw_dt_gige[i].phy_addr00 != MV643XX_ETH_PHY_NONE) {
> > d.phy_addr = kw_dt_gige[i].phy_addr00,
> > kirkwood_ge00_init(&d);
> > }
> >
> > if (kw_dt_gige[i].phy_addr01 != MV643XX_ETH_PHY_NONE) {
> > d.phy_addr = kw_dt_gige[i].phy_addr01,
> > kirkwood_ge01_init(&d);
> > }
> >
> > break;
> > }
> >
> > thx,
> >
> > Jason.
>
> Hi Jason
>
> Might it be better still to implement something like:
>
> const struct of_device_id *of_match_machine(const struct of_device_id *matches)
> {
> struct device_node *root;
> const struct of_device_id *match;
>
> if (!matches)
> return NULL;
>
> root = of_find_node_by_path("/");
> if (!root)
> return NULL;
>
> match = of_match_node(matches, root);
> of_node_put(root);
>
> return match;
> }
I actually went looking for something like this in linux/of.h and didn't
find it. Perhaps it should be added? Although I'm not sure I see a use
case after the conversion to DT is complete...
>
> and then board-dt.c becomes
>
> match = of_match_machine(ge00_matches);
> if (match)
> krikwood_ge00_init(match->data)
>
> match = of_match_machine(ge01_matches);
> if (match)
> krikwood_ge01_init(match->data)
Much nicer, I'll do this for the next revision and see what the
devicetree guys think.
thx,
Jason.
^ permalink raw reply
* [PATCH 6/6 v14] gpio: Add block gpio to several gpio drivers
From: Mark Brown @ 2013-01-24 12:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOY=C6H5xETt5UNXUfRkGW9q+bj0y2R3sXNvW87XXvQcYoL_-g@mail.gmail.com>
On Thu, Jan 24, 2013 at 01:02:38PM +0100, Stijn Devriendt wrote:
> As a fictive example, consider the i2c-bitbang driver, which you could optimize
> by using block-gpio with sda/scl in a single block. By offering the
> block-gpio API
> even when you cannot set all bits at once, you could cause timing issues.
> You might be toggling the clock line before pushing out data, for example.
> The same holds below, for a driver that has separate hi/lo bits.
If there's a strict ordering requirement on updates then I would expect
a user to explictly code that in hardware otherwise there may be
hardware level issues with unpredictable results; besides in general it
seems silly to force users to open code both versions if they don't want
to rely on this API.
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* [PATCH 6/6 v14] gpio: Add block gpio to several gpio drivers
From: Roland Stigge @ 2013-01-24 12:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOY=C6H5xETt5UNXUfRkGW9q+bj0y2R3sXNvW87XXvQcYoL_-g@mail.gmail.com>
On 01/24/2013 01:02 PM, Stijn Devriendt wrote:
>> +static void lpc32xx_gpio_set_block_p3(struct gpio_chip *chip,
>> + unsigned long mask,
>> + unsigned long values)
>> +{
>> + struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip);
>> + u32 set_bits = values & mask;
>> + u32 clr_bits = ~values & mask;
>> +
>> + /* States of GPIO 0-5 start at bit 25 */
>> + set_bits <<= 25;
>> + clr_bits <<= 25;
>> +
>> + /* Note: On LPC32xx, GPOs can only be set at once or cleared at once,
>> + * but not set and cleared at once
>> + */
>> + if (set_bits)
>> + __raw_writel(set_bits, group->gpio_grp->outp_set);
>> + if (clr_bits)
>> + __raw_writel(clr_bits, group->gpio_grp->outp_clr);
>> +}
>> +
>
> In my patch, I go out of the way of this kind of thing for a simple reason:
> You may generate incorrect timing by doing this.
You are right, certain things like synchronous on+off is not really
possible.
However, the above at least supports switching on simulaneously, and
switching off simultaneously, which is an improvement in certain cases
(and this certain hardware part doesn't support more). Maybe this
certain driver behaviour can be documented even better than just in the
driver source.
If there is consensus that everything else in the patch set is settled,
and we just don't want to support behaviour like the above - well, we
can still drop it.
Thanks for the note,
Roland
^ permalink raw reply
* [PATCH 1/2] i2c-s3c2410: Leave the bus disabled unless it is in use
From: Wolfram Sang @ 2013-01-24 12:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1354165536-18529-2-git-send-email-ch.naveen@samsung.com>
On Thu, Nov 29, 2012 at 10:35:34AM +0530, Naveen Krishna Chatradhi wrote:
> From: Simon Glass <sjg@chromium.org>
>
> There is a rather odd feature of the exynos i2c controller that if it
> is left enabled, it can lock itself up with the clk line held low.
> This makes the bus unusable.
>
> Unfortunately, the s3c24xx_i2c_set_master() function does not notice
> this, and reports a timeout. From then on the bus cannot be used until
> the AP is rebooted.
>
> The problem happens when any sort of interrupt occurs (e.g. due to a
> bus transition) when we are not in the middle of a transaction. We
> have seen many instances of this when U-Boot leaves the bus apparently
> happy, but Linux cannot access it.
>
> The current code is therefore pretty fragile.
>
> This fixes things by leaving the bus disabled unless we are actually
> in a transaction. We enable the bus at the start of the transaction and
> disable it at the end. That way we won't get interrupts and will not
> lock up the bus.
>
> It might be possible to clear pending interrupts on start-up, but this
> seems to be a more robust solution. We can't service interrupts when
> we are not in a transaction, and anyway would rather not lock up the
> bus while we try.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> Cc: Grant Grundler <grundler@chromium.org>
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
So, I assume this patch is still needed despite the ongoing discussion
about arbitration?
> ---
> drivers/i2c/busses/i2c-s3c2410.c | 37 +++++++++++++++++++++++++++++++++----
> 1 file changed, 33 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
> index e93e7d6..2fd346d 100644
> --- a/drivers/i2c/busses/i2c-s3c2410.c
> +++ b/drivers/i2c/busses/i2c-s3c2410.c
> @@ -186,6 +186,31 @@ static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)
> writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
> }
>
> +/*
> + * Disable the bus so that we won't get any interrupts from now on, or try
> + * to drive any lines. This is the default state when we don't have
> + * anything to send/receive.
> + *
> + * If there is an event on the bus, or we have a pre-existing event at
Otherwise, if...
> + * kernel boot time, we may not notice the event and the I2C controller
> + * will lock the bus with the I2C clock line low indefinitely.
> + */
> +static inline void s3c24xx_i2c_disable_bus(struct s3c24xx_i2c *i2c)
> +{
> + unsigned long tmp;
> +
> + /* Stop driving the I2C pins */
> + tmp = readl(i2c->regs + S3C2410_IICSTAT);
> + tmp &= ~S3C2410_IICSTAT_TXRXEN;
> + writel(tmp, i2c->regs + S3C2410_IICSTAT);
> +
> + /* We don't expect any interrupts now, and don't want send acks */
> + tmp = readl(i2c->regs + S3C2410_IICCON);
> + tmp &= ~(S3C2410_IICCON_IRQEN | S3C2410_IICCON_IRQPEND |
> + S3C2410_IICCON_ACKEN);
> + writel(tmp, i2c->regs + S3C2410_IICCON);
> +}
> +
>
> /* s3c24xx_i2c_message_start
> *
> @@ -646,7 +671,11 @@ static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c,
>
> s3c24xx_i2c_wait_idle(i2c);
>
> + s3c24xx_i2c_disable_bus(i2c);
> +
> out:
> + i2c->state = STATE_IDLE;
> +
Why is the state change after the label?
> return ret;
> }
>
> @@ -912,7 +941,6 @@ static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c)
>
> static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
> {
> - unsigned long iicon = S3C2410_IICCON_IRQEN | S3C2410_IICCON_ACKEN;
> struct s3c2410_platform_i2c *pdata;
> unsigned int freq;
>
> @@ -926,12 +954,12 @@ static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
>
> dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);
>
> - writel(iicon, i2c->regs + S3C2410_IICCON);
> + writel(0, i2c->regs + S3C2410_IICCON);
> + writel(0, i2c->regs + S3C2410_IICSTAT);
>
> /* we need to work out the divisors for the clock... */
>
> if (s3c24xx_i2c_clockrate(i2c, &freq) != 0) {
> - writel(0, i2c->regs + S3C2410_IICCON);
> dev_err(i2c->dev, "cannot meet bus frequency required\n");
> return -EINVAL;
> }
> @@ -939,7 +967,8 @@ static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
> /* todo - check that the i2c lines aren't being dragged anywhere */
>
> dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
> - dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon);
> + dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02x\n",
> + readl(i2c->regs + S3C2410_IICCON));
>
Regards,
Wolfram
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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* [PATCH 0/2] ARM: dts: omap3-overo: Add pwm-leds and audio support
From: Benoit Cousson @ 2013-01-24 12:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358963812-19947-1-git-send-email-florian.vaussard@epfl.ch>
+ Peter who did the original PWM
Hi Florian,
On 01/23/2013 06:56 PM, Florian Vaussard wrote:
> Hello Benoit,
>
> This patchset adds some new DT supports to the Overo products.
> The first patch converts the PMIC LEDB output to use the pwm-leds,
> newly merged in your branch for_3.9/dts. The second patch
> adds the audio support.
Excellent, that looks very good to me, but I'd like to get the feedback
from Peter before merging it.
Thanks,
Benoit
^ permalink raw reply
* [PATCH] Asoc: Samsung: Add support for I2S runtime S2R
From: R. Chandrasekar @ 2013-01-24 12:35 UTC (permalink / raw)
To: linux-arm-kernel
From: "R. Chandrasekar" <rcsekar@samsung.com>
This patch adds runtime suspend to resume support for I2S.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: R. Chandrasekar <rcsekar@samsung.com>
---
sound/soc/samsung/i2s.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index d2d124f..27a5ab1 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -993,6 +993,26 @@ static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
return i2s;
}
+#ifdef CONFIG_PM_RUNTIME
+static int i2s_runtime_suspend(struct device *dev)
+{
+ struct i2s_dai *i2s = dev_get_drvdata(dev);
+
+ clk_disable_unprepare(i2s->clk);
+
+ return 0;
+}
+
+static int i2s_runtime_resume(struct device *dev)
+{
+ struct i2s_dai *i2s = dev_get_drvdata(dev);
+
+ clk_prepare_enable(i2s->clk);
+
+ return 0;
+}
+#endif /* CONFIG_PM_RUNTIME */
+
static int samsung_i2s_probe(struct platform_device *pdev)
{
u32 dma_pl_chan, dma_cp_chan, dma_pl_sec_chan;
@@ -1143,12 +1163,18 @@ static int samsung_i2s_remove(struct platform_device *pdev)
return 0;
}
+static const struct dev_pm_ops samsung_i2s_pm = {
+ SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
+ i2s_runtime_resume, NULL)
+};
+
static struct platform_driver samsung_i2s_driver = {
.probe = samsung_i2s_probe,
.remove = samsung_i2s_remove,
.driver = {
.name = "samsung-i2s",
.owner = THIS_MODULE,
+ .pm = &samsung_i2s_pm,
},
};
--
1.7.9.5
^ permalink raw reply related
* [PATCH] Asoc: Samsung: Add I2S S/W RST in startup function
From: R. Chandrasekar @ 2013-01-24 12:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359030931-27354-1-git-send-email-rcsekar@samsung.com>
From: Padmavathi Venna <padma.v@samsung.com>
I2S module need to be reset after S2R. Keeping the S/W rst
control part in resume didn't help in playing audio after resume.
So this patch adds S/W RST control part in startup function which
gets triggered for every new audio stream playback.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: R. Chandrasekar <rcsekar@samsung.com>
---
sound/soc/samsung/i2s.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 27a5ab1..9f098cd 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -651,6 +651,9 @@ static int i2s_startup(struct snd_pcm_substream *substream,
/* Enforce set_sysclk in Master mode */
i2s->rclk_srcrate = 0;
+ if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
+ writel(CON_RSTCLR, i2s->addr + I2SCON);
+
spin_unlock_irqrestore(&lock, flags);
return 0;
--
1.7.9.5
^ permalink raw reply related
* [PATCH] ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440
From: Benoit Cousson @ 2013-01-24 12:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <50FFC1B0.8000601@ti.com>
Hi Santosh,
On 01/23/2013 11:55 AM, Santosh Shilimkar wrote:
> Looping Marc, Benoit
>
> On Wednesday 23 January 2013 04:06 PM, Mark Rutland wrote:
>> On Tue, Jan 22, 2013 at 10:05:18PM +0000, Kukjin Kim wrote:
>>> Mark Rutland wrote:
>>>>
>>> + devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren
>>>
>>>> On Tue, Jan 22, 2013 at 01:41:27AM +0000, Kukjin Kim wrote:
>>>>> From: Thomas Abraham <thomas.ab@samsung.com>
>>>>>
>>>>> Need to be changed requirements in the 'cpus' node for exynos5440
>>>>> to specify all the per-cpu interrupts of arch timer.
>>>>
>>>> The node(s) for the arch timer should not be in the cpus/cpu at N nodes.
>>>> Instead, there should be one node (in the root of the tree).
>>>>
>>> Well, I don't think so. As per my understanding, the local timers are
>>> attached to every ARM cores (cpus) and it generates certain interrupt
>>> to the
>>> GIC. So the correct representation for this in device tree is to
>>> include the
>>> interrupts in the cpu nodes in dts file. Your comments refer to a
>>> limitation in the Linux kernel implementation of the arch_timer and it
>>> should not result in representing the hardware details incorrectly in
>>> the
>>> dts file.
>>
>> I disagree. The "correct representation" is whatever the devicetree
>> binding
>> documentation describes. It does not describe placing timer nodes in
>> the cpu
>> nodes.
>>
> This seems to be exact same topic what is getting discussed here [1]
> Technically DT is suppose to represent how the hardware is rather than
> how the bindings are done.
>
> But as Marc pointed out, the approach taken currently is to not
> duplicate the banked information. The thread [1] isn't concluded
> yet but looks like we might want to avoid duplicating the information
> considering, more of such duplication needs to follow. e.g gic i/f
>
> Am still waiting on what Benoit has to say ?
I agree with you :-)
I'm not sure the binding was properly done to reflect the HW accurately.
A local timer for my point of view should be located in the cpu node
like a L1 cache. Or at least referenced in each cpu by a phandle.
What was the rational to put it in the root?
Regards,
Benoit
^ permalink raw reply
* [PATCH 3/4] drm/tilcdc: add encoder slave
From: Daniel Vetter @ 2013-01-24 12:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358894185-21617-4-git-send-email-robdclark@gmail.com>
On Tue, Jan 22, 2013 at 04:36:24PM -0600, Rob Clark wrote:
> Add output panel driver for i2c encoder slaves.
>
> Signed-off-by: Rob Clark <robdclark@gmail.com>
A few questions below, otherwise
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
> drivers/gpu/drm/tilcdc/Kconfig | 12 ++
> drivers/gpu/drm/tilcdc/Makefile | 1 +
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 5 +-
> drivers/gpu/drm/tilcdc/tilcdc_slave.c | 380 ++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/tilcdc/tilcdc_slave.h | 26 +++
> 5 files changed, 423 insertions(+), 1 deletion(-)
> create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_slave.c
> create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_slave.h
>
> diff --git a/drivers/gpu/drm/tilcdc/Kconfig b/drivers/gpu/drm/tilcdc/Kconfig
> index ee9b592..99beca2 100644
> --- a/drivers/gpu/drm/tilcdc/Kconfig
> +++ b/drivers/gpu/drm/tilcdc/Kconfig
> @@ -8,3 +8,15 @@ config DRM_TILCDC
> Choose this option if you have an TI SoC with LCDC display
> controller, for example AM33xx in beagle-bone, DA8xx, or
> OMAP-L1xx. This driver replaces the FB_DA8XX fbdev driver.
> +
> +menu "I2C encoder or helper chips"
> + depends on DRM && DRM_KMS_HELPER && I2C
> +
> +config DRM_I2C_NXP_TDA998X
> + tristate "NXP Semiconductors TDA998X HDMI encoder"
> + default m if DRM_TILCDC
> + help
> + Support for NXP Semiconductors TDA998X HDMI encoders.
> +
> +endmenu
> +
Shouldn't that hunk be in patch 2?
> diff --git a/drivers/gpu/drm/tilcdc/Makefile b/drivers/gpu/drm/tilcdc/Makefile
> index 1359cc2..aa9097e 100644
> --- a/drivers/gpu/drm/tilcdc/Makefile
> +++ b/drivers/gpu/drm/tilcdc/Makefile
> @@ -3,6 +3,7 @@ ccflags-y := -Iinclude/drm -Werror
> tilcdc-y := \
> tilcdc_crtc.o \
> tilcdc_tfp410.o \
> + tilcdc_slave.o \
> tilcdc_drv.o
>
> obj-$(CONFIG_DRM_TILCDC) += tilcdc.o
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index cf1fddc..ca76dbe 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -20,6 +20,7 @@
> #include "tilcdc_drv.h"
> #include "tilcdc_regs.h"
> #include "tilcdc_tfp410.h"
> +#include "tilcdc_slave.h"
>
> #include "drm_fb_helper.h"
>
> @@ -587,6 +588,7 @@ static int __init tilcdc_drm_init(void)
> {
> DBG("init");
> tilcdc_tfp410_init();
> + tilcdc_slave_init();
> return platform_driver_register(&tilcdc_platform_driver);
> }
>
> @@ -594,10 +596,11 @@ static void __exit tilcdc_drm_fini(void)
> {
> DBG("fini");
> tilcdc_tfp410_fini();
> + tilcdc_slave_fini();
> platform_driver_unregister(&tilcdc_platform_driver);
> }
>
> -module_init(tilcdc_drm_init);
> +late_initcall(tilcdc_drm_init);
> module_exit(tilcdc_drm_fini);
>
> MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_slave.c b/drivers/gpu/drm/tilcdc/tilcdc_slave.c
> new file mode 100644
> index 0000000..b6f3e63
> --- /dev/null
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_slave.c
> @@ -0,0 +1,380 @@
> +/*
> + * Copyright (C) 2012 Texas Instruments
> + * Author: Rob Clark <robdclark@gmail.com>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License version 2 as published by
> + * the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
> + * more details.
> + *
> + * You should have received a copy of the GNU General Public License along with
> + * this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#include <linux/i2c.h>
> +#include <linux/of_i2c.h>
> +#include <linux/pinctrl/pinmux.h>
> +#include <linux/pinctrl/consumer.h>
> +#include <drm/drm_encoder_slave.h>
> +
> +#include "tilcdc_drv.h"
> +
> +struct slave_module {
> + struct tilcdc_module base;
> + struct i2c_adapter *i2c;
> +};
> +#define to_slave_module(x) container_of(x, struct slave_module, base)
> +
> +static const struct tilcdc_panel_info slave_info = {
> + .min_bpp = 16,
> + .max_bpp = 16,
> + .bpp = 16,
> + .ac_bias = 255,
> + .ac_bias_intrpt = 0,
> + .dma_burst_sz = 16,
> + .fdd = 0x80,
> + .tft_alt_mode = 0,
> + .stn_565_mode = 0,
> + .mono_8bit_mode = 0,
> + .sync_edge = 0,
> + .sync_ctrl = 1,
> + .raster_order = 0,
> +};
> +
> +
> +/*
> + * Encoder:
> + */
> +
> +struct slave_encoder {
> + struct drm_encoder_slave base;
> + struct slave_module *mod;
> +};
> +#define to_slave_encoder(x) container_of(to_encoder_slave(x), struct slave_encoder, base)
Since you have a 1:1:1 relationship between module/drm_encoder, the
drm_encoder_slave and the connector I'd just smash this all into one
struct. Pure bikeshed though ;-)
> +
> +static inline struct drm_encoder_slave_funcs *
> +get_slave_funcs(struct drm_encoder *enc)
> +{
> + return to_encoder_slave(enc)->slave_funcs;
> +}
> +
> +static void slave_encoder_destroy(struct drm_encoder *encoder)
> +{
> + struct slave_encoder *slave_encoder = to_slave_encoder(encoder);
> + if (get_slave_funcs(encoder))
> + get_slave_funcs(encoder)->destroy(encoder);
> + drm_encoder_cleanup(encoder);
> + kfree(slave_encoder);
> +}
> +
> +static void slave_encoder_prepare(struct drm_encoder *encoder)
> +{
> + drm_i2c_encoder_prepare(encoder);
> + tilcdc_crtc_set_panel_info(encoder->crtc, &slave_info);
> +}
> +
> +static const struct drm_encoder_funcs slave_encoder_funcs = {
> + .destroy = slave_encoder_destroy,
> +};
> +
> +static const struct drm_encoder_helper_funcs slave_encoder_helper_funcs = {
> + .dpms = drm_i2c_encoder_dpms,
> + .mode_fixup = drm_i2c_encoder_mode_fixup,
> + .prepare = slave_encoder_prepare,
> + .commit = drm_i2c_encoder_commit,
> + .mode_set = drm_i2c_encoder_mode_set,
> + .save = drm_i2c_encoder_save,
> + .restore = drm_i2c_encoder_restore,
> +};
> +
> +static const struct i2c_board_info info = {
> + I2C_BOARD_INFO("tda998x", 0x70)
> +};
> +
> +static struct drm_encoder *slave_encoder_create(struct drm_device *dev,
> + struct slave_module *mod)
> +{
> + struct slave_encoder *slave_encoder;
> + struct drm_encoder *encoder;
> + int ret;
> +
> + slave_encoder = kzalloc(sizeof(*slave_encoder), GFP_KERNEL);
> + if (!slave_encoder) {
> + dev_err(dev->dev, "allocation failed\n");
> + return NULL;
> + }
> +
> + slave_encoder->mod = mod;
> +
> + encoder = &slave_encoder->base.base;
> + encoder->possible_crtcs = 1;
> +
> + ret = drm_encoder_init(dev, encoder, &slave_encoder_funcs,
> + DRM_MODE_ENCODER_LVDS);
DRM_MODE_ENCODER_TMDS? Although I guess adding a new kind of
multi-function encoder type would make more sense and also useful in other
places. E.g. i915-sdvo/dvo just set meaningless types for multi-function
encoders (i.e. more than one connector on the same output), namely the
type which matches the connector last initalized.
> + if (ret)
> + goto fail;
> +
> + drm_encoder_helper_add(encoder, &slave_encoder_helper_funcs);
> +
> + ret = drm_i2c_encoder_init(dev, to_encoder_slave(encoder), mod->i2c, &info);
> + if (ret)
> + goto fail;
> +
> + return encoder;
> +
> +fail:
> + slave_encoder_destroy(encoder);
> + return NULL;
> +}
> +
> +/*
> + * Connector:
> + */
> +
> +struct slave_connector {
> + struct drm_connector base;
> +
> + struct drm_encoder *encoder; /* our connected encoder */
> + struct slave_module *mod;
> +};
> +#define to_slave_connector(x) container_of(x, struct slave_connector, base)
> +
> +static void slave_connector_destroy(struct drm_connector *connector)
> +{
> + struct slave_connector *slave_connector = to_slave_connector(connector);
> + drm_connector_cleanup(connector);
> + kfree(slave_connector);
> +}
> +
> +static enum drm_connector_status slave_connector_detect(
> + struct drm_connector *connector,
> + bool force)
> +{
> + struct drm_encoder *encoder = to_slave_connector(connector)->encoder;
> + return get_slave_funcs(encoder)->detect(encoder, connector);
> +}
> +
> +static int slave_connector_get_modes(struct drm_connector *connector)
> +{
> + struct drm_encoder *encoder = to_slave_connector(connector)->encoder;
> + return get_slave_funcs(encoder)->get_modes(encoder, connector);
> +}
> +
> +static int slave_connector_mode_valid(struct drm_connector *connector,
> + struct drm_display_mode *mode)
> +{
> + struct drm_encoder *encoder = to_slave_connector(connector)->encoder;
> + struct tilcdc_drm_private *priv = connector->dev->dev_private;
> + int ret;
> +
> + ret = tilcdc_crtc_mode_valid(priv->crtc, mode);
> + if (ret != MODE_OK)
> + return ret;
> +
> + return get_slave_funcs(encoder)->mode_valid(encoder, mode);
> +}
> +
> +static struct drm_encoder *slave_connector_best_encoder(
> + struct drm_connector *connector)
> +{
> + struct slave_connector *slave_connector = to_slave_connector(connector);
> + return slave_connector->encoder;
> +}
> +
> +static int slave_connector_set_property(struct drm_connector *connector,
> + struct drm_property *property, uint64_t value)
> +{
> + struct drm_encoder *encoder = to_slave_connector(connector)->encoder;
> + return get_slave_funcs(encoder)->set_property(encoder,
> + connector, property, value);
> +}
> +
> +static const struct drm_connector_funcs slave_connector_funcs = {
> + .destroy = slave_connector_destroy,
> + .dpms = drm_helper_connector_dpms,
> + .detect = slave_connector_detect,
> + .fill_modes = drm_helper_probe_single_connector_modes,
> + .set_property = slave_connector_set_property,
> +};
> +
> +static const struct drm_connector_helper_funcs slave_connector_helper_funcs = {
> + .get_modes = slave_connector_get_modes,
> + .mode_valid = slave_connector_mode_valid,
> + .best_encoder = slave_connector_best_encoder,
> +};
> +
> +static struct drm_connector *slave_connector_create(struct drm_device *dev,
> + struct slave_module *mod, struct drm_encoder *encoder)
> +{
> + struct slave_connector *slave_connector;
> + struct drm_connector *connector;
> + int ret;
> +
> + slave_connector = kzalloc(sizeof(*slave_connector), GFP_KERNEL);
> + if (!slave_connector) {
> + dev_err(dev->dev, "allocation failed\n");
> + return NULL;
> + }
> +
> + slave_connector->encoder = encoder;
> + slave_connector->mod = mod;
> +
> + connector = &slave_connector->base;
> +
> + drm_connector_init(dev, connector, &slave_connector_funcs,
> + DRM_MODE_CONNECTOR_HDMIA);
Shouldn't we get the connector type from the drm_encoder_slave somehow?
Works here for now, so just food for thought for future encoder slave
refactorings and infrastructure work.
> + drm_connector_helper_add(connector, &slave_connector_helper_funcs);
> +
> + connector->polled = DRM_CONNECTOR_POLL_CONNECT |
> + DRM_CONNECTOR_POLL_DISCONNECT;
> +
> + connector->interlace_allowed = 0;
> + connector->doublescan_allowed = 0;
> +
> + get_slave_funcs(encoder)->create_resources(encoder, connector);
> +
> + ret = drm_mode_connector_attach_encoder(connector, encoder);
> + if (ret)
> + goto fail;
> +
> + drm_sysfs_connector_add(connector);
> +
> + return connector;
> +
> +fail:
> + slave_connector_destroy(connector);
> + return NULL;
> +}
> +
> +/*
> + * Module:
> + */
> +
> +static int slave_modeset_init(struct tilcdc_module *mod, struct drm_device *dev)
> +{
> + struct slave_module *slave_mod = to_slave_module(mod);
> + struct tilcdc_drm_private *priv = dev->dev_private;
> + struct drm_encoder *encoder;
> + struct drm_connector *connector;
> +
> + encoder = slave_encoder_create(dev, slave_mod);
> + if (!encoder)
> + return -ENOMEM;
> +
> + connector = slave_connector_create(dev, slave_mod, encoder);
> + if (!connector)
> + return -ENOMEM;
> +
> + priv->encoders[priv->num_encoders++] = encoder;
> + priv->connectors[priv->num_connectors++] = connector;
> +
> + return 0;
> +}
> +
> +static void slave_destroy(struct tilcdc_module *mod)
> +{
> + struct slave_module *slave_mod = to_slave_module(mod);
> +
> + tilcdc_module_cleanup(mod);
> + kfree(slave_mod);
> +}
> +
> +static const struct tilcdc_module_ops slave_module_ops = {
> + .modeset_init = slave_modeset_init,
> + .destroy = slave_destroy,
> +};
> +
> +/*
> + * Device:
> + */
> +
> +static struct of_device_id slave_of_match[];
> +
> +static int slave_probe(struct platform_device *pdev)
> +{
> + struct device_node *node = pdev->dev.of_node;
> + struct device_node *i2c_node;
> + struct slave_module *slave_mod;
> + struct tilcdc_module *mod;
> + struct pinctrl *pinctrl;
> + uint32_t i2c_phandle;
> + int ret = -EINVAL;
> +
> + /* bail out early if no DT data: */
> + if (!node) {
> + dev_err(&pdev->dev, "device-tree data is missing\n");
> + return -ENXIO;
> + }
> +
> + slave_mod = kzalloc(sizeof(*slave_mod), GFP_KERNEL);
> + if (!slave_mod)
> + return -ENOMEM;
> +
> + mod = &slave_mod->base;
> +
> + tilcdc_module_init(mod, "slave", &slave_module_ops);
> +
> + pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
> + if (IS_ERR(pinctrl))
> + dev_warn(&pdev->dev, "pins are not configured\n");
> +
> + if (of_property_read_u32(node, "i2c", &i2c_phandle)) {
> + dev_err(&pdev->dev, "could not get i2c bus phandle\n");
> + goto fail;
> + }
> +
> + i2c_node = of_find_node_by_phandle(i2c_phandle);
> + if (!i2c_node) {
> + dev_err(&pdev->dev, "could not get i2c bus node\n");
> + goto fail;
> + }
> +
> + slave_mod->i2c = of_find_i2c_adapter_by_node(i2c_node);
> + if (!slave_mod->i2c) {
> + dev_err(&pdev->dev, "could not get i2c\n");
> + goto fail;
> + }
> +
> + of_node_put(i2c_node);
> +
> + return 0;
> +
> +fail:
> + slave_destroy(mod);
> + return ret;
> +}
> +
> +static int slave_remove(struct platform_device *pdev)
> +{
> + return 0;
> +}
> +
> +static struct of_device_id slave_of_match[] = {
> + { .compatible = "tilcdc,slave", },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, slave_of_match);
> +
> +struct platform_driver slave_driver = {
> + .probe = slave_probe,
> + .remove = slave_remove,
> + .driver = {
> + .owner = THIS_MODULE,
> + .name = "slave",
> + .of_match_table = slave_of_match,
> + },
> +};
No idea how this devicetree matching stuff is supposed to work, but I
guess this needs to be updated in the devictree docs like the base match.
> +
> +int __init tilcdc_slave_init(void)
> +{
> + return platform_driver_register(&slave_driver);
> +}
> +
> +void __exit tilcdc_slave_fini(void)
> +{
> + platform_driver_unregister(&slave_driver);
> +}
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_slave.h b/drivers/gpu/drm/tilcdc/tilcdc_slave.h
> new file mode 100644
> index 0000000..2f85048
> --- /dev/null
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_slave.h
> @@ -0,0 +1,26 @@
> +/*
> + * Copyright (C) 2012 Texas Instruments
> + * Author: Rob Clark <robdclark@gmail.com>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License version 2 as published by
> + * the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
> + * more details.
> + *
> + * You should have received a copy of the GNU General Public License along with
> + * this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#ifndef __TILCDC_SLAVE_H__
> +#define __TILCDC_SLAVE_H__
> +
> +/* sub-module for i2c slave encoder output */
> +
> +int tilcdc_slave_init(void);
> +void tilcdc_slave_fini(void);
> +
> +#endif /* __TILCDC_SLAVE_H__ */
> --
> 1.8.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply
* [GIT PULL] vexpress: fixes for v3.8-rc5
From: Pawel Moll @ 2013-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd, Olof,
Could you, please, pull this small series of VE fixes for v3.8-rc5? It:
* makes the V2P-CA15_A7 (a.k.a. TC2) work with 3.8 kernels
* improves vexpress-sysreg.c behaviour on arm64 platforms
Thanks!
Pawel
The following changes since commit 7d1f9aeff1ee4a20b1aeb377dd0f579fe9647619:
Linux 3.8-rc4 (2013-01-17 19:25:45 -0800)
are available in the git repository at:
git://git.linaro.org/people/pawelmoll/linux.git vexpress/fixes
for you to fetch changes up to 52666298aebe5e9ab28a773ee61d2ce81fa097bb:
mfd: vexpress-sysreg: Don't skip initialization on probe (2013-01-24 12:19:23 +0000)
----------------------------------------------------------------
Lorenzo Pieralisi (1):
ARM: vexpress: extend the MPIDR range used for pen release check
Pawel Moll (2):
ARM: vexpress: Enable A7 cores in V2P-CA15_A7's Device Tree
mfd: vexpress-sysreg: Don't skip initialization on probe
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 2 --
arch/arm/plat-versatile/headsmp.S | 2 +-
drivers/mfd/vexpress-sysreg.c | 32 +++++++++++++++++-----------
3 files changed, 21 insertions(+), 15 deletions(-)
^ permalink raw reply
* OMAP baseline test results for v3.8-rc4
From: Bedia, Vaibhav @ 2013-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.DEB.2.00.1301220213390.25789@utopia.booyaka.com>
Hi Paul,
On Tue, Jan 22, 2013 at 07:54:44, Paul Walmsley wrote:
>
> Hi guys,
>
> Regarding the AM33xx test failures with appended DTBs, it would be very
> helpful if especially the TI people could try reproducing the problem.
> Otherwise it's going to cause problems with merging any new AM33xx
> patches, since I won't be able to test them without additional work.
> Plus, this is something that used to work up until d01e4afd, so something
> isn't right.
>
> You'll need to use the bootloader that TI originally shipped with the
> BeagleBones:
>
> U-Boot 2011.09-00009-gcf6e04d (Mar 08 2012 - 17:15:43)
>
> This is because many folks don't replace their bootloader. I do plan to
> add a test with a recent version of u-boot, but the kernel should not be
> dependent on the bootloader in any way to work correctly. If it is, then
> we need to document what u-boot version the kernel started to work with.
>
> The Kconfig that I use is here:
>
> http://www.pwsan.com/omap/testlogs/test_v3.8-rc4/20130120122039/build/am33xx_only/am33xx_only
>
> It's possible that there's something wrong with the Kconfig. It's
> basically just omap2plus_defconfig, but with all OMAP support for
> non-AM33xx turned off, and with the appended DTB and ATAG compatibility
> options turned on.
>
> Let's try to do this ASAP. That way, if it's some bootloader dependency
> or bug in the kernel, some fix can be merged during the v3.8-rc series,
> which is rapidly drawing to a close.
>
I could not track down U-Boot that you were using so I used the v2013.01 tag
for U-Boot. However, using your build configs for v3.7 and v3.8-rcX I got the same
observations i.e. v3.7 boots but others don't.
One difference that I found was that post v3.7 the configs that you are using have
CONFIG_EARLY_PRINTK set. Once I disabled that I was able to bootup v3.8-rc1/4
(didn't try rc2/3 but I suspect early_printk was the culprit there too).
I checked with Santosh on this and he mentioned that for DT-only boot, which AM335x is,
that's expected behavior.
Can you update your AM335x-only config to disable CONFIG_EARLY_PRINTK or just skip
earlyprintk option in the bootargs for now?
If you still have issues booting can you update your U-Boot to v2013.01 since things
seem to be working fine at this point.
Regards,
Vaibhav
^ permalink raw reply
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