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* [PATCH V3 7/8] mv643xx.c: Add basic device tree support.
From: Jason Cooper @ 2013-01-28 19:38 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20130128101249.GB7754@e106331-lin.cambridge.arm.com>

On Mon, Jan 28, 2013 at 10:12:49AM +0000, Mark Rutland wrote:
> Hello,
> 
> I've taken a quick look at this, and I have a couple of comments on the binding
> and the way it's parsed.
> 
> On Fri, Jan 25, 2013 at 08:53:59PM +0000, Jason Cooper wrote:
> > From: Ian Molton <ian.molton@codethink.co.uk>
> > 
> >     This patch adds basic device tree support to the mv643xx ethernet driver.
> > 
> >     It should be enough for most current users of the device, and should allow
> >     a painless migration.
> > 
> >     Signed-off-by: Ian Molton <ian.molton@codethink.co.uk>
> > 
> > Signed-off-by: Jason Cooper <jason@lakedaemon.net>
> > ---
> >  Documentation/devicetree/bindings/net/mv643xx.txt | 75 ++++++++++++++++++
> >  drivers/net/ethernet/marvell/mv643xx_eth.c        | 93 +++++++++++++++++++++--
> >  2 files changed, 161 insertions(+), 7 deletions(-)
> >  create mode 100644 Documentation/devicetree/bindings/net/mv643xx.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/net/mv643xx.txt b/Documentation/devicetree/bindings/net/mv643xx.txt
> > new file mode 100644
> > index 0000000..2727f798
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/net/mv643xx.txt
> > @@ -0,0 +1,75 @@
> > +mv643xx related nodes.
> > +
> > +marvell,mdio-mv643xx:
> > +
> > +Required properties:
> > +
> > + - interrupts : <a> where a is the SMI interrupt number.
> > + - reg : the base address and size of the controllers register space.
> > +
> > +Optional properties:
> > + - shared_smi : on some chips, the second PHY is "shared", meaning it is
> > +	really accessed via the first SMI controller. It is passed in this
> > +	way due to the present structure of the driver, which requires the
> > +	base address for the MAC to be passed in via the SMI controllers
> > +	platform data.
> 
> The phrase "the present structure of the driver" is not something that's
> generally good to hear in a binding document. Is shared_smi always going to be
> required for such configurations, or is there going to be any driver rework
> that makes it irrelevant?

Florian is working on bring mvmdio up to speed, I'll let him comment on
this.

> > + - tx_csum_limit : on some devices, this option is required for proper
> > +	operation wrt. jumbo frames.
> 
> This doesn't explain what this property is. Also "limit" doesn't describe
> what's limited (e.g. size, rate). How about something like
> max-tx-checksum-size?

sounds better, I'll update for the next version.

> 
> > +
> > +
> > +Example:
> > +
> > +smi0: mdio at 72000 {
> > +	compatible = "marvell,mdio-mv643xx";
> > +	reg = <0x72000 0x4000>;
> > +	interrupts = <46>;
> > +	tx_csum_limit = <1600>;
> > +	status = "disabled";
> > +};
> > +
> > +smi1: mdio at 76000 {
> > +	compatible = "marvell,mdio-mv643xx";
> > +	reg = <0x76000 0x4000>;
> > +	interrupts = <47>;
> > +	shared_smi = <&smi0>;
> > +	tx_csum_limit = <1600>;
> > +	status = "disabled";
> > +};
> > +
> > +
> > +
> > +marvell,mv643xx-eth:
> > +
> > +Required properties:
> > + - interrupts : the port interrupt number.
> > + - mdio : phandle of the smi device as drescribed above
> > +
> > +Optional properties:
> > + - port_number : the port number on this bus.
> > + - phy_addr : the PHY address.
> > + - reg : should match the mdio reg this device is attached to.
> > +	this is a required hack for now due to the way the
> > +	driver is constructed. This allows the device clock to be
> > +	kept running so that the MAC is not lost after boot.
> 
> More s/_/-/ candidates.

ok.

> Is there any reason to have "phy_addr" rather than "phy_address"? We already
> have #address-cells, which would seem to have set a precedent for naming.

Well, we also have "reg", which would seem to indicate the opposite.  And,
following your logic, we should really say "physical_address" :-P .  I
personally feel "phy_addr" is well understood, but I don't have a strong
opinion on it.

> 
> [...]
> 
> > @@ -2610,6 +2613,26 @@ static int mv643xx_eth_shared_probe(struct platform_device *pdev)
> >  	if (msp->base == NULL)
> >  		goto out_free;
> >  
> > +	if (pdev->dev.of_node) {
> > +		struct device_node *np = NULL;
> > +
> > +		/* when all users of this driver use FDT, we can remove this */
> > +		pd = kzalloc(sizeof(*pd), GFP_KERNEL);
> > +		if (!pd) {
> > +			dev_dbg(&pdev->dev, "Could not allocate platform data\n");
> > +			goto out_free;
> > +		}
> > +
> > +		of_property_read_u32(pdev->dev.of_node,
> > +			"tx_csum_limit", &pd->tx_csum_limit);
> 
> Is there any upper limit on what this property could be? It would be nice to
> have a sanity check.
> 
> Also, of_property_read_u32 reads a u32, but pd->tx_csum_limit is an int. It
> would be good to use a u32 temporary.

Good catch, I'll update for both.

> 
> [...]
> 
> > @@ -2858,7 +2893,36 @@ static int mv643xx_eth_probe(struct platform_device *pdev)
> >  	struct resource *res;
> >  	int err;
> >  
> > -	pd = pdev->dev.platform_data;
> > +	if (pdev->dev.of_node) {
> > +		struct device_node *np = NULL;
> > +
> > +		/* when all users of this driver use FDT, we can remove this */
> > +		pd = kzalloc(sizeof(*pd), GFP_KERNEL);
> > +		if (!pd) {
> > +			dev_dbg(&pdev->dev, "Could not allocate platform data\n");
> > +			return -ENOMEM;
> > +		}
> > +
> > +		of_property_read_u32(pdev->dev.of_node,
> > +			"port_number", &pd->port_number);
> > +
> > +		if (!of_property_read_u32(pdev->dev.of_node,
> > +				"phy_addr", &pd->phy_addr))
> > +			pd->phy_addr = MV643XX_ETH_PHY_ADDR(pd->phy_addr);
> 
> From a cursory glance at mv643xx_eth.c, it looks like phy_addr needs to be in
> the range 0 to 0x1f. It might be worth a sanity check here (even if it just
> prints a warning).

right, this had been commented elsewhere.  phy_addr is XORd with 0x80,
so I'll correct my subsequent patch adding the DT entries and add the
warning here.

Thanks for the review,

Jason.

^ permalink raw reply

* [PATCH v2 08/27] pci: implement an emulated PCI-to-PCI bridge
From: Thomas Petazzoni @ 2013-01-28 19:39 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20130128193516.GB17722@obsidianresearch.com>

Dear Jason Gunthorpe,

Thanks a lot for your quick feedback!

On Mon, 28 Jan 2013 12:35:16 -0700, Jason Gunthorpe wrote:

> It is not essential, but desirable, to report an Express Root Port
> capability for PCI-E bridges:

[...]

> In the Marvell case, this capability can be constructed by pulling
> data from the the Express End Point capability of the PCI-E port:

I am not sure what you mean by "pulling". Do you mean that I should get
informations from the real PCIe interface, from within the emulated
PCI-to-PCI bridge implementation? This would unfortunately not be
really nice, because until now, the PCI-to-PCI bridge emulation is
clearly separated from the Marvell PCIe driver itself. Of course, it
could register a hook or something like that, so that the emulated
PCI-to-PCI bridge could potentially call back into the Marvell PCIe
driver.

I'll have to dig a little bit more about this capability to see how it
works exactly.

Thanks again for the feedback,

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply

* [PATCH v2 1/2] ARM: kirkwood: Ensure that kirkwood_ge0[01]_init() finds its clock
From: Jason Cooper @ 2013-01-28 19:46 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20130128182218.GB9436@obsidianresearch.com>

Thanks Jason,

A question for Simon below

On Mon, Jan 28, 2013 at 11:22:18AM -0700, Jason Gunthorpe wrote:
> On Sun, Jan 27, 2013 at 11:52:41AM +0100, Sebastian Hesselbarth wrote:
> 
> > I agree that loosing the MAC address _is_ an issue but there must
> > be another way to retain it during gated ge clocks than not gate the
> > clocks at all.
> > 
> > I can think of some ways to retain it but don't know what is the most
> > common with linux:
> > - make u-boot pass it through cmdline and let mv643xx get it from there
> > - have kirkwood's common code grab it before clk gates kick in
> 
> The cannonical solution here is to have a DT attribute
> 'local-mac-address' that is filled in by the bootloader rather than
> attempting to pass the mac address to the kernel through the ethernet
> controller registers.

Simon,

Can you try this in conjunction with enabling ARM_ATAG_DTB_COMPAT ?
Does that solve your issue?

thx,

Jason.

> 
> Until the bootloaders are fixed a reasonable hack is to have the
> platform startup code look for an all-zeros local-mac-address in the
> DT and if found then copy the MAC from the ethernet registers into the
> DT. Then the ethernet driver can safely be a module since the MAC is
> captured in the DT.
> 
> I've been using this patch here on top of the original Ian Molton
> patch.
> 
> Jason: Can you include something like this as well?
> 
> diff --git a/drivers/net/ethernet/marvell/mv643xx_eth.c b/drivers/net/ethernet/marvell/mv643xx_eth.c
> index 7048d7c..2b2cfcb 100644
> --- a/drivers/net/ethernet/marvell/mv643xx_eth.c
> +++ b/drivers/net/ethernet/marvell/mv643xx_eth.c
> @@ -2891,6 +2891,8 @@ static int mv643xx_eth_probe(struct platform_device *pdev)
>  	struct mv643xx_eth_private *mp;
>  	struct net_device *dev;
>  	struct resource *res;
> +	const u8 *mac;
> +	int len;
>  	int err;
>  
>  	if (pdev->dev.of_node) {
> @@ -2912,6 +2914,10 @@ static int mv643xx_eth_probe(struct platform_device *pdev)
>  		else
>  			pd->phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT;
>  
> +		mac = of_get_property(pdev->dev.of_node, "local-mac-address", &len);
> +		if (mac && len == 6)
> +		    memcpy(pd->mac_addr, mac, sizeof pd->mac_addr);
> +
>  		np = of_parse_phandle(pdev->dev.of_node, "mdio", 0);
>  		if (np) {
>  			pd->shared = of_find_device_by_node(np);
> -- 
> 1.7.5.4
> 

^ permalink raw reply

* i.Mx6Quad - eth0: tx queue full!
From: Troy Kisky @ 2013-01-28 19:47 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <5106B7EE.3040603@gmail.com>

On 1/28/2013 10:39 AM, Vikram Narayanan wrote:
> Running the latest head <linux-2.6.git> on an i.Mx6Quad based platform
> gives me the below error when flooded with ping requests.
>
> == Start log ==
> [ 2555.004031] ------------[ cut here ]------------
> [ 2555.009740] WARNING: at net/sched/sch_generic.c:254 dev_watchdog+0x298/0x2b8()
> [ 2555.018721] NETDEV WATCHDOG: eth0 (fec): transmit queue 0 timed out

I think the tx interrupt status bit was lost. The packets were 
transmitted, but the interrupt never
happened. The controller should have been reset here, but perhaps a bug 
with the reset code.
Are you using the mainline kernel, or a version Freescale's kernel.

mainline fec_restart does not reset tx_full

You can try adding
fep->tx_full = 0;

to fec_restart, though it would be better to call fec_enet_tx in fec_timeout
and skip the call to fec_restart if it returns some packets.

> [ 2555.026733] Modules linked in:
> [ 2555.030598] Backtrace:
> [ 2555.034252] [<800119c8>] (dump_backtrace+0x0/0x10c) from [<803b8494>] (dump_stack+0x18/0x1c)
> [ 2555.044438]  r6:000000fe r5:80302f64 r4:80503dd0 r3:80510e80
> [ 2555.052019] [<803b847c>] (dump_stack+0x0/0x1c) from [<8001df08>] (warn_slowpath_common+0x54/0x6c)
> [ 2555.062679] [<8001deb4>] (warn_slowpath_common+0x0/0x6c) from [<8001dfc4>] (warn_slowpath_fmt+0x38/0x40)
> [ 2555.073936]  r8:8052ebf1 r7:805040c0 r6:00000000 r5:8f9771d4 r4:8f977000
> r3:00000009
> [ 2555.084816] [<8001df8c>] (warn_slowpath_fmt+0x0/0x40) from [<80302f64>] (dev_watchdog+0x298/0x2b8)
> [ 2555.095535]  r3:8f977000 r2:8049f6d4
> [ 2555.099868] [<80302ccc>] (dev_watchdog+0x0/0x2b8) from [<8002acf8>] (call_timer_fn.isra.33+0x2c/0x8c)
> [ 2555.110794] [<8002accc>] (call_timer_fn.isra.33+0x0/0x8c) from [<8002af48>] (run_timer_softirq+0x1f0/0x204)
> [ 2555.122240]  r7:80571114 r6:805040c0 r5:00000000 r4:80570900
> [ 2555.129894] [<8002ad58>] (run_timer_softirq+0x0/0x204) from [<80025750>] (__do_softirq+0xc8/0x180)
> [ 2555.140599] [<80025688>] (__do_softirq+0x0/0x180) from [<80025b40>] (irq_exit+0x88/0x90)
> [ 2555.150492] [<80025ab8>] (irq_exit+0x0/0x90) from [<8000ec58>] (handle_IRQ+0x44/0x98)
> [ 2555.160112]  r4:804ffde0 r3:00000220
> [ 2555.164848] [<8000ec14>] (handle_IRQ+0x0/0x98) from [<80008540>] (gic_handle_irq+0x30/0x64)
> [ 2555.174956]  r6:80503f28 r5:8050a518 r4:f400010c r3:00000000
> [ 2555.182694] [<80008510>] (gic_handle_irq+0x0/0x64) from [<8000df80>] (__irq_svc+0x40/0x50)
> [ 2555.192737] Exception stack(0x80503f28 to 0x80503f70)
> [ 2555.198639] 3f20:                   8052f150 a0000093 00000000 00000000 80502000 8052ed08
> [ 2555.208600] 3f40: 8050a4f4 803bfaec 8050df00 412fc09a 80502000 80503f7c 80503f80 80503f70
> [ 2555.218584] 3f60: 8000eee4 8000eee8 60000013 ffffffff
> [ 2555.224730]  r7:80503f5c r6:ffffffff r5:60000013 r4:8000eee8
> [ 2555.232292] [<8000eeb8>] (default_idle+0x0/0x38) from [<8000f0d8>] (cpu_idle+0xcc/0x114)
> [ 2555.242204] [<8000f00c>] (cpu_idle+0x0/0x114) from [<803b3718>] (rest_init+0x64/0x7c)
> [ 2555.251858] [<803b36b4>] (rest_init+0x0/0x7c) from [<804cc7dc>] (start_kernel+0x258/0x298)
> [ 2555.261963] [<804cc584>] (start_kernel+0x0/0x298) from [<10008078>] (0x10008078)
> [ 2555.271167] ---[ end trace 3d2ffb53e6fe41f3 ]---
> [ 2555.277270] eth0: tx queue full!.
> [ 2555.288776] eth0: tx queue full!.
> [ 2555.293594] eth0: tx queue full!.
> [ 2555.297944] eth0: tx queue full!.
> [ 2555.302229] eth0: tx queue full!.
All the packet have been transmitted but the transmit queue is full, so 
no more
tx interrupts can happen to replace the previously lost tx interrupt.

I've seen MII interrupts clear the TX interrupt status bit.

> ...... continues indefinitely and needs a reboot to recover the system.
> == End log ==
>
> i.Mx6Quad's MAC is connected to SMSC LAN88730 PHY via an MII interface.
>
> I found a similar thread [1], but that solution didn't work for me.
> Any ideas on why the fec driver is unhappy?
>
> Thanks,
> Vikram
>
> [1] https://community.freescale.com/thread/281457
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>

^ permalink raw reply

* [PATCH v2 18/27] arm: plat-orion: add more flexible PCI configuration space read/write functions
From: Jason Gunthorpe @ 2013-01-28 19:51 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1359399397-29729-19-git-send-email-thomas.petazzoni@free-electrons.com>

On Mon, Jan 28, 2013 at 07:56:27PM +0100, Thomas Petazzoni wrote:

> However, with the usage of the emulated PCI host bridge and emulated
> PCI-to-PCI bridges, this is not the case: bus number 0 is the emulated
> bus on which the emulated PCI-to-PCI bridges sit, so from the Linux
> point of view, the real busses start at bus 1, but from a hardware
> point of view, they start at bus 0.

Hum.. This is a bit funny sounding, can you confirm..

The bus number programmed into all the end points must match the Linux
number. Ie the PCI-E Link Description register of end point devices
must report the same bus number as Linux. PCI-E devices learn their
bus number by capturing the bus number from type 0 configuration
transactions.

For the most part config transactions issued to the PCI-E controllers
should be type 0 transactions with a bus number that matches what
Linux is setting.

The only time I think you'd ever see bus number 0 is when accessing
the config space of the Marvell PCI-E controller end port. But, I also
think you can avoid doing these transactions by just accessing the MMIO
versions of those registers..

Jason

^ permalink raw reply

* [PATCH v2 08/27] pci: implement an emulated PCI-to-PCI bridge
From: Jason Gunthorpe @ 2013-01-28 19:55 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20130128203947.07332698@skate>

On Mon, Jan 28, 2013 at 08:39:47PM +0100, Thomas Petazzoni wrote:

> > In the Marvell case, this capability can be constructed by pulling
> > data from the the Express End Point capability of the PCI-E port:
> 
> I am not sure what you mean by "pulling". Do you mean that I should get
> informations from the real PCIe interface, from within the emulated
> PCI-to-PCI bridge implementation? This would unfortunately not be
> really nice, because until now, the PCI-to-PCI bridge emulation is
> clearly separated from the Marvell PCIe driver itself. Of course, it
> could register a hook or something like that, so that the emulated
> PCI-to-PCI bridge could potentially call back into the Marvell PCIe
> driver.

Yes, a callback would be needed to the main driver and IIRC the driver
can read/write the end port link info config regsiters via MMIO. They
probably need a bit of massaging to be in root port format, but
otherwise it should be straightforward..

> I'll have to dig a little bit more about this capability to see how it
> works exactly.

All ports have registers to report and control the link, but the root
port and end port versions are a bit different, so the goal is to read
the end port formatted registers and map them into the root port
format so that userspace can properly see the link state and
configuration.

Jason

^ permalink raw reply

* [PATCH v5 07/14] dmaengine: add dma_request_slave_channel_compat()
From: Arnd Bergmann @ 2013-01-28 19:57 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <CAHp75VeqikcTuOd14utb9E0P3b9t1mr=JsmkAbz5=3FJwU2kFA@mail.gmail.com>

On Monday 28 January 2013, Andy Shevchenko wrote:
> On Tue, Jan 15, 2013 at 10:32 PM, Matt Porter <mporter@ti.com> wrote:
> > Adds a dma_request_slave_channel_compat() wrapper which accepts
> > both the arguments from dma_request_channel() and
> > dma_request_slave_channel(). Based on whether the driver is
> > instantiated via DT, the appropriate channel request call will be
> > made.
> >
> > This allows for a much cleaner migration of drivers to the
> > dmaengine DT API as platforms continue to be mixed between those
> > that boot using DT and those that do not.
> 
> Does it mean the introduced function is kinda temporary?

Some drivers can very likely get converted to use only
dma_request_slave_channel() in the long run, when all
the platforms using those drivers have been converted to
provide the channels using device tree.

However, for drivers that are used on legacy platforms
without DT support, we may still need something like
this function in the long run.

	Arnd

^ permalink raw reply

* [PATCH 0/2] Add CPSW VLAN Support
From: Mugunthan V N @ 2013-01-28 20:12 UTC (permalink / raw)
  To: linux-arm-kernel

CPSW is capable of filtering VLAN packets in hardware. This patch series
implements VLAN support to CPSW driver.
This patch series is tested on net-next with AM335x EVM with ping test.


Mugunthan V N (2):
  drivers: net: cpsw: Add helper functions for VLAN ALE implementation
  drivers: net:ethernet: cpsw: add support for VLAN

 Documentation/devicetree/bindings/net/cpsw.txt |    2 +
 drivers/net/ethernet/ti/cpsw.c                 |  108 ++++++++++++++-
 drivers/net/ethernet/ti/cpsw_ale.c             |  172 +++++++++++++++++++++++-
 drivers/net/ethernet/ti/cpsw_ale.h             |   11 ++
 include/linux/platform_data/cpsw.h             |    1 +
 5 files changed, 288 insertions(+), 6 deletions(-)

-- 
1.7.9.5

^ permalink raw reply

* [PATCH 1/2] drivers: net: cpsw: Add helper functions for VLAN ALE implementation
From: Mugunthan V N @ 2013-01-28 20:12 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1359403945-28585-1-git-send-email-mugunthanvnm@ti.com>

Add helper functions for VLAN ALE implementations for Add, Delete
Dump VLAN related ALE entries

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 drivers/net/ethernet/ti/cpsw_ale.c |  172 ++++++++++++++++++++++++++++++++++--
 drivers/net/ethernet/ti/cpsw_ale.h |   11 +++
 2 files changed, 178 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c
index 0e9ccc2..0d7a60a 100644
--- a/drivers/net/ethernet/ti/cpsw_ale.c
+++ b/drivers/net/ethernet/ti/cpsw_ale.c
@@ -148,7 +148,7 @@ static int cpsw_ale_write(struct cpsw_ale *ale, int idx, u32 *ale_entry)
 	return idx;
 }
 
-static int cpsw_ale_match_addr(struct cpsw_ale *ale, u8 *addr)
+int cpsw_ale_match_addr(struct cpsw_ale *ale, u8 *addr, u16 vid)
 {
 	u32 ale_entry[ALE_ENTRY_WORDS];
 	int type, idx;
@@ -160,6 +160,8 @@ static int cpsw_ale_match_addr(struct cpsw_ale *ale, u8 *addr)
 		type = cpsw_ale_get_entry_type(ale_entry);
 		if (type != ALE_TYPE_ADDR && type != ALE_TYPE_VLAN_ADDR)
 			continue;
+		if (cpsw_ale_get_vlan_id(ale_entry) != vid)
+			continue;
 		cpsw_ale_get_addr(ale_entry, entry_addr);
 		if (memcmp(entry_addr, addr, 6) == 0)
 			return idx;
@@ -167,6 +169,22 @@ static int cpsw_ale_match_addr(struct cpsw_ale *ale, u8 *addr)
 	return -ENOENT;
 }
 
+int cpsw_ale_match_vlan(struct cpsw_ale *ale, u16 vid)
+{
+	u32 ale_entry[ALE_ENTRY_WORDS];
+	int type, idx;
+
+	for (idx = 0; idx < ale->params.ale_entries; idx++) {
+		cpsw_ale_read(ale, idx, ale_entry);
+		type = cpsw_ale_get_entry_type(ale_entry);
+		if (type != ALE_TYPE_VLAN)
+			continue;
+		if (cpsw_ale_get_vlan_id(ale_entry) == vid)
+			return idx;
+	}
+	return -ENOENT;
+}
+
 static int cpsw_ale_match_free(struct cpsw_ale *ale)
 {
 	u32 ale_entry[ALE_ENTRY_WORDS];
@@ -286,7 +304,7 @@ int cpsw_ale_add_ucast(struct cpsw_ale *ale, u8 *addr, int port, int flags)
 	cpsw_ale_set_blocked(ale_entry, (flags & ALE_BLOCKED) ? 1 : 0);
 	cpsw_ale_set_port_num(ale_entry, port);
 
-	idx = cpsw_ale_match_addr(ale, addr);
+	idx = cpsw_ale_match_addr(ale, addr, 0);
 	if (idx < 0)
 		idx = cpsw_ale_match_free(ale);
 	if (idx < 0)
@@ -303,7 +321,7 @@ int cpsw_ale_del_ucast(struct cpsw_ale *ale, u8 *addr, int port)
 	u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
 	int idx;
 
-	idx = cpsw_ale_match_addr(ale, addr);
+	idx = cpsw_ale_match_addr(ale, addr, 0);
 	if (idx < 0)
 		return -ENOENT;
 
@@ -318,7 +336,7 @@ int cpsw_ale_add_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask,
 	u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
 	int idx, mask;
 
-	idx = cpsw_ale_match_addr(ale, addr);
+	idx = cpsw_ale_match_addr(ale, addr, 0);
 	if (idx >= 0)
 		cpsw_ale_read(ale, idx, ale_entry);
 
@@ -347,7 +365,151 @@ int cpsw_ale_del_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask)
 	u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
 	int idx;
 
-	idx = cpsw_ale_match_addr(ale, addr);
+	idx = cpsw_ale_match_addr(ale, addr, 0);
+	if (idx < 0)
+		return -EINVAL;
+
+	cpsw_ale_read(ale, idx, ale_entry);
+
+	if (port_mask)
+		cpsw_ale_set_port_mask(ale_entry, port_mask);
+	else
+		cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
+
+	cpsw_ale_write(ale, idx, ale_entry);
+	return 0;
+}
+
+int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port, int untag,
+		      int reg_mcast, int unreg_mcast)
+{
+	u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
+	int idx;
+
+	idx = cpsw_ale_match_vlan(ale, vid);
+	if (idx >= 0)
+		cpsw_ale_read(ale, idx, ale_entry);
+
+	cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_VLAN);
+	cpsw_ale_set_vlan_id(ale_entry, vid);
+
+	cpsw_ale_set_vlan_untag_force(ale_entry, untag);
+	cpsw_ale_set_vlan_reg_mcast(ale_entry, reg_mcast);
+	cpsw_ale_set_vlan_unreg_mcast(ale_entry, unreg_mcast);
+	cpsw_ale_set_vlan_member_list(ale_entry, port);
+
+	if (idx < 0)
+		idx = cpsw_ale_match_free(ale);
+	if (idx < 0)
+		idx = cpsw_ale_find_ageable(ale);
+	if (idx < 0)
+		return -ENOMEM;
+
+	cpsw_ale_write(ale, idx, ale_entry);
+	return 0;
+}
+
+int cpsw_ale_del_vlan(struct cpsw_ale *ale, u16 vid, int port)
+{
+	u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
+	int idx, mask;
+
+	idx = cpsw_ale_match_vlan(ale, vid);
+	if (idx < 0)
+		return -ENOENT;
+
+	cpsw_ale_read(ale, idx, ale_entry);
+
+	mask  = cpsw_ale_get_vlan_member_list(ale_entry);
+	mask &= ~port;
+	if (!mask)
+		cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
+	else
+		cpsw_ale_set_vlan_member_list(ale_entry, mask);
+
+	cpsw_ale_write(ale, idx, ale_entry);
+	return 0;
+}
+
+int cpsw_ale_vlan_add_ucast(struct cpsw_ale *ale, u8 *addr, int port,
+				int flags, u16 vid)
+{
+	u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
+	int idx;
+
+	cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_VLAN_ADDR);
+	cpsw_ale_set_addr(ale_entry, addr);
+	cpsw_ale_set_ucast_type(ale_entry, ALE_UCAST_PERSISTANT);
+	cpsw_ale_set_secure(ale_entry, (flags & ALE_SECURE) ? 1 : 0);
+	cpsw_ale_set_blocked(ale_entry, (flags & ALE_BLOCKED) ? 1 : 0);
+	cpsw_ale_set_port_num(ale_entry, port);
+	cpsw_ale_set_vlan_id(ale_entry, vid);
+
+	idx = cpsw_ale_match_addr(ale, addr, vid);
+	if (idx < 0)
+		idx = cpsw_ale_match_free(ale);
+	if (idx < 0)
+		idx = cpsw_ale_find_ageable(ale);
+	if (idx < 0)
+		return -ENOMEM;
+
+	cpsw_ale_write(ale, idx, ale_entry);
+	return 0;
+}
+
+int cpsw_ale_vlan_del_ucast(struct cpsw_ale *ale, u8 *addr, int port, u16 vid)
+{
+	u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
+	int idx;
+
+	idx = cpsw_ale_match_addr(ale, addr, vid);
+	if (idx < 0)
+		return -ENOENT;
+
+	cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
+	cpsw_ale_write(ale, idx, ale_entry);
+	return 0;
+}
+
+int cpsw_ale_vlan_add_mcast(struct cpsw_ale *ale, u8 *addr,
+		int port_mask, u16 vid, int super, int mcast_state)
+{
+	u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
+	int idx, mask;
+
+	idx = cpsw_ale_match_addr(ale, addr, vid);
+	if (idx >= 0)
+		cpsw_ale_read(ale, idx, ale_entry);
+
+	cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_VLAN_ADDR);
+	cpsw_ale_set_addr(ale_entry, addr);
+	cpsw_ale_set_mcast_state(ale_entry, ALE_MCAST_FWD_2);
+	cpsw_ale_set_vlan_id(ale_entry, vid);
+	cpsw_ale_set_super(ale_entry, super);
+	cpsw_ale_set_mcast_state(ale_entry, mcast_state);
+
+	mask = cpsw_ale_get_port_mask(ale_entry);
+	port_mask |= mask;
+	cpsw_ale_set_port_mask(ale_entry, port_mask);
+
+	if (idx < 0)
+		idx = cpsw_ale_match_free(ale);
+	if (idx < 0)
+		idx = cpsw_ale_find_ageable(ale);
+	if (idx < 0)
+		return -ENOMEM;
+
+	cpsw_ale_write(ale, idx, ale_entry);
+	return 0;
+}
+
+int cpsw_ale_vlan_del_mcast(struct cpsw_ale *ale, u8 *addr,
+				int port_mask, u16 vid)
+{
+	u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
+	int idx;
+
+	idx = cpsw_ale_match_addr(ale, addr, vid);
 	if (idx < 0)
 		return -EINVAL;
 
diff --git a/drivers/net/ethernet/ti/cpsw_ale.h b/drivers/net/ethernet/ti/cpsw_ale.h
index 2bd09cb..fbb0f7e 100644
--- a/drivers/net/ethernet/ti/cpsw_ale.h
+++ b/drivers/net/ethernet/ti/cpsw_ale.h
@@ -86,6 +86,17 @@ int cpsw_ale_del_ucast(struct cpsw_ale *ale, u8 *addr, int port);
 int cpsw_ale_add_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask,
 			int super, int mcast_state);
 int cpsw_ale_del_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask);
+int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port, int untag,
+			int reg_mcast, int unreg_mcast);
+int cpsw_ale_del_vlan(struct cpsw_ale *ale, u16 vid, int port);
+int cpsw_ale_vlan_add_ucast(struct cpsw_ale *ale, u8 *addr, int port,
+			int flags, u16 vid);
+int cpsw_ale_vlan_del_ucast(struct cpsw_ale *ale, u8 *addr, int port,
+			u16 vid);
+int cpsw_ale_vlan_add_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask,
+			u16 vid, int super, int mcast_state);
+int cpsw_ale_vlan_del_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask,
+			u16 vid);
 
 int cpsw_ale_control_get(struct cpsw_ale *ale, int port, int control);
 int cpsw_ale_control_set(struct cpsw_ale *ale, int port,
-- 
1.7.9.5

^ permalink raw reply related

* [PATCH 2/2] drivers: net:ethernet: cpsw: add support for VLAN
From: Mugunthan V N @ 2013-01-28 20:12 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1359403945-28585-1-git-send-email-mugunthanvnm@ti.com>

adding support for VLAN interface for cpsw.

CPSW VLAN Capability
* Can filter VLAN packets in Hardware

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 Documentation/devicetree/bindings/net/cpsw.txt |    2 +
 drivers/net/ethernet/ti/cpsw.c                 |  108 +++++++++++++++++++++++-
 include/linux/platform_data/cpsw.h             |    1 +
 3 files changed, 110 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/net/cpsw.txt b/Documentation/devicetree/bindings/net/cpsw.txt
index 6ddd028..99696bf 100644
--- a/Documentation/devicetree/bindings/net/cpsw.txt
+++ b/Documentation/devicetree/bindings/net/cpsw.txt
@@ -24,6 +24,8 @@ Required properties:
 Optional properties:
 - ti,hwmods		: Must be "cpgmac0"
 - no_bd_ram		: Must be 0 or 1
+- default_vlan		: Specifies Default VLAN for non tagged packets
+			  ALE processing
 
 Note: "ti,hwmods" field is used to fetch the base address and irq
 resources from TI, omap hwmod data base during device registration.
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index b35e6a7..dee6951 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -32,6 +32,7 @@
 #include <linux/of.h>
 #include <linux/of_net.h>
 #include <linux/of_device.h>
+#include <linux/if_vlan.h>
 
 #include <linux/platform_data/cpsw.h>
 
@@ -72,6 +73,11 @@ do {								\
 		dev_notice(priv->dev, format, ## __VA_ARGS__);	\
 } while (0)
 
+#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
+#define VLAN_SUPPORT
+#define CPSW_VLAN_AWARE_MODE
+#endif
+
 #define ALE_ALL_PORTS		0x7
 
 #define CPSW_MAJOR_VERSION(reg)		(reg >> 8 & 0x7)
@@ -118,6 +124,14 @@ do {								\
 #define TX_PRIORITY_MAPPING	0x33221100
 #define CPDMA_TX_PRIORITY_MAP	0x76543210
 
+#ifdef CPSW_VLAN_AWARE_MODE
+#define CPSW_VLAN_AWARE		BIT(1)
+#define CPSW_ALE_VLAN_AWARE	1
+#else
+#define CPSW_VLAN_AWARE		0x0
+#define CPSW_ALE_VLAN_AWARE	0
+#endif
+
 #define cpsw_enable_irq(priv)	\
 	do {			\
 		u32 i;		\
@@ -607,14 +621,44 @@ static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv)
 	}
 }
 
+#ifdef VLAN_SUPPORT
+static inline void cpsw_add_default_vlan(struct cpsw_priv *priv)
+{
+	writel(priv->data.default_vlan, &priv->host_port_regs->port_vlan);
+	if (priv->version == CPSW_VERSION_1) {
+		slave_write(&priv->slaves[0], priv->data.default_vlan,
+			    CPSW1_PORT_VLAN);
+		slave_write(&priv->slaves[1], priv->data.default_vlan,
+			    CPSW1_PORT_VLAN);
+	} else {
+		slave_write(&priv->slaves[0], priv->data.default_vlan,
+			    CPSW2_PORT_VLAN);
+		slave_write(&priv->slaves[1], priv->data.default_vlan,
+			    CPSW2_PORT_VLAN);
+	}
+	cpsw_ale_add_vlan(priv->ale, priv->data.default_vlan,
+			ALE_ALL_PORTS << priv->host_port,
+			ALE_ALL_PORTS << priv->host_port,
+			ALE_ALL_PORTS << priv->host_port, 0);
+}
+#else
+#define cpsw_add_default_vlan(priv)
+#endif
+
 static void cpsw_init_host_port(struct cpsw_priv *priv)
 {
+	u32 control_reg;
+
 	/* soft reset the controller and initialize ale */
 	soft_reset("cpsw", &priv->regs->soft_reset);
 	cpsw_ale_start(priv->ale);
 
 	/* switch to vlan unaware mode */
-	cpsw_ale_control_set(priv->ale, 0, ALE_VLAN_AWARE, 0);
+	cpsw_ale_control_set(priv->ale, priv->host_port, ALE_VLAN_AWARE,
+			     CPSW_ALE_VLAN_AWARE);
+	control_reg = readl(&priv->regs->control);
+	control_reg |= CPSW_VLAN_AWARE;
+	writel(control_reg, &priv->regs->control);
 
 	/* setup host port priority mapping */
 	__raw_writel(CPDMA_TX_PRIORITY_MAP,
@@ -650,6 +694,9 @@ static int cpsw_ndo_open(struct net_device *ndev)
 	cpsw_init_host_port(priv);
 	for_each_slave(priv, cpsw_slave_open, priv);
 
+	/* Add default VLAN */
+	cpsw_add_default_vlan(priv);
+
 	/* setup tx dma to fixed prio and zero offset */
 	cpdma_control_set(priv->dma, CPDMA_TX_PRIO_FIXED, 1);
 	cpdma_control_set(priv->dma, CPDMA_RX_BUFFER_OFFSET, 0);
@@ -933,6 +980,54 @@ static void cpsw_ndo_poll_controller(struct net_device *ndev)
 }
 #endif
 
+#ifdef VLAN_SUPPORT
+
+static inline void cpsw_add_vlan_ale_entry(struct cpsw_priv *priv,
+				unsigned short vid)
+{
+	cpsw_ale_add_vlan(priv->ale, vid, ALE_ALL_PORTS << priv->host_port,
+			0, ALE_ALL_PORTS << priv->host_port,
+			(BIT(1) | BIT(2)) << priv->host_port);
+	cpsw_ale_vlan_add_ucast(priv->ale, priv->mac_addr,
+			priv->host_port, 0, vid);
+	cpsw_ale_vlan_add_mcast(priv->ale, priv->ndev->broadcast,
+			ALE_ALL_PORTS << priv->host_port, vid, 0, 0);
+}
+
+static int cpsw_ndo_vlan_rx_add_vid(struct net_device *ndev,
+		unsigned short vid)
+{
+	struct cpsw_priv *priv = netdev_priv(ndev);
+
+	spin_lock(&priv->lock);
+
+	dev_info(priv->dev, "Adding vlanid %d to vlan filter\n", vid);
+	cpsw_add_vlan_ale_entry(priv, vid);
+
+	spin_unlock(&priv->lock);
+	return 0;
+}
+
+static int cpsw_ndo_vlan_rx_kill_vid(struct net_device *ndev,
+		unsigned short vid)
+{
+	struct cpsw_priv *priv = netdev_priv(ndev);
+
+	spin_lock(&priv->lock);
+
+	dev_info(priv->dev, "removing vlanid %d from vlan filter\n", vid);
+	cpsw_ale_del_vlan(priv->ale, vid, ALE_ALL_PORTS << priv->host_port);
+	cpsw_ale_vlan_del_ucast(priv->ale, priv->mac_addr,
+				priv->host_port, vid);
+	cpsw_ale_vlan_del_mcast(priv->ale, priv->ndev->broadcast, 0, vid);
+
+	spin_unlock(&priv->lock);
+	return 0;
+}
+
+#endif /* VLAN_SUPPORT */
+
+
 static const struct net_device_ops cpsw_netdev_ops = {
 	.ndo_open		= cpsw_ndo_open,
 	.ndo_stop		= cpsw_ndo_stop,
@@ -947,6 +1042,10 @@ static const struct net_device_ops cpsw_netdev_ops = {
 #ifdef CONFIG_NET_POLL_CONTROLLER
 	.ndo_poll_controller	= cpsw_ndo_poll_controller,
 #endif
+#ifdef VLAN_SUPPORT
+	.ndo_vlan_rx_add_vid	= cpsw_ndo_vlan_rx_add_vid,
+	.ndo_vlan_rx_kill_vid	= cpsw_ndo_vlan_rx_kill_vid,
+#endif
 };
 
 static void cpsw_get_drvinfo(struct net_device *ndev,
@@ -1103,6 +1202,9 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data,
 	}
 	data->mac_control = prop;
 
+	if (!of_property_read_u32(node, "default_vlan", &prop))
+		data->default_vlan = prop;
+
 	/*
 	 * Populate all the child nodes here...
 	 */
@@ -1356,6 +1458,10 @@ static int cpsw_probe(struct platform_device *pdev)
 		k++;
 	}
 
+#ifdef VLAN_SUPPORT
+	ndev->features |= NETIF_F_HW_VLAN_FILTER;
+#endif
+
 	ndev->flags |= IFF_ALLMULTI;	/* see cpsw_ndo_change_rx_flags() */
 
 	ndev->netdev_ops = &cpsw_netdev_ops;
diff --git a/include/linux/platform_data/cpsw.h b/include/linux/platform_data/cpsw.h
index 24368a2..e962cfd 100644
--- a/include/linux/platform_data/cpsw.h
+++ b/include/linux/platform_data/cpsw.h
@@ -35,6 +35,7 @@ struct cpsw_platform_data {
 	u32	bd_ram_size;  /*buffer descriptor ram size */
 	u32	rx_descs;	/* Number of Rx Descriptios */
 	u32	mac_control;	/* Mac control register */
+	u16	default_vlan;	/* Def VLAN for ALE lookup in VLAN aware mode*/
 };
 
 #endif /* __CPSW_H__ */
-- 
1.7.9.5

^ permalink raw reply related

* [PATCH v2 07/27] PCI: Add software-emulated host bridge
From: Arnd Bergmann @ 2013-01-28 20:18 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1359399397-29729-8-git-send-email-thomas.petazzoni@free-electrons.com>

On Monday 28 January 2013, Thomas Petazzoni wrote:
> From: Thierry Reding <thierry.reding@avionic-design.de>
> 
> [Thomas Petazzoni:
>  - Simplify capabilities handling.
>  - Move to a separate file.
>  - Fix mask used when writing a 4 bytes value.]
> 
> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

Not even a description why this is needed?

This patch (together with patch 8) seems like the most controversial
one of the series, so you should better provide a really good reason
why we would emulate something in software rather than using whatever
hardware is there.

	Arnd

^ permalink raw reply

* [RFC/PATCH 29/32] usb: gadget: pxa27x_udc: let udc-core manage gadget->dev
From: Robert Jarzmik @ 2013-01-28 20:18 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1359042370-4358-30-git-send-email-balbi@ti.com>

Felipe Balbi <balbi@ti.com> writes:

> By simply setting a flag, we can drop some
> boilerplate code.
>
> Signed-off-by: Felipe Balbi <balbi@ti.com>
> ---
>  drivers/usb/gadget/pxa27x_udc.c | 9 +--------
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>

And I tested also your patch and it works in my environment. For next patches
I'd like to be CCed for pxa27x_udc stuff as I'm maintaining that one since its
beginning (and yes, I know, I didn't put that in MAINTAINERS ...).

Cheers.

--
Robert

^ permalink raw reply

* [PATCH v2 1/2] ARM: kirkwood: Ensure that kirkwood_ge0[01]_init() finds its clock
From: Jason Cooper @ 2013-01-28 20:26 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20130128182218.GB9436@obsidianresearch.com>

On Mon, Jan 28, 2013 at 11:22:18AM -0700, Jason Gunthorpe wrote:
> On Sun, Jan 27, 2013 at 11:52:41AM +0100, Sebastian Hesselbarth wrote:
> 
> > I agree that loosing the MAC address _is_ an issue but there must
> > be another way to retain it during gated ge clocks than not gate the
> > clocks at all.
> > 
> > I can think of some ways to retain it but don't know what is the most
> > common with linux:
> > - make u-boot pass it through cmdline and let mv643xx get it from there
> > - have kirkwood's common code grab it before clk gates kick in
> 
> The cannonical solution here is to have a DT attribute
> 'local-mac-address' that is filled in by the bootloader rather than
> attempting to pass the mac address to the kernel through the ethernet
> controller registers.
> 
> Until the bootloaders are fixed a reasonable hack is to have the
> platform startup code look for an all-zeros local-mac-address in the
> DT and if found then copy the MAC from the ethernet registers into the
> DT. Then the ethernet driver can safely be a module since the MAC is
> captured in the DT.
> 
> I've been using this patch here on top of the original Ian Molton
> patch.
> 
> Jason: Can you include something like this as well?

Seems reasonable.  Mind updating the binding docs?

I'd also like to confirm that legacy, factory-installed bootloaders are
passing the mac addr via a special ATAG.  My cursory check of the
current mainline u-boot code doesn't include it, but Marvell's version
may have.

thx,

Jason.

> diff --git a/drivers/net/ethernet/marvell/mv643xx_eth.c b/drivers/net/ethernet/marvell/mv643xx_eth.c
> index 7048d7c..2b2cfcb 100644
> --- a/drivers/net/ethernet/marvell/mv643xx_eth.c
> +++ b/drivers/net/ethernet/marvell/mv643xx_eth.c
> @@ -2891,6 +2891,8 @@ static int mv643xx_eth_probe(struct platform_device *pdev)
>  	struct mv643xx_eth_private *mp;
>  	struct net_device *dev;
>  	struct resource *res;
> +	const u8 *mac;
> +	int len;
>  	int err;
>  
>  	if (pdev->dev.of_node) {
> @@ -2912,6 +2914,10 @@ static int mv643xx_eth_probe(struct platform_device *pdev)
>  		else
>  			pd->phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT;
>  
> +		mac = of_get_property(pdev->dev.of_node, "local-mac-address", &len);
> +		if (mac && len == 6)
> +		    memcpy(pd->mac_addr, mac, sizeof pd->mac_addr);
> +
>  		np = of_parse_phandle(pdev->dev.of_node, "mdio", 0);
>  		if (np) {
>  			pd->shared = of_find_device_by_node(np);
> -- 
> 1.7.5.4
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply

* [PATCHv4] ARM: sunxi: gpio: Add Allwinner SoCs GPIO drivers
From: Maxime Ripard @ 2013-01-28 20:33 UTC (permalink / raw)
  To: linux-arm-kernel

The IP responsible for the muxing on the Allwinner SoCs are also
handling the GPIOs on the system. This patch adds the needed driver that
relies on the pinctrl driver for most of its operations.

The number of pins available for GPIOs operations are already declared
in the pinctrl driver, we only need to probe a generic driver to handle
the banks available for each SoC.

This driver has been tested on a A13-Olinuxino.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/pinctrl/pinctrl-sunxi.c |  134 ++++++++++++++++++++++++++++++++++++++-
 drivers/pinctrl/pinctrl-sunxi.h |   25 +++++++-
 2 files changed, 156 insertions(+), 3 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-sunxi.c b/drivers/pinctrl/pinctrl-sunxi.c
index 6f02e34..fb000b0 100644
--- a/drivers/pinctrl/pinctrl-sunxi.c
+++ b/drivers/pinctrl/pinctrl-sunxi.c
@@ -11,6 +11,7 @@
  */
 
 #include <linux/io.h>
+#include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
@@ -609,11 +610,53 @@ static int sunxi_pmx_enable(struct pinctrl_dev *pctldev,
 	return 0;
 }
 
+static int
+sunxi_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
+			struct pinctrl_gpio_range *range,
+			unsigned offset,
+			bool input)
+{
+	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+	struct sunxi_desc_function *desc;
+	char pin_name[SUNXI_PIN_NAME_MAX_LEN];
+	const char *func;
+	u8 bank, pin;
+	int ret;
+
+	bank = (offset) / PINS_PER_BANK;
+	pin = (offset) % PINS_PER_BANK;
+
+	ret = sprintf(pin_name, "P%c%d", 'A' + bank, pin);
+	if (!ret)
+		goto error;
+
+	if (input)
+		func = "gpio_in";
+	else
+		func = "gpio_out";
+
+	desc = sunxi_pinctrl_desc_find_function_by_name(pctl,
+							pin_name,
+							func);
+	if (!desc) {
+		ret = -EINVAL;
+		goto error;
+	}
+
+	sunxi_pmx_set(pctldev, offset, desc->muxval);
+
+	ret = 0;
+
+error:
+	return ret;
+}
+
 static struct pinmux_ops sunxi_pmx_ops = {
 	.get_functions_count	= sunxi_pmx_get_funcs_cnt,
 	.get_function_name	= sunxi_pmx_get_func_name,
 	.get_function_groups	= sunxi_pmx_get_func_groups,
 	.enable			= sunxi_pmx_enable,
+	.gpio_set_direction	= sunxi_pmx_gpio_set_direction,
 };
 
 static struct pinctrl_desc sunxi_pctrl_desc = {
@@ -622,6 +665,60 @@ static struct pinctrl_desc sunxi_pctrl_desc = {
 	.pmxops		= &sunxi_pmx_ops,
 };
 
+static int sunxi_pinctrl_gpio_request(struct gpio_chip *chip, unsigned offset)
+{
+	return pinctrl_request_gpio(chip->base + offset);
+}
+
+static void sunxi_pinctrl_gpio_free(struct gpio_chip *chip, unsigned offset)
+{
+	pinctrl_free_gpio(chip->base + offset);
+}
+
+static int sunxi_pinctrl_gpio_direction_input(struct gpio_chip *chip,
+					unsigned offset)
+{
+	return pinctrl_gpio_direction_input(chip->base + offset);
+}
+
+static int sunxi_pinctrl_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+	struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev);
+
+	u32 reg = sunxi_data_reg(offset);
+	u8 index = sunxi_data_offset(offset);
+	u32 val = (readl(pctl->membase + reg) >> index) & DATA_PINS_MASK;
+
+	return val;
+}
+
+static int sunxi_pinctrl_gpio_direction_output(struct gpio_chip *chip,
+					unsigned offset, int value)
+{
+	return pinctrl_gpio_direction_output(chip->base + offset);
+}
+
+static void sunxi_pinctrl_gpio_set(struct gpio_chip *chip,
+				unsigned offset, int value)
+{
+	struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev);
+	u32 reg = sunxi_data_reg(offset);
+	u8 index = sunxi_data_offset(offset);
+
+	writel((value & DATA_PINS_MASK) << index, pctl->membase + reg);
+}
+
+static struct gpio_chip sunxi_pinctrl_gpio_chip = {
+	.owner			= THIS_MODULE,
+	.request		= sunxi_pinctrl_gpio_request,
+	.free			= sunxi_pinctrl_gpio_free,
+	.direction_input	= sunxi_pinctrl_gpio_direction_input,
+	.direction_output	= sunxi_pinctrl_gpio_direction_output,
+	.get			= sunxi_pinctrl_gpio_get,
+	.set			= sunxi_pinctrl_gpio_set,
+	.can_sleep		= 0,
+};
+
 static struct of_device_id sunxi_pinctrl_match[] = {
 	{ .compatible = "allwinner,sun5i-a13-pinctrl", .data = (void *)&sun5i_a13_pinctrl_data },
 	{}
@@ -737,7 +834,7 @@ static int sunxi_pinctrl_probe(struct platform_device *pdev)
 	const struct of_device_id *device;
 	struct pinctrl_pin_desc *pins;
 	struct sunxi_pinctrl *pctl;
-	int i, ret;
+	int i, ret, last_pin;
 
 	pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
 	if (!pctl)
@@ -781,9 +878,42 @@ static int sunxi_pinctrl_probe(struct platform_device *pdev)
 		return -EINVAL;
 	}
 
-	dev_info(&pdev->dev, "initialized sunXi pin control driver\n");
+	pctl->chip = devm_kzalloc(&pdev->dev, sizeof(*pctl->chip), GFP_KERNEL);
+	if (!pctl->chip) {
+		ret = -ENOMEM;
+		goto pinctrl_error;
+	}
+
+	last_pin = pctl->desc->pins[pctl->desc->npins - 1].pin.number;
+	pctl->chip = &sunxi_pinctrl_gpio_chip;
+	pctl->chip->ngpio = round_up(last_pin, PINS_PER_BANK);
+	pctl->chip->label = dev_name(&pdev->dev);
+	pctl->chip->dev = &pdev->dev;
+	pctl->chip->base = 0;
+
+	ret = gpiochip_add(pctl->chip);
+	if (ret)
+		goto pinctrl_error;
+
+	for (i = 0; i < pctl->desc->npins; i++) {
+		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;
+
+		ret = gpiochip_add_pin_range(pctl->chip, dev_name(&pdev->dev),
+					     pin->pin.number,
+					     pin->pin.number, 1);
+		if (ret)
+			goto gpiochip_error;
+	}
+
+	dev_info(&pdev->dev, "initialized sunXi PIO driver\n");
 
 	return 0;
+
+gpiochip_error:
+	ret = gpiochip_remove(pctl->chip);
+pinctrl_error:
+	pinctrl_unregister(pctl->pctl_dev);
+	return ret;
 }
 
 static struct platform_driver sunxi_pinctrl_driver = {
diff --git a/drivers/pinctrl/pinctrl-sunxi.h b/drivers/pinctrl/pinctrl-sunxi.h
index 0dc3b9d..1ee35c0 100644
--- a/drivers/pinctrl/pinctrl-sunxi.h
+++ b/drivers/pinctrl/pinctrl-sunxi.h
@@ -254,8 +254,11 @@
 #define SUNXI_PINCTRL_PIN_PG30	PINCTRL_PIN(PG_BASE + 30, "PG30")
 #define SUNXI_PINCTRL_PIN_PG31	PINCTRL_PIN(PG_BASE + 31, "PG31")
 
+#define SUNXI_PIN_NAME_MAX_LEN	5
+
 #define BANK_MEM_SIZE		0x24
 #define MUX_REGS_OFFSET		0x0
+#define DATA_REGS_OFFSET	0x10
 #define DLEVEL_REGS_OFFSET	0x14
 #define PULL_REGS_OFFSET	0x1c
 
@@ -263,6 +266,9 @@
 #define MUX_PINS_PER_REG	8
 #define MUX_PINS_BITS		4
 #define MUX_PINS_MASK		0x0f
+#define DATA_PINS_PER_REG	32
+#define DATA_PINS_BITS		1
+#define DATA_PINS_MASK		0x01
 #define DLEVEL_PINS_PER_REG	16
 #define DLEVEL_PINS_BITS	2
 #define DLEVEL_PINS_MASK	0x03
@@ -283,6 +289,8 @@ struct sunxi_desc_pin {
 struct sunxi_pinctrl_desc {
 	const struct sunxi_desc_pin	*pins;
 	int				npins;
+	struct pinctrl_gpio_range	*ranges;
+	int				nranges;
 };
 
 struct sunxi_pinctrl_function {
@@ -299,6 +307,7 @@ struct sunxi_pinctrl_group {
 
 struct sunxi_pinctrl {
 	void __iomem			*membase;
+	struct gpio_chip		*chip;
 	struct sunxi_pinctrl_desc	*desc;
 	struct device			*dev;
 	struct sunxi_pinctrl_function	*functions;
@@ -321,7 +330,6 @@ struct sunxi_pinctrl {
 		.muxval = _val,					\
 	}
 
-
 /*
  * The sunXi PIO registers are organized as is:
  * 0x00 - 0x0c	Muxing values.
@@ -354,6 +362,21 @@ static inline u32 sunxi_mux_offset(u16 pin)
 	return pin_num * MUX_PINS_BITS;
 }
 
+static inline u32 sunxi_data_reg(u16 pin)
+{
+	u8 bank = pin / PINS_PER_BANK;
+	u32 offset = bank * BANK_MEM_SIZE;
+	offset += DATA_REGS_OFFSET;
+	offset += pin % PINS_PER_BANK / DATA_PINS_PER_REG * 0x04;
+	return round_down(offset, 4);
+}
+
+static inline u32 sunxi_data_offset(u16 pin)
+{
+	u32 pin_num = pin % DATA_PINS_PER_REG;
+	return pin_num * DATA_PINS_BITS;
+}
+
 static inline u32 sunxi_dlevel_reg(u16 pin)
 {
 	u8 bank = pin / PINS_PER_BANK;
-- 
1.7.10.4

^ permalink raw reply related

* [PATCH 2/2] drivers: net:ethernet: cpsw: add support for VLAN
From: Felipe Balbi @ 2013-01-28 20:44 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1359403945-28585-3-git-send-email-mugunthanvnm@ti.com>

On Tue, Jan 29, 2013 at 01:42:25AM +0530, Mugunthan V N wrote:
> adding support for VLAN interface for cpsw.
> 
> CPSW VLAN Capability
> * Can filter VLAN packets in Hardware
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> ---
>  Documentation/devicetree/bindings/net/cpsw.txt |    2 +
>  drivers/net/ethernet/ti/cpsw.c                 |  108 +++++++++++++++++++++++-
>  include/linux/platform_data/cpsw.h             |    1 +
>  3 files changed, 110 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/cpsw.txt b/Documentation/devicetree/bindings/net/cpsw.txt
> index 6ddd028..99696bf 100644
> --- a/Documentation/devicetree/bindings/net/cpsw.txt
> +++ b/Documentation/devicetree/bindings/net/cpsw.txt
> @@ -24,6 +24,8 @@ Required properties:
>  Optional properties:
>  - ti,hwmods		: Must be "cpgmac0"
>  - no_bd_ram		: Must be 0 or 1
> +- default_vlan		: Specifies Default VLAN for non tagged packets
> +			  ALE processing
>  
>  Note: "ti,hwmods" field is used to fetch the base address and irq
>  resources from TI, omap hwmod data base during device registration.
> diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
> index b35e6a7..dee6951 100644
> --- a/drivers/net/ethernet/ti/cpsw.c
> +++ b/drivers/net/ethernet/ti/cpsw.c
> @@ -32,6 +32,7 @@
>  #include <linux/of.h>
>  #include <linux/of_net.h>
>  #include <linux/of_device.h>
> +#include <linux/if_vlan.h>
>  
>  #include <linux/platform_data/cpsw.h>
>  
> @@ -72,6 +73,11 @@ do {								\
>  		dev_notice(priv->dev, format, ## __VA_ARGS__);	\
>  } while (0)
>  
> +#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)

use IS_ENABLED() instead.

> +#define VLAN_SUPPORT
> +#define CPSW_VLAN_AWARE_MODE
> +#endif
> +
>  #define ALE_ALL_PORTS		0x7
>  
>  #define CPSW_MAJOR_VERSION(reg)		(reg >> 8 & 0x7)
> @@ -118,6 +124,14 @@ do {								\
>  #define TX_PRIORITY_MAPPING	0x33221100
>  #define CPDMA_TX_PRIORITY_MAP	0x76543210
>  
> +#ifdef CPSW_VLAN_AWARE_MODE
> +#define CPSW_VLAN_AWARE		BIT(1)
> +#define CPSW_ALE_VLAN_AWARE	1
> +#else
> +#define CPSW_VLAN_AWARE		0x0
> +#define CPSW_ALE_VLAN_AWARE	0
> +#endif

you should really figure out a way of doing runtime detection for this.
Depending on driver recompilation just to enable/disable VLAN support
will be quite boring.

-- 
balbi
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^ permalink raw reply

* [PATCH 3/4 v11] arm highbank: add support for pl320 IPC
From: Rafael J. Wysocki @ 2013-01-28 20:48 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <510680AD.2070908@calxeda.com>

On Monday, January 28, 2013 07:44:13 AM Mark Langsdorf wrote:
> On 01/28/2013 06:49 AM, Rafael J. Wysocki wrote:
> 
> >> +int pl320_ipc_register_notifier(struct notifier_block *nb)
> >> +{
> >> +	return atomic_notifier_chain_register(&ipc_notifier, nb);
> >> +}
> >> +EXPORT_SYMBOL(pl320_ipc_register_notifier);
> >> +
> >> +int pl320_ipc_unregister_notifier(struct notifier_block *nb)
> >> +{
> >> +	return atomic_notifier_chain_unregister(&ipc_notifier, nb);
> >> +}
> >> +EXPORT_SYMBOL(pl320_ipc_unregister_notifier);
> > 
> > I need all of your symbols to be exported with EXPORT_SYMBOL_GPL().
> > 
> > Is it OK to make that change when applying the patch or do you want to send
> > a new one?
> 
> I probably should resend so I can include the drivers level Kconfig and
> Makefile.
> 
> I'll get that out this morning.

OK, thanks!

Rafael


-- 
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.

^ permalink raw reply

* [PATCH v2] ARM: versatile: fix the PCI IRQ regression
From: Linus Walleij @ 2013-01-28 20:56 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <201301282016.BAG95395.VMOFFFQSHLOtJO@I-love.SAKURA.ne.jp>

On Mon, Jan 28, 2013 at 12:16 PM, Tetsuo Handa
<penguin-kernel@i-love.sakura.ne.jp> wrote:

> Linus Walleij wrote:
>> ---
>> ChangeLog v1->v2:
>> - Got the PIC/SIC valid mask wrong again, take a deep breath
>>   and use the foolproof method of defining each bit so that
>>   nobody will get caught by this again. Didn't see this first
>>   because the SCSI layer takes for ever to time out.
>> ---
>>  arch/arm/mach-versatile/core.c | 15 ++++++++++++++-
>>  arch/arm/mach-versatile/pci.c  | 11 ++++++-----
>>  2 files changed, 20 insertions(+), 6 deletions(-)
>>
>
> This patch fixes my problem. Please send to 3.8. Thank you!

OK will put this into Russell's patch tracker, thanks!

Yours,
Linus Walleij

^ permalink raw reply

* [PATCH v4 4/7] ARM: Exynos: allow dt based discovery of mct controller using clocksource_of_init
From: Stephen Warren @ 2013-01-28 20:57 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1358762542-19008-5-git-send-email-thomas.abraham@linaro.org>

On 01/21/2013 03:02 AM, Thomas Abraham wrote:
> Add entries to __clksrc_of_table so that Exynos MCT controller is discoverable
> using call to clocksource_of_init. With this change, it would be appropriate to
> rename the function 'exynos4_timer_init' as 'mct_init' since it aptly describes
> this function. Additionally, the 'init_time' callback of all machine descriptors
> for exynos platforms that were previously set to 'exynos4_timer_init' are now
> set to either 'mct_init' or 'clocksource_of_init'.

> diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c

> +#ifdef CONFIG_CLKSRC_OF
> +CLOCKSOURCE_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init)
> +CLOCKSOURCE_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init)
> +#endif

I suggested in another review (IIRC for a different SoC) that
CLOCKSOURCE_OF_DECLARE() should always be declared so you don't need
that ifdef. Would you care to send a patch to add to arm-soc's
timer/cleanup branch to do that? If not, let me know and I can.

^ permalink raw reply

* [PATCH v2] mm: dmapool: use provided gfp flags for all dma_alloc_coherent() calls
From: Soeren Moch @ 2013-01-28 20:59 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20130123181029.GE20719@lunn.ch>

On 23.01.2013 19:10, Andrew Lunn wrote:
>>>>
>>>
>>> Now (in the last hour) stable, occasionally lower numbers:
>>> 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
>>> 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
>>> 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
>>> 3396 3396 3396 3396 3396 3396 3396 3396 3396 3365 3396 3394 3396 3396
>>> 3396 3396 3373 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
>>> 3396 3353 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396 3396
>>> 3394 3396 3396 3396 3396 3396 3396 3396
>>>
>>> Before the last pool exhaustion going down:
>>> 3395 3395 3389 3379 3379 3374 3367 3360 3352 3343 3343 3343 3342 3336
>>> 3332 3324 3318 3314 3310 3307 3305 3299 3290 3283 3279 3272 3266 3265
>>> 3247 3247 3247 3242 3236 3236
>>>
>> Here I stopped vdr (and so closed all dvb_demux devices), the number
>> was remaining the same 3236, even after restart of vdr (and restart
>> of streaming).
>
> So it does suggest a leak. Probably somewhere on an error path,
> e.g. its lost video sync.
>

Now I activated the debug messages in em28xx. From the messages I see no 
correlation of the pool exhaustion and lost sync. Also I cannot see any 
error messages from the em28xx driver.
I see a lot of init_isoc/stop_urbs (maybe EPG scan?) without draining 
the coherent pool (checked with 'cat /debug/dma-api/num_free_entries', 
which gave stable numbers), but after half an hour there are only 
init_isoc messages without corresponding stop_urbs messages and 
num_free_entries decreased until coherent pool exhaustion.

Any idea where the memory leak is? What is allocating coherent buffers 
for orion-ehci?

   Soeren


Jan 28 20:46:03 guruvdr kernel: em28xx #0/2-dvb: Using 5 buffers each 
with 64 x 940 bytes
Jan 28 20:46:03 guruvdr kernel: em28xx #0 em28xx_init_isoc :em28xx: 
called em28xx_init_isoc in mode 2
Jan 28 20:46:03 guruvdr kernel: em28xx #1/2-dvb: Using 5 buffers each 
with 64 x 940 bytes
Jan 28 20:46:03 guruvdr kernel: em28xx #1 em28xx_init_isoc :em28xx: 
called em28xx_init_isoc in mode 2
Jan 28 20:46:23 guruvdr kernel: em28xx #0 em28xx_stop_urbs :em28xx: 
called em28xx_stop_urbs
Jan 28 20:46:23 guruvdr kernel: em28xx #1 em28xx_stop_urbs :em28xx: 
called em28xx_stop_urbs
Jan 28 20:46:24 guruvdr kernel: em28xx #0/2-dvb: Using 5 buffers each 
with 64 x 940 bytes
Jan 28 20:46:24 guruvdr kernel: em28xx #0 em28xx_init_isoc :em28xx: 
called em28xx_init_isoc in mode 2
Jan 28 20:46:24 guruvdr kernel: em28xx #1/2-dvb: Using 5 buffers each 
with 64 x 940 bytes
Jan 28 20:46:24 guruvdr kernel: em28xx #1 em28xx_init_isoc :em28xx: 
called em28xx_init_isoc in mode 2
Jan 28 20:46:44 guruvdr kernel: em28xx #1 em28xx_stop_urbs :em28xx: 
called em28xx_stop_urbs
Jan 28 20:46:44 guruvdr kernel: em28xx #0 em28xx_stop_urbs :em28xx: 
called em28xx_stop_urbs
Jan 28 20:46:45 guruvdr kernel: em28xx #1/2-dvb: Using 5 buffers each 
with 64 x 940 bytes
Jan 28 20:46:45 guruvdr kernel: em28xx #1 em28xx_init_isoc :em28xx: 
called em28xx_init_isoc in mode 2
Jan 28 20:46:45 guruvdr kernel: em28xx #0/2-dvb: Using 5 buffers each 
with 64 x 940 bytes
Jan 28 20:46:45 guruvdr kernel: em28xx #0 em28xx_init_isoc :em28xx: 
called em28xx_init_isoc in mode 2
Jan 28 20:54:33 guruvdr kernel: ERROR: 1024 KiB atomic DMA coherent pool 
is too small!
Jan 28 20:54:33 guruvdr kernel: Please increase it with coherent_pool= 
kernel parameter!

^ permalink raw reply

* [PATCH v4 3/7] ARM: Exynos: add device tree support for MCT controller driver
From: Stephen Warren @ 2013-01-28 20:59 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1358762542-19008-4-git-send-email-thomas.abraham@linaro.org>

On 01/21/2013 03:02 AM, Thomas Abraham wrote:
> Allow the MCT controller base address and interrupts to be obtained from
> device tree and remove unused static definitions of these. The non-dt support
> for Exynos5250 is removed but retained for Exynos4210 based platforms.

Patches 3 and later in this series, fairly quickly,
Reviewed-by: Stephen Warren <swarren@nvidia.com>

Sorry for the slow review.

I'm not 100% sure if I like Mark's #global-interrupts suggestion or not,
but I'd be fine with the binding either way, so choose as you see fit.

^ permalink raw reply

* [PATCH] mmc: vt8500: Remove erroneous __exitp in wmt_mci_driver
From: Chris Ball @ 2013-01-28 21:23 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1358057960-24540-1-git-send-email-linux@prisktech.co.nz>

Hi Tony,

On Sun, Jan 13 2013, Tony Prisk wrote:
> With the __devinit/__devexit attributes having been removed, this
> __exitp attribute causes an unused function warning and should be
> removed as well.
>
> Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
> ---
>  drivers/mmc/host/wmt-sdmmc.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/wmt-sdmmc.c b/drivers/mmc/host/wmt-sdmmc.c
> index 154f0e8..c6d0015 100644
> --- a/drivers/mmc/host/wmt-sdmmc.c
> +++ b/drivers/mmc/host/wmt-sdmmc.c
> @@ -1012,7 +1012,7 @@ static const struct dev_pm_ops wmt_mci_pm = {
>  
>  static struct platform_driver wmt_mci_driver = {
>  	.probe = wmt_mci_probe,
> -	.remove = __exit_p(wmt_mci_remove),
> +	.remove = wmt_mci_remove,
>  	.driver = {
>  		.name = DRIVER_NAME,
>  		.owner = THIS_MODULE,

Thanks, pushed to mmc-next for 3.9.

- Chris.
-- 
Chris Ball   <cjb@laptop.org>   <http://printf.net/>
One Laptop Per Child

^ permalink raw reply

* [GIT PULL] Nomadik devicetree and cleanups
From: Olof Johansson @ 2013-01-28 21:31 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <CACRpkdZM8+6QaGrRtCCMWoZQO23uej7JDr1xz2zG7TtwQ7Ngqw@mail.gmail.com>

On Tue, Jan 22, 2013 at 10:19:16AM +0100, Linus Walleij wrote:
> Hi ARM SoC guys,
> 
> This patch series converts the Nomadik to use Device Tree.
> 
> Changes outside of the subsystem are constrained to pinctrl (my subsystem
> and thus OK:ed) and a oneline in drivers/mtd/nand/fsmc_nand.c adding
> a new compatible value.
> 
> The MTD maintainers have had time enough to ACK that oneliner and it
> shouldn't be a big issue, so:
> 
> Please pull this into your tree.

Hi,

Sorry for a late feedback on this, but after merging, this doesn't seem to
build due to lack of vic_of_init symbol visibility (i.e. it's exported out of
drivers/irqchip/irq-vic.c, but it's not actually defined in any header file.

Also, a couple of small merge conflicts with the timer and irq cleanup
branches.

Would you mind rebasing on top of the depends/cleanup branch in arm-soc, sort
out the breakage (and test it) and resubmit?


Thanks!

-Olof

^ permalink raw reply

* [GIT PULL] U300-related COH901318 cleanup
From: Olof Johansson @ 2013-01-28 21:35 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <CACRpkdZtWwHwvfNrSjZiY0Dn7qnk34R9ZSpLfH_VRhGzVEWpKQ@mail.gmail.com>

On Tue, Jan 22, 2013 at 02:59:58PM +0100, Linus Walleij wrote:
> Hi ARM SoC guys,
> 
> This pushes the platform data for the COH901318 DMA controller down
> into the driver so it is self-contained as a cleanup for the U300 machine.
> 
> Since roughly 50% of this patch affects arch/arm/mach* and we may want
> to build additional cleanups on top, we need to take this into the ARM
> SoC tree.
> 
> All patches are ACKed by the DMA subsystem maintainer.
> 
> Please pull it into ARM SoC!
> 
> Yours,
> Linus Walleij
> 
> The following changes since commit d1c3ed669a2d452cacfb48c2d171a1f364dae2ed:
> 
>   Linux 3.8-rc2 (2013-01-02 18:13:21 -0800)
> 
> are available in the git repository at:
> 
>   http://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git
> tags/coh901318-for-arm-soc


Thanks, pulled into next/drivers.


-Olof

^ permalink raw reply

* [GIT PULL] Nomadik devicetree and cleanups
From: Linus Walleij @ 2013-01-28 21:48 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20130128213135.GA3047@quad.lixom.net>

On Mon, Jan 28, 2013 at 10:31 PM, Olof Johansson <olof@lixom.net> wrote:
> On Tue, Jan 22, 2013 at 10:19:16AM +0100, Linus Walleij wrote:
>> Hi ARM SoC guys,
>>
>> This patch series converts the Nomadik to use Device Tree.
>>
>> Changes outside of the subsystem are constrained to pinctrl (my subsystem
>> and thus OK:ed) and a oneline in drivers/mtd/nand/fsmc_nand.c adding
>> a new compatible value.
>>
>> The MTD maintainers have had time enough to ACK that oneliner and it
>> shouldn't be a big issue, so:
>>
>> Please pull this into your tree.
>
> Hi,
>
> Sorry for a late feedback on this, but after merging, this doesn't seem to
> build due to lack of vic_of_init symbol visibility (i.e. it's exported out of
> drivers/irqchip/irq-vic.c, but it's not actually defined in any header file.

Hm?
arch/arm/include/asm/hardware/vic.h
int vic_of_init(struct device_node *node, struct device_node *parent);

> Also, a couple of small merge conflicts with the timer and irq cleanup
> branches.

Do you think the above also comes from that branch?

> Would you mind rebasing on top of the depends/cleanup branch in arm-soc, sort
> out the breakage (and test it) and resubmit?

I'll try!

Yours,
Linus Walleij

^ permalink raw reply

* [PATCH v2 0/5] dmaengine: convert dw_dmac/spear13xx to generic binding
From: Arnd Bergmann @ 2013-01-28 21:58 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1359395857-1235-1-git-send-email-arnd@arndb.de>

Hi everyone,

I'm rather embarrassed to have sent yet another patch series
to the wrong mailing list address, this now goes to the
correct linux-arm-kernel list, so please comment here,
not on the first version. I have also made some smaller
changes and updated the DT bindings where I extended
the drivers. I also uploaded the git branch to the
spear/dma branch of
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git

This is my attempt to convert the spear platform and the dw_dmac to
the generic device tree binding for DMA, so that we don't get
a release with the broken version. I'm pretty sure that this
has bugs, but it's as good as I could do without access to
hardware or specs.

Please review and comment,

	Arnd

Arnd Bergmann (5):
  dmaengine: dw_dmac: move to generic DMA binding
  spi: pl022: use generic DMA slave configuration if possible
  serial: pl011: use generic DMA slave configuration if possible
  ata: arasan: remove the need for platform_data
  ARM: SPEAr13xx: Pass generic DW DMAC platform data from DT

 .../devicetree/bindings/ata/pata-arasan.txt        |  22 ++++
 Documentation/devicetree/bindings/dma/snps-dma.txt |  70 +++++------
 arch/arm/boot/dts/spear1340.dtsi                   |   2 +
 arch/arm/boot/dts/spear13xx.dtsi                   |  25 +++-
 arch/arm/mach-spear/generic.h                      |   6 -
 arch/arm/mach-spear/include/mach/spear.h           |   2 -
 arch/arm/mach-spear/spear1310.c                    |  30 +----
 arch/arm/mach-spear/spear1340.c                    |  32 +----
 arch/arm/mach-spear/spear13xx-dma.h                | 128 --------------------
 arch/arm/mach-spear/spear13xx.c                    |  58 ---------
 drivers/ata/pata_arasan_cf.c                       |  31 +++--
 drivers/dma/dw_dmac.c                              | 130 ++++++++++-----------
 drivers/dma/dw_dmac_regs.h                         |   4 -
 drivers/spi/spi-pl022.c                            |  43 ++++++-
 drivers/tty/serial/amba-pl011.c                    |  62 ++++++----
 include/linux/dw_dmac.h                            |   5 -
 include/linux/pata_arasan_cf_data.h                |   2 -
 17 files changed, 243 insertions(+), 409 deletions(-)
 delete mode 100644 arch/arm/mach-spear/spear13xx-dma.h

-- 
1.8.0

Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jeff Garzik <jgarzik@redhat.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Cc: Jiri Slaby <jslaby@suse.cz>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Vinod Koul <vinod.koul@linux.intel.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: devicetree-discuss at lists.ozlabs.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: spi-devel-general at lists.sourceforge.net

^ permalink raw reply


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