* [PATCH RESEND] ARM: EXYNOS: dts: Set up power domain for MFC and G-scaler
From: Prasanna Kumar @ 2013-01-29 9:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <05b901cdfde0$a373a860$ea5af920$@samsung.com>
This patch adds device tree nodes for MFC and G-scaler power
domains of exynos5250.It binds these power-domain nodes to repsective
device tree nodes
It also adds support to enable PM generic domains for exynos5250.
Signed-off-by: Prasanna Kumar <prasanna.ps@samsung.com>
---
arch/arm/boot/dts/exynos5250.dtsi | 15 +++++++++++++++
arch/arm/mach-exynos/Kconfig | 1 +
2 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 30485de..6d0e87c 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -85,6 +85,7 @@
compatible = "samsung,mfc-v6";
reg = <0x11000000 0x10000>;
interrupts = <0 96 0>;
+ samsung,power-domain = <&pd_mfc>;
};
rtc {
@@ -554,28 +555,42 @@
};
};
+ pd_gsc: gsc-power-domain at 0x10044000 {
+ compatible = "samsung,exynos4210-pd";
+ reg = <0x10044000 0x20>;
+ };
+
+ pd_mfc: mfc-power-domain at 0x10044040 {
+ compatible = "samsung,exynos4210-pd";
+ reg = <0x10044040 0x20>;
+ };
+
gsc_0: gsc at 0x13e00000 {
compatible = "samsung,exynos5-gsc";
reg = <0x13e00000 0x1000>;
interrupts = <0 85 0>;
+ samsung,power-domain = <&pd_gsc>;
};
gsc_1: gsc at 0x13e10000 {
compatible = "samsung,exynos5-gsc";
reg = <0x13e10000 0x1000>;
interrupts = <0 86 0>;
+ samsung,power-domain = <&pd_gsc>;
};
gsc_2: gsc at 0x13e20000 {
compatible = "samsung,exynos5-gsc";
reg = <0x13e20000 0x1000>;
interrupts = <0 87 0>;
+ samsung,power-domain = <&pd_gsc>;
};
gsc_3: gsc at 0x13e30000 {
compatible = "samsung,exynos5-gsc";
reg = <0x13e30000 0x1000>;
interrupts = <0 88 0>;
+ samsung,power-domain = <&pd_gsc>;
};
hdmi {
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index e103c29..96f4a9f 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -61,6 +61,7 @@ config SOC_EXYNOS5250
bool "SAMSUNG EXYNOS5250"
default y
depends on ARCH_EXYNOS5
+ select PM_GENERIC_DOMAINS if PM
select S5P_PM if PM
select S5P_SLEEP if PM
select S5P_DEV_MFC
--
1.7.5.4
^ permalink raw reply related
* [PATCH v3 10/30] USB: ehci-omap: Use PHY APIs to get the PHY device and put it out of suspend
From: Felipe Balbi @ 2013-01-29 9:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359453032-20604-1-git-send-email-rogerq@ti.com>
Hi,
On Tue, Jan 29, 2013 at 11:50:32AM +0200, Roger Quadros wrote:
> For each port that is in PHY mode we obtain a PHY device using the USB PHY
> library and put it out of suspend.
>
> It is up to platform code to associate the PHY to the controller's
> port and it is upto the PHY driver to manage the PHY's resources.
>
> Also remove wired spacing around declarations we come across.
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
ideally, this would be done generically by ehci-hcd.ko itself. Alan,
would you have objections provided it doesn't break anyone else ?
--
balbi
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* [PATCH v2 07/27] PCI: Add software-emulated host bridge
From: Thomas Petazzoni @ 2013-01-29 10:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130128225105.GA21935@obsidianresearch.com>
Dear Jason Gunthorpe,
On Mon, 28 Jan 2013 15:51:05 -0700, Jason Gunthorpe wrote:
> > > I'm refering to your earlier question about what PCI IDs to use for
> > > the SW emulated devices. If there is no need for the host bridge then
> > > you only need 1 PCI ID (for the root port bridge) and you can probably
> > > fairly safely re-use the one in the Marvell config space of the HW.
> >
> > Ah, ok, I see. But isn't a host bridge needed to bind all the
> > PCI-to-PCI bridges under a single bus, in order to get the global
> > resource assignment I was referring to?
>
> The PCI-E spec requires it, but AFAIK it doesn't actually *do*
> anything on Linux, and Linux doesn't require it.
>
> I thought Thierry did this experiment and decided it wasn't necessary:
Could you detail what would be visible PCI bus topology if I remove the
emulated PCI host bridge? (And keeping one PCI-to-PCI bridge per PCIe
interface) ?
I'm just trying to understand what it would look like, in terms of
"lspci -t" output, because for now, it's not clear to me how everything
would fit together with the emulated host bridge.
Thanks,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH v2 02/27] of/pci: Add of_pci_get_devfn() function
From: Thomas Petazzoni @ 2013-01-29 10:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130128221604.GA24858@avionic-0098.mockup.avionic-design.de>
Thierry, Stephen,
On Mon, 28 Jan 2013 23:16:04 +0100, Thierry Reding wrote:
> That's already fixed up in my series. I was going to wait until I was
> done with the MSI rework but maybe posting an intermediate version is in
> order to share the latest state.
Thanks! Those first four patches are definitely shared between our
series.
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* One of these things (CONFIG_HZ) is not like the others..
From: Russell King - ARM Linux @ 2013-01-29 10:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <51076FA2.9070002@ti.com>
On Tue, Jan 29, 2013 at 12:13:46PM +0530, Santosh Shilimkar wrote:
> To avoid the server latency, we didn't do continuous sync. The time was
> synced in the beginning and after 62.5 hours (#ntpd -qg) and the drift
> of about 174 ms was observed. As you said this could be because of
> server sync time along with probably some addition from system calls
> from #ntpd. As mentioned, the other run with HZ = 128 which started
> 15 hours 20 mins is already showing about 24 mS drift now. I will
> let it run for couple of more days just to have similar duration run.
Hmm. I wonder if ntpd -qg will cause ntp to read the drift file and
adjust the kernel time keeping using that information...
^ permalink raw reply
* [PATCH v2 8/9] ARM: DTS: AM33XX: Add nodes for OCMC RAM and WKUP-M3
From: Bedia, Vaibhav @ 2013-01-29 10:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87622ge6xv.fsf@dell.be.48ers.dk>
On Tue, Jan 29, 2013 at 13:50:44, Peter Korsgaard wrote:
> >>>>> "Vaibhav" == Vaibhav Bedia <vaibhav.bedia@ti.com> writes:
>
> Vaibhav> Since AM33XX supports only DT-boot, this is needed
> Vaibhav> for the appropriate device nodes to be created.
>
> Vaibhav> Note: OCMC RAM is part of the PER power domain and supports
> Vaibhav> retention. The assembly code for low power entry/exit will
> Vaibhav> run from OCMC RAM. To ensure that the OMAP PM code does not
> Vaibhav> attempt to disable the clock to OCMC RAM as part of the
> Vaibhav> suspend process add the no_idle_on_suspend flag.
>
> Vaibhav> Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
> Vaibhav> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Vaibhav> ---
> Vaibhav> v2: Add reg property
>
> Vaibhav> arch/arm/boot/dts/am33xx.dtsi | 14 +++++++++++++
> Vaibhav> 1 file changed, 14 insertions(+)
>
> Vaibhav> diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
> Vaibhav> index c2f14e8..423f898 100644
> Vaibhav> --- a/arch/arm/boot/dts/am33xx.dtsi
> Vaibhav> +++ b/arch/arm/boot/dts/am33xx.dtsi
> Vaibhav> @@ -385,5 +385,19 @@
> Vaibhav> mac-address = [ 00 00 00 00 00 00 ];
> Vaibhav> };
> Vaibhav> };
> Vaibhav> +
> Vaibhav> + ocmcram: ocmcram at 40300000 {
> Vaibhav> + compatible = "ti,ocmcram";
> Vaibhav> + reg = <0x40300000 0x10000>;
> Vaibhav> + ti,hwmods = "ocmcram";
> Vaibhav> + ti,no_idle_on_suspend;
> Vaibhav> + };
> Vaibhav> +
> Vaibhav> + wkup_m3: wkup_m3 at 44d00000 {
> Vaibhav> + compatible = "ti,wkup_m3";
>
>
> Both of these compatible properties should probably use less generic
> names, like:
>
> ti,am3352-ocmcram
> ti,am3352-wkup-m3 ('-' instead of '_')
>
Ok. Will do.
Thanks,
Vaibhav
^ permalink raw reply
* [PATCH v3 10/30] USB: ehci-omap: Use PHY APIs to get the PHY device and put it out of suspend
From: Roger Quadros @ 2013-01-29 10:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130129095758.GM8708@arwen.pp.htv.fi>
On 01/29/2013 11:57 AM, Felipe Balbi wrote:
> Hi,
>
> On Tue, Jan 29, 2013 at 11:50:32AM +0200, Roger Quadros wrote:
>> For each port that is in PHY mode we obtain a PHY device using the USB PHY
>> library and put it out of suspend.
>>
>> It is up to platform code to associate the PHY to the controller's
>> port and it is upto the PHY driver to manage the PHY's resources.
>>
>> Also remove wired spacing around declarations we come across.
>>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>
> ideally, this would be done generically by ehci-hcd.ko itself. Alan,
> would you have objections provided it doesn't break anyone else ?
>
Agreed, and PHY suspend/resume should be done at port granularity.
But considering the erratas we have in OMAP EHCI, I would still prefer to
have control of the PHY in ehci-omap. We might even have to do some ULPI
transfers in certain scenarios to work around some of the erratas.
cheers,
-roger
^ permalink raw reply
* [PATCH v2 0/5] ARM: Manage the pl310 erratas in a dynamic way
From: srinidhi kasagar @ 2013-01-29 10:10 UTC (permalink / raw)
To: linux-arm-kernel
This series of patches attempts to manage the pl310 erratas dynamically rather
allowing platforms to choose them during build time.
A bit of information which triggered the cause for this series is here:
http://lists.infradead.org/pipermail/linux-arm-kernel/2012-December/138066.html
v2:
- The commit 74ddcdb868a84f4a9f65e33c1ca0d24e1134e53a
(l2x0: Only set .set_debug on PL310 r3p0 and earlier) which makes the
assumption that non-secure platforms will implement .set_debug interface.
An attempt is made to set .set_debug only if 'smc' is passed either
through DT or through legacy interface (l2x0_init).
With this background, this series adds 'smc' identifier to differentiate
the paltforms which implements SMC interface.
- Use the stashed value instead of reading RTL revision all over the place(Will)
- Added l2x0_quirks to manage the errata in cpu_idle path. Tried to address
Russell's comment on this, but could not completely. Because, neither I can
keep the #ifdef CONFIG_PL310_ERRATA_769419 nor remove it entirely since
the platform A suffers from this bug, whereas B do not but shares the same
defconfig.
srinidhi kasagar (5):
ARM: cache-l2x0: add 'smc' identifier
ARM: cache-l2x0: Manage the errata at run time
ARM: make the platforms not to select the l2x0 erratas
ARM: Handle l2x0 quirks in cpu_idle path
ARM: mach-omap2: apply the errata at run time rather
arch/arm/boot/dts/omap4.dtsi | 1 +
arch/arm/include/asm/hardware/cache-l2x0.h | 16 ++++-
arch/arm/kernel/process.c | 7 +-
arch/arm/mach-cns3xxx/core.c | 4 +-
arch/arm/mach-exynos/common.c | 4 +-
arch/arm/mach-imx/Kconfig | 3 -
arch/arm/mach-imx/mm-imx3.c | 4 +-
arch/arm/mach-nomadik/cpu-8815.c | 4 +-
arch/arm/mach-omap2/Kconfig | 2 -
arch/arm/mach-omap2/omap4-common.c | 2 +-
arch/arm/mach-omap2/sleep44xx.S | 25 ++++++-
arch/arm/mach-realview/realview_eb.c | 4 +-
arch/arm/mach-realview/realview_pb1176.c | 4 +-
arch/arm/mach-realview/realview_pb11mp.c | 4 +-
arch/arm/mach-realview/realview_pbx.c | 4 +-
arch/arm/mach-shmobile/board-ag5evm.c | 2 +-
arch/arm/mach-shmobile/board-armadillo800eva.c | 4 +-
arch/arm/mach-shmobile/board-bonito.c | 4 +-
arch/arm/mach-shmobile/board-kota2.c | 4 +-
arch/arm/mach-shmobile/board-kzm9g.c | 4 +-
arch/arm/mach-shmobile/setup-r8a7779.c | 4 +-
arch/arm/mach-spear13xx/spear13xx.c | 2 +-
arch/arm/mach-tegra/Kconfig | 3 -
arch/arm/mach-ux500/Kconfig | 1 -
arch/arm/mach-ux500/cache-l2x0.c | 2 +-
arch/arm/mach-vexpress/Kconfig | 1 -
arch/arm/mach-vexpress/ct-ca9x4.c | 2 +-
arch/arm/mm/cache-l2x0.c | 90 +++++++++++++-----------
28 files changed, 121 insertions(+), 90 deletions(-)
--
1.7.2.dirty
^ permalink raw reply
* [PATCH v3 10/30] USB: ehci-omap: Use PHY APIs to get the PHY device and put it out of suspend
From: Felipe Balbi @ 2013-01-29 10:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <51079F97.6080109@ti.com>
On Tue, Jan 29, 2013 at 12:08:23PM +0200, Roger Quadros wrote:
> On 01/29/2013 11:57 AM, Felipe Balbi wrote:
> > Hi,
> >
> > On Tue, Jan 29, 2013 at 11:50:32AM +0200, Roger Quadros wrote:
> >> For each port that is in PHY mode we obtain a PHY device using the USB PHY
> >> library and put it out of suspend.
> >>
> >> It is up to platform code to associate the PHY to the controller's
> >> port and it is upto the PHY driver to manage the PHY's resources.
> >>
> >> Also remove wired spacing around declarations we come across.
> >>
> >> Signed-off-by: Roger Quadros <rogerq@ti.com>
> >
> > ideally, this would be done generically by ehci-hcd.ko itself. Alan,
> > would you have objections provided it doesn't break anyone else ?
> >
> Agreed, and PHY suspend/resume should be done at port granularity.
right.
> But considering the erratas we have in OMAP EHCI, I would still prefer to
> have control of the PHY in ehci-omap. We might even have to do some ULPI
> transfers in certain scenarios to work around some of the erratas.
fair enough, then let's start with your change and make it more generic
later.
--
balbi
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* [PATCH v1 1/5] ARM: cache-l2x0: add 'smc' identifier
From: srinidhi kasagar @ 2013-01-29 10:13 UTC (permalink / raw)
To: linux-arm-kernel
Add 'smc' (Secure Monitor Call) identifier to differentiates
the platforms which implements this.
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
---
arch/arm/boot/dts/omap4.dtsi | 1 +
arch/arm/include/asm/hardware/cache-l2x0.h | 2 +-
arch/arm/mach-cns3xxx/core.c | 4 ++--
arch/arm/mach-exynos/common.c | 4 ++--
arch/arm/mach-imx/mm-imx3.c | 4 ++--
arch/arm/mach-nomadik/cpu-8815.c | 4 ++--
arch/arm/mach-omap2/omap4-common.c | 2 +-
arch/arm/mach-realview/realview_eb.c | 4 ++--
arch/arm/mach-realview/realview_pb1176.c | 4 ++--
arch/arm/mach-realview/realview_pb11mp.c | 4 ++--
arch/arm/mach-realview/realview_pbx.c | 4 ++--
arch/arm/mach-shmobile/board-ag5evm.c | 2 +-
arch/arm/mach-shmobile/board-armadillo800eva.c | 4 ++--
arch/arm/mach-shmobile/board-bonito.c | 4 ++--
arch/arm/mach-shmobile/board-kota2.c | 4 ++--
arch/arm/mach-shmobile/board-kzm9g.c | 4 ++--
arch/arm/mach-shmobile/setup-r8a7779.c | 4 ++--
arch/arm/mach-spear13xx/spear13xx.c | 2 +-
arch/arm/mach-ux500/cache-l2x0.c | 2 +-
arch/arm/mach-vexpress/ct-ca9x4.c | 2 +-
arch/arm/mm/cache-l2x0.c | 18 ++++++++++++++----
21 files changed, 47 insertions(+), 36 deletions(-)
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 739bb79..9eaac63 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -51,6 +51,7 @@
reg = <0x48242000 0x1000>;
cache-unified;
cache-level = <2>;
+ smc;
};
local-timer at 0x48240600 {
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index 3b2c40b..49ac638 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -107,7 +107,7 @@
#define L2X0_WAY_SIZE_SHIFT 3
#ifndef __ASSEMBLY__
-extern void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask);
+extern void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask, bool smc);
#if defined(CONFIG_CACHE_L2X0) && defined(CONFIG_OF)
extern int l2x0_of_init(u32 aux_val, u32 aux_mask);
#else
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index 031805b..446bd99 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -282,8 +282,8 @@ void __init cns3xxx_l2x0_init(void)
val &= 0xfffff888;
writel(val, base + L2X0_DATA_LATENCY_CTRL);
- /* 32 KiB, 8-way, parity disable */
- l2x0_init(base, 0x00540000, 0xfe000fff);
+ /* 32 KiB, 8-way, parity disable, no secure monitor call (smc) */
+ l2x0_init(base, 0x00540000, 0xfe000fff, false);
}
#endif /* CONFIG_CACHE_L2X0 */
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 1a89824..6624acc 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -754,8 +754,8 @@ static int __init exynos4_l2x0_cache_init(void)
clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long));
clean_dcache_area(&l2x0_saved_regs, sizeof(struct l2x0_regs));
}
-
- l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK);
+ /* no secure monitor call (smc) implemented */
+ l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK, false);
return 0;
}
early_initcall(exynos4_l2x0_cache_init);
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index cefa047..74eedb7 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -111,8 +111,8 @@ void __init imx3_init_l2x0(void)
printk(KERN_ERR "remapping L2 cache area failed\n");
return;
}
-
- l2x0_init(l2x0_base, 0x00030024, 0x00000000);
+ /* no secure monitor call (smc) implemented */
+ l2x0_init(l2x0_base, 0x00030024, 0x00000000, false);
#endif
}
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index 1273931..7f27151 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -145,8 +145,8 @@ void __init cpu8815_init_irq(void)
void __init cpu8815_platform_init(void)
{
#ifdef CONFIG_CACHE_L2X0
- /* At full speed latency must be >=2, so 0x249 in low bits */
- l2x0_init(io_p2v(NOMADIK_L2CC_BASE), 0x00730249, 0xfe000fff);
+ /* At full speed latency must be >=2, so 0x249 in low bits, no smc */
+ l2x0_init(io_p2v(NOMADIK_L2CC_BASE), 0x00730249, 0xfe000fff, false);
#endif
return;
}
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 6897ae2..a440fc4 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -214,7 +214,7 @@ static int __init omap_l2_cache_init(void)
if (of_have_populated_dt())
l2x0_of_init(aux_ctrl, L2X0_AUX_CTRL_MASK);
else
- l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK);
+ l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK, true);
/*
* Override default outer_cache.disable with a OMAP4
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 28511d4..ca5e75c 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -445,9 +445,9 @@ static void __init realview_eb_init(void)
realview_eb11mp_fixup();
#ifdef CONFIG_CACHE_L2X0
- /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
+ /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled, no smc
* Bits: .... ...0 0111 1001 0000 .... .... .... */
- l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
+ l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff, false);
#endif
platform_device_register(&pmu_device);
}
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 07d6672..f2e851d 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -358,8 +358,8 @@ static void __init realview_pb1176_init(void)
int i;
#ifdef CONFIG_CACHE_L2X0
- /* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
- l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
+ /* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled, no smc */
+ l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff, false);
#endif
realview_flash_register(realview_pb1176_flash_resources,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 7ed53d7..6cb7f60 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -340,9 +340,9 @@ static void __init realview_pb11mp_init(void)
int i;
#ifdef CONFIG_CACHE_L2X0
- /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
+ /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled, no smc
* Bits: .... ...0 0111 1001 0000 .... .... .... */
- l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
+ l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff, false);
#endif
realview_flash_register(realview_pb11mp_flash_resource,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 4f486f0..d90bdbd 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -376,9 +376,9 @@ static void __init realview_pbx_init(void)
writel(0, l2x0_base + L2X0_TAG_LATENCY_CTRL);
writel(0, l2x0_base + L2X0_DATA_LATENCY_CTRL);
- /* 16KB way size, 8-way associativity, parity disabled
+ /* 16KB way size, 8-way associativity, parity disabled, no smc
* Bits: .. 0 0 0 0 1 00 1 0 1 001 0 000 0 .... .... .... */
- l2x0_init(l2x0_base, 0x02520000, 0xc0000fff);
+ l2x0_init(l2x0_base, 0x02520000, 0xc0000fff, false);
platform_device_register(&pmu_device);
}
#endif
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 032d108..788dc1f 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -656,7 +656,7 @@ static void __init ag5evm_init(void)
#ifdef CONFIG_CACHE_L2X0
/* Shared attribute override enable, 64K*8way */
- l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff);
+ l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff, false);
#endif
sh73a0_add_standard_devices();
platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices));
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 5353adf..2ff7e81 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -1163,8 +1163,8 @@ static void __init eva_init(void)
#ifdef CONFIG_CACHE_L2X0
- /* Early BRESP enable, Shared attribute override enable, 32K*8way */
- l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
+ /* Early BRESP enable, Shared attribute override enable, 32K*8way, no smc */
+ l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff, false);
#endif
i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
index cb8c994..eca8b32 100644
--- a/arch/arm/mach-shmobile/board-bonito.c
+++ b/arch/arm/mach-shmobile/board-bonito.c
@@ -380,8 +380,8 @@ static void __init bonito_init(void)
*/
#ifdef CONFIG_CACHE_L2X0
- /* Early BRESP enable, Shared attribute override enable, 32K*8way */
- l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
+ /* Early BRESP enable, Shared attribute override enable, 32K*8way, no smc */
+ l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff, false);
#endif
r8a7740_add_standard_devices();
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index bf88f9a..57d0732 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -537,8 +537,8 @@ static void __init kota2_init(void)
gpio_request(GPIO_FN_SDHID1_0_PU, NULL);
#ifdef CONFIG_CACHE_L2X0
- /* Early BRESP enable, Shared attribute override enable, 64K*8way */
- l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
+ /* Early BRESP enable, Shared attribute override enable, 64K*8way, no smc */
+ l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff, false);
#endif
sh73a0_add_standard_devices();
platform_add_devices(kota2_devices, ARRAY_SIZE(kota2_devices));
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index c02448d..31e9d1a 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -762,8 +762,8 @@ static void __init kzm_init(void)
gpio_request(GPIO_FN_VBUS_0, NULL);
#ifdef CONFIG_CACHE_L2X0
- /* Early BRESP enable, Shared attribute override enable, 64K*8way */
- l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
+ /* Early BRESP enable, Shared attribute override enable, 64K*8way, no smc */
+ l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff, false);
#endif
i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index 7a1ad4f..15db786 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -323,8 +323,8 @@ static struct platform_device *r8a7779_late_devices[] __initdata = {
void __init r8a7779_add_standard_devices(void)
{
#ifdef CONFIG_CACHE_L2X0
- /* Early BRESP enable, Shared attribute override enable, 64K*16way */
- l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
+ /* Early BRESP enable, Shared attribute override enable, 64K*16way, no smc */
+ l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff, false);
#endif
r8a7779_pm_init();
diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear13xx/spear13xx.c
index c4af775..83671be 100644
--- a/arch/arm/mach-spear13xx/spear13xx.c
+++ b/arch/arm/mach-spear13xx/spear13xx.c
@@ -102,7 +102,7 @@ void __init spear13xx_l2x0_init(void)
*/
writel_relaxed(0x221, VA_L2CC_BASE + L2X0_TAG_LATENCY_CTRL);
writel_relaxed(0x441, VA_L2CC_BASE + L2X0_DATA_LATENCY_CTRL);
- l2x0_init(VA_L2CC_BASE, 0x70A60001, 0xfe00ffff);
+ l2x0_init(VA_L2CC_BASE, 0x70A60001, 0xfe00ffff, false);
}
/*
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c
index 75d5b51..e770156 100644
--- a/arch/arm/mach-ux500/cache-l2x0.c
+++ b/arch/arm/mach-ux500/cache-l2x0.c
@@ -58,7 +58,7 @@ static int __init ux500_l2x0_init(void)
if (of_have_populated_dt())
l2x0_of_init(aux_val, 0xc0000fff);
else
- l2x0_init(l2x0_base, aux_val, 0xc0000fff);
+ l2x0_init(l2x0_base, aux_val, 0xc0000fff, false);
/*
* We can't disable l2 as we are in non secure mode, currently
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index 60838dd..e3e6644 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -148,7 +148,7 @@ static void __init ct_ca9x4_init(void)
writel(0, l2x0_base + L2X0_TAG_LATENCY_CTRL);
writel(0, l2x0_base + L2X0_DATA_LATENCY_CTRL);
- l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff);
+ l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff, false);
#endif
for (i = 0; i < ARRAY_SIZE(ct_ca9x4_amba_devs); i++)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index c2f3739..432fef0 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -320,7 +320,7 @@ static void l2x0_unlock(u32 cache_id)
}
}
-void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
+void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask, bool smc)
{
u32 aux;
u32 cache_id;
@@ -352,8 +352,10 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
/* Unmapped register. */
sync_reg_offset = L2X0_DUMMY_REG;
#endif
- if ((cache_id & L2X0_CACHE_ID_RTL_MASK) <= L2X0_CACHE_ID_RTL_R3P0)
+ if (smc)
outer_cache.set_debug = pl310_set_debug;
+ else
+ outer_cache.set_debug = NULL;
break;
case L2X0_CACHE_ID_PART_L210:
ways = (aux >> 13) & 0xf;
@@ -425,6 +427,7 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
#ifdef CONFIG_OF
static int l2_wt_override;
+static bool is_smc;
/*
* Note that the end addresses passed to Linux primitives are
@@ -590,6 +593,14 @@ static void __init pl310_of_setup(const struct device_node *np,
writel_relaxed((filter[0] & ~(SZ_1M - 1)) | L2X0_ADDR_FILTER_EN,
l2x0_base + L2X0_ADDR_FILTER_START);
}
+
+ is_smc = of_property_read_bool(np, "smc");
+
+ if (is_smc) {
+ /* set the debug interface */
+ outer_cache.set_debug = pl310_set_debug;
+ }
+
}
static void __init pl310_save(void)
@@ -725,7 +736,6 @@ static const struct l2x0_of_data pl310_data = {
.flush_all = l2x0_flush_all,
.inv_all = l2x0_inv_all,
.disable = l2x0_disable,
- .set_debug = pl310_set_debug,
},
};
@@ -814,7 +824,7 @@ int __init l2x0_of_init(u32 aux_val, u32 aux_mask)
data->save();
of_init = true;
- l2x0_init(l2x0_base, aux_val, aux_mask);
+ l2x0_init(l2x0_base, aux_val, aux_mask, is_smc);
memcpy(&outer_cache, &data->outer_cache, sizeof(outer_cache));
--
1.7.2.dirty
^ permalink raw reply related
* [PATCH v2 2/5] ARM: cache-l2x0: Manage the errata at run time
From: srinidhi kasagar @ 2013-01-29 10:14 UTC (permalink / raw)
To: linux-arm-kernel
Make it possible to manage the errata by its own by using the
l2x0 ID register. This relieves the platforms from choosing the
Errata's at compile time
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
---
arch/arm/include/asm/hardware/cache-l2x0.h | 1 +
arch/arm/mm/cache-l2x0.c | 72 +++++++++++++--------------
2 files changed, 36 insertions(+), 37 deletions(-)
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index 49ac638..ab76131 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -134,6 +134,7 @@ struct l2x0_regs {
};
extern struct l2x0_regs l2x0_saved_regs;
+extern u32 l2x0_revision;
#endif /* __ASSEMBLY__ */
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 432fef0..4f66e64 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -38,8 +38,10 @@ static unsigned long sync_reg_offset = L2X0_CACHE_SYNC;
/* Aurora don't have the cache ID register available, so we have to
* pass it though the device tree */
static u32 cache_id_part_number_from_dt;
+static u32 cache_rtl_number_from_dt;
struct l2x0_regs l2x0_saved_regs;
+u32 l2x0_revision;
struct l2x0_of_data {
void (*setup)(const struct device_node *, u32 *, u32 *);
@@ -87,7 +89,6 @@ static inline void l2x0_inv_line(unsigned long addr)
writel_relaxed(addr, base + L2X0_INV_LINE_PA);
}
-#if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915)
static inline void debug_writel(unsigned long val)
{
if (outer_cache.set_debug)
@@ -96,37 +97,31 @@ static inline void debug_writel(unsigned long val)
static void pl310_set_debug(unsigned long val)
{
- writel_relaxed(val, l2x0_base + L2X0_DEBUG_CTRL);
-}
-#else
-/* Optimised out for non-errata case */
-static inline void debug_writel(unsigned long val)
-{
+ /* manage ERRATA_588369 and ERRATA_727915 */
+ if (l2x0_revision == L2X0_CACHE_ID_RTL_R0P0 ||
+ l2x0_revision == L2X0_CACHE_ID_RTL_R1P0 ||
+ l2x0_revision == L2X0_CACHE_ID_RTL_R2P0 ||
+ l2x0_revision == L2X0_CACHE_ID_RTL_R3P0)
+ writel_relaxed(val, l2x0_base + L2X0_DEBUG_CTRL);
}
-#define pl310_set_debug NULL
-#endif
-
-#ifdef CONFIG_PL310_ERRATA_588369
static inline void l2x0_flush_line(unsigned long addr)
{
void __iomem *base = l2x0_base;
- /* Clean by PA followed by Invalidate by PA */
- cache_wait(base + L2X0_CLEAN_LINE_PA, 1);
- writel_relaxed(addr, base + L2X0_CLEAN_LINE_PA);
- cache_wait(base + L2X0_INV_LINE_PA, 1);
- writel_relaxed(addr, base + L2X0_INV_LINE_PA);
-}
-#else
-
-static inline void l2x0_flush_line(unsigned long addr)
-{
- void __iomem *base = l2x0_base;
- cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
- writel_relaxed(addr, base + L2X0_CLEAN_INV_LINE_PA);
+ /* manage the ERRATA_588369 */
+ if (l2x0_revision == L2X0_CACHE_ID_RTL_R0P0 ||
+ l2x0_revision == L2X0_CACHE_ID_RTL_R1P0) {
+ /* Clean by PA followed by Invalidate by PA */
+ cache_wait(base + L2X0_CLEAN_LINE_PA, 1);
+ writel_relaxed(addr, base + L2X0_CLEAN_LINE_PA);
+ cache_wait(base + L2X0_INV_LINE_PA, 1);
+ writel_relaxed(addr, base + L2X0_INV_LINE_PA);
+ } else {
+ cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
+ writel_relaxed(addr, base + L2X0_CLEAN_INV_LINE_PA);
+ }
}
-#endif
static void l2x0_cache_sync(void)
{
@@ -330,11 +325,15 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask, bool smc)
const char *type;
l2x0_base = base;
- if (cache_id_part_number_from_dt)
+ if (cache_id_part_number_from_dt) {
cache_id = cache_id_part_number_from_dt;
- else
+ l2x0_revision = cache_rtl_number_from_dt;
+ } else {
cache_id = readl_relaxed(l2x0_base + L2X0_CACHE_ID)
& L2X0_CACHE_ID_PART_MASK;
+ l2x0_revision = readl_relaxed(l2x0_base + L2X0_CACHE_ID)
+ & L2X0_CACHE_ID_RTL_MASK;
+ }
aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
aux &= aux_mask;
@@ -348,10 +347,13 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask, bool smc)
else
ways = 8;
type = "L310";
-#ifdef CONFIG_PL310_ERRATA_753970
- /* Unmapped register. */
- sync_reg_offset = L2X0_DUMMY_REG;
-#endif
+
+ /* handle ERRATA_753970 */
+ if (l2x0_revision == L2X0_CACHE_ID_RTL_R3P0) {
+ /* Unmapped register. */
+ sync_reg_offset = L2X0_DUMMY_REG;
+ }
+
if (smc)
outer_cache.set_debug = pl310_set_debug;
else
@@ -605,8 +607,6 @@ static void __init pl310_of_setup(const struct device_node *np,
static void __init pl310_save(void)
{
- u32 l2x0_revision = readl_relaxed(l2x0_base + L2X0_CACHE_ID) &
- L2X0_CACHE_ID_RTL_MASK;
l2x0_saved_regs.tag_latency = readl_relaxed(l2x0_base +
L2X0_TAG_LATENCY_CTRL);
@@ -655,7 +655,6 @@ static void l2x0_resume(void)
static void pl310_resume(void)
{
- u32 l2x0_revision;
if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
/* restore pl310 setup */
@@ -668,9 +667,6 @@ static void pl310_resume(void)
writel_relaxed(l2x0_saved_regs.filter_start,
l2x0_base + L2X0_ADDR_FILTER_START);
- l2x0_revision = readl_relaxed(l2x0_base + L2X0_CACHE_ID) &
- L2X0_CACHE_ID_RTL_MASK;
-
if (l2x0_revision >= L2X0_CACHE_ID_RTL_R2P0) {
writel_relaxed(l2x0_saved_regs.prefetch_ctrl,
l2x0_base + L2X0_PREFETCH_CTRL);
@@ -710,6 +706,8 @@ static void __init aurora_of_setup(const struct device_node *np,
of_property_read_u32(np, "cache-id-part",
&cache_id_part_number_from_dt);
+ of_property_read_u32(np, "cache-id-rtl",
+ &cache_rtl_number_from_dt);
/* Determine and save the write policy */
l2_wt_override = of_property_read_bool(np, "wt-override");
--
1.7.2.dirty
^ permalink raw reply related
* [PATCH v2 3/5] ARM: make the platforms not to select the l2x0 erratas
From: srinidhi kasagar @ 2013-01-29 10:15 UTC (permalink / raw)
To: linux-arm-kernel
Make the platforms not to choose the Errata's explicitly
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
---
arch/arm/mach-imx/Kconfig | 3 ---
arch/arm/mach-omap2/Kconfig | 2 --
arch/arm/mach-tegra/Kconfig | 3 ---
arch/arm/mach-ux500/Kconfig | 1 -
arch/arm/mach-vexpress/Kconfig | 1 -
5 files changed, 0 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 3e628fd..8ed6672 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -855,9 +855,6 @@ config SOC_IMX6Q
select MFD_SYSCON
select PINCTRL
select PINCTRL_IMX6Q
- select PL310_ERRATA_588369 if CACHE_PL310
- select PL310_ERRATA_727915 if CACHE_PL310
- select PL310_ERRATA_769419 if CACHE_PL310
select PM_OPP if PM
help
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 41b581f..7612c07 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -67,8 +67,6 @@ config ARCH_OMAP4
select HAVE_SMP
select LOCAL_TIMERS if SMP
select OMAP_INTERCONNECT
- select PL310_ERRATA_588369
- select PL310_ERRATA_727915
select PM_OPP if PM
select PM_RUNTIME if CPU_IDLE
select USB_ARCH_HAS_EHCI if USB_SUPPORT
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index b442f15..f6214f5 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -15,8 +15,6 @@ config ARCH_TEGRA_2x_SOC
select CPU_V7
select PINCTRL
select PINCTRL_TEGRA20
- select PL310_ERRATA_727915 if CACHE_L2X0
- select PL310_ERRATA_769419 if CACHE_L2X0
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select USB_ULPI if USB
select USB_ULPI_VIEWPORT if USB_SUPPORT
@@ -36,7 +34,6 @@ config ARCH_TEGRA_3x_SOC
select CPU_V7
select PINCTRL
select PINCTRL_TEGRA30
- select PL310_ERRATA_769419 if CACHE_L2X0
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select USB_ULPI if USB
select USB_ULPI_VIEWPORT if USB_SUPPORT
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 5dea906..db13db5 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -11,7 +11,6 @@ config UX500_SOC_COMMON
select COMMON_CLK
select PINCTRL
select PINCTRL_NOMADIK
- select PL310_ERRATA_753970 if CACHE_PL310
config UX500_SOC_DB8500
bool
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 52d315b..c658c40 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -42,7 +42,6 @@ config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
bool "Enable A5 and A9 only errata work-arounds"
default y
select ARM_ERRATA_720789
- select PL310_ERRATA_753970 if CACHE_PL310
help
Provides common dependencies for Versatile Express platforms
based on Cortex-A5 and Cortex-A9 processors. In order to
--
1.7.2.dirty
^ permalink raw reply related
* [RFC PATCH 0/4] Add support for LZ4-compressed kernels
From: Russell King - ARM Linux @ 2013-01-29 10:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130128142510.68092e10.akpm@linux-foundation.org>
On Mon, Jan 28, 2013 at 02:25:10PM -0800, Andrew Morton wrote:
> What's this "with enabled unaligned memory access" thing? You mean "if
> the arch supports CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS"? If so,
> that's only x86, which isn't really in the target market for this
> patch, yes?
>
> It's a lot of code for a 50ms boot-time improvement. Does anyone have
> any opinions on whether or not the benefits are worth the cost?
Well... when I saw this my immediate reaction was "oh no, yet another
decompressor for the kernel". We have five of these things already.
Do we really need a sixth?
My feeling is that we should have:
- one decompressor which is the fastest
- one decompressor for the highest compression ratio
- one popular decompressor (eg conventional gzip)
And if we have a replacement one for one of these, then it should do
exactly that: replace it. I realise that various architectures will
behave differently, so we should really be looking at numbers across
several arches.
Otherwise, where do we stop adding new ones? After we have 6 of these
(which is after this one). After 12? After the 20th?
^ permalink raw reply
* [PATCH v2 4/5] ARM: Handle l2x0 quirks in cpu_idle path
From: srinidhi kasagar @ 2013-01-29 10:16 UTC (permalink / raw)
To: linux-arm-kernel
As a result of to-be deprecated "CONFIG_PL310_ERRATA_*" config
option, handle the quirks at run time. As of now, PL310 errata
769419 is managed this way.
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
---
arch/arm/include/asm/hardware/cache-l2x0.h | 13 +++++++++++++
arch/arm/kernel/process.c | 7 ++++---
2 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index ab76131..7cca69c 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -136,6 +136,19 @@ struct l2x0_regs {
extern struct l2x0_regs l2x0_saved_regs;
extern u32 l2x0_revision;
+#ifdef CONFIG_CACHE_PL310
+static inline void handle_l2x0_quirks(void)
+{
+ /* handle ERRATA_769419 */
+ if (l2x0_revision == L2X0_CACHE_ID_RTL_R3P0)
+ wmb();
+}
+#else
+static inline void handle_l2x0_quirks(void)
+{
+}
+#endif
+
#endif /* __ASSEMBLY__ */
#endif
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index c6dec5f..12e3b5f 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -39,6 +39,7 @@
#include <asm/thread_notify.h>
#include <asm/stacktrace.h>
#include <asm/mach/time.h>
+#include <asm/hardware/cache-l2x0.h>
#ifdef CONFIG_CC_STACKPROTECTOR
#include <linux/stackprotector.h>
@@ -201,9 +202,9 @@ void cpu_idle(void)
* to ensure we don't miss a wakeup call.
*/
local_irq_disable();
-#ifdef CONFIG_PL310_ERRATA_769419
- wmb();
-#endif
+
+ handle_l2x0_quirks();
+
if (hlt_counter) {
local_irq_enable();
cpu_relax();
--
1.7.2.dirty
^ permalink raw reply related
* [PATCH v2 5/5] ARM: mach-omap2: apply the errata at run time rather
From: srinidhi kasagar @ 2013-01-29 10:17 UTC (permalink / raw)
To: linux-arm-kernel
Get the pl310 rtl revision number which is stashed by the l2x0
driver and apply the required errata ERRATA_727915 accordingly.
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
---
arch/arm/mach-omap2/sleep44xx.S | 25 +++++++++++++++++++++----
1 files changed, 21 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index 88ff83a..7440f65 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -157,11 +157,19 @@ skip_scu_gp_set:
ldrne r0, [r8, #L2X0_SAVE_OFFSET1] @ memory.
cmp r0, #3
bne do_WFI
-#ifdef CONFIG_PL310_ERRATA_727915
+ /* Check for PL310_ERRATA_727915 */
+ ldr r0, =l2x0_revision
+ cmp r0, #0x4
+ beq dosmc
+ cmp r0, #0x5
+ beq dosmc
+ b nosmc
+dosmc:
mov r0, #0x03
mov r12, #OMAP4_MON_L2X0_DBG_CTRL_INDEX
DO_SMC
-#endif
+
+nosmc:
bl omap4_get_l2cache_base
mov r2, r0
ldr r0, =0xffff
@@ -171,11 +179,20 @@ wait:
ldr r1, =0xffff
ands r0, r0, r1
bne wait
-#ifdef CONFIG_PL310_ERRATA_727915
+
+ /* Check for PL310_ERRATA_727915 */
+ ldr r0, =l2x0_revision
+ cmp r0, #0x4
+ beq dosmc2
+ cmp r0, #0x5
+ beq dosmc2
+ b nosmc2
+dosmc2:
mov r0, #0x00
mov r12, #OMAP4_MON_L2X0_DBG_CTRL_INDEX
DO_SMC
-#endif
+
+nosmc2:
l2x_sync:
bl omap4_get_l2cache_base
mov r2, r0
--
1.7.2.dirty
^ permalink raw reply related
* [PATCH v5 07/45] CPU hotplug: Provide APIs to prevent CPU offline from atomic context
From: Namhyung Kim @ 2013-01-29 10:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130122073446.13822.39253.stgit@srivatsabhat.in.ibm.com>
Hi Srivatsa,
On Tue, 22 Jan 2013 13:04:54 +0530, Srivatsa S. Bhat wrote:
> @@ -246,15 +291,21 @@ struct take_cpu_down_param {
> static int __ref take_cpu_down(void *_param)
> {
> struct take_cpu_down_param *param = _param;
> - int err;
> + unsigned long flags;
> + int err = 0;
It seems no need to set 'err' to 0.
Thanks,
Namhyung
> +
> + percpu_write_lock_irqsave(&hotplug_pcpu_rwlock, &flags);
>
> /* Ensure this CPU doesn't handle any more interrupts. */
> err = __cpu_disable();
> if (err < 0)
> - return err;
> + goto out;
>
> cpu_notify(CPU_DYING | param->mod, param->hcpu);
> - return 0;
> +
> +out:
> + percpu_write_unlock_irqrestore(&hotplug_pcpu_rwlock, &flags);
> + return err;
> }
>
> /* Requires cpu_add_remove_lock to be held */
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH v2] ARM: mxs: gpio-mxs: Add IRQ_TYPE_EDGE_BOTH support
From: Shawn Guo @ 2013-01-29 10:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359447393-2570-1-git-send-email-gwenhael.goavec-merou@armadeus.com>
On Tue, Jan 29, 2013 at 09:16:33AM +0100, Gwenhael Goavec-Merou wrote:
> This patch adds support for IRQ_TYPE_EDGE_BOTH needed for some driver
> (gpio-keys).
> Inspired from gpio-mxc.c
>
> Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
^ permalink raw reply
* [PATCH V3 7/8] mv643xx.c: Add basic device tree support.
From: Ian Molton @ 2013-01-29 10:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130128193840.GK1758@titan.lakedaemon.net>
On 28/01/13 19:38, Jason Cooper wrote:
Good to see this patch get some TLC guys - have at it :)
-Ian
^ permalink raw reply
* [PATCH 3/3] ARM: dts: mxs: Add the LCD to the 10049 board
From: Shawn Guo @ 2013-01-29 10:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359104048-26823-4-git-send-email-maxime.ripard@free-electrons.com>
On Fri, Jan 25, 2013 at 09:54:07AM +0100, Maxime Ripard wrote:
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> arch/arm/boot/dts/imx28-cfa10049.dts | 99 ++++++++++++++++++++++++++++++++++
> arch/arm/mach-mxs/mach-mxs.c | 22 ++++++++
> 2 files changed, 121 insertions(+)
>
Applied, thanks.
^ permalink raw reply
* [PATCH 1/5] dmaengine: dw_dmac: move to generic DMA binding
From: Arnd Bergmann @ 2013-01-29 10:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKohpomO6tYNYLdMOaJYgqGecXj5KMQprdb=gExi+QuGrtLTzw@mail.gmail.com>
On Tuesday 29 January 2013, Viresh Kumar wrote:
> > diff --git a/Documentation/devicetree/bindings/dma/snps-dma.txt b/Documentation/devicetree/bindings/dma/snps-dma.txt
> > index 5bb3dfb..212d387 100644
> > --- a/Documentation/devicetree/bindings/dma/snps-dma.txt
> > +++ b/Documentation/devicetree/bindings/dma/snps-dma.txt
> > @@ -3,59 +3,62 @@
> > Required properties:
> > - compatible: "snps,dma-spear1340"
> > - reg: Address range of the DMAC registers
> > -- interrupt-parent: Should be the phandle for the interrupt controller
> > - that services interrupts for this device
> > - interrupt: Should contain the DMAC interrupt number
> > -- nr_channels: Number of channels supported by hardware
> > -- is_private: The device channels should be marked as private and not for by the
> > - general purpose DMA channel allocator. False if not passed.
> > +- dma-channels: Number of channels supported by hardware
> > +- dma-requests: Number of DMA request lines supported
> > +- dma-masters: Number of AHB masters supported by the controller
> > +- #dma-cells: must be <3>
>
> Shouldn't this be 4? Would be better to mention what fields are these,
> right here. I have seen them below though.
Correct. I changed these a couple of times while trying to understand
what the fields are, and I missed this instance. I'm still not sure
whether we actually need all four fields, or what the simplest format
for them would be. This just mirrors what you had in your binding.
> > -bool dw_dma_generic_filter(struct dma_chan *chan, void *param)
> > +/* forward declaration used in filter */
> > +static struct platform_driver dw_driver;
>
> extern? This is not a declaration but definition.
No. You can have multiple declarations for a static symbol like this,
but only one of them with an initilizer. I usually recommend against
doing this myself, because it's confusing and somewhat bad style, but
it is correct C.
> > - /*
> > - * dmaengine framework calls this routine for all channels of all dma
> > - * controller, until true is returned. If 'param' bus_id is not
> > - * registered with a dma controller (dw), then there is no need of
> > - * running below function for all channels of dw.
> > - *
> > - * This block of code does this by saving the parameters of last
> > - * failure. If dw and param are same, i.e. trying on same dw with
> > - * different channel, return false.
> > - */
> > - if ((last_dw == dw) && (last_bus_id == param))
> > + /* both the driver and the device must match */
> > + if (chan->device->dev->driver != &dw_driver.driver)
> > + return false;
>
> Can this ever happen? Isn't it the case that this routine would be called
> only for dw_dmac?
I think not. AFAIK the filter function will be called for each channel
on each DMA engine until one of them matches.
> > - while (++i < dw->sd_count) {
> > - if (!strcmp(dw->sd[i].bus_id, param)) {
> > - chan->private = &dw->sd[i];
> > - last_dw = NULL;
> > - last_bus_id = NULL;
> > + /* FIXME: memory leak! could we put this into dw_dma_chan? */
> > + sd = devm_kzalloc(dw->dma.dev, sizeof (*sd), GFP_KERNEL);
>
> Yes.
Yes it can be in dw_dma_chan or yes it is a memory leak?
> > +static struct dma_chan *dw_dma_xlate(struct of_phandle_args *dma_spec,
> > + struct of_dma *ofdma)
> > +{
> > + struct dw_dma *dw = ofdma->of_dma_data;
> > + struct dw_dma_filter_args fargs = {
> > + .dw = dw,
> > + };
> > + dma_cap_mask_t cap;
> > +
> > + if (dma_spec->args_count != 4)
>
> args_count contains count of all params leaving the phandle?
That was my interpretation from reading the code, but I have not tried it.
> > + /* FIXME: This binding is rather clumsy. Can't we use the
> > + request line numbers here instead? */
>
> yes.
Ok, Very good. What is the encoding of the registers then?
> > + fargs.cfg_lo = be32_to_cpup(dma_spec->args+0);
> > + fargs.cfg_hi = be32_to_cpup(dma_spec->args+1);
> > + fargs.src = be32_to_cpup(dma_spec->args+2);
> > + fargs.dst = be32_to_cpup(dma_spec->args+3);
> > +
> > + dma_cap_zero(cap);
> > + dma_cap_set(DMA_SLAVE, cap);
> > + /* FIXME: there should be a simpler way to do this */
> > + return dma_request_channel(cap, dw_dma_generic_filter, &dma_spec->args[0]);
>
> don't you need to send &fargs as the last argument?
Right, my mistake.
Thanks a lot for the input. When I fix the above, are actually able
to test the changes, or have you lost access to the hardware when
leaving ST?
Arnd
^ permalink raw reply
* [PATCH v3 14/15] ARM: vexpress/dcscb: handle platform coherency exit/setup and CCI
From: Lorenzo Pieralisi @ 2013-01-29 10:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359445870-18925-15-git-send-email-nicolas.pitre@linaro.org>
On Tue, Jan 29, 2013 at 07:51:09AM +0000, Nicolas Pitre wrote:
[...]
> + /*
> + * Flush the local CPU cache.
> + *
> + * A15/A7 can hit in the cache with SCTLR.C=0, so we don't need
> + * a preliminary flush here for those CPUs. At least, that's
> + * the theory -- without the extra flush, Linux explodes on
> + * RTSM (maybe not needed anymore, to be investigated).
> + */
> + flush_cache_louis();
This is not needed. If it is, that is a model bug and should be flagged
up as such.
> + cpu_proc_fin(); /* disable allocation into internal caches*/
This code disables the I-cache causing following instruction fetches from
DRAM; that is extremely slow and should be avoided, there is no point in
disabling the I-cache here, that is not required.
On fast-models that's a non-issue, but I really want to prevent copy'n'paste
of this sequence as it stands.
> + flush_cache_louis();
> +
> + /* Disable local coherency by clearing the ACTLR "SMP" bit: */
> + set_auxcr(get_auxcr() & ~(1 << 6));
> }
>
> - /* Disable local coherency by clearing the ACTLR "SMP" bit: */
> - set_auxcr(get_auxcr() & ~(1 << 6));
> + __mcpm_cpu_down(cpu, cluster);
>
> /* Now we are prepared for power-down, do it: */
> if (!skip_wfi) {
> @@ -179,6 +211,8 @@ static void __init dcscb_usage_count_init(void)
> dcscb_use_count[cpu][cluster] = 1;
> }
>
> +extern void dcscb_power_up_setup(unsigned int affinity_level);
> +
> static int __init dcscb_init(void)
> {
> unsigned int cfg;
> @@ -193,6 +227,8 @@ static int __init dcscb_init(void)
> dcscb_usage_count_init();
>
> ret = mcpm_platform_register(&dcscb_power_ops);
> + if (!ret)
> + ret = mcpm_sync_init(dcscb_power_up_setup);
> if (ret) {
> iounmap(dcscb_base);
> return ret;
> diff --git a/arch/arm/mach-vexpress/dcscb_setup.S b/arch/arm/mach-vexpress/dcscb_setup.S
> new file mode 100644
> index 0000000000..cac033b982
> --- /dev/null
> +++ b/arch/arm/mach-vexpress/dcscb_setup.S
> @@ -0,0 +1,80 @@
> +/*
> + * arch/arm/include/asm/dcscb_setup.S
> + *
> + * Created by: Dave Martin, 2012-06-22
> + * Copyright: (C) 2012-2013 Linaro Limited
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +
> +#include <linux/linkage.h>
> +#include <asm/mcpm_entry.h>
> +
> +
> +#define SLAVE_SNOOPCTL_OFFSET 0
> +#define SNOOPCTL_SNOOP_ENABLE (1 << 0)
> +#define SNOOPCTL_DVM_ENABLE (1 << 1)
> +
> +#define CCI_STATUS_OFFSET 0xc
> +#define STATUS_CHANGE_PENDING (1 << 0)
> +
> +#define CCI_SLAVE_OFFSET(n) (0x1000 + 0x1000 * (n))
> +
> +#define RTSM_CCI_PHYS_BASE 0x2c090000
> +#define RTSM_CCI_SLAVE_A15 3
> +#define RTSM_CCI_SLAVE_A7 4
We need to remove these hardcoded values in due course as you know, I am
working on new code that allows us to match the CCI port address to
MPIDR on resume.
Lorenzo
^ permalink raw reply
* [PATCH 1/5] dmaengine: dw_dmac: move to generic DMA binding
From: Viresh Kumar @ 2013-01-29 10:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201301291035.30265.arnd@arndb.de>
On 29 January 2013 16:05, Arnd Bergmann <arnd@arndb.de> wrote:
> On Tuesday 29 January 2013, Viresh Kumar wrote:
>> Shouldn't this be 4? Would be better to mention what fields are these,
>> right here. I have seen them below though.
>
> Correct. I changed these a couple of times while trying to understand
> what the fields are, and I missed this instance. I'm still not sure
> whether we actually need all four fields, or what the simplest format
> for them would be. This just mirrors what you had in your binding.
You can add request_line number and leave first two fields, cfghi and lo.
>> > + /* FIXME: memory leak! could we put this into dw_dma_chan? */
>> > + sd = devm_kzalloc(dw->dma.dev, sizeof (*sd), GFP_KERNEL);
>>
>> Yes.
>
> Yes it can be in dw_dma_chan or yes it is a memory leak?
Yes it can be in dw_dma_chan :)
>> > + if (dma_spec->args_count != 4)
>>
>> args_count contains count of all params leaving the phandle?
>
> That was my interpretation from reading the code, but I have not tried it.
Okay, it was just a question from my side :)
>> > + /* FIXME: This binding is rather clumsy. Can't we use the
>> > + request line numbers here instead? */
>>
>> yes.
>
> Ok, Very good. What is the encoding of the registers then?
You can still keep fargs as is and just fill them as:
fargs.cfg_lo = 0;
if (DMA_TO_DEV)
// dest is periph
fargs.cfg_hi = be32_to_cpup(dma_spec->args+0) << 11;
else if (DEV_TO_DMA)
// src is periph
fargs.cfg_hi = be32_to_cpup(dma_spec->args+0) << 7;
The field size is 4 bits.
> Thanks a lot for the input. When I fix the above, are actually able
> to test the changes, or have you lost access to the hardware when
> leaving ST?
I don't have any sort of access for testing these :(
But, Vipul might try these at his end.
^ permalink raw reply
* [PATCH 1/5] dmaengine: dw_dmac: move to generic DMA binding
From: Arnd Bergmann @ 2013-01-29 10:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359445171.31148.30.camel@smile>
(putting back the Cc list, I assumed you dropped them accidentally)
On Tuesday 29 January 2013, Andy Shevchenko wrote:
> On Mon, 2013-01-28 at 21:58 +0000, Arnd Bergmann wrote:
> > - if ((last_dw == dw) && (last_bus_id == param))
> > + /* both the driver and the device must match */
> > + if (chan->device->dev->driver != &dw_driver.driver)
>
> Could we somehow pass the &.driver to the generic filter function (via
> *_dma_controller_register() ? ) and do this to each DMA driver?
My hope is still that we can avoid using filter functions entirely
when we use xlate() logic, and instead just go through the channels
of the dma engine we know we are looking at.
I would also assume that the argument passed to *_dma_controller_register
normally holds a pointer to the dma device. Now that I think about it,
the check 'if (dw != fargs->dw)' already implies that we are looking
at the correct driver, but it feels dirty to cast a random dma_device
pointer to a driver specific one before we know which driver it is
for.
However, since we have a valid pointer to a dw_dma object, we can
extract the driver from there:
struct dw_dma_filter_args *fargs = param;
struct dma_device *ddev = &fargs->dw->dma;
if (dma != chan->device)
return -EINVAL;
which is simpler and cleaner that what I had.
> > + sd->dma_dev = dw->dma.dev;
> > + sd->cfg_hi = fargs->cfg_hi;
> > + sd->cfg_lo = fargs->cfg_lo;
> > + sd->src_master = fargs->src;
> > + sd->dst_master = fargs->dst;
>
> Could we use fargs structure directly?
We could probably have no fargs but use the dw_dma_slave structure
directly to pass the data, if cannot figure out a way to avoid
the need for a filter function. I thought about doing that, but
intermediate versions of my patch had a different layout here.
Arnd
^ permalink raw reply
* [PATCH 1/5] dmaengine: dw_dmac: move to generic DMA binding
From: Andy Shevchenko @ 2013-01-29 10:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKohpo=rD9=dEaPkKYcj55K4_ebdnU7qjv2TZBUwqHAB+Kk+aw@mail.gmail.com>
On Tue, 2013-01-29 at 16:19 +0530, Viresh Kumar wrote:
> On 29 January 2013 16:05, Arnd Bergmann <arnd@arndb.de> wrote:
> > On Tuesday 29 January 2013, Viresh Kumar wrote:
> >> > + /* FIXME: This binding is rather clumsy. Can't we use the
> >> > + request line numbers here instead? */
> >>
> >> yes.
> >
> > Ok, Very good. What is the encoding of the registers then?
>
> You can still keep fargs as is and just fill them as:
>
> fargs.cfg_lo = 0;
>
> if (DMA_TO_DEV)
> // dest is periph
> fargs.cfg_hi = be32_to_cpup(dma_spec->args+0) << 11;
> else if (DEV_TO_DMA)
> // src is periph
> fargs.cfg_hi = be32_to_cpup(dma_spec->args+0) << 7;
We have macros for such shifts.
drivers/dma/dw_dmac.c:187: cfghi = DWC_CFGH_DST_PER(...
drivers/dma/dw_dmac.c:189: cfghi = DWC_CFGH_SRC_PER(...
--
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy
^ permalink raw reply
* [PATCH 1/5] dmaengine: dw_dmac: move to generic DMA binding
From: Viresh Kumar @ 2013-01-29 10:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359456886.31148.37.camel@smile>
On 29 January 2013 16:24, Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:
> On Tue, 2013-01-29 at 16:19 +0530, Viresh Kumar wrote:
>> if (DMA_TO_DEV)
>> // dest is periph
>> fargs.cfg_hi = be32_to_cpup(dma_spec->args+0) << 11;
>> else if (DEV_TO_DMA)
>> // src is periph
>> fargs.cfg_hi = be32_to_cpup(dma_spec->args+0) << 7;
>
> We have macros for such shifts.
>
> drivers/dma/dw_dmac.c:187: cfghi = DWC_CFGH_DST_PER(...
> drivers/dma/dw_dmac.c:189: cfghi = DWC_CFGH_SRC_PER(...
I am getting older now, bad memory :)
I grepped into drivers/dma/dw_dmac_regs.h and left include/linux/dw_dmac.h :(
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