* [PATCH v3 0/9] ARM: OMAP2+: AM33XX: Misc fixes/updates
From: Bedia, Vaibhav @ 2013-01-29 11:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5107B208.80005@ti.com>
On Tue, Jan 29, 2013 at 16:57:04, Shilimkar, Santosh wrote:
> Vaibhav,
>
> On Tuesday 29 January 2013 04:44 PM, Vaibhav Bedia wrote:
> > Hi,
> >
> > The following patches were earlier posted as part the AM33XX
> > suspend-resume support series [1]. Based on the suggestion
> > from Santosh Shilimkar <santosh.shilimkar@ti.com> i have split
> > out the changes which update the various data files related
> > to AM33XX support.
> >
> > These patches apply on top of v3.8-rc5
> >
> > v1->v2: Address the comments received from Sergei Shtylyov
> > and Peter Korsgaard.
> >
> > v2->v3: Address an additional comment from Peter Korgaard
> > and add his Acked-by to the patches
> >
> Just a suggestion here...
>
> I saw v2 of $subject series just today morning and in just
> few hours, I see v3 as well. You should at least let v2 settle
> down for a while :-)
> Collecting tags and minor update can always be done once you
> gather sufficient comments to warrant a re-spin.
>
OK. v1 has been in the wild for more than 10 days without any
more comments so I went aggressive on v3 :)
Regards,
Vaibhav
^ permalink raw reply
* [RFC] ARM: dma-mapping: Return 0 if no ->set_dma_mask()
From: Marek Szyprowski @ 2013-01-29 11:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130128.103320.355771370936761237.hdoyu@nvidia.com>
Hello,
On 1/28/2013 9:33 AM, Hiroshi Doyu wrote:
> struct dma_map_ops iommu_ops doesn't have ->set_dma_mask, which causes
> crash when dma_set_mask() is called from some driver.
I think that the issue is a bit different. It looks that iommu_ops lacks
the mandatory set_dma_mask callback. arm_dma_set_mask() can be used for it,
so please update your patch to add this missing callback.
> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
> ---
> arch/arm/include/asm/dma-mapping.h | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
> index a58e0f5..95328bf 100644
> --- a/arch/arm/include/asm/dma-mapping.h
> +++ b/arch/arm/include/asm/dma-mapping.h
> @@ -32,7 +32,11 @@ static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
>
> static inline int dma_set_mask(struct device *dev, u64 mask)
> {
> - return get_dma_ops(dev)->set_dma_mask(dev, mask);
> + struct dma_map_ops *ops = get_dma_ops(dev);
> +
> + if (ops->set_dma_mask)
> + return ops->set_dma_mask(dev, mask);
> + return 0;
> }
>
> #ifdef __arch_page_to_dma
Best regards
--
Marek Szyprowski
Samsung Poland R&D Center
^ permalink raw reply
* [PATCH v2 0/5] ARM: Manage the pl310 erratas in a dynamic way
From: Russell King - ARM Linux @ 2013-01-29 11:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130129101026.GA1063@bnru10>
On Tue, Jan 29, 2013 at 03:40:38PM +0530, srinidhi kasagar wrote:
> - Added l2x0_quirks to manage the errata in cpu_idle path. Tried to address
> Russell's comment on this, but could not completely. Because, neither I can
> keep the #ifdef CONFIG_PL310_ERRATA_769419 nor remove it entirely since
> the platform A suffers from this bug, whereas B do not but shares the same
> defconfig.
Yes you can and I covered this situation in my email. In that case,
you _define_ CONFIG_PL310_ERRATA_769419 such that the barrier _always_
gets included both both platforms.
As I already said, there is _no_ point making the barrier conditional;
it's probably more expensive to make it conditional than just to execute
it every time. But we still might as well optimize it away if we are
running _only_ on platforms which _do_ _not_ have that errata.
^ permalink raw reply
* [PATCH v3 0/9] ARM: OMAP2+: AM33XX: Misc fixes/updates
From: Santosh Shilimkar @ 2013-01-29 11:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359458108-8489-1-git-send-email-vaibhav.bedia@ti.com>
Vaibhav,
On Tuesday 29 January 2013 04:44 PM, Vaibhav Bedia wrote:
> Hi,
>
> The following patches were earlier posted as part the AM33XX
> suspend-resume support series [1]. Based on the suggestion
> from Santosh Shilimkar <santosh.shilimkar@ti.com> i have split
> out the changes which update the various data files related
> to AM33XX support.
>
> These patches apply on top of v3.8-rc5
>
> v1->v2: Address the comments received from Sergei Shtylyov
> and Peter Korsgaard.
>
> v2->v3: Address an additional comment from Peter Korgaard
> and add his Acked-by to the patches
>
Just a suggestion here...
I saw v2 of $subject series just today morning and in just
few hours, I see v3 as well. You should at least let v2 settle
down for a while :-)
Collecting tags and minor update can always be done once you
gather sufficient comments to warrant a re-spin.
Regards,
Santosh
^ permalink raw reply
* [PATCH, RFC] usb: add devicetree helpers for determining dr_mode and phy_type
From: Sascha Hauer @ 2013-01-29 11:22 UTC (permalink / raw)
To: linux-arm-kernel
From: Michael Grzeschik <m.grzeschik@pengutronix.de>
This adds two little devicetree helper functions for determining the
dr_mode (host, peripheral, otg) and phy_type (utmi, ulpi,...) from
the devicetree.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
The properties and their values have been taken from the fsl-mph-dr driver.
This binding is also documented (though currently not used) for the tegra
ehci driver (Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt).
This is a first attempt to parse these bindings at a common place so that
others can make use of it.
Basically I want to know whether this binding is recommended for new drivers
since normally the devicetree uses '-' instead of '_', and maybe there are
other problems with it.
I need this binding for the chipidea driver. I suspect that the fsl-mph-dr
driver also really handles a chipidea core.
Should we agree on this I would convert the fsl-mph-dr driver to use these
helpers.
Sascha
drivers/usb/core/Makefile | 1 +
drivers/usb/core/of.c | 76 +++++++++++++++++++++++++++++++++++++++++++++
include/linux/usb/of.h | 22 +++++++++++++
include/linux/usb/phy.h | 9 ++++++
4 files changed, 108 insertions(+)
create mode 100644 drivers/usb/core/of.c
create mode 100644 include/linux/usb/of.h
diff --git a/drivers/usb/core/Makefile b/drivers/usb/core/Makefile
index 26059b9..5378add 100644
--- a/drivers/usb/core/Makefile
+++ b/drivers/usb/core/Makefile
@@ -10,5 +10,6 @@ usbcore-y += devio.o notify.o generic.o quirks.o devices.o
usbcore-$(CONFIG_PCI) += hcd-pci.o
usbcore-$(CONFIG_ACPI) += usb-acpi.o
+usbcore-$(CONFIG_OF) += of.o
obj-$(CONFIG_USB) += usbcore.o
diff --git a/drivers/usb/core/of.c b/drivers/usb/core/of.c
new file mode 100644
index 0000000..d000d9f
--- /dev/null
+++ b/drivers/usb/core/of.c
@@ -0,0 +1,76 @@
+/*
+ * OF helpers for usb devices.
+ *
+ * This file is released under the GPLv2
+ *
+ * Initially copied out of drivers/of/of_net.c
+ */
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/usb/of.h>
+#include <linux/usb/phy.h>
+#include <linux/export.h>
+
+static const char *usbphy_modes[] = {
+ [USBPHY_INTERFACE_MODE_NA] = "",
+ [USBPHY_INTERFACE_MODE_UTMI] = "utmi",
+ [USBPHY_INTERFACE_MODE_UTMIW] = "utmi_wide",
+ [USBPHY_INTERFACE_MODE_ULPI] = "ulpi",
+ [USBPHY_INTERFACE_MODE_SERIAL] = "serial",
+ [USBPHY_INTERFACE_MODE_HSIC] = "hsic",
+};
+
+/**
+ * of_get_usbphy_mode - Get phy mode for given device_node
+ * @np: Pointer to the given device_node
+ *
+ * The function gets phy interface string from property 'phy_type',
+ * and returns the correspondig enum usb_phy_interface
+ */
+enum usb_phy_interface of_usb_get_phy_mode(struct device_node *np)
+{
+ const char *phy_type;
+ int err, i;
+
+ err = of_property_read_string(np, "phy_type", &phy_type);
+ if (err < 0)
+ return USBPHY_INTERFACE_MODE_NA;
+
+ for (i = 0; i < ARRAY_SIZE(usbphy_modes); i++)
+ if (!strcasecmp(phy_type, usbphy_modes[i]))
+ return i;
+
+ return USBPHY_INTERFACE_MODE_NA;
+}
+EXPORT_SYMBOL_GPL(of_usb_get_phy_mode);
+
+static const char *usb_dr_modes[] = {
+ [USB_DR_MODE_UNKNOWN] = "",
+ [USB_DR_MODE_HOST] = "host",
+ [USB_DR_MODE_PERIPHERAL] = "peripheral",
+ [USB_DR_MODE_OTG] = "otg",
+};
+
+/**
+ * of_usb_get_dr_mode - Get dual role mode for given device_node
+ * @np: Pointer to the given device_node
+ *
+ * The function gets phy interface string from property 'dr_mode',
+ * and returns the correspondig enum usb_phy_dr_mode
+ */
+enum usb_phy_dr_mode of_usb_get_dr_mode(struct device_node *np)
+{
+ const char *dr_mode;
+ int err, i;
+
+ err = of_property_read_string(np, "dr_mode", &dr_mode);
+ if (err < 0)
+ return USB_DR_MODE_UNKNOWN;
+
+ for (i = 0; i < ARRAY_SIZE(usb_dr_modes); i++)
+ if (!strcasecmp(dr_mode, usb_dr_modes[i]))
+ return i;
+
+ return USB_DR_MODE_UNKNOWN;
+}
+EXPORT_SYMBOL_GPL(of_usb_get_dr_mode);
diff --git a/include/linux/usb/of.h b/include/linux/usb/of.h
new file mode 100644
index 0000000..582ba96
--- /dev/null
+++ b/include/linux/usb/of.h
@@ -0,0 +1,22 @@
+/*
+ * OF helpers for usb devices.
+ *
+ * This file is released under the GPLv2
+ */
+
+#ifndef __LINUX_USB_OF_H
+#define __LINUX_USB_OF_H
+
+#include <linux/usb/phy.h>
+
+enum usb_phy_dr_mode {
+ USB_DR_MODE_UNKNOWN,
+ USB_DR_MODE_HOST,
+ USB_DR_MODE_PERIPHERAL,
+ USB_DR_MODE_OTG,
+};
+
+enum usb_phy_interface of_usb_get_phy_mode(struct device_node *np);
+enum usb_phy_dr_mode of_usb_get_dr_mode(struct device_node *np);
+
+#endif /* __LINUX_USB_OF_H */
diff --git a/include/linux/usb/phy.h b/include/linux/usb/phy.h
index a29ae1e..c5154cf 100644
--- a/include/linux/usb/phy.h
+++ b/include/linux/usb/phy.h
@@ -12,6 +12,15 @@
#include <linux/notifier.h>
#include <linux/usb.h>
+enum usb_phy_interface {
+ USBPHY_INTERFACE_MODE_NA,
+ USBPHY_INTERFACE_MODE_UTMI,
+ USBPHY_INTERFACE_MODE_UTMIW,
+ USBPHY_INTERFACE_MODE_ULPI,
+ USBPHY_INTERFACE_MODE_SERIAL,
+ USBPHY_INTERFACE_MODE_HSIC,
+};
+
enum usb_phy_events {
USB_EVENT_NONE, /* no events or cable disconnected */
USB_EVENT_VBUS, /* vbus valid event */
--
1.7.10.4
^ permalink raw reply related
* [PATCH 1/5] dmaengine: dw_dmac: move to generic DMA binding
From: Russell King - ARM Linux @ 2013-01-29 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201301291050.23743.arnd@arndb.de>
On Tue, Jan 29, 2013 at 10:50:23AM +0000, Arnd Bergmann wrote:
> (putting back the Cc list, I assumed you dropped them accidentally)
That'll be why I don't have a copy of Andy's email to reply to.
> On Tuesday 29 January 2013, Andy Shevchenko wrote:
> > On Mon, 2013-01-28 at 21:58 +0000, Arnd Bergmann wrote:
> > > - if ((last_dw == dw) && (last_bus_id == param))
> > > + /* both the driver and the device must match */
> > > + if (chan->device->dev->driver != &dw_driver.driver)
> >
> > Could we somehow pass the &.driver to the generic filter function (via
> > *_dma_controller_register() ? ) and do this to each DMA driver?
How, and what driver gets passed?
> My hope is still that we can avoid using filter functions entirely
> when we use xlate() logic, and instead just go through the channels
> of the dma engine we know we are looking at.
Has anyone yet determined whether any of these new DMA engine slave APIs
are usable for implementations which have a separate MUX between the
DMA engine and the DMA peripheral?
^ permalink raw reply
* [PATCH] ARM:common: setting saved_state to NULL after kfree
From: Russell King - ARM Linux @ 2013-01-29 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5107AE6F.3080206@asianux.com>
On Tue, Jan 29, 2013 at 07:11:43PM +0800, Chen Gang wrote:
> need set NULL before return, just like function sa1111_remove has done.
> and better to use sa1111_remove directly, instead of current implementation.
NAK.
1. __sa1111_remove() will kfree sachip, so the value of sachip->saved_state
at this point is meaningless.
2. I don't think you tried to build with your patch in place.
^ permalink raw reply
* [PATCH v3 9/9] ARM: OMAP2+: AM33XX: control: Add some control module registers and APIs
From: Vaibhav Bedia @ 2013-01-29 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359458108-8489-1-git-send-email-vaibhav.bedia@ti.com>
Add minimal APIs for writing to the IPC and the M3_TXEV registers
in the Control module. These will be used in a subsequent patch which
adds suspend-resume support for AM33XX.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/control.c | 20 ++++++++++++++++++++
arch/arm/mach-omap2/control.h | 41 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 61 insertions(+)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 2adb268..c5d54ae 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -604,3 +604,23 @@ int omap3_ctrl_save_padconf(void)
}
#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */
+
+#if defined(CONFIG_SOC_AM33XX) && defined(CONFIG_PM)
+void am33xx_txev_eoi(void)
+{
+ omap_ctrl_writel(AM33XX_M3_TXEV_ACK, AM33XX_CONTROL_M3_TXEV_EOI);
+}
+
+void am33xx_txev_enable(void)
+{
+ omap_ctrl_writel(AM33XX_M3_TXEV_ENABLE, AM33XX_CONTROL_M3_TXEV_EOI);
+}
+
+void am33xx_wkup_m3_ipc_cmd(struct am33xx_ipc_data *data)
+{
+ omap_ctrl_writel(data->resume_addr, AM33XX_CONTROL_IPC_MSG_REG0);
+ omap_ctrl_writel(data->sleep_mode, AM33XX_CONTROL_IPC_MSG_REG1);
+ omap_ctrl_writel(data->param1, AM33XX_CONTROL_IPC_MSG_REG2);
+ omap_ctrl_writel(data->param2, AM33XX_CONTROL_IPC_MSG_REG3);
+}
+#endif /* CONFIG_SOC_AM33XX && CONFIG_PM */
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index e6c3281..cb85f0a 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -358,6 +358,37 @@
#define AM33XX_CONTROL_STATUS_SYSBOOT1_WIDTH 0x2
#define AM33XX_CONTROL_STATUS_SYSBOOT1_MASK (0x3 << 22)
+#define AM33XX_DDR_IO_CTRL 0x0E04
+#define AM33XX_VTP0_CTRL_REG 0x0E0C
+
+/* AM33XX VTP0_CTRL_REG bits */
+#define AM33XX_VTP_CTRL_START_EN (1 << 0)
+#define AM33XX_VTP_CTRL_LOCK_EN (1 << 4)
+#define AM33XX_VTP_CTRL_READY (1 << 5)
+#define AM33XX_VTP_CTRL_ENABLE (1 << 6)
+
+/* AM33XX M3_TXEV_EOI register */
+#define AM33XX_CONTROL_M3_TXEV_EOI 0x1324
+
+#define AM33XX_M3_TXEV_ACK (0x1 << 0)
+#define AM33XX_M3_TXEV_ENABLE (0x0 << 0)
+
+/* AM33XX IPC message registers */
+#define AM33XX_CONTROL_IPC_MSG_REG0 0x1328
+#define AM33XX_CONTROL_IPC_MSG_REG1 0x132C
+#define AM33XX_CONTROL_IPC_MSG_REG2 0x1330
+#define AM33XX_CONTROL_IPC_MSG_REG3 0x1334
+#define AM33XX_CONTROL_IPC_MSG_REG4 0x1338
+#define AM33XX_CONTROL_IPC_MSG_REG5 0x133C
+#define AM33XX_CONTROL_IPC_MSG_REG6 0x1340
+#define AM33XX_CONTROL_IPC_MSG_REG7 0x1344
+
+#define AM33XX_DDR_CMD0_IOCTRL 0x1404
+#define AM33XX_DDR_CMD1_IOCTRL 0x1408
+#define AM33XX_DDR_CMD2_IOCTRL 0x140C
+#define AM33XX_DDR_DATA0_IOCTRL 0x1440
+#define AM33XX_DDR_DATA1_IOCTRL 0x1444
+
/* CONTROL OMAP STATUS register to identify OMAP3 features */
#define OMAP3_CONTROL_OMAP_STATUS 0x044c
@@ -417,6 +448,16 @@ extern void omap3630_ctrl_disable_rta(void);
extern int omap3_ctrl_save_padconf(void);
extern void omap2_set_globals_control(void __iomem *ctrl,
void __iomem *ctrl_pad);
+struct am33xx_ipc_data {
+ u32 resume_addr;
+ u32 param1;
+ u32 param2;
+ u32 sleep_mode;
+};
+extern void am33xx_wkup_m3_ipc_cmd(struct am33xx_ipc_data *data);
+extern void am33xx_txev_eoi(void);
+extern void am33xx_txev_enable(void);
+
#else
#define omap_ctrl_base_get() 0
#define omap_ctrl_readb(x) 0
--
1.8.1
^ permalink raw reply related
* [PATCH v3 8/9] ARM: DTS: AM33XX: Add nodes for OCMC RAM and WKUP-M3
From: Vaibhav Bedia @ 2013-01-29 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359458108-8489-1-git-send-email-vaibhav.bedia@ti.com>
Since AM33XX supports only DT-boot, this is needed
for the appropriate device nodes to be created.
Note: OCMC RAM is part of the PER power domain and supports
retention. The assembly code for low power entry/exit will
run from OCMC RAM. To ensure that the OMAP PM code does not
attempt to disable the clock to OCMC RAM as part of the
suspend process add the no_idle_on_suspend flag.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
---
v3: Update the compatible field as mentioned by Peter and his Acked-by
v2: Add reg property
arch/arm/boot/dts/am33xx.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index c2f14e8..0957645 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -385,5 +385,19 @@
mac-address = [ 00 00 00 00 00 00 ];
};
};
+
+ ocmcram: ocmcram at 40300000 {
+ compatible = "ti,am3352-ocmcram";
+ reg = <0x40300000 0x10000>;
+ ti,hwmods = "ocmcram";
+ ti,no_idle_on_suspend;
+ };
+
+ wkup_m3: wkup_m3 at 44d00000 {
+ compatible = "ti,am3353-wkup-m3";
+ reg = <0x44d00000 0x4000 /* M3 UMEM */
+ 0x44d80000 0x2000>; /* M3 DMEM */
+ ti,hwmods = "wkup_m3";
+ };
};
};
--
1.8.1
^ permalink raw reply related
* [PATCH v3 7/9] ARM: OMAP2+: AM33XX: Update the hardreset API
From: Vaibhav Bedia @ 2013-01-29 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359458108-8489-1-git-send-email-vaibhav.bedia@ti.com>
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the hardreset API to ensure that the reset line properly
deasserted.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/omap_hwmod.c | 5 +----
arch/arm/mach-omap2/prm33xx.c | 11 +++++++----
arch/arm/mach-omap2/prm33xx.h | 2 +-
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 4653efb..6549439 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -3041,11 +3041,8 @@ static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri)
{
- if (ohri->st_shift)
- pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
- oh->name, ohri->name);
-
return am33xx_prm_deassert_hardreset(ohri->rst_shift,
+ ohri->st_shift,
oh->clkdm->pwrdm.ptr->prcm_offs,
oh->prcm.omap4.rstctrl_offs,
oh->prcm.omap4.rstst_offs);
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 1ac7388..44c0d72 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -110,11 +110,11 @@ int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs)
* -EINVAL upon an argument error, -EEXIST if the submodule was already out
* of reset, or -EBUSY if the submodule did not exit reset promptly.
*/
-int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
+int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
u16 rstctrl_offs, u16 rstst_offs)
{
int c;
- u32 mask = 1 << shift;
+ u32 mask = 1 << st_shift;
/* Check the current status to avoid de-asserting the line twice */
if (am33xx_prm_is_hardreset_asserted(shift, inst, rstctrl_offs) == 0)
@@ -122,11 +122,14 @@ int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
/* Clear the reset status by writing 1 to the status bit */
am33xx_prm_rmw_reg_bits(0xffffffff, mask, inst, rstst_offs);
+
/* de-assert the reset control line */
+ mask = 1 << shift;
+
am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs);
- /* wait the status to be set */
- omap_test_timeout(am33xx_prm_is_hardreset_asserted(shift, inst,
+ /* wait the status to be set */
+ omap_test_timeout(am33xx_prm_is_hardreset_asserted(st_shift, inst,
rstst_offs),
MAX_MODULE_HARDRESET_WAIT, c);
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 1c40373..9b9918d 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -125,7 +125,7 @@ extern void am33xx_prm_global_warm_sw_reset(void);
extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
u16 rstctrl_offs);
extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs);
-extern int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
+extern int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
u16 rstctrl_offs, u16 rstst_offs);
#endif /* ASSEMBLER */
#endif
--
1.8.1
^ permalink raw reply related
* [PATCH v3 6/9] ARM: OMAP2+: AM33XX: hwmod: Update the WKUP-M3 hwmod with reset status bit
From: Vaibhav Bedia @ 2013-01-29 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359458108-8489-1-git-send-email-vaibhav.bedia@ti.com>
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the WKUP-M3 hwmod data to reflect the same.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 40bfde3..9e34d4c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -269,6 +269,7 @@ static struct omap_hwmod am33xx_wkup_m3_hwmod = {
.omap4 = {
.clkctrl_offs = AM33XX_CM_WKUP_WKUP_M3_CLKCTRL_OFFSET,
.rstctrl_offs = AM33XX_RM_WKUP_RSTCTRL_OFFSET,
+ .rstst_offs = AM33XX_RM_WKUP_RSTST_OFFSET,
.modulemode = MODULEMODE_SWCTRL,
},
},
--
1.8.1
^ permalink raw reply related
* [PATCH v3 5/9] ARM: OMAP2+: AM33XX: hwmod: Fixup cpgmac0 hwmod entry
From: Vaibhav Bedia @ 2013-01-29 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359458108-8489-1-git-send-email-vaibhav.bedia@ti.com>
The current HWMOD code expects the memory region with
the IP's SYSCONFIG register to be marked with ADDR_TYPE_RT
flag.
CPGMAC0 hwmod entry specifies two memory regions and marks
both with the flag ADDR_TYPE_RT although only the 2nd region
has the SYSCONFIG register. This leads to the HWMOD code
accessing the wrong memory address for idle and standby
operations. Fix this by removing the ADDR_TYPE_RT flag from
the 1st memory region in CPGMAC0 hwmod entry.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 94254e8..40bfde3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -2496,7 +2496,6 @@ static struct omap_hwmod_addr_space am33xx_cpgmac0_addr_space[] = {
{
.pa_start = 0x4a100000,
.pa_end = 0x4a100000 + SZ_2K - 1,
- .flags = ADDR_TYPE_RT,
},
/* cpsw wr */
{
--
1.8.1
^ permalink raw reply related
* [PATCH v3 4/9] ARM: OMAP2+: AM33XX: hwmod: Update TPTC0 hwmod with the right flags
From: Vaibhav Bedia @ 2013-01-29 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359458108-8489-1-git-send-email-vaibhav.bedia@ti.com>
Third Party Transfer Controller (TPTC0) needs to be idled and
put to standby under SW control. Add the appropriate flags in
the TPTC0 hwmod entry.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
---
v3: Add Peter's Acked-by
v2: Drop unnecessary parens
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 8280f11..94254e8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -1823,6 +1823,7 @@ static struct omap_hwmod am33xx_tptc0_hwmod = {
.class = &am33xx_tptc_hwmod_class,
.clkdm_name = "l3_clkdm",
.mpu_irqs = am33xx_tptc0_irqs,
+ .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
.main_clk = "l3_gclk",
.prcm = {
.omap4 = {
--
1.8.1
^ permalink raw reply related
* [PATCH v3 3/9] ARM: OMAP2+: AM33XX: hwmod: Register OCMC RAM hwmod
From: Vaibhav Bedia @ 2013-01-29 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359458108-8489-1-git-send-email-vaibhav.bedia@ti.com>
OCMC RAM lies in the PER power domain and this memory
support retention.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 47 +++++++++++++++++-------------
1 file changed, 27 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 646c14d..8280f11 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -414,7 +414,6 @@ static struct omap_hwmod am33xx_adc_tsc_hwmod = {
* - cEFUSE (doesn't fall under any ocp_if)
* - clkdiv32k
* - debugss
- * - ocmc ram
* - ocp watch point
* - aes0
* - sha0
@@ -481,25 +480,6 @@ static struct omap_hwmod am33xx_debugss_hwmod = {
},
};
-/* ocmcram */
-static struct omap_hwmod_class am33xx_ocmcram_hwmod_class = {
- .name = "ocmcram",
-};
-
-static struct omap_hwmod am33xx_ocmcram_hwmod = {
- .name = "ocmcram",
- .class = &am33xx_ocmcram_hwmod_class,
- .clkdm_name = "l3_clkdm",
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
- .main_clk = "l3_gclk",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
/* ocpwp */
static struct omap_hwmod_class am33xx_ocpwp_hwmod_class = {
.name = "ocpwp",
@@ -570,6 +550,25 @@ static struct omap_hwmod am33xx_sha0_hwmod = {
#endif
+/* ocmcram */
+static struct omap_hwmod_class am33xx_ocmcram_hwmod_class = {
+ .name = "ocmcram",
+};
+
+static struct omap_hwmod am33xx_ocmcram_hwmod = {
+ .name = "ocmcram",
+ .class = &am33xx_ocmcram_hwmod_class,
+ .clkdm_name = "l3_clkdm",
+ .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+ .main_clk = "l3_gclk",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
/* 'smartreflex' class */
static struct omap_hwmod_class am33xx_smartreflex_hwmod_class = {
.name = "smartreflex",
@@ -3328,6 +3327,13 @@ static struct omap_hwmod_ocp_if am33xx_l3_s__usbss = {
.flags = OCPIF_SWSUP_IDLE,
};
+/* l3 main -> ocmc */
+static struct omap_hwmod_ocp_if am33xx_l3_main__ocmc = {
+ .master = &am33xx_l3_main_hwmod,
+ .slave = &am33xx_ocmcram_hwmod,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
&am33xx_l4_fw__emif_fw,
&am33xx_l3_main__emif,
@@ -3398,6 +3404,7 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
&am33xx_l3_main__tptc0,
&am33xx_l3_main__tptc1,
&am33xx_l3_main__tptc2,
+ &am33xx_l3_main__ocmc,
&am33xx_l3_s__usbss,
&am33xx_l4_hs__cpgmac0,
&am33xx_cpgmac0__mdio,
--
1.8.1
^ permalink raw reply related
* [PATCH v3 2/9] ARM: OMAP2+: AM33XX: CM/PRM: Use __ASSEMBLER__ macros in header files
From: Vaibhav Bedia @ 2013-01-29 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359458108-8489-1-git-send-email-vaibhav.bedia@ti.com>
This is necessary to ensure that macros declared here can
be reused from assembly files.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/cm33xx.h | 2 ++
arch/arm/mach-omap2/prm33xx.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 8009e13..64f4baf 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -376,6 +376,7 @@
#define AM33XX_CM_CEFUSE_CEFUSE_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_CEFUSE_MOD, 0x0020)
+#ifndef __ASSEMBLER__
extern bool am33xx_cm_is_clkdm_in_hwsup(s16 inst, u16 cdoffs);
extern void am33xx_cm_clkdm_enable_hwsup(s16 inst, u16 cdoffs);
extern void am33xx_cm_clkdm_disable_hwsup(s16 inst, u16 cdoffs);
@@ -412,4 +413,5 @@ static inline int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs,
}
#endif
+#endif /* ASSEMBLER */
#endif
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 3f25c56..1c40373 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -117,6 +117,7 @@
#define AM33XX_PM_CEFUSE_PWRSTST_OFFSET 0x0004
#define AM33XX_PM_CEFUSE_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
+#ifndef __ASSEMBLER__
extern u32 am33xx_prm_read_reg(s16 inst, u16 idx);
extern void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx);
extern u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
@@ -126,4 +127,5 @@ extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs);
extern int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
u16 rstctrl_offs, u16 rstst_offs);
+#endif /* ASSEMBLER */
#endif
--
1.8.1
^ permalink raw reply related
* [PATCH v3 1/9] ARM: OMAP2+: AM33XX: CM: Get rid of unnecessary header inclusions
From: Vaibhav Bedia @ 2013-01-29 11:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359458108-8489-1-git-send-email-vaibhav.bedia@ti.com>
cm33xx.h unnecessarily includes a lot of header files.
Get rid of these and directly include "iomap.h" which
is needed to keep things compiling.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
---
v3: Add Peter's Acked-by
v2: Reword the changelog
arch/arm/mach-omap2/cm33xx.h | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 5fa0b62..8009e13 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -17,16 +17,11 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CM_33XX_H
#define __ARCH_ARM_MACH_OMAP2_CM_33XX_H
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/io.h>
-
#include "common.h"
#include "cm.h"
#include "cm-regbits-33xx.h"
-#include "cm33xx.h"
+#include "iomap.h"
/* CM base address */
#define AM33XX_CM_BASE 0x44e00000
--
1.8.1
^ permalink raw reply related
* [PATCH v3 0/9] ARM: OMAP2+: AM33XX: Misc fixes/updates
From: Vaibhav Bedia @ 2013-01-29 11:14 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
The following patches were earlier posted as part the AM33XX
suspend-resume support series [1]. Based on the suggestion
from Santosh Shilimkar <santosh.shilimkar@ti.com> i have split
out the changes which update the various data files related
to AM33XX support.
These patches apply on top of v3.8-rc5
v1->v2: Address the comments received from Sergei Shtylyov
and Peter Korsgaard.
v2->v3: Address an additional comment from Peter Korgaard
and add his Acked-by to the patches
Regards,
Vaibhav
[1] http://marc.info/?l=linux-arm-kernel&m=135698501821074&w=2
Vaibhav Bedia (9):
ARM: OMAP2+: AM33XX: CM: Get rid of unnecessary header inclusions
ARM: OMAP2+: AM33XX: CM/PRM: Use __ASSEMBLER__ macros in header files
ARM: OMAP2+: AM33XX: hwmod: Register OCMC RAM hwmod
ARM: OMAP2+: AM33XX: hwmod: Update TPTC0 hwmod with the right flags
ARM: OMAP2+: AM33XX: hwmod: Fixup cpgmac0 hwmod entry
ARM: OMAP2+: AM33XX: hwmod: Update the WKUP-M3 hwmod with reset status
bit
ARM: OMAP2+: AM33XX: Update the hardreset API
ARM: DTS: AM33XX: Add nodes for OCMC RAM and WKUP-M3
ARM: OMAP2+: AM33XX: control: Add some control module registers and
APIs
arch/arm/boot/dts/am33xx.dtsi | 14 +++++++++
arch/arm/mach-omap2/cm33xx.h | 9 ++----
arch/arm/mach-omap2/control.c | 20 ++++++++++++
arch/arm/mach-omap2/control.h | 41 ++++++++++++++++++++++++
arch/arm/mach-omap2/omap_hwmod.c | 5 +--
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 50 +++++++++++++++++-------------
arch/arm/mach-omap2/prm33xx.c | 11 ++++---
arch/arm/mach-omap2/prm33xx.h | 4 ++-
8 files changed, 118 insertions(+), 36 deletions(-)
--
1.8.1
^ permalink raw reply
* [PATCH 1/5] dmaengine: dw_dmac: move to generic DMA binding
From: Andy Shevchenko @ 2013-01-29 11:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKohpokZfQZ17PmQjS2ntN9js7=SxNkiwWpX2aD8cZcM9L0ydw@mail.gmail.com>
On Tue, 2013-01-29 at 16:27 +0530, Viresh Kumar wrote:
> On 29 January 2013 16:24, Andy Shevchenko
> <andriy.shevchenko@linux.intel.com> wrote:
> > On Tue, 2013-01-29 at 16:19 +0530, Viresh Kumar wrote:
> >> if (DMA_TO_DEV)
> >> // dest is periph
> >> fargs.cfg_hi = be32_to_cpup(dma_spec->args+0) << 11;
> >> else if (DEV_TO_DMA)
> >> // src is periph
> >> fargs.cfg_hi = be32_to_cpup(dma_spec->args+0) << 7;
> >
> > We have macros for such shifts.
> >
> > drivers/dma/dw_dmac.c:187: cfghi = DWC_CFGH_DST_PER(...
> > drivers/dma/dw_dmac.c:189: cfghi = DWC_CFGH_SRC_PER(...
>
> I am getting older now, bad memory :)
> I grepped into drivers/dma/dw_dmac_regs.h and left include/linux/dw_dmac.h :(
Moreover the excerpt I showed from dw_dmac.c is the same piece of code
you wrote above as a sample.
--
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy
^ permalink raw reply
* [PATCH v5 04/45] percpu_rwlock: Implement the core design of Per-CPU Reader-Writer Locks
From: Namhyung Kim @ 2013-01-29 11:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5100B8CC.4080406@linux.vnet.ibm.com>
On Thu, 24 Jan 2013 10:00:04 +0530, Srivatsa S. Bhat wrote:
> On 01/24/2013 01:27 AM, Tejun Heo wrote:
>> On Thu, Jan 24, 2013 at 01:03:52AM +0530, Srivatsa S. Bhat wrote:
>>> CPU 0 CPU 1
>>>
>>> read_lock(&rwlock)
>>>
>>> write_lock(&rwlock) //spins, because CPU 0
>>> //has acquired the lock for read
>>>
>>> read_lock(&rwlock)
>>> ^^^^^
>>> What happens here? Does CPU 0 start spinning (and hence deadlock) or will
>>> it continue realizing that it already holds the rwlock for read?
>>
>> I don't think rwlock allows nesting write lock inside read lock.
>> read_lock(); write_lock() will always deadlock.
>>
>
> Sure, I understand that :-) My question was, what happens when *two* CPUs
> are involved, as in, the read_lock() is invoked only on CPU 0 whereas the
> write_lock() is invoked on CPU 1.
>
> For example, the same scenario shown above, but with slightly different
> timing, will NOT result in a deadlock:
>
> Scenario 2:
> CPU 0 CPU 1
>
> read_lock(&rwlock)
>
>
> read_lock(&rwlock) //doesn't spin
>
> write_lock(&rwlock) //spins, because CPU 0
> //has acquired the lock for read
>
>
> So I was wondering whether the "fairness" logic of rwlocks would cause
> the second read_lock() to spin (in the first scenario shown above) because
> a writer is already waiting (and hence new readers should spin) and thus
> cause a deadlock.
In my understanding, current x86 rwlock does basically this (of course,
in an atomic fashion):
#define RW_LOCK_BIAS 0x10000
rwlock_init(rwlock)
{
rwlock->lock = RW_LOCK_BIAS;
}
arch_read_lock(rwlock)
{
retry:
if (--rwlock->lock >= 0)
return;
rwlock->lock++;
while (rwlock->lock < 1)
continue;
goto retry;
}
arch_write_lock(rwlock)
{
retry:
if ((rwlock->lock -= RW_LOCK_BIAS) == 0)
return;
rwlock->lock += RW_LOCK_BIAS;
while (rwlock->lock != RW_LOCK_BIAS)
continue;
goto retry;
}
So I can't find where the 'fairness' logic comes from..
Thanks,
Namhyung
^ permalink raw reply
* [PATCH] ARM:common: setting saved_state to NULL after kfree
From: Chen Gang @ 2013-01-29 11:11 UTC (permalink / raw)
To: linux-arm-kernel
need set NULL before return, just like function sa1111_remove has done.
and better to use sa1111_remove directly, instead of current implementation.
Signed-off-by: Chen Gang <gang.chen@asianux.com>
---
arch/arm/common/sa1111.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index e57d7e5..4bb8230 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -954,9 +954,7 @@ static int sa1111_resume(struct platform_device *dev)
*/
id = sa1111_readl(sachip->base + SA1111_SKID);
if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
- __sa1111_remove(sachip);
- platform_set_drvdata(dev, NULL);
- kfree(save);
+ sa1111_remove(dev);
return 0;
}
--
1.7.10.4
^ permalink raw reply related
* [PATCH v3 15/31] arm64: SMP support
From: Catalin Marinas @ 2013-01-29 11:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CALZhoSTsmmsBgT2CtpC1uN9DQM5NTftA024FsyRitCFhPa7LpQ@mail.gmail.com>
On Mon, Jan 28, 2013 at 02:46:53AM +0000, Lei Wen wrote:
> On Sat, Sep 8, 2012 at 12:26 AM, Catalin Marinas <catalin.marinas at arm.com<mailto:catalin.marinas@arm.com>> wrote:
> > This patch adds SMP initialisation and spinlocks implementation for
> > AArch64. The spinlock support uses the new load-acquire/store-release
> > instructions to avoid explicit barriers. The architecture also specifies
> > that an event is automatically generated when clearing the exclusive
> > monitor state to wake up processors in WFE, so there is no need for an
> > explicit DSB/SEV instruction sequence. The SEVL instruction is used to
> > set the exclusive monitor locally as there is no conditional WFE and a
> > branch is more expensive.
> >
> > For the SMP booting protocol, see Documentation/arm64/booting.txt.
> >
> > Signed-off-by: Will Deacon <will.deacon at arm.com<mailto:will.deacon@arm.com>>
> > Signed-off-by: Marc Zyngier <marc.zyngier at arm.com<mailto:marc.zyngier@arm.com>>
> > Signed-off-by: Catalin Marinas <catalin.marinas at arm.com<mailto:catalin.marinas@arm.com>>
> > Acked-by: Arnd Bergmann <arnd at arndb.de<mailto:arnd@arndb.de>>
> > Acked-by: Tony Lindgren <tony at atomide.com<mailto:tony@atomide.com>>
> > ---
> > arch/arm64/include/asm/hardirq.h | 5 +
> > arch/arm64/include/asm/smp.h | 69 +++++
> > arch/arm64/include/asm/spinlock.h | 202 +++++++++++++
> > arch/arm64/include/asm/spinlock_types.h | 38 +++
> > arch/arm64/kernel/smp.c | 469 +++++++++++++++++++++++++++++++
> > 5 files changed, 783 insertions(+), 0 deletions(-)
> > create mode 100644 arch/arm64/include/asm/smp.h
> > create mode 100644 arch/arm64/include/asm/spinlock.h
> > create mode 100644 arch/arm64/include/asm/spinlock_types.h
> > create mode 100644 arch/arm64/kernel/smp.c
> >
> [snip...]
> > +static inline void arch_spin_lock(arch_spinlock_t *lock)
> > +{
> > + unsigned int tmp;
> > +
> > + asm volatile(
> > + " sevl\n"
> > + "1: wfe\n"
> > + "2: ldaxr %w0, [%1]\n"
> > + " cbnz %w0, 1b\n"
> > + " stxr %w0, %w2, [%1]\n"
> > + " cbnz %w0, 2b\n"
> > + : "=&r" (tmp)
> > + : "r" (&lock->lock), "r" (1)
> > + : "memory");
>
> Why just put "memory" attribute here is enough for keep lock variable
> being updated around multi-cores? I check the original spinlock we use
> in bit32 machine: arch/arm/include/asm/spinlock.h It actually use
> smp_mb after successfully acquire that lock, so we don't need it for
> arm64? Or if it is true that we don't need it in arm64, could we also
> eliminate the smp_mb usage in arm32?
We need the smp_mb (which is a dmb instruction) on AArch32 (ARMv6/v7
instruction set). For AArch64 we have load-acquire and store-release
instructions (lda*, stl*) which act as half-barriers. In the
arch_spin_lock function above we have a ldaxr which prevents any memory
accesses inside the locked region to be observed before this
instruction. The unlock is done with a stlr instructions which prevents
any memory accesses inside the locked region to be observed after this
instruction.
--
Catalin
^ permalink raw reply
* [PATCH v2] ARM: mxs: gpio-mxs: Add IRQ_TYPE_EDGE_BOTH support
From: Linus Walleij @ 2013-01-29 11:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359447393-2570-1-git-send-email-gwenhael.goavec-merou@armadeus.com>
On Tue, Jan 29, 2013 at 9:16 AM, Gwenhael Goavec-Merou
<gwenhael.goavec-merou@armadeus.com> wrote:
> This patch adds support for IRQ_TYPE_EDGE_BOTH needed for some driver
> (gpio-keys).
> Inspired from gpio-mxc.c
>
> Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Applied, but I changed the subject to "gpio: mxs: ..."
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v2] mm: dmapool: use provided gfp flags for all dma_alloc_coherent() calls
From: Andrew Lunn @ 2013-01-29 11:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5106E6A6.7010207@web.de>
> Now I activated the debug messages in em28xx. From the messages I
> see no correlation of the pool exhaustion and lost sync. Also I
> cannot see any error messages from the em28xx driver.
> I see a lot of init_isoc/stop_urbs (maybe EPG scan?) without
> draining the coherent pool (checked with 'cat
> /debug/dma-api/num_free_entries', which gave stable numbers), but
> after half an hour there are only init_isoc messages without
> corresponding stop_urbs messages and num_free_entries decreased
> until coherent pool exhaustion.
Hi Soeren
em28xx_stop_urbs() is only called by em28xx_stop_streaming().
em28xx_stop_streaming() is only called by em28xx_stop_feed()
when 0 == dvb->nfeeds.
em28xx_stop_feed()and em28xx_start_feed() look O.K, dvb->nfeeds is
protected by a mutex etc.
Now, em28xx_init_isoc() is also called by buffer_prepare(). This uses
em28xx_alloc_isoc() to do the actual allocation, and that function
sets up the urb such that on completion the function
em28xx_irq_callback() is called.
It looks like there might be issues here:
Once the data has been copied out, it resubmits the urb:
urb->status = usb_submit_urb(urb, GFP_ATOMIC);
if (urb->status) {
em28xx_isocdbg("urb resubmit failed (error=%i)\n",
urb->status);
}
However, if the ubs_submit_urb fails, it looks like the urb is lost.
If you look at other code submitting urbs you have this pattern:
rc = usb_submit_urb(isoc_bufs->urb[i], GFP_ATOMIC);
if (rc) {
em28xx_err("submit of urb %i failed (error=%i)\n", i,
rc);
em28xx_uninit_isoc(dev, mode);
return rc;
}
Do you have your build such that you would see "urb resubmit failed"
in your logs? Are there any?
Andrew
^ permalink raw reply
* [PATCH V2 1/6] pinctrl: pinctrl-single: use arch_initcall and module_exit
From: Linus Walleij @ 2013-01-29 10:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359445134-13323-2-git-send-email-manishv.b@ti.com>
On Tue, Jan 29, 2013 at 8:38 AM, Vishwanathrao Badarkhe, Manish
<manishv.b@ti.com> wrote:
> Currently, I2C driver gets probed before pinctrl driver.
> To achieve I2C pin muxing via pinctrl driver before I2C
> probe get called, register pinctrl driver in arch_initcall.
> Also, add module_exit to unregister pinctrl driver.
>
> Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
So your I2C driver is not returning -EPROBE_DEFER
if it cannot find its pins?
Hm, well I can live with this, if Tony ACKs it.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH 1/5] dmaengine: dw_dmac: move to generic DMA binding
From: Viresh Kumar @ 2013-01-29 10:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359456886.31148.37.camel@smile>
On 29 January 2013 16:24, Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:
> On Tue, 2013-01-29 at 16:19 +0530, Viresh Kumar wrote:
>> if (DMA_TO_DEV)
>> // dest is periph
>> fargs.cfg_hi = be32_to_cpup(dma_spec->args+0) << 11;
>> else if (DEV_TO_DMA)
>> // src is periph
>> fargs.cfg_hi = be32_to_cpup(dma_spec->args+0) << 7;
>
> We have macros for such shifts.
>
> drivers/dma/dw_dmac.c:187: cfghi = DWC_CFGH_DST_PER(...
> drivers/dma/dw_dmac.c:189: cfghi = DWC_CFGH_SRC_PER(...
I am getting older now, bad memory :)
I grepped into drivers/dma/dw_dmac_regs.h and left include/linux/dw_dmac.h :(
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox