* [PATCH 4/5] net: mvmdio: allow Device Tree and platform device to coexist
From: Florian Fainelli @ 2013-01-29 20:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130129175912.GE25646@obsidianresearch.com>
Le mardi 29 janvier 2013 18:59:12, Jason Gunthorpe a ?crit :
> On Tue, Jan 29, 2013 at 04:24:07PM +0100, Florian Fainelli wrote:
> > - dev->err_interrupt = irq_of_parse_and_map(pdev->dev.of_node, 0);
> > + if (pdev->dev.of_node) {
> > + dev->regs = of_iomap(pdev->dev.of_node, 0);
> > + if (!dev->regs) {
> > + dev_err(&pdev->dev, "No SMI register address given in
DT\n");
> > + ret = -ENODEV;
> > + goto out_free;
> > + }
> > +
> > + dev->err_interrupt = irq_of_parse_and_map(pdev->dev.of_node, 0);
> > + } else {
> > + r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +
> > + dev->regs = ioremap(r->start, resource_size(r));
> > + if (!dev->regs) {
> > + dev_err(&pdev->dev, "No SMI register address given\n");
> > + ret = -ENODEV;
> > + goto out_free;
> > + }
> > +
> > + dev->err_interrupt = platform_get_irq(pdev, 0);
> > + }
>
> Why do you have these different paths for OF and platform? AFAIK these
> days when a OF device is automatically converted into a platform
> device all the struct resources are created too, so you can't you just
> use platform_get_resource and devm_request_and_ioremap for both flows?
>
> Ditto for the interrupt - platform_get_irq should work in both cases?
There was no particular reason and I updated the patchset to do that precisely
in version 2.
--
Florian
^ permalink raw reply
* [PATCH v2 1/2] ARM: kirkwood: Ensure that kirkwood_ge0[01]_init() finds its clock
From: Sebastian Hesselbarth @ 2013-01-29 20:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130129203221.GG7717@titan.lakedaemon.net>
On 01/29/2013 09:32 PM, Jason Cooper wrote:
> On Tue, Jan 29, 2013 at 09:08:46PM +0100, Sebastian Hesselbarth wrote:
>> (Issue 1: gated runit clock hangs kernel due to serial access)
>
> This can be fixed with a patch removing clock-frequency from all
> kirkwood boards (dove, orion, etc?) I'll gin this up and add it to the
> havoc ;-)
For kirkwood.dtsi it is already there as you stated, but yes, it should
be removed from the board files including kirkwood.dtsi and also the
comments in kirkwood.dtsi. I'll prepare a patch for dove.dtsi.
>> (Issue 2: gated gbe clock hangs kernel due to smi access)
>
> Here, I'm going to wait for Florian's mvmdio changes to settle out and
> then readdress this. My current understanding is that there will only
> be one DT node for this. iiuc, each board dts will have to say which
> gate clocks to consume to prevent the mvmdio node in the dtsi from
> consuming both unconditionally.
Ok, feel free to consume the patch ;)
>> Leaves Issue 3, gbe forgets about its MAC address when gated or powered
>> down. That should be done with local-mac-address passed by DT enabled
>> u-boot or any other (dirty) ATAG hack ;)
>
> A patch to mv643xx_eth to pull this from DT should solve this.
Great.
Sebastian
^ permalink raw reply
* [PATCH 05/10] ARM: OMAP2+: PM/powerdomain: move omap_set_pwrdm_state() to powerdomain code
From: Paul Walmsley @ 2013-01-29 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAORVsuXw6wgK+P5=9LtGHnoLtE4epwWe75by8nmmvSRHfDrdMQ@mail.gmail.com>
Hi,
(redacted irrelevant code sections)
On Wed, 12 Dec 2012, Jean Pihet wrote:
> On Sun, Dec 9, 2012 at 2:23 AM, Paul Walmsley <paul@pwsan.com> wrote:
>
> > -/**
> > - * pwrdm_set_lowpwrstchange - Request a low power state change
> > - * @pwrdm: struct powerdomain *
> > - *
> > - * Allows a powerdomain to transtion to a lower power sleep state
> > - * from an existing sleep state without waking up the powerdomain.
> > - * Returns -EINVAL if the powerdomain pointer is null or if the
> > - * powerdomain does not support LOWPOWERSTATECHANGE, or returns 0
> > - * upon success.
> > - */
> >
>
> Can this kerneldoc be reused in the new code?
Not directly, since the function is being removed. But I've added some
LOWPOWERSTATECHANGE-related documentation in powerdomain.h in the updated
patch (below).
> > @@ -984,6 +955,89 @@ int pwrdm_post_transition(struct powerdomain *pwrdm)
> > return 0;
> > }
> >
> > +/* Types of sleep_switch used in omap_set_pwrdm_state */
> > +#define ALREADYACTIVE_SWITCH 0
> > +#define FORCEWAKEUP_SWITCH 1
> > +#define LOWPOWERSTATE_SWITCH 2
> >
>
> Could you add some more documentation here?
> What is the goal of the function, what does it return etc. ?
I've added some related kerneldoc to omap_set_pwrdm_state().
> > +
> > +static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm,
> > + u8 pwrst, bool *hwsup)
>
> Same here
>
> > +static void _pwrdm_restore_clkdm_state(struct powerdomain *pwrdm,
> > + u8 sleep_switch, bool hwsup)
>
> Same here.
I've added kerneldoc for both of these functions.
> > +/*
> > + * This sets pwrdm state (other than mpu & core. Currently only ON &
> > + * RET are supported.
> > + */
> >
> Is this one correct?
This is just a cut and paste from the previous comments in the file. I
agree that it is not helpful, so I've added kerneldoc for
omap_set_pwrdm_state().
The updated patch follows.
- Paul
From: Paul Walmsley <paul@pwsan.com>
Date: Tue, 29 Jan 2013 13:45:09 -0700
Subject: [PATCH] ARM: OMAP2+: PM/powerdomain: move omap_set_pwrdm_state() to
powerdomain code
Move omap_set_pwrdm_state() from the PM code to the powerdomain code,
and refactor it to split it up into several functions. A subsequent patch
will rename it to conform with the existing powerdomain function names.
This version includes some additional documentation, based on a
suggestion from Jean Pihet. It also modifies omap_set_pwrdm_state()
to not bail out early unless both the powerdomain current power state
and the next power state are equal. (Previously it would terminate
early if the next power state was equal to the target power state,
which was insufficiently rigorous.)
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Tero Kristo <t-kristo@ti.com>
---
arch/arm/mach-omap2/pm.c | 61 --------------
arch/arm/mach-omap2/pm.h | 1 -
arch/arm/mach-omap2/powerdomain.c | 161 ++++++++++++++++++++++++++++++-------
arch/arm/mach-omap2/powerdomain.h | 13 ++-
4 files changed, 144 insertions(+), 92 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index f18afc9..48d6d5d 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -108,10 +108,6 @@ static void __init omap2_init_processor_devices(void)
}
}
-/* Types of sleep_switch used in omap_set_pwrdm_state */
-#define FORCEWAKEUP_SWITCH 0
-#define LOWPOWERSTATE_SWITCH 1
-
int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
{
if ((clkdm->flags & CLKDM_CAN_ENABLE_AUTO) &&
@@ -124,63 +120,6 @@ int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
}
/*
- * This sets pwrdm state (other than mpu & core. Currently only ON &
- * RET are supported.
- */
-int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 pwrst)
-{
- u8 curr_pwrst, next_pwrst;
- int sleep_switch = -1, ret = 0, hwsup = 0;
-
- if (!pwrdm || IS_ERR(pwrdm))
- return -EINVAL;
-
- while (!(pwrdm->pwrsts & (1 << pwrst))) {
- if (pwrst == PWRDM_POWER_OFF)
- return ret;
- pwrst--;
- }
-
- next_pwrst = pwrdm_read_next_pwrst(pwrdm);
- if (next_pwrst == pwrst)
- return ret;
-
- curr_pwrst = pwrdm_read_pwrst(pwrdm);
- if (curr_pwrst < PWRDM_POWER_ON) {
- if ((curr_pwrst > pwrst) &&
- (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) {
- sleep_switch = LOWPOWERSTATE_SWITCH;
- } else {
- hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
- clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
- sleep_switch = FORCEWAKEUP_SWITCH;
- }
- }
-
- ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
- if (ret)
- pr_err("%s: unable to set power state of powerdomain: %s\n",
- __func__, pwrdm->name);
-
- switch (sleep_switch) {
- case FORCEWAKEUP_SWITCH:
- if (hwsup)
- clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
- else
- clkdm_sleep(pwrdm->pwrdm_clkdms[0]);
- break;
- case LOWPOWERSTATE_SWITCH:
- pwrdm_set_lowpwrstchange(pwrdm);
- pwrdm_state_switch(pwrdm);
- break;
- }
-
- return ret;
-}
-
-
-
-/*
* This API is to be called during init to set the various voltage
* domains to the voltage as per the opp table. Typically we boot up
* at the nominal voltage. So this function finds out the rate of
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index c22503b..7bdd22a 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -33,7 +33,6 @@ static inline int omap4_idle_init(void)
extern void *omap3_secure_ram_storage;
extern void omap3_pm_off_mode_enable(int);
extern void omap_sram_idle(void);
-extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
extern int (*omap_pm_suspend)(void);
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 97b3881..65c3464 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -42,6 +42,16 @@ enum {
PWRDM_STATE_PREV,
};
+/*
+ * Types of sleep_switch used internally in omap_set_pwrdm_state()
+ * and its associated static functions
+ *
+ * XXX Better documentation is needed here
+ */
+#define ALREADYACTIVE_SWITCH 0
+#define FORCEWAKEUP_SWITCH 1
+#define LOWPOWERSTATE_SWITCH 2
+#define ERROR_SWITCH 3
/* pwrdm_list contains all registered struct powerdomains */
static LIST_HEAD(pwrdm_list);
@@ -200,6 +210,80 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
return 0;
}
+/**
+ * _pwrdm_save_clkdm_state_and_activate - prepare for power state change
+ * @pwrdm: struct powerdomain * to operate on
+ * @curr_pwrst: current power state of @pwrdm
+ * @pwrst: power state to switch to
+ * @hwsup: ptr to a bool to return whether the clkdm is hardware-supervised
+ *
+ * Determine whether the powerdomain needs to be turned on before
+ * attempting to switch power states. Called by
+ * omap_set_pwrdm_state(). NOTE that if the powerdomain contains
+ * multiple clockdomains, this code assumes that the first clockdomain
+ * supports software-supervised wakeup mode - potentially a problem.
+ * Returns the power state switch mode currently in use (see the
+ * "Types of sleep_switch" comment above).
+ */
+static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm,
+ u8 curr_pwrst, u8 pwrst,
+ bool *hwsup)
+{
+ u8 sleep_switch;
+
+ if (curr_pwrst < 0) {
+ WARN_ON(1);
+ sleep_switch = ERROR_SWITCH;
+ } else if (curr_pwrst < PWRDM_POWER_ON) {
+ if (curr_pwrst > pwrst &&
+ pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE &&
+ arch_pwrdm->pwrdm_set_lowpwrstchange) {
+ sleep_switch = LOWPOWERSTATE_SWITCH;
+ } else {
+ *hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
+ clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
+ sleep_switch = FORCEWAKEUP_SWITCH;
+ }
+ } else {
+ sleep_switch = ALREADYACTIVE_SWITCH;
+ }
+
+ return sleep_switch;
+}
+
+/**
+ * _pwrdm_restore_clkdm_state - restore the clkdm hwsup state after pwrst change
+ * @pwrdm: struct powerdomain * to operate on
+ * @sleep_switch: return value from _pwrdm_save_clkdm_state_and_activate()
+ * @hwsup: should @pwrdm's first clockdomain be set to hardware-supervised mode?
+ *
+ * Restore the clockdomain state perturbed by
+ * _pwrdm_save_clkdm_state_and_activate(), and call the power state
+ * bookkeeping code. Called by omap_set_pwrdm_state(). NOTE that if
+ * the powerdomain contains multiple clockdomains, this assumes that
+ * the first associated clockdomain supports either
+ * hardware-supervised idle control in the register, or
+ * software-supervised sleep. No return value.
+ */
+static void _pwrdm_restore_clkdm_state(struct powerdomain *pwrdm,
+ u8 sleep_switch, bool hwsup)
+{
+ switch (sleep_switch) {
+ case FORCEWAKEUP_SWITCH:
+ if (hwsup)
+ clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
+ else
+ clkdm_sleep(pwrdm->pwrdm_clkdms[0]);
+ break;
+ case LOWPOWERSTATE_SWITCH:
+ if (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE &&
+ arch_pwrdm->pwrdm_set_lowpwrstchange)
+ arch_pwrdm->pwrdm_set_lowpwrstchange(pwrdm);
+ pwrdm_state_switch(pwrdm);
+ break;
+ }
+}
+
/* Public functions */
/**
@@ -921,35 +1005,6 @@ bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm)
return (pwrdm && pwrdm->flags & PWRDM_HAS_HDWR_SAR) ? 1 : 0;
}
-/**
- * pwrdm_set_lowpwrstchange - Request a low power state change
- * @pwrdm: struct powerdomain *
- *
- * Allows a powerdomain to transtion to a lower power sleep state
- * from an existing sleep state without waking up the powerdomain.
- * Returns -EINVAL if the powerdomain pointer is null or if the
- * powerdomain does not support LOWPOWERSTATECHANGE, or returns 0
- * upon success.
- */
-int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
-{
- int ret = -EINVAL;
-
- if (!pwrdm)
- return -EINVAL;
-
- if (!(pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE))
- return -EINVAL;
-
- pr_debug("powerdomain: %s: setting LOWPOWERSTATECHANGE bit\n",
- pwrdm->name);
-
- if (arch_pwrdm && arch_pwrdm->pwrdm_set_lowpwrstchange)
- ret = arch_pwrdm->pwrdm_set_lowpwrstchange(pwrdm);
-
- return ret;
-}
-
int pwrdm_state_switch(struct powerdomain *pwrdm)
{
int ret;
@@ -985,6 +1040,54 @@ int pwrdm_post_transition(struct powerdomain *pwrdm)
}
/**
+ * omap_set_pwrdm_state - change a powerdomain's current power state
+ * @pwrdm: struct powerdomain * to change the power state of
+ * @pwrst: power state to change to
+ *
+ * Change the current hardware power state of the powerdomain
+ * represented by @pwrdm to the power state represented by @pwrst.
+ * Returns -EINVAL if @pwrdm is null or invalid or if the
+ * powerdomain's current power state could not be read, or returns 0
+ * upon success or if @pwrdm does not support @pwrst or any
+ * lower-power state. XXX Should not return 0 if the @pwrdm does not
+ * support @pwrst or any lower-power state: this should be an error.
+ */
+int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst)
+{
+ u8 curr_pwrst, next_pwrst, sleep_switch;
+ int ret = 0;
+ bool hwsup = false;
+
+ if (!pwrdm || IS_ERR(pwrdm))
+ return -EINVAL;
+
+ while (!(pwrdm->pwrsts & (1 << pwrst))) {
+ if (pwrst == PWRDM_POWER_OFF)
+ return ret;
+ pwrst--;
+ }
+
+ curr_pwrst = pwrdm_read_pwrst(pwrdm);
+ next_pwrst = pwrdm_read_next_pwrst(pwrdm);
+ if (curr_pwrst == pwrst && next_pwrst == pwrst)
+ return ret;
+
+ sleep_switch = _pwrdm_save_clkdm_state_and_activate(pwrdm, curr_pwrst,
+ pwrst, &hwsup);
+ if (sleep_switch == ERROR_SWITCH)
+ return -EINVAL;
+
+ ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
+ if (ret)
+ pr_err("%s: unable to set power state of powerdomain: %s\n",
+ __func__, pwrdm->name);
+
+ _pwrdm_restore_clkdm_state(pwrdm, sleep_switch, hwsup);
+
+ return ret;
+}
+
+/**
* pwrdm_get_context_loss_count - get powerdomain's context loss count
* @pwrdm: struct powerdomain * to wait for
*
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
index 7c1534b..93e7df8 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -162,6 +162,16 @@ struct powerdomain {
* @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd
* @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep
* @pwrdm_wait_transition: Wait for a pd state transition to complete
+ *
+ * Regarding @pwrdm_set_lowpwrstchange: On the OMAP2 and 3-family
+ * chips, a powerdomain's power state is not allowed to directly
+ * transition from one low-power state (e.g., CSWR) to another
+ * low-power state (e.g., OFF) without first waking up the
+ * powerdomain. This wastes energy. So OMAP4 chips support the
+ * ability to transition a powerdomain power state directly from one
+ * low-power state to another. The function pointed to by
+ * @pwrdm_set_lowpwrstchange is intended to configure the OMAP4
+ * hardware powerdomain state machine to enable this feature.
*/
struct pwrdm_ops {
int (*pwrdm_set_next_pwrst)(struct powerdomain *pwrdm, u8 pwrst);
@@ -228,10 +238,11 @@ bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
int pwrdm_state_switch(struct powerdomain *pwrdm);
int pwrdm_pre_transition(struct powerdomain *pwrdm);
int pwrdm_post_transition(struct powerdomain *pwrdm);
-int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm);
int pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
+extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 state);
+
extern void omap242x_powerdomains_init(void);
extern void omap243x_powerdomains_init(void);
extern void omap3xxx_powerdomains_init(void);
--
1.7.10.4
^ permalink raw reply related
* [PATCH] ARM: dove: convert serial DT nodes to clocks property
From: Sebastian Hesselbarth @ 2013-01-29 20:59 UTC (permalink / raw)
To: linux-arm-kernel
of_serial now has support for using clocks property and we have
a DT clock provider. This patch replaces the hard coded clock-frequency
property with a clocks phandle to tclk.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
arch/arm/boot/dts/dove.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 42eac1f..7b52463 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -55,7 +55,7 @@
reg = <0x12000 0x100>;
reg-shift = <2>;
interrupts = <7>;
- clock-frequency = <166666667>;
+ clocks = <&core_clk 0>;
status = "disabled";
};
@@ -64,7 +64,7 @@
reg = <0x12100 0x100>;
reg-shift = <2>;
interrupts = <8>;
- clock-frequency = <166666667>;
+ clocks = <&core_clk 0>;
status = "disabled";
};
@@ -73,7 +73,7 @@
reg = <0x12000 0x100>;
reg-shift = <2>;
interrupts = <9>;
- clock-frequency = <166666667>;
+ clocks = <&core_clk 0>;
status = "disabled";
};
@@ -82,7 +82,7 @@
reg = <0x12100 0x100>;
reg-shift = <2>;
interrupts = <10>;
- clock-frequency = <166666667>;
+ clocks = <&core_clk 0>;
status = "disabled";
};
--
1.7.10.4
^ permalink raw reply related
* [PATCH v3 15/15] ARM: vexpress/dcscb: probe via device tree
From: Rob Herring @ 2013-01-29 21:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359445870-18925-16-git-send-email-nicolas.pitre@linaro.org>
On 01/29/2013 01:51 AM, Nicolas Pitre wrote:
> This allows for the DCSCB support to be compiled in and selected
> at run time.
Shouldn't this just be rolled into the commit creating dcscb.c?
> Signed-off-by: Nicolas Pitre <nico@linaro.org>
> ---
> arch/arm/mach-vexpress/dcscb.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-vexpress/dcscb.c b/arch/arm/mach-vexpress/dcscb.c
> index 58051ffafb..a724507cbc 100644
> --- a/arch/arm/mach-vexpress/dcscb.c
> +++ b/arch/arm/mach-vexpress/dcscb.c
> @@ -14,6 +14,7 @@
> #include <linux/io.h>
> #include <linux/spinlock.h>
> #include <linux/errno.h>
> +#include <linux/of_address.h>
> #include <linux/vexpress.h>
> #include <linux/arm-cci.h>
>
> @@ -24,8 +25,6 @@
> #include <asm/cp15.h>
>
>
> -#define DCSCB_PHYS_BASE 0x60000000
> -
> #define RST_HOLD0 0x0
> #define RST_HOLD1 0x4
> #define SYS_SWRESET 0x8
> @@ -215,10 +214,14 @@ extern void dcscb_power_up_setup(unsigned int affinity_level);
>
> static int __init dcscb_init(void)
> {
> + struct device_node *node;
> unsigned int cfg;
> int ret;
>
> - dcscb_base = ioremap(DCSCB_PHYS_BASE, 0x1000);
> + node = of_find_compatible_node(NULL, NULL, "arm,dcscb");
This needs binding documentation and should be a more specific name. Not
knowing what dcscb is, I don't have a suggestion. Perhaps should include
vexpress or specific core tile name it is part of.
Rob
> + if (!node)
> + return -ENODEV;
> + dcscb_base= of_iomap(node, 0);
> if (!dcscb_base)
> return -EADDRNOTAVAIL;
> cfg = readl_relaxed(dcscb_base + DCS_CFG_R);
>
^ permalink raw reply
* [PATCH] ARM: at91: at91sam9x5.dtsi:usart3 TXD
From: Douglas Gilbert @ 2013-01-29 21:09 UTC (permalink / raw)
To: linux-arm-kernel
Comment for usart3 TXD (TXD3) is correct, dt code is wrong.
The patch is against lk 3.8.0-rc5 .
Signed-off-by: Douglas Gilbert <dgilbert@interlog.com>
-------------- next part --------------
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^ permalink raw reply
* [PATCH] ARM: kirkwood: of_serial: fix clock gating by removing clock-frequency
From: Jason Cooper @ 2013-01-29 21:09 UTC (permalink / raw)
To: linux-arm-kernel
When DT support for kirkwood was first introduced, there was no clock
infrastructure. As a result, we had to manually pass the
clock-frequency to the driver from the device node.
Unfortunately, on kirkwood, with minimal config or all module configs,
clock-frequency breaks booting because of_serial doesn't consume the
gate_clk when clock-frequency is defined.
The end result on kirkwood is that runit gets gated, and then the boot
fails when the kernel tries to write to the serial port.
Fix the issue by removing the clock-frequency parameter from all
kirkwood dts files.
Booted on dreamplug without earlyprintk and successfully logged in via
ttyS0.
Reported-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
---
arch/arm/boot/dts/kirkwood-dns320.dts | 2 --
arch/arm/boot/dts/kirkwood-dns325.dts | 1 -
arch/arm/boot/dts/kirkwood-dockstar.dts | 1 -
arch/arm/boot/dts/kirkwood-dreamplug.dts | 1 -
arch/arm/boot/dts/kirkwood-goflexnet.dts | 1 -
arch/arm/boot/dts/kirkwood-ib62x0.dts | 1 -
arch/arm/boot/dts/kirkwood-iconnect.dts | 1 -
arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts | 1 -
arch/arm/boot/dts/kirkwood-km_kirkwood.dts | 1 -
arch/arm/boot/dts/kirkwood-lschlv2.dts | 1 -
arch/arm/boot/dts/kirkwood-lsxhl.dts | 1 -
arch/arm/boot/dts/kirkwood-mplcec4.dts | 1 -
arch/arm/boot/dts/kirkwood-nsa310.dts | 1 -
arch/arm/boot/dts/kirkwood-openblocks_a6.dts | 2 --
arch/arm/boot/dts/kirkwood-topkick.dts | 1 -
arch/arm/boot/dts/kirkwood.dtsi | 2 --
16 files changed, 19 deletions(-)
diff --git a/arch/arm/boot/dts/kirkwood-dns320.dts b/arch/arm/boot/dts/kirkwood-dns320.dts
index 5bb0bf3..c9c44b2 100644
--- a/arch/arm/boot/dts/kirkwood-dns320.dts
+++ b/arch/arm/boot/dts/kirkwood-dns320.dts
@@ -42,12 +42,10 @@
ocp at f1000000 {
serial at 12000 {
- clock-frequency = <166666667>;
status = "okay";
};
serial at 12100 {
- clock-frequency = <166666667>;
status = "okay";
};
};
diff --git a/arch/arm/boot/dts/kirkwood-dns325.dts b/arch/arm/boot/dts/kirkwood-dns325.dts
index d430713..e4e4930 100644
--- a/arch/arm/boot/dts/kirkwood-dns325.dts
+++ b/arch/arm/boot/dts/kirkwood-dns325.dts
@@ -50,7 +50,6 @@
};
};
serial at 12000 {
- clock-frequency = <200000000>;
status = "okay";
};
};
diff --git a/arch/arm/boot/dts/kirkwood-dockstar.dts b/arch/arm/boot/dts/kirkwood-dockstar.dts
index 2e3dd34..0196cf6 100644
--- a/arch/arm/boot/dts/kirkwood-dockstar.dts
+++ b/arch/arm/boot/dts/kirkwood-dockstar.dts
@@ -37,7 +37,6 @@
};
};
serial at 12000 {
- clock-frequency = <200000000>;
status = "ok";
};
diff --git a/arch/arm/boot/dts/kirkwood-dreamplug.dts b/arch/arm/boot/dts/kirkwood-dreamplug.dts
index f2d386c..e21ae48 100644
--- a/arch/arm/boot/dts/kirkwood-dreamplug.dts
+++ b/arch/arm/boot/dts/kirkwood-dreamplug.dts
@@ -38,7 +38,6 @@
};
};
serial at 12000 {
- clock-frequency = <200000000>;
status = "ok";
};
diff --git a/arch/arm/boot/dts/kirkwood-goflexnet.dts b/arch/arm/boot/dts/kirkwood-goflexnet.dts
index 1b133e0..bd83b8f 100644
--- a/arch/arm/boot/dts/kirkwood-goflexnet.dts
+++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts
@@ -73,7 +73,6 @@
};
};
serial at 12000 {
- clock-frequency = <200000000>;
status = "ok";
};
diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts
index 71902da..5335b1a 100644
--- a/arch/arm/boot/dts/kirkwood-ib62x0.dts
+++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts
@@ -51,7 +51,6 @@
};
};
serial at 12000 {
- clock-frequency = <200000000>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts
index 504f16b..12ccf74 100644
--- a/arch/arm/boot/dts/kirkwood-iconnect.dts
+++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
@@ -78,7 +78,6 @@
};
};
serial at 12000 {
- clock-frequency = <200000000>;
status = "ok";
};
diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
index 6cae459..93c3afb 100644
--- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
+++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
@@ -115,7 +115,6 @@
};
serial at 12000 {
- clock-frequency = <200000000>;
status = "ok";
};
diff --git a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
index 8db3123..5bbd054 100644
--- a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
+++ b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
@@ -34,7 +34,6 @@
};
serial at 12000 {
- clock-frequency = <200000000>;
status = "ok";
};
diff --git a/arch/arm/boot/dts/kirkwood-lschlv2.dts b/arch/arm/boot/dts/kirkwood-lschlv2.dts
index 9510c9e..9f55d95 100644
--- a/arch/arm/boot/dts/kirkwood-lschlv2.dts
+++ b/arch/arm/boot/dts/kirkwood-lschlv2.dts
@@ -13,7 +13,6 @@
ocp at f1000000 {
serial at 12000 {
- clock-frequency = <166666667>;
status = "okay";
};
};
diff --git a/arch/arm/boot/dts/kirkwood-lsxhl.dts b/arch/arm/boot/dts/kirkwood-lsxhl.dts
index 739019c..5c84c11 100644
--- a/arch/arm/boot/dts/kirkwood-lsxhl.dts
+++ b/arch/arm/boot/dts/kirkwood-lsxhl.dts
@@ -13,7 +13,6 @@
ocp at f1000000 {
serial at 12000 {
- clock-frequency = <200000000>;
status = "okay";
};
};
diff --git a/arch/arm/boot/dts/kirkwood-mplcec4.dts b/arch/arm/boot/dts/kirkwood-mplcec4.dts
index 262c654..07be213 100644
--- a/arch/arm/boot/dts/kirkwood-mplcec4.dts
+++ b/arch/arm/boot/dts/kirkwood-mplcec4.dts
@@ -91,7 +91,6 @@
};
serial at 12000 {
- clock-frequency = <200000000>;
status = "ok";
};
diff --git a/arch/arm/boot/dts/kirkwood-nsa310.dts b/arch/arm/boot/dts/kirkwood-nsa310.dts
index 5509f96..28d05e4 100644
--- a/arch/arm/boot/dts/kirkwood-nsa310.dts
+++ b/arch/arm/boot/dts/kirkwood-nsa310.dts
@@ -18,7 +18,6 @@
ocp at f1000000 {
serial at 12000 {
- clock-frequency = <200000000>;
status = "ok";
};
diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
index 49d3d74..f3cc7c4 100644
--- a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
+++ b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
@@ -18,12 +18,10 @@
ocp at f1000000 {
serial at 12000 {
- clock-frequency = <200000000>;
status = "ok";
};
serial at 12100 {
- clock-frequency = <200000000>;
status = "ok";
};
diff --git a/arch/arm/boot/dts/kirkwood-topkick.dts b/arch/arm/boot/dts/kirkwood-topkick.dts
index cd15452..7dd19ff 100644
--- a/arch/arm/boot/dts/kirkwood-topkick.dts
+++ b/arch/arm/boot/dts/kirkwood-topkick.dts
@@ -17,7 +17,6 @@
ocp at f1000000 {
serial at 12000 {
- clock-frequency = <200000000>;
status = "ok";
};
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index d6ab442..ec2701c 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -57,7 +57,6 @@
reg-shift = <2>;
interrupts = <33>;
clocks = <&gate_clk 7>;
- /* set clock-frequency in board dts */
status = "disabled";
};
@@ -67,7 +66,6 @@
reg-shift = <2>;
interrupts = <34>;
clocks = <&gate_clk 7>;
- /* set clock-frequency in board dts */
status = "disabled";
};
--
1.8.1.1
^ permalink raw reply related
* [RFC PATCH 0/4] Add support for LZ4-compressed kernels
From: Rajesh Pawar @ 2013-01-29 21:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130128142510.68092e10.akpm@linux-foundation.org>
> Andrew Morton <akpm@linux-foundation.org> wrote:
>
>On Sat, 26 Jan 2013 14:50:43 +0900
>Kyungsik Lee <kyungsik.lee@lge.com> wrote:
>> This patchset is for supporting LZ4 compressed kernel and initial ramdisk on
>> the x86 and ARM architectures.
>>
>> According to [[http://code.google.com/p/lz4/,]] LZ4 is a very fast lossless
>> compression algorithm and also features an extremely fast decoder.
>>
>> Kernel Decompression APIs are based on implementation by Yann Collet
>> ([[http://code.google.com/p/lz4/source/checkout]]).
>> De/compression Tools are also provided from the site above.
>>
>> The initial test result on ARM(v7) based board shows that the size of kernel
>> with LZ4 compressed is 8% bigger than LZO compressed but the decompressing
>> speed is faster(especially under the enabled unaligned memory access).
>>
>> Test: 3.4 based kernel built with many modules
>> Uncompressed kernel size: 13MB
>> lzo: 6.3MB, 301ms
>> lz4: 6.8MB, 251ms(167ms, with enabled unaligned memory access)
>>
>> It seems that it___s worth trying LZ4 compressed kernel image or ramdisk
>> for making the kernel boot more faster.
>>
>> ...
>>
>> 20 files changed, 663 insertions(+), 3 deletions(-)
>>
>> ...
>>
>What's this "with enabled unaligned memory access" thing? You mean "if
>the arch supports CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS"? If so,
>that's only x86, which isn't really in the target market for this
>patch, yes?
>It's a lot of code for a 50ms boot-time improvement. Does anyone have
>any opinions on whether or not the benefits are worth the cost?
BTW, what happened to the proposed LZO update - woudn't it better to merge this first?
Also, under the hood LZ4 seems to be quite similar to LZO, so probably
LZO speed would also greatly benefit from unaligned access and some other
ARM optimisations
^ permalink raw reply
* [PATCH v2 1/2] ARM: kirkwood: Ensure that kirkwood_ge0[01]_init() finds its clock
From: Jason Cooper @ 2013-01-29 21:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130129195427.GB30831@schnuecks.de>
On Tue, Jan 29, 2013 at 08:54:27PM +0100, Simon Baatz wrote:
> On Mon, Jan 28, 2013 at 02:46:56PM -0500, Jason Cooper wrote:
> > Simon,
> >
> > Can you try this in conjunction with enabling ARM_ATAG_DTB_COMPAT ?
> > Does that solve your issue?
>
> I use
>
> CONFIG_ARM_ATAG_DTB_COMPAT=y
> CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
>
> in my standard configuration already. I don't use the original U-Boot
> that came with the device, but a mainline one which supports my box.
Ahh, I thought you were using the stock bootloader that came with the
device. Thanks for clearing that up.
thx,
Jason.
^ permalink raw reply
* [PATCH 06/10] ARM: OMAP2+: powerdomain/clockdomain: add a per-powerdomain spinlock
From: Paul Walmsley @ 2013-01-29 21:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAORVsuU3f9sf5Z3cVNeJbEKwc_VPpyYv2LfbXtehaMJRN7wARA@mail.gmail.com>
Hi
On Wed, 12 Dec 2012, Jean Pihet wrote:
> On Sun, Dec 9, 2012 at 2:23 AM, Paul Walmsley <paul@pwsan.com> wrote:
>
> > Add a per-powerdomain spinlock. Use that instead of the clockdomain
> > spinlock. Add pwrdm_lock()/pwrdm_unlock() functions to allow other
> > code to acquire or release the powerdomain spinlock without reaching
> > directly into the struct powerdomain.
> >
> Since clockdomains are part of powerdomains it seems weird for the
> clockdomain code to take a powerdoamin lock.
Why?
> Is there a reason why the powerdomain could not take the lock before
> calling the clockdomain functions?
Do you mean "is there a reason why the powerdomain _code_ could not take
the lock"? If so, the reason is that code other than the powerdomain code
calls the clkdm_* functions directly, without calling any powerdomain
functions first. So there's really no other place to take the lock unless
the callers are updated to take the powerdomain lock themselves. That
seems like something to avoid if the caller doesn't have any other
relationship to the powerdomain code.
> Also, are the lock and nolock version the clockdomain function needed?
Did you have a different solution in mind? The two versions are used for
code that needs to be called from two contexts: the first with the
powerdomain's lock already held; the second needing to acquire the
powerdomain's lock to avoid racing against other PRCM code.
- Paul
^ permalink raw reply
* [PATCH 02/12] ARM: OMAP2+: PM: introduce power domains functional states
From: Paul Walmsley @ 2013-01-29 21:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAORVsuVX5AHocHSAg7aMbnLy9FaaPDS5doTCY4_G_-3r+AWEgw@mail.gmail.com>
Hi
(redacted some context)
On Wed, 12 Dec 2012, Jean Pihet wrote:
> On Sun, Dec 9, 2012 at 6:53 PM, Paul Walmsley <paul@pwsan.com> wrote:
>
> +/**
> > + * _match_pwrst: determine the closest supported power state
> > + * @pwrsts: list of allowed states, defined as a bitmask
> > + * @pwrst: initial state to be used as a starting point
> > + * @min: minimum (i.e. lowest consumption) allowed state
> > + * @max: maximum (i.e. highest consumption) allowed state
> > + *
> > + * Search down then up for a valid state from a list of allowed
> > + * states. Used by states conversion functions (_pwrdm_fpwrst_to_*)
> > + * to look for allowed power and logic states for a powerdomain.
> > + * Returns the matching allowed state. XXX Deprecated. The software
> > + * should not try to program unsupported powerstates.
> >
>
> Why is this new code already deprecated? Does this require a rewrite?
The reason why is documented in the above comment. The kernel should not
attempt to program power states that the hardware doesn't support. Our
existing code will program unrequested power states, and that isn't
predictable behavior. If the kernel attempts to program a powerdomain to
the CSWR power state, and the powerdomain doesn't support that state, it
shouldn't silently program a different power state and return success.
It should return an error, since the calling code shouldn't have tried to
program that power state in the first place.
One of the subsequent patches removes this behavior and this code. It's
only being kept to ensure an orderly, functional kernel from one patch
series to the next.
- Paul
^ permalink raw reply
* [PATCH v2 1/2] ARM: dove: cleanup includes
From: Sebastian Hesselbarth @ 2013-01-29 21:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355790269-10596-1-git-send-email-sebastian.hesselbarth@gmail.com>
This patch cleans unneccessary includes and reorders the remaining
includes in common dove code.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Changelog:
[v2]
- restructure patches to first cleanup common.c includes [1/2]
and then split legacy and DT specific code [2/2]
- removed v1 patch "[PATCH 3/3] ARM: Dove: add Cubox sdhci card
detect gpio" that was taken independently
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
arch/arm/mach-dove/common.c | 29 +++++++++--------------------
1 file changed, 9 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 89f4f99..be887feea 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -8,35 +8,24 @@
* warranty of any kind, whether express or implied.
*/
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/pci.h>
#include <linux/clk-provider.h>
#include <linux/clk/mvebu.h>
-#include <linux/ata_platform.h>
-#include <linux/gpio.h>
+#include <linux/dma-mapping.h>
+#include <linux/init.h>
#include <linux/of.h>
#include <linux/of_platform.h>
-#include <asm/page.h>
-#include <asm/setup.h>
-#include <asm/timex.h>
+#include <linux/platform_data/dma-mv_xor.h>
+#include <linux/platform_data/usb-ehci-orion.h>
+#include <linux/platform_device.h>
#include <asm/hardware/cache-tauros2.h>
+#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
-#include <asm/mach/pci.h>
-#include <mach/dove.h>
-#include <mach/pm.h>
#include <mach/bridge-regs.h>
-#include <asm/mach/arch.h>
-#include <linux/irq.h>
-#include <plat/time.h>
-#include <linux/platform_data/usb-ehci-orion.h>
-#include <linux/platform_data/dma-mv_xor.h>
-#include <plat/irq.h>
+#include <mach/pm.h>
#include <plat/common.h>
-#include <plat/addr-map.h>
+#include <plat/irq.h>
+#include <plat/time.h>
#include "common.h"
/*****************************************************************************
--
1.7.10.4
^ permalink raw reply related
* [PATCH v2 2/2] ARM: dove: split legacy and DT setup
From: Sebastian Hesselbarth @ 2013-01-29 21:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359494590-26005-1-git-send-email-sebastian.hesselbarth@gmail.com>
In the beginning of DT for Dove it was reasonable to have it close to
non-DT code. With improved DT support, it became more and more difficult
to not break non-DT while changing DT code.
This patch splits up DT board setup and introduces a DOVE_LEGACY config
to allow to remove legacy code for DT-only kernels.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
arch/arm/mach-dove/Kconfig | 5 +++
arch/arm/mach-dove/Makefile | 4 +-
arch/arm/mach-dove/common.c | 90 -------------------------------------------
arch/arm/mach-dove/common.h | 1 +
4 files changed, 9 insertions(+), 91 deletions(-)
diff --git a/arch/arm/mach-dove/Kconfig b/arch/arm/mach-dove/Kconfig
index 603c5fd..aedd0ba 100644
--- a/arch/arm/mach-dove/Kconfig
+++ b/arch/arm/mach-dove/Kconfig
@@ -2,8 +2,12 @@ if ARCH_DOVE
menu "Marvell Dove Implementations"
+config DOVE_LEGACY
+ bool
+
config MACH_DOVE_DB
bool "Marvell DB-MV88AP510 Development Board"
+ select DOVE_LEGACY
select I2C_BOARDINFO
help
Say 'Y' here if you want your kernel to support the
@@ -11,6 +15,7 @@ config MACH_DOVE_DB
config MACH_CM_A510
bool "CompuLab CM-A510 Board"
+ select DOVE_LEGACY
help
Say 'Y' here if you want your kernel to support the
CompuLab CM-A510 Board.
diff --git a/arch/arm/mach-dove/Makefile b/arch/arm/mach-dove/Makefile
index 5e683ba..3f0a858 100644
--- a/arch/arm/mach-dove/Makefile
+++ b/arch/arm/mach-dove/Makefile
@@ -1,4 +1,6 @@
-obj-y += common.o addr-map.o irq.o mpp.o
+obj-y += common.o addr-map.o irq.o
+obj-$(CONFIG_DOVE_LEGACY) += mpp.o
obj-$(CONFIG_PCI) += pcie.o
obj-$(CONFIG_MACH_DOVE_DB) += dove-db-setup.o
+obj-$(CONFIG_MACH_DOVE_DT) += board-dt.o
obj-$(CONFIG_MACH_CM_A510) += cm-a510.o
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index be887feea..aea14b4 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -9,22 +9,17 @@
*/
#include <linux/clk-provider.h>
-#include <linux/clk/mvebu.h>
#include <linux/dma-mapping.h>
#include <linux/init.h>
-#include <linux/of.h>
-#include <linux/of_platform.h>
#include <linux/platform_data/dma-mv_xor.h>
#include <linux/platform_data/usb-ehci-orion.h>
#include <linux/platform_device.h>
#include <asm/hardware/cache-tauros2.h>
-#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <mach/bridge-regs.h>
#include <mach/pm.h>
#include <plat/common.h>
-#include <plat/irq.h>
#include <plat/time.h>
#include "common.h"
@@ -364,88 +359,3 @@ void dove_restart(char mode, const char *cmd)
while (1)
;
}
-
-#if defined(CONFIG_MACH_DOVE_DT)
-/*
- * There are still devices that doesn't even know about DT,
- * get clock gates here and add a clock lookup.
- */
-static void __init dove_legacy_clk_init(void)
-{
- struct device_node *np = of_find_compatible_node(NULL, NULL,
- "marvell,dove-gating-clock");
- struct of_phandle_args clkspec;
-
- clkspec.np = np;
- clkspec.args_count = 1;
-
- clkspec.args[0] = CLOCK_GATING_BIT_USB0;
- orion_clkdev_add(NULL, "orion-ehci.0",
- of_clk_get_from_provider(&clkspec));
-
- clkspec.args[0] = CLOCK_GATING_BIT_USB1;
- orion_clkdev_add(NULL, "orion-ehci.1",
- of_clk_get_from_provider(&clkspec));
-
- clkspec.args[0] = CLOCK_GATING_BIT_GBE;
- orion_clkdev_add(NULL, "mv643xx_eth_port.0",
- of_clk_get_from_provider(&clkspec));
-
- clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
- orion_clkdev_add("0", "pcie",
- of_clk_get_from_provider(&clkspec));
-
- clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
- orion_clkdev_add("1", "pcie",
- of_clk_get_from_provider(&clkspec));
-}
-
-static void __init dove_of_clk_init(void)
-{
- mvebu_clocks_init();
- dove_legacy_clk_init();
-}
-
-static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
-};
-
-static void __init dove_dt_init(void)
-{
- pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
- (dove_tclk + 499999) / 1000000);
-
-#ifdef CONFIG_CACHE_TAUROS2
- tauros2_init(0);
-#endif
- dove_setup_cpu_mbus();
-
- /* Setup root of clk tree */
- dove_of_clk_init();
-
- /* Internal devices not ported to DT yet */
- dove_rtc_init();
-
- dove_ge00_init(&dove_dt_ge00_data);
- dove_ehci0_init();
- dove_ehci1_init();
- dove_pcie_init(1, 1);
-
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
-
-static const char * const dove_dt_board_compat[] = {
- "marvell,dove",
- NULL
-};
-
-DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
- .map_io = dove_map_io,
- .init_early = dove_init_early,
- .init_irq = orion_dt_init_irq,
- .timer = &dove_timer,
- .init_machine = dove_dt_init,
- .restart = dove_restart,
- .dt_compat = dove_dt_board_compat,
-MACHINE_END
-#endif
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h
index 1a23340..d17f760 100644
--- a/arch/arm/mach-dove/common.h
+++ b/arch/arm/mach-dove/common.h
@@ -25,6 +25,7 @@ void dove_init_early(void);
void dove_init_irq(void);
void dove_setup_cpu_mbus(void);
void dove_ge00_init(struct mv643xx_eth_platform_data *eth_data);
+void dove_rtc_init(void);
void dove_sata_init(struct mv_sata_platform_data *sata_data);
#ifdef CONFIG_PCI
void dove_pcie_init(int init_port0, int init_port1);
--
1.7.10.4
^ permalink raw reply related
* [PATCH v2 1/2] ARM: kirkwood: Ensure that kirkwood_ge0[01]_init() finds its clock
From: Jason Cooper @ 2013-01-29 21:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <51083580.1010900@gmail.com>
On Tue, Jan 29, 2013 at 09:48:00PM +0100, Sebastian Hesselbarth wrote:
> On 01/29/2013 09:32 PM, Jason Cooper wrote:
> >On Tue, Jan 29, 2013 at 09:08:46PM +0100, Sebastian Hesselbarth wrote:
> >>Leaves Issue 3, gbe forgets about its MAC address when gated or powered
> >>down. That should be done with local-mac-address passed by DT enabled
> >>u-boot or any other (dirty) ATAG hack ;)
> >
> >A patch to mv643xx_eth to pull this from DT should solve this.
>
> Great.
Did I just volunteer myself for that too? :-)
thx,
Jason.
^ permalink raw reply
* [PATCH v2 2/2] ARM: dove: split legacy and DT setup
From: Jason Cooper @ 2013-01-29 21:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359494590-26005-2-git-send-email-sebastian.hesselbarth@gmail.com>
On Tue, Jan 29, 2013 at 10:23:10PM +0100, Sebastian Hesselbarth wrote:
> In the beginning of DT for Dove it was reasonable to have it close to
> non-DT code. With improved DT support, it became more and more difficult
> to not break non-DT while changing DT code.
>
> This patch splits up DT board setup and introduces a DOVE_LEGACY config
> to allow to remove legacy code for DT-only kernels.
>
> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Jason Cooper <jason@lakedaemon.net>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: linux-kernel at vger.kernel.org
> ---
> arch/arm/mach-dove/Kconfig | 5 +++
> arch/arm/mach-dove/Makefile | 4 +-
> arch/arm/mach-dove/common.c | 90 -------------------------------------------
Shouldn't the above be added somewhere?
thx,
Jason.
> arch/arm/mach-dove/common.h | 1 +
> 4 files changed, 9 insertions(+), 91 deletions(-)
>
> diff --git a/arch/arm/mach-dove/Kconfig b/arch/arm/mach-dove/Kconfig
> index 603c5fd..aedd0ba 100644
> --- a/arch/arm/mach-dove/Kconfig
> +++ b/arch/arm/mach-dove/Kconfig
> @@ -2,8 +2,12 @@ if ARCH_DOVE
>
> menu "Marvell Dove Implementations"
>
> +config DOVE_LEGACY
> + bool
> +
> config MACH_DOVE_DB
> bool "Marvell DB-MV88AP510 Development Board"
> + select DOVE_LEGACY
> select I2C_BOARDINFO
> help
> Say 'Y' here if you want your kernel to support the
> @@ -11,6 +15,7 @@ config MACH_DOVE_DB
>
> config MACH_CM_A510
> bool "CompuLab CM-A510 Board"
> + select DOVE_LEGACY
> help
> Say 'Y' here if you want your kernel to support the
> CompuLab CM-A510 Board.
> diff --git a/arch/arm/mach-dove/Makefile b/arch/arm/mach-dove/Makefile
> index 5e683ba..3f0a858 100644
> --- a/arch/arm/mach-dove/Makefile
> +++ b/arch/arm/mach-dove/Makefile
> @@ -1,4 +1,6 @@
> -obj-y += common.o addr-map.o irq.o mpp.o
> +obj-y += common.o addr-map.o irq.o
> +obj-$(CONFIG_DOVE_LEGACY) += mpp.o
> obj-$(CONFIG_PCI) += pcie.o
> obj-$(CONFIG_MACH_DOVE_DB) += dove-db-setup.o
> +obj-$(CONFIG_MACH_DOVE_DT) += board-dt.o
> obj-$(CONFIG_MACH_CM_A510) += cm-a510.o
> diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
> index be887feea..aea14b4 100644
> --- a/arch/arm/mach-dove/common.c
> +++ b/arch/arm/mach-dove/common.c
> @@ -9,22 +9,17 @@
> */
>
> #include <linux/clk-provider.h>
> -#include <linux/clk/mvebu.h>
> #include <linux/dma-mapping.h>
> #include <linux/init.h>
> -#include <linux/of.h>
> -#include <linux/of_platform.h>
> #include <linux/platform_data/dma-mv_xor.h>
> #include <linux/platform_data/usb-ehci-orion.h>
> #include <linux/platform_device.h>
> #include <asm/hardware/cache-tauros2.h>
> -#include <asm/mach/arch.h>
> #include <asm/mach/map.h>
> #include <asm/mach/time.h>
> #include <mach/bridge-regs.h>
> #include <mach/pm.h>
> #include <plat/common.h>
> -#include <plat/irq.h>
> #include <plat/time.h>
> #include "common.h"
>
> @@ -364,88 +359,3 @@ void dove_restart(char mode, const char *cmd)
> while (1)
> ;
> }
> -
> -#if defined(CONFIG_MACH_DOVE_DT)
> -/*
> - * There are still devices that doesn't even know about DT,
> - * get clock gates here and add a clock lookup.
> - */
> -static void __init dove_legacy_clk_init(void)
> -{
> - struct device_node *np = of_find_compatible_node(NULL, NULL,
> - "marvell,dove-gating-clock");
> - struct of_phandle_args clkspec;
> -
> - clkspec.np = np;
> - clkspec.args_count = 1;
> -
> - clkspec.args[0] = CLOCK_GATING_BIT_USB0;
> - orion_clkdev_add(NULL, "orion-ehci.0",
> - of_clk_get_from_provider(&clkspec));
> -
> - clkspec.args[0] = CLOCK_GATING_BIT_USB1;
> - orion_clkdev_add(NULL, "orion-ehci.1",
> - of_clk_get_from_provider(&clkspec));
> -
> - clkspec.args[0] = CLOCK_GATING_BIT_GBE;
> - orion_clkdev_add(NULL, "mv643xx_eth_port.0",
> - of_clk_get_from_provider(&clkspec));
> -
> - clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
> - orion_clkdev_add("0", "pcie",
> - of_clk_get_from_provider(&clkspec));
> -
> - clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
> - orion_clkdev_add("1", "pcie",
> - of_clk_get_from_provider(&clkspec));
> -}
> -
> -static void __init dove_of_clk_init(void)
> -{
> - mvebu_clocks_init();
> - dove_legacy_clk_init();
> -}
> -
> -static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
> - .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
> -};
> -
> -static void __init dove_dt_init(void)
> -{
> - pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
> - (dove_tclk + 499999) / 1000000);
> -
> -#ifdef CONFIG_CACHE_TAUROS2
> - tauros2_init(0);
> -#endif
> - dove_setup_cpu_mbus();
> -
> - /* Setup root of clk tree */
> - dove_of_clk_init();
> -
> - /* Internal devices not ported to DT yet */
> - dove_rtc_init();
> -
> - dove_ge00_init(&dove_dt_ge00_data);
> - dove_ehci0_init();
> - dove_ehci1_init();
> - dove_pcie_init(1, 1);
> -
> - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
> -}
> -
> -static const char * const dove_dt_board_compat[] = {
> - "marvell,dove",
> - NULL
> -};
> -
> -DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
> - .map_io = dove_map_io,
> - .init_early = dove_init_early,
> - .init_irq = orion_dt_init_irq,
> - .timer = &dove_timer,
> - .init_machine = dove_dt_init,
> - .restart = dove_restart,
> - .dt_compat = dove_dt_board_compat,
> -MACHINE_END
> -#endif
> diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h
> index 1a23340..d17f760 100644
> --- a/arch/arm/mach-dove/common.h
> +++ b/arch/arm/mach-dove/common.h
> @@ -25,6 +25,7 @@ void dove_init_early(void);
> void dove_init_irq(void);
> void dove_setup_cpu_mbus(void);
> void dove_ge00_init(struct mv643xx_eth_platform_data *eth_data);
> +void dove_rtc_init(void);
> void dove_sata_init(struct mv_sata_platform_data *sata_data);
> #ifdef CONFIG_PCI
> void dove_pcie_init(int init_port0, int init_port1);
> --
> 1.7.10.4
>
^ permalink raw reply
* [PATCH v2 1/2] ARM: dove: cleanup includes
From: Jason Cooper @ 2013-01-29 21:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359494590-26005-1-git-send-email-sebastian.hesselbarth@gmail.com>
On Tue, Jan 29, 2013 at 10:23:09PM +0100, Sebastian Hesselbarth wrote:
> This patch cleans unneccessary includes and reorders the remaining
> includes in common dove code.
>
> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
> Changelog:
> [v2]
> - restructure patches to first cleanup common.c includes [1/2]
> and then split legacy and DT specific code [2/2]
> - removed v1 patch "[PATCH 3/3] ARM: Dove: add Cubox sdhci card
> detect gpio" that was taken independently
>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Jason Cooper <jason@lakedaemon.net>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: linux-kernel at vger.kernel.org
> ---
> arch/arm/mach-dove/common.c | 29 +++++++++--------------------
> 1 file changed, 9 insertions(+), 20 deletions(-)
Applied to mvebu/cleanup, thanks for turning this around so quickly.
thx,
Jason.
^ permalink raw reply
* [GIT PULL] ARM: mvebu cleanup for v3.9 round2
From: Jason Cooper @ 2013-01-29 21:37 UTC (permalink / raw)
To: linux-arm-kernel
The following changes since commit b96e1b1c3c5319294edb0970b6d5bf099c0e85eb:
ARM: Kirkwood: Cleanup unneeded include files (2013-01-12 21:50:10 +0000)
are available in the git repository at:
git://git.infradead.org/users/jcooper/linux.git tags/cleanup_for_v3.9_round2
for you to fetch changes up to 63a069739a5826ab4007da88b7ec71eb9909271c:
ARM: dove: cleanup includes (2013-01-29 21:31:36 +0000)
----------------------------------------------------------------
cleanup for v3.9 round2
- remove unneeded #includes for mach-dove
- remove unneeded #includes and code for the nsa310
----------------------------------------------------------------
Jason Cooper (1):
ARM: kirkwood: nsa310: cleanup includes and unneeded code
Sebastian Hesselbarth (1):
ARM: dove: cleanup includes
arch/arm/mach-dove/common.c | 29 +++++++++--------------------
arch/arm/mach-kirkwood/board-nsa310.c | 9 +--------
2 files changed, 10 insertions(+), 28 deletions(-)
^ permalink raw reply
* [PATCH v3 2/2] ARM: dove: split legacy and DT setup
From: Sebastian Hesselbarth @ 2013-01-29 21:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130129212623.GJ7717@titan.lakedaemon.net>
In the beginning of DT for Dove it was reasonable to have it close to
non-DT code. With improved DT support, it became more and more difficult
to not break non-DT while changing DT code.
This patch splits up DT board setup and introduces a DOVE_LEGACY config
to allow to remove legacy code for DT-only kernels.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Changelog:
[v3]
- also include new board-dt.c file that was missing in v2 of patch [2/2]
(patch [1/2] has not changed and is not resent)
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
---
arch/arm/mach-dove/Kconfig | 5 ++
arch/arm/mach-dove/Makefile | 4 +-
arch/arm/mach-dove/board-dt.c | 103 +++++++++++++++++++++++++++++++++++++++++
arch/arm/mach-dove/common.c | 90 -----------------------------------
arch/arm/mach-dove/common.h | 1 +
5 files changed, 112 insertions(+), 91 deletions(-)
create mode 100644 arch/arm/mach-dove/board-dt.c
diff --git a/arch/arm/mach-dove/Kconfig b/arch/arm/mach-dove/Kconfig
index 603c5fd..aedd0ba 100644
--- a/arch/arm/mach-dove/Kconfig
+++ b/arch/arm/mach-dove/Kconfig
@@ -2,8 +2,12 @@ if ARCH_DOVE
menu "Marvell Dove Implementations"
+config DOVE_LEGACY
+ bool
+
config MACH_DOVE_DB
bool "Marvell DB-MV88AP510 Development Board"
+ select DOVE_LEGACY
select I2C_BOARDINFO
help
Say 'Y' here if you want your kernel to support the
@@ -11,6 +15,7 @@ config MACH_DOVE_DB
config MACH_CM_A510
bool "CompuLab CM-A510 Board"
+ select DOVE_LEGACY
help
Say 'Y' here if you want your kernel to support the
CompuLab CM-A510 Board.
diff --git a/arch/arm/mach-dove/Makefile b/arch/arm/mach-dove/Makefile
index 5e683ba..3f0a858 100644
--- a/arch/arm/mach-dove/Makefile
+++ b/arch/arm/mach-dove/Makefile
@@ -1,4 +1,6 @@
-obj-y += common.o addr-map.o irq.o mpp.o
+obj-y += common.o addr-map.o irq.o
+obj-$(CONFIG_DOVE_LEGACY) += mpp.o
obj-$(CONFIG_PCI) += pcie.o
obj-$(CONFIG_MACH_DOVE_DB) += dove-db-setup.o
+obj-$(CONFIG_MACH_DOVE_DT) += board-dt.o
obj-$(CONFIG_MACH_CM_A510) += cm-a510.o
diff --git a/arch/arm/mach-dove/board-dt.c b/arch/arm/mach-dove/board-dt.c
new file mode 100644
index 0000000..c9c274a
--- /dev/null
+++ b/arch/arm/mach-dove/board-dt.c
@@ -0,0 +1,103 @@
+/*
+ * arch/arm/mach-dove/board-dt.c
+ *
+ * Marvell Dove 88AP510 System On Chip FDT Board
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/init.h>
+#include <linux/clk-provider.h>
+#include <linux/clk/mvebu.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_data/usb-ehci-orion.h>
+#include <asm/hardware/cache-tauros2.h>
+#include <asm/mach/arch.h>
+#include <mach/pm.h>
+#include <plat/common.h>
+#include <plat/irq.h>
+#include "common.h"
+
+/*
+ * There are still devices that doesn't even know about DT,
+ * get clock gates here and add a clock lookup.
+ */
+static void __init dove_legacy_clk_init(void)
+{
+ struct device_node *np = of_find_compatible_node(NULL, NULL,
+ "marvell,dove-gating-clock");
+ struct of_phandle_args clkspec;
+
+ clkspec.np = np;
+ clkspec.args_count = 1;
+
+ clkspec.args[0] = CLOCK_GATING_BIT_USB0;
+ orion_clkdev_add(NULL, "orion-ehci.0",
+ of_clk_get_from_provider(&clkspec));
+
+ clkspec.args[0] = CLOCK_GATING_BIT_USB1;
+ orion_clkdev_add(NULL, "orion-ehci.1",
+ of_clk_get_from_provider(&clkspec));
+
+ clkspec.args[0] = CLOCK_GATING_BIT_GBE;
+ orion_clkdev_add(NULL, "mv643xx_eth_port.0",
+ of_clk_get_from_provider(&clkspec));
+
+ clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
+ orion_clkdev_add("0", "pcie",
+ of_clk_get_from_provider(&clkspec));
+
+ clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
+ orion_clkdev_add("1", "pcie",
+ of_clk_get_from_provider(&clkspec));
+}
+
+static void __init dove_of_clk_init(void)
+{
+ mvebu_clocks_init();
+ dove_legacy_clk_init();
+}
+
+static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
+ .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
+};
+
+static void __init dove_dt_init(void)
+{
+ pr_info("Dove 88AP510 SoC\n");
+
+#ifdef CONFIG_CACHE_TAUROS2
+ tauros2_init(0);
+#endif
+ dove_setup_cpu_mbus();
+
+ /* Setup root of clk tree */
+ dove_of_clk_init();
+
+ /* Internal devices not ported to DT yet */
+ dove_rtc_init();
+ dove_ge00_init(&dove_dt_ge00_data);
+ dove_ehci0_init();
+ dove_ehci1_init();
+ dove_pcie_init(1, 1);
+
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char * const dove_dt_board_compat[] = {
+ "marvell,dove",
+ NULL
+};
+
+DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
+ .map_io = dove_map_io,
+ .init_early = dove_init_early,
+ .init_irq = orion_dt_init_irq,
+ .timer = &dove_timer,
+ .init_machine = dove_dt_init,
+ .restart = dove_restart,
+ .dt_compat = dove_dt_board_compat,
+MACHINE_END
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index be887feea..aea14b4 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -9,22 +9,17 @@
*/
#include <linux/clk-provider.h>
-#include <linux/clk/mvebu.h>
#include <linux/dma-mapping.h>
#include <linux/init.h>
-#include <linux/of.h>
-#include <linux/of_platform.h>
#include <linux/platform_data/dma-mv_xor.h>
#include <linux/platform_data/usb-ehci-orion.h>
#include <linux/platform_device.h>
#include <asm/hardware/cache-tauros2.h>
-#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <mach/bridge-regs.h>
#include <mach/pm.h>
#include <plat/common.h>
-#include <plat/irq.h>
#include <plat/time.h>
#include "common.h"
@@ -364,88 +359,3 @@ void dove_restart(char mode, const char *cmd)
while (1)
;
}
-
-#if defined(CONFIG_MACH_DOVE_DT)
-/*
- * There are still devices that doesn't even know about DT,
- * get clock gates here and add a clock lookup.
- */
-static void __init dove_legacy_clk_init(void)
-{
- struct device_node *np = of_find_compatible_node(NULL, NULL,
- "marvell,dove-gating-clock");
- struct of_phandle_args clkspec;
-
- clkspec.np = np;
- clkspec.args_count = 1;
-
- clkspec.args[0] = CLOCK_GATING_BIT_USB0;
- orion_clkdev_add(NULL, "orion-ehci.0",
- of_clk_get_from_provider(&clkspec));
-
- clkspec.args[0] = CLOCK_GATING_BIT_USB1;
- orion_clkdev_add(NULL, "orion-ehci.1",
- of_clk_get_from_provider(&clkspec));
-
- clkspec.args[0] = CLOCK_GATING_BIT_GBE;
- orion_clkdev_add(NULL, "mv643xx_eth_port.0",
- of_clk_get_from_provider(&clkspec));
-
- clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
- orion_clkdev_add("0", "pcie",
- of_clk_get_from_provider(&clkspec));
-
- clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
- orion_clkdev_add("1", "pcie",
- of_clk_get_from_provider(&clkspec));
-}
-
-static void __init dove_of_clk_init(void)
-{
- mvebu_clocks_init();
- dove_legacy_clk_init();
-}
-
-static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
-};
-
-static void __init dove_dt_init(void)
-{
- pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
- (dove_tclk + 499999) / 1000000);
-
-#ifdef CONFIG_CACHE_TAUROS2
- tauros2_init(0);
-#endif
- dove_setup_cpu_mbus();
-
- /* Setup root of clk tree */
- dove_of_clk_init();
-
- /* Internal devices not ported to DT yet */
- dove_rtc_init();
-
- dove_ge00_init(&dove_dt_ge00_data);
- dove_ehci0_init();
- dove_ehci1_init();
- dove_pcie_init(1, 1);
-
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
-
-static const char * const dove_dt_board_compat[] = {
- "marvell,dove",
- NULL
-};
-
-DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
- .map_io = dove_map_io,
- .init_early = dove_init_early,
- .init_irq = orion_dt_init_irq,
- .timer = &dove_timer,
- .init_machine = dove_dt_init,
- .restart = dove_restart,
- .dt_compat = dove_dt_board_compat,
-MACHINE_END
-#endif
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h
index 1a23340..d17f760 100644
--- a/arch/arm/mach-dove/common.h
+++ b/arch/arm/mach-dove/common.h
@@ -25,6 +25,7 @@ void dove_init_early(void);
void dove_init_irq(void);
void dove_setup_cpu_mbus(void);
void dove_ge00_init(struct mv643xx_eth_platform_data *eth_data);
+void dove_rtc_init(void);
void dove_sata_init(struct mv_sata_platform_data *sata_data);
#ifdef CONFIG_PCI
void dove_pcie_init(int init_port0, int init_port1);
--
1.7.10.4
^ permalink raw reply related
* [PATCH v3 15/15] ARM: vexpress/dcscb: probe via device tree
From: Nicolas Pitre @ 2013-01-29 21:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <510838AD.6040700@gmail.com>
On Tue, 29 Jan 2013, Rob Herring wrote:
> On 01/29/2013 01:51 AM, Nicolas Pitre wrote:
> > This allows for the DCSCB support to be compiled in and selected
> > at run time.
>
> Shouldn't this just be rolled into the commit creating dcscb.c?
Probably, yes.
> > Signed-off-by: Nicolas Pitre <nico@linaro.org>
> > ---
> > arch/arm/mach-vexpress/dcscb.c | 9 ++++++---
> > 1 file changed, 6 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/mach-vexpress/dcscb.c b/arch/arm/mach-vexpress/dcscb.c
> > index 58051ffafb..a724507cbc 100644
> > --- a/arch/arm/mach-vexpress/dcscb.c
> > +++ b/arch/arm/mach-vexpress/dcscb.c
> > @@ -14,6 +14,7 @@
> > #include <linux/io.h>
> > #include <linux/spinlock.h>
> > #include <linux/errno.h>
> > +#include <linux/of_address.h>
> > #include <linux/vexpress.h>
> > #include <linux/arm-cci.h>
> >
> > @@ -24,8 +25,6 @@
> > #include <asm/cp15.h>
> >
> >
> > -#define DCSCB_PHYS_BASE 0x60000000
> > -
> > #define RST_HOLD0 0x0
> > #define RST_HOLD1 0x4
> > #define SYS_SWRESET 0x8
> > @@ -215,10 +214,14 @@ extern void dcscb_power_up_setup(unsigned int affinity_level);
> >
> > static int __init dcscb_init(void)
> > {
> > + struct device_node *node;
> > unsigned int cfg;
> > int ret;
> >
> > - dcscb_base = ioremap(DCSCB_PHYS_BASE, 0x1000);
> > + node = of_find_compatible_node(NULL, NULL, "arm,dcscb");
>
> This needs binding documentation and should be a more specific name. Not
> knowing what dcscb is, I don't have a suggestion.
Yes, I mentioned in the cover page that DT bindings are not yet
documented.
DCSCB stands for "Dual Cluster System Control Block". This is in fact a
set of miscellaneous registers, mainly for reset control of individual
CPUs and clusters.
> Perhaps should include vexpress or specific core tile name it is part
> of.
/me hopes for some ARM dude more acquainted with their nomenclature to
chime in with suggestions.
Nicolas
^ permalink raw reply
* [PATCH] mailbox: prevent pl320-ipc code from breaking none-AMBA systems
From: Rafael J. Wysocki @ 2013-01-29 21:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359477413-27881-1-git-send-email-mark.langsdorf@calxeda.com>
On Tuesday, January 29, 2013 10:36:53 AM Mark Langsdorf wrote:
> The pl320-ipc code depends on ARM AMBA, and should have the dependency
> in its Kconfig.
May I fold this into "ARM / highbank: add support for pl320 IPC"?
Rafael
> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
> ---
> drivers/mailbox/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
> index 9489554..9545c9f 100644
> --- a/drivers/mailbox/Kconfig
> +++ b/drivers/mailbox/Kconfig
> @@ -8,6 +8,7 @@ menuconfig MAILBOX
> if MAILBOX
> config PL320_MBOX
> bool "ARM PL320 Mailbox"
> + depends on ARM_AMBA
> help
> An implementation of the ARM PL320 Interprocessor Communication
> Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
>
--
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.
^ permalink raw reply
* [PATCH v2 05/27] arm: pci: add a align_resource hook
From: Thomas Petazzoni @ 2013-01-29 21:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130129213308.7e845064@skate>
Arnd,
On Tue, 29 Jan 2013 21:33:08 +0100, Thomas Petazzoni wrote:
> Basically, I have currently two suggestions:
>
> * From Jason Gunthorpe, to not use any host bridge, and instead use
> only PCI-to-PCI bridges, one per PCIe interface.
>
> * From you, to not use any PCI-to-PCI bridge, and use only host
> bridges, one per PCIe interface.
Thinking more about this, this solution (using one emulated host bridge
per PCIe interface) would cause one problem: the PCIe device itself
would no longer be in slot 0.
If I'm correct, with one host bridge per PCIe interface, we would have
the following topology:
bus 0, slot 0: emulated host bridge 0
bus 0, slot 1: PCIe device connected to PCIe interface 0
bus 1, slot 0: emulated host bridge 1
bus 1, slot 1: PCIe device connected to PCIe interface 1
bus 2, slot 0: emulated host bridge 2
bus 2, slot 1: PCIe device connected to PCIE interface 2
etc.
However, one of the reason to use a PCI-to-PCI bridge was to ensure
that the PCIe devices were all listed in slot 0. According to the
Marvell engineers who work on the PCIe stuff, some new PCIe devices
have this requirement. I don't have a lot of details about this, but I
was told that most of the new Intel NICs require this, for example the
Intel X520 fiber NIC. Maybe PCIe experts (Jason?) could provide more
details about this, and confirm/infirm this statement.
The usage of PCI-to-PCI bridge allows to have each PCIe device on its
own bus, at slot 0, which also solves this problem.
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply
* [PATCH 1/5] dmaengine: dw_dmac: move to generic DMA binding
From: Linus Walleij @ 2013-01-29 21:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201301292040.50143.arnd@arndb.de>
On Tue, Jan 29, 2013 at 9:40 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> the patches were certainly on the mailing list
> http://lists.infradead.org/pipermail/linux-arm-kernel/2010-June/017818.html
>
> Do you (or Linus) know what happened to the patch series?
Just stalled. My fault probably, and IIRC Russell sent a
modified version of this patch at one time.
> Based on your description, it sounds all doable, but the split
> between platform specific code and device driver code would be
> different: While the muxing that you describe all takes place
> in the get_signal/put_signal functions in platform code, doing
> a proper DT binding for the mux would imply moving that into the
> pl080 driver itself, at least as a compile-time option for the
> driver. Do you think that would be acceptable?
This is the pushing-to-driver paradigm, and for the legacy
support it will be troublesome as it needs to supply the
base address of the mux etc through the platform data,
and then with an ampersand reference to the syscon
in the dma node.
> While I guess we could still keep the get_signal/put_signal
> callbacks in mach-versatile but drop them for platforms
> without a mux, I'm not sure if that would make the overall
> driver better or worse.
I think that is not the big issue though.
I think the most important thing is to come up
with a OS-neutral description of channels vs
muxes and signals.
Basically all DMA hardware has a mux, but in
many cases it is fused with the DMA controller
itself, and sometimes even hidden from software,
i.e. it seems there is one channel per peripheral,
but if you try to use them all at the same time
something like round-robin bursts can be expected
(in best case).
For each channel, you need to be able to specify
a number of applicable request lines, with an
optional mux component inbetween. And I think
the bindings should be generic, because the problem
is generic.
I tried to express this in DT syntax but failed, I
just don't know how to do that, DT seems to be
very much not about muxes and things that take
optional paths, more about describing how static
electronics are set up.
The basic assumption of a 1:1 mapping between
a peripheral and a channel is bogus - this is true on
some hardware (like the COH901318), but certainly
not all, the Versatile and RealView being the most
problematic examples to date with the separate mux
and all.
Maybe stupid analogy:
http://en.wikipedia.org/wiki/File:JT_Switchboard_770x540.jpg
The actual channels are the cords.
The the sockets are the devices.
The telephonist is the mux.
So looking up a DMA channel for RX for the PL011
can be like trying to find a blue cord to put in the
PL011 socket when the red light goes on for RX
DMA. If no blue cord is available the telephonist can
plug in the handset and say "sorry, failed to find a
free line".
Conversely to TX DMA you may need a red
cord. Having a blue cord at hand will not help
you.
Coding it down in the device tree like in the
example is like plugging the cords in to some
holes at boot time and let the telephonist go
home.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH] ARM: call disable_nonboot_cpus() from machine_shutdown()
From: Stephen Warren @ 2013-01-29 22:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87d2xcfeew.fsf@xmission.com>
On 01/10/2013 10:59 PM, Eric W. Biederman wrote:
...
> disable_nonboot_cpus() should really be called
> sometimes_dangerously_hotunplug_all_but_one_cpu().
>
> If that code is going to be something other than power management
> specific it is not cool that disable_nonboot_cpus() is not always
> enabled when SMP is enabled. It means that architectures need to
> implement two different ways of shutting down cpus.
>
> One of the truly nasty things about cpu_hotplug is that it requires that
> irqs be migrated away from a cpu with interrupts disabled, which at
> least on x86 in some interrupt delivery modes is impossible to do
> safely. The only way to losslessly (and without wedging irq
> controllers) in those interrupt delivery modes (needed for more than 8
> cpus) is to migrate an irq in it's irq handler. Which is fine for
> setting /proc/irq/$N/smp_affinity but is useless for cpu hot-unplug,
> where we need to guarantee that all irqs are going to stop hitting a
> cpu.
I'm a little confused about this; disable_nonboot_cpus() calls
_cpu_down() to hot-unplug the CPU, and the regular CPU hotplug path is
drivers/base/cpu.c:store_online() -> cpu_down() -> _cpu_down(), i.e. the
same basic code.
Given that, why is CPU hot unplug safe on x86 via sysfs (well, I'm just
assuming it must be, since it's enabled in my regular distro kernel and
appears to work fine), but not safe when it's done from
disable_nonboot_cpus()?
> Now sometimes_dangerously_hotunplug_all_but_one_cpu() on the reboot path
> was added just a few months ago in Oct 2012, and it appears to due to
> weird ARM maintainership. At least the x86 reboot_cpu_id option is
> broken due to that addition.
I guess this is true because reboot_cpu_id() isn't honored unless that
CPU is already offline, and disable_nonboot_cpus() probably took it
offline on average.
Perhaps x86's native_machine_shutdown() should explicitly bring that CPU
online if it's in cpu_possible_mask? Or perhaps disable_nonboot_cpus()
should be enhanced with x86's reboot_cpu_id logic, so it simply works
the same way across all architectures; that way some chunk of x86's
native_machine_shutdown() could be made common.
...
> We should remove disable_nonboot_cpus() from the reboot path. It is
> still a crazy unmaintained cpu hotplug mess.
Even if we updated it to standardize the reboot_cpu_id logic across all
architectures, and hence made it still suitable for x86?
^ permalink raw reply
* [PATCH 09/30] USB: ehci-omap: Use devm_request_and_ioremap()
From: Greg KH @ 2013-01-29 22:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130129160134.GC23505@n2100.arm.linux.org.uk>
On Tue, Jan 29, 2013 at 04:01:34PM +0000, Russell King - ARM Linux wrote:
> On Tue, Jan 29, 2013 at 10:34:53AM -0500, Alan Stern wrote:
> > On Mon, 28 Jan 2013, Russell King - ARM Linux wrote:
> >
> > > On Mon, Jan 28, 2013 at 10:17:33AM -0500, Alan Stern wrote:
> > > > On Mon, 28 Jan 2013, Roger Quadros wrote:
> > > >
> > > > > Make use of devm_request_and_ioremap() and correct comment.
> > > >
> > > > Didn't a big patch come through recently converting all usages of
> > > > devm_request_and_ioremap() to another function (I forget the name) that
> > > > does its own error reporting and returns an ERR_PTR value?
> > > >
> > > > (Checks the mailing list archive...) Ah, here it is:
> > > >
> > > > http://marc.info/?l=linux-usb&m=135876311801537&w=2
> > > >
> > > > And the new function is devm_ioremap_resource(). We should avoid
> > > > adding new usages of an old interface.
> > >
> > > Maybe... if devm_ioremap_resource() was already in the kernel. The
> > > problem at the moment is it isn't, and it'll probably be rather
> > > horrid for everyone to deal with especially when it comes to testing.
> >
> > Not in the kernel yet? I didn't realize that. Looks like Thierry
> > Reding will have some clean-up work to do when it does get in.
>
> It may be in linux-next, but it isn't in Linus' yet... (of course, it's
> probably scheduled for the upcoming merge window). Certainly:
>
> $ grep -r devm_ioremap_resource include
>
> against Linus' tree (6abb7c2) still turns up nothing.
It's in my driver-core-next tree and will be going to Linus for 3.9-rc1.
thanks,
greg k-h
^ permalink raw reply
* [PATCH] ARM: call disable_nonboot_cpus() from machine_shutdown()
From: Stephen Warren @ 2013-01-29 22:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87obgwb5d1.fsf@xmission.com>
On 01/10/2013 11:28 PM, Eric W. Biederman wrote:
...
> I don't have any problem with generic code in the reboot path
> doing:
> if (cpu_online(0))
> set_cpus_allowed_ptr(current, cpumask_of(0));
It looks like that API just affects the scheduler, and not whether the
other CPUs are actually active/hot-plugged-in. At least for my use-case,
I need something that really disables the other CPUs so they aren't
executing code, hence my tendency to hot-un-plug them using
disable_nonboot_cpus(), rather than just shift task execution off them
using the code above.
I wonder if all architectures shouldn't always do the following in all
reboot/shutdown/kexec cases:
* set_cpus_allowed_ptr() to limit code execution to a single CPU.
* disable_nonboot_cpus() (or equivalent) if it's available to turn off
all the other CPUs.
The issue here would be that disable_nonboot_cpus() isn't always
available; I assume that's part of the reason that there are
arch-specific machine_xxx() hooks, so that architectures can
power-off/reset their CPUs even when hotplug isn't enabled? I wonder if
that can be refactored so that reboot/poweroff/kexec can share some
CPU-disable code with CPU hotplug?
^ permalink raw reply
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