* [PATCH v5 07/14] dmaengine: add dma_request_slave_channel_compat()
From: Matt Porter @ 2013-01-30 6:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201301232228.46716.arnd@arndb.de>
On Wed, Jan 23, 2013 at 10:28:46PM +0000, Arnd Bergmann wrote:
> On Tuesday 15 January 2013, Matt Porter wrote:
> > Adds a dma_request_slave_channel_compat() wrapper which accepts
> > both the arguments from dma_request_channel() and
> > dma_request_slave_channel(). Based on whether the driver is
> > instantiated via DT, the appropriate channel request call will be
> > made.
> >
> > This allows for a much cleaner migration of drivers to the
> > dmaengine DT API as platforms continue to be mixed between those
> > that boot using DT and those that do not.
>
> I noticed today some drivers in linux-next that rely on this patch,
> but the patch itself still missing from -next.
>
> > --- a/include/linux/dmaengine.h
> > +++ b/include/linux/dmaengine.h
> > @@ -1047,6 +1047,16 @@ void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
> > struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type);
> > struct dma_chan *net_dma_find_channel(void);
> > #define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y)
> > +static inline struct dma_chan
> > +*dma_request_slave_channel_compat(dma_cap_mask_t mask, dma_filter_fn fn,
> > + void *fn_param, struct device *dev,
> > + char *name)
> > +{
> > + if (dev->of_node)
> > + return dma_request_slave_channel(dev, name);
> > + else
> > + return dma_request_channel(mask, fn, fn_param);
> > +}
>
> Hmm, dma_request_channel is actually a macro that passes mask by reference,
> presumably because it can get modified by the filter function. Also, there
> may be cases where we do have an of_node but don't use the dma binding
> yet, or where dma_request_slave_channel doesn't actually use DT information
> but rather one of the other methods that Vinod was talking about adding.
>
> I think what it should look like instead is the below.
Yes, looks correct now, thanks. I've incorporated it into v6.
-Matt
>
> Arnd
>
> diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
> index bfcdecb..b6ffd7d 100644
> --- a/include/linux/dmaengine.h
> +++ b/include/linux/dmaengine.h
> @@ -993,6 +993,19 @@ static inline void dma_release_channel(struct dma_chan *chan)
> }
> #endif
>
> +static inline struct dma_chan *__dma_request_slave_channel_compat(dma_cap_mask_t *mask,
> + dma_filter_fn fn, void *fn_param, struct device *dev,
> + char *name)
> +{
> + struct dma_chan *chan;
> +
> + chan = dma_request_slave_channel(dev, name);
> + if (chan)
> + return chan;
> +
> + return __dma_request_channel(mask, fn, fn_param);
> +}
> +
> /* --- DMA device --- */
>
> int dma_async_device_register(struct dma_device *device);
> @@ -1001,6 +1014,8 @@ void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
> struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type);
> struct dma_chan *net_dma_find_channel(void);
> #define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y)
> +#define dma_request_slave_channel_compat(mask, x, y, dev, name) \
> + __dma_request_slave_channel_compat(&(mask), x, y, dev, name)
>
> /* --- Helper iov-locking functions --- */
>
> _______________________________________________
> Davinci-linux-open-source mailing list
> Davinci-linux-open-source at linux.davincidsp.com
> http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
^ permalink raw reply
* [PATCH] arm: dts: omap4-sdp: Add I2c pinctrl data
From: Sourav @ 2013-01-30 6:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359527158.14894.37.camel@cumari.coelho.fi>
Hi Luciano,
On Wednesday 30 January 2013 11:55 AM, Luciano Coelho wrote:
> Hi Sourav,
>
> On Mon, 2013-01-28 at 16:47 +0530, Sourav Poddar wrote:
>> Booting 3.8-rc4 om omap 4430sdp results in the following error
>>
>> omap_i2c 48070000.i2c: did not get pins for i2c error: -19
>> [ 1.024261] omap_i2c 48070000.i2c: bus 0 rev0.12 at 100 kHz
>> [ 1.030181] omap_i2c 48072000.i2c: did not get pins for i2c error: -19
>> [ 1.037384] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz
>> [ 1.043762] omap_i2c 48060000.i2c: did not get pins for i2c error: -19
>> [ 1.050964] omap_i2c 48060000.i2c: bus 2 rev0.12 at 100 kHz
>> [ 1.056823] omap_i2c 4807a000.i2c: did not get pins for i2c error: -19
>> [ 1.064025] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz
>>
>> This happens because omap4 dts file is not adapted to use i2c through pinctrl
>> framework. Populating i2c pinctrl data to get rid of the error.
>>
>> Tested on omap4430 sdp with 3.8-rc4 kernel.
>>
>> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
>> Reported-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
>> ---
> Could you do the same thing for panda? I'm getting the same kind of
> errors with it:
Sure, I will do that.
> [ 0.000000] Machine: Generic OMAP4 (Flattened Device Tree), model: TI OMAP4 PandaBoard
> [...]
> [ 2.884826] omap_i2c 48072000.i2c: did not get pins for i2c error: -19
> [ 2.890686] omap_i2c 48072000.i2c: bus 1 rev0.11 at 400 kHz
> [ 2.892028] omap_i2c 48060000.i2c: did not get pins for i2c error: -19
> [ 2.899047] omap_i2c 48060000.i2c: bus 2 rev0.11 at 100 kHz
> [ 2.906677] omap_i2c 48350000.i2c: did not get pins for i2c error: -19
> [ 2.912872] omap_i2c 48350000.i2c: bus 3 rev0.11 at 400 kHz
>
> --
> Cheers,
> Luca.
>
Thanks,
Sourav
^ permalink raw reply
* [PATCH v5 03/14] ARM: edma: add AM33XX support to the private EDMA API
From: Matt Porter @ 2013-01-30 6:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAHp75VeFZ19CCL-4huLNWbsXT-8sGrcvtxN=Dm0s+ojNA3w-3g@mail.gmail.com>
On Mon, Jan 28, 2013 at 09:27:24PM +0200, Andy Shevchenko wrote:
> On Tue, Jan 15, 2013 at 10:32 PM, Matt Porter <mporter@ti.com> wrote:
> > Adds support for parsing the TI EDMA DT data into the required
> > EDMA private API platform data. Enables runtime PM support to
> > initialize the EDMA hwmod. Adds AM33XX EMDA crossbar event mux
> > support.
> >
> > Signed-off-by: Matt Porter <mporter@ti.com>
> > ---
> > arch/arm/common/edma.c | 314 ++++++++++++++++++++++++++++++++++--
> > include/linux/platform_data/edma.h | 1 +
> > 2 files changed, 306 insertions(+), 9 deletions(-)
> >
> > diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
> > index 2dce245..beeb1d2 100644
> > --- a/arch/arm/common/edma.c
> > +++ b/arch/arm/common/edma.c
> > @@ -24,6 +24,13 @@
> > #include <linux/platform_device.h>
> > #include <linux/io.h>
> > #include <linux/slab.h>
> > +#include <linux/edma.h>
> > +#include <linux/err.h>
> > +#include <linux/of_address.h>
> > +#include <linux/of_device.h>
> > +#include <linux/of_dma.h>
> > +#include <linux/of_irq.h>
> > +#include <linux/pm_runtime.h>
> >
> > #include <linux/platform_data/edma.h>
> >
> > @@ -723,6 +730,9 @@ EXPORT_SYMBOL(edma_free_channel);
> > */
> > int edma_alloc_slot(unsigned ctlr, int slot)
> > {
> > + if (!edma_cc[ctlr])
> > + return -EINVAL;
> > +
> > if (slot >= 0)
> > slot = EDMA_CHAN_SLOT(slot);
> >
> > @@ -1366,31 +1376,291 @@ void edma_clear_event(unsigned channel)
> > EXPORT_SYMBOL(edma_clear_event);
> >
> > /*-----------------------------------------------------------------------*/
> > +static int edma_of_read_u32_to_s8_array(const struct device_node *np,
> > + const char *propname, s8 *out_values,
> > + size_t sz)
>
> I'm sorry I didn't get why you couldn't use of_property_read_u8_array() ?
> The similar comment to u16 and so on.
There's some manipulation of the legacy Davinci platform data
structures going on here. The driving reason was to not change any of
the davinci platforms pdata which uses s8/s16 tables of mapping values
with signed values as terminators. These versions below add the
convert to the signed value and terminate the array as needed by the
existing driver. This will all go away when the driver is rewritten and
merged into drivers/dma/edma.c. At that point I want to throwaway all
these legacy data structures. First, there's some more drivers to
convert to dmaengine api.
-Matt
>
> > +{
> > + struct property *prop = of_find_property(np, propname, NULL);
> > + const __be32 *val;
> > +
> > + if (!prop)
> > + return -EINVAL;
> > + if (!prop->value)
> > + return -ENODATA;
> > + if ((sz * sizeof(u32)) > prop->length)
> > + return -EOVERFLOW;
> > +
> > + val = prop->value;
> > +
> > + while (sz--)
> > + *out_values++ = (s8)(be32_to_cpup(val++) & 0xff);
> > +
> > + /* Terminate it */
> > + *out_values++ = -1;
> > + *out_values++ = -1;
> > +
> > + return 0;
> > +}
> > +
> > +static int edma_of_read_u32_to_s16_array(const struct device_node *np,
> > + const char *propname, s16 *out_values,
> > + size_t sz)
> > +{
> > + struct property *prop = of_find_property(np, propname, NULL);
> > + const __be32 *val;
> > +
> > + if (!prop)
> > + return -EINVAL;
> > + if (!prop->value)
> > + return -ENODATA;
> > + if ((sz * sizeof(u32)) > prop->length)
> > + return -EOVERFLOW;
> > +
> > + val = prop->value;
> > +
> > + while (sz--)
> > + *out_values++ = (s16)(be32_to_cpup(val++) & 0xffff);
> > +
> > + /* Terminate it */
> > + *out_values++ = -1;
> > + *out_values++ = -1;
> > +
> > + return 0;
> > +}
> > +
> > +static int edma_xbar_event_map(struct device *dev,
> > + struct device_node *node,
> > + struct edma_soc_info *pdata, int len)
> > +{
> > + int ret = 0;
> > + int i;
> > + struct resource res;
> > + void *xbar;
> > + const s16 (*xbar_chans)[2];
> > + u32 shift, offset, mux;
> > +
> > + xbar_chans = devm_kzalloc(dev,
> > + len/sizeof(s16) + 2*sizeof(s16),
> > + GFP_KERNEL);
> > + if (!xbar_chans)
> > + return -ENOMEM;
> > +
> > + ret = of_address_to_resource(node, 1, &res);
> > + if (IS_ERR_VALUE(ret))
> > + return -EIO;
> > +
> > + xbar = devm_ioremap(dev, res.start, resource_size(&res));
> > + if (!xbar)
> > + return -ENOMEM;
> > +
> > + ret = edma_of_read_u32_to_s16_array(node,
> > + "ti,edma-xbar-event-map",
> > + (s16 *)xbar_chans,
> > + len/sizeof(u32));
> > + if (IS_ERR_VALUE(ret))
> > + return -EIO;
> > +
> > + for (i = 0; xbar_chans[i][0] != -1; i++) {
> > + shift = (xbar_chans[i][1] % 4) * 8;
> > + offset = xbar_chans[i][1] >> 2;
> > + offset <<= 2;
> > + mux = readl((void *)((u32)xbar + offset));
> > + mux &= ~(0xff << shift);
> > + mux |= xbar_chans[i][0] << shift;
> > + writel(mux, (void *)((u32)xbar + offset));
> > + }
> > +
> > + pdata->xbar_chans = xbar_chans;
> > +
> > + return 0;
> > +}
> > +
> > +static int edma_of_parse_dt(struct device *dev,
> > + struct device_node *node,
> > + struct edma_soc_info *pdata)
> > +{
> > + int ret = 0;
> > + u32 value;
> > + struct property *prop;
> > + size_t sz;
> > + struct edma_rsv_info *rsv_info;
> > + const s16 (*rsv_chans)[2], (*rsv_slots)[2];
> > + const s8 (*queue_tc_map)[2], (*queue_priority_map)[2];
> > +
> > + memset(pdata, 0, sizeof(struct edma_soc_info));
> > +
> > + ret = of_property_read_u32(node, "dma-channels", &value);
> > + if (ret < 0)
> > + return ret;
> > + pdata->n_channel = value;
> > +
> > + ret = of_property_read_u32(node, "ti,edma-regions", &value);
> > + if (ret < 0)
> > + return ret;
> > + pdata->n_region = value;
> > +
> > + ret = of_property_read_u32(node, "ti,edma-slots", &value);
> > + if (ret < 0)
> > + return ret;
> > + pdata->n_slot = value;
> > +
> > + pdata->n_cc = 1;
> > + pdata->n_tc = 3;
> > +
> > + rsv_info =
> > + devm_kzalloc(dev, sizeof(struct edma_rsv_info), GFP_KERNEL);
> > + if (!rsv_info)
> > + return -ENOMEM;
> > + pdata->rsv = rsv_info;
> > +
> > + /* Build the reserved channel/slots arrays */
> > + prop = of_find_property(node, "ti,edma-reserved-channels", &sz);
> > + if (prop) {
> > + rsv_chans = devm_kzalloc(dev,
> > + sz/sizeof(s16) + 2*sizeof(s16),
> > + GFP_KERNEL);
> > + if (!rsv_chans)
> > + return -ENOMEM;
> > + pdata->rsv->rsv_chans = rsv_chans;
> > +
> > + ret = edma_of_read_u32_to_s16_array(node,
> > + "ti,edma-reserved-channels",
> > + (s16 *)rsv_chans,
> > + sz/sizeof(u32));
> > + if (ret < 0)
> > + return ret;
> > + }
> > +
> > + prop = of_find_property(node, "ti,edma-reserved-slots", &sz);
> > + if (prop) {
> > + rsv_slots = devm_kzalloc(dev,
> > + sz/sizeof(s16) + 2*sizeof(s16),
> > + GFP_KERNEL);
> > + if (!rsv_slots)
> > + return -ENOMEM;
> > + pdata->rsv->rsv_slots = rsv_slots;
> > +
> > + ret = edma_of_read_u32_to_s16_array(node,
> > + "ti,edma-reserved-slots",
> > + (s16 *)rsv_slots,
> > + sz/sizeof(u32));
> > + if (ret < 0)
> > + return ret;
> > + }
> > +
> > + prop = of_find_property(node, "ti,edma-queue-tc-map", &sz);
> > + if (!prop)
> > + return -EINVAL;
> > +
> > + queue_tc_map = devm_kzalloc(dev,
> > + sz/sizeof(s8) + 2*sizeof(s8),
> > + GFP_KERNEL);
> > + if (!queue_tc_map)
> > + return -ENOMEM;
> > + pdata->queue_tc_mapping = queue_tc_map;
> > +
> > + ret = edma_of_read_u32_to_s8_array(node,
> > + "ti,edma-queue-tc-map",
> > + (s8 *)queue_tc_map,
> > + sz/sizeof(u32));
> > + if (ret < 0)
> > + return ret;
> > +
> > + prop = of_find_property(node, "ti,edma-queue-priority-map", &sz);
> > + if (!prop)
> > + return -EINVAL;
> > +
> > + queue_priority_map = devm_kzalloc(dev,
> > + sz/sizeof(s8) + 2*sizeof(s8),
> > + GFP_KERNEL);
> > + if (!queue_priority_map)
> > + return -ENOMEM;
> > + pdata->queue_priority_mapping = queue_priority_map;
> > +
> > + ret = edma_of_read_u32_to_s8_array(node,
> > + "ti,edma-queue-tc-map",
> > + (s8 *)queue_priority_map,
> > + sz/sizeof(u32));
> > + if (ret < 0)
> > + return ret;
> > +
> > + ret = of_property_read_u32(node, "ti,edma-default-queue", &value);
> > + if (ret < 0)
> > + return ret;
> > + pdata->default_queue = value;
> > +
> > + prop = of_find_property(node, "ti,edma-xbar-event-map", &sz);
> > + if (prop)
> > + ret = edma_xbar_event_map(dev, node, pdata, sz);
> > +
> > + return ret;
> > +}
> > +
> > +static struct of_dma_filter_info edma_filter_info = {
> > + .filter_fn = edma_filter_fn,
> > +};
> >
> > static int edma_probe(struct platform_device *pdev)
> > {
> > struct edma_soc_info **info = pdev->dev.platform_data;
> > + struct edma_soc_info *ninfo[EDMA_MAX_CC] = {NULL, NULL};
> > + struct edma_soc_info tmpinfo;
> > const s8 (*queue_priority_mapping)[2];
> > const s8 (*queue_tc_mapping)[2];
> > int i, j, off, ln, found = 0;
> > int status = -1;
> > const s16 (*rsv_chans)[2];
> > const s16 (*rsv_slots)[2];
> > + const s16 (*xbar_chans)[2];
> > int irq[EDMA_MAX_CC] = {0, 0};
> > int err_irq[EDMA_MAX_CC] = {0, 0};
> > - struct resource *r[EDMA_MAX_CC] = {NULL};
> > + struct resource *r[EDMA_MAX_CC] = {NULL, NULL};
> > + struct resource res[EDMA_MAX_CC];
> > resource_size_t len[EDMA_MAX_CC];
> > char res_name[10];
> > char irq_name[10];
> > + struct device_node *node = pdev->dev.of_node;
> > + struct device *dev = &pdev->dev;
> > + int ret;
> > +
> > + if (node) {
> > + info = ninfo;
> > + edma_of_parse_dt(dev, node, &tmpinfo);
> > + info[0] = &tmpinfo;
> > +
> > + dma_cap_set(DMA_SLAVE, edma_filter_info.dma_cap);
> > + of_dma_controller_register(dev->of_node,
> > + of_dma_simple_xlate,
> > + &edma_filter_info);
> > + }
> >
> > if (!info)
> > return -ENODEV;
> >
> > + pm_runtime_enable(dev);
> > + ret = pm_runtime_get_sync(dev);
> > + if (IS_ERR_VALUE(ret)) {
> > + dev_err(dev, "pm_runtime_get_sync() failed\n");
> > + return ret;
> > + }
> > +
> > for (j = 0; j < EDMA_MAX_CC; j++) {
> > - sprintf(res_name, "edma_cc%d", j);
> > - r[j] = platform_get_resource_byname(pdev, IORESOURCE_MEM,
> > + if (!info[j]) {
> > + if (!found)
> > + return -ENODEV;
> > + break;
> > + }
> > + if (node) {
> > + ret = of_address_to_resource(node, j, &res[j]);
> > + if (!IS_ERR_VALUE(ret))
> > + r[j] = &res[j];
> > + } else {
> > + sprintf(res_name, "edma_cc%d", j);
> > + r[j] = platform_get_resource_byname(pdev,
> > + IORESOURCE_MEM,
> > res_name);
> > - if (!r[j] || !info[j]) {
> > + }
> > + if (!r[j]) {
> > if (found)
> > break;
> > else
> > @@ -1465,8 +1735,22 @@ static int edma_probe(struct platform_device *pdev)
> > }
> > }
> >
> > - sprintf(irq_name, "edma%d", j);
> > - irq[j] = platform_get_irq_byname(pdev, irq_name);
> > + /* Clear the xbar mapped channels in unused list */
> > + xbar_chans = info[j]->xbar_chans;
> > + if (xbar_chans) {
> > + for (i = 0; xbar_chans[i][1] != -1; i++) {
> > + off = xbar_chans[i][1];
> > + clear_bits(off, 1,
> > + edma_cc[j]->edma_unused);
> > + }
> > + }
> > +
> > + if (node)
> > + irq[j] = irq_of_parse_and_map(node, 0);
> > + else {
> > + sprintf(irq_name, "edma%d", j);
> > + irq[j] = platform_get_irq_byname(pdev, irq_name);
> > + }
> > edma_cc[j]->irq_res_start = irq[j];
> > status = request_irq(irq[j], dma_irq_handler, 0, "edma",
> > &pdev->dev);
> > @@ -1476,8 +1760,12 @@ static int edma_probe(struct platform_device *pdev)
> > goto fail;
> > }
> >
> > - sprintf(irq_name, "edma%d_err", j);
> > - err_irq[j] = platform_get_irq_byname(pdev, irq_name);
> > + if (node)
> > + err_irq[j] = irq_of_parse_and_map(node, 2);
> > + else {
> > + sprintf(irq_name, "edma%d_err", j);
> > + err_irq[j] = platform_get_irq_byname(pdev, irq_name);
> > + }
> > edma_cc[j]->irq_res_end = err_irq[j];
> > status = request_irq(err_irq[j], dma_ccerr_handler, 0,
> > "edma_error", &pdev->dev);
> > @@ -1538,9 +1826,17 @@ fail1:
> > return status;
> > }
> >
> > +static const struct of_device_id edma_of_ids[] = {
> > + { .compatible = "ti,edma3", },
> > + {}
> > +};
> >
> > static struct platform_driver edma_driver = {
> > - .driver.name = "edma",
> > + .driver = {
> > + .name = "edma",
> > + .of_match_table = edma_of_ids,
> > + },
> > + .probe = edma_probe,
> > };
> >
> > static int __init edma_init(void)
> > diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
> > index 2344ea2..ffc1fb2 100644
> > --- a/include/linux/platform_data/edma.h
> > +++ b/include/linux/platform_data/edma.h
> > @@ -177,6 +177,7 @@ struct edma_soc_info {
> >
> > const s8 (*queue_tc_mapping)[2];
> > const s8 (*queue_priority_mapping)[2];
> > + const s16 (*xbar_chans)[2];
> > };
> >
> > #endif
> > --
> > 1.7.9.5
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> > the body of a message to majordomo at vger.kernel.org
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
> > Please read the FAQ at http://www.tux.org/lkml/
>
>
>
> --
> With Best Regards,
> Andy Shevchenko
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [RESEND PATCH v5 4/7] usb: chipidea: consolidate ci_role_driver's API for both roles
From: Peter Chen @ 2013-01-30 6:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87vcagmist.fsf@ashishki-desk.ger.corp.intel.com>
On Tue, Jan 29, 2013 at 11:37:22AM +0200, Alexander Shishkin wrote:
> Peter Chen <peter.chen@freescale.com> writes:
>
> > On Fri, Jan 25, 2013 at 02:12:20PM +0200, Alexander Shishkin wrote:
> >> Peter Chen <peter.chen@freescale.com> writes:
> >>
> >> > On Thu, Jan 24, 2013 at 04:35:30PM +0200, Alexander Shishkin wrote:
> >> >> Peter Chen <peter.chen@freescale.com> writes:
> >> >>
> >> >> > - Create init/destroy API for probe and remove
> >> >> > - start/stop API are only used otg id switch process
> >> >> > - Create the gadget at ci_hdrc_probe if the gadget is supported
> >> >> > at that port, the main purpose for this is to avoid gadget module
> >> >> > load fail at init.rc
> >> >>
> >> @@ -402,6 +402,12 @@ static ssize_t store_role(struct device *dev, struct device_attribute *attr,
> >> if (ret)
> >> return ret;
> >>
> >> + /*
> >> + * there won't be an interrupt in case of manual switching,
> >> + * so we need to check vbus session manually
> >> + */
> >> + ci_handle_vbus_change(ci);
> >> +
> > It may not be used as there will be a vbus interrupt.
>
> Not if you write gadget to "role" file.
Let me see, we will only use it for standard-A receptacle port soldered
at OTG port, there is no ID manual switch, and ID pin is grounded.
When the user wants to use it at gadget mode, eg, update image.
1. Plug cable, then write "gadget" to "role" file
It will work as there will be ci_handle_vbus_change(ci) at role_start,
just like we insmod gadget mode when the cable is connecting to host.
2. Write "gadget" to "role" file first, then plug cable
After stopping host, it should close vbus.
After gadget role starts, it will enable vbus interrupt.
Then, when we plug in A-to-A cable, there will be a vbus interrupt, then
active gadget.
> >> return -ENOMEM;
> >>
> >> - rdrv->init = udc_start;
> >> rdrv->start = udc_id_switch_for_device;
> >> rdrv->stop = udc_id_switch_for_host;
> >> - rdrv->destroy = udc_stop;
> > Where we call udc_start and udc_stop? And the udc_start should only be called
> > one time.
>
> ci_hdrc_gadget_init() and ci_hdrc_gadget_destroy(). Look closer at the
> patch.
I am sorry, I still not see udc_stop at ci_hdrc_gadget_destroy().
It doesn't matter. I know what you want to do, let me summery
- Call udc_start at ci_hdrc_gadget_init, but vbus enable function should
only be called if the role is gadget, or vbus interrupt will occur
when the host switches gadget (vbus is off), besides, the ci->vbus_active
will be set at host mode, and ci13xxx_start will operate register
with function hw_device_state(ci, ci->ep0out->qh.dma) if we load module
at host mode. Besides, if we set REG_SHARED, it will reset controller.
- Create two destroy functions for gadget and host, and call them at ci
remove.
Anything I forget, or do you think anything else I need to change?
If you agree, I will send patch for above change.
Do you want this change is on the top of my v5 patch
or just a new v6 patch with above change?
> > - When the OTG port is at host mode, it should not call any
> > register writing operations at gadget's API.
>
> Furthermore, there shouldn't be any calls to the gadget api.
The user may load gadget module when it is at host mode, eg, at
their init script.
--
Best Regards,
Peter Chen
^ permalink raw reply
* [RESEND PATCH v5 3/7] usb: chipidea: add otg id switch and vbus connect/disconnect detect
From: Peter Chen @ 2013-01-30 6:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5108B872.6050706@ti.com>
On Wed, Jan 30, 2013 at 11:36:42AM +0530, kishon wrote:
> Hi,
>
> > bool global_phy;
> > struct usb_phy *transceiver;
> > struct usb_hcd *hcd;
> >- struct usb_otg otg;
> >+ struct usb_otg otg;
> You have added *otg* in previous patch and added a tab for *otg* in
> this patch.
thanks, I will change at previous patch
>
> >+
> >+#define CI_VBUS_STABLE_TIMEOUT 500
>
> Just curious.. how was this timeout value obtained?
Just a timeout value, if the vbus goes to required value, it will quit.
Besides, 5s for vbus stable should be enough for an well behaviour hardware.
>
> Thanks
> Kishon
>
--
Best Regards,
Peter Chen
^ permalink raw reply
* [PATCH v6 00/10] DMA Engine support for AM33XX
From: Matt Porter @ 2013-01-30 7:00 UTC (permalink / raw)
To: linux-arm-kernel
Changes since v5:
- Dropped mmc portion and moved it to a separate series
- Incorporate corrected version of dma_request_slave_channel_compat()
- Fix #defines and enablement of TI_PRIV_EDMA option
Changes since v4:
- Fixed debug section mismatch in private edma api [01/14]
- Respun format-patch to catch the platform_data/edma.h rename [01/14]
- Removed address/size-cells from the EDMA binding [05/14]
Changes since v3:
- Rebased on 3.8-rc3
- No longer an RFC
- Fixed bugs in DT/pdata parsing reported by Vaibhav Bedia
- Restored all the Davinci pdata to const
- Removed max_segs hack in favor of using dma_get_channel_caps()
- Fixed extra parens, __raw_* accessors and, ioremap error checks
in xbar handling
- Removed excess license info in platform_data/edma.h
- Removed unneeded reserved channels data for AM33xx
- Removed test-specific pinmuxing from dts files
- Adjusted mmc1 node to be disabled by default in the dtsi
Changes since v2:
- Rebased on 3.7-rc1
- Fixed bug in DT/pdata parsing first found by Gururaja
that turned out to be masked by some toolchains
- Dropped unused mach-omap2/devices.c hsmmc patch
- Added AM33XX crossbar DMA event mux support
- Added am335x-evm support
Changes since v1:
- Rebased on top of mainline from 12250d8
- Dropped the feature removal schedule patch
- Implemented dma_request_slave_channel_compat() and
converted the mmc and spi drivers to use it
- Dropped unneeded #address-cells and #size-cells from
EDMA DT support
- Moved private EDMA header to linux/platform_data/ and
removed some unneeded definitions
- Fixed parsing of optional properties
This series adds DMA Engine support for AM33xx, which uses
an EDMA DMAC. The EDMA DMAC has been previously supported by only
a private API implementation (much like the situation with OMAP
DMA) found on the DaVinci family of SoCs.
The series applies on top of 3.8-rc5 and the following patches:
- dmaengine DT support and edma dmaengine driver fix from
the git://git.infradead.org/users/vkoul/slave-dma.git next
branch
The approach taken is similar to how OMAP DMA is being converted to
DMA Engine support. With the functional EDMA private API already
existing in mach-davinci/dma.c, we first move that to an ARM common
area so it can be shared. Adding DT and runtime PM support to the
private EDMA API implementation allows it to run on AM33xx. AM33xx
*only* boots using DT so we leverage Jon's generic DT DMA helpers to
register EDMA DMAC with the of_dma framework and then add support
for calling the dma_request_slave_channel() API to both the mmc
and spi drivers.
With this series both BeagleBone and the AM335x EVM have working
SPI DMA support (and MMC support with the separate MMC series).
This is tested on BeagleBone with a SPI framebuffer driver and MMC
rootfs. A trivial gpio DMA event misc driver was used to test the
crossbar DMA event support. It is also tested on the AM335x EVM
with the onboard SPI flash and MMC rootfs. The branch at
https://github.com/ohporter/linux/tree/edma-dmaengine-am33xx-v6
has the complete series, dependencies, and some test
drivers/defconfigs. Note that MMC can only be tested with a
separate MMC dmaengine/DT series applied.
Regression testing was done on AM180x-EVM (which also makes use
of the EDMA dmaengine driver and the EDMA private API) using SD,
SPI flash, and the onboard audio supported by the ASoC Davinci
driver. Regression testing was also done on a BeagleBoard xM
booting from the legacy board file using MMC rootfs.
Matt Porter (10):
ARM: davinci: move private EDMA API to arm/common
ARM: edma: remove unused transfer controller handlers
ARM: edma: add AM33XX support to the private EDMA API
dmaengine: edma: enable build for AM33XX
dmaengine: edma: Add TI EDMA device tree binding
ARM: dts: add AM33XX EDMA support
dmaengine: add dma_request_slave_channel_compat()
spi: omap2-mcspi: convert to dma_request_slave_channel_compat()
spi: omap2-mcspi: add generic DMA request support to the DT binding
ARM: dts: add AM33XX SPI DMA support
Documentation/devicetree/bindings/dma/ti-edma.txt | 49 +++
Documentation/devicetree/bindings/spi/omap-spi.txt | 27 +-
arch/arm/Kconfig | 1 +
arch/arm/boot/dts/am33xx.dtsi | 30 ++
arch/arm/common/Kconfig | 3 +
arch/arm/common/Makefile | 1 +
arch/arm/{mach-davinci/dma.c => common/edma.c} | 355 +++++++++++++++++---
arch/arm/mach-davinci/Makefile | 2 +-
arch/arm/mach-davinci/board-tnetv107x-evm.c | 2 +-
arch/arm/mach-davinci/davinci.h | 2 +-
arch/arm/mach-davinci/devices-tnetv107x.c | 2 +-
arch/arm/mach-davinci/devices.c | 6 +-
arch/arm/mach-davinci/dm355.c | 2 +-
arch/arm/mach-davinci/dm365.c | 2 +-
arch/arm/mach-davinci/dm644x.c | 2 +-
arch/arm/mach-davinci/dm646x.c | 2 +-
arch/arm/mach-davinci/include/mach/da8xx.h | 2 +-
arch/arm/plat-omap/Kconfig | 1 +
drivers/dma/Kconfig | 2 +-
drivers/dma/edma.c | 2 +-
drivers/mmc/host/davinci_mmc.c | 1 +
drivers/spi/spi-omap2-mcspi.c | 65 ++--
include/linux/dmaengine.h | 16 +
include/linux/mfd/davinci_voicecodec.h | 3 +-
.../mach => include/linux/platform_data}/edma.h | 90 +----
include/linux/platform_data/spi-davinci.h | 2 +-
sound/soc/davinci/davinci-evm.c | 1 +
sound/soc/davinci/davinci-pcm.c | 1 +
sound/soc/davinci/davinci-pcm.h | 2 +-
sound/soc/davinci/davinci-sffsdr.c | 7 +-
30 files changed, 509 insertions(+), 174 deletions(-)
create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
rename arch/arm/{mach-davinci/dma.c => common/edma.c} (85%)
rename {arch/arm/mach-davinci/include/mach => include/linux/platform_data}/edma.h (59%)
--
1.7.9.5
^ permalink raw reply
* [PATCH v6 01/10] ARM: davinci: move private EDMA API to arm/common
From: Matt Porter @ 2013-01-30 7:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359529229-22207-1-git-send-email-mporter@ti.com>
Move mach-davinci/dma.c to common/edma.c so it can be used
by OMAP (specifically AM33xx) as well. This just moves the
private EDMA API and enables it to build on OMAP.
Signed-off-by: Matt Porter <mporter@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
---
arch/arm/Kconfig | 1 +
arch/arm/common/Kconfig | 3 +
arch/arm/common/Makefile | 1 +
arch/arm/{mach-davinci/dma.c => common/edma.c} | 4 +-
arch/arm/mach-davinci/Makefile | 2 +-
arch/arm/mach-davinci/board-tnetv107x-evm.c | 2 +-
arch/arm/mach-davinci/davinci.h | 2 +-
arch/arm/mach-davinci/devices-tnetv107x.c | 2 +-
arch/arm/mach-davinci/devices.c | 6 +-
arch/arm/mach-davinci/dm355.c | 2 +-
arch/arm/mach-davinci/dm365.c | 2 +-
arch/arm/mach-davinci/dm644x.c | 2 +-
arch/arm/mach-davinci/dm646x.c | 2 +-
arch/arm/mach-davinci/include/mach/da8xx.h | 2 +-
drivers/dma/edma.c | 2 +-
drivers/mmc/host/davinci_mmc.c | 1 +
include/linux/mfd/davinci_voicecodec.h | 3 +-
.../mach => include/linux/platform_data}/edma.h | 89 +-------------------
include/linux/platform_data/spi-davinci.h | 2 +-
sound/soc/davinci/davinci-evm.c | 1 +
sound/soc/davinci/davinci-pcm.c | 1 +
sound/soc/davinci/davinci-pcm.h | 2 +-
sound/soc/davinci/davinci-sffsdr.c | 7 +-
23 files changed, 35 insertions(+), 106 deletions(-)
rename arch/arm/{mach-davinci/dma.c => common/edma.c} (99%)
rename {arch/arm/mach-davinci/include/mach => include/linux/platform_data}/edma.h (59%)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 67874b8..7637d31 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -932,6 +932,7 @@ config ARCH_DAVINCI
select GENERIC_IRQ_CHIP
select HAVE_IDE
select NEED_MACH_GPIO_H
+ select TI_PRIV_EDMA
select USE_OF
select ZONE_DMA
help
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 45ceeb0..9e32d0d 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -40,3 +40,6 @@ config SHARP_PARAM
config SHARP_SCOOP
bool
+
+config TI_PRIV_EDMA
+ bool
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index e8a4e58..d09a39b 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o
obj-$(CONFIG_SHARP_SCOOP) += scoop.o
obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o
+obj-$(CONFIG_TI_PRIV_EDMA) += edma.o
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/common/edma.c
similarity index 99%
rename from arch/arm/mach-davinci/dma.c
rename to arch/arm/common/edma.c
index a685e97..be3c04a 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/common/edma.c
@@ -25,7 +25,7 @@
#include <linux/io.h>
#include <linux/slab.h>
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
/* Offsets matching "struct edmacc_param" */
#define PARM_OPT 0x00
@@ -1387,7 +1387,7 @@ EXPORT_SYMBOL(edma_clear_event);
/*-----------------------------------------------------------------------*/
-static int __init edma_probe(struct platform_device *pdev)
+static int edma_probe(struct platform_device *pdev)
{
struct edma_soc_info **info = pdev->dev.platform_data;
const s8 (*queue_priority_mapping)[2];
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index fb5c1aa..493a36b 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -5,7 +5,7 @@
# Common objects
obj-y := time.o clock.o serial.o psc.o \
- dma.o usb.o common.o sram.o aemif.o
+ usb.o common.o sram.o aemif.o
obj-$(CONFIG_DAVINCI_MUX) += mux.o
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
index be30997..86f55ba 100644
--- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
+++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
@@ -26,12 +26,12 @@
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/spi/spi.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/irqs.h>
-#include <mach/edma.h>
#include <mach/mux.h>
#include <mach/cp_intc.h>
#include <mach/tnetv107x.h>
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 12d544b..d26a6bc 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -23,9 +23,9 @@
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/platform_data/davinci_asp.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/keyscan-davinci.h>
#include <mach/hardware.h>
-#include <mach/edma.h>
#include <media/davinci/vpfe_capture.h>
#include <media/davinci/vpif_types.h>
diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c
index 773ab07..ba37760 100644
--- a/arch/arm/mach-davinci/devices-tnetv107x.c
+++ b/arch/arm/mach-davinci/devices-tnetv107x.c
@@ -18,10 +18,10 @@
#include <linux/dma-mapping.h>
#include <linux/clk.h>
#include <linux/slab.h>
+#include <linux/platform_data/edma.h>
#include <mach/common.h>
#include <mach/irqs.h>
-#include <mach/edma.h>
#include <mach/tnetv107x.h>
#include "clock.h"
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 4c48a36..ca0c7b3 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -19,9 +19,10 @@
#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/mux.h>
-#include <mach/edma.h>
#include <linux/platform_data/mmc-davinci.h>
#include <mach/time.h>
+#include <linux/platform_data/edma.h>
+
#include "davinci.h"
#include "clock.h"
@@ -34,6 +35,9 @@
#define DM365_MMCSD0_BASE 0x01D11000
#define DM365_MMCSD1_BASE 0x01D00000
+#define DAVINCI_DMA_MMCRXEVT 26
+#define DAVINCI_DMA_MMCTXEVT 27
+
void __iomem *davinci_sysmod_base;
void davinci_map_sysmod(void)
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index b49c3b7..53998d8 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -19,7 +19,6 @@
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/psc.h>
#include <mach/mux.h>
#include <mach/irqs.h>
@@ -28,6 +27,7 @@
#include <mach/common.h>
#include <linux/platform_data/spi-davinci.h>
#include <mach/gpio-davinci.h>
+#include <linux/platform_data/edma.h>
#include "davinci.h"
#include "clock.h"
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 6c39805..9b41d33 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -18,11 +18,11 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/spi/spi.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/psc.h>
#include <mach/mux.h>
#include <mach/irqs.h>
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 11c79a3..a08910e 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -12,11 +12,11 @@
#include <linux/clk.h>
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/irqs.h>
#include <mach/psc.h>
#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index ac7b431..6d52a32 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -13,11 +13,11 @@
#include <linux/clk.h>
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/irqs.h>
#include <mach/psc.h>
#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 700d311..9d77f9b 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -20,8 +20,8 @@
#include <linux/videodev2.h>
#include <mach/serial.h>
-#include <mach/edma.h>
#include <mach/pm.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/i2c-davinci.h>
#include <linux/platform_data/mmc-davinci.h>
#include <linux/platform_data/usb-davinci.h>
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index 06ea4b8..9c7d16b 100644
--- a/drivers/dma/edma.c
+++ b/drivers/dma/edma.c
@@ -24,7 +24,7 @@
#include <linux/slab.h>
#include <linux/spinlock.h>
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
#include "dmaengine.h"
#include "virt-dma.h"
diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c
index 2063677..f5d46ea 100644
--- a/drivers/mmc/host/davinci_mmc.c
+++ b/drivers/mmc/host/davinci_mmc.c
@@ -35,6 +35,7 @@
#include <linux/edma.h>
#include <linux/mmc/mmc.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/mmc-davinci.h>
/*
diff --git a/include/linux/mfd/davinci_voicecodec.h b/include/linux/mfd/davinci_voicecodec.h
index 0ab6132..7dd6524 100644
--- a/include/linux/mfd/davinci_voicecodec.h
+++ b/include/linux/mfd/davinci_voicecodec.h
@@ -26,8 +26,7 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/mfd/core.h>
-
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
/*
* Register values.
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/include/linux/platform_data/edma.h
similarity index 59%
rename from arch/arm/mach-davinci/include/mach/edma.h
rename to include/linux/platform_data/edma.h
index 7e84c90..2344ea2 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/include/linux/platform_data/edma.h
@@ -1,28 +1,12 @@
/*
- * TI DAVINCI dma definitions
+ * TI EDMA definitions
*
- * Copyright (C) 2006-2009 Texas Instruments.
+ * Copyright (C) 2006-2013 Texas Instruments.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
*/
/*
@@ -69,11 +53,6 @@ struct edmacc_param {
unsigned int ccnt;
};
-#define CCINT0_INTERRUPT 16
-#define CCERRINT_INTERRUPT 17
-#define TCERRINT0_INTERRUPT 18
-#define TCERRINT1_INTERRUPT 19
-
/* fields in edmacc_param.opt */
#define SAM BIT(0)
#define DAM BIT(1)
@@ -87,70 +66,6 @@ struct edmacc_param {
#define TCCHEN BIT(22)
#define ITCCHEN BIT(23)
-#define TRWORD (0x7<<2)
-#define PAENTRY (0x1ff<<5)
-
-/* Drivers should avoid using these symbolic names for dm644x
- * channels, and use platform_device IORESOURCE_DMA resources
- * instead. (Other DaVinci chips have different peripherals
- * and thus have different DMA channel mappings.)
- */
-#define DAVINCI_DMA_MCBSP_TX 2
-#define DAVINCI_DMA_MCBSP_RX 3
-#define DAVINCI_DMA_VPSS_HIST 4
-#define DAVINCI_DMA_VPSS_H3A 5
-#define DAVINCI_DMA_VPSS_PRVU 6
-#define DAVINCI_DMA_VPSS_RSZ 7
-#define DAVINCI_DMA_IMCOP_IMXINT 8
-#define DAVINCI_DMA_IMCOP_VLCDINT 9
-#define DAVINCI_DMA_IMCO_PASQINT 10
-#define DAVINCI_DMA_IMCOP_DSQINT 11
-#define DAVINCI_DMA_SPI_SPIX 16
-#define DAVINCI_DMA_SPI_SPIR 17
-#define DAVINCI_DMA_UART0_URXEVT0 18
-#define DAVINCI_DMA_UART0_UTXEVT0 19
-#define DAVINCI_DMA_UART1_URXEVT1 20
-#define DAVINCI_DMA_UART1_UTXEVT1 21
-#define DAVINCI_DMA_UART2_URXEVT2 22
-#define DAVINCI_DMA_UART2_UTXEVT2 23
-#define DAVINCI_DMA_MEMSTK_MSEVT 24
-#define DAVINCI_DMA_MMCRXEVT 26
-#define DAVINCI_DMA_MMCTXEVT 27
-#define DAVINCI_DMA_I2C_ICREVT 28
-#define DAVINCI_DMA_I2C_ICXEVT 29
-#define DAVINCI_DMA_GPIO_GPINT0 32
-#define DAVINCI_DMA_GPIO_GPINT1 33
-#define DAVINCI_DMA_GPIO_GPINT2 34
-#define DAVINCI_DMA_GPIO_GPINT3 35
-#define DAVINCI_DMA_GPIO_GPINT4 36
-#define DAVINCI_DMA_GPIO_GPINT5 37
-#define DAVINCI_DMA_GPIO_GPINT6 38
-#define DAVINCI_DMA_GPIO_GPINT7 39
-#define DAVINCI_DMA_GPIO_GPBNKINT0 40
-#define DAVINCI_DMA_GPIO_GPBNKINT1 41
-#define DAVINCI_DMA_GPIO_GPBNKINT2 42
-#define DAVINCI_DMA_GPIO_GPBNKINT3 43
-#define DAVINCI_DMA_GPIO_GPBNKINT4 44
-#define DAVINCI_DMA_TIMER0_TINT0 48
-#define DAVINCI_DMA_TIMER1_TINT1 49
-#define DAVINCI_DMA_TIMER2_TINT2 50
-#define DAVINCI_DMA_TIMER3_TINT3 51
-#define DAVINCI_DMA_PWM0 52
-#define DAVINCI_DMA_PWM1 53
-#define DAVINCI_DMA_PWM2 54
-
-/* DA830 specific EDMA3 information */
-#define EDMA_DA830_NUM_DMACH 32
-#define EDMA_DA830_NUM_TCC 32
-#define EDMA_DA830_NUM_PARAMENTRY 128
-#define EDMA_DA830_NUM_EVQUE 2
-#define EDMA_DA830_NUM_TC 2
-#define EDMA_DA830_CHMAP_EXIST 0
-#define EDMA_DA830_NUM_REGIONS 4
-#define DA830_DMACH2EVENT_MAP0 0x000FC03Fu
-#define DA830_DMACH2EVENT_MAP1 0x00000000u
-#define DA830_EDMA_ARM_OWN 0x30FFCCFFu
-
/*ch_status paramater of callback function possible values*/
#define DMA_COMPLETE 1
#define DMA_CC_ERROR 2
diff --git a/include/linux/platform_data/spi-davinci.h b/include/linux/platform_data/spi-davinci.h
index 7af305b..8dc2fa47 100644
--- a/include/linux/platform_data/spi-davinci.h
+++ b/include/linux/platform_data/spi-davinci.h
@@ -19,7 +19,7 @@
#ifndef __ARCH_ARM_DAVINCI_SPI_H
#define __ARCH_ARM_DAVINCI_SPI_H
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
#define SPI_INTERN_CS 0xFF
diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c
index d55e647..591f547 100644
--- a/sound/soc/davinci/davinci-evm.c
+++ b/sound/soc/davinci/davinci-evm.c
@@ -14,6 +14,7 @@
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <linux/i2c.h>
#include <sound/core.h>
#include <sound/pcm.h>
diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c
index afab81f..9bdd71b 100644
--- a/sound/soc/davinci/davinci-pcm.c
+++ b/sound/soc/davinci/davinci-pcm.c
@@ -17,6 +17,7 @@
#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include <linux/genalloc.h>
+#include <linux/platform_data/edma.h>
#include <sound/core.h>
#include <sound/pcm.h>
diff --git a/sound/soc/davinci/davinci-pcm.h b/sound/soc/davinci/davinci-pcm.h
index b6ef703..fbb710c 100644
--- a/sound/soc/davinci/davinci-pcm.h
+++ b/sound/soc/davinci/davinci-pcm.h
@@ -14,7 +14,7 @@
#include <linux/genalloc.h>
#include <linux/platform_data/davinci_asp.h>
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
struct davinci_pcm_dma_params {
int channel; /* sync dma channel ID */
diff --git a/sound/soc/davinci/davinci-sffsdr.c b/sound/soc/davinci/davinci-sffsdr.c
index 5be65aa..a45af64 100644
--- a/sound/soc/davinci/davinci-sffsdr.c
+++ b/sound/soc/davinci/davinci-sffsdr.c
@@ -17,6 +17,7 @@
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <linux/gpio.h>
#include <sound/core.h>
#include <sound/pcm.h>
@@ -28,12 +29,14 @@
#include <asm/plat-sffsdr/sffsdr-fpga.h>
#endif
-#include <mach/edma.h>
#include "../codecs/pcm3008.h"
#include "davinci-pcm.h"
#include "davinci-i2s.h"
+#define DAVINCI_DMA_MCBSP_TX 2
+#define DAVINCI_DMA_MCBSP_RX 3
+
/*
* CLKX and CLKR are the inputs for the Sample Rate Generator.
* FSX and FSR are outputs, driven by the sample Rate Generator.
@@ -124,7 +127,7 @@ static struct resource sffsdr_snd_resources[] = {
static struct evm_snd_platform_data sffsdr_snd_data = {
.tx_dma_ch = DAVINCI_DMA_MCBSP_TX,
- .rx_dma_ch = DAVINCI_DMA_MCBSP_RX,
+ .rx_dma_ch = DAVINCI_DMA_MCBAP_RX,
};
static struct platform_device *sffsdr_snd_device;
--
1.7.9.5
^ permalink raw reply related
* [PATCH v6 02/10] ARM: edma: remove unused transfer controller handlers
From: Matt Porter @ 2013-01-30 7:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359529229-22207-1-git-send-email-mporter@ti.com>
Fix build on OMAP, the irqs are undefined on AM33xx.
These error interrupt handlers were hardcoded as disabled
so since they are unused code, simply remove them.
Signed-off-by: Matt Porter <mporter@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
---
arch/arm/common/edma.c | 37 -------------------------------------
1 file changed, 37 deletions(-)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index be3c04a..2dce245 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -494,26 +494,6 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
return IRQ_HANDLED;
}
-/******************************************************************************
- *
- * Transfer controller error interrupt handlers
- *
- *****************************************************************************/
-
-#define tc_errs_handled false /* disabled as long as they're NOPs */
-
-static irqreturn_t dma_tc0err_handler(int irq, void *data)
-{
- dev_dbg(data, "dma_tc0err_handler\n");
- return IRQ_HANDLED;
-}
-
-static irqreturn_t dma_tc1err_handler(int irq, void *data)
-{
- dev_dbg(data, "dma_tc1err_handler\n");
- return IRQ_HANDLED;
-}
-
static int reserve_contiguous_slots(int ctlr, unsigned int id,
unsigned int num_slots,
unsigned int start_slot)
@@ -1538,23 +1518,6 @@ static int edma_probe(struct platform_device *pdev)
arch_num_cc++;
}
- if (tc_errs_handled) {
- status = request_irq(IRQ_TCERRINT0, dma_tc0err_handler, 0,
- "edma_tc0", &pdev->dev);
- if (status < 0) {
- dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n",
- IRQ_TCERRINT0, status);
- return status;
- }
- status = request_irq(IRQ_TCERRINT, dma_tc1err_handler, 0,
- "edma_tc1", &pdev->dev);
- if (status < 0) {
- dev_dbg(&pdev->dev, "request_irq %d --> %d\n",
- IRQ_TCERRINT, status);
- return status;
- }
- }
-
return 0;
fail:
--
1.7.9.5
^ permalink raw reply related
* [PATCH v6 03/10] ARM: edma: add AM33XX support to the private EDMA API
From: Matt Porter @ 2013-01-30 7:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359529229-22207-1-git-send-email-mporter@ti.com>
Adds support for parsing the TI EDMA DT data into the required
EDMA private API platform data. Enables runtime PM support to
initialize the EDMA hwmod. Adds AM33XX EMDA crossbar event mux
support.
Signed-off-by: Matt Porter <mporter@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
---
arch/arm/common/edma.c | 314 ++++++++++++++++++++++++++++++++++--
arch/arm/plat-omap/Kconfig | 1 +
include/linux/platform_data/edma.h | 1 +
3 files changed, 307 insertions(+), 9 deletions(-)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index 2dce245..beeb1d2 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -24,6 +24,13 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/slab.h>
+#include <linux/edma.h>
+#include <linux/err.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_dma.h>
+#include <linux/of_irq.h>
+#include <linux/pm_runtime.h>
#include <linux/platform_data/edma.h>
@@ -723,6 +730,9 @@ EXPORT_SYMBOL(edma_free_channel);
*/
int edma_alloc_slot(unsigned ctlr, int slot)
{
+ if (!edma_cc[ctlr])
+ return -EINVAL;
+
if (slot >= 0)
slot = EDMA_CHAN_SLOT(slot);
@@ -1366,31 +1376,291 @@ void edma_clear_event(unsigned channel)
EXPORT_SYMBOL(edma_clear_event);
/*-----------------------------------------------------------------------*/
+static int edma_of_read_u32_to_s8_array(const struct device_node *np,
+ const char *propname, s8 *out_values,
+ size_t sz)
+{
+ struct property *prop = of_find_property(np, propname, NULL);
+ const __be32 *val;
+
+ if (!prop)
+ return -EINVAL;
+ if (!prop->value)
+ return -ENODATA;
+ if ((sz * sizeof(u32)) > prop->length)
+ return -EOVERFLOW;
+
+ val = prop->value;
+
+ while (sz--)
+ *out_values++ = (s8)(be32_to_cpup(val++) & 0xff);
+
+ /* Terminate it */
+ *out_values++ = -1;
+ *out_values++ = -1;
+
+ return 0;
+}
+
+static int edma_of_read_u32_to_s16_array(const struct device_node *np,
+ const char *propname, s16 *out_values,
+ size_t sz)
+{
+ struct property *prop = of_find_property(np, propname, NULL);
+ const __be32 *val;
+
+ if (!prop)
+ return -EINVAL;
+ if (!prop->value)
+ return -ENODATA;
+ if ((sz * sizeof(u32)) > prop->length)
+ return -EOVERFLOW;
+
+ val = prop->value;
+
+ while (sz--)
+ *out_values++ = (s16)(be32_to_cpup(val++) & 0xffff);
+
+ /* Terminate it */
+ *out_values++ = -1;
+ *out_values++ = -1;
+
+ return 0;
+}
+
+static int edma_xbar_event_map(struct device *dev,
+ struct device_node *node,
+ struct edma_soc_info *pdata, int len)
+{
+ int ret = 0;
+ int i;
+ struct resource res;
+ void *xbar;
+ const s16 (*xbar_chans)[2];
+ u32 shift, offset, mux;
+
+ xbar_chans = devm_kzalloc(dev,
+ len/sizeof(s16) + 2*sizeof(s16),
+ GFP_KERNEL);
+ if (!xbar_chans)
+ return -ENOMEM;
+
+ ret = of_address_to_resource(node, 1, &res);
+ if (IS_ERR_VALUE(ret))
+ return -EIO;
+
+ xbar = devm_ioremap(dev, res.start, resource_size(&res));
+ if (!xbar)
+ return -ENOMEM;
+
+ ret = edma_of_read_u32_to_s16_array(node,
+ "ti,edma-xbar-event-map",
+ (s16 *)xbar_chans,
+ len/sizeof(u32));
+ if (IS_ERR_VALUE(ret))
+ return -EIO;
+
+ for (i = 0; xbar_chans[i][0] != -1; i++) {
+ shift = (xbar_chans[i][1] % 4) * 8;
+ offset = xbar_chans[i][1] >> 2;
+ offset <<= 2;
+ mux = readl((void *)((u32)xbar + offset));
+ mux &= ~(0xff << shift);
+ mux |= xbar_chans[i][0] << shift;
+ writel(mux, (void *)((u32)xbar + offset));
+ }
+
+ pdata->xbar_chans = xbar_chans;
+
+ return 0;
+}
+
+static int edma_of_parse_dt(struct device *dev,
+ struct device_node *node,
+ struct edma_soc_info *pdata)
+{
+ int ret = 0;
+ u32 value;
+ struct property *prop;
+ size_t sz;
+ struct edma_rsv_info *rsv_info;
+ const s16 (*rsv_chans)[2], (*rsv_slots)[2];
+ const s8 (*queue_tc_map)[2], (*queue_priority_map)[2];
+
+ memset(pdata, 0, sizeof(struct edma_soc_info));
+
+ ret = of_property_read_u32(node, "dma-channels", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_channel = value;
+
+ ret = of_property_read_u32(node, "ti,edma-regions", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_region = value;
+
+ ret = of_property_read_u32(node, "ti,edma-slots", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_slot = value;
+
+ pdata->n_cc = 1;
+ pdata->n_tc = 3;
+
+ rsv_info =
+ devm_kzalloc(dev, sizeof(struct edma_rsv_info), GFP_KERNEL);
+ if (!rsv_info)
+ return -ENOMEM;
+ pdata->rsv = rsv_info;
+
+ /* Build the reserved channel/slots arrays */
+ prop = of_find_property(node, "ti,edma-reserved-channels", &sz);
+ if (prop) {
+ rsv_chans = devm_kzalloc(dev,
+ sz/sizeof(s16) + 2*sizeof(s16),
+ GFP_KERNEL);
+ if (!rsv_chans)
+ return -ENOMEM;
+ pdata->rsv->rsv_chans = rsv_chans;
+
+ ret = edma_of_read_u32_to_s16_array(node,
+ "ti,edma-reserved-channels",
+ (s16 *)rsv_chans,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+ }
+
+ prop = of_find_property(node, "ti,edma-reserved-slots", &sz);
+ if (prop) {
+ rsv_slots = devm_kzalloc(dev,
+ sz/sizeof(s16) + 2*sizeof(s16),
+ GFP_KERNEL);
+ if (!rsv_slots)
+ return -ENOMEM;
+ pdata->rsv->rsv_slots = rsv_slots;
+
+ ret = edma_of_read_u32_to_s16_array(node,
+ "ti,edma-reserved-slots",
+ (s16 *)rsv_slots,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+ }
+
+ prop = of_find_property(node, "ti,edma-queue-tc-map", &sz);
+ if (!prop)
+ return -EINVAL;
+
+ queue_tc_map = devm_kzalloc(dev,
+ sz/sizeof(s8) + 2*sizeof(s8),
+ GFP_KERNEL);
+ if (!queue_tc_map)
+ return -ENOMEM;
+ pdata->queue_tc_mapping = queue_tc_map;
+
+ ret = edma_of_read_u32_to_s8_array(node,
+ "ti,edma-queue-tc-map",
+ (s8 *)queue_tc_map,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+
+ prop = of_find_property(node, "ti,edma-queue-priority-map", &sz);
+ if (!prop)
+ return -EINVAL;
+
+ queue_priority_map = devm_kzalloc(dev,
+ sz/sizeof(s8) + 2*sizeof(s8),
+ GFP_KERNEL);
+ if (!queue_priority_map)
+ return -ENOMEM;
+ pdata->queue_priority_mapping = queue_priority_map;
+
+ ret = edma_of_read_u32_to_s8_array(node,
+ "ti,edma-queue-tc-map",
+ (s8 *)queue_priority_map,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+
+ ret = of_property_read_u32(node, "ti,edma-default-queue", &value);
+ if (ret < 0)
+ return ret;
+ pdata->default_queue = value;
+
+ prop = of_find_property(node, "ti,edma-xbar-event-map", &sz);
+ if (prop)
+ ret = edma_xbar_event_map(dev, node, pdata, sz);
+
+ return ret;
+}
+
+static struct of_dma_filter_info edma_filter_info = {
+ .filter_fn = edma_filter_fn,
+};
static int edma_probe(struct platform_device *pdev)
{
struct edma_soc_info **info = pdev->dev.platform_data;
+ struct edma_soc_info *ninfo[EDMA_MAX_CC] = {NULL, NULL};
+ struct edma_soc_info tmpinfo;
const s8 (*queue_priority_mapping)[2];
const s8 (*queue_tc_mapping)[2];
int i, j, off, ln, found = 0;
int status = -1;
const s16 (*rsv_chans)[2];
const s16 (*rsv_slots)[2];
+ const s16 (*xbar_chans)[2];
int irq[EDMA_MAX_CC] = {0, 0};
int err_irq[EDMA_MAX_CC] = {0, 0};
- struct resource *r[EDMA_MAX_CC] = {NULL};
+ struct resource *r[EDMA_MAX_CC] = {NULL, NULL};
+ struct resource res[EDMA_MAX_CC];
resource_size_t len[EDMA_MAX_CC];
char res_name[10];
char irq_name[10];
+ struct device_node *node = pdev->dev.of_node;
+ struct device *dev = &pdev->dev;
+ int ret;
+
+ if (node) {
+ info = ninfo;
+ edma_of_parse_dt(dev, node, &tmpinfo);
+ info[0] = &tmpinfo;
+
+ dma_cap_set(DMA_SLAVE, edma_filter_info.dma_cap);
+ of_dma_controller_register(dev->of_node,
+ of_dma_simple_xlate,
+ &edma_filter_info);
+ }
if (!info)
return -ENODEV;
+ pm_runtime_enable(dev);
+ ret = pm_runtime_get_sync(dev);
+ if (IS_ERR_VALUE(ret)) {
+ dev_err(dev, "pm_runtime_get_sync() failed\n");
+ return ret;
+ }
+
for (j = 0; j < EDMA_MAX_CC; j++) {
- sprintf(res_name, "edma_cc%d", j);
- r[j] = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ if (!info[j]) {
+ if (!found)
+ return -ENODEV;
+ break;
+ }
+ if (node) {
+ ret = of_address_to_resource(node, j, &res[j]);
+ if (!IS_ERR_VALUE(ret))
+ r[j] = &res[j];
+ } else {
+ sprintf(res_name, "edma_cc%d", j);
+ r[j] = platform_get_resource_byname(pdev,
+ IORESOURCE_MEM,
res_name);
- if (!r[j] || !info[j]) {
+ }
+ if (!r[j]) {
if (found)
break;
else
@@ -1465,8 +1735,22 @@ static int edma_probe(struct platform_device *pdev)
}
}
- sprintf(irq_name, "edma%d", j);
- irq[j] = platform_get_irq_byname(pdev, irq_name);
+ /* Clear the xbar mapped channels in unused list */
+ xbar_chans = info[j]->xbar_chans;
+ if (xbar_chans) {
+ for (i = 0; xbar_chans[i][1] != -1; i++) {
+ off = xbar_chans[i][1];
+ clear_bits(off, 1,
+ edma_cc[j]->edma_unused);
+ }
+ }
+
+ if (node)
+ irq[j] = irq_of_parse_and_map(node, 0);
+ else {
+ sprintf(irq_name, "edma%d", j);
+ irq[j] = platform_get_irq_byname(pdev, irq_name);
+ }
edma_cc[j]->irq_res_start = irq[j];
status = request_irq(irq[j], dma_irq_handler, 0, "edma",
&pdev->dev);
@@ -1476,8 +1760,12 @@ static int edma_probe(struct platform_device *pdev)
goto fail;
}
- sprintf(irq_name, "edma%d_err", j);
- err_irq[j] = platform_get_irq_byname(pdev, irq_name);
+ if (node)
+ err_irq[j] = irq_of_parse_and_map(node, 2);
+ else {
+ sprintf(irq_name, "edma%d_err", j);
+ err_irq[j] = platform_get_irq_byname(pdev, irq_name);
+ }
edma_cc[j]->irq_res_end = err_irq[j];
status = request_irq(err_irq[j], dma_ccerr_handler, 0,
"edma_error", &pdev->dev);
@@ -1538,9 +1826,17 @@ fail1:
return status;
}
+static const struct of_device_id edma_of_ids[] = {
+ { .compatible = "ti,edma3", },
+ {}
+};
static struct platform_driver edma_driver = {
- .driver.name = "edma",
+ .driver = {
+ .name = "edma",
+ .of_match_table = edma_of_ids,
+ },
+ .probe = edma_probe,
};
static int __init edma_init(void)
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 665870d..0b81d6c 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -29,6 +29,7 @@ config ARCH_OMAP2PLUS
select PINCTRL
select PROC_DEVICETREE if PROC_FS
select SPARSE_IRQ
+ select TI_PRIV_EDMA
select USE_OF
help
"Systems based on OMAP2, OMAP3, OMAP4 or OMAP5"
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
index 2344ea2..ffc1fb2 100644
--- a/include/linux/platform_data/edma.h
+++ b/include/linux/platform_data/edma.h
@@ -177,6 +177,7 @@ struct edma_soc_info {
const s8 (*queue_tc_mapping)[2];
const s8 (*queue_priority_mapping)[2];
+ const s16 (*xbar_chans)[2];
};
#endif
--
1.7.9.5
^ permalink raw reply related
* [PATCH v6 04/10] dmaengine: edma: enable build for AM33XX
From: Matt Porter @ 2013-01-30 7:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359529229-22207-1-git-send-email-mporter@ti.com>
Enable TI EDMA option on OMAP.
Signed-off-by: Matt Porter <mporter@ti.com>
---
drivers/dma/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 0b408bb..239020b 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -220,7 +220,7 @@ config SIRF_DMA
config TI_EDMA
tristate "TI EDMA support"
- depends on ARCH_DAVINCI
+ depends on ARCH_DAVINCI || ARCH_OMAP
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS
default n
--
1.7.9.5
^ permalink raw reply related
* [PATCH v6 05/10] dmaengine: edma: Add TI EDMA device tree binding
From: Matt Porter @ 2013-01-30 7:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359529229-22207-1-git-send-email-mporter@ti.com>
The binding definition is based on the generic DMA controller
binding.
Signed-off-by: Matt Porter <mporter@ti.com>
---
Documentation/devicetree/bindings/dma/ti-edma.txt | 49 +++++++++++++++++++++
1 file changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
diff --git a/Documentation/devicetree/bindings/dma/ti-edma.txt b/Documentation/devicetree/bindings/dma/ti-edma.txt
new file mode 100644
index 0000000..075a60e3
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/ti-edma.txt
@@ -0,0 +1,49 @@
+TI EDMA
+
+Required properties:
+- compatible : "ti,edma3"
+- ti,hwmods: Name of the hwmods associated to the EDMA
+- ti,edma-regions: Number of regions
+- ti,edma-slots: Number of slots
+- ti,edma-queue-tc-map: List of transfer control to queue mappings
+- ti,edma-queue-priority-map: List of queue priority mappings
+- ti,edma-default-queue: Default queue value
+
+Optional properties:
+- ti,edma-reserved-channels: List of reserved channel regions
+- ti,edma-reserved-slots: List of reserved slot regions
+- ti,edma-xbar-event-map: Crossbar event to channel map
+
+Example:
+
+edma: edma at 49000000 {
+ reg = <0x49000000 0x10000>;
+ interrupt-parent = <&intc>;
+ interrupts = <12 13 14>;
+ compatible = "ti,edma3";
+ ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
+ #dma-cells = <1>;
+ dma-channels = <64>;
+ ti,edma-regions = <4>;
+ ti,edma-slots = <256>;
+ ti,edma-reserved-channels = <0 2
+ 14 2
+ 26 6
+ 48 4
+ 56 8>;
+ ti,edma-reserved-slots = <0 2
+ 14 2
+ 26 6
+ 48 4
+ 56 8
+ 64 127>;
+ ti,edma-queue-tc-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-queue-priority-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-default-queue = <0>;
+ ti,edma-xbar-event-map = <1 12
+ 2 13>;
+};
--
1.7.9.5
^ permalink raw reply related
* [PATCH v6 06/10] ARM: dts: add AM33XX EDMA support
From: Matt Porter @ 2013-01-30 7:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359529229-22207-1-git-send-email-mporter@ti.com>
Adds AM33XX EDMA support to the am33xx.dtsi as documented in
Documentation/devicetree/bindings/dma/ti-edma.txt
Signed-off-by: Matt Porter <mporter@ti.com>
---
arch/arm/boot/dts/am33xx.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index c2f14e8..e711ffb 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -87,6 +87,26 @@
reg = <0x48200000 0x1000>;
};
+ edma: edma at 49000000 {
+ compatible = "ti,edma3";
+ ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
+ reg = <0x49000000 0x10000>,
+ <0x44e10f90 0x10>;
+ interrupt-parent = <&intc>;
+ interrupts = <12 13 14>;
+ #dma-cells = <1>;
+ dma-channels = <64>;
+ ti,edma-regions = <4>;
+ ti,edma-slots = <256>;
+ ti,edma-queue-tc-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-queue-priority-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-default-queue = <0>;
+ };
+
gpio1: gpio at 44e07000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio1";
--
1.7.9.5
^ permalink raw reply related
* [PATCH v6 07/10] dmaengine: add dma_request_slave_channel_compat()
From: Matt Porter @ 2013-01-30 7:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359529229-22207-1-git-send-email-mporter@ti.com>
Adds a dma_request_slave_channel_compat() wrapper which accepts
both the arguments from dma_request_channel() and
dma_request_slave_channel(). Based on whether the driver is
instantiated via DT, the appropriate channel request call will be
made.
This allows for a much cleaner migration of drivers to the
dmaengine DT API as platforms continue to be mixed between those
that boot using DT and those that do not.
Suggested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Matt Porter <mporter@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
---
include/linux/dmaengine.h | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index bfcdecb..17d8ffd 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -1001,6 +1001,22 @@ void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type);
struct dma_chan *net_dma_find_channel(void);
#define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y)
+#define dma_request_slave_channel_compat(mask, x, y, dev, name) \
+ __dma_request_slave_channel_compat(&(mask), x, y, dev, name)
+
+static inline struct dma_chan
+*__dma_request_slave_channel_compat(dma_cap_mask_t *mask, dma_filter_fn fn,
+ void *fn_param, struct device *dev,
+ char *name)
+{
+ struct dma_chan *chan;
+
+ chan = dma_request_slave_channel(dev, name);
+ if (chan)
+ return chan;
+
+ return __dma_request_channel(mask, fn, fn_param);
+}
/* --- Helper iov-locking functions --- */
--
1.7.9.5
^ permalink raw reply related
* [PATCH v6 08/10] spi: omap2-mcspi: convert to dma_request_slave_channel_compat()
From: Matt Porter @ 2013-01-30 7:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359529229-22207-1-git-send-email-mporter@ti.com>
Convert dmaengine channel requests to use
dma_request_slave_channel_compat(). This supports the DT case of
platforms requiring channel selection from either the OMAP DMA or
the EDMA engine. AM33xx only boots from DT and is the only user
implementing EDMA so in the !DT case we can default to the OMAP DMA
filter.
Signed-off-by: Matt Porter <mporter@ti.com>
---
drivers/spi/spi-omap2-mcspi.c | 65 ++++++++++++++++++++++++++++-------------
1 file changed, 45 insertions(+), 20 deletions(-)
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index b610f52..2c02c02 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -102,6 +102,9 @@ struct omap2_mcspi_dma {
struct completion dma_tx_completion;
struct completion dma_rx_completion;
+
+ char dma_rx_ch_name[14];
+ char dma_tx_ch_name[14];
};
/* use PIO for small transfers, avoiding DMA setup/teardown overhead and
@@ -822,14 +825,23 @@ static int omap2_mcspi_request_dma(struct spi_device *spi)
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
sig = mcspi_dma->dma_rx_sync_dev;
- mcspi_dma->dma_rx = dma_request_channel(mask, omap_dma_filter_fn, &sig);
+
+ mcspi_dma->dma_rx =
+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
+ &sig, &master->dev,
+ mcspi_dma->dma_rx_ch_name);
+
if (!mcspi_dma->dma_rx) {
dev_err(&spi->dev, "no RX DMA engine channel for McSPI\n");
return -EAGAIN;
}
sig = mcspi_dma->dma_tx_sync_dev;
- mcspi_dma->dma_tx = dma_request_channel(mask, omap_dma_filter_fn, &sig);
+ mcspi_dma->dma_tx =
+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
+ &sig, &master->dev,
+ mcspi_dma->dma_tx_ch_name);
+
if (!mcspi_dma->dma_tx) {
dev_err(&spi->dev, "no TX DMA engine channel for McSPI\n");
dma_release_channel(mcspi_dma->dma_rx);
@@ -1223,29 +1235,42 @@ static int omap2_mcspi_probe(struct platform_device *pdev)
goto free_master;
for (i = 0; i < master->num_chipselect; i++) {
- char dma_ch_name[14];
+ char *dma_rx_ch_name = mcspi->dma_channels[i].dma_rx_ch_name;
+ char *dma_tx_ch_name = mcspi->dma_channels[i].dma_tx_ch_name;
struct resource *dma_res;
- sprintf(dma_ch_name, "rx%d", i);
- dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA,
- dma_ch_name);
- if (!dma_res) {
- dev_dbg(&pdev->dev, "cannot get DMA RX channel\n");
- status = -ENODEV;
- break;
- }
+ sprintf(dma_rx_ch_name, "rx%d", i);
+ if (!pdev->dev.of_node) {
+ dma_res =
+ platform_get_resource_byname(pdev,
+ IORESOURCE_DMA,
+ dma_rx_ch_name);
+ if (!dma_res) {
+ dev_dbg(&pdev->dev,
+ "cannot get DMA RX channel\n");
+ status = -ENODEV;
+ break;
+ }
- mcspi->dma_channels[i].dma_rx_sync_dev = dma_res->start;
- sprintf(dma_ch_name, "tx%d", i);
- dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA,
- dma_ch_name);
- if (!dma_res) {
- dev_dbg(&pdev->dev, "cannot get DMA TX channel\n");
- status = -ENODEV;
- break;
+ mcspi->dma_channels[i].dma_rx_sync_dev =
+ dma_res->start;
}
+ sprintf(dma_tx_ch_name, "tx%d", i);
+ if (!pdev->dev.of_node) {
+ dma_res =
+ platform_get_resource_byname(pdev,
+ IORESOURCE_DMA,
+ dma_tx_ch_name);
+ if (!dma_res) {
+ dev_dbg(&pdev->dev,
+ "cannot get DMA TX channel\n");
+ status = -ENODEV;
+ break;
+ }
- mcspi->dma_channels[i].dma_tx_sync_dev = dma_res->start;
+ mcspi->dma_channels[i].dma_tx_sync_dev =
+ dma_res->start;
+ }
}
if (status < 0)
--
1.7.9.5
^ permalink raw reply related
* [PATCH v6 09/10] spi: omap2-mcspi: add generic DMA request support to the DT binding
From: Matt Porter @ 2013-01-30 7:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359529229-22207-1-git-send-email-mporter@ti.com>
The binding definition is based on the generic DMA request binding
Signed-off-by: Matt Porter <mporter@ti.com>
---
Documentation/devicetree/bindings/spi/omap-spi.txt | 27 +++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/spi/omap-spi.txt b/Documentation/devicetree/bindings/spi/omap-spi.txt
index 938809c..68cb28e 100644
--- a/Documentation/devicetree/bindings/spi/omap-spi.txt
+++ b/Documentation/devicetree/bindings/spi/omap-spi.txt
@@ -10,7 +10,18 @@ Required properties:
input. The default is D0 as input and
D1 as output.
-Example:
+Optional properties:
+- dmas: List of DMA controller phandle and DMA request ordered
+ pairs. One tx and one rx pair is required for each chip
+ select.
+- dma-names: List of DMA request names. These strings correspond
+ 1:1 with the ordered pairs in dmas. The string naming is
+ to be "rxN" and "txN" for RX and TX requests,
+ respectively, where N equals the chip select number.
+
+Examples:
+
+[hwmod populated DMA resources]
mcspi1: mcspi at 1 {
#address-cells = <1>;
@@ -20,3 +31,17 @@ mcspi1: mcspi at 1 {
ti,spi-num-cs = <4>;
};
+[generic DMA request binding]
+
+mcspi1: mcspi at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "ti,omap4-mcspi";
+ ti,hwmods = "mcspi1";
+ ti,spi-num-cs = <2>;
+ dmas = <&edma 42
+ &edma 43
+ &edma 44
+ &edma 45>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
+};
--
1.7.9.5
^ permalink raw reply related
* [PATCH v6 10/10] ARM: dts: add AM33XX SPI DMA support
From: Matt Porter @ 2013-01-30 7:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359529229-22207-1-git-send-email-mporter@ti.com>
Adds DMA resources to the AM33XX SPI nodes.
Signed-off-by: Matt Porter <mporter@ti.com>
---
arch/arm/boot/dts/am33xx.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index e711ffb..ddf702a 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -328,6 +328,11 @@
interrupt = <65>;
ti,spi-num-cs = <2>;
ti,hwmods = "spi0";
+ dmas = <&edma 16
+ &edma 17
+ &edma 18
+ &edma 19>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled";
};
@@ -339,6 +344,11 @@
interrupt = <125>;
ti,spi-num-cs = <2>;
ti,hwmods = "spi1";
+ dmas = <&edma 42
+ &edma 43
+ &edma 44
+ &edma 45>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled";
};
--
1.7.9.5
^ permalink raw reply related
* [BUG] i.MX25: soft lockups/freezes while getnstimeofday
From: Robert Schwebel @ 2013-01-30 7:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOMZO5DLDikzF5LMWQLw_65ADSy2-aydvhTbpFhbBV_DwS9sCQ@mail.gmail.com>
On Tue, Jan 29, 2013 at 02:38:59PM -0200, Fabio Estevam wrote:
> On Tue, Jan 29, 2013 at 2:12 PM, Steffen Trumtrar <s.trumtrar@pengutronix.de> wrote:
> > The board itself supposedly worked up until v3.4.
> >
> > The mxc-timer is set up to use ipg_clk_highfreq with a per5_div set to 2,
> > therefore it is clocked with 120MHz. I tried to set the per5_div to 4 to have
> > a 60MHz clock, but this didn't change anything.
> > On the other hand, I tried parenting the ipg_clk to the per5_clk to get a
> > 66MHz clock. This seems to be working fine, but I only have it running for 4h now.
>
> Can you dump the clock tree in 3.4 and 3.7.2, so that we can compare them?
>
> Just looked at the FSL BSP and they have the following:
>
> /* GPT clock must be derived from AHB clock */
> clk_set_rate(&per_clk[5], ahb_clk.rate / 10);
Do your hardware guys have documentation about *why* it "must be derived
from AHB clock"?
rsc
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply
* [PATCH v2] cpufreq: instantiate cpufreq-cpu0 as a platform_driver
From: AnilKumar, Chimata @ 2013-01-30 7:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359428020-21068-1-git-send-email-shawn.guo@linaro.org>
On Tue, Jan 29, 2013 at 08:23:40, Shawn Guo wrote:
> As multiplatform build is being adopted by more and more ARM platforms,
> initcall function should be used very carefully. For example, when
> GENERIC_CPUFREQ_CPU0 is built in the kernel, cpu0_cpufreq_driver_init()
> will be called on all the platforms to initialize cpufreq-cpu0 driver.
>
> To eliminate this undesired the effect, the patch changes cpufreq-cpu0
> driver to have it instantiated as a platform_driver. Then it will only
> run on platforms that create the platform_device "cpufreq-cpu0".
>
> Along with the change, it also changes cpu_dev to be &pdev->dev,
> so that managed functions can start working, and module build gets
> supported too.
>
> The existing users of cpufreq-cpu0 driver highbank and am33xx are also
> updated accordingly to adapt the changes.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> Cc: Mark Langsdorf <mark.langsdorf@calxeda.com>
> Cc: AnilKumar Ch <anilkumar@ti.com>
> Cc: Tony Lindgren <tony@atomide.com>
> Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> ---
> Changes since v1:
> * Migrate cpufreq-cpu0 users in the same patch
>
> Rafael,
>
> The patch is based on Mark's highbank-cpufreq series and Nishanth's
> "PM / OPP : export symbol consolidation" sereis.
>
> Mark, AnilKumar,
>
> I only compile-tested it on highbank and omap2. Please give it a test
> no hardware to make sure cpufreq-cpu0 still works for you. Thanks.
Hi Shawn,
I hope this is based on linux-omap/master, to test the driver I have
to add some patches on top of this patch, because of recent changes.
I will provide the test details once I am done.
Thanks
AnilKumar
^ permalink raw reply
* [PATCH] ARM: OMAP2+: Fix selection of clockevent timer when using device-tree
From: Bedia, Vaibhav @ 2013-01-30 7:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359490991-17688-1-git-send-email-jon-hunter@ti.com>
On Wed, Jan 30, 2013 at 01:53:11, Hunter, Jon wrote:
> Commit 9725f44 (ARM: OMAP: Add DT support for timer driver) added
> device-tree support for selecting a clockevent timer by property.
> However, the code is currently ignoring the property passed and
> selecting the first available timer found. Hence, for the OMAP3 beagle
> board timer-12 is not being selected as expected. Fix this problem
> by ensuring the timer property is passed to omap_get_timer_dt().
I thought that was intentional ;) and had this change in the clkevt-clksrc
interchange patch for AM33xx.
Anyways, this change works for me so...
Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
^ permalink raw reply
* [PATCH] ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440
From: Santosh Shilimkar @ 2013-01-30 7:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <51013432.3080903@arm.com>
Benoit,
On Thursday 24 January 2013 06:46 PM, Marc Zyngier wrote:
> Hi Benoit,
>
> On 24/01/13 12:42, Benoit Cousson wrote:
>> Hi Santosh,
>>
>> On 01/23/2013 11:55 AM, Santosh Shilimkar wrote:
>>> Looping Marc, Benoit
>>>
>>> On Wednesday 23 January 2013 04:06 PM, Mark Rutland wrote:
>>>> On Tue, Jan 22, 2013 at 10:05:18PM +0000, Kukjin Kim wrote:
>>>>> Mark Rutland wrote:
>>>>>>
>>>>> + devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren
>>>>>
>>>>>> On Tue, Jan 22, 2013 at 01:41:27AM +0000, Kukjin Kim wrote:
>>>>>>> From: Thomas Abraham <thomas.ab@samsung.com>
>>>>>>>
>>>>>>> Need to be changed requirements in the 'cpus' node for exynos5440
>>>>>>> to specify all the per-cpu interrupts of arch timer.
>>>>>>
>>>>>> The node(s) for the arch timer should not be in the cpus/cpu at N nodes.
>>>>>> Instead, there should be one node (in the root of the tree).
>>>>>>
>>>>> Well, I don't think so. As per my understanding, the local timers are
>>>>> attached to every ARM cores (cpus) and it generates certain interrupt
>>>>> to the
>>>>> GIC. So the correct representation for this in device tree is to
>>>>> include the
>>>>> interrupts in the cpu nodes in dts file. Your comments refer to a
>>>>> limitation in the Linux kernel implementation of the arch_timer and it
>>>>> should not result in representing the hardware details incorrectly in
>>>>> the
>>>>> dts file.
>>>>
>>>> I disagree. The "correct representation" is whatever the devicetree
>>>> binding
>>>> documentation describes. It does not describe placing timer nodes in
>>>> the cpu
>>>> nodes.
>>>>
>>> This seems to be exact same topic what is getting discussed here [1]
>>> Technically DT is suppose to represent how the hardware is rather than
>>> how the bindings are done.
>>>
>>> But as Marc pointed out, the approach taken currently is to not
>>> duplicate the banked information. The thread [1] isn't concluded
>>> yet but looks like we might want to avoid duplicating the information
>>> considering, more of such duplication needs to follow. e.g gic i/f
>>>
>>> Am still waiting on what Benoit has to say ?
>>
>> I agree with you :-)
>>
>> I'm not sure the binding was properly done to reflect the HW accurately.
>>
>> A local timer for my point of view should be located in the cpu node
>> like a L1 cache. Or at least referenced in each cpu by a phandle.
>>
>> What was the rational to put it in the root?
>
> The rational was to follow what we already do for most (all?) banked
> resources. We already have TWD, GIC and PMU that have a root node,
> avoiding duplicated resources. I think consistency is an important thing
> to have.
>
> If we decide to move everything into CPU nodes and duplicate all the
> banked resources, fine. But that has impacts that reach far beyond the
> simple case of the timer.
>
> In particular, good luck with the GIC distributor interface, where the
> 32 first interrupts are per CPU. This would also mandate a redesign of
> the way we specify a PPI, as the CPU mask in the third field doesn't
> mean a thing anymore.
>
> If you insist on having a phandle to a timer node, fine by me.
>
Can you please comment on it so that we can conclude this thread ?
I would like to update my patches and hence the push.
Regards,
Santosh
^ permalink raw reply
* [PATCH v2 1/1] usb: chipidea: imx: Add system suspend/resume API
From: Peter Chen @ 2013-01-30 7:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358735401-3779-1-git-send-email-peter.chen@freescale.com>
On Mon, Jan 21, 2013 at 10:30:01AM +0800, Peter Chen wrote:
> During the system suspend/resume procedure, the USB also
> needs to go suspend/resume procedure, this patch adds
> related APIs. It is tested at i.mx6q sabrelite. Meanwhile,
> it fixes the bug that the USB will out of work after
> system suspend/resume.
>
> Signed-off-by: Peter Chen <peter.chen@freescale.com>
> Tested-by: Shawn Guo <shawn.guo@linaro.org>
ping....
Alex, can you help review it?
> ---
> Changes for v2:
> - Add tested-by from Shawn Guo
> - Using dev_get_drvdata to get driver data
>
> drivers/usb/chipidea/bits.h | 1 +
> drivers/usb/chipidea/ci13xxx_imx.c | 59 ++++++++++++++++++++++++++++++++++++
> 2 files changed, 60 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/usb/chipidea/bits.h b/drivers/usb/chipidea/bits.h
> index ba9c6ef..d1467bb 100644
> --- a/drivers/usb/chipidea/bits.h
> +++ b/drivers/usb/chipidea/bits.h
> @@ -47,6 +47,7 @@
> #define PORTSC_FPR BIT(6)
> #define PORTSC_SUSP BIT(7)
> #define PORTSC_HSP BIT(9)
> +#define PORTSC_PHCD BIT(23) /* phy suspend mode */
> #define PORTSC_PTC (0x0FUL << 16)
>
> /* DEVLC */
> diff --git a/drivers/usb/chipidea/ci13xxx_imx.c b/drivers/usb/chipidea/ci13xxx_imx.c
> index 342eab0..ff11cee 100644
> --- a/drivers/usb/chipidea/ci13xxx_imx.c
> +++ b/drivers/usb/chipidea/ci13xxx_imx.c
> @@ -25,6 +25,7 @@
> #include <linux/mfd/syscon.h>
>
> #include "ci.h"
> +#include "bits.h"
> #include "ci13xxx_imx.h"
>
> #define pdev_to_phy(pdev) \
> @@ -321,6 +322,61 @@ static int ci13xxx_imx_remove(struct platform_device *pdev)
> return 0;
> }
>
> +#ifdef CONFIG_PM
> +static int ci13xxx_imx_suspend(struct device *dev)
> +{
> + struct ci13xxx_imx_data *data = dev_get_drvdata(dev);
> + struct platform_device *plat_ci;
> + struct ci13xxx *ci;
> +
> + plat_ci = data->ci_pdev;
> + ci = platform_get_drvdata(plat_ci);
> +
> + hw_write(ci, OP_PORTSC, PORTSC_PHCD, PORTSC_PHCD);
> +
> + if (data->phy)
> + usb_phy_set_suspend(data->phy, 1);
> +
> + clk_disable_unprepare(data->clk);
> +
> + return 0;
> +}
> +
> +static int ci13xxx_imx_resume(struct device *dev)
> +{
> + int ret;
> + struct ci13xxx_imx_data *data = dev_get_drvdata(dev);
> + struct platform_device *plat_ci;
> + struct ci13xxx *ci;
> +
> + plat_ci = data->ci_pdev;
> + ci = platform_get_drvdata(plat_ci);
> +
> + ret = clk_prepare_enable(data->clk);
> + if (ret) {
> + dev_err(dev,
> + "Failed to prepare or enable clock, err=%d\n", ret);
> + return ret;
> + }
> +
> + if (hw_read(ci, OP_PORTSC, PORTSC_PHCD)) {
> + hw_write(ci, OP_PORTSC, PORTSC_PHCD, 0);
> + /* Some clks sync between Controller and USB PHY */
> + mdelay(1);
> + }
> +
> + if (data->phy)
> + usb_phy_set_suspend(data->phy, 0);
> +
> + return ret;
> +}
> +
> +static const struct dev_pm_ops ci13xxx_imx_pm_ops = {
> + .suspend = ci13xxx_imx_suspend,
> + .resume = ci13xxx_imx_resume,
> +};
> +#endif
> +
> static const struct of_device_id ci13xxx_imx_dt_ids[] = {
> { .compatible = "fsl,imx27-usb", },
> { /* sentinel */ }
> @@ -334,6 +390,9 @@ static struct platform_driver ci13xxx_imx_driver = {
> .name = "imx_usb",
> .owner = THIS_MODULE,
> .of_match_table = ci13xxx_imx_dt_ids,
> +#ifdef CONFIG_PM
> + .pm = &ci13xxx_imx_pm_ops,
> +#endif
> },
> };
>
> --
> 1.7.0.4
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
Best Regards,
Peter Chen
^ permalink raw reply
* [PATCH v3 2/3] ARM: static_vm: introduce an infrastructure for static mapped area
From: Joonsoo Kim @ 2013-01-30 7:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.LFD.2.02.1301291840580.6300@xanadu.home>
Hello, Nicolas.
On Tue, Jan 29, 2013 at 07:05:32PM -0500, Nicolas Pitre wrote:
> On Thu, 24 Jan 2013, Joonsoo Kim wrote:
>
> > From: Joonsoo Kim <js1304@gmail.com>
> >
> > In current implementation, we used ARM-specific flag, that is,
> > VM_ARM_STATIC_MAPPING, for distinguishing ARM specific static mapped area.
> > The purpose of static mapped area is to re-use static mapped area when
> > entire physical address range of the ioremap request can be covered
> > by this area.
> >
> > This implementation causes needless overhead for some cases.
> > For example, assume that there is only one static mapped area and
> > vmlist has 300 areas. Every time we call ioremap, we check 300 areas for
> > deciding whether it is matched or not. Moreover, even if there is
> > no static mapped area and vmlist has 300 areas, every time we call
> > ioremap, we check 300 areas in now.
> >
> > If we construct a extra list for static mapped area, we can eliminate
> > above mentioned overhead.
> > With a extra list, if there is one static mapped area,
> > we just check only one area and proceed next operation quickly.
> >
> > In fact, it is not a critical problem, because ioremap is not frequently
> > used. But reducing overhead is better idea.
> >
> > Another reason for doing this work is for removing architecture dependency
> > on vmalloc layer. I think that vmlist and vmlist_lock is internal data
> > structure for vmalloc layer. Some codes for debugging and stat inevitably
> > use vmlist and vmlist_lock. But it is preferable that they are used
> > as least as possible in outside of vmalloc.c
> >
> > Now, I introduce an ARM-specific infrastructure for static mapped area. In
> > the following patch, we will use this and resolve above mentioned problem.
> >
> > Signed-off-by: Joonsoo Kim <js1304@gmail.com>
> > Signed-off-by: Joonsoo Kim <iamjoonsoo.kim@lge.com>
>
> First of all, I don't think you really need a new file with a global
> scope header file. Given that this code is meant to be used only for
> ioremap optimization on ARM, it is probably a better idea to simply put
> it all into arch/arm/mm/ioremap.c instead. The only function that needs
> to be exported out of ioremap.c is insert_static_vm(), and only for the
> benefit of arch/arm/mm/mmu.c, therefore this function prototype may as
> well just be added to arch/arm/mm/mm.h.
I agree with your all opinions.
I will re-work and will re-send v4 as soon as possible.
Thanks for review.
> More comments below.
>
> > diff --git a/arch/arm/include/asm/mach/static_vm.h b/arch/arm/include/asm/mach/static_vm.h
> > new file mode 100644
> > index 0000000..72c8339
> > --- /dev/null
> > +++ b/arch/arm/include/asm/mach/static_vm.h
> > @@ -0,0 +1,45 @@
> > +/*
> > + * arch/arm/include/asm/mach/static_vm.h
> > + *
> > + * Copyright (C) 2012 LG Electronics, Joonsoo Kim <iamjoonsoo.kim@lge.com>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
> > + */
> > +
> > +#ifndef _ASM_MACH_STATIC_VM_H
> > +#define _ASM_MACH_STATIC_VM_H
> > +
> > +#include <linux/types.h>
> > +#include <linux/vmalloc.h>
> > +
> > +struct static_vm {
> > + struct static_vm *next;
> > + void *vaddr;
> > + unsigned long size;
> > + unsigned long flags;
> > + phys_addr_t paddr;
> > + const void *caller;
> > +};
>
> Here you're duplicating most of the vm_struct content for no obvious
> reasons. Patch #3 even allocates both a vm_struct and a static_vm
> instance in parallel for each mapping. Instead, you should consider
> something like this:
>
> struct static_vm {
> struct static_vm *next;
> struct vm_struct vm;
> };
>
> This way, you only need to allocate one structure:
>
> struct static_vm *svm = early_alloc(...);
> ...
> svm->vm.addr = addr;
> ...
> vm_area_add_early(&svm->vm);
> insert_static_vm(svm);
Yes!
It's good idea.
> And then, it would make sense for the insert_static_vm() to do the
> vm_area_add_early() call itself as well.
Okay.
> Maybe rename insert_static_vm() to static_vm_area_add_early() to better
> identify its purpose as well. It shouldn't be used for any other
> purpose anyway.
Okay.
> > +
> > +extern struct static_vm *static_vmlist;
> > +extern spinlock_t static_vmlist_lock;
>
> Your patch is providing the proper accessors to manipulate those. They
> therefore should not be exported globally.
Okay.
> > +
> > +extern struct static_vm *find_static_vm_paddr(phys_addr_t paddr,
> > + size_t size, unsigned long flags);
> > +extern struct static_vm *find_static_vm_vaddr(void *vaddr);
> > +extern void init_static_vm(struct static_vm *static_vm,
> > + struct vm_struct *vm, unsigned long flags);
>
> Since those are only used in ioremap.c, and because I suggested their
> implementation be moved there as well, you shouldn't need prototype
> declarations anymore. And init_static_vm() would be useless with my
> previous suggestions.
Yes.
>
> Nicolas
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply
* [PATCH v5 03/14] ARM: edma: add AM33XX support to the private EDMA API
From: Andy Shevchenko @ 2013-01-30 7:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130130064104.GN5256@beef>
On Wed, Jan 30, 2013 at 8:41 AM, Matt Porter <mporter@ti.com> wrote:
> On Mon, Jan 28, 2013 at 09:27:24PM +0200, Andy Shevchenko wrote:
>> On Tue, Jan 15, 2013 at 10:32 PM, Matt Porter <mporter@ti.com> wrote:
>> > Adds support for parsing the TI EDMA DT data into the required
>> > EDMA private API platform data. Enables runtime PM support to
>> > initialize the EDMA hwmod. Adds AM33XX EMDA crossbar event mux
>> > support.
>> >
>> > Signed-off-by: Matt Porter <mporter@ti.com>
>> > ---
>> > arch/arm/common/edma.c | 314 ++++++++++++++++++++++++++++++++++--
>> > include/linux/platform_data/edma.h | 1 +
>> > 2 files changed, 306 insertions(+), 9 deletions(-)
>> >
>> > diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
>> > index 2dce245..beeb1d2 100644
>> > --- a/arch/arm/common/edma.c
>> > +++ b/arch/arm/common/edma.c
>> > @@ -24,6 +24,13 @@
>> > #include <linux/platform_device.h>
>> > #include <linux/io.h>
>> > #include <linux/slab.h>
>> > +#include <linux/edma.h>
>> > +#include <linux/err.h>
>> > +#include <linux/of_address.h>
>> > +#include <linux/of_device.h>
>> > +#include <linux/of_dma.h>
>> > +#include <linux/of_irq.h>
>> > +#include <linux/pm_runtime.h>
>> >
>> > #include <linux/platform_data/edma.h>
>> >
>> > @@ -723,6 +730,9 @@ EXPORT_SYMBOL(edma_free_channel);
>> > */
>> > int edma_alloc_slot(unsigned ctlr, int slot)
>> > {
>> > + if (!edma_cc[ctlr])
>> > + return -EINVAL;
>> > +
>> > if (slot >= 0)
>> > slot = EDMA_CHAN_SLOT(slot);
>> >
>> > @@ -1366,31 +1376,291 @@ void edma_clear_event(unsigned channel)
>> > EXPORT_SYMBOL(edma_clear_event);
>> >
>> > /*-----------------------------------------------------------------------*/
>> > +static int edma_of_read_u32_to_s8_array(const struct device_node *np,
>> > + const char *propname, s8 *out_values,
>> > + size_t sz)
>>
>> I'm sorry I didn't get why you couldn't use of_property_read_u8_array() ?
>> The similar comment to u16 and so on.
>
> There's some manipulation of the legacy Davinci platform data
> structures going on here. The driving reason was to not change any of
> the davinci platforms pdata which uses s8/s16 tables of mapping values
> with signed values as terminators. These versions below add the
> convert to the signed value and terminate the array as needed by the
> existing driver. This will all go away when the driver is rewritten and
> merged into drivers/dma/edma.c. At that point I want to throwaway all
> these legacy data structures. First, there's some more drivers to
> convert to dmaengine api.
>
I mean instead of custom functions you could use existing ones.
And sign here will be implicitly applied.
So, what I propose is to do something like this
static int edma_of_read_u32_to_s8_array(const struct device_node *np,
const char *propname, s8 *out_values,
size_t sz)
{
int ret;
ret = of_property_read_u8_array(np, propname, out_values, sz);
if (ret)
return ret;
/* Terminate it */
*out_values++ = -1;
*out_values++ = -1;
}
> -Matt
>>
>> > +{
>> > + struct property *prop = of_find_property(np, propname, NULL);
>> > + const __be32 *val;
>> > +
>> > + if (!prop)
>> > + return -EINVAL;
>> > + if (!prop->value)
>> > + return -ENODATA;
>> > + if ((sz * sizeof(u32)) > prop->length)
>> > + return -EOVERFLOW;
>> > +
>> > + val = prop->value;
>> > +
>> > + while (sz--)
>> > + *out_values++ = (s8)(be32_to_cpup(val++) & 0xff);
>> > +
>> > + /* Terminate it */
>> > + *out_values++ = -1;
>> > + *out_values++ = -1;
>> > +
>> > + return 0;
>> > +}
>> > +
>> > +static int edma_of_read_u32_to_s16_array(const struct device_node *np,
>> > + const char *propname, s16 *out_values,
>> > + size_t sz)
>> > +{
>> > + struct property *prop = of_find_property(np, propname, NULL);
>> > + const __be32 *val;
>> > +
>> > + if (!prop)
>> > + return -EINVAL;
>> > + if (!prop->value)
>> > + return -ENODATA;
>> > + if ((sz * sizeof(u32)) > prop->length)
>> > + return -EOVERFLOW;
>> > +
>> > + val = prop->value;
>> > +
>> > + while (sz--)
>> > + *out_values++ = (s16)(be32_to_cpup(val++) & 0xffff);
>> > +
>> > + /* Terminate it */
>> > + *out_values++ = -1;
>> > + *out_values++ = -1;
>> > +
>> > + return 0;
>> > +}
>> > +
>> > +static int edma_xbar_event_map(struct device *dev,
>> > + struct device_node *node,
>> > + struct edma_soc_info *pdata, int len)
>> > +{
>> > + int ret = 0;
>> > + int i;
>> > + struct resource res;
>> > + void *xbar;
>> > + const s16 (*xbar_chans)[2];
>> > + u32 shift, offset, mux;
>> > +
>> > + xbar_chans = devm_kzalloc(dev,
>> > + len/sizeof(s16) + 2*sizeof(s16),
>> > + GFP_KERNEL);
>> > + if (!xbar_chans)
>> > + return -ENOMEM;
>> > +
>> > + ret = of_address_to_resource(node, 1, &res);
>> > + if (IS_ERR_VALUE(ret))
>> > + return -EIO;
>> > +
>> > + xbar = devm_ioremap(dev, res.start, resource_size(&res));
>> > + if (!xbar)
>> > + return -ENOMEM;
>> > +
>> > + ret = edma_of_read_u32_to_s16_array(node,
>> > + "ti,edma-xbar-event-map",
>> > + (s16 *)xbar_chans,
>> > + len/sizeof(u32));
>> > + if (IS_ERR_VALUE(ret))
>> > + return -EIO;
>> > +
>> > + for (i = 0; xbar_chans[i][0] != -1; i++) {
>> > + shift = (xbar_chans[i][1] % 4) * 8;
>> > + offset = xbar_chans[i][1] >> 2;
>> > + offset <<= 2;
>> > + mux = readl((void *)((u32)xbar + offset));
>> > + mux &= ~(0xff << shift);
>> > + mux |= xbar_chans[i][0] << shift;
>> > + writel(mux, (void *)((u32)xbar + offset));
>> > + }
>> > +
>> > + pdata->xbar_chans = xbar_chans;
>> > +
>> > + return 0;
>> > +}
>> > +
>> > +static int edma_of_parse_dt(struct device *dev,
>> > + struct device_node *node,
>> > + struct edma_soc_info *pdata)
>> > +{
>> > + int ret = 0;
>> > + u32 value;
>> > + struct property *prop;
>> > + size_t sz;
>> > + struct edma_rsv_info *rsv_info;
>> > + const s16 (*rsv_chans)[2], (*rsv_slots)[2];
>> > + const s8 (*queue_tc_map)[2], (*queue_priority_map)[2];
>> > +
>> > + memset(pdata, 0, sizeof(struct edma_soc_info));
>> > +
>> > + ret = of_property_read_u32(node, "dma-channels", &value);
>> > + if (ret < 0)
>> > + return ret;
>> > + pdata->n_channel = value;
>> > +
>> > + ret = of_property_read_u32(node, "ti,edma-regions", &value);
>> > + if (ret < 0)
>> > + return ret;
>> > + pdata->n_region = value;
>> > +
>> > + ret = of_property_read_u32(node, "ti,edma-slots", &value);
>> > + if (ret < 0)
>> > + return ret;
>> > + pdata->n_slot = value;
>> > +
>> > + pdata->n_cc = 1;
>> > + pdata->n_tc = 3;
>> > +
>> > + rsv_info =
>> > + devm_kzalloc(dev, sizeof(struct edma_rsv_info), GFP_KERNEL);
>> > + if (!rsv_info)
>> > + return -ENOMEM;
>> > + pdata->rsv = rsv_info;
>> > +
>> > + /* Build the reserved channel/slots arrays */
>> > + prop = of_find_property(node, "ti,edma-reserved-channels", &sz);
>> > + if (prop) {
>> > + rsv_chans = devm_kzalloc(dev,
>> > + sz/sizeof(s16) + 2*sizeof(s16),
>> > + GFP_KERNEL);
>> > + if (!rsv_chans)
>> > + return -ENOMEM;
>> > + pdata->rsv->rsv_chans = rsv_chans;
>> > +
>> > + ret = edma_of_read_u32_to_s16_array(node,
>> > + "ti,edma-reserved-channels",
>> > + (s16 *)rsv_chans,
>> > + sz/sizeof(u32));
>> > + if (ret < 0)
>> > + return ret;
>> > + }
>> > +
>> > + prop = of_find_property(node, "ti,edma-reserved-slots", &sz);
>> > + if (prop) {
>> > + rsv_slots = devm_kzalloc(dev,
>> > + sz/sizeof(s16) + 2*sizeof(s16),
>> > + GFP_KERNEL);
>> > + if (!rsv_slots)
>> > + return -ENOMEM;
>> > + pdata->rsv->rsv_slots = rsv_slots;
>> > +
>> > + ret = edma_of_read_u32_to_s16_array(node,
>> > + "ti,edma-reserved-slots",
>> > + (s16 *)rsv_slots,
>> > + sz/sizeof(u32));
>> > + if (ret < 0)
>> > + return ret;
>> > + }
>> > +
>> > + prop = of_find_property(node, "ti,edma-queue-tc-map", &sz);
>> > + if (!prop)
>> > + return -EINVAL;
>> > +
>> > + queue_tc_map = devm_kzalloc(dev,
>> > + sz/sizeof(s8) + 2*sizeof(s8),
>> > + GFP_KERNEL);
>> > + if (!queue_tc_map)
>> > + return -ENOMEM;
>> > + pdata->queue_tc_mapping = queue_tc_map;
>> > +
>> > + ret = edma_of_read_u32_to_s8_array(node,
>> > + "ti,edma-queue-tc-map",
>> > + (s8 *)queue_tc_map,
>> > + sz/sizeof(u32));
>> > + if (ret < 0)
>> > + return ret;
>> > +
>> > + prop = of_find_property(node, "ti,edma-queue-priority-map", &sz);
>> > + if (!prop)
>> > + return -EINVAL;
>> > +
>> > + queue_priority_map = devm_kzalloc(dev,
>> > + sz/sizeof(s8) + 2*sizeof(s8),
>> > + GFP_KERNEL);
>> > + if (!queue_priority_map)
>> > + return -ENOMEM;
>> > + pdata->queue_priority_mapping = queue_priority_map;
>> > +
>> > + ret = edma_of_read_u32_to_s8_array(node,
>> > + "ti,edma-queue-tc-map",
>> > + (s8 *)queue_priority_map,
>> > + sz/sizeof(u32));
>> > + if (ret < 0)
>> > + return ret;
>> > +
>> > + ret = of_property_read_u32(node, "ti,edma-default-queue", &value);
>> > + if (ret < 0)
>> > + return ret;
>> > + pdata->default_queue = value;
>> > +
>> > + prop = of_find_property(node, "ti,edma-xbar-event-map", &sz);
>> > + if (prop)
>> > + ret = edma_xbar_event_map(dev, node, pdata, sz);
>> > +
>> > + return ret;
>> > +}
>> > +
>> > +static struct of_dma_filter_info edma_filter_info = {
>> > + .filter_fn = edma_filter_fn,
>> > +};
>> >
>> > static int edma_probe(struct platform_device *pdev)
>> > {
>> > struct edma_soc_info **info = pdev->dev.platform_data;
>> > + struct edma_soc_info *ninfo[EDMA_MAX_CC] = {NULL, NULL};
>> > + struct edma_soc_info tmpinfo;
>> > const s8 (*queue_priority_mapping)[2];
>> > const s8 (*queue_tc_mapping)[2];
>> > int i, j, off, ln, found = 0;
>> > int status = -1;
>> > const s16 (*rsv_chans)[2];
>> > const s16 (*rsv_slots)[2];
>> > + const s16 (*xbar_chans)[2];
>> > int irq[EDMA_MAX_CC] = {0, 0};
>> > int err_irq[EDMA_MAX_CC] = {0, 0};
>> > - struct resource *r[EDMA_MAX_CC] = {NULL};
>> > + struct resource *r[EDMA_MAX_CC] = {NULL, NULL};
>> > + struct resource res[EDMA_MAX_CC];
>> > resource_size_t len[EDMA_MAX_CC];
>> > char res_name[10];
>> > char irq_name[10];
>> > + struct device_node *node = pdev->dev.of_node;
>> > + struct device *dev = &pdev->dev;
>> > + int ret;
>> > +
>> > + if (node) {
>> > + info = ninfo;
>> > + edma_of_parse_dt(dev, node, &tmpinfo);
>> > + info[0] = &tmpinfo;
>> > +
>> > + dma_cap_set(DMA_SLAVE, edma_filter_info.dma_cap);
>> > + of_dma_controller_register(dev->of_node,
>> > + of_dma_simple_xlate,
>> > + &edma_filter_info);
>> > + }
>> >
>> > if (!info)
>> > return -ENODEV;
>> >
>> > + pm_runtime_enable(dev);
>> > + ret = pm_runtime_get_sync(dev);
>> > + if (IS_ERR_VALUE(ret)) {
>> > + dev_err(dev, "pm_runtime_get_sync() failed\n");
>> > + return ret;
>> > + }
>> > +
>> > for (j = 0; j < EDMA_MAX_CC; j++) {
>> > - sprintf(res_name, "edma_cc%d", j);
>> > - r[j] = platform_get_resource_byname(pdev, IORESOURCE_MEM,
>> > + if (!info[j]) {
>> > + if (!found)
>> > + return -ENODEV;
>> > + break;
>> > + }
>> > + if (node) {
>> > + ret = of_address_to_resource(node, j, &res[j]);
>> > + if (!IS_ERR_VALUE(ret))
>> > + r[j] = &res[j];
>> > + } else {
>> > + sprintf(res_name, "edma_cc%d", j);
>> > + r[j] = platform_get_resource_byname(pdev,
>> > + IORESOURCE_MEM,
>> > res_name);
>> > - if (!r[j] || !info[j]) {
>> > + }
>> > + if (!r[j]) {
>> > if (found)
>> > break;
>> > else
>> > @@ -1465,8 +1735,22 @@ static int edma_probe(struct platform_device *pdev)
>> > }
>> > }
>> >
>> > - sprintf(irq_name, "edma%d", j);
>> > - irq[j] = platform_get_irq_byname(pdev, irq_name);
>> > + /* Clear the xbar mapped channels in unused list */
>> > + xbar_chans = info[j]->xbar_chans;
>> > + if (xbar_chans) {
>> > + for (i = 0; xbar_chans[i][1] != -1; i++) {
>> > + off = xbar_chans[i][1];
>> > + clear_bits(off, 1,
>> > + edma_cc[j]->edma_unused);
>> > + }
>> > + }
>> > +
>> > + if (node)
>> > + irq[j] = irq_of_parse_and_map(node, 0);
>> > + else {
>> > + sprintf(irq_name, "edma%d", j);
>> > + irq[j] = platform_get_irq_byname(pdev, irq_name);
>> > + }
>> > edma_cc[j]->irq_res_start = irq[j];
>> > status = request_irq(irq[j], dma_irq_handler, 0, "edma",
>> > &pdev->dev);
>> > @@ -1476,8 +1760,12 @@ static int edma_probe(struct platform_device *pdev)
>> > goto fail;
>> > }
>> >
>> > - sprintf(irq_name, "edma%d_err", j);
>> > - err_irq[j] = platform_get_irq_byname(pdev, irq_name);
>> > + if (node)
>> > + err_irq[j] = irq_of_parse_and_map(node, 2);
>> > + else {
>> > + sprintf(irq_name, "edma%d_err", j);
>> > + err_irq[j] = platform_get_irq_byname(pdev, irq_name);
>> > + }
>> > edma_cc[j]->irq_res_end = err_irq[j];
>> > status = request_irq(err_irq[j], dma_ccerr_handler, 0,
>> > "edma_error", &pdev->dev);
>> > @@ -1538,9 +1826,17 @@ fail1:
>> > return status;
>> > }
>> >
>> > +static const struct of_device_id edma_of_ids[] = {
>> > + { .compatible = "ti,edma3", },
>> > + {}
>> > +};
>> >
>> > static struct platform_driver edma_driver = {
>> > - .driver.name = "edma",
>> > + .driver = {
>> > + .name = "edma",
>> > + .of_match_table = edma_of_ids,
>> > + },
>> > + .probe = edma_probe,
>> > };
>> >
>> > static int __init edma_init(void)
>> > diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
>> > index 2344ea2..ffc1fb2 100644
>> > --- a/include/linux/platform_data/edma.h
>> > +++ b/include/linux/platform_data/edma.h
>> > @@ -177,6 +177,7 @@ struct edma_soc_info {
>> >
>> > const s8 (*queue_tc_mapping)[2];
>> > const s8 (*queue_priority_mapping)[2];
>> > + const s16 (*xbar_chans)[2];
>> > };
>> >
>> > #endif
>> > --
>> > 1.7.9.5
>> >
>> > --
>> > To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>> > the body of a message to majordomo at vger.kernel.org
>> > More majordomo info at http://vger.kernel.org/majordomo-info.html
>> > Please read the FAQ at http://www.tux.org/lkml/
>>
>>
>>
>> --
>> With Best Regards,
>> Andy Shevchenko
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
>> the body of a message to majordomo at vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH] ARM: ux500: rename ab8500 to abx500 for hwmon driver
From: Hongbo Zhang @ 2013-01-30 7:42 UTC (permalink / raw)
To: linux-arm-kernel
We are using a generic abx500 hwmon layer, so rename specific ab8500 to generic
abx500 for hwmon device and driver matching.
Signed-off-by: Hongbo Zhang <hongbo.zhang@linaro.org>
---
drivers/mfd/ab8500-core.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c
index e1650ba..579753f 100644
--- a/drivers/mfd/ab8500-core.c
+++ b/drivers/mfd/ab8500-core.c
@@ -922,7 +922,7 @@ static struct resource ab8505_iddet_resources[] = {
static struct resource ab8500_temp_resources[] = {
{
- .name = "AB8500_TEMP_WARM",
+ .name = "ABX500_TEMP_WARM",
.start = AB8500_INT_TEMP_WARM,
.end = AB8500_INT_TEMP_WARM,
.flags = IORESOURCE_IRQ,
@@ -998,8 +998,8 @@ static struct mfd_cell abx500_common_devs[] = {
.of_compatible = "stericsson,ab8500-denc",
},
{
- .name = "ab8500-temp",
- .of_compatible = "stericsson,ab8500-temp",
+ .name = "abx500-temp",
+ .of_compatible = "stericsson,abx500-temp",
.num_resources = ARRAY_SIZE(ab8500_temp_resources),
.resources = ab8500_temp_resources,
},
--
1.8.0
^ permalink raw reply related
* [RFC PATCH 1/2] ARM: kernel: update cpuinfo to print CPU model name
From: anish singh @ 2013-01-30 7:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5108B532.6000706@ti.com>
On Wed, Jan 30, 2013 at 11:22 AM, Santosh Shilimkar
<santosh.shilimkar@ti.com> wrote:
> On Wednesday 30 January 2013 04:42 AM, Ruslan Bilovol wrote:
>>
>> Hi,
>>
>> On Tue, Jan 29, 2013 at 6:08 PM, Russell King - ARM Linux
>> <linux@arm.linux.org.uk> wrote:
>>>
>>> On Tue, Jan 29, 2013 at 05:54:24PM +0200, Ruslan Bilovol wrote:
>>>>
>>>> CPU implementer : 0x41
>>>> CPU name : OMAP4470 ES1.0 HS
>>>
>>>
>>> Sigh. No. Look at what you're doing - look carefully at the above.
>>>
>>> "CPU implementer" - 0x41. That's A. For ARM Ltd. ARM Ltd implemented
Wouldn't it be nice to display the name rather than hex?I think this would have
definitely occurred to Russell but it is still done this way.I think
there would be
a valid reason for this and it would be nice to know that.
If not then I can cook up a patch.
>>> this CPU. Did ARM Ltd really implement OMAP4470 ? I think TI would be
>>> very upset if that were to be the case.
>>
>>
>> Yes, it would be very surprisingly :)
>>
>>>
>>> So no, OMAP4470 is _NOT_ a CPU. It is a SoC. The CPU inside the SoC is
>>> a collection of ARM Ltd Cortex A9 _CPUs_.
>>>
>>> See? Please, learn what a CPU is as opposed to a SoC.
>>
>>
>> Completely agree with you. I will fix this
>>
> Thank god you agreed to drop your current approach. Please elaborate
> what you are going to fix and also state what user-space features
> changes from OMAP4460 to OMAP4470.
>
> Regards,
> Santosh
>
>
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply
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