* [PATCH] rtc: rtc-mv: Add support for clk to avoid lockups
From: Simon Baatz @ 2013-02-03 11:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359887453-17189-1-git-send-email-andrew@lunn.ch>
Hi Andrew,
On Sun, Feb 03, 2013 at 11:30:53AM +0100, Andrew Lunn wrote:
> The Marvell RTC on Kirkwood makes use of the runit clock. Ensure the
> driver clk_prepare_enable() this clock, otherwise there is a danger
> the SoC will lockup when accessing RTC registers with the clock
> disabled.
>
> Reported-by: Simon Baatz gmbnomis at gmail.com
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> ---
> arch/arm/boot/dts/kirkwood.dtsi | 1 +
> drivers/rtc/rtc-mv.c | 15 ++++++++++++++-
> 2 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
> index 6c5d75f..c57b9c6 100644
> --- a/arch/arm/boot/dts/kirkwood.dtsi
> +++ b/arch/arm/boot/dts/kirkwood.dtsi
> @@ -77,6 +77,7 @@
> compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
> reg = <0x10300 0x20>;
> interrupts = <53>;
> + clocks = <&gate_clk 7>;
> };
>
> spi at 10600 {
> diff --git a/drivers/rtc/rtc-mv.c b/drivers/rtc/rtc-mv.c
> index 57233c8..365bc83 100644
> --- a/drivers/rtc/rtc-mv.c
> +++ b/drivers/rtc/rtc-mv.c
> @@ -14,6 +14,7 @@
> #include <linux/platform_device.h>
> #include <linux/of.h>
> #include <linux/delay.h>
> +#include <linux/clk.h>
> #include <linux/gfp.h>
> #include <linux/module.h>
>
> @@ -41,6 +42,7 @@ struct rtc_plat_data {
> struct rtc_device *rtc;
> void __iomem *ioaddr;
> int irq;
> + struct clk *clk;
> };
>
> static int mv_rtc_set_time(struct device *dev, struct rtc_time *tm)
> @@ -260,6 +262,11 @@ static int mv_rtc_probe(struct platform_device *pdev)
>
> platform_set_drvdata(pdev, pdata);
>
> + pdata->clk = devm_clk_get(&pdev->dev, NULL);
> + /* Not all SoCs require a clock.*/
> + if (!IS_ERR(pdata->clk))
> + clk_prepare_enable(pdata->clk);
> +
There are already I/O accesses to the RTC above this. Thus, you
probably need to move this up.
- Simon
^ permalink raw reply
* [PATCH] rtc: rtc-mv: Add support for clk to avoid lockups
From: Andrew Lunn @ 2013-02-03 11:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130203111055.GA29236@schnuecks.de>
> > + pdata->clk = devm_clk_get(&pdev->dev, NULL);
> > + /* Not all SoCs require a clock.*/
> > + if (!IS_ERR(pdata->clk))
> > + clk_prepare_enable(pdata->clk);
> > +
>
> There are already I/O accesses to the RTC above this. Thus, you
> probably need to move this up.
Doh!
I was trying to keep the cleanup on error simple....
Thanks
Andrew
^ permalink raw reply
* [PATCH v2 1/6] ARM: davinci: da850: fix clock lookup for mdio device
From: Sekhar Nori @ 2013-02-03 11:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359380879-26306-2-git-send-email-prabhakar.lad@ti.com>
On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
> From: Lad, Prabhakar <prabhakar.lad@ti.com>
>
> This patch removes the clock alias for mdio device and adds a entry
> in clock lookup table, this entry can now be used by both DT and NON
> DT case.
>
> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: linux-kernel at vger.kernel.org
> Cc: davinci-linux-open-source at linux.davincidsp.com
> Cc: netdev at vger.kernel.org
> Cc: devicetree-discuss at lists.ozlabs.org
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: Heiko Schocher <hs@denx.de>
> ---
> arch/arm/mach-davinci/da850.c | 1 +
> arch/arm/mach-davinci/devices-da8xx.c | 8 ++------
> 2 files changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
> index 86056ca..f74bfb6 100644
> --- a/arch/arm/mach-davinci/da850.c
> +++ b/arch/arm/mach-davinci/da850.c
> @@ -402,6 +402,7 @@ static struct clk_lookup da850_clks[] = {
> CLK(NULL, "arm", &arm_clk),
> CLK(NULL, "rmii", &rmii_clk),
> CLK("davinci_emac.1", NULL, &emac_clk),
> + CLK("davinci_mdio.0", "fck", &emac_clk),
> CLK("davinci-mcasp.0", NULL, &mcasp_clk),
> CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
> CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
> diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
> index 2d5502d..52faa05 100644
> --- a/arch/arm/mach-davinci/devices-da8xx.c
> +++ b/arch/arm/mach-davinci/devices-da8xx.c
> @@ -444,12 +444,8 @@ int __init da8xx_register_emac(void)
> ret = platform_device_register(&da8xx_mdio_device);
> if (ret < 0)
> return ret;
> - ret = platform_device_register(&da8xx_emac_device);
> - if (ret < 0)
> - return ret;
> - ret = clk_add_alias(NULL, dev_name(&da8xx_mdio_device.dev),
> - NULL, &da8xx_emac_device.dev);
> - return ret;
> +
> + return platform_device_register(&da8xx_emac_device);
You added the look-up only for DA850 which means after this patch da830
network will be broken. Did you test on DA830?
Thanks,
Sekhar
^ permalink raw reply
* [PATCH 2/3] sunxi: dts: Report the pinctrl nodes as gpio-controllers
From: Maxime Ripard @ 2013-02-03 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359889813-10029-1-git-send-email-maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun4i-a10.dtsi | 4 +++-
arch/arm/boot/dts/sun5i-a13.dtsi | 4 +++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index f99f60d..03d2b53 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -18,11 +18,13 @@
};
soc {
- pinctrl at 01c20800 {
+ pio: pinctrl at 01c20800 {
compatible = "allwinner,sun4i-a10-pinctrl";
reg = <0x01c20800 0x400>;
+ gpio-controller;
#address-cells = <1>;
#size-cells = <0>;
+ #gpio-cells = <3>;
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PB22", "PB23";
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index e112189..945bfac 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -19,11 +19,13 @@
};
soc {
- pinctrl at 01c20800 {
+ pio: pinctrl at 01c20800 {
compatible = "allwinner,sun5i-a13-pinctrl";
reg = <0x01c20800 0x400>;
+ gpio-controller;
#address-cells = <1>;
#size-cells = <0>;
+ #gpio-cells = <3>;
uart1_pins_a: uart1 at 0 {
allwinner,pins = "PE10", "PE11";
--
1.7.10.4
^ permalink raw reply related
* [PATCH 3/3] sunxi: a13-olinuxino: Add user LED to the device tree
From: Maxime Ripard @ 2013-02-03 11:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359890311-10110-1-git-send-email-maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
index 4a1e45d..33d1c7e 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
@@ -23,10 +23,30 @@
};
soc {
+ pinctrl at 01c20800 {
+ led_pins_olinuxino: led_pins at 0 {
+ allwinner,pins = "PG9";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <1>;
+ allwinner,pull = <0>;
+ };
+ };
+
uart1: uart at 01c28400 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_b>;
status = "okay";
};
};
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins_olinuxino>;
+
+ power {
+ gpios = <&pio 6 9 0>;
+ default-state = "on";
+ };
+ };
};
--
1.7.10.4
^ permalink raw reply related
* [PATCH] ARM: multiplatform: Sort the max gpio numbers.
From: Maxime Ripard @ 2013-02-03 11:24 UTC (permalink / raw)
To: linux-arm-kernel
When building a multiplatform kernel, we could end up with a smaller
number of GPIOs than the one required by the platform the kernel was
running on.
Sort the max GPIO number by descending order so that we always take the
highest number required.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/Kconfig | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1e86fa9..852ae76 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1626,13 +1626,16 @@ config LOCAL_TIMERS
accounting to be spread across the timer interval, preventing a
"thundering herd" at every timer tick.
+# The GPIO number here must be sorted by descending number. In case of
+# a multiplatform kernel, we just want the highest value required by the
+# selected platforms.
config ARCH_NR_GPIO
int
default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
- default 355 if ARCH_U8500
- default 264 if MACH_H4700
default 512 if SOC_OMAP5
+ default 355 if ARCH_U8500
default 288 if ARCH_VT8500 || ARCH_SUNXI
+ default 264 if MACH_H4700
default 0
help
Maximum number of GPIOs in the system.
--
1.7.10.4
^ permalink raw reply related
* [PATCH v2] rtc: rtc-mv: Add support for clk to avoid lockups
From: Andrew Lunn @ 2013-02-03 11:32 UTC (permalink / raw)
To: linux-arm-kernel
The Marvell RTC on Kirkwood makes use of the runit clock. Ensure the
driver clk_prepare_enable() this clock, otherwise there is a danger
the SoC will lockup when accessing RTC registers with the clock
disabled.
Reported-by: Simon Baatz gmbnomis at gmail.com
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
Since v1:
Enable clock before accessing RTC registers.
arch/arm/boot/dts/kirkwood.dtsi | 1 +
drivers/rtc/rtc-mv.c | 28 ++++++++++++++++++++++++----
2 files changed, 25 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 6c5d75f..c57b9c6 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -77,6 +77,7 @@
compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
reg = <0x10300 0x20>;
interrupts = <53>;
+ clocks = <&gate_clk 7>;
};
spi at 10600 {
diff --git a/drivers/rtc/rtc-mv.c b/drivers/rtc/rtc-mv.c
index 57233c8..8f87fec 100644
--- a/drivers/rtc/rtc-mv.c
+++ b/drivers/rtc/rtc-mv.c
@@ -14,6 +14,7 @@
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/delay.h>
+#include <linux/clk.h>
#include <linux/gfp.h>
#include <linux/module.h>
@@ -41,6 +42,7 @@ struct rtc_plat_data {
struct rtc_device *rtc;
void __iomem *ioaddr;
int irq;
+ struct clk *clk;
};
static int mv_rtc_set_time(struct device *dev, struct rtc_time *tm)
@@ -221,6 +223,7 @@ static int mv_rtc_probe(struct platform_device *pdev)
struct rtc_plat_data *pdata;
resource_size_t size;
u32 rtc_time;
+ int ret = 0;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
@@ -239,11 +242,17 @@ static int mv_rtc_probe(struct platform_device *pdev)
if (!pdata->ioaddr)
return -ENOMEM;
+ pdata->clk = devm_clk_get(&pdev->dev, NULL);
+ /* Not all SoCs require a clock.*/
+ if (!IS_ERR(pdata->clk))
+ clk_prepare_enable(pdata->clk);
+
/* make sure the 24 hours mode is enabled */
rtc_time = readl(pdata->ioaddr + RTC_TIME_REG_OFFS);
if (rtc_time & RTC_HOURS_12H_MODE) {
dev_err(&pdev->dev, "24 Hours mode not supported.\n");
- return -EINVAL;
+ ret = -EINVAL;
+ goto out;
}
/* make sure it is actually functional */
@@ -252,7 +261,8 @@ static int mv_rtc_probe(struct platform_device *pdev)
rtc_time = readl(pdata->ioaddr + RTC_TIME_REG_OFFS);
if (rtc_time == 0x01000000) {
dev_err(&pdev->dev, "internal RTC not ticking\n");
- return -ENODEV;
+ ret = -ENODEV;
+ goto out;
}
}
@@ -268,8 +278,10 @@ static int mv_rtc_probe(struct platform_device *pdev)
} else
pdata->rtc = rtc_device_register(pdev->name, &pdev->dev,
&mv_rtc_ops, THIS_MODULE);
- if (IS_ERR(pdata->rtc))
- return PTR_ERR(pdata->rtc);
+ if (IS_ERR(pdata->rtc)) {
+ ret = PTR_ERR(pdata->rtc);
+ goto out;
+ }
if (pdata->irq >= 0) {
writel(0, pdata->ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
@@ -282,6 +294,11 @@ static int mv_rtc_probe(struct platform_device *pdev)
}
return 0;
+out:
+ if (!IS_ERR(pdata->clk))
+ clk_disable_unprepare(pdata->clk);
+
+ return ret;
}
static int __exit mv_rtc_remove(struct platform_device *pdev)
@@ -292,6 +309,9 @@ static int __exit mv_rtc_remove(struct platform_device *pdev)
device_init_wakeup(&pdev->dev, 0);
rtc_device_unregister(pdata->rtc);
+ if (!IS_ERR(pdata->clk))
+ clk_disable_unprepare(pdata->clk);
+
return 0;
}
--
1.7.10.4
^ permalink raw reply related
* [PATCH v2 1/6] ARM: davinci: da850: fix clock lookup for mdio device
From: Prabhakar Lad @ 2013-02-03 11:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <510E469D.9020807@ti.com>
Sekhar,
On Sun, Feb 3, 2013 at 4:44 PM, Sekhar Nori <nsekhar@ti.com> wrote:
> On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
>> From: Lad, Prabhakar <prabhakar.lad@ti.com>
>>
>> This patch removes the clock alias for mdio device and adds a entry
>> in clock lookup table, this entry can now be used by both DT and NON
>> DT case.
>>
>> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
>> Cc: linux-arm-kernel at lists.infradead.org
>> Cc: linux-kernel at vger.kernel.org
>> Cc: davinci-linux-open-source at linux.davincidsp.com
>> Cc: netdev at vger.kernel.org
>> Cc: devicetree-discuss at lists.ozlabs.org
>> Cc: Sekhar Nori <nsekhar@ti.com>
>> Cc: Heiko Schocher <hs@denx.de>
>> ---
>> arch/arm/mach-davinci/da850.c | 1 +
>> arch/arm/mach-davinci/devices-da8xx.c | 8 ++------
>> 2 files changed, 3 insertions(+), 6 deletions(-)
>>
>> diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
>> index 86056ca..f74bfb6 100644
>> --- a/arch/arm/mach-davinci/da850.c
>> +++ b/arch/arm/mach-davinci/da850.c
>> @@ -402,6 +402,7 @@ static struct clk_lookup da850_clks[] = {
>> CLK(NULL, "arm", &arm_clk),
>> CLK(NULL, "rmii", &rmii_clk),
>> CLK("davinci_emac.1", NULL, &emac_clk),
>> + CLK("davinci_mdio.0", "fck", &emac_clk),
>> CLK("davinci-mcasp.0", NULL, &mcasp_clk),
>> CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
>> CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
>> diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
>> index 2d5502d..52faa05 100644
>> --- a/arch/arm/mach-davinci/devices-da8xx.c
>> +++ b/arch/arm/mach-davinci/devices-da8xx.c
>> @@ -444,12 +444,8 @@ int __init da8xx_register_emac(void)
>> ret = platform_device_register(&da8xx_mdio_device);
>> if (ret < 0)
>> return ret;
>> - ret = platform_device_register(&da8xx_emac_device);
>> - if (ret < 0)
>> - return ret;
>> - ret = clk_add_alias(NULL, dev_name(&da8xx_mdio_device.dev),
>> - NULL, &da8xx_emac_device.dev);
>> - return ret;
>> +
>> + return platform_device_register(&da8xx_emac_device);
>
> You added the look-up only for DA850 which means after this patch da830
> network will be broken. Did you test on DA830?
Ah yes my bad this will break network on da830, I'll fix it and respin
this patch
alone only, if there aren't any comments for the rest of the series.
Regards,
--Prabhakar
> Thanks,
> Sekhar
^ permalink raw reply
* [PATCH 6/6] ARM: integrator: ensure ap_syscon_base is initialised when !CONFIG_MMU
From: Will Deacon @ 2013-02-03 11:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130131225630.GB26523@quad.lixom.net>
On Thu, Jan 31, 2013 at 10:56:30PM +0000, Olof Johansson wrote:
> On Thu, Jan 31, 2013 at 10:34:17PM +0000, Will Deacon wrote:
> > [adding Olof and Arnd] Is it worth sending a pull request containing a
> > single patch, or can this patch just be picked directly?
>
> Definitely ok to just send the patch like this. However -- where was
> the breakage introduced, i.e. what should we apply the fix to?
I think it's been broken for a little while as it only affects !MMU
configurations, which aren't especially popular. My guess is that
83feba511e5d ("ARM: integrator: remove static AP syscon mapping") is what
caused the breakage.
The fix should apply against mainline.
Cheers,
Will
^ permalink raw reply
* [PATCH v2 2/6] ARM: davinci: da850: add DT node for mdio device
From: Sekhar Nori @ 2013-02-03 11:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359380879-26306-3-git-send-email-prabhakar.lad@ti.com>
On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
> From: Lad, Prabhakar <prabhakar.lad@ti.com>
>
> Add mdio device tree node information to da850 by
> providing register details and bus frequency of mdio.
>
> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: linux-kernel at vger.kernel.org
> Cc: davinci-linux-open-source at linux.davincidsp.com
> Cc: netdev at vger.kernel.org
> Cc: devicetree-discuss at lists.ozlabs.org
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: Heiko Schocher <hs@denx.de>
> ---
> arch/arm/boot/dts/da850-evm.dts | 3 +++
> arch/arm/boot/dts/da850.dtsi | 7 +++++++
> 2 files changed, 10 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
> index 98c1a48..a319491 100644
> --- a/arch/arm/boot/dts/da850-evm.dts
> +++ b/arch/arm/boot/dts/da850-evm.dts
> @@ -27,6 +27,9 @@
> serial2: serial at 1d0d000 {
> status = "okay";
> };
> + mdio: davinci_mdio at 1e24000 {
This should just be:
mdio: mdio at 1e24000
inline with how we avoid adding davinci prefix to each node name.
> + status = "okay";
> + };
> };
> nand_cs3 at 62000000 {
> status = "okay";
> diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
> index 7c84822..ba28f2d 100644
> --- a/arch/arm/boot/dts/da850.dtsi
> +++ b/arch/arm/boot/dts/da850.dtsi
> @@ -81,6 +81,13 @@
> interrupts = <61>;
> status = "disabled";
> };
> + mdio: davinci_mdio at 1e24000 {
> + compatible = "ti,davinci_mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x224000 0x1000>;
> + bus_freq = <2200000>;
The bus frequency is board specific and it is better this is defined in
da850-evm.dts
Thanks,
Sekhar
^ permalink raw reply
* [PATCH v2 4/6] ARM: davinci: da850: add DT node for eth0.
From: Sekhar Nori @ 2013-02-03 12:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359380879-26306-5-git-send-email-prabhakar.lad@ti.com>
On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
> From: Lad, Prabhakar <prabhakar.lad@ti.com>
>
> Add eth0 device tree node information and pinmux for mii to da850 by
> providing interrupt details and local mac address of eth0.
>
> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: linux-kernel at vger.kernel.org
> Cc: davinci-linux-open-source at linux.davincidsp.com
> Cc: netdev at vger.kernel.org
> Cc: devicetree-discuss at lists.ozlabs.org
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: Heiko Schocher <hs@denx.de>
> ---
> arch/arm/boot/dts/da850-evm.dts | 5 +++++
> arch/arm/boot/dts/da850.dtsi | 35 +++++++++++++++++++++++++++++++++++
> 2 files changed, 40 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
> index a319491..19aa2b3 100644
> --- a/arch/arm/boot/dts/da850-evm.dts
> +++ b/arch/arm/boot/dts/da850-evm.dts
> @@ -30,6 +30,11 @@
> mdio: davinci_mdio at 1e24000 {
> status = "okay";
> };
> + eth0: emac at 1e20000 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&mii_pins>;
> + };
> };
> nand_cs3 at 62000000 {
> status = "okay";
> diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
> index ba28f2d..76905f3 100644
> --- a/arch/arm/boot/dts/da850.dtsi
> +++ b/arch/arm/boot/dts/da850.dtsi
> @@ -56,6 +56,26 @@
> 0x30 0x01100000 0x0ff00000
> >;
> };
> + mii_pins: pinmux_mii_pins {
> + pinctrl-single,bits = <
> + /*
> + * MII_TXEN, MII_TXCLK, MII_COL
> + * MII_TXD_3, MII_TXD_2, MII_TXD_1
> + * MII_TXD_0
> + */
> + 0x8 0x88888880 0xfffffff0
> + /*
> + * MII_RXER, MII_CRS, MII_RXCLK
> + * MII_RXDV, MII_RXD_3, MII_RXD_2
> + * MII_RXD_1, MII_RXD_0
> + */
> + 0xc 0x88888888 0xffffffff
> + /* MDIO_CLK, MDIO_D */
You call this mii_pins, but include mdio pins in there as well. Can you
separate them out? Then some board which uses rmii can simply reuse the
entry.
> + 0x10 0x00222288 0x00ffffff
> + /* GPIO2_6 */
> + 0x18 0x00000080 0x000000f0
This is SoC specific pin list. Such board specific pins should not make
it here.
> + >;
> + };
> };
> serial0: serial at 1c42000 {
> compatible = "ns16550a";
> @@ -88,6 +108,21 @@
> reg = <0x224000 0x1000>;
> bus_freq = <2200000>;
> };
> + eth0: emac at 1e20000 {
> + compatible = "ti,davinci-dm6467-emac";
> + reg = <0x220000 0x4000>;
> + ti,davinci-ctrl-reg-offset = <0x3000>;
> + ti,davinci-ctrl-mod-reg-offset = <0x2000>;
> + ti,davinci-ctrl-ram-offset = <0>;
> + ti,davinci-ctrl-ram-size = <0x2000>;
> + local-mac-address = [ 00 00 00 00 00 00 ];
> + interrupts = <33
> + 34
> + 35
> + 36
> + >;
> + phy-handle = <&mdio>;
I doubt this is required. This property is to pass a handle to the phy,
not mdio bus.
Thanks,
Sekhar
^ permalink raw reply
* [PATCH v2 2/6] ARM: davinci: da850: add DT node for mdio device
From: Prabhakar Lad @ 2013-02-03 12:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <510E4FB8.4050705@ti.com>
Sekhar,
On Sun, Feb 3, 2013 at 5:23 PM, Sekhar Nori <nsekhar@ti.com> wrote:
> On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
>> From: Lad, Prabhakar <prabhakar.lad@ti.com>
>>
>> Add mdio device tree node information to da850 by
>> providing register details and bus frequency of mdio.
>>
>> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
>> Cc: linux-arm-kernel at lists.infradead.org
>> Cc: linux-kernel at vger.kernel.org
>> Cc: davinci-linux-open-source at linux.davincidsp.com
>> Cc: netdev at vger.kernel.org
>> Cc: devicetree-discuss at lists.ozlabs.org
>> Cc: Sekhar Nori <nsekhar@ti.com>
>> Cc: Heiko Schocher <hs@denx.de>
>> ---
>> arch/arm/boot/dts/da850-evm.dts | 3 +++
>> arch/arm/boot/dts/da850.dtsi | 7 +++++++
>> 2 files changed, 10 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
>> index 98c1a48..a319491 100644
>> --- a/arch/arm/boot/dts/da850-evm.dts
>> +++ b/arch/arm/boot/dts/da850-evm.dts
>> @@ -27,6 +27,9 @@
>> serial2: serial at 1d0d000 {
>> status = "okay";
>> };
>> + mdio: davinci_mdio at 1e24000 {
>
> This should just be:
>
> mdio: mdio at 1e24000
>
> inline with how we avoid adding davinci prefix to each node name.
>
Ok
>> + status = "okay";
>> + };
>> };
>> nand_cs3 at 62000000 {
>> status = "okay";
>> diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
>> index 7c84822..ba28f2d 100644
>> --- a/arch/arm/boot/dts/da850.dtsi
>> +++ b/arch/arm/boot/dts/da850.dtsi
>> @@ -81,6 +81,13 @@
>> interrupts = <61>;
>> status = "disabled";
>> };
>> + mdio: davinci_mdio at 1e24000 {
>> + compatible = "ti,davinci_mdio";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0x224000 0x1000>;
>> + bus_freq = <2200000>;
>
> The bus frequency is board specific and it is better this is defined in
> da850-evm.dts
>
Ok I'll move this to dts file.
Regards,
--Prabhakar
> Thanks,
> Sekhar
^ permalink raw reply
* [PATCH v2 6/6] ARM: davinci: da850: configure system configuration chip(CFGCHIP3) for emac
From: Sekhar Nori @ 2013-02-03 12:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359380879-26306-7-git-send-email-prabhakar.lad@ti.com>
On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
> From: Lad, Prabhakar <prabhakar.lad@ti.com>
>
> The system configuration chip CFGCHIP3, controls the emac module.
> This patch appropriately configures this register for emac and
> sets DA850_MII_MDIO_CLKEN_PIN GPIO pin appropriately.
>
> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: linux-kernel at vger.kernel.org
> Cc: davinci-linux-open-source at linux.davincidsp.com
> Cc: netdev at vger.kernel.org
> Cc: devicetree-discuss at lists.ozlabs.org
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: Heiko Schocher <hs@denx.de>
> ---
> arch/arm/mach-davinci/da8xx-dt.c | 28 ++++++++++++++++++++++++++++
> 1 files changed, 28 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
> index e533a0a..4a096e3 100644
> --- a/arch/arm/mach-davinci/da8xx-dt.c
> +++ b/arch/arm/mach-davinci/da8xx-dt.c
> @@ -8,6 +8,7 @@
> * published by the Free Software Foundation.
> */
> #include <linux/io.h>
> +#include <linux/gpio.h>
> #include <linux/of_irq.h>
> #include <linux/of_platform.h>
> #include <linux/irqdomain.h>
> @@ -39,6 +40,32 @@ static void __init da8xx_init_irq(void)
>
> #ifdef CONFIG_ARCH_DAVINCI_DA850
>
> +static void __init da8xx_config_emac(void)
> +{
> +#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
> +#define DA850_EMAC_MODE_SELECT BIT(8)
> + void __iomem *cfg_chip3_base;
> + int ret;
> + u32 val;
> +
> + cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
> +
> + val = __raw_readl(cfg_chip3_base);
> + val &= ~DA850_EMAC_MODE_SELECT;
> + /* configure the CFGCHIP3 register for MII */
> + __raw_writel(val, cfg_chip3_base);
Use readl/writel instead.
> + pr_info("EMAC: MII PHY configured\n");
> +
> + ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
> + if (ret) {
> + pr_warn("Cannot open GPIO %d\n",
> + DA850_MII_MDIO_CLKEN_PIN);
> + return;
> + }
> + /* Enable/Disable MII MDIO clock */
> + gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, 0);
> +}
> +
> struct of_dev_auxdata da8xx_auxdata[] __initdata = {
> OF_DEV_AUXDATA("ti,davinci_mdio", 0x01e24000, "davinci_mdio.0", NULL),
> OF_DEV_AUXDATA("ti,davinci-dm6467-emac", 0x01e20000, "davinci_emac.1",
> @@ -52,6 +79,7 @@ static void __init da850_init_machine(void)
> da8xx_auxdata, NULL);
>
> da8xx_uart_clk_enable();
> + da8xx_config_emac();
There are couple of issues with this implementation.
1) da8xx_config_emac() is specific to DA850 EVM, but masquerades as
generic for da8xx. Looks like you need two functions, one for soc
specific configuration and one board specific.
2) da8xx_config_emac() goes through all the time, whether the
particular board has emac module or not. Shouldn't
da8xx_config_emac() check if emac is actually enabled in the passed
dtb and only the do the configuration?
3) The function assumes mii is used always, you can use the rmii_en dt
property to check if rmii/mii is enabled and configure the soc/board
accordingly.
4) If the same function can work both for da850 and da830, then it can
be implemented outside of CONFIG_ARCH_DAVINCI_DA850.
Thanks,
Sekhar
^ permalink raw reply
* [PATCH V2 3/6] ARM: davinci: da850: add DT node for I2C0
From: Sekhar Nori @ 2013-02-03 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359445134-13323-4-git-send-email-manishv.b@ti.com>
On 1/29/2013 1:08 PM, Vishwanathrao Badarkhe, Manish wrote:
> Add I2C0 device tree node information to da850-evm.
> Also, add I2C0 pin muxing information in da850-evm.
>
> Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
> ---
> Changes since V1:
> - Updated i2c0 node names in dts and dtsi file.
> - Removed interrupt parent from i2c0 node.
> - Handled i2c0 pin mux inside i2c0 node.
>
> :100644 100644 433027f... c9ed683... M arch/arm/boot/dts/da850-evm.dts
> :100644 100644 5e0eb5c... 245ab9a... M arch/arm/boot/dts/da850.dtsi
> arch/arm/boot/dts/da850-evm.dts | 5 +++++
> arch/arm/boot/dts/da850.dtsi | 15 +++++++++++++++
> 2 files changed, 20 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
> index 433027f..c9ed683 100644
> --- a/arch/arm/boot/dts/da850-evm.dts
> +++ b/arch/arm/boot/dts/da850-evm.dts
> @@ -27,6 +27,11 @@
> serial2: serial at 1d0d000 {
> status = "okay";
> };
> + i2c0: i2c0 at 1c22000 {
This should be:
i2c0: i2c at 1c22000
inline with what has been done in rest of this file.
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c0_pins>;
> + };
> };
> nand_cs3 at 62000000 {
> status = "okay";
> diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
> index 5e0eb5c..245ab9a 100644
> --- a/arch/arm/boot/dts/da850.dtsi
> +++ b/arch/arm/boot/dts/da850.dtsi
> @@ -56,6 +56,12 @@
> 0x30 0x01100000 0x0ff00000
> >;
> };
> + i2c0_pins: pinmux_i2c0_pins {
> + pinctrl-single,bits = <
> + /* I2C0_SDA,I2C0_SCL */
> + 0x10 0x00002200 0x0000ff00
> + >;
> + };
> };
> serial0: serial at 1c42000 {
> compatible = "ns16550a";
> @@ -81,6 +87,15 @@
> interrupts = <61>;
> status = "disabled";
> };
> + i2c0: i2c0 at 1c22000 {
> + compatible = "ti,davinci-i2c";
> + reg = <0x22000 0x1000>;
> + clock-frequency = <100000>;
The clock frequency is board specific. This should come from da850-evm.dts.
Also, I think you can merge the auxdata addition with this patch. Can
you post the i2c0 support separate from this series, so it can be taken
independently? Looks like other patches have some dependencies/acks needed.
Thanks,
Sekhar
^ permalink raw reply
* [PATCH] ARM: OMAP2+: Get rid of custom OMAP_32K_TIMER_HZ
From: Igor Grinberg @ 2013-02-03 12:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359646320-9086-1-git-send-email-santosh.shilimkar@ti.com>
On 01/31/13 17:32, Santosh Shilimkar wrote:
> The timekeeping doesn't depend on HZ value in presence of fine grained
> clocksource and hence there should not be any time drift because of HZ
> value which was chosen to be divisor of 32768.
>
> OMAP has been using HZ = 128 value to avoid any time drift issues
> because of 32768 HZ clock. But with various measurements performed
> with HZ = 100, no time drift is observed and it also proves the
> point about HZ not having impact on time keeping on OMAP.
Great! I had the same patch in my tree already for several months,
but I was afraid to send it as I had no time to test it thoroughly.
These kind of things are always scary to send without proper testing...
Thank you very much for testing and sending this out!
>
> Very informative thread on this topic is here:
> https://lkml.org/lkml/2013/1/29/435
>
> Special thanks to John Stulz, Arnd Bergmann and Russell King for their
> valuable suggestions.
>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: John Stultz <john.stultz@linaro.org>
> Cc: Tony Lindgren <tony@atomide.com>
If it still not too late:
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
> ---
> arch/arm/Kconfig | 1 -
> arch/arm/plat-omap/Kconfig | 9 ---------
> arch/arm/plat-omap/include/plat/timex.h | 8 --------
> 3 files changed, 18 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index b35b27f..5493164 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -1648,7 +1648,6 @@ config HZ
> int
> default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
> ARCH_S5PV210 || ARCH_EXYNOS4
> - default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
> default AT91_TIMER_HZ if ARCH_AT91
> default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
> default 100
> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> index 67c859c..ce66eb9 100644
> --- a/arch/arm/plat-omap/Kconfig
> +++ b/arch/arm/plat-omap/Kconfig
> @@ -147,15 +147,6 @@ config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID
> help
> PPA routine service ID for setting L2 auxiliary control register.
>
> -config OMAP_32K_TIMER_HZ
> - int "Kernel internal timer frequency for 32KHz timer"
> - range 32 1024
> - depends on OMAP_32K_TIMER
> - default "128"
> - help
> - Kernel internal timer frequency should be a divisor of 32768,
> - such as 64 or 128.
> -
> config OMAP_DM_TIMER
> bool "Use dual-mode timer"
> depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
> diff --git a/arch/arm/plat-omap/include/plat/timex.h b/arch/arm/plat-omap/include/plat/timex.h
> index 6d35767..e27d2da 100644
> --- a/arch/arm/plat-omap/include/plat/timex.h
> +++ b/arch/arm/plat-omap/include/plat/timex.h
> @@ -28,14 +28,6 @@
> #if !defined(__ASM_ARCH_OMAP_TIMEX_H)
> #define __ASM_ARCH_OMAP_TIMEX_H
>
> -/*
> - * OMAP 32KHz timer updates time one jiffie at a time from a secondary timer,
> - * and that's why the CLOCK_TICK_RATE is not 32768.
> - */
> -#ifdef CONFIG_OMAP_32K_TIMER
> -#define CLOCK_TICK_RATE (CONFIG_OMAP_32K_TIMER_HZ)
> -#else
> #define CLOCK_TICK_RATE (HZ * 100000UL)
> -#endif
>
> #endif /* __ASM_ARCH_OMAP_TIMEX_H */
>
--
Regards,
Igor.
^ permalink raw reply
* [PATCH v2 05/10] gpio: pxa: define nr gpios in platform data
From: Igor Grinberg @ 2013-02-03 13:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359886551-20950-6-git-send-email-haojian.zhuang@linaro.org>
Hi Haojian,
On 02/03/13 12:15, Haojian Zhuang wrote:
> Avoid to define gpio numbers in gpio driver. Define it in platform data
> instead.
>
> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Same comments as for previous version...
> ---
> arch/arm/mach-mmp/aspenite.c | 1 +
> arch/arm/mach-mmp/avengers_lite.c | 1 +
> arch/arm/mach-mmp/brownstone.c | 1 +
> arch/arm/mach-mmp/flint.c | 1 +
> arch/arm/mach-mmp/gplugd.c | 1 +
> arch/arm/mach-mmp/tavorevb.c | 1 +
> arch/arm/mach-mmp/teton_bga.c | 1 +
> arch/arm/mach-mmp/ttc_dkb.c | 1 +
> arch/arm/mach-pxa/pxa25x.c | 3 +++
> arch/arm/mach-pxa/pxa27x.c | 1 +
> arch/arm/mach-pxa/pxa3xx.c | 15 +++++++++++-
> drivers/gpio/gpio-pxa.c | 48 +++++++------------------------------
> include/linux/gpio-pxa.h | 1 +
> 13 files changed, 35 insertions(+), 41 deletions(-)
[...]
> diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
> index 656a1bb..a0cc797 100644
> --- a/arch/arm/mach-pxa/pxa3xx.c
> +++ b/arch/arm/mach-pxa/pxa3xx.c
> @@ -435,6 +435,10 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
> pxa_register_device(&pxa3xx_device_i2c_power, info);
> }
>
> +static struct pxa_gpio_platform_data pxa3xx_gpio_info __initdata = {
> + .nr_gpios = 128,
> +};
> +
missing
#include <linux/gpio-pxa.h>
> static struct platform_device *devices[] __initdata = {
> &pxa_device_gpio,
> &pxa27x_device_udc,
> @@ -482,8 +486,17 @@ static int __init pxa3xx_init(void)
> register_syscore_ops(&pxa3xx_mfp_syscore_ops);
> register_syscore_ops(&pxa3xx_clock_syscore_ops);
>
> - if (!of_have_populated_dt())
> + if (!of_have_populated_dt()) {
> + if (cpu_is_pxa93x())
> + pxa3xx_gpio_info.nr_gpios = 192;
> + ret = platform_device_add_data(&pxa_device_gpio,
> + &pxa3xx_gpio_info,
> + sizeof(struct pxa_gpio_platform_data);
Closing parenthesis is missing...
> + if (ret < 0)
> + break;
> +
> ret = platform_add_devices(devices, ARRAY_SIZE(devices));
> + }
> }
>
> return ret;
[...]
--
Regards,
Igor.
^ permalink raw reply
* [PATCH 1/2] ARM: mxs: dts: Add gpio-keys for the rotary to the CFA-10049
From: Shawn Guo @ 2013-02-03 13:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359626424-22546-2-git-send-email-maxime.ripard@free-electrons.com>
On Thu, Jan 31, 2013 at 11:00:23AM +0100, Maxime Ripard wrote:
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Applied both, thanks.
> ---
> arch/arm/boot/dts/imx28-cfa10049.dts | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts
> index cabc33a..5db3789 100644
> --- a/arch/arm/boot/dts/imx28-cfa10049.dts
> +++ b/arch/arm/boot/dts/imx28-cfa10049.dts
> @@ -45,6 +45,7 @@
> reg = <0>;
> fsl,pinmux-ids = <
> 0x2133 /* MX28_PAD_SSP2_D3__GPIO_2_19 */
> + 0x31a3 /* MX28_PAD_SAIF_SDATA0__GPIO_3_26 */
> 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
> >;
> fsl,drive-strength = <0>;
> @@ -276,6 +277,19 @@
> };
> };
>
> + gpio_keys {
> + compatible = "gpio-keys";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + rotary_button {
> + label = "rotary_button";
> + gpios = <&gpio3 26 1>;
> + debounce-interval = <10>;
> + linux,code = <28>;
> + };
> + };
> +
> backlight {
> compatible = "pwm-backlight";
> pwms = <&pwm 3 5000000>;
> --
> 1.7.10.4
>
^ permalink raw reply
* Question: Way to add missing pads & pins into pinctrl driver
From: Shawn Guo @ 2013-02-03 13:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359638150.473297558@f28.mail.ru>
On Thu, Jan 31, 2013 at 05:15:50PM +0400, Alexander Shiyan wrote:
> Hello.
>
> I have found some missing pads and pins definitions in the pinctrl-imx51 driver.
> Appending in sort order will break current devicetree configurations, so I want
> to know better way for add these definitions. Of course I can just append
> at the end, but this will break sort order. How to do it better?
They will have to be added at the end.
But that big array defining a bunch of data of pad really gives me
a headache whenever I have a new SoC support to be added. I will be
working on moving all these data over into device tree, hopefully soon.
Shawn
^ permalink raw reply
* [PATCH v4 1/3] cpufreq: kirkwood: Add a cpufreq driver for Marvell Kirkwood SoCs
From: Shawn Guo @ 2013-02-03 14:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359729096-15371-2-git-send-email-andrew@lunn.ch>
On Fri, Feb 01, 2013 at 03:31:33PM +0100, Andrew Lunn wrote:
> The Marvell Kirkwood SoCs have simple cpufreq support in hardware. The
> CPU can either use the a high speed cpu clock, or the slower DDR
> clock. Add a driver to swap between these two clock sources.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> Acked-by: Jason Cooper <jason@lakedaemon.net>
> ---
>
> To be commited by: Rafael J. Wysocki
>
> drivers/clk/mvebu/clk-gating-ctrl.c | 1 +
> drivers/cpufreq/Kconfig.arm | 6 +
> drivers/cpufreq/Makefile | 1 +
> drivers/cpufreq/kirkwood-cpufreq.c | 277 +++++++++++++++++++++++++++++++++++
> 4 files changed, 285 insertions(+)
> create mode 100644 drivers/cpufreq/kirkwood-cpufreq.c
>
> diff --git a/drivers/clk/mvebu/clk-gating-ctrl.c b/drivers/clk/mvebu/clk-gating-ctrl.c
> index 8fa5408..ebf141d 100644
> --- a/drivers/clk/mvebu/clk-gating-ctrl.c
> +++ b/drivers/clk/mvebu/clk-gating-ctrl.c
> @@ -193,6 +193,7 @@ static const struct mvebu_soc_descr __initconst kirkwood_gating_descr[] = {
> { "runit", NULL, 7 },
> { "xor0", NULL, 8 },
> { "audio", NULL, 9 },
> + { "powersave", "cpuclk", 11 },
> { "sata0", NULL, 14 },
> { "sata1", NULL, 15 },
> { "xor1", NULL, 16 },
> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
> index a0b3661..80c8229 100644
> --- a/drivers/cpufreq/Kconfig.arm
> +++ b/drivers/cpufreq/Kconfig.arm
> @@ -77,6 +77,12 @@ config ARM_EXYNOS5250_CPUFREQ
> This adds the CPUFreq driver for Samsung EXYNOS5250
> SoC.
>
> +config ARM_KIRKWOOD_CPUFREQ
> + def_bool ARCH_KIRKWOOD && OF
> + help
> + This adds the CPUFreq driver for Marvell Kirkwood
> + SoCs.
> +
> config ARM_SPEAR_CPUFREQ
> bool "SPEAr CPUFreq support"
> depends on PLAT_SPEAR
> diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
> index fadc4d4..39a0ffe 100644
> --- a/drivers/cpufreq/Makefile
> +++ b/drivers/cpufreq/Makefile
> @@ -50,6 +50,7 @@ obj-$(CONFIG_ARM_EXYNOS_CPUFREQ) += exynos-cpufreq.o
> obj-$(CONFIG_ARM_EXYNOS4210_CPUFREQ) += exynos4210-cpufreq.o
> obj-$(CONFIG_ARM_EXYNOS4X12_CPUFREQ) += exynos4x12-cpufreq.o
> obj-$(CONFIG_ARM_EXYNOS5250_CPUFREQ) += exynos5250-cpufreq.o
> +obj-$(CONFIG_ARM_KIRKWOOD_CPUFREQ) += kirkwood-cpufreq.o
> obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o
> obj-$(CONFIG_ARM_SPEAR_CPUFREQ) += spear-cpufreq.o
>
> diff --git a/drivers/cpufreq/kirkwood-cpufreq.c b/drivers/cpufreq/kirkwood-cpufreq.c
> new file mode 100644
> index 0000000..8923689
> --- /dev/null
> +++ b/drivers/cpufreq/kirkwood-cpufreq.c
> @@ -0,0 +1,277 @@
> +/*
> + * kirkwood_freq.c: cpufreq driver for the Marvell kirkwood
> + *
> + * Copyright (C) 2013 Andrew Lunn <andrew@lunn.ch>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/clk.h>
> +#include <linux/clk-provider.h>
Why do you need this header?
> +#include <linux/cpufreq.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/io.h>
> +#include <asm/proc-fns.h>
> +
> +#define CPU_SW_INT_BLK BIT(28)
> +
> +static struct priv
> +{
> + struct clk *cpu_clk;
> + struct clk *ddr_clk;
> + struct clk *powersave_clk;
> + struct device *dev;
> + void __iomem *base;
> +} priv;
> +
> +#define STATE_CPU_FREQ 0x01
> +#define STATE_DDR_FREQ 0x02
> +
> +/*
> + * Kirkwood can swap the clock to the CPU between two clocks:
> + *
> + * - cpu clk
> + * - ddr clk
> + *
> + * The frequencies are set at runtime before registering this *
> + * table.
> + */
> +static struct cpufreq_frequency_table kirkwood_freq_table[] = {
> + {STATE_CPU_FREQ, 0}, /* CPU uses cpuclk */
> + {STATE_DDR_FREQ, 0}, /* CPU uses ddrclk */
> + {0, CPUFREQ_TABLE_END},
> +};
> +
> +static unsigned int kirkwood_cpufreq_get_cpu_frequency(unsigned int cpu)
> +{
> + if (__clk_is_enabled(priv.powersave_clk))
> + return kirkwood_freq_table[1].frequency;
> + return kirkwood_freq_table[0].frequency;
> +}
> +
> +static void kirkwood_cpufreq_set_cpu_state(unsigned int index)
> +{
> + struct cpufreq_freqs freqs;
> + unsigned int state = kirkwood_freq_table[index].index;
> + unsigned long reg;
> +
> + freqs.old = kirkwood_cpufreq_get_cpu_frequency(0);
> + freqs.new = kirkwood_freq_table[index].frequency;
> + freqs.cpu = 0; /* Kirkwood is UP */
> +
> + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
> +
> + dev_dbg(priv.dev, "Attempting to set frequency to %i KHz\n",
> + kirkwood_freq_table[index].frequency);
> + dev_dbg(priv.dev, "old frequency was %i KHz\n",
> + kirkwood_cpufreq_get_cpu_frequency(0));
> +
> + if (freqs.old != freqs.new) {
> + local_irq_disable();
> +
> + /* Disable interrupts to the CPU */
> + reg = readl_relaxed(priv.base);
> + reg |= CPU_SW_INT_BLK;
> + writel_relaxed(reg, priv.base);
> +
> + switch (state) {
> + case STATE_CPU_FREQ:
> + clk_disable(priv.powersave_clk);
> + break;
> + case STATE_DDR_FREQ:
> + clk_enable(priv.powersave_clk);
> + break;
> + }
> +
> + /* Wait-for-Interrupt, while the hardware changes frequency */
> + cpu_do_idle();
> +
> + /* Enable interrupts to the CPU */
> + reg = readl_relaxed(priv.base);
> + reg &= ~CPU_SW_INT_BLK;
> + writel_relaxed(reg, priv.base);
> +
> + local_irq_enable();
> + }
> + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
> +};
> +
> +static int kirkwood_cpufreq_verify(struct cpufreq_policy *policy)
> +{
> + return cpufreq_frequency_table_verify(policy, kirkwood_freq_table);
> +}
> +
> +static int kirkwood_cpufreq_target(struct cpufreq_policy *policy,
> + unsigned int target_freq,
> + unsigned int relation)
> +{
> + unsigned int index = 0;
> +
> + if (cpufreq_frequency_table_target(policy, kirkwood_freq_table,
> + target_freq, relation, &index))
> + return -EINVAL;
> +
> + kirkwood_cpufreq_set_cpu_state(index);
> +
> + return 0;
> +}
> +
> +/* Module init and exit code */
> +static int kirkwood_cpufreq_cpu_init(struct cpufreq_policy *policy)
> +{
> + int result;
> +
> + /* cpuinfo and default policy values */
> + policy->cpuinfo.transition_latency = 5000; /* 5uS */
> + policy->cur = kirkwood_cpufreq_get_cpu_frequency(0);
> +
> + result = cpufreq_frequency_table_cpuinfo(policy, kirkwood_freq_table);
> + if (result)
> + return result;
> +
> + cpufreq_frequency_table_get_attr(kirkwood_freq_table, policy->cpu);
> +
> + return 0;
> +}
> +
> +static int kirkwood_cpufreq_cpu_exit(struct cpufreq_policy *policy)
> +{
> + cpufreq_frequency_table_put_attr(policy->cpu);
> + return 0;
> +}
> +
> +static struct freq_attr *kirkwood_cpufreq_attr[] = {
> + &cpufreq_freq_attr_scaling_available_freqs,
> + NULL,
> +};
> +
> +static struct cpufreq_driver kirkwood_cpufreq_driver = {
> + .get = kirkwood_cpufreq_get_cpu_frequency,
> + .verify = kirkwood_cpufreq_verify,
> + .target = kirkwood_cpufreq_target,
> + .init = kirkwood_cpufreq_cpu_init,
> + .exit = kirkwood_cpufreq_cpu_exit,
> + .name = "kirkwood-cpufreq",
> + .owner = THIS_MODULE,
> + .attr = kirkwood_cpufreq_attr,
> +};
> +
> +static int kirkwood_cpufreq_probe(struct platform_device *pdev)
> +{
> + struct device_node *np_core = of_find_compatible_node(
> + NULL, NULL, "marvell,kirkwood-core-clock");
> + struct device_node *np_gating = of_find_compatible_node(
> + NULL, NULL, "marvell,kirkwood-gating-clock");
> + struct of_phandle_args clkspec;
> + struct resource *res;
> + int err;
> +
> + if (!np_core || !np_gating) {
> + if (np_core)
> + of_node_put(np_core);
> + if (np_gating)
> + of_node_put(np_gating);
> + return -ENODEV;
> + }
> +
> + priv.dev = &pdev->dev;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!res) {
> + dev_err(&pdev->dev, "Cannot get memory resource\n");
> + return -ENODEV;
> + }
> + priv.base = devm_request_and_ioremap(&pdev->dev, res);
> + if (!priv.base) {
> + dev_err(&pdev->dev, "Cannot ioremap\n");
> + return -EADDRNOTAVAIL;
> + }
> +
> + clkspec.np = np_core;
> + clkspec.args_count = 1;
> + clkspec.args[0] = 1;
> +
> + priv.cpu_clk = of_clk_get_from_provider(&clkspec);
Again, clk client is not really supposed to call this. Having a node
in device tree consuming all the clocks you need and attaching the
node to pdev->dev.of_node will have devm_clk_get just work for you.
The node could reasonably be /cpus/cpu at 0.
Shawn
> + if (IS_ERR(priv.cpu_clk)) {
> + dev_err(priv.dev, "Unable to get cpuclk");
> + return PTR_ERR(priv.cpu_clk);
> + }
> +
> + clk_prepare_enable(priv.cpu_clk);
> + kirkwood_freq_table[0].frequency = clk_get_rate(priv.cpu_clk) / 1000;
> +
> + clkspec.args[0] = 3;
> + priv.ddr_clk = of_clk_get_from_provider(&clkspec);
> + if (IS_ERR(priv.ddr_clk)) {
> + dev_err(priv.dev, "Unable to get ddrclk");
> + err = PTR_ERR(priv.ddr_clk);
> + goto out_cpu;
> + }
> +
> + clk_prepare_enable(priv.ddr_clk);
> + kirkwood_freq_table[1].frequency = clk_get_rate(priv.ddr_clk) / 1000;
> +
> + clkspec.np = np_gating;
> + clkspec.args[0] = 11;
> + priv.powersave_clk = of_clk_get_from_provider(&clkspec);
> + if (IS_ERR(priv.powersave_clk)) {
> + dev_err(priv.dev, "Unable to get powersave");
> + err = PTR_ERR(priv.powersave_clk);
> + goto out_ddr;
> + }
> + clk_prepare(priv.powersave_clk);
> +
> + of_node_put(np_core);
> + np_core = NULL;
> + of_node_put(np_gating);
> + np_gating = NULL;
> +
> + err = cpufreq_register_driver(&kirkwood_cpufreq_driver);
> + if (!err)
> + return 0;
> +
> + dev_err(priv.dev, "Failed to register cpufreq driver");
> +
> + clk_disable_unprepare(priv.powersave_clk);
> +out_ddr:
> + clk_disable_unprepare(priv.ddr_clk);
> +out_cpu:
> + clk_disable_unprepare(priv.cpu_clk);
> + of_node_put(np_core);
> + of_node_put(np_gating);
> +
> + return err;
> +}
> +
> +static int kirkwood_cpufreq_remove(struct platform_device *pdev)
> +{
> + cpufreq_unregister_driver(&kirkwood_cpufreq_driver);
> +
> + clk_disable_unprepare(priv.powersave_clk);
> + clk_disable_unprepare(priv.ddr_clk);
> + clk_disable_unprepare(priv.cpu_clk);
> +
> + return 0;
> +}
> +
> +static struct platform_driver kirkwood_cpufreq_platform_driver = {
> + .probe = kirkwood_cpufreq_probe,
> + .remove = kirkwood_cpufreq_remove,
> + .driver = {
> + .name = "kirkwood-cpufreq",
> + .owner = THIS_MODULE,
> + },
> +};
> +
> +module_platform_driver(kirkwood_cpufreq_platform_driver);
> +
> +MODULE_LICENSE("GPL v2");
> +MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch");
> +MODULE_DESCRIPTION("cpufreq driver for Marvell's kirkwood CPU");
> +MODULE_ALIAS("platform:kirkwood-cpufreq");
> --
> 1.7.10.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH v2 05/11] gpio: pxa: define nr gpios in platform data
From: Haojian Zhuang @ 2013-02-03 15:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <510E639A.7070600@compulab.co.il>
Avoid to define gpio numbers in gpio driver. Define it in platform data
instead.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
---
arch/arm/mach-mmp/aspenite.c | 1 +
arch/arm/mach-mmp/avengers_lite.c | 1 +
arch/arm/mach-mmp/brownstone.c | 1 +
arch/arm/mach-mmp/flint.c | 1 +
arch/arm/mach-mmp/gplugd.c | 1 +
arch/arm/mach-mmp/tavorevb.c | 1 +
arch/arm/mach-mmp/teton_bga.c | 1 +
arch/arm/mach-mmp/ttc_dkb.c | 1 +
arch/arm/mach-pxa/pxa25x.c | 3 +++
arch/arm/mach-pxa/pxa27x.c | 1 +
arch/arm/mach-pxa/pxa3xx.c | 17 +++++++++++--
drivers/gpio/gpio-pxa.c | 48 +++++++------------------------------
include/linux/gpio-pxa.h | 1 +
13 files changed, 36 insertions(+), 42 deletions(-)
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 36f5781..a3e42dc 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -112,6 +112,7 @@ static unsigned long common_pin_config[] __initdata = {
};
static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
+ .nr_gpios = 128,
.ed_mask = true,
};
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index b8fe447..1ea6502 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -34,6 +34,7 @@ static unsigned long avengers_lite_pin_config_V16F[] __initdata = {
};
static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
+ .nr_gpios = 128,
.ed_mask = true,
};
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index d6ea5c4..a32156f 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -106,6 +106,7 @@ static unsigned long brownstone_pin_config[] __initdata = {
};
static struct pxa_gpio_platform_data mmp2_gpio_pdata = {
+ .nr_gpios = 192,
.ed_mask = true,
};
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index 0955f44..3f301b5 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -79,6 +79,7 @@ static unsigned long flint_pin_config[] __initdata = {
};
static struct pxa_gpio_platform_data mmp2_gpio_pdata = {
+ .nr_gpios = 192,
.ed_mask = true,
};
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 2315cce..019b178 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -129,6 +129,7 @@ static unsigned long gplugd_pin_config[] __initdata = {
};
static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
+ .nr_gpios = 128,
.ed_mask = true,
};
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index eaec649..6e8cf80 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -62,6 +62,7 @@ static unsigned long tavorevb_pin_config[] __initdata = {
};
static struct pxa_gpio_platform_data ttc_dkb_gpio_pdata = {
+ .nr_gpios = 128,
.ed_mask = true,
};
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index 6682100..b5146bb 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -51,6 +51,7 @@ static unsigned long teton_bga_pin_config[] __initdata = {
};
static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
+ .nr_gpios = 128,
.ed_mask = true,
};
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index 984d902..123a0bf 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -75,6 +75,7 @@ static unsigned long ttc_dkb_pin_config[] __initdata = {
};
static struct pxa_gpio_platform_data ttc_dkb_gpio_pdata = {
+ .nr_gpios = 128,
.ed_mask = true,
};
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 3460de1..ff91660 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -342,6 +342,9 @@ void __init pxa25x_map_io(void)
static struct pxa_gpio_platform_data pxa25x_gpio_info __initdata = {
#ifdef CONFIG_CPU_PXA26x
.inverted = true,
+ .nr_gpios = 90,
+#else
+ .nr_gpios = 85,
#endif
.gafr = true,
.gpio_set_wake = gpio_set_wake,
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 999d681..4de9572 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -431,6 +431,7 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
static struct pxa_gpio_platform_data pxa27x_gpio_info __initdata = {
.gafr = true,
+ .nr_gpios = 121,
.gpio_set_wake = gpio_set_wake,
};
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 656a1bb..f6bff16 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -15,6 +15,7 @@
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/gpio-pxa.h>
#include <linux/pm.h>
#include <linux/platform_device.h>
#include <linux/irq.h>
@@ -435,6 +436,10 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
pxa_register_device(&pxa3xx_device_i2c_power, info);
}
+static struct pxa_gpio_platform_data pxa3xx_gpio_info __initdata = {
+ .nr_gpios = 128,
+};
+
static struct platform_device *devices[] __initdata = {
&pxa_device_gpio,
&pxa27x_device_udc,
@@ -482,8 +487,16 @@ static int __init pxa3xx_init(void)
register_syscore_ops(&pxa3xx_mfp_syscore_ops);
register_syscore_ops(&pxa3xx_clock_syscore_ops);
- if (!of_have_populated_dt())
- ret = platform_add_devices(devices, ARRAY_SIZE(devices));
+ if (!of_have_populated_dt()) {
+ if (cpu_is_pxa93x())
+ pxa3xx_gpio_info.nr_gpios = 192;
+ ret = platform_device_add_data(&pxa_device_gpio,
+ &pxa3xx_gpio_info,
+ sizeof(struct pxa_gpio_platform_data));
+ if (!ret)
+ ret = platform_add_devices(devices,
+ ARRAY_SIZE(devices));
+ }
}
return ret;
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 6c6e21c..8fbf4c6 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -380,36 +380,6 @@ static struct irq_chip pxa_muxed_gpio_chip = {
.irq_set_wake = pxa_gpio_set_wake,
};
-static int pxa_gpio_nums(void)
-{
- int count = 0;
-
-#ifdef CONFIG_ARCH_PXA
- if (cpu_is_pxa25x()) {
-#ifdef CONFIG_CPU_PXA26x
- count = 89;
-#elif defined(CONFIG_PXA25x)
- count = 84;
-#endif /* CONFIG_CPU_PXA26x */
- } else if (cpu_is_pxa27x()) {
- count = 120;
- } else if (cpu_is_pxa93x()) {
- count = 191;
- } else if (cpu_is_pxa3xx()) {
- count = 127;
- }
-#endif /* CONFIG_ARCH_PXA */
-
-#ifdef CONFIG_ARCH_MMP
- if (cpu_is_pxa168() || cpu_is_pxa910()) {
- count = 127;
- } else if (cpu_is_mmp2()) {
- count = 191;
- }
-#endif /* CONFIG_ARCH_MMP */
- return count;
-}
-
static int pxa_irq_domain_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hw)
{
@@ -433,7 +403,7 @@ static struct of_device_id pxa_gpio_dt_ids[] = {
static int pxa_gpio_probe_dt(struct platform_device *pdev)
{
- int ret, nr_banks, nr_gpios;
+ int ret, nr_banks;
struct pxa_gpio_platform_data *pdata;
struct device_node *prev, *next, *np = pdev->dev.of_node;
const struct of_device_id *of_id =
@@ -451,6 +421,11 @@ static int pxa_gpio_probe_dt(struct platform_device *pdev)
/* It's only valid for PXA26x */
if (of_find_property(np, "marvell,gpio-inverted", NULL))
pdata->inverted = true;
+ ret = of_property_read_u32(np, "marvell,nr-gpios", &pdata->nr_gpios);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "nr-gpios isn't specified\n");
+ return -ENOTSUPP;
+ }
/* set the platform data */
pdev->dev.platform_data = pdata;
@@ -468,8 +443,6 @@ static int pxa_gpio_probe_dt(struct platform_device *pdev)
prev = next;
}
of_node_put(prev);
- nr_gpios = nr_banks << 5;
- pxa_last_gpio = nr_gpios - 1;
return 0;
err:
@@ -540,14 +513,8 @@ static int pxa_gpio_probe(struct platform_device *pdev)
int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0;
ret = pxa_gpio_probe_dt(pdev);
- if (ret < 0) {
- pxa_last_gpio = pxa_gpio_nums();
- } else {
+ if (!ret)
use_of = 1;
- }
-
- if (!pxa_last_gpio)
- return -EINVAL;
irq0 = platform_get_irq_byname(pdev, "gpio0");
irq1 = platform_get_irq_byname(pdev, "gpio1");
@@ -581,6 +548,7 @@ static int pxa_gpio_probe(struct platform_device *pdev)
/* Initialize GPIO chips */
info = dev_get_platdata(&pdev->dev);
+ pxa_last_gpio = info->nr_gpios - 1;
pxa_init_gpio_chip(pdev, pxa_last_gpio,
info ? info->gpio_set_wake : NULL);
diff --git a/include/linux/gpio-pxa.h b/include/linux/gpio-pxa.h
index 80e0322..b357fdc 100644
--- a/include/linux/gpio-pxa.h
+++ b/include/linux/gpio-pxa.h
@@ -19,6 +19,7 @@ struct pxa_gpio_platform_data {
bool ed_mask; /* true means that ed_mask reg is available */
bool inverted; /* only valid for PXA26x */
bool gafr; /* only valid for PXA25x/PXA26x/PXA27x */
+ unsigned nr_gpios;
int (*gpio_set_wake)(unsigned int gpio, unsigned int on);
};
--
1.7.10.4
^ permalink raw reply related
* [PATCH v2 05/10] gpio: pxa: define nr gpios in platform data
From: Haojian Zhuang @ 2013-02-03 15:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <510E639A.7070600@compulab.co.il>
On 3 February 2013 21:18, Igor Grinberg <grinberg@compulab.co.il> wrote:
> Hi Haojian,
>
> On 02/03/13 12:15, Haojian Zhuang wrote:
>> Avoid to define gpio numbers in gpio driver. Define it in platform data
>> instead.
>>
>> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
>
> Same comments as for previous version...
>
Thank you for your checking. Now I fix this issue.
Best Regards
Haojian
^ permalink raw reply
* [PATCH v2 1/2] ARM: kirkwood: Ensure that kirkwood_ge0[01]_init() finds its clock
From: Jason Cooper @ 2013-02-03 16:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130202230418.GA17361@schnuecks.de>
On Sun, Feb 03, 2013 at 12:04:18AM +0100, Simon Baatz wrote:
> Hi Jason,
>
> On Thu, Jan 31, 2013 at 05:19:32PM -0700, Jason Gunthorpe wrote:
> > On Thu, Jan 31, 2013 at 07:01:09PM -0500, Jason Cooper wrote:
> >
> > > If you're interested, I still have a few ideas. One was to wire two USB
> > > serial adapters end to end to create a different console
> > > (console=/dev/ttyUSB0,115200, getty, etc). Since they would be going
> > > over usb, that's a different clock, so it should work and provide us
> > > with a safety net.
> >
> > I can't recall, can you still use JTAG once the CPU has hung on a mbus
> > access?
> >
> > If so memory dumping the console ring, or cpu registers would get the
> > answer pretty directly..
> >
> > My guesses would be the RTC and/or GPIO blocks (the GPIO blinker needs
> > a clock), based on table 94.
>
> These guesses seem to be dead on:
>
> Moved the RTC module and GPIO modules (keys, leds) out of the way, to
> see whether they cause the boot with disabled runit to lock up.
>
> System boots now and SSH login is possible!
>
> # mount -t debugfs debugfs /sys/kernel/debug
> # cat /sys/kernel/debug/clk/tclk/runit/clk_enable_count
> 0
> # insmod ./gpio_keys.ko
>
> System locks up.
>
> and, after a reboot:
>
> # insmod ./rtc-mv.ko
>
> System locks up.
>
> Bingo!
Awesome! Thanks for running the test Simon! I see Andrew sent two
patches hopefully fixing these lockups. I'll wait for your tested-by
and then apply all four to mvebu/fixes:
ARM: kirkwood: of_serial: fix clock gating by removing clock-frequency
ARM: kirkwood: fix to retain gbe MAC addresses for DT kernels
gpio: mvebu: Add clk support to prevent lockup
rtc: rtc-mv: Add support for clk to avoid lockups
I'll push Jason's local-mac-address patch to v3.9.
That should cover everything.
thx,
Jason.
^ permalink raw reply
* [PATCH v9 00/20] OMAP USB Host cleanup
From: Samuel Ortiz @ 2013-02-03 17:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1358937492-8129-1-git-send-email-rogerq@ti.com>
Hi Roger,
On Wed, Jan 23, 2013 at 12:37:52PM +0200, Roger Quadros wrote:
> Hi Samuel,
>
> I think this series is in a pretty good shape to pull now :). I've added
> Reviewed-by and Acked-by tags. You can please pull from below.
>
> NOTE: the first patch is a stable fix so Greg KH might want to pick it up for 3.8-rc.
>
> The following changes since commit 7d1f9aeff1ee4a20b1aeb377dd0f579fe9647619:
>
> Linux 3.8-rc4 (2013-01-17 19:25:45 -0800)
>
> are available in the git repository at:
> git://github.com/rogerq/linux.git linux-usbhost14-part
>
> This patchset addresses the following
>
> - Consolidate USB Host platform data.
> - Avoid addressing clocks one by one by name and use a for loop + bunch
> of cleanups.
> - Get number of channels/ports dynamically either from revision register
> or from platform data. Avoids getting clocks that are not present.
> - Add OMAP5 and HSIC mode (Not tested).
>
> v9:
> - Addressed clock framework related comments from Russell King.
> - Removed 2 clock data patches from the series as they will be taken care
> of by Paul Walmsey.
Applied all 20 patches, thanks.
Cheers,
Samuel.
--
Intel Open Source Technology Centre
http://oss.intel.com/
^ permalink raw reply
* [PATCH 09/26] mfd: ab8500-debugfs: Provide a means for a user subscribe to IRQs
From: Samuel Ortiz @ 2013-02-03 17:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130128113443.GB18212@gmail.com>
Hi Lee,
On Mon, Jan 28, 2013 at 11:34:43AM +0000, Lee Jones wrote:
> On Mon, 28 Jan 2013, Samuel Ortiz wrote:
>
> > Hi Lee,
> >
> > On Mon, Jan 28, 2013 at 10:22:23AM +0000, Lee Jones wrote:
> > > On Mon, 28 Jan 2013, Samuel Ortiz wrote:
> > >
> > > > Hi Lee,
> > > >
> > > > On Tue, Jan 15, 2013 at 12:55:49PM +0000, Lee Jones wrote:
> > > > > Allow users to subscribe to and view IRQ events live from debugfs.
> > > > I seem to remember that I got a similar patch some time ago for the same
> > > > purpose and my answer was: Please use a UIO driver for this. There already is
> > > > such driver, it's uio_pdrv_genirq. What your debugfs registration entry could
> > > > do is adding a platform device for the specific interrupt number. This would
> > > > avoid the irq handler registration and the sysfs entry creation, both things I
> > > > believe are not very elegant and open coded. It also gives you an IRQ count
> > > > implementation.
> > > > Ideally, the UIO framework could be improved to support IRQ ranges (through
> > > > IRQ domains) instead of the current single interrupt number.
> > > >
> > > > Have you considered going through that path ?
> > >
> > > I'm going to have to put this patch-set in the bin. Pulling this
> > > patch, causes lots of conflicts to the remaining patches in the
> > > set.
> > I bet removing this one causes a lot of conflicts. I'm not saying it should
> > absolutely be removed, but I'm afraid once it's upstream no one is going to
> > look at improving it.
>
> This is really not the case.
I trust you here, but usually people get busy with other stuff after their
patchset is upstreamed and never get back to me on the initial issues.
> I have every intention of fixing each and
> every issue which are brought to my attention during the upstreaming
> process of 'drivers/regulators', 'drivers/power' and 'drivers/mfd'.
>
> All I'm doing is making a list of all the fixups and re-writes and
> I'll address them on the completion of the push. Hence if you're happy
> for this to go in with my promise of improvement, it would certainly
> make this task a great deal easier for me.
I'll take your words here. I'll apply this one once you adressed the other
issues I commented about on this patchset.
> > And to be honest, having an IRQ handler from debugfs
> > code looks weird to me. I know you can put all sort of crazyness into a
> > debugfs entry, but still.
> >
> > > I'll start again from scratch and find another way to sync the ab* MFD
> > > drivers. I might even have to do it manually i.e. throw out all
> > > commit history and upstream it as my own patches pulled in from diffs.
> > I don't have any problems with that.
>
> I'm sure you don't, but it's me that's doing all the hard work. ;)
What's wrong with that ? ;)
Cheers,
Samuel.
--
Intel Open Source Technology Centre
http://oss.intel.com/
^ permalink raw reply
* [PATCH 06/26] mfd: ab8500-sysctrl: Provide configuration for SysClkReqRfClkBuf registers
From: Samuel Ortiz @ 2013-02-03 17:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130128083816.GZ15873@gmail.com>
Hi Lee,
On Mon, Jan 28, 2013 at 08:38:16AM +0000, Lee Jones wrote:
> On Mon, 28 Jan 2013, Samuel Ortiz wrote:
>
> > Hi Lee, Kennet,
> >
> > On Tue, Jan 15, 2013 at 12:55:46PM +0000, Lee Jones wrote:
> > > From: Kennet Wallden <kennet.wallden@stericsson.com>
> > >
> > > Add the possibility to pass configuration settings for
> > > SysCl1kReqRfClkBuf to SysClk8ReqRfClkBuf via platform data.
> > >
> > > Signed-off-by: Lee Jones <lee.jones@linaro.org>
> > > Signed-off-by: Kennet Wallden <kennet.wallden@stericsson.com>
> > > Reviewed-by: Karl-Johan PERNTZ <karl-johan.perntz@stericsson.com>
> > > Reviewed-by: Bengt JONSSON <bengt.g.jonsson@stericsson.com>
> > > ---
> > > drivers/mfd/ab8500-sysctrl.c | 25 +++++++++++++++++++++++++
> > > include/linux/mfd/abx500/ab8500-sysctrl.h | 5 +++++
> > > include/linux/mfd/abx500/ab8500.h | 2 ++
> > > 3 files changed, 32 insertions(+)
> > >
> > > diff --git a/drivers/mfd/ab8500-sysctrl.c b/drivers/mfd/ab8500-sysctrl.c
> > > index cf58f69..19a024e 100644
> > > --- a/drivers/mfd/ab8500-sysctrl.c
> > > +++ b/drivers/mfd/ab8500-sysctrl.c
> > > @@ -113,11 +113,36 @@ int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value)
> > > static int __devinit ab8500_sysctrl_probe(struct platform_device *pdev)
> > > {
> > > struct ab8500_platform_data *plat;
> > > + struct ab8500_sysctrl_platform_data *pdata;
> > >
> > > sysctrl_dev = &pdev->dev;
> > > plat = dev_get_platdata(pdev->dev.parent);
> > > if (plat->pm_power_off)
> > > pm_power_off = ab8500_power_off;
> > > +
> > > + pdata = plat->sysctrl;
> > > +
> > > + if (pdata) {
> > > + int ret;
> > > + int i;
> > > + int j;
> > Cosmetic
> > int i, j, ret;
>
> Hmmm... this is how I'd prefer it too,
Great, I'm glad we agree :)
> but other maintainers prefer
> one-per-line. It would be better if we could standardise it somewhere
> to prevent unnecessary fixups.
I certainly don't like that coding style and I sincerely believe a vast
majority of the kernel code avoids it as well.
Cheers,
Samuel.
--
Intel Open Source Technology Centre
http://oss.intel.com/
^ permalink raw reply
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