* [BUG] FL1009: xHCI host not responding to stop endpoint command.
From: Sarah Sharp @ 2014-01-22 23:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87mwin4ozf.fsf@natisbad.org>
On Wed, Jan 22, 2014 at 11:43:16PM +0100, Arnaud Ebalard wrote:
> Hi Jason,
>
> Jason Cooper <jason@lakedaemon.net> writes:
>
> > On Wed, Jan 22, 2014 at 11:23:23PM +0100, Arnaud Ebalard wrote:
> >> With the patch applied on top of 3.13.0 kernel recompiled w/
> >> CONFIG_PCI_MSI enabled, I cannot reproduce the bug. I guess
> >> you can add my:
> >>
> >> Reported-and-tested-By: Arnaud Ebalard <arno@natisbad.org>
> >>
> >> Since you'll have to push the patch to -stable team at least for 3.13,
> >> I wonder if it would not make sense to extend that at least to 3.12.
> >> and possibly 3.10 (3.2 is still widely used but I wonder if it makes
> >> sense to go that far).
> >
> > Can you pinpoint the commit that introduced the regression?
>
> f5182b4155b9d686c5540a6822486400e34ddd98 "xhci: Disable MSI for some Fresco Logic hosts."
>
> Technically, this is not per se the commit which introduced the
> regression but the one that *partially* fixed it by introducing the XHCI
> quirk to skip MSI enabling for Fresco Logic chips. The thing is it
> should have included the FL1009 in the targets. Sarah, can you confirm
> this?
I don't know if it should have included FL1009, it was just a guess,
based on the fact that the 0x1000 and 0x1400 devices did need MSI
disabled. I can attempt to ask the Fresco Logic folks I know, but I'm
not sure if/when I'll get a response back.
That still doesn't necessarily rule out MSI issues in the Marvell PCI
host controller code. Can you attach another PCI device with MSI
support under the host and see if it works?
Sarah Sharp
> Jason, the logic is summarized here, AFAICT:
>
> commit 455f58925247e8a1a1941e159f3636ad6ee4c90b
> Author: Oliver Neukum <oneukum@suse.de>
> Date: Mon Sep 30 15:50:54 2013 +0200
>
> xhci: quirk for extra long delay for S4
>
> It has been reported that this chipset really cannot
> sleep without this extraordinary delay.
>
> This patch should be backported, in order to ensure this host functions
> under stable kernels. The last quirk for Fresco Logic hosts (commit
> bba18e33f25072ebf70fd8f7f0cdbf8cdb59a746 "xhci: Extend Fresco Logic MSI
> quirk.") was backported to stable kernels as old as 2.6.36.
>
> Signed-off-by: Oliver Neukum <oneukum@suse.de>
> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
> Cc: stable at vger.kernel.org
>
>
> commit bba18e33f25072ebf70fd8f7f0cdbf8cdb59a746
> Author: Sarah Sharp <sarah.a.sharp@linux.intel.com>
> Date: Wed Oct 17 13:44:06 2012 -0700
>
> xhci: Extend Fresco Logic MSI quirk.
>
> Ali reports that plugging a device into the Fresco Logic xHCI host with
> PCI device ID 1400 produces an IRQ error:
>
> do_IRQ: 3.176 No irq handler for vector (irq -1)
>
> Other early Fresco Logic host revisions don't support MSI, even though
> their PCI config space claims they do. Extend the quirk to disabling
> MSI to this chipset revision. Also enable the short transfer quirk,
> since it's likely this revision also has that quirk, and it should be
> harmless to enable.
>
> <SNIP>
>
> This patch should be backported to stable kernels as old as 2.6.36, that
> contain the commit f5182b4155b9d686c5540a6822486400e34ddd98 "xhci:
> Disable MSI for some Fresco Logic hosts."
>
> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
> Reported-by: A Sh <smr.ash1991@gmail.com>
> Tested-by: A Sh <smr.ash1991@gmail.com>
> Cc: stable at vger.kernel.org
>
>
> commit f5182b4155b9d686c5540a6822486400e34ddd98
> Author: Sarah Sharp <sarah.a.sharp@linux.intel.com>
> Date: Thu Jun 2 11:33:02 2011 -0700
>
> xhci: Disable MSI for some Fresco Logic hosts.
>
> Some Fresco Logic hosts, including those found in the AUAU N533V laptop,
> advertise MSI, but fail to actually generate MSI interrupts. Add a new
> xHCI quirk to skip MSI enabling for the Fresco Logic host controllers.
> Fresco Logic confirms that all chips with PCI vendor ID 0x1b73 and device
> ID 0x1000, regardless of PCI revision ID, do not support MSI.
>
> This should be backported to stable kernels as far back as 2.6.36, which
> was the first kernel to support MSI on xHCI hosts.
>
> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
> Reported-by: Sergey Galanov <sergey.e.galanov@gmail.com>
> Cc: stable at kernel.org
^ permalink raw reply
* [PATCH v3 22/24] drm/i2c: tda998x: change the frequence in the audio channel
From: Russell King - ARM Linux @ 2014-01-22 23:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140119195847.646a40b0@armhf>
On Sun, Jan 19, 2014 at 07:58:47PM +0100, Jean-Francois Moine wrote:
> This patch sets the frequence as 'not indicated' instead of '48kHz'
> and adds some comments.
>
> Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Good catch that byte 2 doesn't exist in this set.
sound/asounddef.h has definitions for these:
IEC958_AES0_CON_NOT_COPYRIGHT
IEC958_AES3_CON_FS_NOTID
IEC958_AES4_CON_MAX_WORDLEN_24
IEC958_AES4_CON_ORIGFS_NOTID
--
FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".
^ permalink raw reply
* [PATCH v2 06/15] watchdog: orion: Remove unneeded BRIDGE_CAUSE clear
From: Sebastian Hesselbarth @ 2014-01-22 23:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140122205213.GW18269@obsidianresearch.com>
On 01/22/2014 09:52 PM, Jason Gunthorpe wrote:
>> Clearing BRIDGE_CAUSE will only clear all currently pending upstream
>> IRQs, of course. If WDT IRQ will be re-raised right after that in
>> BRIDGE_CAUSE depends on the actual HW implementation, i.e. we do no
>> clear the causing IRQ itself but just what it raised in BRIDGE_CAUSE.
>
> Which is why it makes no sense to clear it one time at kernel start.
>
> Either you only get new edge triggered interrupts after request_irq
> (sane behavior) or you might sometimes get an old pending edge
> triggered interrupt after request_irq (crazy behavior).
>
> Clearing BRIDGE_CAUSE at kernel start only shortens the racy window it
> doesn't eliminate it.
Actually, I missed that we mask all BRIDGE irqs in
orion_bridge_irq_init. If we now also clear already pending irqs, that
will not raise any old interrupts as long as watchdog clears all
reasons for upstream irqs before requesting a BRIDGE irq.
> In the more familiar level triggered world the driver would go to the
> device and ensure it wasn't asserting an IRQ level and then do the
> request_irq. This guarentees it won't get an interrupt callback.
>
> In a edge triggered world the driver should go to the device an ensure
> that it won't create a new IRQ, then do request_irq - confident that
> there will NEVER be a call to the IRQ handler, under any
> circumstances.
>
> So I think edge triggered interrupts need to ack any possible old edge
> trigger in the cause register before the first unmask - eg in the
> setup callback.
>
>> So, you should also clear WDT's irq in the driver yourself to clear a
>> possible pending upstream BRIDGE_CAUSE.
>
> Which isn't possible - the BRIDGE_CAUSE is owned by the irq driver and
> it must be cleared there, and it must only be cleared after the wdt
> has been stopped so it doesn't set it again.
I should have been more precise here: I meant watchdog driver should
clear all sources of possible upstream interrupts in its _own_
registers.
> Notice that Ezequiel has added an IRQ handler that just calls panic,
> so a spurious interrupt call is VERY VERY BAD.
And I understand that he now clears watchdog's register before
requesting an irq. All that is missing is bridge_irq driver clearing
CAUSE register after masking all irqs, right?
I'll stich a patch for that hopefully tomorrow.
Sebastian
^ permalink raw reply
* Internal error: Oops: 17 [#1] ARM
From: John Tobias @ 2014-01-22 23:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140122164100.GE15937@n2100.arm.linux.org.uk>
Hello all,
Just to confirm that the error I posted previously exist in 3.13
released. Just be noted that some patches related to eMMC/sdhci has
been applied in order to boot the 3.13 on my board.
Addition to that, I was getting additional errors (please see below):
- It happened during the reboot.
Cc'ng Dong Aisheng.
[ 11.229139] Unable to handle kernel NULL pointer dereference at
virtual address 00000000
[ 11.237244] pgd = 80004000
[ 11.239956] [00000000] *pgd=00000000
[ 11.243555] Internal error: Oops: 17 [#1] ARM
[ 11.247917] Modules linked in: bt8xxx(O) sd8xxx(O) mlan(PO)
[ 11.253561] CPU: 0 PID: 37 Comm: mmcqd/0 Tainted: P O 3.13.0 #5
[ 11.260355] task: bfb00000 ti: bfb6e000 task.ti: bfb6e000
[ 11.265766] PC is at sg_next+0xc/0x34
[ 11.269440] LR is at sdhci_send_command+0x990/0xf50
[ 11.274323] pc : [<802a3874>] lr : [<803a2bc8>] psr: 200f0093
[ 11.274323] sp : bfb6fd20 ip : bfb6fd30 fp : bfb6fd2c
[ 11.285803] r10: 00000003 r9 : bfa67440 r8 : bf957010
[ 11.291030] r7 : 808487bc r6 : 600f0013 r5 : bfb43d4c r4 : bfb43ce4
[ 11.297560] r3 : 81784e62 r2 : 00000000 r1 : bfb6a800 r0 : 00000000
[ 11.304091] Flags: nzCv IRQs off FIQs on Mode SVC_32 ISA ARM
Segment kernel
[ 11.311490] Control: 10c53c7d Table: beeec059 DAC: 00000015
[ 11.317239] Process mmcqd/0 (pid: 37, stack limit = 0xbfb6e238)
[ 11.323162] Stack: (0xbfb6fd20 to 0xbfb70000)
[ 11.327530] fd20: bfb6fd8c bfb6fd30 803a2bc8 802a3874 00000002
00000000 bfb6fd5c bfb6fd48
[ 11.335713] fd40: 8001d1d0 00000002 80e04788 80845840 bfb6fd8c
bfb6a800 803a7558 8001d190
[ 11.343896] fd60: 803a7418 bfa67000 bfb43c6c bfa67470 600f0013
bfa67440 0000002d bfa67000
[ 11.352079] fd80: bfb6fdb4 bfb6fd90 803a3a48 803a2244 bfb43c6c
bfa67000 8089fed0 bfb43d4c
[ 11.360262] fda0: bfb6fe7c bfb43ec0 bfb6fdec bfb6fdb8 8038d3e0
803a388c bfb6fdd4 bfb6fdc8
[ 11.368444] fdc0: 8005b7c4 bfa673d8 bfb43e18 00000000 00000001
bfb43d8c 00000001 bfb6fe7c
[ 11.376626] fde0: bfb6fe3c bfb6fdf0 8038e538 8038d2c4 bfb6fe3c
bfb43da0 8039d0a4 00000000
[ 11.384809] fe00: bfb00000 8005344c bfb6fe08 bfb6fe08 bfb6fe34
bfbfc000 bfb43c24 bfb6a000
[ 11.392992] fe20: bfb44b60 bfb43c68 bfb6a000 bfb43c6c bfb6feac
bfb6fe40 8039e214 8038e278
[ 11.401175] fe40: bfb44b60 bfb43c24 bfb6fe74 bfb6fe58 80292194
80276c0c bfb4fc00 bef024c0
[ 11.409357] fe60: 00000000 00000000 00000000 bfb6fe78 bfb43c00
bfbfc000 00000002 00000080
[ 11.417541] fe80: 00000000 bfb6a000 bfbfc000 00000000 00000000
bfb43c24 bfb43c00 bfa67000
[ 11.425724] fea0: bfb6feec bfb6feb0 8039edc0 8039e158 00000000
122c8000 bfb6fed4 bfb6fec8
[ 11.433908] fec0: 8005b7c4 bfb44b60 bfb6e000 00000000 122c8000
00000001 bfbfc000 bfb43c24
[ 11.442091] fee0: bfb6ff24 bfb6fef0 8039f830 8039ebf0 bfb6e030
bfb43c2c 8039f780 bfb51a80
[ 11.450273] ff00: 00000000 bfb43c24 8039f780 00000000 00000000
00000000 bfb6ffac bfb6ff28
[ 11.458456] ff20: 80043658 8039f78c bfb6ff44 00000000 8005b7c4
bfb43c24 00000000 00000001
[ 11.466639] ff40: dead4ead ffffffff ffffffff 808a8990 00000000
00000000 807239a4 bfb6ff5c
[ 11.474822] ff60: bfb6ff5c 00000000 00000001 dead4ead ffffffff
ffffffff 808a8990 00000000
[ 11.483006] ff80: 00000000 807239a4 bfb6ff88 bfb6ff88 bfb51a80
80043574 00000000 00000000
[ 11.491188] ffa0: 00000000 bfb6ffb0 8000f348 80043580 00000000
00000000 00000000 00000000
[ 11.499370] ffc0: 00000000 00000000 00000000 00000000 00000000
00000000 00000000 00000000
[ 11.507552] ffe0: 00000000 00000000 00000000 00000000 00000013
00000000 55055703 d17847e7
[ 11.515729] Backtrace:
[ 11.518203] [<802a3868>] (sg_next+0x0/0x34) from [<803a2bc8>]
(sdhci_send_command+0x990/0xf50)
[ 11.526826] [<803a2238>] (sdhci_send_command+0x0/0xf50) from
[<803a3a48>] (sdhci_request+0x1c8/0x278)
[ 11.536056] [<803a3880>] (sdhci_request+0x0/0x278) from
[<8038d3e0>] (mmc_start_request+0x128/0x24c)
[ 11.545190] r9:bfb43ec0 r8:bfb6fe7c r7:bfb43d4c r6:8089fed0 r5:bfa67000
r4:bfb43c6c
[ 11.553118] [<8038d2b8>] (mmc_start_request+0x0/0x24c) from
[<8038e538>] (mmc_start_req+0x2cc/0x378)
[ 11.562251] r8:bfb6fe7c r7:00000001 r6:bfb43d8c r5:00000001 r4:00000000
[ 11.569033] [<8038e26c>] (mmc_start_req+0x0/0x378) from
[<8039e214>] (mmc_blk_issue_rw_rq+0xc8/0xa98)
[ 11.578261] [<8039e14c>] (mmc_blk_issue_rw_rq+0x0/0xa98) from
[<8039edc0>] (mmc_blk_issue_rq+0x1dc/0x4cc)
[ 11.587836] [<8039ebe4>] (mmc_blk_issue_rq+0x0/0x4cc) from
[<8039f830>] (mmc_queue_thread+0xb0/0x14c)
[ 11.597069] [<8039f780>] (mmc_queue_thread+0x0/0x14c) from
[<80043658>] (kthread+0xe4/0xf8)
[ 11.605433] [<80043574>] (kthread+0x0/0xf8) from [<8000f348>]
(ret_from_fork+0x14/0x20)
[ 11.613439] r7:00000000 r6:00000000 r5:80043574 r4:bfb51a80
[ 11.619164] Code: e89da800 e1a0c00d e92dd800 e24cb004 (e5903000)
[ 11.625266] ---[ end trace e52024b248222184 ]---
[ 11.629889] Kernel panic - not syncing: Fatal exception
[ 32.238311] BUG: spinlock lockup suspected on CPU#0, mmcqd/0/37
[ 32.244246] lock: 0xbfa67470, .magic: dead4ead, .owner:
mmcqd/0/37, .owner_cpu: 0
[ 32.251825] CPU: 0 PID: 37 Comm: mmcqd/0 Tainted: P D O 3.13.0 #5
[ 32.258616] Backtrace:
[ 32.261096] [<80012ef8>] (dump_backtrace+0x0/0x118) from
[<80013238>] (show_stack+0x20/0x24)
[ 32.269536] r6:3b4181c0 r5:bfa67470 r4:bfb00000 r3:00000000
[ 32.275265] [<80013218>] (show_stack+0x0/0x24) from [<805b4cdc>]
(dump_stack+0x24/0x28)
[ 32.283287] [<805b4cb8>] (dump_stack+0x0/0x28) from [<805b2680>]
(spin_dump+0x94/0x9c)
[ 32.291215] [<805b25ec>] (spin_dump+0x0/0x9c) from [<800603fc>]
(do_raw_spin_lock+0x118/0x14c)
[ 32.299827] r5:00000000 r4:3b4181c0
[ 32.303442] [<800602e4>] (do_raw_spin_lock+0x0/0x14c) from
[<805bb8a0>] (_raw_spin_lock_irqsave+0x58/0x64)
[ 32.313109] [<805bb848>] (_raw_spin_lock_irqsave+0x0/0x64) from
[<803a4c40>] (sdhci_timeout_timer+0x24/0xd0)
[ 32.322936] r6:bfb6f918 r5:bfa67470 r4:bfa67440
[ 32.327612] [<803a4c1c>] (sdhci_timeout_timer+0x0/0xd0) from
[<8002ef6c>] (call_timer_fn+0x94/0x17c)
[ 32.336745] r6:bfb6f918 r5:bfa67528 r4:80898454 r3:00000000
[ 32.342471] [<8002eed8>] (call_timer_fn+0x0/0x17c) from
[<8002f594>] (run_timer_softirq+0x1b0/0x258)
[ 32.351614] [<8002f3e4>] (run_timer_softirq+0x0/0x258) from
[<80027bd0>] (__do_softirq+0x148/0x314)
[ 32.360666] [<80027a88>] (__do_softirq+0x0/0x314) from [<800281b8>]
(irq_exit+0xc8/0x110)
[ 32.368852] [<800280f0>] (irq_exit+0x0/0x110) from [<8000fc64>]
(handle_IRQ+0x4c/0x94)
[ 32.376770] r4:80872034 r3:00000120
[ 32.380384] [<8000fc18>] (handle_IRQ+0x0/0x94) from [<800085a0>]
(gic_handle_irq+0x3c/0x64)
[ 32.388736] r6:bfb6fa68 r5:80842e64 r4:c080e10c r3:000000a0
[ 32.394461] [<80008564>] (gic_handle_irq+0x0/0x64) from
[<80013d84>] (__irq_svc+0x44/0x58)
[ 32.402729] Exception stack(0xbfb6fa68 to 0xbfb6fab0)
[ 32.407789] fa60: 000355f9 ffffffff 000025ed
80295740 00000048 80871ff4
[ 32.415974] fa80: 00002580 00002648 00000001 808a6448 808a5fc4
bfb6fad4 bfb6fab0 bfb6fab0
[ 32.424154] faa0: 805b145c 80295770 200f0113 ffffffff
[ 32.429207] r7:bfb6fa9c r6:ffffffff r5:200f0113 r4:80295770
[ 32.434937] [<805b1294>] (panic+0x0/0x1dc) from [<800135c8>]
(die+0x38c/0x3a0)
[ 32.442160] r3:00000001 r2:00000000 r1:00000001 r0:80720a90
[ 32.447879] r7:bfb6e000
[ 32.450438] [<8001323c>] (die+0x0/0x3a0) from [<805b1284>]
(__do_kernel_fault.part.11+0x74/0x84)
[ 32.459239] [<805b1210>] (__do_kernel_fault.part.11+0x0/0x84) from
[<80019d8c>] (do_page_fault+0x1cc/0x3d4)
[ 32.468981] r7:00000017 r3:bfb6fcd8
[ 32.472594] [<80019bc0>] (do_page_fault+0x0/0x3d4) from
[<80008440>] (do_DataAbort+0x48/0xa8)
[ 32.481127] [<800083f8>] (do_DataAbort+0x0/0xa8) from [<80013d1c>]
(__dabt_svc+0x3c/0x60)
[ 32.489307] Exception stack(0xbfb6fcd8 to 0xbfb6fd20)
[ 32.494362] fcc0:
00000000 bfb6a800
[ 32.502545] fce0: 00000000 81784e62 bfb43ce4 bfb43d4c 600f0013
808487bc bf957010 bfa67440
[ 32.510730] fd00: 00000003 bfb6fd2c bfb6fd30 bfb6fd20 803a2bc8
802a3874 200f0093 ffffffff
[ 32.518908] r8:bf957010 r7:bfb6fd0c r6:ffffffff r5:200f0093 r4:802a3874
[ 32.525696] [<802a3868>] (sg_next+0x0/0x34) from [<803a2bc8>]
(sdhci_send_command+0x990/0xf50)
[ 32.534317] [<803a2238>] (sdhci_send_command+0x0/0xf50) from
[<803a3a48>] (sdhci_request+0x1c8/0x278)
[ 32.543548] [<803a3880>] (sdhci_request+0x0/0x278) from
[<8038d3e0>] (mmc_start_request+0x128/0x24c)
[ 32.552681] r9:bfb43ec0 r8:bfb6fe7c r7:bfb43d4c r6:8089fed0 r5:bfa67000
r4:bfb43c6c
[ 32.560605] [<8038d2b8>] (mmc_start_request+0x0/0x24c) from
[<8038e538>] (mmc_start_req+0x2cc/0x378)
[ 32.569738] r8:bfb6fe7c r7:00000001 r6:bfb43d8c r5:00000001 r4:00000000
[ 32.576520] [<8038e26c>] (mmc_start_req+0x0/0x378) from
[<8039e214>] (mmc_blk_issue_rw_rq+0xc8/0xa98)
[ 32.585749] [<8039e14c>] (mmc_blk_issue_rw_rq+0x0/0xa98) from
[<8039edc0>] (mmc_blk_issue_rq+0x1dc/0x4cc)
[ 32.595324] [<8039ebe4>] (mmc_blk_issue_rq+0x0/0x4cc) from
[<8039f830>] (mmc_queue_thread+0xb0/0x14c)
[ 32.604556] [<8039f780>] (mmc_queue_thread+0x0/0x14c) from
[<80043658>] (kthread+0xe4/0xf8)
[ 32.612916] [<80043574>] (kthread+0x0/0xf8) from [<8000f348>]
(ret_from_fork+0x14/0x20)
[ 32.620922] r7:00000000 r6:00000000 r5:80043574 r4:bfb51a80
[ 32.626642] mmc0: Timeout waiting for hardware interrupt.
[ 32.632066] Unable to handle kernel NULL pointer dereference at
virtual address 0000000c
[ 32.640161] pgd = 80004000
[ 32.642871] [0000000c] *pgd=00000000
[ 32.646468] Internal error: Oops: 17 [#2] ARM
[ 32.650830] Modules linked in: bt8xxx(O) sd8xxx(O) mlan(PO)
[ 32.656474] CPU: 0 PID: 37 Comm: mmcqd/0 Tainted: P D O 3.13.0 #5
[ 32.663266] task: bfb00000 ti: bfb6e000 task.ti: bfb6e000
[ 32.668674] PC is at arm_dma_sync_sg_for_cpu+0x44/0x8c
[ 32.673817] LR is at arm_dma_sync_sg_for_cpu+0x68/0x8c
[ 32.678961] pc : [<80018f7c>] lr : [<80018fa0>] psr: 800f0193
[ 32.678961] sp : bfb6f870 ip : bfb6f870 fp : bfb6f894
[ 32.690442] r10: bfa67440 r9 : 00000002 r8 : bf957010
[ 32.695670] r7 : 600f0013 r6 : 808487bc r5 : 00000002 r4 : 00000000
[ 32.702199] r3 : 81784e62 r2 : 0003bdf8 r1 : 81009000 r0 : 00000000
[ 32.708732] Flags: Nzcv IRQs off FIQs on Mode SVC_32 ISA ARM
Segment kernel
[ 32.716130] Control: 10c53c7d Table: beeec059 DAC: 00000015
[ 32.721878] Process mmcqd/0 (pid: 37, stack limit = 0xbfb6e238)
[ 32.727800] Stack: (0xbfb6f870 to 0xbfb70000)
[ 32.732164] f860: bfa67440
bfb43d4c 600f0113 bfb6e000
[ 32.740348] f880: 00000100 00000002 bfb6f8dc bfb6f898 803a3d70
80018f44 00000000 bfa67440
[ 32.748533] f8a0: bfb6f8cc bfb6f8b0 805b27a8 800651e4 807765b4
bfa67440 bfa67470 600f0113
[ 32.756717] f8c0: bfb6e000 00000100 803a4c1c bfa67440 bfb6f8fc
bfb6f8e0 803a4ca0 803a3b04
[ 32.764902] f8e0: 00000000 80898454 bfa67528 bfb6f918 bfb6f954
bfb6f900 8002ef6c 803a4c28
[ 32.773086] f900: 00000002 00000000 8002eed8 800a657c 808a6a80
bfa67440 80e1030c 00000000
[ 32.781271] f920: 00000000 80776904 8005b7c4 808a6a80 bfa67528
808a6908 00000000 bfb6f970
[ 32.789455] f940: 803a4c1c bfa67440 bfb6f9a4 bfb6f958 8002f594
8002eee4 808a76b0 808a74b0
[ 32.797639] f960: 808a72b0 8084c550 00200200 80898454 bfb6f970
bfb6f970 bfb6e000 00000001
[ 32.805823] f980: 00000004 808a6908 808a6904 bfb6e000 808a6448
00000001 bfb6fa0c bfb6f9a8
[ 32.814007] f9a0: 80027bd0 8002f3f0 805bb750 800602f0 00208840
8084ab98 ffff931d 8084c550
[ 32.822191] f9c0: bfb6e028 808a68c0 0000000a 80852688 00000004
00000100 808a6900 808983f0
[ 32.830375] f9e0: c080e100 bfb6e010 00000057 00000000 c080e100
00000001 808a6448 808a5fc4
[ 32.838560] fa00: bfb6fa24 bfb6fa10 800281b8 80027a94 00000120
80872034 bfb6fa44 bfb6fa28
[ 32.846744] fa20: 8000fc64 800280fc 000000a0 c080e10c 80842e64
bfb6fa68 bfb6fa64 bfb6fa48
[ 32.854928] fa40: 800085a0 8000fc24 80295770 200f0113 ffffffff
bfb6fa9c bfb6fad4 bfb6fa68
[ 32.863112] fa60: 80013d84 80008570 000355f9 ffffffff 000025ed
80295740 00000048 80871ff4
[ 32.871296] fa80: 00002580 00002648 00000001 808a6448 808a5fc4
bfb6fad4 bfb6fab0 bfb6fab0
[ 32.879480] faa0: 805b145c 80295770 200f0113 ffffffff 80847c88
0000000b 80847c88 bfb6fadc
[ 32.887664] fac0: 00000001 bfb6e000 bfb6fb6c bfb6fae8 800135c8
805b12a4 80720a90 00000001
[ 32.895848] fae0: 00000000 00000001 bfb6e238 0000000b 00000000
00000008 00000000 807209e4
[ 32.904032] fb00: 600f0193 807209ec 65b00000 61643938 20303038
30613165 64303063 32396520
[ 32.912218] fb20: 30386464 32652030 30626334 28203430 30393565
30303033 80002029 805b2774
[ 32.920403] fb40: 80796d74 00000000 00000017 00000000 bfb6fcd8
00000000 bfb00000 00000003
[ 32.928587] fb60: bfb6fb84 bfb6fb70 805b1284 80013248 bfb6fcd8
00000017 bfb6fc24 bfb6fb88
[ 32.936771] fb80: 80019d8c 805b121c 80058e68 800a669c c0804730
a00f0193 80848d94 bfa67440
[ 32.944956] fba0: bfb6fbbc bfb6fbb0 80058f30 80058e48 bfb6fbd4
bfb6fbc0 805bba30 80058f28
[ 32.953140] fbc0: 80848d90 80842050 bfb6fbec bfb6fbd8 8001d1d0
803a4030 00000000 bfa67470
[ 32.961324] fbe0: 00000000 bfa67440 c080e100 bfb6e030 00000000
bfa67470 00000000 00000017
[ 32.969508] fc00: 80019bc0 808488ac 00000000 bfb6fcd8 bfa67440
00000003 bfb6fcd4 bfb6fc28
[ 32.977692] fc20: 80008440 80019bcc 00000000 00000000 00000000
8001d284 bfb6fc94 bfb6fc48
[ 32.985876] fc40: 8005df6c 8005ba94 00000002 00000080 00000000
8001d284 00000000 bfb00000
[ 32.994060] fc60: bfb6e000 805bba30 a00f0093 bfa67440 bfb6fc9c
bfb6fc80 80058e68 800a669c
[ 33.002244] fc80: c0804730 bfb00000 bfb6e000 80013d14 bfb6fd0c
bf957010 bfb6fcc4 bfb6fca8
[ 33.010428] fca0: 80058e68 800a669c 803a2bc8 802a3874 200f0093
802a3874 200f0093 ffffffff
[ 33.018612] fcc0: bfb6fd0c bf957010 bfb6fd2c bfb6fcd8 80013d1c
80008404 00000000 bfb6a800
[ 33.026796] fce0: 00000000 81784e62 bfb43ce4 bfb43d4c 600f0013
808487bc bf957010 bfa67440
[ 33.034980] fd00: 00000003 bfb6fd2c bfb6fd30 bfb6fd20 803a2bc8
802a3874 200f0093 ffffffff
[ 33.043164] fd20: bfb6fd8c bfb6fd30 803a2bc8 802a3874 00000002
00000000 bfb6fd5c bfb6fd48
[ 33.051348] fd40: 8001d1d0 00000002 80e04788 80845840 bfb6fd8c
bfb6a800 803a7558 8001d190
[ 33.059532] fd60: 803a7418 bfa67000 bfb43c6c bfa67470 600f0013
bfa67440 0000002d bfa67000
[ 33.067716] fd80: bfb6fdb4 bfb6fd90 803a3a48 803a2244 bfb43c6c
bfa67000 8089fed0 bfb43d4c
[ 33.075900] fda0: bfb6fe7c bfb43ec0 bfb6fdec bfb6fdb8 8038d3e0
803a388c bfb6fdd4 bfb6fdc8
[ 33.084085] fdc0: 8005b7c4 bfa673d8 bfb43e18 00000000 00000001
bfb43d8c 00000001 bfb6fe7c
[ 33.092269] fde0: bfb6fe3c bfb6fdf0 8038e538 8038d2c4 bfb6fe3c
bfb43da0 8039d0a4 00000000
[ 33.100453] fe00: bfb00000 8005344c bfb6fe08 bfb6fe08 bfb6fe34
bfbfc000 bfb43c24 bfb6a000
[ 33.108637] fe20: bfb44b60 bfb43c68 bfb6a000 bfb43c6c bfb6feac
bfb6fe40 8039e214 8038e278
[ 33.116821] fe40: bfb44b60 bfb43c24 bfb6fe74 bfb6fe58 80292194
80276c0c bfb4fc00 bef024c0
[ 33.125005] fe60: 00000000 00000000 00000000 bfb6fe78 bfb43c00
bfbfc000 00000002 00000080
[ 33.133189] fe80: 00000000 bfb6a000 bfbfc000 00000000 00000000
bfb43c24 bfb43c00 bfa67000
[ 33.141373] fea0: bfb6feec bfb6feb0 8039edc0 8039e158 00000000
122c8000 bfb6fed4 bfb6fec8
[ 33.149557] fec0: 8005b7c4 bfb44b60 bfb6e000 00000000 122c8000
00000001 bfbfc000 bfb43c24
[ 33.157741] fee0: bfb6ff24 bfb6fef0 8039f830 8039ebf0 bfb6e030
bfb43c2c 8039f780 bfb51a80
[ 33.165926] ff00: 00000000 bfb43c24 8039f780 00000000 00000000
00000000 bfb6ffac bfb6ff28
[ 33.174109] ff20: 80043658 8039f78c bfb6ff44 00000000 8005b7c4
bfb43c24 00000000 00000001
[ 33.182293] ff40: dead4ead ffffffff ffffffff 808a8990 00000000
00000000 807239a4 bfb6ff5c
[ 33.190477] ff60: bfb6ff5c 00000000 00000001 dead4ead ffffffff
ffffffff 808a8990 00000000
[ 33.198662] ff80: 00000000 807239a4 bfb6ff88 bfb6ff88 bfb51a80
80043574 00000000 00000000
[ 33.206846] ffa0: 00000000 bfb6ffb0 8000f348 80043580 00000000
00000000 00000000 00000000
[ 33.215029] ffc0: 00000000 00000000 00000000 00000000 00000000
00000000 00000000 00000000
[ 33.223212] ffe0: 00000000 00000000 00000000 00000000 00000013
00000000 55055703 d17847e7
[ 33.231390] Backtrace:
[ 33.233862] [<80018f38>] (arm_dma_sync_sg_for_cpu+0x0/0x8c) from
[<803a3d70>] (sdhci_finish_data+0x278/0x380)
[ 33.243779] r9:00000002 r8:00000100 r7:bfb6e000 r6:600f0113 r5:bfb43d4c
r4:bfa67440
[ 33.251706] [<803a3af8>] (sdhci_finish_data+0x0/0x380) from
[<803a4ca0>] (sdhci_timeout_timer+0x84/0xd0)
[ 33.261197] [<803a4c1c>] (sdhci_timeout_timer+0x0/0xd0) from
[<8002ef6c>] (call_timer_fn+0x94/0x17c)
[ 33.270330] r6:bfb6f918 r5:bfa67528 r4:80898454 r3:00000000
[ 33.276056] [<8002eed8>] (call_timer_fn+0x0/0x17c) from
[<8002f594>] (run_timer_softirq+0x1b0/0x258)
[ 33.285197] [<8002f3e4>] (run_timer_softirq+0x0/0x258) from
[<80027bd0>] (__do_softirq+0x148/0x314)
[ 33.294248] [<80027a88>] (__do_softirq+0x0/0x314) from [<800281b8>]
(irq_exit+0xc8/0x110)
[ 33.302435] [<800280f0>] (irq_exit+0x0/0x110) from [<8000fc64>]
(handle_IRQ+0x4c/0x94)
[ 33.310353] r4:80872034 r3:00000120
[ 33.313965] [<8000fc18>] (handle_IRQ+0x0/0x94) from [<800085a0>]
(gic_handle_irq+0x3c/0x64)
[ 33.322317] r6:bfb6fa68 r5:80842e64 r4:c080e10c r3:000000a0
[ 33.328040] [<80008564>] (gic_handle_irq+0x0/0x64) from
[<80013d84>] (__irq_svc+0x44/0x58)
[ 33.336306] Exception stack(0xbfb6fa68 to 0xbfb6fab0)
[ 33.341365] fa60: 000355f9 ffffffff 000025ed
80295740 00000048 80871ff4
[ 33.349548] fa80: 00002580 00002648 00000001 808a6448 808a5fc4
bfb6fad4 bfb6fab0 bfb6fab0
[ 33.357728] faa0: 805b145c 80295770 200f0113 ffffffff
[ 33.362781] r7:bfb6fa9c r6:ffffffff r5:200f0113 r4:80295770
[ 33.368513] [<805b1294>] (panic+0x0/0x1dc) from [<800135c8>]
(die+0x38c/0x3a0)
[ 33.375738] r3:00000001 r2:00000000 r1:00000001 r0:80720a90
[ 33.381456] r7:bfb6e000
[ 33.384012] [<8001323c>] (die+0x0/0x3a0) from [<805b1284>]
(__do_kernel_fault.part.11+0x74/0x84)
[ 33.392808] [<805b1210>] (__do_kernel_fault.part.11+0x0/0x84) from
[<80019d8c>] (do_page_fault+0x1cc/0x3d4)
[ 33.402549] r7:00000017 r3:bfb6fcd8
[ 33.406163] [<80019bc0>] (do_page_fault+0x0/0x3d4) from
[<80008440>] (do_DataAbort+0x48/0xa8)
[ 33.414694] [<800083f8>] (do_DataAbort+0x0/0xa8) from [<80013d1c>]
(__dabt_svc+0x3c/0x60)
[ 33.422874] Exception stack(0xbfb6fcd8 to 0xbfb6fd20)
[ 33.427928] fcc0:
00000000 bfb6a800
[ 33.436113] fce0: 00000000 81784e62 bfb43ce4 bfb43d4c 600f0013
808487bc bf957010 bfa67440
[ 33.444297] fd00: 00000003 bfb6fd2c bfb6fd30 bfb6fd20 803a2bc8
802a3874 200f0093 ffffffff
[ 33.452475] r8:bf957010 r7:bfb6fd0c r6:ffffffff r5:200f0093 r4:802a3874
[ 33.459263] [<802a3868>] (sg_next+0x0/0x34) from [<803a2bc8>]
(sdhci_send_command+0x990/0xf50)
[ 33.467883] [<803a2238>] (sdhci_send_command+0x0/0xf50) from
[<803a3a48>] (sdhci_request+0x1c8/0x278)
[ 33.477112] [<803a3880>] (sdhci_request+0x0/0x278) from
[<8038d3e0>] (mmc_start_request+0x128/0x24c)
[ 33.486247] r9:bfb43ec0 r8:bfb6fe7c r7:bfb43d4c r6:8089fed0 r5:bfa67000
r4:bfb43c6c
[ 33.494172] [<8038d2b8>] (mmc_start_request+0x0/0x24c) from
[<8038e538>] (mmc_start_req+0x2cc/0x378)
[ 33.503307] r8:bfb6fe7c r7:00000001 r6:bfb43d8c r5:00000001 r4:00000000
[ 33.510087] [<8038e26c>] (mmc_start_req+0x0/0x378) from
[<8039e214>] (mmc_blk_issue_rw_rq+0xc8/0xa98)
[ 33.519313] [<8039e14c>] (mmc_blk_issue_rw_rq+0x0/0xa98) from
[<8039edc0>] (mmc_blk_issue_rq+0x1dc/0x4cc)
[ 33.528887] [<8039ebe4>] (mmc_blk_issue_rq+0x0/0x4cc) from
[<8039f830>] (mmc_queue_thread+0xb0/0x14c)
[ 33.538116] [<8039f780>] (mmc_queue_thread+0x0/0x14c) from
[<80043658>] (kthread+0xe4/0xf8)
[ 33.546476] [<80043574>] (kthread+0x0/0xf8) from [<8000f348>]
(ret_from_fork+0x14/0x20)
[ 33.554480] r7:00000000 r6:00000000 r5:80043574 r4:bfb51a80
[ 33.560205] Code: 01a06003 e3570000 d89dabf0 e3a05000 (e594100c)
[ 33.566306] ---[ end trace e52024b248222185 ]--
Regards,
john
On Wed, Jan 22, 2014 at 8:41 AM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> On Wed, Jan 22, 2014 at 08:23:36AM -0800, John Tobias wrote:
>> Hello all,
>>
>> I am using 3.13-rc1 kernel on iMX6SL processor. My filesystem is in
>> eMMC running SDR50.
>> Is anyone here encountered these problem and if there's any existing
>> patch that I can get?.
>
> How reproducable is this? I notice you're using 3.13-rc1 too, it could
> be the bug has already been fixed in a later kernel version. -rc1
> kernels are really the "fresh after lots of new feature merging" kernels
> which should always be expected to be rather buggy.
>
> Linux kernel "release candidates" are not "we think this is going to be
> a final kernel, please test it" but -rc1 marks the end of the new
> feature merging and the beginning of the stablisation phase.
>
> --
> FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
> in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
> Estimate before purchase was "up to 13.2Mbit".
^ permalink raw reply
* [PATCH v3 21/24] drm/i2c: tda998x: add the active aspect in HDMI AVI frame
From: Russell King - ARM Linux @ 2014-01-22 23:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140119195846.0b83e7b1@armhf>
On Sun, Jan 19, 2014 at 07:58:46PM +0100, Jean-Francois Moine wrote:
> Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
"The picture aspect setting was zero, which is reserved. A setting of
Same As Picture makes more sense."
Tested-by: Russell King <rmk+kernel@arm.linux.org.uk>
--
FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".
^ permalink raw reply
* [PATCH v3 20/24] drm/i2c: tda998x: remove the unused variable ca_i2s
From: Russell King - ARM Linux @ 2014-01-22 23:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140119195846.368a44e6@armhf>
On Sun, Jan 19, 2014 at 07:58:46PM +0100, Jean-Francois Moine wrote:
> Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
"ca_i2s is only ever written to, but never read, so let's get rid of it."
Tested-by: Russell King <rmk+kernel@arm.linux.org.uk>
--
FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".
^ permalink raw reply
* [GIT PULL]ARM: sirf: machine update for 3.14
From: Kevin Hilman @ 2014-01-22 23:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAGsJ_4zs7Vcb-Zd4Ds9bAecMdJDonQv1zDJU2=cMk9ecqp5DsA@mail.gmail.com>
Barry Song <21cnbao@gmail.com> writes:
> Hi Olof/Kevin,
> this series was missed?
It was skipped because it came well after the normal cutoff of -rc6
(Dec. 29th) or -rc7 (Jan 4th). This time we extended things a little
due to the end of year holidays, but yours came well after that as well.
If we have time we may try to get it into a late/* branch which might
still make it for v3.13, but it's unlikely at this point.
Kevin
> 2014/1/15 Barry Song <21cnbao@gmail.com>:
>> Hi Kevin/Olof,
>>
>> The following changes since commit 374b105797c3d4f29c685f3be535c35f5689b30e:
>>
>> Linux 3.13-rc3 (2013-12-06 09:34:04 -0800)
>>
>> are available in the git repository at:
>>
>> git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git
>> tags/sirf-soc-for-3.14
>>
>> for you to fetch changes up to dbd1b42baa6ec8082bce6eec37de5e1b46aff19c:
>>
>> ARM: prima2: make sirfsoc_init_late function static (2014-01-15
>> 10:42:26 +0800)
>>
>> ----------------------------------------------------------------
>> ARM: sirf: machine update for 3.14
>>
>> Among them:
>> - ARM: prima2: move to generic reset controller driver framework
>> - MAINTAINERS: ARM: SiRF: use regex patterns to involve all SiRF drivers
>> - ARM: prima2: make sirfsoc_init_late function static
>>
>> ----------------------------------------------------------------
>> Barry Song (3):
>> ARM: prima2: move to generic reset controller driver framework
>> MAINTAINERS: ARM: SiRF: use regex patterns to involve all SiRF drivers
>> ARM: prima2: make sirfsoc_init_late function static
>>
>> .../devicetree/bindings/reset/sirf,rstc.txt | 42 +++++++++
>> MAINTAINERS | 9 +-
>> arch/arm/boot/dts/atlas6.dtsi | 3 +-
>> arch/arm/boot/dts/marco.dtsi | 3 +-
>> arch/arm/boot/dts/prima2.dtsi | 3 +-
>> arch/arm/mach-prima2/Kconfig | 1 +
>> arch/arm/mach-prima2/common.c | 2 +-
>> arch/arm/mach-prima2/rstc.c | 93 +++++++++++++-------
>> 8 files changed, 110 insertions(+), 46 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/reset/sirf,rstc.txt
>>
>> -barry
^ permalink raw reply
* [PATCH v3 19/24] drm/i2c: tda998x: use global constants
From: Russell King - ARM Linux @ 2014-01-22 23:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140119195845.13b8a0e9@armhf>
On Sun, Jan 19, 2014 at 07:58:45PM +0100, Jean-Francois Moine wrote:
> Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Might be worth also saying "and tidy up AIP_CLKSEL" since arguably they
were already using global constants. In any case, no one likes single
line patch descriptions. Always try to write something more about the
patch.
I've verified this via inspection, and tested it.
Tested-by: Russell King <rmk+kernel@arm.linux.org.uk>
--
FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".
^ permalink raw reply
* [PATCH v3 18/24] drm/i2c: tda998x: fix the ENABLE_SPACE register
From: Russell King - ARM Linux @ 2014-01-22 23:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140119195845.086be909@armhf>
On Sun, Jan 19, 2014 at 07:58:45PM +0100, Jean-Francois Moine wrote:
> This patch fixes the ENABLE_SPACE register, the value of which was
> inverted.
>
> Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
I've researched the change to PLL_SERIAL_2, and this is correct. I think
your change to REG_ENABLE_SPACE is also correct. This looks like a bug
fix to me, so maybe consider having it applied to previous kernel
versions as well?
Also... please try putting yourself in the position of a reviewer of your
own patches - read the patch and then read the description, and ask whether
the description is adequate for the patch... the description talks just
about the ENABLE_SPACE register. But what about the PLL_SERIAL_2 register
changes? They're *totally* not described.
Hence...
Tested-by: Russell King <rmk+kernel@arm.linux.org.uk>
and no acked-by.
--
FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".
^ permalink raw reply
* [PATCH v4 18/18] ARM: mvebu: Enable watchdog support in defconfig
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
Now that we have proper support for Armada 370/XP watchdog
let's enable it in the defconfig.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
arch/arm/configs/mvebu_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
index 594d706..84ec924 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch/arm/configs/mvebu_defconfig
@@ -60,6 +60,8 @@ CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
CONFIG_THERMAL=y
CONFIG_ARMADA_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_ORION_WATCHDOG=y
CONFIG_USB_SUPPORT=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 17/18] watchdog: orion: Enable the build on ARCH_MVEBU
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
After adding support for Armada 370/XP SoC let's enable the build on
these platforms.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
drivers/watchdog/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 5be6e91..8b79012 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -282,7 +282,7 @@ config DAVINCI_WATCHDOG
config ORION_WATCHDOG
tristate "Orion watchdog"
- depends on ARCH_ORION5X || ARCH_KIRKWOOD || ARCH_DOVE
+ depends on ARCH_ORION5X || ARCH_KIRKWOOD || ARCH_DOVE || ARCH_MVEBU
select WATCHDOG_CORE
help
Say Y here if to include support for the watchdog timer
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 16/18] ARM: kirkwood: Add RSTOUT 'reg' entry to devicetree
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
In order to support multiplatform builds the watchdog devicetree binding
was modified and now the 'reg' property is specified to need two
entries. This commit adds the second entry as-per the new specification.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
arch/arm/boot/dts/kirkwood.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 8b73c80..80a56b0 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -165,7 +165,7 @@
wdt: watchdog-timer at 20300 {
compatible = "marvell,orion-wdt";
- reg = <0x20300 0x28>;
+ reg = <0x20300 0x28>, <0x20108 0x4>;
interrupt-parent = <&bridge_intc>;
interrupts = <3>;
clocks = <&gate_clk 7>;
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 15/18] ARM: mvebu: Enable Armada 370/XP watchdog in the devicetree
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
Add the DT nodes to enable watchdog support available in Armada 370
and Armada XP SoCs.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
arch/arm/boot/dts/armada-370-xp.dtsi | 4 ++++
arch/arm/boot/dts/armada-370.dtsi | 5 +++++
arch/arm/boot/dts/armada-xp.dtsi | 6 ++++++
3 files changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 7f10f62..96e0389 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -151,6 +151,10 @@
interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
};
+ watchdog at 20300 {
+ reg = <0x20300 0x34>, <0x20704 0x4>;
+ };
+
sata at a0000 {
compatible = "marvell,orion-sata";
reg = <0xa0000 0x5000>;
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 7a4b82e..aebed9e 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -168,6 +168,11 @@
clocks = <&coreclk 2>;
};
+ watchdog at 20300 {
+ compatible = "marvell,armada-370-wdt";
+ clocks = <&coreclk 2>;
+ };
+
coreclk: mvebu-sar at 18230 {
compatible = "marvell,armada-370-core-clock";
reg = <0x18230 0x08>;
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 281c644..8c6c06c 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -74,6 +74,12 @@
clock-names = "nbclk", "fixed";
};
+ watchdog at 20300 {
+ compatible = "marvell,armada-xp-wdt";
+ clocks = <&coreclk 2>, <&refclk>;
+ clock-names = "nbclk", "fixed";
+ };
+
coreclk: mvebu-sar at 18230 {
compatible = "marvell,armada-xp-core-clock";
reg = <0x18230 0x08>;
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 14/18] watchdog: orion: Add support for Armada 370 and Armada XP SoC
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
Using the added infrastructure for handling SoC differences,
this commit adds support for the watchdog controller available
in Armada 370 and Armada XP SoCs.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
drivers/watchdog/orion_wdt.c | 94 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 94 insertions(+)
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index 471d6d9..90e8b53 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -36,9 +36,17 @@
* Watchdog timer block registers.
*/
#define TIMER_CTRL 0x0000
+#define TIMER_A370_STATUS 0x04
#define WDT_MAX_CYCLE_COUNT 0xffffffff
+#define WDT_A370_RATIO_MASK(v) ((v) << 16)
+#define WDT_A370_RATIO_SHIFT 5
+#define WDT_A370_RATIO (1 << WDT_A370_RATIO_SHIFT)
+
+#define WDT_AXP_FIXED_ENABLE_BIT BIT(10)
+#define WDT_A370_EXPIRED BIT(31)
+
static bool nowayout = WATCHDOG_NOWAYOUT;
static int heartbeat = -1; /* module parameter (seconds) */
@@ -78,6 +86,48 @@ static int orion_wdt_clock_init(struct platform_device *pdev,
return 0;
}
+static int armada370_wdt_clock_init(struct platform_device *pdev,
+ struct orion_watchdog *dev)
+{
+ int ret;
+
+ dev->clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(dev->clk))
+ return PTR_ERR(dev->clk);
+ ret = clk_prepare_enable(dev->clk);
+ if (ret)
+ return ret;
+
+ /* Setup watchdog input clock */
+ atomic_io_modify(dev->reg + TIMER_CTRL,
+ WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
+ WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
+
+ dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;
+ return 0;
+}
+
+static int armadaxp_wdt_clock_init(struct platform_device *pdev,
+ struct orion_watchdog *dev)
+{
+ int ret;
+
+ dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
+ if (IS_ERR(dev->clk))
+ return PTR_ERR(dev->clk);
+ ret = clk_prepare_enable(dev->clk);
+ if (ret)
+ return ret;
+
+ /* Enable the fixed watchdog clock input */
+ atomic_io_modify(dev->reg + TIMER_CTRL,
+ WDT_AXP_FIXED_ENABLE_BIT,
+ WDT_AXP_FIXED_ENABLE_BIT);
+
+ dev->clk_rate = clk_get_rate(dev->clk);
+ return 0;
+}
+
static int orion_wdt_ping(struct watchdog_device *wdt_dev)
{
struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
@@ -87,6 +137,26 @@ static int orion_wdt_ping(struct watchdog_device *wdt_dev)
return 0;
}
+static int armada370_start(struct watchdog_device *wdt_dev)
+{
+ struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+
+ /* Set watchdog duration */
+ writel(dev->clk_rate * wdt_dev->timeout,
+ dev->reg + dev->data->wdt_counter_offset);
+
+ /* Clear the watchdog expiration bit */
+ atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0);
+
+ /* Enable watchdog timer */
+ atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
+ dev->data->wdt_enable_bit);
+
+ atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit,
+ dev->data->rstout_enable_bit);
+ return 0;
+}
+
static int orion_start(struct watchdog_device *wdt_dev)
{
struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
@@ -195,11 +265,35 @@ static const struct orion_watchdog_data orion_data = {
.start = orion_start,
};
+static const struct orion_watchdog_data armada370_data = {
+ .rstout_enable_bit = BIT(8),
+ .wdt_enable_bit = BIT(8),
+ .wdt_counter_offset = 0x34,
+ .clock_init = armada370_wdt_clock_init,
+ .start = armada370_start,
+};
+
+static const struct orion_watchdog_data armadaxp_data = {
+ .rstout_enable_bit = BIT(8),
+ .wdt_enable_bit = BIT(8),
+ .wdt_counter_offset = 0x34,
+ .clock_init = armadaxp_wdt_clock_init,
+ .start = armada370_start,
+};
+
static const struct of_device_id orion_wdt_of_match_table[] = {
{
.compatible = "marvell,orion-wdt",
.data = &orion_data,
},
+ {
+ .compatible = "marvell,armada-370-wdt",
+ .data = &armada370_data,
+ },
+ {
+ .compatible = "marvell,armada-xp-wdt",
+ .data = &armadaxp_data,
+ },
{},
};
MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table);
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 13/18] watchdog: orion: Add per-compatible watchdog start implementation
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
To handle differences between SoCs this commit adds per-compatible
string start() function for the watchdog kick-off. This is preparation
work and makes no functionality changes to the current driver.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
drivers/watchdog/orion_wdt.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index 5ce5d48..471d6d9 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -50,6 +50,7 @@ struct orion_watchdog_data {
int rstout_enable_bit;
int (*clock_init) (struct platform_device *,
struct orion_watchdog *);
+ int (*start) (struct watchdog_device *);
};
struct orion_watchdog {
@@ -86,7 +87,7 @@ static int orion_wdt_ping(struct watchdog_device *wdt_dev)
return 0;
}
-static int orion_wdt_start(struct watchdog_device *wdt_dev)
+static int orion_start(struct watchdog_device *wdt_dev)
{
struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
@@ -105,6 +106,14 @@ static int orion_wdt_start(struct watchdog_device *wdt_dev)
return 0;
}
+static int orion_wdt_start(struct watchdog_device *wdt_dev)
+{
+ struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+
+ /* There are some per-SoC quirks to handle */
+ return dev->data->start(wdt_dev);
+}
+
static int orion_wdt_stop(struct watchdog_device *wdt_dev)
{
struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
@@ -183,6 +192,7 @@ static const struct orion_watchdog_data orion_data = {
.wdt_enable_bit = BIT(4),
.wdt_counter_offset = 0x24,
.clock_init = orion_wdt_clock_init,
+ .start = orion_start,
};
static const struct of_device_id orion_wdt_of_match_table[] = {
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 12/18] watchdog: orion: Add per-compatible clock initialization
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
Following the introduction of the compatible-data field,
it's now possible to further abstract the clock initialization.
This will allow to support SoC with a different clock setup.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
drivers/watchdog/orion_wdt.c | 33 +++++++++++++++++++++++++--------
1 file changed, 25 insertions(+), 8 deletions(-)
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index c978bcd..5ce5d48 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -42,10 +42,14 @@
static bool nowayout = WATCHDOG_NOWAYOUT;
static int heartbeat = -1; /* module parameter (seconds) */
+struct orion_watchdog;
+
struct orion_watchdog_data {
int wdt_counter_offset;
int wdt_enable_bit;
int rstout_enable_bit;
+ int (*clock_init) (struct platform_device *,
+ struct orion_watchdog *);
};
struct orion_watchdog {
@@ -57,6 +61,22 @@ struct orion_watchdog {
const struct orion_watchdog_data *data;
};
+static int orion_wdt_clock_init(struct platform_device *pdev,
+ struct orion_watchdog *dev)
+{
+ int ret;
+
+ dev->clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(dev->clk))
+ return PTR_ERR(dev->clk);
+ ret = clk_prepare_enable(dev->clk);
+ if (ret)
+ return ret;
+
+ dev->clk_rate = clk_get_rate(dev->clk);
+ return 0;
+}
+
static int orion_wdt_ping(struct watchdog_device *wdt_dev)
{
struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
@@ -162,6 +182,7 @@ static const struct orion_watchdog_data orion_data = {
.rstout_enable_bit = BIT(1),
.wdt_enable_bit = BIT(4),
.wdt_counter_offset = 0x24,
+ .clock_init = orion_wdt_clock_init,
};
static const struct of_device_id orion_wdt_of_match_table[] = {
@@ -196,15 +217,11 @@ static int orion_wdt_probe(struct platform_device *pdev)
dev->wdt.min_timeout = 1;
dev->data = match->data;
- dev->clk = devm_clk_get(&pdev->dev, NULL);
- if (IS_ERR(dev->clk)) {
- dev_err(&pdev->dev, "Orion Watchdog missing clock\n");
- return PTR_ERR(dev->clk);
- }
- ret = clk_prepare_enable(dev->clk);
- if (ret)
+ ret = dev->data->clock_init(pdev, dev);
+ if (ret) {
+ dev_err(&pdev->dev, "cannot initialize clock\n");
return ret;
- dev->clk_rate = clk_get_rate(dev->clk);
+ }
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 11/18] watchdog: orion: Introduce per-compatible of_device_id data
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
This commit adds an orion_watchdog_data structure to hold compatible-data
information. This allows to remove the driver-wide definition and to
be able to add support for multiple compatible-strings in the future.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
drivers/watchdog/orion_wdt.c | 58 +++++++++++++++++++++++++++++++-------------
1 file changed, 41 insertions(+), 17 deletions(-)
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index 96dba41..c978bcd 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -24,6 +24,7 @@
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/of.h>
+#include <linux/of_device.h>
/* RSTOUT mask register physical address for Orion5x, Kirkwood and Dove */
#define ORION_RSTOUT_MASK_OFFSET 0x20108
@@ -35,29 +36,33 @@
* Watchdog timer block registers.
*/
#define TIMER_CTRL 0x0000
-#define WDT_EN 0x0010
-#define WDT_VAL 0x0024
#define WDT_MAX_CYCLE_COUNT 0xffffffff
-#define WDT_RESET_OUT_EN BIT(1)
-
static bool nowayout = WATCHDOG_NOWAYOUT;
static int heartbeat = -1; /* module parameter (seconds) */
+struct orion_watchdog_data {
+ int wdt_counter_offset;
+ int wdt_enable_bit;
+ int rstout_enable_bit;
+};
+
struct orion_watchdog {
struct watchdog_device wdt;
void __iomem *reg;
void __iomem *rstout;
unsigned long clk_rate;
struct clk *clk;
+ const struct orion_watchdog_data *data;
};
static int orion_wdt_ping(struct watchdog_device *wdt_dev)
{
struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
/* Reload watchdog duration */
- writel(dev->clk_rate * wdt_dev->timeout, dev->reg + WDT_VAL);
+ writel(dev->clk_rate * wdt_dev->timeout,
+ dev->reg + dev->data->wdt_counter_offset);
return 0;
}
@@ -66,13 +71,16 @@ static int orion_wdt_start(struct watchdog_device *wdt_dev)
struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
/* Set watchdog duration */
- writel(dev->clk_rate * wdt_dev->timeout, dev->reg + WDT_VAL);
+ writel(dev->clk_rate * wdt_dev->timeout,
+ dev->reg + dev->data->wdt_counter_offset);
/* Enable watchdog timer */
- atomic_io_modify(dev->reg + TIMER_CTRL, WDT_EN, WDT_EN);
+ atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
+ dev->data->wdt_enable_bit);
/* Enable reset on watchdog */
- atomic_io_modify(dev->rstout, WDT_RESET_OUT_EN, WDT_RESET_OUT_EN);
+ atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit,
+ dev->data->rstout_enable_bit);
return 0;
}
@@ -82,10 +90,10 @@ static int orion_wdt_stop(struct watchdog_device *wdt_dev)
struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
/* Disable reset on watchdog */
- atomic_io_modify(dev->rstout, WDT_RESET_OUT_EN, 0);
+ atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, 0);
/* Disable watchdog timer */
- atomic_io_modify(dev->reg + TIMER_CTRL, WDT_EN, 0);
+ atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0);
return 0;
}
@@ -93,7 +101,7 @@ static int orion_wdt_stop(struct watchdog_device *wdt_dev)
static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev)
{
struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
- return readl(dev->reg + WDT_VAL) / dev->clk_rate;
+ return readl(dev->reg + dev->data->wdt_counter_offset) / dev->clk_rate;
}
static int orion_wdt_set_timeout(struct watchdog_device *wdt_dev,
@@ -150,9 +158,25 @@ static void __iomem * try_rstout_ioremap(struct platform_device *pdev,
return devm_ioremap(&pdev->dev, rstout, 0x4);
}
+static const struct orion_watchdog_data orion_data = {
+ .rstout_enable_bit = BIT(1),
+ .wdt_enable_bit = BIT(4),
+ .wdt_counter_offset = 0x24,
+};
+
+static const struct of_device_id orion_wdt_of_match_table[] = {
+ {
+ .compatible = "marvell,orion-wdt",
+ .data = &orion_data,
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table);
+
static int orion_wdt_probe(struct platform_device *pdev)
{
struct orion_watchdog *dev;
+ const struct of_device_id *match;
unsigned int wdt_max_duration; /* (seconds) */
struct resource *res;
int ret, irq;
@@ -162,9 +186,15 @@ static int orion_wdt_probe(struct platform_device *pdev)
if (!dev)
return -ENOMEM;
+ match = of_match_device(orion_wdt_of_match_table, &pdev->dev);
+ if (!match)
+ /* Default legacy match */
+ match = &orion_wdt_of_match_table[0];
+
dev->wdt.info = &orion_wdt_info;
dev->wdt.ops = &orion_wdt_ops;
dev->wdt.min_timeout = 1;
+ dev->data = match->data;
dev->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(dev->clk)) {
@@ -252,12 +282,6 @@ static void orion_wdt_shutdown(struct platform_device *pdev)
orion_wdt_stop(wdt_dev);
}
-static const struct of_device_id orion_wdt_of_match_table[] = {
- { .compatible = "marvell,orion-wdt", },
- {},
-};
-MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table);
-
static struct platform_driver orion_wdt_driver = {
.probe = orion_wdt_probe,
.remove = orion_wdt_remove,
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 10/18] watchdog: orion: Introduce an orion_watchdog device structure
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
In order to prepare to support multiple compatible-strings, this
commit adds a device structure to hold the driver's state.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
drivers/watchdog/orion_wdt.c | 104 ++++++++++++++++++++++++++-----------------
1 file changed, 64 insertions(+), 40 deletions(-)
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index 80f6a77..96dba41 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -44,45 +44,56 @@
static bool nowayout = WATCHDOG_NOWAYOUT;
static int heartbeat = -1; /* module parameter (seconds) */
-static unsigned int wdt_max_duration; /* (seconds) */
-static struct clk *clk;
-static unsigned int wdt_tclk;
-static void __iomem *wdt_reg;
-static void __iomem *wdt_rstout;
+
+struct orion_watchdog {
+ struct watchdog_device wdt;
+ void __iomem *reg;
+ void __iomem *rstout;
+ unsigned long clk_rate;
+ struct clk *clk;
+};
static int orion_wdt_ping(struct watchdog_device *wdt_dev)
{
+ struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
/* Reload watchdog duration */
- writel(wdt_tclk * wdt_dev->timeout, wdt_reg + WDT_VAL);
+ writel(dev->clk_rate * wdt_dev->timeout, dev->reg + WDT_VAL);
return 0;
}
static int orion_wdt_start(struct watchdog_device *wdt_dev)
{
+ struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+
/* Set watchdog duration */
- writel(wdt_tclk * wdt_dev->timeout, wdt_reg + WDT_VAL);
+ writel(dev->clk_rate * wdt_dev->timeout, dev->reg + WDT_VAL);
/* Enable watchdog timer */
- atomic_io_modify(wdt_reg + TIMER_CTRL, WDT_EN, WDT_EN);
+ atomic_io_modify(dev->reg + TIMER_CTRL, WDT_EN, WDT_EN);
/* Enable reset on watchdog */
- atomic_io_modify(wdt_rstout, WDT_RESET_OUT_EN, WDT_RESET_OUT_EN);
+ atomic_io_modify(dev->rstout, WDT_RESET_OUT_EN, WDT_RESET_OUT_EN);
+
return 0;
}
static int orion_wdt_stop(struct watchdog_device *wdt_dev)
{
+ struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+
/* Disable reset on watchdog */
- atomic_io_modify(wdt_rstout, WDT_RESET_OUT_EN, 0);
+ atomic_io_modify(dev->rstout, WDT_RESET_OUT_EN, 0);
/* Disable watchdog timer */
- atomic_io_modify(wdt_reg + TIMER_CTRL, WDT_EN, 0);
+ atomic_io_modify(dev->reg + TIMER_CTRL, WDT_EN, 0);
+
return 0;
}
static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev)
{
- return readl(wdt_reg + WDT_VAL) / wdt_tclk;
+ struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+ return readl(dev->reg + WDT_VAL) / dev->clk_rate;
}
static int orion_wdt_set_timeout(struct watchdog_device *wdt_dev,
@@ -106,12 +117,6 @@ static const struct watchdog_ops orion_wdt_ops = {
.get_timeleft = orion_wdt_get_timeleft,
};
-static struct watchdog_device orion_wdt = {
- .info = &orion_wdt_info,
- .ops = &orion_wdt_ops,
- .min_timeout = 1,
-};
-
static irqreturn_t orion_wdt_irq(int irq, void *devid)
{
panic("Watchdog Timeout");
@@ -147,18 +152,29 @@ static void __iomem * try_rstout_ioremap(struct platform_device *pdev,
static int orion_wdt_probe(struct platform_device *pdev)
{
+ struct orion_watchdog *dev;
+ unsigned int wdt_max_duration; /* (seconds) */
struct resource *res;
int ret, irq;
- clk = devm_clk_get(&pdev->dev, NULL);
- if (IS_ERR(clk)) {
+ dev = devm_kzalloc(&pdev->dev, sizeof(struct orion_watchdog),
+ GFP_KERNEL);
+ if (!dev)
+ return -ENOMEM;
+
+ dev->wdt.info = &orion_wdt_info;
+ dev->wdt.ops = &orion_wdt_ops;
+ dev->wdt.min_timeout = 1;
+
+ dev->clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(dev->clk)) {
dev_err(&pdev->dev, "Orion Watchdog missing clock\n");
- return PTR_ERR(clk);
+ return PTR_ERR(dev->clk);
}
- ret = clk_prepare_enable(clk);
+ ret = clk_prepare_enable(dev->clk);
if (ret)
return ret;
- wdt_tclk = clk_get_rate(clk);
+ dev->clk_rate = clk_get_rate(dev->clk);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
@@ -166,26 +182,30 @@ static int orion_wdt_probe(struct platform_device *pdev)
goto disable_clk;
}
- wdt_reg = devm_ioremap(&pdev->dev, res->start, resource_size(res));
- if (!wdt_reg) {
+ dev->reg = devm_ioremap(&pdev->dev, res->start,
+ resource_size(res));
+ if (!dev->reg) {
ret = -ENOMEM;
goto disable_clk;
}
- wdt_rstout = try_rstout_ioremap(pdev, res->start & INTERNAL_REGS_MASK);
- if (!wdt_rstout) {
+ dev->rstout = try_rstout_ioremap(pdev, res->start & INTERNAL_REGS_MASK);
+ if (!dev->rstout) {
ret = -ENODEV;
goto disable_clk;
}
- wdt_max_duration = WDT_MAX_CYCLE_COUNT / wdt_tclk;
+ wdt_max_duration = WDT_MAX_CYCLE_COUNT / dev->clk_rate;
+
+ dev->wdt.timeout = wdt_max_duration;
+ dev->wdt.max_timeout = wdt_max_duration;
+ watchdog_init_timeout(&dev->wdt, heartbeat, &pdev->dev);
- orion_wdt.timeout = wdt_max_duration;
- orion_wdt.max_timeout = wdt_max_duration;
- watchdog_init_timeout(&orion_wdt, heartbeat, &pdev->dev);
+ platform_set_drvdata(pdev, &dev->wdt);
+ watchdog_set_drvdata(&dev->wdt, dev);
/* Let's make sure the watchdog is fully stopped */
- orion_wdt_stop(&orion_wdt);
+ orion_wdt_stop(&dev->wdt);
/* It's important to request the IRQ once the watchdog is disabled */
irq = platform_get_irq(pdev, 0);
@@ -195,37 +215,41 @@ static int orion_wdt_probe(struct platform_device *pdev)
* watchdog, so let's make it optional.
*/
ret = devm_request_irq(&pdev->dev, irq, orion_wdt_irq, 0,
- pdev->name, &orion_wdt);
+ pdev->name, dev);
if (ret < 0) {
dev_err(&pdev->dev, "failed to request IRQ\n");
goto disable_clk;
}
}
- watchdog_set_nowayout(&orion_wdt, nowayout);
- ret = watchdog_register_device(&orion_wdt);
+ watchdog_set_nowayout(&dev->wdt, nowayout);
+ ret = watchdog_register_device(&dev->wdt);
if (ret)
goto disable_clk;
pr_info("Initial timeout %d sec%s\n",
- orion_wdt.timeout, nowayout ? ", nowayout" : "");
+ dev->wdt.timeout, nowayout ? ", nowayout" : "");
return 0;
disable_clk:
- clk_disable_unprepare(clk);
+ clk_disable_unprepare(dev->clk);
return ret;
}
static int orion_wdt_remove(struct platform_device *pdev)
{
- watchdog_unregister_device(&orion_wdt);
- clk_disable_unprepare(clk);
+ struct watchdog_device *wdt_dev = platform_get_drvdata(pdev);
+ struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+
+ watchdog_unregister_device(wdt_dev);
+ clk_disable_unprepare(dev->clk);
return 0;
}
static void orion_wdt_shutdown(struct platform_device *pdev)
{
- orion_wdt_stop(&orion_wdt);
+ struct watchdog_device *wdt_dev = platform_get_drvdata(pdev);
+ orion_wdt_stop(wdt_dev);
}
static const struct of_device_id orion_wdt_of_match_table[] = {
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 09/18] watchdog: orion: Remove unneeded BRIDGE_CAUSE clear
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
After adding the IRQ request, the BRIDGE_CAUSE bit should be cleared by the
bridge interrupt controller. There's no longer a need to do it in the watchdog
driver, so we can simply remove it.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
drivers/watchdog/orion_wdt.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index ba8eea9d..80f6a77 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -24,7 +24,6 @@
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/of.h>
-#include <mach/bridge-regs.h>
/* RSTOUT mask register physical address for Orion5x, Kirkwood and Dove */
#define ORION_RSTOUT_MASK_OFFSET 0x20108
@@ -42,7 +41,6 @@
#define WDT_MAX_CYCLE_COUNT 0xffffffff
#define WDT_RESET_OUT_EN BIT(1)
-#define WDT_INT_REQ BIT(3)
static bool nowayout = WATCHDOG_NOWAYOUT;
static int heartbeat = -1; /* module parameter (seconds) */
@@ -64,9 +62,6 @@ static int orion_wdt_start(struct watchdog_device *wdt_dev)
/* Set watchdog duration */
writel(wdt_tclk * wdt_dev->timeout, wdt_reg + WDT_VAL);
- /* Clear watchdog timer interrupt */
- writel(~WDT_INT_REQ, BRIDGE_CAUSE);
-
/* Enable watchdog timer */
atomic_io_modify(wdt_reg + TIMER_CTRL, WDT_EN, WDT_EN);
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 08/18] watchdog: orion: Make RSTOUT register a separate resource
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
In order to support other SoC, it's required to distinguish
the 'control' timer register, from the 'rstout' register
that enables system reset on watchdog expiration.
To prevent a compatibility break, this commit adds a fallback
to a hardcoded RSTOUT address.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
.../devicetree/bindings/watchdog/marvel.txt | 6 ++-
arch/arm/mach-dove/include/mach/bridge-regs.h | 1 +
arch/arm/mach-kirkwood/include/mach/bridge-regs.h | 1 +
arch/arm/mach-mv78xx0/include/mach/bridge-regs.h | 1 +
arch/arm/mach-orion5x/include/mach/bridge-regs.h | 1 +
arch/arm/plat-orion/common.c | 10 +++--
drivers/watchdog/orion_wdt.c | 44 +++++++++++++++++++++-
7 files changed, 56 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/watchdog/marvel.txt b/Documentation/devicetree/bindings/watchdog/marvel.txt
index 0731fbd..1544fe9 100644
--- a/Documentation/devicetree/bindings/watchdog/marvel.txt
+++ b/Documentation/devicetree/bindings/watchdog/marvel.txt
@@ -3,7 +3,9 @@
Required Properties:
- Compatibility : "marvell,orion-wdt"
-- reg : Address of the timer registers
+- reg : Should contain two entries: first one with the
+ timer control address, second one with the
+ rstout enable address.
Optional properties:
@@ -14,7 +16,7 @@ Example:
wdt at 20300 {
compatible = "marvell,orion-wdt";
- reg = <0x20300 0x28>;
+ reg = <0x20300 0x28>, <0x20108 0x4>;
interrupts = <3>;
timeout-sec = <10>;
status = "okay";
diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h
index 5362df3..f4a5b34 100644
--- a/arch/arm/mach-dove/include/mach/bridge-regs.h
+++ b/arch/arm/mach-dove/include/mach/bridge-regs.h
@@ -21,6 +21,7 @@
#define CPU_CTRL_PCIE1_LINK 0x00000008
#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108)
+#define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108)
#define SOFT_RESET_OUT_EN 0x00000004
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c)
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index 8b9d1c9..60f6421 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -21,6 +21,7 @@
#define CPU_RESET 0x00000002
#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108)
+#define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108)
#define SOFT_RESET_OUT_EN 0x00000004
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c)
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
index 5f03484..e20d6da 100644
--- a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
@@ -15,6 +15,7 @@
#define L2_WRITETHROUGH 0x00020000
#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108)
+#define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108)
#define SOFT_RESET_OUT_EN 0x00000004
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c)
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
index f727d03..5766e3f 100644
--- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h
+++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
@@ -18,6 +18,7 @@
#define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104)
#define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x108)
+#define RSTOUTn_MASK_PHYS (ORION5X_BRIDGE_PHYS_BASE + 0x108)
#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE + 0x10c)
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index c66d163..3375037 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -594,14 +594,16 @@ void __init orion_spi_1_init(unsigned long mapbase)
/*****************************************************************************
* Watchdog
****************************************************************************/
-static struct resource orion_wdt_resource =
- DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x28);
+static struct resource orion_wdt_resource[] = {
+ DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x04),
+ DEFINE_RES_MEM(RSTOUTn_MASK_PHYS, 0x04),
+};
static struct platform_device orion_wdt_device = {
.name = "orion_wdt",
.id = -1,
- .num_resources = 1,
- .resource = &orion_wdt_resource,
+ .num_resources = ARRAY_SIZE(orion_wdt_resource),
+ .resource = orion_wdt_resource,
};
void __init orion_wdt_init(void)
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index f5e7b17..ba8eea9d 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -26,6 +26,12 @@
#include <linux/of.h>
#include <mach/bridge-regs.h>
+/* RSTOUT mask register physical address for Orion5x, Kirkwood and Dove */
+#define ORION_RSTOUT_MASK_OFFSET 0x20108
+
+/* Internal registers can be configured at any 1 MiB aligned address */
+#define INTERNAL_REGS_MASK ~(SZ_1M - 1)
+
/*
* Watchdog timer block registers.
*/
@@ -44,6 +50,7 @@ static unsigned int wdt_max_duration; /* (seconds) */
static struct clk *clk;
static unsigned int wdt_tclk;
static void __iomem *wdt_reg;
+static void __iomem *wdt_rstout;
static int orion_wdt_ping(struct watchdog_device *wdt_dev)
{
@@ -64,14 +71,14 @@ static int orion_wdt_start(struct watchdog_device *wdt_dev)
atomic_io_modify(wdt_reg + TIMER_CTRL, WDT_EN, WDT_EN);
/* Enable reset on watchdog */
- atomic_io_modify(RSTOUTn_MASK, WDT_RESET_OUT_EN, WDT_RESET_OUT_EN);
+ atomic_io_modify(wdt_rstout, WDT_RESET_OUT_EN, WDT_RESET_OUT_EN);
return 0;
}
static int orion_wdt_stop(struct watchdog_device *wdt_dev)
{
/* Disable reset on watchdog */
- atomic_io_modify(RSTOUTn_MASK, WDT_RESET_OUT_EN, 0);
+ atomic_io_modify(wdt_rstout, WDT_RESET_OUT_EN, 0);
/* Disable watchdog timer */
atomic_io_modify(wdt_reg + TIMER_CTRL, WDT_EN, 0);
@@ -116,6 +123,33 @@ static irqreturn_t orion_wdt_irq(int irq, void *devid)
return IRQ_HANDLED;
}
+/*
+ * The original devicetree binding for this driver specified only
+ * one memory resource, so in order to keep DT backwards compatibility
+ * we try to fallback to a hardcoded register address, if the resource
+ * is missing from the devicetree.
+ */
+static void __iomem *try_rstout_ioremap(struct platform_device *pdev,
+ phys_addr_t internal_regs)
+{
+ struct resource *res;
+ phys_addr_t rstout;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (res)
+ return devm_ioremap(&pdev->dev, res->start,
+ resource_size(res));
+
+ /* This workaround works only for "orion-wdt", DT-enabled */
+ if (!of_device_is_compatible(pdev->dev.of_node, "marvell,orion-wdt"))
+ return NULL;
+
+ rstout = internal_regs + ORION_RSTOUT_MASK_OFFSET;
+
+ WARN(1, FW_BUG "falling back to harcoded RSTOUT reg 0x%x\n", rstout);
+ return devm_ioremap(&pdev->dev, rstout, 0x4);
+}
+
static int orion_wdt_probe(struct platform_device *pdev)
{
struct resource *res;
@@ -143,6 +177,12 @@ static int orion_wdt_probe(struct platform_device *pdev)
goto disable_clk;
}
+ wdt_rstout = try_rstout_ioremap(pdev, res->start & INTERNAL_REGS_MASK);
+ if (!wdt_rstout) {
+ ret = -ENODEV;
+ goto disable_clk;
+ }
+
wdt_max_duration = WDT_MAX_CYCLE_COUNT / wdt_tclk;
orion_wdt.timeout = wdt_max_duration;
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 07/18] watchdog: orion: Handle IRQ
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
DT-enabled where an irqchip driver for the brigde interrupt controller is
available can handle the watchdog IRQ properly. Therefore, we request
the interruption and add a dummy handler that merely calls panic().
This is done in order to have an initial 'ack' of the interruption,
which clears the watchdog state.
Furthermore, since some platforms don't have such IRQ, this commit
makes the interruption specification optional.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
.../devicetree/bindings/watchdog/marvel.txt | 2 ++
drivers/watchdog/orion_wdt.c | 24 +++++++++++++++++++++-
2 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/watchdog/marvel.txt b/Documentation/devicetree/bindings/watchdog/marvel.txt
index 5dc8d30..0731fbd 100644
--- a/Documentation/devicetree/bindings/watchdog/marvel.txt
+++ b/Documentation/devicetree/bindings/watchdog/marvel.txt
@@ -7,6 +7,7 @@ Required Properties:
Optional properties:
+- interrupts : Contains the IRQ for watchdog expiration
- timeout-sec : Contains the watchdog timeout in seconds
Example:
@@ -14,6 +15,7 @@ Example:
wdt at 20300 {
compatible = "marvell,orion-wdt";
reg = <0x20300 0x28>;
+ interrupts = <3>;
timeout-sec = <10>;
status = "okay";
};
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index 2dbeee9..f5e7b17 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -19,6 +19,7 @@
#include <linux/platform_device.h>
#include <linux/watchdog.h>
#include <linux/init.h>
+#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/err.h>
@@ -109,10 +110,16 @@ static struct watchdog_device orion_wdt = {
.min_timeout = 1,
};
+static irqreturn_t orion_wdt_irq(int irq, void *devid)
+{
+ panic("Watchdog Timeout");
+ return IRQ_HANDLED;
+}
+
static int orion_wdt_probe(struct platform_device *pdev)
{
struct resource *res;
- int ret;
+ int ret, irq;
clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(clk)) {
@@ -145,6 +152,21 @@ static int orion_wdt_probe(struct platform_device *pdev)
/* Let's make sure the watchdog is fully stopped */
orion_wdt_stop(&orion_wdt);
+ /* It's important to request the IRQ once the watchdog is disabled */
+ irq = platform_get_irq(pdev, 0);
+ if (irq >= 0) {
+ /*
+ * Not all supported platforms specify an interruption for the
+ * watchdog, so let's make it optional.
+ */
+ ret = devm_request_irq(&pdev->dev, irq, orion_wdt_irq, 0,
+ pdev->name, &orion_wdt);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "failed to request IRQ\n");
+ goto disable_clk;
+ }
+ }
+
watchdog_set_nowayout(&orion_wdt, nowayout);
ret = watchdog_register_device(&orion_wdt);
if (ret)
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 06/18] watchdog: orion: Make sure the watchdog is initially stopped
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
Having the watchdog initially fully stopped is important to avoid
any spurious watchdog triggers, in case the registers are not in
its reset state.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
drivers/watchdog/orion_wdt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index 6746033..2dbeee9 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -142,6 +142,9 @@ static int orion_wdt_probe(struct platform_device *pdev)
orion_wdt.max_timeout = wdt_max_duration;
watchdog_init_timeout(&orion_wdt, heartbeat, &pdev->dev);
+ /* Let's make sure the watchdog is fully stopped */
+ orion_wdt_stop(&orion_wdt);
+
watchdog_set_nowayout(&orion_wdt, nowayout);
ret = watchdog_register_device(&orion_wdt);
if (ret)
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 05/18] watchdog: orion: Remove unused macros
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
These are not used anywhere so it's safe to remove them.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
drivers/watchdog/orion_wdt.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index b92a991..6746033 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -33,8 +33,6 @@
#define WDT_VAL 0x0024
#define WDT_MAX_CYCLE_COUNT 0xffffffff
-#define WDT_IN_USE 0
-#define WDT_OK_TO_CLOSE 1
#define WDT_RESET_OUT_EN BIT(1)
#define WDT_INT_REQ BIT(3)
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 04/18] watchdog: orion: Use atomic access for shared registers
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
Since the timer control register is shared with the clocksource driver,
use the recently introduced atomic_io_clear_set() to access such register.
Given the watchdog core already provides serialization for all the
watchdog ops, this commit allows to remove the spinlock entirely.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
drivers/watchdog/orion_wdt.c | 42 +++++-------------------------------------
1 file changed, 5 insertions(+), 37 deletions(-)
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index 7f19fa3..b92a991 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -20,7 +20,6 @@
#include <linux/watchdog.h>
#include <linux/init.h>
#include <linux/io.h>
-#include <linux/spinlock.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/of.h>
@@ -46,25 +45,16 @@ static unsigned int wdt_max_duration; /* (seconds) */
static struct clk *clk;
static unsigned int wdt_tclk;
static void __iomem *wdt_reg;
-static DEFINE_SPINLOCK(wdt_lock);
static int orion_wdt_ping(struct watchdog_device *wdt_dev)
{
- spin_lock(&wdt_lock);
-
/* Reload watchdog duration */
writel(wdt_tclk * wdt_dev->timeout, wdt_reg + WDT_VAL);
-
- spin_unlock(&wdt_lock);
return 0;
}
static int orion_wdt_start(struct watchdog_device *wdt_dev)
{
- u32 reg;
-
- spin_lock(&wdt_lock);
-
/* Set watchdog duration */
writel(wdt_tclk * wdt_dev->timeout, wdt_reg + WDT_VAL);
@@ -72,48 +62,26 @@ static int orion_wdt_start(struct watchdog_device *wdt_dev)
writel(~WDT_INT_REQ, BRIDGE_CAUSE);
/* Enable watchdog timer */
- reg = readl(wdt_reg + TIMER_CTRL);
- reg |= WDT_EN;
- writel(reg, wdt_reg + TIMER_CTRL);
+ atomic_io_modify(wdt_reg + TIMER_CTRL, WDT_EN, WDT_EN);
/* Enable reset on watchdog */
- reg = readl(RSTOUTn_MASK);
- reg |= WDT_RESET_OUT_EN;
- writel(reg, RSTOUTn_MASK);
-
- spin_unlock(&wdt_lock);
+ atomic_io_modify(RSTOUTn_MASK, WDT_RESET_OUT_EN, WDT_RESET_OUT_EN);
return 0;
}
static int orion_wdt_stop(struct watchdog_device *wdt_dev)
{
- u32 reg;
-
- spin_lock(&wdt_lock);
-
/* Disable reset on watchdog */
- reg = readl(RSTOUTn_MASK);
- reg &= ~WDT_RESET_OUT_EN;
- writel(reg, RSTOUTn_MASK);
+ atomic_io_modify(RSTOUTn_MASK, WDT_RESET_OUT_EN, 0);
/* Disable watchdog timer */
- reg = readl(wdt_reg + TIMER_CTRL);
- reg &= ~WDT_EN;
- writel(reg, wdt_reg + TIMER_CTRL);
-
- spin_unlock(&wdt_lock);
+ atomic_io_modify(wdt_reg + TIMER_CTRL, WDT_EN, 0);
return 0;
}
static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev)
{
- unsigned int time_left;
-
- spin_lock(&wdt_lock);
- time_left = readl(wdt_reg + WDT_VAL) / wdt_tclk;
- spin_unlock(&wdt_lock);
-
- return time_left;
+ return readl(wdt_reg + WDT_VAL) / wdt_tclk;
}
static int orion_wdt_set_timeout(struct watchdog_device *wdt_dev,
--
1.8.1.5
^ permalink raw reply related
* [PATCH v4 03/18] watchdog: orion: Add clock error handling
From: Ezequiel Garcia @ 2014-01-22 23:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390431915-5115-1-git-send-email-ezequiel.garcia@free-electrons.com>
This commit adds a check for clk_prepare_enable success and introduces
an error path to disable the clock properly.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
drivers/watchdog/orion_wdt.c | 29 +++++++++++++++++++----------
1 file changed, 19 insertions(+), 10 deletions(-)
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index f7722a4..7f19fa3 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -151,17 +151,24 @@ static int orion_wdt_probe(struct platform_device *pdev)
clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(clk)) {
dev_err(&pdev->dev, "Orion Watchdog missing clock\n");
- return -ENODEV;
+ return PTR_ERR(clk);
}
- clk_prepare_enable(clk);
+ ret = clk_prepare_enable(clk);
+ if (ret)
+ return ret;
wdt_tclk = clk_get_rate(clk);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res)
- return -ENODEV;
+ if (!res) {
+ ret = -ENODEV;
+ goto disable_clk;
+ }
+
wdt_reg = devm_ioremap(&pdev->dev, res->start, resource_size(res));
- if (!wdt_reg)
- return -ENOMEM;
+ if (!wdt_reg) {
+ ret = -ENOMEM;
+ goto disable_clk;
+ }
wdt_max_duration = WDT_MAX_CYCLE_COUNT / wdt_tclk;
@@ -171,14 +178,16 @@ static int orion_wdt_probe(struct platform_device *pdev)
watchdog_set_nowayout(&orion_wdt, nowayout);
ret = watchdog_register_device(&orion_wdt);
- if (ret) {
- clk_disable_unprepare(clk);
- return ret;
- }
+ if (ret)
+ goto disable_clk;
pr_info("Initial timeout %d sec%s\n",
orion_wdt.timeout, nowayout ? ", nowayout" : "");
return 0;
+
+disable_clk:
+ clk_disable_unprepare(clk);
+ return ret;
}
static int orion_wdt_remove(struct platform_device *pdev)
--
1.8.1.5
^ permalink raw reply related
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