* [PATCH] pinctrl: at91: use locked variant of irq_set_handler
From: Linus Walleij @ 2014-01-23 7:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390319718-12285-1-git-send-email-nicolas.ferre@atmel.com>
On Tue, Jan 21, 2014 at 4:55 PM, Nicolas Ferre <nicolas.ferre@atmel.com> wrote:
> When setting the gpio irq type, use the __irq_set_handler_locked()
> variant instead of the irq_set_handler() to prevent false
> spinlock recursion warning.
>
> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> Cc: stable <stable@vger.kernel.org> # v3.12
Patch applied for fixes.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH 2/2] clocksource: Make clocksource register functions void
From: Hans-Christian Egtvedt @ 2014-01-23 7:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390461166-36440-1-git-send-email-wangyijing@huawei.com>
Around Thu 23 Jan 2014 15:12:46 +0800 or thereabout, Yijing Wang wrote:
> Currently, clocksource_register() and __clocksource_register_scale()
> functions always return 0, it's pointless, make functions void.
> And remove the dead code that check the clocksource_register_hz()
> return value.
>
> Signed-off-by: Yijing Wang <wangyijing@huawei.com>
For the avr32 related change
Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
> ---
> arch/arm/mach-davinci/time.c | 5 ++---
> arch/arm/mach-msm/timer.c | 4 +---
> arch/arm/mach-omap2/timer.c | 8 +++-----
> arch/avr32/kernel/time.c | 4 +---
> arch/blackfin/kernel/time-ts.c | 6 ++----
> arch/microblaze/kernel/timer.c | 3 +--
> arch/mips/jz4740/time.c | 6 +-----
> arch/mips/loongson/common/cs5536/cs5536_mfgpt.c | 3 ++-
> arch/openrisc/kernel/time.c | 3 +--
> arch/powerpc/kernel/time.c | 6 +-----
> arch/um/kernel/time.c | 6 +-----
> arch/x86/platform/uv/uv_time.c | 14 ++++++--------
> drivers/clocksource/acpi_pm.c | 3 ++-
> drivers/clocksource/cadence_ttc_timer.c | 6 +-----
> drivers/clocksource/exynos_mct.c | 4 +---
> drivers/clocksource/i8253.c | 3 ++-
> drivers/clocksource/mmio.c | 3 ++-
> drivers/clocksource/samsung_pwm_timer.c | 5 +----
> drivers/clocksource/scx200_hrt.c | 3 ++-
> drivers/clocksource/tcb_clksrc.c | 8 +-------
> drivers/clocksource/timer-marco.c | 2 +-
> drivers/clocksource/timer-prima2.c | 2 +-
> drivers/clocksource/vt8500_timer.c | 4 +---
> include/linux/clocksource.h | 8 ++++----
> kernel/time/clocksource.c | 6 ++----
> kernel/time/jiffies.c | 3 ++-
> 26 files changed, 45 insertions(+), 83 deletions(-)
<snipp diffs>
--
HcE
^ permalink raw reply
* [PATCH 2/2] clocksource: Make clocksource register functions void
From: Tony Prisk @ 2014-01-23 7:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390461166-36440-1-git-send-email-wangyijing@huawei.com>
On 23/01/14 20:12, Yijing Wang wrote:
> Currently, clocksource_register() and __clocksource_register_scale()
> functions always return 0, it's pointless, make functions void.
> And remove the dead code that check the clocksource_register_hz()
> return value.
>
> Signed-off-by: Yijing Wang <wangyijing@huawei.com>
......
> diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
> index 67301a4..5a17c5e 100644
> --- a/include/linux/clocksource.h
> +++ b/include/linux/clocksource.h
> @@ -282,7 +282,7 @@ static inline s64 clocksource_cyc2ns(cycle_t cycles, u32 mult, u32 shift)
> }
>
>
> -extern int clocksource_register(struct clocksource*);
> +extern void clocksource_register(struct clocksource *);
> extern int clocksource_unregister(struct clocksource*);
> extern void clocksource_touch_watchdog(void);
> extern struct clocksource* clocksource_get_next(void);
> @@ -301,17 +301,17 @@ clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec);
> * Don't call __clocksource_register_scale directly, use
> * clocksource_register_hz/khz
> */
> -extern int
> +extern void
> __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq);
> extern void
> __clocksource_updatefreq_scale(struct clocksource *cs, u32 scale, u32 freq);
>
> -static inline int clocksource_register_hz(struct clocksource *cs, u32 hz)
> +static inline void clocksource_register_hz(struct clocksource *cs, u32 hz)
> {
> return __clocksource_register_scale(cs, 1, hz);
> }
This doesn't make sense - you are still returning a value on a function
declared void, and the return is now from a function that doesn't return
anything either ?!?!
Doesn't this throw a compile-time warning??
Regards
Tony Prisk
^ permalink raw reply
* [PATCH 2/2] clocksource: Make clocksource register functions void
From: Geert Uytterhoeven @ 2014-01-23 7:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52E0C889.6000106@prisktech.co.nz>
On Thu, Jan 23, 2014 at 8:45 AM, Tony Prisk <linux@prisktech.co.nz> wrote:
>> -static inline int clocksource_register_hz(struct clocksource *cs, u32
>> hz)
>> +static inline void clocksource_register_hz(struct clocksource *cs, u32
>> hz)
>> {
>> return __clocksource_register_scale(cs, 1, hz);
>> }
>
>
> This doesn't make sense - you are still returning a value on a function
> declared void, and the return is now from a function that doesn't return
> anything either ?!?!
> Doesn't this throw a compile-time warning??
No, passing on void in functions returning void doesn't cause compiler
warnings.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH 2/2] clocksource: Make clocksource register functions void
From: Tony Prisk @ 2014-01-23 8:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAMuHMdUcKb8m71Z7dUo86MQ_KZgPujxsduUUt3Mz8Oke+DLSVw@mail.gmail.com>
On 23/01/14 20:58, Geert Uytterhoeven wrote:
> On Thu, Jan 23, 2014 at 8:45 AM, Tony Prisk <linux@prisktech.co.nz> wrote:
>>> -static inline int clocksource_register_hz(struct clocksource *cs, u32
>>> hz)
>>> +static inline void clocksource_register_hz(struct clocksource *cs, u32
>>> hz)
>>> {
>>> return __clocksource_register_scale(cs, 1, hz);
>>> }
>>
>> This doesn't make sense - you are still returning a value on a function
>> declared void, and the return is now from a function that doesn't return
>> anything either ?!?!
>> Doesn't this throw a compile-time warning??
> No, passing on void in functions returning void doesn't cause compiler
> warnings.
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
Doesn't seem right to me (even if there is no warning) but that's
probably because I used to program in Pascal where functions with no
return were 'procedures' :)
Whether it needs to be changed or not:
For the vt8500 part -
Acked-by: Tony Prisk <linux@prisktech.co.nz>
Regards
Tony Prisk
^ permalink raw reply
* [PATCH] pinctrl: Rename Broadcom Capri pinctrl driver
From: Linus Walleij @ 2014-01-23 8:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390343886-25852-1-git-send-email-syin@broadcom.com>
On Tue, Jan 21, 2014 at 11:38 PM, Sherman Yin <syin@broadcom.com> wrote:
> To be consistent with other Broadcom drivers, the Broadcom Capri pinctrl
> driver and its related CONFIG option are renamed to bcm281xx.
>
> Devicetree compatible string and binding documentation use
> "brcm,bcm11351-pinctrl" to match the machine binding here:
> Documentation/devicetree/bindings/arm/bcm/bcm11351.txt
>
> This driver supports pinctrl on BCM11130, BCM11140, BCM11351, BCM28145
> and BCM28155 SoCs.
>
> Signed-off-by: Sherman Yin <syin@broadcom.com>
> Reviewed-by: Matt Porter <mporter@linaro.org>
Patch applied for fixes.
If it was only the DT bindings that were rushed to change
you *could* have made a patch just changing these and the
binding doc, and give me the option to defer the changing of
variables and function names, but whatever.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH 2/2] clocksource: Make clocksource register functions void
From: Yijing Wang @ 2014-01-23 8:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52E0CD18.5080104@prisktech.co.nz>
On 2014/1/23 16:04, Tony Prisk wrote:
> On 23/01/14 20:58, Geert Uytterhoeven wrote:
>> On Thu, Jan 23, 2014 at 8:45 AM, Tony Prisk <linux@prisktech.co.nz> wrote:
>>>> -static inline int clocksource_register_hz(struct clocksource *cs, u32
>>>> hz)
>>>> +static inline void clocksource_register_hz(struct clocksource *cs, u32
>>>> hz)
>>>> {
>>>> return __clocksource_register_scale(cs, 1, hz);
>>>> }
>>>
>>> This doesn't make sense - you are still returning a value on a function
>>> declared void, and the return is now from a function that doesn't return
>>> anything either ?!?!
>>> Doesn't this throw a compile-time warning??
>> No, passing on void in functions returning void doesn't cause compiler
>> warnings.
>>
>> Gr{oetje,eeting}s,
>>
>> Geert
>>
>> --
>> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
>>
>> In personal conversations with technical people, I call myself a hacker. But
>> when I'm talking to journalists I just say "programmer" or something like that.
>> -- Linus Torvalds
> Doesn't seem right to me (even if there is no warning) but that's probably because I used to program in Pascal where functions with no return were 'procedures' :)
> Whether it needs to be changed or not:
>
> For the vt8500 part -
> Acked-by: Tony Prisk <linux@prisktech.co.nz>
Thanks!
>
> Regards
> Tony Prisk
>
>
> .
>
--
Thanks!
Yijing
^ permalink raw reply
* [BUG] FL1009: xHCI host not responding to stop endpoint command.
From: Arnaud Ebalard @ 2014-01-23 8:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140122235620.GC20359@xanatos>
Hi Sarah,
Sarah Sharp <sarah.a.sharp@linux.intel.com> writes:
>> > Can you pinpoint the commit that introduced the regression?
>>
>> f5182b4155b9d686c5540a6822486400e34ddd98 "xhci: Disable MSI for some Fresco Logic hosts."
>>
>> Technically, this is not per se the commit which introduced the
>> regression but the one that *partially* fixed it by introducing the XHCI
>> quirk to skip MSI enabling for Fresco Logic chips. The thing is it
>> should have included the FL1009 in the targets. Sarah, can you confirm
>> this?
>
> I don't know if it should have included FL1009, it was just a guess,
> based on the fact that the 0x1000 and 0x1400 devices did need MSI
> disabled. I can attempt to ask the Fresco Logic folks I know, but I'm
> not sure if/when I'll get a response back.
>
> That still doesn't necessarily rule out MSI issues in the Marvell PCI
> host controller code. Can you attach another PCI device with MSI
> support under the host and see if it works?
The various Armada-based devices I have are NAS which do not have PCIe
slots to plug additional devices (everything is soldered). I don't know
which device Thomas used for its tests. Just in case, I also added Willy
in CC: who have various boards and may also have done more test with
additional PCIe devices and CONFIG_PCI_MSI enabled on 3.13 kernel.
Cheers,
a+
^ permalink raw reply
* [linux-sunxi] [PATCH v5 13/14] ARM: sun4i: dts: Add ahci / sata support
From: Chen-Yu Tsai @ 2014-01-23 8:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390417489-5354-14-git-send-email-hdegoede@redhat.com>
Hi,
On Thu, Jan 23, 2014 at 3:04 AM, Hans de Goede <hdegoede@redhat.com> wrote:
> From: Oliver Schinagl <oliver@schinagl.nl>
>
> This patch adds sunxi sata support to A10 boards that have such a connector.
> Some boards also feature a regulator via a GPIO and support for this is also
> added.
>
> Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> ---
> arch/arm/boot/dts/sun4i-a10-a1000.dts | 4 ++++
> arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 6 +++++
> arch/arm/boot/dts/sun4i-a10.dtsi | 8 +++++++
> arch/arm/boot/dts/sunxi-ahci-reg.dtsi | 38 ++++++++++++++++++++++++++++++
> 4 files changed, 56 insertions(+)
> create mode 100644 arch/arm/boot/dts/sunxi-ahci-reg.dtsi
>
> diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts b/arch/arm/boot/dts/sun4i-a10-a1000.dts
> index aef8207..3fb7305 100644
> --- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
> +++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
> @@ -48,6 +48,10 @@
> status = "okay";
> };
>
> + ahci: sata at 01c18000 {
> + status = "okay";
> + };
> +
> pinctrl at 01c20800 {
> mmc0_cd_pin_a1000: mmc0_cd_pin at 0 {
> allwinner,pins = "PH1";
> diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
> index f50fb2b..6ae1110 100644
> --- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
> +++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
> @@ -12,6 +12,7 @@
>
> /dts-v1/;
> /include/ "sun4i-a10.dtsi"
> +/include/ "sunxi-ahci-reg.dtsi"
>
> / {
> model = "Cubietech Cubieboard";
> @@ -51,6 +52,11 @@
> status = "okay";
> };
>
> + ahci: sata at 01c18000 {
> + target-supply = <®_ahci_5v>;
> + status = "okay";
> + };
> +
> pinctrl at 01c20800 {
> mmc0_cd_pin_cubieboard: mmc0_cd_pin at 0 {
> allwinner,pins = "PH1";
> diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
> index 4736dd2..198dcda 100644
> --- a/arch/arm/boot/dts/sun4i-a10.dtsi
> +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
> @@ -331,6 +331,14 @@
> status = "disabled";
> };
>
> + ahci: sata at 01c18000 {
> + compatible = "allwinner,sun4i-a10-ahci";
> + reg = <0x01c18000 0x1000>;
> + interrupts = <56>;
> + clocks = <&pll6 0>, <&ahb_gates 25>;
> + status = "disabled";
> + };
> +
Consider adding
pinctrl-names = "default";
in the ahci node to suppress "default pin state not found" warnings.
Same goes for sun7i-a20.dtsi.
> intc: interrupt-controller at 01c20400 {
> compatible = "allwinner,sun4i-ic";
> reg = <0x01c20400 0x400>;
> diff --git a/arch/arm/boot/dts/sunxi-ahci-reg.dtsi b/arch/arm/boot/dts/sunxi-ahci-reg.dtsi
> new file mode 100644
> index 0000000..955b197
> --- /dev/null
> +++ b/arch/arm/boot/dts/sunxi-ahci-reg.dtsi
> @@ -0,0 +1,38 @@
> +/*
> + * sunxi boards sata target power supply common code
> + *
> + * Copyright 2014 - Hans de Goede <hdegoede@redhat.com>
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +/ {
> + soc at 01c00000 {
This block needs to be under
pinctrl at 01c20800 {
> + ahci_pwr_pin_a: ahci_pwr_pin at 0 {
> + allwinner,pins = "PB8";
> + allwinner,function = "gpio_out";
> + allwinner,drive = <0>;
> + allwinner,pull = <0>;
> + };
};
> + };
> +
> + regulators {
> + compatible = "simple-bus";
> + pinctrl-names = "default";
> +
> + reg_ahci_5v: ahci-5v {
> + compatible = "regulator-fixed";
> + regulator-name = "ahci-5v";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + pinctrl-0 = <&ahci_pwr_pin_a>;
> + gpio = <&pio 1 8 0>;
> + enable-active-high;
> + };
> + };
> +};
> --
> 1.8.5.3
>
Great work! Thanks!
ChenYu
^ permalink raw reply
* [PATCH] pinctrl: Rename Broadcom Capri pinctrl driver
From: Linus Walleij @ 2014-01-23 8:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdZ+3MC8XpfD-vumvq3yQACzFn89DQjWQeXbdBK+9JmfLQ@mail.gmail.com>
On Thu, Jan 23, 2014 at 9:17 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Tue, Jan 21, 2014 at 11:38 PM, Sherman Yin <syin@broadcom.com> wrote:
>
>> To be consistent with other Broadcom drivers, the Broadcom Capri pinctrl
>> driver and its related CONFIG option are renamed to bcm281xx.
>>
>> Devicetree compatible string and binding documentation use
>> "brcm,bcm11351-pinctrl" to match the machine binding here:
>> Documentation/devicetree/bindings/arm/bcm/bcm11351.txt
>>
>> This driver supports pinctrl on BCM11130, BCM11140, BCM11351, BCM28145
>> and BCM28155 SoCs.
>>
>> Signed-off-by: Sherman Yin <syin@broadcom.com>
>> Reviewed-by: Matt Porter <mporter@linaro.org>
>
> Patch applied for fixes.
No wait. I took the patch out.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
This driver is already causing a messy conflict situation in ARM SoC.
I don't want to escalate their problem.
Either you merge this through ARM SoC or split off the arch/arm/*
changes into a separate patch for ARM SoC.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH 2/2] clocksource: Make clocksource register functions void
From: Daniel Lezcano @ 2014-01-23 8:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390461166-36440-1-git-send-email-wangyijing@huawei.com>
On 01/23/2014 08:12 AM, Yijing Wang wrote:
> Currently, clocksource_register() and __clocksource_register_scale()
> functions always return 0, it's pointless, make functions void.
> And remove the dead code that check the clocksource_register_hz()
> return value.
>
> Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Well, do we really want to change all these files to not take care of a
return value ? What about is we have to check it again later ?
I would recommend to investigate __clocksource_register_scale and the
underneath functions if there is not an error to be returned in the call
stack somewhere which is ignored today.
The same applies for clocksource_register.
Thanks
-- Daniel
> ---
> arch/arm/mach-davinci/time.c | 5 ++---
> arch/arm/mach-msm/timer.c | 4 +---
> arch/arm/mach-omap2/timer.c | 8 +++-----
> arch/avr32/kernel/time.c | 4 +---
> arch/blackfin/kernel/time-ts.c | 6 ++----
> arch/microblaze/kernel/timer.c | 3 +--
> arch/mips/jz4740/time.c | 6 +-----
> arch/mips/loongson/common/cs5536/cs5536_mfgpt.c | 3 ++-
> arch/openrisc/kernel/time.c | 3 +--
> arch/powerpc/kernel/time.c | 6 +-----
> arch/um/kernel/time.c | 6 +-----
> arch/x86/platform/uv/uv_time.c | 14 ++++++--------
> drivers/clocksource/acpi_pm.c | 3 ++-
> drivers/clocksource/cadence_ttc_timer.c | 6 +-----
> drivers/clocksource/exynos_mct.c | 4 +---
> drivers/clocksource/i8253.c | 3 ++-
> drivers/clocksource/mmio.c | 3 ++-
> drivers/clocksource/samsung_pwm_timer.c | 5 +----
> drivers/clocksource/scx200_hrt.c | 3 ++-
> drivers/clocksource/tcb_clksrc.c | 8 +-------
> drivers/clocksource/timer-marco.c | 2 +-
> drivers/clocksource/timer-prima2.c | 2 +-
> drivers/clocksource/vt8500_timer.c | 4 +---
> include/linux/clocksource.h | 8 ++++----
> kernel/time/clocksource.c | 6 ++----
> kernel/time/jiffies.c | 3 ++-
> 26 files changed, 45 insertions(+), 83 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
> index 56c6eb5..9536f85 100644
> --- a/arch/arm/mach-davinci/time.c
> +++ b/arch/arm/mach-davinci/time.c
> @@ -387,9 +387,8 @@ void __init davinci_timer_init(void)
>
> /* setup clocksource */
> clocksource_davinci.name = id_to_name[clocksource_id];
> - if (clocksource_register_hz(&clocksource_davinci,
> - davinci_clock_tick_rate))
> - printk(err, clocksource_davinci.name);
> + clocksource_register_hz(&clocksource_davinci,
> + davinci_clock_tick_rate);
>
> setup_sched_clock(davinci_read_sched_clock, 32,
> davinci_clock_tick_rate);
> diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
> index 1e9c338..c96e034 100644
> --- a/arch/arm/mach-msm/timer.c
> +++ b/arch/arm/mach-msm/timer.c
> @@ -226,9 +226,7 @@ static void __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq,
>
> err:
> writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE);
> - res = clocksource_register_hz(cs, dgt_hz);
> - if (res)
> - pr_err("clocksource_register failed\n");
> + clocksource_register_hz(cs, dgt_hz);
> setup_sched_clock(msm_sched_clock_read, sched_bits, dgt_hz);
> }
>
> diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
> index 3ca81e0..beaf7c7 100644
> --- a/arch/arm/mach-omap2/timer.c
> +++ b/arch/arm/mach-omap2/timer.c
> @@ -473,11 +473,9 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
> OMAP_TIMER_NONPOSTED);
> setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
>
> - if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
> - pr_err("Could not register clocksource %s\n",
> - clocksource_gpt.name);
> - else
> - pr_info("OMAP clocksource: %s at %lu Hz\n",
> + clocksource_register_hz(&clocksource_gpt, clksrc.rate);
> +
> + pr_info("OMAP clocksource: %s at %lu Hz\n",
> clocksource_gpt.name, clksrc.rate);
> }
>
> diff --git a/arch/avr32/kernel/time.c b/arch/avr32/kernel/time.c
> index d0f771b..51b4a66 100644
> --- a/arch/avr32/kernel/time.c
> +++ b/arch/avr32/kernel/time.c
> @@ -134,9 +134,7 @@ void __init time_init(void)
>
> /* figure rate for counter */
> counter_hz = clk_get_rate(boot_cpu_data.clk);
> - ret = clocksource_register_hz(&counter, counter_hz);
> - if (ret)
> - pr_debug("timer: could not register clocksource: %d\n", ret);
> + clocksource_register_hz(&counter, counter_hz);
>
> /* setup COMPARE clockevent */
> comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift);
> diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
> index cb0a484..df3bb08 100644
> --- a/arch/blackfin/kernel/time-ts.c
> +++ b/arch/blackfin/kernel/time-ts.c
> @@ -51,8 +51,7 @@ static inline unsigned long long bfin_cs_cycles_sched_clock(void)
>
> static int __init bfin_cs_cycles_init(void)
> {
> - if (clocksource_register_hz(&bfin_cs_cycles, get_cclk()))
> - panic("failed to register clocksource");
> + clocksource_register_hz(&bfin_cs_cycles, get_cclk());
>
> return 0;
> }
> @@ -103,8 +102,7 @@ static int __init bfin_cs_gptimer0_init(void)
> {
> setup_gptimer0();
>
> - if (clocksource_register_hz(&bfin_cs_gptimer0, get_sclk()))
> - panic("failed to register clocksource");
> + clocksource_register_hz(&bfin_cs_gptimer0, get_sclk());
>
> return 0;
> }
> diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c
> index 3e39b10..6a2417e 100644
> --- a/arch/microblaze/kernel/timer.c
> +++ b/arch/microblaze/kernel/timer.c
> @@ -208,8 +208,7 @@ static struct clocksource clocksource_microblaze = {
>
> static int __init xilinx_clocksource_init(void)
> {
> - if (clocksource_register_hz(&clocksource_microblaze, timer_clock_freq))
> - panic("failed to register clocksource");
> + clocksource_register_hz(&clocksource_microblaze, timer_clock_freq);
>
> /* stop timer1 */
> out_be32(timer_baseaddr + TCSR1,
> diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c
> index 5e430ce..041cdff 100644
> --- a/arch/mips/jz4740/time.c
> +++ b/arch/mips/jz4740/time.c
> @@ -105,7 +105,6 @@ static struct irqaction timer_irqaction = {
>
> void __init plat_time_init(void)
> {
> - int ret;
> uint32_t clk_rate;
> uint16_t ctrl;
>
> @@ -121,10 +120,7 @@ void __init plat_time_init(void)
>
> clockevents_register_device(&jz4740_clockevent);
>
> - ret = clocksource_register_hz(&jz4740_clocksource, clk_rate);
> -
> - if (ret)
> - printk(KERN_ERR "Failed to register clocksource: %d\n", ret);
> + clocksource_register_hz(&jz4740_clocksource, clk_rate);
>
> setup_irq(JZ4740_IRQ_TCU0, &timer_irqaction);
>
> diff --git a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
> index c639b9d..9fa6d99 100644
> --- a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
> +++ b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
> @@ -208,7 +208,8 @@ int __init init_mfgpt_clocksource(void)
> if (num_possible_cpus() > 1) /* MFGPT does not scale! */
> return 0;
>
> - return clocksource_register_hz(&clocksource_mfgpt, MFGPT_TICK_RATE);
> + clocksource_register_hz(&clocksource_mfgpt, MFGPT_TICK_RATE);
> + return 0;
> }
>
> arch_initcall(init_mfgpt_clocksource);
> diff --git a/arch/openrisc/kernel/time.c b/arch/openrisc/kernel/time.c
> index 7c52e94..3f789aa 100644
> --- a/arch/openrisc/kernel/time.c
> +++ b/arch/openrisc/kernel/time.c
> @@ -156,8 +156,7 @@ static struct clocksource openrisc_timer = {
>
> static int __init openrisc_timer_init(void)
> {
> - if (clocksource_register_hz(&openrisc_timer, cpuinfo.clock_frequency))
> - panic("failed to register clocksource");
> + clocksource_register_hz(&openrisc_timer, cpuinfo.clock_frequency);
>
> /* Enable the incrementer: 'continuous' mode with interrupt disabled */
> mtspr(SPR_TTMR, SPR_TTMR_CR);
> diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
> index b3b1441..27c0627 100644
> --- a/arch/powerpc/kernel/time.c
> +++ b/arch/powerpc/kernel/time.c
> @@ -788,11 +788,7 @@ static void __init clocksource_init(void)
> else
> clock = &clocksource_timebase;
>
> - if (clocksource_register_hz(clock, tb_ticks_per_sec)) {
> - printk(KERN_ERR "clocksource: %s is already registered\n",
> - clock->name);
> - return;
> - }
> + clocksource_register_hz(clock, tb_ticks_per_sec);
>
> printk(KERN_INFO "clocksource: %s mult[%x] shift[%d] registered\n",
> clock->name, clock->mult, clock->shift);
> diff --git a/arch/um/kernel/time.c b/arch/um/kernel/time.c
> index 117568d..2034b58 100644
> --- a/arch/um/kernel/time.c
> +++ b/arch/um/kernel/time.c
> @@ -92,11 +92,7 @@ static void __init setup_itimer(void)
> clockevent_delta2ns(60 * HZ, &itimer_clockevent);
> itimer_clockevent.min_delta_ns =
> clockevent_delta2ns(1, &itimer_clockevent);
> - err = clocksource_register_hz(&itimer_clocksource, USEC_PER_SEC);
> - if (err) {
> - printk(KERN_ERR "clocksource_register_hz returned %d\n", err);
> - return;
> - }
> + clocksource_register_hz(&itimer_clocksource, USEC_PER_SEC);
> clockevents_register_device(&itimer_clockevent);
> }
>
> diff --git a/arch/x86/platform/uv/uv_time.c b/arch/x86/platform/uv/uv_time.c
> index 5c86786..b963774 100644
> --- a/arch/x86/platform/uv/uv_time.c
> +++ b/arch/x86/platform/uv/uv_time.c
> @@ -379,15 +379,13 @@ static __init int uv_rtc_setup_clock(void)
> if (!is_uv_system())
> return -ENODEV;
>
> - rc = clocksource_register_hz(&clocksource_uv, sn_rtc_cycles_per_second);
> - if (rc)
> - printk(KERN_INFO "UV RTC clocksource failed rc %d\n", rc);
> - else
> - printk(KERN_INFO "UV RTC clocksource registered freq %lu MHz\n",
> - sn_rtc_cycles_per_second/(unsigned long)1E6);
> + clocksource_register_hz(&clocksource_uv, sn_rtc_cycles_per_second);
> +
> + pr_info("UV RTC clocksource registered freq %lu MHz\n",
> + sn_rtc_cycles_per_second/(unsigned long)1E6);
>
> - if (rc || !uv_rtc_evt_enable || x86_platform_ipi_callback)
> - return rc;
> + if (!uv_rtc_evt_enable || x86_platform_ipi_callback)
> + return 0;
>
> /* Setup and register clockevents */
> rc = uv_rtc_allocate_timers();
> diff --git a/drivers/clocksource/acpi_pm.c b/drivers/clocksource/acpi_pm.c
> index 6eab889..ab1dc63 100644
> --- a/drivers/clocksource/acpi_pm.c
> +++ b/drivers/clocksource/acpi_pm.c
> @@ -218,8 +218,9 @@ static int __init init_acpi_pm_clocksource(void)
> return -ENODEV;
> }
>
> - return clocksource_register_hz(&clocksource_acpi_pm,
> + clocksource_register_hz(&clocksource_acpi_pm,
> PMTMR_TICKS_PER_SEC);
> + return 0;
> }
>
> /* We use fs_initcall because we want the PCI fixups to have run
> diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c
> index 63f176d..b9b56ed 100644
> --- a/drivers/clocksource/cadence_ttc_timer.c
> +++ b/drivers/clocksource/cadence_ttc_timer.c
> @@ -301,11 +301,7 @@ static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base)
> __raw_writel(CNT_CNTRL_RESET,
> ttccs->ttc.base_addr + TTC_CNT_CNTRL_OFFSET);
>
> - err = clocksource_register_hz(&ttccs->cs, ttccs->ttc.freq / PRESCALE);
> - if (WARN_ON(err)) {
> - kfree(ttccs);
> - return;
> - }
> + clocksource_register_hz(&ttccs->cs, ttccs->ttc.freq / PRESCALE);
>
> ttc_sched_clock_val_reg = base + TTC_COUNT_VAL_OFFSET;
> sched_clock_register(ttc_sched_clock_read, 16, ttccs->ttc.freq / PRESCALE);
> diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
> index 62b0de6..98649c7 100644
> --- a/drivers/clocksource/exynos_mct.c
> +++ b/drivers/clocksource/exynos_mct.c
> @@ -193,9 +193,7 @@ struct clocksource mct_frc = {
> static void __init exynos4_clocksource_init(void)
> {
> exynos4_mct_frc_start(0, 0);
> -
> - if (clocksource_register_hz(&mct_frc, clk_rate))
> - panic("%s: can't register clocksource\n", mct_frc.name);
> + clocksource_register_hz(&mct_frc, clk_rate);
> }
>
> static void exynos4_mct_comp0_stop(void)
> diff --git a/drivers/clocksource/i8253.c b/drivers/clocksource/i8253.c
> index 14ee3ef..9c45f0a 100644
> --- a/drivers/clocksource/i8253.c
> +++ b/drivers/clocksource/i8253.c
> @@ -95,7 +95,8 @@ static struct clocksource i8253_cs = {
>
> int __init clocksource_i8253_init(void)
> {
> - return clocksource_register_hz(&i8253_cs, PIT_TICK_RATE);
> + clocksource_register_hz(&i8253_cs, PIT_TICK_RATE);
> + return 0;
> }
> #endif
>
> diff --git a/drivers/clocksource/mmio.c b/drivers/clocksource/mmio.c
> index c0e2512..6e0b530 100644
> --- a/drivers/clocksource/mmio.c
> +++ b/drivers/clocksource/mmio.c
> @@ -69,5 +69,6 @@ int __init clocksource_mmio_init(void __iomem *base, const char *name,
> cs->clksrc.mask = CLOCKSOURCE_MASK(bits);
> cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
>
> - return clocksource_register_hz(&cs->clksrc, hz);
> + clocksource_register_hz(&cs->clksrc, hz);
> + return 0;
> }
> diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
> index 5645cfc..c59292f 100644
> --- a/drivers/clocksource/samsung_pwm_timer.c
> +++ b/drivers/clocksource/samsung_pwm_timer.c
> @@ -340,7 +340,6 @@ static void __init samsung_clocksource_init(void)
> {
> unsigned long pclk;
> unsigned long clock_rate;
> - int ret;
>
> pclk = clk_get_rate(pwm.timerclk);
>
> @@ -361,9 +360,7 @@ static void __init samsung_clocksource_init(void)
> pwm.variant.bits, clock_rate);
>
> samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits);
> - ret = clocksource_register_hz(&samsung_clocksource, clock_rate);
> - if (ret)
> - panic("samsung_clocksource_timer: can't register clocksource\n");
> + clocksource_register_hz(&samsung_clocksource, clock_rate);
> }
>
> static void __init samsung_timer_resources(void)
> diff --git a/drivers/clocksource/scx200_hrt.c b/drivers/clocksource/scx200_hrt.c
> index 64f9e82..57bdc04 100644
> --- a/drivers/clocksource/scx200_hrt.c
> +++ b/drivers/clocksource/scx200_hrt.c
> @@ -83,7 +83,8 @@ static int __init init_hrt_clocksource(void)
>
> pr_info("enabling scx200 high-res timer (%s MHz +%d ppm)\n", mhz27 ? "27":"1", ppm);
>
> - return clocksource_register_hz(&cs_hrt, freq);
> + clocksource_register_hz(&cs_hrt, freq);
> + return 0;
> }
>
> module_init(init_hrt_clocksource);
> diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
> index 00fdd11..805245d 100644
> --- a/drivers/clocksource/tcb_clksrc.c
> +++ b/drivers/clocksource/tcb_clksrc.c
> @@ -340,9 +340,7 @@ static int __init tcb_clksrc_init(void)
> }
>
> /* and away we go! */
> - ret = clocksource_register_hz(&clksrc, divided_rate);
> - if (ret)
> - goto err_disable_t1;
> + clocksource_register_hz(&clksrc, divided_rate);
>
> /* channel 2: periodic and oneshot timer support */
> ret = setup_clkevents(tc, clk32k_divisor_idx);
> @@ -354,10 +352,6 @@ static int __init tcb_clksrc_init(void)
> err_unregister_clksrc:
> clocksource_unregister(&clksrc);
>
> -err_disable_t1:
> - if (!tc->tcb_config || tc->tcb_config->counter_width != 32)
> - clk_disable_unprepare(tc->clk[1]);
> -
> err_disable_t0:
> clk_disable_unprepare(t0_clk);
>
> diff --git a/drivers/clocksource/timer-marco.c b/drivers/clocksource/timer-marco.c
> index 09a17d9..ae78ce0 100644
> --- a/drivers/clocksource/timer-marco.c
> +++ b/drivers/clocksource/timer-marco.c
> @@ -283,7 +283,7 @@ static void __init sirfsoc_marco_timer_init(void)
> /* Clear all interrupts */
> writel_relaxed(0xFFFF, sirfsoc_timer_base + SIRFSOC_TIMER_INTR_STATUS);
>
> - BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
> + clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE);
>
> sirfsoc_clockevent_init();
> }
> diff --git a/drivers/clocksource/timer-prima2.c b/drivers/clocksource/timer-prima2.c
> index 8a492d3..c9cc307 100644
> --- a/drivers/clocksource/timer-prima2.c
> +++ b/drivers/clocksource/timer-prima2.c
> @@ -204,7 +204,7 @@ static void __init sirfsoc_prima2_timer_init(struct device_node *np)
> writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
> writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS);
>
> - BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
> + clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE);
>
> sched_clock_register(sirfsoc_read_sched_clock, 64, CLOCK_TICK_RATE);
>
> diff --git a/drivers/clocksource/vt8500_timer.c b/drivers/clocksource/vt8500_timer.c
> index 1098ed3..13f5fa4 100644
> --- a/drivers/clocksource/vt8500_timer.c
> +++ b/drivers/clocksource/vt8500_timer.c
> @@ -150,9 +150,7 @@ static void __init vt8500_timer_init(struct device_node *np)
> writel(0xf, regbase + TIMER_STATUS_VAL);
> writel(~0, regbase + TIMER_MATCH_VAL);
>
> - if (clocksource_register_hz(&clocksource, VT8500_TIMER_HZ))
> - pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n",
> - __func__, clocksource.name);
> + clocksource_register_hz(&clocksource, VT8500_TIMER_HZ);
>
> clockevent.cpumask = cpumask_of(0);
>
> diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
> index 67301a4..5a17c5e 100644
> --- a/include/linux/clocksource.h
> +++ b/include/linux/clocksource.h
> @@ -282,7 +282,7 @@ static inline s64 clocksource_cyc2ns(cycle_t cycles, u32 mult, u32 shift)
> }
>
>
> -extern int clocksource_register(struct clocksource*);
> +extern void clocksource_register(struct clocksource *);
> extern int clocksource_unregister(struct clocksource*);
> extern void clocksource_touch_watchdog(void);
> extern struct clocksource* clocksource_get_next(void);
> @@ -301,17 +301,17 @@ clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec);
> * Don't call __clocksource_register_scale directly, use
> * clocksource_register_hz/khz
> */
> -extern int
> +extern void
> __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq);
> extern void
> __clocksource_updatefreq_scale(struct clocksource *cs, u32 scale, u32 freq);
>
> -static inline int clocksource_register_hz(struct clocksource *cs, u32 hz)
> +static inline void clocksource_register_hz(struct clocksource *cs, u32 hz)
> {
> return __clocksource_register_scale(cs, 1, hz);
> }
>
> -static inline int clocksource_register_khz(struct clocksource *cs, u32 khz)
> +static inline void clocksource_register_khz(struct clocksource *cs, u32 khz)
> {
> return __clocksource_register_scale(cs, 1000, khz);
> }
> diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
> index 9951575..686ff72 100644
> --- a/kernel/time/clocksource.c
> +++ b/kernel/time/clocksource.c
> @@ -782,7 +782,7 @@ EXPORT_SYMBOL_GPL(__clocksource_updatefreq_scale);
> * This *SHOULD NOT* be called directly! Please use the
> * clocksource_register_hz() or clocksource_register_khz helper functions.
> */
> -int __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq)
> +void __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq)
> {
>
> /* Initialize mult/shift and max_idle_ns */
> @@ -794,7 +794,6 @@ int __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq)
> clocksource_enqueue_watchdog(cs);
> clocksource_select();
> mutex_unlock(&clocksource_mutex);
> - return 0;
> }
> EXPORT_SYMBOL_GPL(__clocksource_register_scale);
>
> @@ -804,7 +803,7 @@ EXPORT_SYMBOL_GPL(__clocksource_register_scale);
> * @cs: clocksource to be registered
> *
> */
> -int clocksource_register(struct clocksource *cs)
> +void clocksource_register(struct clocksource *cs)
> {
> /* calculate max adjustment for given mult/shift */
> cs->maxadj = clocksource_max_adjustment(cs);
> @@ -820,7 +819,6 @@ int clocksource_register(struct clocksource *cs)
> clocksource_enqueue_watchdog(cs);
> clocksource_select();
> mutex_unlock(&clocksource_mutex);
> - return 0;
> }
> EXPORT_SYMBOL(clocksource_register);
>
> diff --git a/kernel/time/jiffies.c b/kernel/time/jiffies.c
> index 7a925ba..ae4c534 100644
> --- a/kernel/time/jiffies.c
> +++ b/kernel/time/jiffies.c
> @@ -88,7 +88,8 @@ EXPORT_SYMBOL(jiffies);
>
> static int __init init_jiffies_clocksource(void)
> {
> - return clocksource_register(&clocksource_jiffies);
> + clocksource_register(&clocksource_jiffies);
> + return 0;
> }
>
> core_initcall(init_jiffies_clocksource);
>
--
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^ permalink raw reply
* [PATCH] vt8500: pinctrl: Change devicetree data parsing
From: Linus Walleij @ 2014-01-23 8:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390458701-30238-1-git-send-email-linux@prisktech.co.nz>
On Thu, Jan 23, 2014 at 7:31 AM, Tony Prisk <linux@prisktech.co.nz> wrote:
> Due to an assumption in the VT8500 pinctrl driver, the value passed
> from devicetree for 'wm,pull' was not explicitly translated before
> being passed to pinconf.
>
> With changes to 'enum pin_config_param', PIN_CONFIG_BIAS_PULL_(UP/DOWN)
> no longer map 1-to-1 with the expected values in devicetree.
>
> This patch adds a small translation between the devicetree values (0..2)
> and the enum pin_config_param equivalent values.
>
> Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Isn't this a regression fix for stable?
> + switch (pull) {
> + case 0:
> + pull = PIN_CONFIG_BIAS_DISABLE;
> + break;
> + case 1:
> + pull = PIN_CONFIG_BIAS_PULL_DOWN;
> + break;
> + case 2:
> + pull = PIN_CONFIG_BIAS_PULL_UP;
> + break;
> + }
> configs[0] = pull;
1. You're not adding a default: clause (I bet the static checkers will
warn about this!)
2. Please conjure a different variable name for the thing that
actually gets set in the config so we see we are mapping one
thing to another and not just altering an existing variable.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v2] vt8500: pinctrl: Change devicetree data parsing
From: Tony Prisk @ 2014-01-23 8:55 UTC (permalink / raw)
To: linux-arm-kernel
Due to an assumption in the VT8500 pinctrl driver, the value passed
from devicetree for 'wm,pull' was not explicitly translated before
being passed to pinconf.
Since v3.10, changes to 'enum pin_config_param', PIN_CONFIG_BIAS_PULL_(UP/DOWN)
no longer map 1-to-1 with the expected values in devicetree.
This patch adds a small translation between the devicetree values (0..2)
and the enum pin_config_param equivalent values.
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
---
v2:
Minor change in commit message to indicate time since problem occurred.
Change assigned variable to configs[0] rather than reassigning to pull.
Add a default case to the switch to prevent static checker errors.
drivers/pinctrl/vt8500/pinctrl-wmt.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/vt8500/pinctrl-wmt.c b/drivers/pinctrl/vt8500/pinctrl-wmt.c
index 39aec08..25ab2ee 100644
--- a/drivers/pinctrl/vt8500/pinctrl-wmt.c
+++ b/drivers/pinctrl/vt8500/pinctrl-wmt.c
@@ -276,7 +276,20 @@ static int wmt_pctl_dt_node_to_map_pull(struct wmt_pinctrl_data *data,
if (!configs)
return -ENOMEM;
- configs[0] = pull;
+ switch (pull) {
+ case 0:
+ configs[0] = PIN_CONFIG_BIAS_DISABLE;
+ break;
+ case 1:
+ configs[0] = PIN_CONFIG_BIAS_PULL_DOWN;
+ break;
+ case 2:
+ configs[0] = PIN_CONFIG_BIAS_PULL_UP;
+ break;
+ default:
+ configs[0] = PIN_CONFIG_BIAS_DISABLE;
+ dev_err(data->dev, "invalid pull state %d - disabling\n", pull);
+ }
map->type = PIN_MAP_TYPE_CONFIGS_PIN;
map->data.configs.group_or_pin = data->groups[group];
--
1.7.9.5
^ permalink raw reply related
* [PATCH v2 RESEND] vt8500: pinctrl: Change devicetree data parsing
From: Tony Prisk @ 2014-01-23 8:57 UTC (permalink / raw)
To: linux-arm-kernel
Due to an assumption in the VT8500 pinctrl driver, the value passed
from devicetree for 'wm,pull' was not explicitly translated before
being passed to pinconf.
Since v3.10, changes to 'enum pin_config_param', PIN_CONFIG_BIAS_PULL_(UP/DOWN)
no longer map 1-to-1 with the expected values in devicetree.
This patch adds a small translation between the devicetree values (0..2)
and the enum pin_config_param equivalent values.
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
---
v2:
Minor change in commit message to indicate time since problem occurred.
Change assigned variable to configs[0] rather than reassigning to pull.
Add a default case to the switch to prevent static checker errors.
v2 resend:
Correct Linus' email address
drivers/pinctrl/vt8500/pinctrl-wmt.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/vt8500/pinctrl-wmt.c b/drivers/pinctrl/vt8500/pinctrl-wmt.c
index 39aec08..25ab2ee 100644
--- a/drivers/pinctrl/vt8500/pinctrl-wmt.c
+++ b/drivers/pinctrl/vt8500/pinctrl-wmt.c
@@ -276,7 +276,20 @@ static int wmt_pctl_dt_node_to_map_pull(struct wmt_pinctrl_data *data,
if (!configs)
return -ENOMEM;
- configs[0] = pull;
+ switch (pull) {
+ case 0:
+ configs[0] = PIN_CONFIG_BIAS_DISABLE;
+ break;
+ case 1:
+ configs[0] = PIN_CONFIG_BIAS_PULL_DOWN;
+ break;
+ case 2:
+ configs[0] = PIN_CONFIG_BIAS_PULL_UP;
+ break;
+ default:
+ configs[0] = PIN_CONFIG_BIAS_DISABLE;
+ dev_err(data->dev, "invalid pull state %d - disabling\n", pull);
+ }
map->type = PIN_MAP_TYPE_CONFIGS_PIN;
map->data.configs.group_or_pin = data->groups[group];
--
1.7.9.5
^ permalink raw reply related
* [PATCH v3 7/7] ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
From: Michal Simek @ 2014-01-23 8:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201401171804.30572.arnd@arndb.de>
On 01/17/2014 06:04 PM, Arnd Bergmann wrote:
> On Thursday 16 January 2014, Mark Brown wrote:
>> On Thu, Jan 16, 2014 at 12:19:00PM +0100, Arnd Bergmann wrote:
>>
>>> 1. Other platforms also require the syscon driver to be active before
>>> the regular device driver probing starts. Michal Simek has the same
>>> issue in the zynq clock driver that you have for SMP initialization.
>>> We have talked about this with Mark Brown already, and I think we will
>>> find a solution for this in the end, but it's not as straightforward
>>> as I first hoped. We can probably use help in this area.
>>
>> I thought the solution with deferring registration of the resource for
>> dev_get_regmap() until a proper device materialised seemed simple and
>> enough, did you folks run into any problems with that? I had assumed a
>> patch was likely to materialise so wasn't worrying about it myself.
>
> I'm still hoping that Michal will do that patch.
And what was the resolution/recommendation how to do it?
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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^ permalink raw reply
* [PATCH] vt8500: pinctrl: Change devicetree data parsing
From: Tony Prisk @ 2014-01-23 9:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdaFJphJdf6hyKoYEZ_wXikwRiwzMgtL=hY+3B8WrBnQaw@mail.gmail.com>
On 23/01/14 21:43, Linus Walleij wrote:
> On Thu, Jan 23, 2014 at 7:31 AM, Tony Prisk <linux@prisktech.co.nz> wrote:
>
>> Due to an assumption in the VT8500 pinctrl driver, the value passed
>> from devicetree for 'wm,pull' was not explicitly translated before
>> being passed to pinconf.
>>
>> With changes to 'enum pin_config_param', PIN_CONFIG_BIAS_PULL_(UP/DOWN)
>> no longer map 1-to-1 with the expected values in devicetree.
>>
>> This patch adds a small translation between the devicetree values (0..2)
>> and the enum pin_config_param equivalent values.
>>
>> Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
> Isn't this a regression fix for stable?
>
I wasn't sure how to handle this since it's been a problem since 3.10
but no one has mentioned it (or patched it).
I assume this is because:
a) pinctrl is only used for I2C in mainline - and there is no mainline
I2C consumer device drivers for the WonderMedia devices
b) most users are using the non-mainline kernel which has more support
(as nasty as some of it is).
Regards
Tony Prisk
^ permalink raw reply
* [PATCH 2/2] clocksource: Make clocksource register functions void
From: Yijing Wang @ 2014-01-23 9:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52E0D575.5050702@linaro.org>
On 2014/1/23 16:40, Daniel Lezcano wrote:
> On 01/23/2014 08:12 AM, Yijing Wang wrote:
>> Currently, clocksource_register() and __clocksource_register_scale()
>> functions always return 0, it's pointless, make functions void.
>> And remove the dead code that check the clocksource_register_hz()
>> return value.
>>
>> Signed-off-by: Yijing Wang <wangyijing@huawei.com>
>
> Well, do we really want to change all these files to not take care of a return value ? What about is we have to check it again later ?
>
> I would recommend to investigate __clocksource_register_scale and the underneath functions if there is not an error to be returned in the call stack somewhere which is ignored today.
>
> The same applies for clocksource_register.
Hi Daniel, thanks for your comment, all functions type under __clocksource_register_scale() are void.
This just is trivial cleanup patch, I don't know whether we will check these function return value again later.
If there is some possibility to check it again, I agree to keep them. Of course, this is all determined by Thomas.
Thanks!
Yijing.
>
>> ---
>> arch/arm/mach-davinci/time.c | 5 ++---
>> arch/arm/mach-msm/timer.c | 4 +---
>> arch/arm/mach-omap2/timer.c | 8 +++-----
>> arch/avr32/kernel/time.c | 4 +---
>> arch/blackfin/kernel/time-ts.c | 6 ++----
>> arch/microblaze/kernel/timer.c | 3 +--
>> arch/mips/jz4740/time.c | 6 +-----
>> arch/mips/loongson/common/cs5536/cs5536_mfgpt.c | 3 ++-
>> arch/openrisc/kernel/time.c | 3 +--
>> arch/powerpc/kernel/time.c | 6 +-----
>> arch/um/kernel/time.c | 6 +-----
>> arch/x86/platform/uv/uv_time.c | 14 ++++++--------
>> drivers/clocksource/acpi_pm.c | 3 ++-
>> drivers/clocksource/cadence_ttc_timer.c | 6 +-----
>> drivers/clocksource/exynos_mct.c | 4 +---
>> drivers/clocksource/i8253.c | 3 ++-
>> drivers/clocksource/mmio.c | 3 ++-
>> drivers/clocksource/samsung_pwm_timer.c | 5 +----
>> drivers/clocksource/scx200_hrt.c | 3 ++-
>> drivers/clocksource/tcb_clksrc.c | 8 +-------
>> drivers/clocksource/timer-marco.c | 2 +-
>> drivers/clocksource/timer-prima2.c | 2 +-
>> drivers/clocksource/vt8500_timer.c | 4 +---
>> include/linux/clocksource.h | 8 ++++----
>> kernel/time/clocksource.c | 6 ++----
>> kernel/time/jiffies.c | 3 ++-
>> 26 files changed, 45 insertions(+), 83 deletions(-)
>>
>> diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
>> index 56c6eb5..9536f85 100644
>> --- a/arch/arm/mach-davinci/time.c
>> +++ b/arch/arm/mach-davinci/time.c
>> @@ -387,9 +387,8 @@ void __init davinci_timer_init(void)
>>
>> /* setup clocksource */
>> clocksource_davinci.name = id_to_name[clocksource_id];
>> - if (clocksource_register_hz(&clocksource_davinci,
>> - davinci_clock_tick_rate))
>> - printk(err, clocksource_davinci.name);
>> + clocksource_register_hz(&clocksource_davinci,
>> + davinci_clock_tick_rate);
>>
>> setup_sched_clock(davinci_read_sched_clock, 32,
>> davinci_clock_tick_rate);
>> diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
>> index 1e9c338..c96e034 100644
>> --- a/arch/arm/mach-msm/timer.c
>> +++ b/arch/arm/mach-msm/timer.c
>> @@ -226,9 +226,7 @@ static void __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq,
>>
>> err:
>> writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE);
>> - res = clocksource_register_hz(cs, dgt_hz);
>> - if (res)
>> - pr_err("clocksource_register failed\n");
>> + clocksource_register_hz(cs, dgt_hz);
>> setup_sched_clock(msm_sched_clock_read, sched_bits, dgt_hz);
>> }
>>
>> diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
>> index 3ca81e0..beaf7c7 100644
>> --- a/arch/arm/mach-omap2/timer.c
>> +++ b/arch/arm/mach-omap2/timer.c
>> @@ -473,11 +473,9 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
>> OMAP_TIMER_NONPOSTED);
>> setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
>>
>> - if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
>> - pr_err("Could not register clocksource %s\n",
>> - clocksource_gpt.name);
>> - else
>> - pr_info("OMAP clocksource: %s at %lu Hz\n",
>> + clocksource_register_hz(&clocksource_gpt, clksrc.rate);
>> +
>> + pr_info("OMAP clocksource: %s at %lu Hz\n",
>> clocksource_gpt.name, clksrc.rate);
>> }
>>
>> diff --git a/arch/avr32/kernel/time.c b/arch/avr32/kernel/time.c
>> index d0f771b..51b4a66 100644
>> --- a/arch/avr32/kernel/time.c
>> +++ b/arch/avr32/kernel/time.c
>> @@ -134,9 +134,7 @@ void __init time_init(void)
>>
>> /* figure rate for counter */
>> counter_hz = clk_get_rate(boot_cpu_data.clk);
>> - ret = clocksource_register_hz(&counter, counter_hz);
>> - if (ret)
>> - pr_debug("timer: could not register clocksource: %d\n", ret);
>> + clocksource_register_hz(&counter, counter_hz);
>>
>> /* setup COMPARE clockevent */
>> comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift);
>> diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
>> index cb0a484..df3bb08 100644
>> --- a/arch/blackfin/kernel/time-ts.c
>> +++ b/arch/blackfin/kernel/time-ts.c
>> @@ -51,8 +51,7 @@ static inline unsigned long long bfin_cs_cycles_sched_clock(void)
>>
>> static int __init bfin_cs_cycles_init(void)
>> {
>> - if (clocksource_register_hz(&bfin_cs_cycles, get_cclk()))
>> - panic("failed to register clocksource");
>> + clocksource_register_hz(&bfin_cs_cycles, get_cclk());
>>
>> return 0;
>> }
>> @@ -103,8 +102,7 @@ static int __init bfin_cs_gptimer0_init(void)
>> {
>> setup_gptimer0();
>>
>> - if (clocksource_register_hz(&bfin_cs_gptimer0, get_sclk()))
>> - panic("failed to register clocksource");
>> + clocksource_register_hz(&bfin_cs_gptimer0, get_sclk());
>>
>> return 0;
>> }
>> diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c
>> index 3e39b10..6a2417e 100644
>> --- a/arch/microblaze/kernel/timer.c
>> +++ b/arch/microblaze/kernel/timer.c
>> @@ -208,8 +208,7 @@ static struct clocksource clocksource_microblaze = {
>>
>> static int __init xilinx_clocksource_init(void)
>> {
>> - if (clocksource_register_hz(&clocksource_microblaze, timer_clock_freq))
>> - panic("failed to register clocksource");
>> + clocksource_register_hz(&clocksource_microblaze, timer_clock_freq);
>>
>> /* stop timer1 */
>> out_be32(timer_baseaddr + TCSR1,
>> diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c
>> index 5e430ce..041cdff 100644
>> --- a/arch/mips/jz4740/time.c
>> +++ b/arch/mips/jz4740/time.c
>> @@ -105,7 +105,6 @@ static struct irqaction timer_irqaction = {
>>
>> void __init plat_time_init(void)
>> {
>> - int ret;
>> uint32_t clk_rate;
>> uint16_t ctrl;
>>
>> @@ -121,10 +120,7 @@ void __init plat_time_init(void)
>>
>> clockevents_register_device(&jz4740_clockevent);
>>
>> - ret = clocksource_register_hz(&jz4740_clocksource, clk_rate);
>> -
>> - if (ret)
>> - printk(KERN_ERR "Failed to register clocksource: %d\n", ret);
>> + clocksource_register_hz(&jz4740_clocksource, clk_rate);
>>
>> setup_irq(JZ4740_IRQ_TCU0, &timer_irqaction);
>>
>> diff --git a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
>> index c639b9d..9fa6d99 100644
>> --- a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
>> +++ b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
>> @@ -208,7 +208,8 @@ int __init init_mfgpt_clocksource(void)
>> if (num_possible_cpus() > 1) /* MFGPT does not scale! */
>> return 0;
>>
>> - return clocksource_register_hz(&clocksource_mfgpt, MFGPT_TICK_RATE);
>> + clocksource_register_hz(&clocksource_mfgpt, MFGPT_TICK_RATE);
>> + return 0;
>> }
>>
>> arch_initcall(init_mfgpt_clocksource);
>> diff --git a/arch/openrisc/kernel/time.c b/arch/openrisc/kernel/time.c
>> index 7c52e94..3f789aa 100644
>> --- a/arch/openrisc/kernel/time.c
>> +++ b/arch/openrisc/kernel/time.c
>> @@ -156,8 +156,7 @@ static struct clocksource openrisc_timer = {
>>
>> static int __init openrisc_timer_init(void)
>> {
>> - if (clocksource_register_hz(&openrisc_timer, cpuinfo.clock_frequency))
>> - panic("failed to register clocksource");
>> + clocksource_register_hz(&openrisc_timer, cpuinfo.clock_frequency);
>>
>> /* Enable the incrementer: 'continuous' mode with interrupt disabled */
>> mtspr(SPR_TTMR, SPR_TTMR_CR);
>> diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
>> index b3b1441..27c0627 100644
>> --- a/arch/powerpc/kernel/time.c
>> +++ b/arch/powerpc/kernel/time.c
>> @@ -788,11 +788,7 @@ static void __init clocksource_init(void)
>> else
>> clock = &clocksource_timebase;
>>
>> - if (clocksource_register_hz(clock, tb_ticks_per_sec)) {
>> - printk(KERN_ERR "clocksource: %s is already registered\n",
>> - clock->name);
>> - return;
>> - }
>> + clocksource_register_hz(clock, tb_ticks_per_sec);
>>
>> printk(KERN_INFO "clocksource: %s mult[%x] shift[%d] registered\n",
>> clock->name, clock->mult, clock->shift);
>> diff --git a/arch/um/kernel/time.c b/arch/um/kernel/time.c
>> index 117568d..2034b58 100644
>> --- a/arch/um/kernel/time.c
>> +++ b/arch/um/kernel/time.c
>> @@ -92,11 +92,7 @@ static void __init setup_itimer(void)
>> clockevent_delta2ns(60 * HZ, &itimer_clockevent);
>> itimer_clockevent.min_delta_ns =
>> clockevent_delta2ns(1, &itimer_clockevent);
>> - err = clocksource_register_hz(&itimer_clocksource, USEC_PER_SEC);
>> - if (err) {
>> - printk(KERN_ERR "clocksource_register_hz returned %d\n", err);
>> - return;
>> - }
>> + clocksource_register_hz(&itimer_clocksource, USEC_PER_SEC);
>> clockevents_register_device(&itimer_clockevent);
>> }
>>
>> diff --git a/arch/x86/platform/uv/uv_time.c b/arch/x86/platform/uv/uv_time.c
>> index 5c86786..b963774 100644
>> --- a/arch/x86/platform/uv/uv_time.c
>> +++ b/arch/x86/platform/uv/uv_time.c
>> @@ -379,15 +379,13 @@ static __init int uv_rtc_setup_clock(void)
>> if (!is_uv_system())
>> return -ENODEV;
>>
>> - rc = clocksource_register_hz(&clocksource_uv, sn_rtc_cycles_per_second);
>> - if (rc)
>> - printk(KERN_INFO "UV RTC clocksource failed rc %d\n", rc);
>> - else
>> - printk(KERN_INFO "UV RTC clocksource registered freq %lu MHz\n",
>> - sn_rtc_cycles_per_second/(unsigned long)1E6);
>> + clocksource_register_hz(&clocksource_uv, sn_rtc_cycles_per_second);
>> +
>> + pr_info("UV RTC clocksource registered freq %lu MHz\n",
>> + sn_rtc_cycles_per_second/(unsigned long)1E6);
>>
>> - if (rc || !uv_rtc_evt_enable || x86_platform_ipi_callback)
>> - return rc;
>> + if (!uv_rtc_evt_enable || x86_platform_ipi_callback)
>> + return 0;
>>
>> /* Setup and register clockevents */
>> rc = uv_rtc_allocate_timers();
>> diff --git a/drivers/clocksource/acpi_pm.c b/drivers/clocksource/acpi_pm.c
>> index 6eab889..ab1dc63 100644
>> --- a/drivers/clocksource/acpi_pm.c
>> +++ b/drivers/clocksource/acpi_pm.c
>> @@ -218,8 +218,9 @@ static int __init init_acpi_pm_clocksource(void)
>> return -ENODEV;
>> }
>>
>> - return clocksource_register_hz(&clocksource_acpi_pm,
>> + clocksource_register_hz(&clocksource_acpi_pm,
>> PMTMR_TICKS_PER_SEC);
>> + return 0;
>> }
>>
>> /* We use fs_initcall because we want the PCI fixups to have run
>> diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c
>> index 63f176d..b9b56ed 100644
>> --- a/drivers/clocksource/cadence_ttc_timer.c
>> +++ b/drivers/clocksource/cadence_ttc_timer.c
>> @@ -301,11 +301,7 @@ static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base)
>> __raw_writel(CNT_CNTRL_RESET,
>> ttccs->ttc.base_addr + TTC_CNT_CNTRL_OFFSET);
>>
>> - err = clocksource_register_hz(&ttccs->cs, ttccs->ttc.freq / PRESCALE);
>> - if (WARN_ON(err)) {
>> - kfree(ttccs);
>> - return;
>> - }
>> + clocksource_register_hz(&ttccs->cs, ttccs->ttc.freq / PRESCALE);
>>
>> ttc_sched_clock_val_reg = base + TTC_COUNT_VAL_OFFSET;
>> sched_clock_register(ttc_sched_clock_read, 16, ttccs->ttc.freq / PRESCALE);
>> diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
>> index 62b0de6..98649c7 100644
>> --- a/drivers/clocksource/exynos_mct.c
>> +++ b/drivers/clocksource/exynos_mct.c
>> @@ -193,9 +193,7 @@ struct clocksource mct_frc = {
>> static void __init exynos4_clocksource_init(void)
>> {
>> exynos4_mct_frc_start(0, 0);
>> -
>> - if (clocksource_register_hz(&mct_frc, clk_rate))
>> - panic("%s: can't register clocksource\n", mct_frc.name);
>> + clocksource_register_hz(&mct_frc, clk_rate);
>> }
>>
>> static void exynos4_mct_comp0_stop(void)
>> diff --git a/drivers/clocksource/i8253.c b/drivers/clocksource/i8253.c
>> index 14ee3ef..9c45f0a 100644
>> --- a/drivers/clocksource/i8253.c
>> +++ b/drivers/clocksource/i8253.c
>> @@ -95,7 +95,8 @@ static struct clocksource i8253_cs = {
>>
>> int __init clocksource_i8253_init(void)
>> {
>> - return clocksource_register_hz(&i8253_cs, PIT_TICK_RATE);
>> + clocksource_register_hz(&i8253_cs, PIT_TICK_RATE);
>> + return 0;
>> }
>> #endif
>>
>> diff --git a/drivers/clocksource/mmio.c b/drivers/clocksource/mmio.c
>> index c0e2512..6e0b530 100644
>> --- a/drivers/clocksource/mmio.c
>> +++ b/drivers/clocksource/mmio.c
>> @@ -69,5 +69,6 @@ int __init clocksource_mmio_init(void __iomem *base, const char *name,
>> cs->clksrc.mask = CLOCKSOURCE_MASK(bits);
>> cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
>>
>> - return clocksource_register_hz(&cs->clksrc, hz);
>> + clocksource_register_hz(&cs->clksrc, hz);
>> + return 0;
>> }
>> diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
>> index 5645cfc..c59292f 100644
>> --- a/drivers/clocksource/samsung_pwm_timer.c
>> +++ b/drivers/clocksource/samsung_pwm_timer.c
>> @@ -340,7 +340,6 @@ static void __init samsung_clocksource_init(void)
>> {
>> unsigned long pclk;
>> unsigned long clock_rate;
>> - int ret;
>>
>> pclk = clk_get_rate(pwm.timerclk);
>>
>> @@ -361,9 +360,7 @@ static void __init samsung_clocksource_init(void)
>> pwm.variant.bits, clock_rate);
>>
>> samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits);
>> - ret = clocksource_register_hz(&samsung_clocksource, clock_rate);
>> - if (ret)
>> - panic("samsung_clocksource_timer: can't register clocksource\n");
>> + clocksource_register_hz(&samsung_clocksource, clock_rate);
>> }
>>
>> static void __init samsung_timer_resources(void)
>> diff --git a/drivers/clocksource/scx200_hrt.c b/drivers/clocksource/scx200_hrt.c
>> index 64f9e82..57bdc04 100644
>> --- a/drivers/clocksource/scx200_hrt.c
>> +++ b/drivers/clocksource/scx200_hrt.c
>> @@ -83,7 +83,8 @@ static int __init init_hrt_clocksource(void)
>>
>> pr_info("enabling scx200 high-res timer (%s MHz +%d ppm)\n", mhz27 ? "27":"1", ppm);
>>
>> - return clocksource_register_hz(&cs_hrt, freq);
>> + clocksource_register_hz(&cs_hrt, freq);
>> + return 0;
>> }
>>
>> module_init(init_hrt_clocksource);
>> diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
>> index 00fdd11..805245d 100644
>> --- a/drivers/clocksource/tcb_clksrc.c
>> +++ b/drivers/clocksource/tcb_clksrc.c
>> @@ -340,9 +340,7 @@ static int __init tcb_clksrc_init(void)
>> }
>>
>> /* and away we go! */
>> - ret = clocksource_register_hz(&clksrc, divided_rate);
>> - if (ret)
>> - goto err_disable_t1;
>> + clocksource_register_hz(&clksrc, divided_rate);
>>
>> /* channel 2: periodic and oneshot timer support */
>> ret = setup_clkevents(tc, clk32k_divisor_idx);
>> @@ -354,10 +352,6 @@ static int __init tcb_clksrc_init(void)
>> err_unregister_clksrc:
>> clocksource_unregister(&clksrc);
>>
>> -err_disable_t1:
>> - if (!tc->tcb_config || tc->tcb_config->counter_width != 32)
>> - clk_disable_unprepare(tc->clk[1]);
>> -
>> err_disable_t0:
>> clk_disable_unprepare(t0_clk);
>>
>> diff --git a/drivers/clocksource/timer-marco.c b/drivers/clocksource/timer-marco.c
>> index 09a17d9..ae78ce0 100644
>> --- a/drivers/clocksource/timer-marco.c
>> +++ b/drivers/clocksource/timer-marco.c
>> @@ -283,7 +283,7 @@ static void __init sirfsoc_marco_timer_init(void)
>> /* Clear all interrupts */
>> writel_relaxed(0xFFFF, sirfsoc_timer_base + SIRFSOC_TIMER_INTR_STATUS);
>>
>> - BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
>> + clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE);
>>
>> sirfsoc_clockevent_init();
>> }
>> diff --git a/drivers/clocksource/timer-prima2.c b/drivers/clocksource/timer-prima2.c
>> index 8a492d3..c9cc307 100644
>> --- a/drivers/clocksource/timer-prima2.c
>> +++ b/drivers/clocksource/timer-prima2.c
>> @@ -204,7 +204,7 @@ static void __init sirfsoc_prima2_timer_init(struct device_node *np)
>> writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
>> writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS);
>>
>> - BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
>> + clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE);
>>
>> sched_clock_register(sirfsoc_read_sched_clock, 64, CLOCK_TICK_RATE);
>>
>> diff --git a/drivers/clocksource/vt8500_timer.c b/drivers/clocksource/vt8500_timer.c
>> index 1098ed3..13f5fa4 100644
>> --- a/drivers/clocksource/vt8500_timer.c
>> +++ b/drivers/clocksource/vt8500_timer.c
>> @@ -150,9 +150,7 @@ static void __init vt8500_timer_init(struct device_node *np)
>> writel(0xf, regbase + TIMER_STATUS_VAL);
>> writel(~0, regbase + TIMER_MATCH_VAL);
>>
>> - if (clocksource_register_hz(&clocksource, VT8500_TIMER_HZ))
>> - pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n",
>> - __func__, clocksource.name);
>> + clocksource_register_hz(&clocksource, VT8500_TIMER_HZ);
>>
>> clockevent.cpumask = cpumask_of(0);
>>
>> diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
>> index 67301a4..5a17c5e 100644
>> --- a/include/linux/clocksource.h
>> +++ b/include/linux/clocksource.h
>> @@ -282,7 +282,7 @@ static inline s64 clocksource_cyc2ns(cycle_t cycles, u32 mult, u32 shift)
>> }
>>
>>
>> -extern int clocksource_register(struct clocksource*);
>> +extern void clocksource_register(struct clocksource *);
>> extern int clocksource_unregister(struct clocksource*);
>> extern void clocksource_touch_watchdog(void);
>> extern struct clocksource* clocksource_get_next(void);
>> @@ -301,17 +301,17 @@ clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec);
>> * Don't call __clocksource_register_scale directly, use
>> * clocksource_register_hz/khz
>> */
>> -extern int
>> +extern void
>> __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq);
>> extern void
>> __clocksource_updatefreq_scale(struct clocksource *cs, u32 scale, u32 freq);
>>
>> -static inline int clocksource_register_hz(struct clocksource *cs, u32 hz)
>> +static inline void clocksource_register_hz(struct clocksource *cs, u32 hz)
>> {
>> return __clocksource_register_scale(cs, 1, hz);
>> }
>>
>> -static inline int clocksource_register_khz(struct clocksource *cs, u32 khz)
>> +static inline void clocksource_register_khz(struct clocksource *cs, u32 khz)
>> {
>> return __clocksource_register_scale(cs, 1000, khz);
>> }
>> diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
>> index 9951575..686ff72 100644
>> --- a/kernel/time/clocksource.c
>> +++ b/kernel/time/clocksource.c
>> @@ -782,7 +782,7 @@ EXPORT_SYMBOL_GPL(__clocksource_updatefreq_scale);
>> * This *SHOULD NOT* be called directly! Please use the
>> * clocksource_register_hz() or clocksource_register_khz helper functions.
>> */
>> -int __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq)
>> +void __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq)
>> {
>>
>> /* Initialize mult/shift and max_idle_ns */
>> @@ -794,7 +794,6 @@ int __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq)
>> clocksource_enqueue_watchdog(cs);
>> clocksource_select();
>> mutex_unlock(&clocksource_mutex);
>> - return 0;
>> }
>> EXPORT_SYMBOL_GPL(__clocksource_register_scale);
>>
>> @@ -804,7 +803,7 @@ EXPORT_SYMBOL_GPL(__clocksource_register_scale);
>> * @cs: clocksource to be registered
>> *
>> */
>> -int clocksource_register(struct clocksource *cs)
>> +void clocksource_register(struct clocksource *cs)
>> {
>> /* calculate max adjustment for given mult/shift */
>> cs->maxadj = clocksource_max_adjustment(cs);
>> @@ -820,7 +819,6 @@ int clocksource_register(struct clocksource *cs)
>> clocksource_enqueue_watchdog(cs);
>> clocksource_select();
>> mutex_unlock(&clocksource_mutex);
>> - return 0;
>> }
>> EXPORT_SYMBOL(clocksource_register);
>>
>> diff --git a/kernel/time/jiffies.c b/kernel/time/jiffies.c
>> index 7a925ba..ae4c534 100644
>> --- a/kernel/time/jiffies.c
>> +++ b/kernel/time/jiffies.c
>> @@ -88,7 +88,8 @@ EXPORT_SYMBOL(jiffies);
>>
>> static int __init init_jiffies_clocksource(void)
>> {
>> - return clocksource_register(&clocksource_jiffies);
>> + clocksource_register(&clocksource_jiffies);
>> + return 0;
>> }
>>
>> core_initcall(init_jiffies_clocksource);
>>
>
>
--
Thanks!
Yijing
^ permalink raw reply
* [PATCHv2 2/2] pwm: imx: support polarity inversion
From: Sascha Hauer @ 2014-01-23 9:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140123083714.3c6e86ae@ipc1.ka-ro>
I thinking more of the following. I haven't tested it, but it has a negative
diffstat, so it must be good ;)
Sascha
----------------------------------------------------------------
Sascha Hauer (2):
PWM: let of_xlate handlers check args count
PWM: handle additional flags in of_pwm_simple_xlate
drivers/pwm/core.c | 41 +++++++----------------------------------
drivers/pwm/pwm-atmel-tcb.c | 2 --
drivers/pwm/pwm-renesas-tpu.c | 2 --
drivers/pwm/pwm-samsung.c | 3 ---
drivers/pwm/pwm-tiecap.c | 2 --
drivers/pwm/pwm-tiehrpwm.c | 2 --
drivers/pwm/pwm-vt8500.c | 2 --
include/linux/pwm.h | 3 ---
8 files changed, 7 insertions(+), 50 deletions(-)
^ permalink raw reply
* [PATCH 1/2] PWM: let of_xlate handlers check args count
From: Sascha Hauer @ 2014-01-23 9:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390467898-9216-1-git-send-email-s.hauer@pengutronix.de>
of_pwm_n_cells for the of_xlate handler is stored in struct pwm_chip,
but it is only ever used by the of_xlate handler itsel. Remove
of_pwm_n_cells from struct pwm_chip and let the handler do the argument
count checking to simplify the code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/pwm/core.c | 15 +++------------
drivers/pwm/pwm-atmel-tcb.c | 1 -
drivers/pwm/pwm-renesas-tpu.c | 1 -
drivers/pwm/pwm-samsung.c | 1 -
drivers/pwm/pwm-tiecap.c | 1 -
drivers/pwm/pwm-tiehrpwm.c | 1 -
drivers/pwm/pwm-vt8500.c | 1 -
7 files changed, 3 insertions(+), 18 deletions(-)
diff --git a/drivers/pwm/core.c b/drivers/pwm/core.c
index 2ca9504..c882051 100644
--- a/drivers/pwm/core.c
+++ b/drivers/pwm/core.c
@@ -136,7 +136,7 @@ of_pwm_xlate_with_flags(struct pwm_chip *pc, const struct of_phandle_args *args)
{
struct pwm_device *pwm;
- if (pc->of_pwm_n_cells < 3)
+ if (args->args_count != 3)
return ERR_PTR(-EINVAL);
if (args->args[0] >= pc->npwm)
@@ -162,7 +162,7 @@ of_pwm_simple_xlate(struct pwm_chip *pc, const struct of_phandle_args *args)
{
struct pwm_device *pwm;
- if (pc->of_pwm_n_cells < 2)
+ if (args->args_count != 2)
return ERR_PTR(-EINVAL);
if (args->args[0] >= pc->npwm)
@@ -182,10 +182,8 @@ static void of_pwmchip_add(struct pwm_chip *chip)
if (!chip->dev || !chip->dev->of_node)
return;
- if (!chip->of_xlate) {
+ if (!chip->of_xlate)
chip->of_xlate = of_pwm_simple_xlate;
- chip->of_pwm_n_cells = 2;
- }
of_node_get(chip->dev->of_node);
}
@@ -536,13 +534,6 @@ struct pwm_device *of_pwm_get(struct device_node *np, const char *con_id)
goto put;
}
- if (args.args_count != pc->of_pwm_n_cells) {
- pr_debug("%s: wrong #pwm-cells for %s\n", np->full_name,
- args.np->full_name);
- pwm = ERR_PTR(-EINVAL);
- goto put;
- }
-
pwm = pc->of_xlate(pc, &args);
if (IS_ERR(pwm))
goto put;
diff --git a/drivers/pwm/pwm-atmel-tcb.c b/drivers/pwm/pwm-atmel-tcb.c
index f3dcd02..55fabf8 100644
--- a/drivers/pwm/pwm-atmel-tcb.c
+++ b/drivers/pwm/pwm-atmel-tcb.c
@@ -395,7 +395,6 @@ static int atmel_tcb_pwm_probe(struct platform_device *pdev)
tcbpwm->chip.dev = &pdev->dev;
tcbpwm->chip.ops = &atmel_tcb_pwm_ops;
tcbpwm->chip.of_xlate = of_pwm_xlate_with_flags;
- tcbpwm->chip.of_pwm_n_cells = 3;
tcbpwm->chip.base = -1;
tcbpwm->chip.npwm = NPWM;
tcbpwm->tc = tc;
diff --git a/drivers/pwm/pwm-renesas-tpu.c b/drivers/pwm/pwm-renesas-tpu.c
index aff6ba9..0a8adb6 100644
--- a/drivers/pwm/pwm-renesas-tpu.c
+++ b/drivers/pwm/pwm-renesas-tpu.c
@@ -434,7 +434,6 @@ static int tpu_probe(struct platform_device *pdev)
tpu->chip.dev = &pdev->dev;
tpu->chip.ops = &tpu_pwm_ops;
tpu->chip.of_xlate = of_pwm_xlate_with_flags;
- tpu->chip.of_pwm_n_cells = 3;
tpu->chip.base = -1;
tpu->chip.npwm = TPU_CHANNEL_MAX;
diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung.c
index b59639e..8d8dced 100644
--- a/drivers/pwm/pwm-samsung.c
+++ b/drivers/pwm/pwm-samsung.c
@@ -487,7 +487,6 @@ static int pwm_samsung_probe(struct platform_device *pdev)
return ret;
chip->chip.of_xlate = of_pwm_xlate_with_flags;
- chip->chip.of_pwm_n_cells = 3;
} else {
if (!pdev->dev.platform_data) {
dev_err(&pdev->dev, "no platform data specified\n");
diff --git a/drivers/pwm/pwm-tiecap.c b/drivers/pwm/pwm-tiecap.c
index 4e5c3d1..4d7a01a 100644
--- a/drivers/pwm/pwm-tiecap.c
+++ b/drivers/pwm/pwm-tiecap.c
@@ -229,7 +229,6 @@ static int ecap_pwm_probe(struct platform_device *pdev)
pc->chip.dev = &pdev->dev;
pc->chip.ops = &ecap_pwm_ops;
pc->chip.of_xlate = of_pwm_xlate_with_flags;
- pc->chip.of_pwm_n_cells = 3;
pc->chip.base = -1;
pc->chip.npwm = 1;
diff --git a/drivers/pwm/pwm-tiehrpwm.c b/drivers/pwm/pwm-tiehrpwm.c
index a4d8f51..2c2621a 100644
--- a/drivers/pwm/pwm-tiehrpwm.c
+++ b/drivers/pwm/pwm-tiehrpwm.c
@@ -460,7 +460,6 @@ static int ehrpwm_pwm_probe(struct platform_device *pdev)
pc->chip.dev = &pdev->dev;
pc->chip.ops = &ehrpwm_pwm_ops;
pc->chip.of_xlate = of_pwm_xlate_with_flags;
- pc->chip.of_pwm_n_cells = 3;
pc->chip.base = -1;
pc->chip.npwm = NUM_PWM_CHANNEL;
diff --git a/drivers/pwm/pwm-vt8500.c b/drivers/pwm/pwm-vt8500.c
index 323125a..5472051 100644
--- a/drivers/pwm/pwm-vt8500.c
+++ b/drivers/pwm/pwm-vt8500.c
@@ -219,7 +219,6 @@ static int vt8500_pwm_probe(struct platform_device *pdev)
chip->chip.dev = &pdev->dev;
chip->chip.ops = &vt8500_pwm_ops;
chip->chip.of_xlate = of_pwm_xlate_with_flags;
- chip->chip.of_pwm_n_cells = 3;
chip->chip.base = -1;
chip->chip.npwm = VT8500_NR_PWMS;
--
1.8.5.2
^ permalink raw reply related
* [PATCH 2/2] PWM: handle additional flags in of_pwm_simple_xlate
From: Sascha Hauer @ 2014-01-23 9:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390467898-9216-1-git-send-email-s.hauer@pengutronix.de>
Let of_pwm_simple_xlate behave like of_pwm_xlate_with_flags when
the argument count is 3. This makes of_pwm_xlate_with_flags unncessary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/pwm/core.c | 30 ++++++------------------------
drivers/pwm/pwm-atmel-tcb.c | 1 -
drivers/pwm/pwm-renesas-tpu.c | 1 -
drivers/pwm/pwm-samsung.c | 2 --
drivers/pwm/pwm-tiecap.c | 1 -
drivers/pwm/pwm-tiehrpwm.c | 1 -
drivers/pwm/pwm-vt8500.c | 1 -
include/linux/pwm.h | 3 ---
8 files changed, 6 insertions(+), 34 deletions(-)
diff --git a/drivers/pwm/core.c b/drivers/pwm/core.c
index c882051..329b1e5 100644
--- a/drivers/pwm/core.c
+++ b/drivers/pwm/core.c
@@ -131,12 +131,12 @@ static int pwm_device_request(struct pwm_device *pwm, const char *label)
return 0;
}
-struct pwm_device *
-of_pwm_xlate_with_flags(struct pwm_chip *pc, const struct of_phandle_args *args)
+static struct pwm_device *
+of_pwm_simple_xlate(struct pwm_chip *pc, const struct of_phandle_args *args)
{
struct pwm_device *pwm;
- if (args->args_count != 3)
+ if (args->args_count < 2)
return ERR_PTR(-EINVAL);
if (args->args[0] >= pc->npwm)
@@ -148,6 +148,9 @@ of_pwm_xlate_with_flags(struct pwm_chip *pc, const struct of_phandle_args *args)
pwm_set_period(pwm, args->args[1]);
+ if (args->args_count < 3)
+ return 0;
+
if (args->args[2] & PWM_POLARITY_INVERTED)
pwm_set_polarity(pwm, PWM_POLARITY_INVERSED);
else
@@ -155,27 +158,6 @@ of_pwm_xlate_with_flags(struct pwm_chip *pc, const struct of_phandle_args *args)
return pwm;
}
-EXPORT_SYMBOL_GPL(of_pwm_xlate_with_flags);
-
-static struct pwm_device *
-of_pwm_simple_xlate(struct pwm_chip *pc, const struct of_phandle_args *args)
-{
- struct pwm_device *pwm;
-
- if (args->args_count != 2)
- return ERR_PTR(-EINVAL);
-
- if (args->args[0] >= pc->npwm)
- return ERR_PTR(-EINVAL);
-
- pwm = pwm_request_from_chip(pc, args->args[0], NULL);
- if (IS_ERR(pwm))
- return pwm;
-
- pwm_set_period(pwm, args->args[1]);
-
- return pwm;
-}
static void of_pwmchip_add(struct pwm_chip *chip)
{
diff --git a/drivers/pwm/pwm-atmel-tcb.c b/drivers/pwm/pwm-atmel-tcb.c
index 55fabf8..e1e5a20 100644
--- a/drivers/pwm/pwm-atmel-tcb.c
+++ b/drivers/pwm/pwm-atmel-tcb.c
@@ -394,7 +394,6 @@ static int atmel_tcb_pwm_probe(struct platform_device *pdev)
tcbpwm->chip.dev = &pdev->dev;
tcbpwm->chip.ops = &atmel_tcb_pwm_ops;
- tcbpwm->chip.of_xlate = of_pwm_xlate_with_flags;
tcbpwm->chip.base = -1;
tcbpwm->chip.npwm = NPWM;
tcbpwm->tc = tc;
diff --git a/drivers/pwm/pwm-renesas-tpu.c b/drivers/pwm/pwm-renesas-tpu.c
index 0a8adb6..82dcab9 100644
--- a/drivers/pwm/pwm-renesas-tpu.c
+++ b/drivers/pwm/pwm-renesas-tpu.c
@@ -433,7 +433,6 @@ static int tpu_probe(struct platform_device *pdev)
tpu->chip.dev = &pdev->dev;
tpu->chip.ops = &tpu_pwm_ops;
- tpu->chip.of_xlate = of_pwm_xlate_with_flags;
tpu->chip.base = -1;
tpu->chip.npwm = TPU_CHANNEL_MAX;
diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung.c
index 8d8dced..465f9ee 100644
--- a/drivers/pwm/pwm-samsung.c
+++ b/drivers/pwm/pwm-samsung.c
@@ -485,8 +485,6 @@ static int pwm_samsung_probe(struct platform_device *pdev)
ret = pwm_samsung_parse_dt(chip);
if (ret)
return ret;
-
- chip->chip.of_xlate = of_pwm_xlate_with_flags;
} else {
if (!pdev->dev.platform_data) {
dev_err(&pdev->dev, "no platform data specified\n");
diff --git a/drivers/pwm/pwm-tiecap.c b/drivers/pwm/pwm-tiecap.c
index 4d7a01a..27cde03 100644
--- a/drivers/pwm/pwm-tiecap.c
+++ b/drivers/pwm/pwm-tiecap.c
@@ -228,7 +228,6 @@ static int ecap_pwm_probe(struct platform_device *pdev)
pc->chip.dev = &pdev->dev;
pc->chip.ops = &ecap_pwm_ops;
- pc->chip.of_xlate = of_pwm_xlate_with_flags;
pc->chip.base = -1;
pc->chip.npwm = 1;
diff --git a/drivers/pwm/pwm-tiehrpwm.c b/drivers/pwm/pwm-tiehrpwm.c
index 2c2621a..4e566df 100644
--- a/drivers/pwm/pwm-tiehrpwm.c
+++ b/drivers/pwm/pwm-tiehrpwm.c
@@ -459,7 +459,6 @@ static int ehrpwm_pwm_probe(struct platform_device *pdev)
pc->chip.dev = &pdev->dev;
pc->chip.ops = &ehrpwm_pwm_ops;
- pc->chip.of_xlate = of_pwm_xlate_with_flags;
pc->chip.base = -1;
pc->chip.npwm = NUM_PWM_CHANNEL;
diff --git a/drivers/pwm/pwm-vt8500.c b/drivers/pwm/pwm-vt8500.c
index 5472051..30def61 100644
--- a/drivers/pwm/pwm-vt8500.c
+++ b/drivers/pwm/pwm-vt8500.c
@@ -218,7 +218,6 @@ static int vt8500_pwm_probe(struct platform_device *pdev)
chip->chip.dev = &pdev->dev;
chip->chip.ops = &vt8500_pwm_ops;
- chip->chip.of_xlate = of_pwm_xlate_with_flags;
chip->chip.base = -1;
chip->chip.npwm = VT8500_NR_PWMS;
diff --git a/include/linux/pwm.h b/include/linux/pwm.h
index f0feafd..2447d6f 100644
--- a/include/linux/pwm.h
+++ b/include/linux/pwm.h
@@ -188,9 +188,6 @@ struct pwm_device *pwm_request_from_chip(struct pwm_chip *chip,
unsigned int index,
const char *label);
-struct pwm_device *of_pwm_xlate_with_flags(struct pwm_chip *pc,
- const struct of_phandle_args *args);
-
struct pwm_device *pwm_get(struct device *dev, const char *con_id);
struct pwm_device *of_pwm_get(struct device_node *np, const char *con_id);
void pwm_put(struct pwm_device *pwm);
--
1.8.5.2
^ permalink raw reply related
* [PATCH] ARM: davinci: defconfig: drop CONFIG_REGULATOR_DUMMY
From: Prabhakar Lad @ 2014-01-23 9:27 UTC (permalink / raw)
To: linux-arm-kernel
From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
This patch drops CONFIG_REGULATOR_DUMMY as this obsolete.
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
---
arch/arm/configs/da8xx_omapl_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/configs/da8xx_omapl_defconfig b/arch/arm/configs/da8xx_omapl_defconfig
index 1571bea..c78de86 100644
--- a/arch/arm/configs/da8xx_omapl_defconfig
+++ b/arch/arm/configs/da8xx_omapl_defconfig
@@ -89,7 +89,6 @@ CONFIG_PINCTRL_SINGLE=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_REGULATOR=y
-CONFIG_REGULATOR_DUMMY=y
CONFIG_REGULATOR_TPS6507X=y
CONFIG_FB=y
CONFIG_FB_DA8XX=y
--
1.7.9.5
^ permalink raw reply related
* [PATCH 1/6] arm64: Add macros to manage processor debug state
From: Will Deacon @ 2014-01-23 9:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CALicx6sax=SHv2NryhY5QSBtyv-_wbCpPR5hFt9gngD96yP0oQ@mail.gmail.com>
On Thu, Jan 23, 2014 at 04:46:36AM +0000, Vijay Kilari wrote:
> On Wed, Jan 22, 2014 at 11:01 PM, Will Deacon <will.deacon@arm.com> wrote:
> >> diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
> >> index 23586bd..774ad04 100644
> >> --- a/arch/arm64/kernel/debug-monitors.c
> >> +++ b/arch/arm64/kernel/debug-monitors.c
> >> @@ -51,7 +51,7 @@ u8 debug_monitors_arch(void)
> >> static void mdscr_write(u32 mdscr)
> >> {
> >> unsigned long flags;
> >> - local_dbg_save(flags);
> >> + flags = local_dbg_save();
> >
> > Why are you changing the API? This is now pointlessly different to irqs.
>
> To be in line with arch_local_irq_save & arch_local_save_flags in irqflags.h,
> I moved this macros into functions and accordingly changed the caller.
> I could not find any code using this local_dbg_{save, restore} except
> from debug-monitors.c file
>
> If required, I can think of renaming local_dbg_{save,restore} as
> local_dbg_{save,restore}_flags
No, I'd rather local_dbg_{save, restore} were aligned with local_irq_{save,
restore} (as defined in include/linux/irqflags.h).
Will
^ permalink raw reply
* [PATCH] [media] s5p-mfc: Add Horizontal and Vertical search range for Video Macro Blocks
From: Kamil Debski @ 2014-01-23 10:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1388400186-22045-1-git-send-email-amit.grover@samsung.com>
Hi Amit,
> From: Amit Grover [mailto:amit.grover at samsung.com]
> Sent: Monday, December 30, 2013 11:43 AM
>
> This patch adds Controls to set Horizontal and Vertical search range
> for Motion Estimation block for Samsung MFC video Encoders.
>
> Signed-off-by: Swami Nathan <swaminath.p@samsung.com>
> Signed-off-by: Amit Grover <amit.grover@samsung.com>
> ---
> Documentation/DocBook/media/v4l/controls.xml | 14 +++++++++++++
> drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 2 ++
> drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 24
> +++++++++++++++++++++++
> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 8 ++------
> drivers/media/v4l2-core/v4l2-ctrls.c | 14 +++++++++++++
> include/uapi/linux/v4l2-controls.h | 2 ++
> 6 files changed, 58 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/DocBook/media/v4l/controls.xml
> b/Documentation/DocBook/media/v4l/controls.xml
> index 7a3b49b..70a0f6f 100644
> --- a/Documentation/DocBook/media/v4l/controls.xml
> +++ b/Documentation/DocBook/media/v4l/controls.xml
> @@ -2258,6 +2258,20 @@ Applicable to the MPEG1, MPEG2, MPEG4
> encoders.</entry>
> VBV buffer control.</entry>
> </row>
>
> + <row><entry></entry></row>
> + <row id="v4l2-mpeg-video-horz-search-range">
> + <entry
> spanname="id"><constant>V4L2_CID_MPEG_VIDEO_HORZ_SEARCH_RANGE</constant
HORZ is nowhere used. HOR is more commonly used in control names.
V4L2_CID_MPEG_VIDEO_MV_H_SEARCH_RANGE seems better.
> > </entry>
> + <entry>integer</entry>
> + </row><row><entry spanname="descr">Sets the Horizontal
> search range for Video Macro blocks.</entry>
> + </row>
It's expressed in pixels? If so then it should be mentioned here. Also I
think this lacks the mention that it is used for motion estimation.
Please add a more detailed description.
> +
> + <row><entry></entry></row>
> + <row id="v4l2-mpeg-video-vert-search-range">
> + <entry
> spanname="id"><constant>V4L2_CID_MPEG_VIDEO_VERT_SEARCH_RANGE</constant
> > </entry>
V4L2_CID_MPEG_VIDEO_MV_V_SEARCH_RANGE seems better.
> + <entry>integer</entry>
> + </row><row><entry spanname="descr">Sets the Vertical search
> range for Video Macro blocks.</entry>
> + </row>
> +
This description is too vague as well.
> <row><entry></entry></row>
> <row>
> <entry
> spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE</constant>&nb
> sp;</entry>
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> index 6920b54..f2c13c3 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
> @@ -430,6 +430,8 @@ struct s5p_mfc_vp8_enc_params {
> struct s5p_mfc_enc_params {
> u16 width;
> u16 height;
> + u32 horz_range;
> + u32 vert_range;
mv_h_range ?
mv_v_range ?
>
> u16 gop_size;
> enum v4l2_mpeg_video_multi_slice_mode slice_mode;
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> index 4ff3b6c..a02e7b8 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
> @@ -208,6 +208,24 @@ static struct mfc_control controls[] = {
> .default_value = 0,
> },
> {
> + .id = V4L2_CID_MPEG_VIDEO_HORZ_SEARCH_RANGE,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "horizontal search range of video macro block",
This too should be property capitalised. Please mention the motion vectors
too.
> + .minimum = 16,
> + .maximum = 128,
> + .step = 16,
> + .default_value = 32,
> + },
> + {
> + .id = V4L2_CID_MPEG_VIDEO_VERT_SEARCH_RANGE,
> + .type = V4L2_CTRL_TYPE_INTEGER,
> + .name = "vertical search range of video macro block",
This too should be property capitalised. Please mention the motion vectors
too.
> + .minimum = 16,
> + .maximum = 128,
> + .step = 16,
> + .default_value = 32,
> + },
> + {
> .id = V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE,
> .type = V4L2_CTRL_TYPE_INTEGER,
> .minimum = 0,
> @@ -1377,6 +1395,12 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl
> *ctrl)
> case V4L2_CID_MPEG_VIDEO_VBV_SIZE:
> p->vbv_size = ctrl->val;
> break;
> + case V4L2_CID_MPEG_VIDEO_HORZ_SEARCH_RANGE:
> + p->horz_range = ctrl->val;
> + break;
> + case V4L2_CID_MPEG_VIDEO_VERT_SEARCH_RANGE:
> + p->vert_range = ctrl->val;
> + break;
> case V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE:
> p->codec.h264.cpb_size = ctrl->val;
> break;
> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> index 461358c..47e1807 100644
> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
> @@ -727,14 +727,10 @@ static int s5p_mfc_set_enc_params(struct
> s5p_mfc_ctx *ctx)
> WRITEL(reg, S5P_FIMV_E_RC_CONFIG_V6);
>
> /* setting for MV range [16, 256] */
> - reg = 0;
> - reg &= ~(0x3FFF);
> - reg = 256;
> + reg = (p->horz_range & 0x3fff); /* conditional check in app */
> WRITEL(reg, S5P_FIMV_E_MV_HOR_RANGE_V6);
Please add a S5P_FIMV_E_MV_HOR_RANGE_V6_MASK or something instead of this
magic number.
>
> - reg = 0;
> - reg &= ~(0x3FFF);
> - reg = 256;
> + reg = (p->vert_range & 0x3fff); /* conditional check in app */
Please add a S5P_FIMV_E_MV_VER_RANGE_V6_MASK or something instead of this
magic number.
> WRITEL(reg, S5P_FIMV_E_MV_VER_RANGE_V6);
>
> WRITEL(0x0, S5P_FIMV_E_FRAME_INSERTION_V6);
> diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-
> core/v4l2-ctrls.c
> index fb46790..7cf23d5 100644
> --- a/drivers/media/v4l2-core/v4l2-ctrls.c
> +++ b/drivers/media/v4l2-core/v4l2-ctrls.c
> @@ -735,6 +735,8 @@ const char *v4l2_ctrl_get_name(u32 id)
> case V4L2_CID_MPEG_VIDEO_DEC_PTS: return
"Video
> Decoder PTS";
> case V4L2_CID_MPEG_VIDEO_DEC_FRAME: return
"Video
> Decoder Frame Count";
> case V4L2_CID_MPEG_VIDEO_VBV_DELAY: return
"Initial
> Delay for VBV Control";
> + case V4L2_CID_MPEG_VIDEO_HORZ_SEARCH_RANGE: return "hor
> search range of video MB";
This should be property capitalised. Please mention the motion vectors too.
> + case V4L2_CID_MPEG_VIDEO_VERT_SEARCH_RANGE: return "vert
> search range of video MB";
This too should be property capitalised. Please mention the motion vectors
too.
> case V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER: return
> "Repeat Sequence Header";
>
> /* VPX controls */
> @@ -905,6 +907,18 @@ void v4l2_ctrl_fill(u32 id, const char **name,
> enum v4l2_ctrl_type *type,
> *min = 0;
> *max = *step = 1;
> break;
> + case V4L2_CID_MPEG_VIDEO_HORZ_SEARCH_RANGE:
> + *type = V4L2_CTRL_TYPE_INTEGER;
> + *min = 16;
> + *max = 128;
> + *step = 16;
> + break;
> + case V4L2_CID_MPEG_VIDEO_VERT_SEARCH_RANGE:
> + *type = V4L2_CTRL_TYPE_INTEGER;
> + *min = 16;
> + *max = 128;
> + *step = 16;
> + break;
> case V4L2_CID_PAN_RESET:
> case V4L2_CID_TILT_RESET:
> case V4L2_CID_FLASH_STROBE:
> diff --git a/include/uapi/linux/v4l2-controls.h
> b/include/uapi/linux/v4l2-controls.h
> index 1666aab..bcce536 100644
> --- a/include/uapi/linux/v4l2-controls.h
> +++ b/include/uapi/linux/v4l2-controls.h
> @@ -372,6 +372,8 @@ enum v4l2_mpeg_video_multi_slice_mode {
> #define V4L2_CID_MPEG_VIDEO_DEC_FRAME
> (V4L2_CID_MPEG_BASE+224)
> #define V4L2_CID_MPEG_VIDEO_VBV_DELAY
> (V4L2_CID_MPEG_BASE+225)
> #define V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER
> (V4L2_CID_MPEG_BASE+226)
> +#define V4L2_CID_MPEG_VIDEO_HORZ_SEARCH_RANGE
> (V4L2_CID_MPEG_BASE+227)
> +#define V4L2_CID_MPEG_VIDEO_VERT_SEARCH_RANGE
> (V4L2_CID_MPEG_BASE+228)
>
> #define V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP
> (V4L2_CID_MPEG_BASE+300)
> #define V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP
> (V4L2_CID_MPEG_BASE+301)
> --
> 1.7.9.5
Best wishes,
--
Kamil Debski
Samsung R&D Institute Poland
^ permalink raw reply
* [PATCH] [media] s5p-mfc: Add Horizontal and Vertical search range for Video Macro Blocks
From: Sylwester Nawrocki @ 2014-01-23 10:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <019f01cf1823$7e020fa0$7a062ee0$%debski@samsung.com>
Hi,
On 23/01/14 11:11, Kamil Debski wrote:
>> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
>> > b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
>> > index 4ff3b6c..a02e7b8 100644
>> > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
>> > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
>> > @@ -208,6 +208,24 @@ static struct mfc_control controls[] = {
>> > .default_value = 0,
>> > },
>> > {
>> > + .id = V4L2_CID_MPEG_VIDEO_HORZ_SEARCH_RANGE,
>> > + .type = V4L2_CTRL_TYPE_INTEGER,
>> > + .name = "horizontal search range of video macro block",
>
> This too should be property capitalised. Please mention the motion vectors
> too.
And additionally length of the name string should not exceed 31 characters.
--
Thanks,
Sylwester
^ permalink raw reply
* [PATCH RESEND v4 00/37] mtd: st_spi_fsm: Add new driver
From: Lee Jones @ 2014-01-23 10:30 UTC (permalink / raw)
To: linux-arm-kernel
Version 4:
Tended to Brian's review comments
- Checkpatch acceptance
- MODULE_DEVICE_TABLE() name slip correction
- Timeout issue(s) resolved
- Potential infinite loop mitigated
- Code clarity suggests heeded
- Duplication with MTD core code removed
- Upgraded to using ROUND_UP() helper
- Moved non-shared header code into main driver
- Relocated dynamic msg sequence stores into main struct
- Averted adaption of static (table) data
- Basic whitespace/spelling/data type/dev_err suggestions applied
Version 3:
Okay, this thing should be fully functional now. Identify a chip
based on it's JEDEC ID, Read, Write, Erase (all or by sector).
Support for various chip quirks added too.
Version 2:
The first bunch of these patches have been on the MLs before, but
didn't receive a great deal of attention for the most part. We are
a little more featureful this time however. We can now successfully
setup and configure the N25Q256. We still can't read/write/erase
it though. I'll start work on that next week and will provide it in
the next instalment.
Version 1:
First stab at getting this thing Mainlined. It doesn't do a great deal
yet, but we are able to initialise the device and dynamically set it up
correctly based on an extracted JEDEC ID.
Documentation/devicetree/bindings/mtd/st-fsm.txt | 26 ++
arch/arm/boot/dts/stih416-b2105.dts | 14 +
arch/arm/boot/dts/stih416-pinctrl.dtsi | 12 +
drivers/mtd/devices/Kconfig | 8 +
drivers/mtd/devices/Makefile | 1 +
drivers/mtd/devices/serial_flash_cmds.h | 81 ++++
drivers/mtd/devices/st_spi_fsm.c | 2124 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
7 files changed, 2266 insertions(+)
^ permalink raw reply
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