* [PATCH 2/2] ehci-platform: Add support for controllers with big-endian regs / descriptors
From: Alan Stern @ 2014-01-23 15:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140123000330.00002567@openwrt.org>
On Thu, 23 Jan 2014, Jonas Gorski wrote:
> On Wed, 22 Jan 2014 16:17:42 -0500 (EST)
> Alan Stern <stern@rowland.harvard.edu> wrote:
>
> > On Wed, 22 Jan 2014, Jonas Gorski wrote:
> >
> > > If it's safe to set ehci->big_endian_{desc,mmio} from the _probe()
> > > routine, then maybe the pdata sets in _reset() should be moved into here
> > > instead of adding extra cludges/checks into _reset().
> >
> > Why? What difference would it make?
>
> Effectivewise none, but to me it seems to be cleaner to set them once in
> probe() instead of everytime reset() is called.
>
> I admit I don't know the code flow good enough if reset() is called
> more than once in the lifetime of a hcd device.
Only once.
> And as I said, it would allow doing the checks the patch adds for both
> DT and !DT, not just DT only.
That's true. Or the checks could be moved into the probe routine.
Alan Stern
^ permalink raw reply
* [PATCH] ARM: OMAP4+: move errata initialization to omap4_pm_init_early
From: Grygorii Strashko @ 2014-01-23 15:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390248397-14112-1-git-send-email-nm@ti.com>
On 01/20/2014 10:06 PM, Nishanth Menon wrote:
> Move all OMAP4 PM errata initializations to centralized location in
> omap4_pm_init_early. This allows for users to utilize the erratas
> in various submodules as needed.
>
Tested-by: Grygorii Strashko <grygorii.strashko@ti.com>
This patch fixes build failure caused by patch
https://patchwork.kernel.org/patch/3084521/
in case if SMP is not enabled.
> Reported-by: Tony Lindgren <tony@atomide.com>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
> Reported by Tony here: https://patchwork.kernel.org/patch/3084521/
> Reproduced with .config: http://slexy.org/view/s2EEdvTGXV on next-20140120 tag (based on omap2plus_defconfig)
> Applies on v3.13 tag and on next-20140120
> Tested to boot on next-20140120 along with https://patchwork.kernel.org/patch/3084521/
> on PandaBoard-ES with multi_v7_defconfig: http://slexy.org/view/s27n0BWrPf
>
> arch/arm/mach-omap2/common.h | 6 ++++++
> arch/arm/mach-omap2/io.c | 1 +
> arch/arm/mach-omap2/omap-smp.c | 6 +-----
> arch/arm/mach-omap2/pm44xx.c | 15 +++++++++++++++
> 4 files changed, 23 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
> index 3adaa1d..a6aae30 100644
> --- a/arch/arm/mach-omap2/common.h
> +++ b/arch/arm/mach-omap2/common.h
> @@ -62,11 +62,17 @@ static inline int omap3_pm_init(void)
>
> #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
> int omap4_pm_init(void);
> +int omap4_pm_init_early(void);
> #else
> static inline int omap4_pm_init(void)
> {
> return 0;
> }
> +
> +static inline int omap4_pm_init_early(void)
> +{
> + return 0;
> +}
> #endif
>
> #ifdef CONFIG_OMAP_MUX
> diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
> index 47381fd..d408b15 100644
> --- a/arch/arm/mach-omap2/io.c
> +++ b/arch/arm/mach-omap2/io.c
> @@ -641,6 +641,7 @@ void __init omap4430_init_early(void)
> omap_cm_base_init();
> omap4xxx_check_revision();
> omap4xxx_check_features();
> + omap4_pm_init_early();
> omap44xx_prm_init();
> omap44xx_voltagedomains_init();
> omap44xx_powerdomains_init();
> diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
> index 75e95d4..17550aa 100644
> --- a/arch/arm/mach-omap2/omap-smp.c
> +++ b/arch/arm/mach-omap2/omap-smp.c
> @@ -39,8 +39,6 @@
>
> #define OMAP5_CORE_COUNT 0x2
>
> -u16 pm44xx_errata;
> -
> /* SCU base address */
> static void __iomem *scu_base;
>
> @@ -217,10 +215,8 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
> if (scu_base)
> scu_enable(scu_base);
>
> - if (cpu_is_omap446x()) {
> + if (cpu_is_omap446x())
> startup_addr = omap4460_secondary_startup;
> - pm44xx_errata |= PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD;
> - }
>
> /*
> * Write the address of secondary startup routine into the
> diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
> index 82f06989..eefb30c 100644
> --- a/arch/arm/mach-omap2/pm44xx.c
> +++ b/arch/arm/mach-omap2/pm44xx.c
> @@ -24,6 +24,8 @@
> #include "powerdomain.h"
> #include "pm.h"
>
> +u16 pm44xx_errata;
> +
> struct power_state {
> struct powerdomain *pwrdm;
> u32 next_state;
> @@ -199,6 +201,19 @@ static inline int omap4_init_static_deps(void)
> }
>
> /**
> + * omap4_pm_init_early - Does early initialization necessary for OMAP4+ devices
> + *
> + * Initializes basic stuff for power management functionality.
> + */
> +int __init omap4_pm_init_early(void)
> +{
> + if (cpu_is_omap446x())
> + pm44xx_errata |= PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD;
> +
> + return 0;
> +}
> +
> +/**
> * omap4_pm_init - Init routine for OMAP4+ devices
> *
> * Initializes all powerdomain and clockdomain target states
>
^ permalink raw reply
* [PATCH RESEND v4 01/37] mtd: st_spi_fsm: Allocate resources and register with MTD framework
From: Lee Jones @ 2014-01-23 15:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52E12434.7030000@st.com>
> >+ fsm->region = devm_request_mem_region(&pdev->dev, res->start,
> >+ resource_size(res), pdev->name);
> >+ if (!fsm->region) {
> >+ dev_err(&pdev->dev,
> >+ "Failed to reserve memory region [0x%08x-0x%08x]\n",
> >+ res->start, res->end);
> >+ return -EBUSY;
> >+ }
> >+
> >+ fsm->base = devm_ioremap_nocache(&pdev->dev,
> >+ res->start, resource_size(res));
> >+ if (!fsm->base) {
> >+ dev_err(&pdev->dev, "Failed to ioremap [0x%08x]\n", res->start);
> >+ return -EINVAL;
> >+ }
> >+
> you can replace "devm_request_mem_region" & "devm_ioremap_nocache"
> by "devm_ioremap_resource"
Yes, that looks entirely reasonable, thanks.
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply
* [Linaro-acpi] [PATCH 04/20] ARM64 / ACPI: Introduce arm_core.c and its related head file
From: Tomasz Nowicki @ 2014-01-23 15:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140122115453.GC24288@e102568-lin.cambridge.arm.com>
Hi Lorenzo,
W dniu 22.01.2014 12:54, Lorenzo Pieralisi pisze:
> On Fri, Jan 17, 2014 at 12:24:58PM +0000, Hanjun Guo wrote:
>
> [...]
>
>> diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
>> index bd9bbd0..2210353 100644
>> --- a/arch/arm64/kernel/setup.c
>> +++ b/arch/arm64/kernel/setup.c
>> @@ -41,6 +41,7 @@
>> #include <linux/memblock.h>
>> #include <linux/of_fdt.h>
>> #include <linux/of_platform.h>
>> +#include <linux/acpi.h>
>>
>> #include <asm/cputype.h>
>> #include <asm/elf.h>
>> @@ -225,6 +226,11 @@ void __init setup_arch(char **cmdline_p)
>>
>> arm64_memblock_init();
>>
>> + /* Parse the ACPI tables for possible boot-time configuration */
>> + acpi_boot_table_init();
>> + early_acpi_boot_init();
>> + acpi_boot_init();
>> +
>> paging_init();
>
> Can I ask you please why we need to parse ACPI tables before
> paging_init() ?
This is for future usage and because of couple of reasons. Mainly SRAT
table parsing should be done (before paging_init()) for proper NUMA
initialization and then paging_init().
Regards,
Tomasz
>
> [...]
>
>> +/*
>> + * __acpi_map_table() will be called before page_init(), so early_ioremap()
>> + * or early_memremap() should be called here.
>
> Again, why is this needed ? What's needed before paging_init() from ACPI ?
>
> [...]
>
>> +/*
>> + * acpi_boot_table_init() and acpi_boot_init()
>> + * called from setup_arch(), always.
>> + * 1. checksums all tables
>> + * 2. enumerates lapics
>> + * 3. enumerates io-apics
>> + *
>> + * acpi_table_init() is separated to allow reading SRAT without
>> + * other side effects.
>> + */
>> +void __init acpi_boot_table_init(void)
>> +{
>> + /*
>> + * If acpi_disabled, bail out
>> + */
>> + if (acpi_disabled)
>> + return;
>> +
>> + /*
>> + * Initialize the ACPI boot-time table parser.
>> + */
>> + if (acpi_table_init()) {
>> + disable_acpi();
>> + return;
>> + }
>> +}
>> +
>> +int __init early_acpi_boot_init(void)
>> +{
>> + /*
>> + * If acpi_disabled, bail out
>> + */
>> + if (acpi_disabled)
>> + return -ENODEV;
>> +
>> + /*
>> + * Process the Multiple APIC Description Table (MADT), if present
>> + */
>> + early_acpi_process_madt();
>> +
>> + return 0;
>> +}
>> +
>> +int __init acpi_boot_init(void)
>> +{
>> + /*
>> + * If acpi_disabled, bail out
>> + */
>> + if (acpi_disabled)
>> + return -ENODEV;
>> +
>> + acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt);
>> +
>> + /*
>> + * Process the Multiple APIC Description Table (MADT), if present
>> + */
>> + acpi_process_madt();
>> +
>> + return 0;
>> +}
>
> Well, apart from having three init calls, one returning void and two
> returning proper values, do not understand why, and do not understand
> why we need three calls in the first place...why should we process MADT
> twice in two separate calls ? What is supposed to change in between that
> prevents you from merging the two together ?
>
> Thanks,
> Lorenzo
>
>
> _______________________________________________
> Linaro-acpi mailing list
> Linaro-acpi at lists.linaro.org
> http://lists.linaro.org/mailman/listinfo/linaro-acpi
>
^ permalink raw reply
* [PATCH v3 00/15] Device Tree support for the at91sam9261ek
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
This patch set aims at bringing a basic device tree support for the sam9261.
It's mostly based on the sam9263 and sam9x5 stuff.
Changes since V2:
* removed the smc driver from the serie. It'll be posted in an independent
serie later.
* removed the DM9000 support (it'll come with the smc driver)
* the sam9261 now supports the Common Clock Framework (CCF). Note: to enable
the CCF you must remove from the kernel config the platforms that don't
support it.
* Added basic DT binding for the bus matrix
* Added support for USB host
* Added support for USB gadget
* in dts(i), replaced interrupt-parent with interrupts-extended
* changed the nand partition plan (same as for the sama5d3)
* removed 'mem' parameter in command line
* re-ordered dt-nodes in ascending address order.
* split the lcd support patch in 2 parts (SOC and board)
Change since V1:
* changed the DT representation to use address translation and separate the
timings' configuration from the device properties by adding a "simple-bus"
inetrmediate node.
* moved the smc driver from drivers/bus to drivers/memmory
* smc driver now accepts timings in nanoseconds as well as raw register values
* smc driver can clip the timings if they're out of bound and dump them to the
console
* DM9000 timings are now described in nanosecs (for the virtue of example)
supported features:
* dbgu
* nand
* lcd
* leds
* user buttons
* usb host
* usb gadget
This serie relies on the 3 following patchs:
usb: ohci-at91: fix irq and iomem resource retrieval
usb: at91-udc: fix irq and iomem resource retrieval
ARM: at91: prepare sam9 dt boards transition to common
Jean-Jacques
Jean-Jacques Hiblot (15):
at91: dt: Add at91sam9261 dt SoC support
at91: dt: defconfig: Added the sam9261 to the list of supported SOCs
at91: dt: sam9261: Basic Device Tree support for the at91sam9261ek
ARM: at91: prepare common clk transition for sam9261 SoC
ARM: at91: move sam9261 SoC to common clk
at91: dt: at91sam9261ek: Adds DT entries for the 4 user buttons
at91: dt: sam9261: Added the descriptions of hck0 and hck1 clocks
(CCF)
at91: dt: sam9261: Added hclk declaration for the fb driver (non-CCF)
at91: dt: sam9261: Added support for the LCD display
at91: dt: at91sam9261ek: Added support for the LCD display
at91: dt: Adds support for the bus matrix declaration in the device
tree
at91: dt: sam9261: adds description for the bus matrix
at91: dt: sam9261: CCF: Added USB clocks
at91: dt: at91sam9261ek: Enabled the USB host port (OHCI)
at91: dt: at91sam9261ek: Enabled the USB device port
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/at91sam9261.dtsi | 724 ++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9261ek.dts | 191 ++++++++++
arch/arm/configs/at91_dt_defconfig | 1 +
arch/arm/mach-at91/Kconfig | 1 -
arch/arm/mach-at91/at91sam9261.c | 24 +-
arch/arm/mach-at91/setup.c | 23 ++
7 files changed, 963 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
create mode 100644 arch/arm/boot/dts/at91sam9261ek.dts
--
1.8.5.2
^ permalink raw reply
* [PATCH v3 01/15] at91: dt: Add at91sam9261 dt SoC support
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
This patch adds the basics to support the Device Tree on a sam9261-based platform
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/at91sam9261.dtsi | 627 +++++++++++++++++++++++++++++++++++++
arch/arm/mach-at91/at91sam9261.c | 15 +
2 files changed, 642 insertions(+)
create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
new file mode 100644
index 0000000..2730611
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -0,0 +1,627 @@
+/*
+ * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
+ *
+ * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
+ *
+ * Licensed under GPLv2 only.
+ */
+
+#include "skeleton.dtsi"
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clk/at91.h>
+
+/ {
+ model = "Atmel AT91SAM9261 family SoC";
+ compatible = "atmel,at91sam9261";
+ interrupt-parent = <&aic>;
+
+ aliases {
+ serial0 = &dbgu;
+ serial1 = &usart0;
+ serial2 = &usart1;
+ serial3 = &usart2;
+ gpio0 = &pioA;
+ gpio1 = &pioB;
+ gpio2 = &pioC;
+ tcb0 = &tcb0;
+ i2c0 = &i2c0;
+ ssc0 = &ssc0;
+ ssc1 = &ssc1;
+ };
+ cpus {
+ #address-cells = <0>;
+ #size-cells = <0>;
+
+ cpu {
+ compatible = "arm,arm926ej-s";
+ device_type = "cpu";
+ };
+ };
+
+ memory {
+ reg = <0x20000000 0x08000000>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ usb0: ohci at 00500000 {
+ compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+ reg = <0x00500000 0x100000>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
+ status = "disabled";
+ };
+
+ nand0: nand at 40000000 {
+ compatible = "atmel,at91rm9200-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x40000000 0x10000000>;
+ atmel,nand-addr-offset = <22>;
+ atmel,nand-cmd-offset = <21>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_nand>;
+
+ gpios = <&pioC 15 GPIO_ACTIVE_HIGH
+ &pioC 14 GPIO_ACTIVE_HIGH
+ 0
+ >;
+ status = "disabled";
+ };
+
+ apb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ tcb0: timer at fffa0000 {
+ compatible = "atmel,at91rm9200-tcb";
+ reg = <0xfffa0000 0x100>;
+ interrupts = < 17 IRQ_TYPE_LEVEL_HIGH 0
+ 18 IRQ_TYPE_LEVEL_HIGH 0
+ 19 IRQ_TYPE_LEVEL_HIGH 0
+ >;
+ clocks = <&tcb0_clk>;
+ clock-names = "t0_clk";
+ status = "disabled";
+ };
+
+ usb1: gadget at fffa4000 {
+ compatible = "atmel,at91rm9200-udc";
+ reg = <0xfffa4000 0x4000>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
+ status = "disabled";
+ };
+
+ mmc0: mmc at fffa8000 {
+ compatible = "atmel,hsmci";
+ reg = <0xfffa8000 0x600>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mci0_clk>;
+ clock-names = "mci_clk";
+ status = "disabled";
+ };
+
+ i2c0: i2c at fffac000 {
+ compatible = "atmel,at91sam9261-i2c";
+ pinctrl-0 = <&pinctrl_i2c_twi>;
+ reg = <0xfffac000 0x100>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&twi0_clk>;
+ status = "disabled";
+ };
+
+ usart0: serial at fffb0000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb0000 0x200>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart0>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ usart1: serial at fffb4000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb4000 0x200>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart1>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ usart2: serial at fffb8000{
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb8000 0x200>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart2>;
+ clocks = <&usart2_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ ssc0: ssc at fffbc000 {
+ compatible = "atmel,at91rm9200-ssc";
+ reg = <0xfffbc000 0x4000>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ status = "disabled";
+ };
+
+ ssc1: ssc at fffc0000 {
+ compatible = "atmel,at91rm9200-ssc";
+ reg = <0xfffc0000 0x4000>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+ status = "disabled";
+ };
+
+ spi0: spi at fffc8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffc8000 0x200>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi0>;
+ clocks = <&spi0_clk>;
+ clock-names = "spi_clk";
+ status = "disabled";
+ };
+
+ spi1: spi at fffcc000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffcc000 0x200>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1>;
+ clocks = <&spi1_clk>;
+ clock-names = "spi_clk";
+ status = "disabled";
+ };
+
+ ramc: ramc at ffffea00 {
+ compatible = "atmel,at91sam9260-sdramc";
+ reg = <0xffffea00 0x200>;
+ };
+
+ aic: interrupt-controller at fffff000 {
+ #interrupt-cells = <3>;
+ compatible = "atmel,at91rm9200-aic";
+ interrupt-controller;
+ reg = <0xfffff000 0x200>;
+ atmel,external-irqs = <29 30 31>;
+ };
+ dbgu: serial at fffff200 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffff200 0x200>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dbgu>;
+ clocks = <&mck>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ pinctrl at fffff400 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+ ranges = <0xfffff400 0xfffff400 0xa00>;
+
+ atmel,mux-mask = <
+ /* A B */
+ 0xffffffff 0xfffffff7 /* pioA */
+ 0xffffffff 0xfffffff4 /* pioB */
+ 0xffffffff 0xffffff07 /* pioC */
+ >;
+
+ /* shared pinctrl settings */
+ dbgu {
+ pinctrl_dbgu: dbgu-0 {
+ atmel,pins =
+ <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+ };
+ };
+
+ usart0 {
+ pinctrl_usart0: usart0-0 {
+ atmel,pins =
+ <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart0_rts: usart0_rts-0 {
+ atmel,pins =
+ <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart0_cts: usart0_cts-0 {
+ atmel,pins =
+ <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ usart1 {
+ pinctrl_usart1: usart1-0 {
+ atmel,pins =
+ <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart1_rts: usart1_rts-0 {
+ atmel,pins =
+ <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart1_cts: usart1_cts-0 {
+ atmel,pins =
+ <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ usart2 {
+ pinctrl_usart2: usart2-0 {
+ atmel,pins =
+ <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart2_rts: usart2_rts-0 {
+ atmel,pins =
+ <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart2_cts: usart2_cts-0 {
+ atmel,pins =
+ <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ nand {
+ pinctrl_nand: nand-0 {
+ atmel,pins =
+ <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP
+ AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
+ };
+ };
+
+ mmc0 {
+ pinctrl_mmc0_clk: mmc0_clk-0 {
+ atmel,pins =
+ <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
+ atmel,pins =
+ <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP
+ AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
+ };
+
+ pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+ atmel,pins =
+ <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP
+ AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP
+ AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
+ };
+ };
+
+ ssc0 {
+ pinctrl_ssc0_tx: ssc0_tx-0 {
+ atmel,pins =
+ <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_ssc0_rx: ssc0_rx-0 {
+ atmel,pins =
+ <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ ssc1 {
+ pinctrl_ssc1_tx: ssc1_tx-0 {
+ atmel,pins =
+ <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_ssc1_rx: ssc1_rx-0 {
+ atmel,pins =
+ <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ spi0 {
+ pinctrl_spi0: spi0-0 {
+ atmel,pins =
+ <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ spi1 {
+ pinctrl_spi1: spi1-0 {
+ atmel,pins =
+ <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ i2c0 {
+ pinctrl_i2c_bitbang: i2c-0-bitbang {
+ atmel,pins =
+ <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
+ AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+ };
+ pinctrl_i2c_twi: i2c-0-twi {
+ atmel,pins =
+ <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ pioA: gpio at fffff400 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff400 0x200>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
+ };
+
+ pioB: gpio at fffff600 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff600 0x200>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
+ };
+
+ pioC: gpio at fffff800 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff800 0x200>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioC_clk>;
+ };
+ };
+
+ pmc: pmc at fffffc00 {
+ compatible = "atmel,at91rm9200-pmc";
+ reg = <0xfffffc00 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+
+ clk32k: slck {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+ clocks = <&clk32k>;
+ };
+
+ plla: pllack {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+ clocks = <&main>;
+ reg = <0>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
+ };
+
+ pllb: pllbck {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKB>;
+ clocks = <&main>;
+ reg = <1>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
+ };
+
+ mck: masterck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+ clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
+ atmel,clk-output-range = <0 94000000>;
+ atmel,clk-divisors = <1 2 4 3>;
+ };
+ periphck {
+ compatible = "atmel,at91rm9200-clk-peripheral";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mck>;
+
+ pioA_clk: pioA_clk {
+ #clock-cells = <0>;
+ reg = <2>;
+ };
+
+ pioB_clk: pioB_clk {
+ #clock-cells = <0>;
+ reg = <3>;
+ };
+
+ pioC_clk: pioC_clk {
+ #clock-cells = <0>;
+ reg = <4>;
+ };
+
+ usart0_clk: usart0_clk {
+ #clock-cells = <0>;
+ reg = <6>;
+ };
+
+ usart1_clk: usart1_clk {
+ #clock-cells = <0>;
+ reg = <7>;
+ };
+
+ usart2_clk: usart2_clk {
+ #clock-cells = <0>;
+ reg = <8>;
+ };
+
+ mci0_clk: mci0_clk {
+ #clock-cells = <0>;
+ reg = <9>;
+ };
+
+ twi0_clk: twi0_clk {
+ reg = <11>;
+ #clock-cells = <0>;
+ };
+
+ spi0_clk: spi0_clk {
+ #clock-cells = <0>;
+ reg = <12>;
+ };
+
+ spi1_clk: spi1_clk {
+ #clock-cells = <0>;
+ reg = <13>;
+ };
+
+ tcb0_clk: tcb0_clk {
+ #clock-cells = <0>;
+ reg = <17>;
+ };
+
+ lcd_clk: lcd_clk {
+ #clock-cells = <0>;
+ reg = <21>;
+ };
+ };
+ };
+
+ rstc at fffffd00 {
+ compatible = "atmel,at91sam9260-rstc";
+ reg = <0xfffffd00 0x10>;
+ };
+
+ shdwc at fffffd10 {
+ compatible = "atmel,at91sam9260-shdwc";
+ reg = <0xfffffd10 0x10>;
+ };
+
+ pit: timer at fffffd30 {
+ compatible = "atmel,at91sam9260-pit";
+ reg = <0xfffffd30 0xf>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&mck>;
+ };
+
+ watchdog at fffffd40 {
+ compatible = "atmel,at91sam9260-wdt";
+ reg = <0xfffffd40 0x10>;
+ status = "disabled";
+ };
+ };
+ };
+
+ i2c at 0 {
+ compatible = "i2c-gpio";
+ pinctrl-0 = <&pinctrl_i2c_bitbang>;
+ gpios = <&pioA 7 GPIO_ACTIVE_HIGH /* sda */
+ &pioA 8 GPIO_ACTIVE_HIGH /* scl */
+ >;
+ i2c-gpio,sda-open-drain;
+ i2c-gpio,scl-open-drain;
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+};
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 6276b4c..6a2c869 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -189,6 +189,21 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_ID("pioA", &pioA_clk),
CLKDEV_CON_ID("pioB", &pioB_clk),
CLKDEV_CON_ID("pioC", &pioC_clk),
+ /* more usart lookup table for DT entries */
+ CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
+ CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
+ CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
+ CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
+ /* more tc lookup table for DT entries */
+ CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
+ CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &hck0),
+ CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
+ CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 02/15] at91: dt: defconfig: Added the sam9261 to the list of supported SOCs
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/configs/at91_dt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig
index 690e892..3145e16 100644
--- a/arch/arm/configs/at91_dt_defconfig
+++ b/arch/arm/configs/at91_dt_defconfig
@@ -16,6 +16,7 @@ CONFIG_MODULE_UNLOAD=y
CONFIG_ARCH_AT91=y
CONFIG_SOC_AT91RM9200=y
CONFIG_SOC_AT91SAM9260=y
+CONFIG_SOC_AT91SAM9261=y
CONFIG_SOC_AT91SAM9263=y
CONFIG_SOC_AT91SAM9G45=y
CONFIG_SOC_AT91SAM9X5=y
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 03/15] at91: dt: sam9261: Basic Device Tree support for the at91sam9261ek
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
This patch implements a simple DTS to boot a at91sam9261ek with a dt-enabled
kernel (at91_dt_defconfig).
Only dbgu, nand and watchdog are described in the DT.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/at91sam9261ek.dts | 112 ++++++++++++++++++++++++++++++++++++
2 files changed, 114 insertions(+)
create mode 100644 arch/arm/boot/dts/at91sam9261ek.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 772a30e..ece523d 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -11,6 +11,8 @@ dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb
dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb
dtb-$(CONFIG_ARCH_AT91) += tny_a9260.dtb
dtb-$(CONFIG_ARCH_AT91) += usb_a9260.dtb
+# sam9261
+dtb-$(CONFIG_ARCH_AT91) += at91sam9261ek.dtb
# sam9263
dtb-$(CONFIG_ARCH_AT91) += at91sam9263ek.dtb
dtb-$(CONFIG_ARCH_AT91) += tny_a9263.dtb
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
new file mode 100644
index 0000000..8909217
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -0,0 +1,112 @@
+/*
+ * at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference board
+ *
+ * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
+ *
+ * Licensed under GPLv2 only.
+ */
+/dts-v1/;
+#include "at91sam9261.dtsi"
+
+/ {
+ model = "Atmel at91sam9261ek";
+ compatible = "atmel,at91sam9261ek", "atmel,at91sam9261", "atmel,at91sam9";
+
+ chosen {
+ bootargs = "mem=64M console=ttyS0,115200";
+ };
+
+ memory {
+ reg = <0x20000000 0x4000000>;
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ main_clock: clock at 0 {
+ compatible = "atmel,osc", "fixed-clock";
+ clock-frequency = <18432000>;
+ };
+ };
+
+ ahb {
+
+ nand0: nand at 40000000 {
+ nand-bus-width = <8>;
+ nand-ecc-mode = "soft";
+ nand-on-flash-bbt = <1>;
+ status = "okay";
+
+ at91bootstrap at 0 {
+ label = "at91bootstrap";
+ reg = <0x0 0x40000>;
+ };
+
+ bootloader at 40000 {
+ label = "bootloader";
+ reg = <0x40000 0x80000>;
+ };
+
+ bootloaderenv at c0000 {
+ label = "bootloader env";
+ reg = <0xc0000 0xc0000>;
+ };
+
+ dtb at 180000 {
+ label = "device tree";
+ reg = <0x180000 0x80000>;
+ };
+
+ kernel at 200000 {
+ label = "kernel";
+ reg = <0x200000 0x600000>;
+ };
+
+ rootfs at 800000 {
+ label = "rootfs";
+ reg = <0x800000 0x0f800000>;
+ };
+ };
+
+ apb {
+ dbgu: serial at fffff200 {
+ status = "okay";
+ };
+
+ pinctrl at fffff400 {
+ leds {
+ pinctrl_leds: leds-0 {
+ atmel,pins = <AT91_PIOA 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
+ AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
+ AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+ };
+ };
+ };
+
+ watchdog at fffffd40 {
+ status = "okay";
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ ds8 {
+ label = "ds8";
+ gpios = <&pioA 13 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "none";
+ };
+ ds7 {
+ label = "ds7";
+ gpios = <&pioA 14 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "nand-disk";
+ };
+ ds1 {
+ label = "ds1";
+ gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 04/15] ARM: at91: prepare common clk transition for sam9261 SoC
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
This patch encloses sam9261 old clk registration in
"#if defined(CONFIG_OLD_CLK_AT91) #endif" sections.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/mach-at91/at91sam9261.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 6a2c869..2c0e940 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -25,10 +25,12 @@
#include "at91_rstc.h"
#include "soc.h"
#include "generic.h"
-#include "clock.h"
#include "sam9_smc.h"
#include "pm.h"
+#if defined(CONFIG_OLD_CLK_AT91)
+#include "clock.h"
+
/* --------------------------------------------------------------------
* Clocks
* -------------------------------------------------------------------- */
@@ -262,7 +264,7 @@ static void __init at91sam9261_register_clocks(void)
clk_register(&hck0);
clk_register(&hck1);
}
-
+#endif
/* --------------------------------------------------------------------
* GPIO
* -------------------------------------------------------------------- */
@@ -362,6 +364,8 @@ AT91_SOC_START(at91sam9261)
.extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
| (1 << AT91SAM9261_ID_IRQ2),
.ioremap_registers = at91sam9261_ioremap_registers,
+#if defined(CONFIG_OLD_CLK_AT91)
.register_clocks = at91sam9261_register_clocks,
+#endif
.init = at91sam9261_initialize,
AT91_SOC_END
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 05/15] ARM: at91: move sam9261 SoC to common clk
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
This patch removes the selection of AT91_USE_OLD_CLK when selecting
sam9261 SoCs support. This will automatically enable COMMON_CLK_AT91 option
and add support for at91 common clk implementation.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/mach-at91/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index b4f7d6f..2214beb 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -120,7 +120,6 @@ config SOC_AT91SAM9261
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
- select AT91_USE_OLD_CLK
select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 06/15] at91: dt: at91sam9261ek: Adds DT entries for the 4 user buttons
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/at91sam9261ek.dts | 39 +++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
index 8909217..5555e9f5 100644
--- a/arch/arm/boot/dts/at91sam9261ek.dts
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -83,6 +83,15 @@
AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
};
};
+
+ keys {
+ pinctrl_keys: keys-0 {
+ atmel,pins = <AT91_PIOA 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
+ AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
+ AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
+ AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+ };
+ };
};
watchdog at fffffd40 {
@@ -109,4 +118,34 @@
linux,default-trigger = "heartbeat";
};
};
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&pinctrl_keys>;
+
+ button_0 {
+ label = "button_0";
+ gpios = <&pioA 27 GPIO_ACTIVE_LOW>;
+ linux,code = <256>;
+ gpio-key,wakeup;
+ };
+ button_1 {
+ label = "button_1";
+ gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
+ linux,code = <257>;
+ gpio-key,wakeup;
+ };
+ button_2 {
+ label = "button_2";
+ gpios = <&pioA 25 GPIO_ACTIVE_LOW>;
+ linux,code = <258>;
+ gpio-key,wakeup;
+ };
+ button_3 {
+ label = "button_3";
+ gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
+ linux,code = <259>;
+ gpio-key,wakeup;
+ };
+ };
};
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 07/15] at91: dt: sam9261: Added the descriptions of hck0 and hck1 clocks (CCF)
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/at91sam9261.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index 2730611..97e6b62 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -518,6 +518,26 @@
atmel,clk-output-range = <0 94000000>;
atmel,clk-divisors = <1 2 4 3>;
};
+
+ systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hclk0: hclk0 {
+ #clock-cells = <0>;
+ reg = <16>;
+ clocks = <&mck>;
+ };
+
+ hclk1: hclk1 {
+ #clock-cells = <0>;
+ reg = <17>;
+ clocks = <&mck>;
+ };
+ };
+
+
periphck {
compatible = "atmel,at91rm9200-clk-peripheral";
#address-cells = <1>;
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 08/15] at91: dt: sam9261: Added hclk declaration for the fb driver (non-CCF)
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
When CCF is not used the clocks are not described in the DTS. This patch adds
a clock required for the fb driver
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/mach-at91/at91sam9261.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 2c0e940..f17268f 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -199,6 +199,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
/* more tc lookup table for DT entries */
CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &hck0),
+ CLKDEV_CON_DEV_ID("hclk", "600000.fb", &hck1),
CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 09/15] at91: dt: sam9261: Added support for the LCD display
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/at91sam9261.dtsi | 39 ++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index 97e6b62..79d7554 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -57,6 +57,17 @@
status = "disabled";
};
+ fb0: fb at 0x00600000 {
+ compatible = "atmel,at91sam9261-lcdc";
+ reg = <0x00600000 0x1000>;
+ interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fb>;
+ clocks = <&lcd_clk>, <&hclk1>;
+ clock-names = "lcdc_clk", "hclk";
+ status = "disabled";
+ };
+
nand0: nand at 40000000 {
compatible = "atmel,at91rm9200-nand";
#address-cells = <1>;
@@ -432,6 +443,34 @@
};
};
+ fb {
+ pinctrl_fb: fb-0 {
+ atmel,pins =
+ <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE
+ >;
+ };
+ };
+
pioA: gpio at fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 10/15] at91: dt: at91sam9261ek: Added support for the LCD display
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/at91sam9261ek.dts | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
index 5555e9f5..287b283 100644
--- a/arch/arm/boot/dts/at91sam9261ek.dts
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -32,6 +32,37 @@
};
ahb {
+ fb0: fb at 0x00600000 {
+ display = <&display0>;
+ atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ display0: display {
+ bits-per-pixel = <16>;
+ atmel,lcdcon-backlight;
+ atmel,dmacon = <0x1>;
+ atmel,lcdcon2 = <0x80008002>;
+ atmel,guard-time = <1>;
+ atmel,lcd-wiring-mode = "BRG";
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: timing0 {
+ clock-frequency = <4965000>;
+ hactive = <240>;
+ vactive = <320>;
+ hback-porch = <1>;
+ hfront-porch = <33>;
+ vback-porch = <1>;
+ vfront-porch = <0>;
+ hsync-len = <5>;
+ vsync-len = <1>;
+ hsync-active = <1>;
+ vsync-active = <1>;
+ };
+ };
+ };
+ };
nand0: nand at 40000000 {
nand-bus-width = <8>;
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 11/15] at91: dt: Adds support for the bus matrix declaration in the device tree
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/mach-at91/setup.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 7d3f7cc..f61638d 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -483,6 +483,28 @@ end:
of_node_put(np);
}
+static struct of_device_id matrix_ids[] = {
+ { .compatible = "atmel,at91sam9261-bus-matrix", },
+ { /*sentinel*/ }
+};
+
+static void at91_dt_matrix(void)
+{
+ struct device_node *np;
+
+ np = of_find_matching_node(NULL, matrix_ids);
+ if (!np) {
+ pr_debug("AT91: unable to find compatible bus matrix controller node in dtb\n");
+ return;
+ }
+
+ at91_matrix_base = of_iomap(np, 0);
+ if (!at91_matrix_base)
+ panic("Impossible to ioremap at91_matrix_base\n");
+
+ of_node_put(np);
+}
+
void __init at91rm9200_dt_initialize(void)
{
at91_dt_ramc();
@@ -502,6 +524,7 @@ void __init at91_dt_initialize(void)
at91_dt_rstc();
at91_dt_ramc();
at91_dt_shdwc();
+ at91_dt_matrix();
/* Init clock subsystem */
at91_dt_clock_init();
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 12/15] at91: dt: sam9261: adds description for the bus matrix
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/at91sam9261.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index 79d7554..112e587 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -220,6 +220,11 @@
reg = <0xffffea00 0x200>;
};
+ matrix: matrix at ffffee00 {
+ compatible = "atmel,at91sam9261-bus-matrix";
+ reg = <0xffffee00 0x200>;
+ };
+
aic: interrupt-controller at fffff000 {
#interrupt-cells = <3>;
compatible = "atmel,at91rm9200-aic";
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 13/15] at91: dt: sam9261: CCF: Added USB clocks
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/at91sam9261.dtsi | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index 112e587..2a87c19 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -54,6 +54,8 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&usb>, <&ohci_clk>, <&hclk0>, <&uhpck>;
+ clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
@@ -107,6 +109,8 @@
compatible = "atmel,at91rm9200-udc";
reg = <0xfffa4000 0x4000>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&usb>, <&udc_clk>, <&udpck>;
+ clock-names = "usb_clk", "udc_clk", "udpck";
status = "disabled";
};
@@ -563,11 +567,30 @@
atmel,clk-divisors = <1 2 4 3>;
};
+ usb: usbck {
+ compatible = "atmel,at91rm9200-clk-usb";
+ #clock-cells = <0>;
+ atmel,clk-divisors = <1 2 4 3>;
+ clocks = <&pllb>;
+ };
+
systemck {
compatible = "atmel,at91rm9200-clk-system";
#address-cells = <1>;
#size-cells = <0>;
+ uhpck: uhpck {
+ #clock-cells = <0>;
+ reg = <6>;
+ clocks = <&usb>;
+ };
+
+ udpck: udpck {
+ #clock-cells = <0>;
+ reg = <7>;
+ clocks = <&usb>;
+ };
+
hclk0: hclk0 {
#clock-cells = <0>;
reg = <16>;
@@ -623,6 +646,11 @@
reg = <9>;
};
+ udc_clk: udc_clk {
+ #clock-cells = <0>;
+ reg = <10>;
+ };
+
twi0_clk: twi0_clk {
reg = <11>;
#clock-cells = <0>;
@@ -643,6 +671,11 @@
reg = <17>;
};
+ ohci_clk: ohci_clk {
+ #clock-cells = <0>;
+ reg = <20>;
+ };
+
lcd_clk: lcd_clk {
#clock-cells = <0>;
reg = <21>;
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 14/15] at91: dt: at91sam9261ek: Enabled the USB host port (OHCI)
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/at91sam9261ek.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
index 287b283..8bdbed9 100644
--- a/arch/arm/boot/dts/at91sam9261ek.dts
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -32,6 +32,10 @@
};
ahb {
+ usb0: ohci at 00500000 {
+ status = "okay";
+ };
+
fb0: fb at 0x00600000 {
display = <&display0>;
atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>;
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 15/15] at91: dt: at91sam9261ek: Enabled the USB device port
From: Jean-Jacques Hiblot @ 2014-01-23 15:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390492639-7299-1-git-send-email-jjhiblot@traphandler.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/at91sam9261ek.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
index 8bdbed9..36cf677 100644
--- a/arch/arm/boot/dts/at91sam9261ek.dts
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -106,6 +106,11 @@
};
apb {
+ usb1: gadget at fffa4000 {
+ atmel,vbus-gpio = <&pioB 29 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+
dbgu: serial at fffff200 {
status = "okay";
};
--
1.8.5.2
^ permalink raw reply related
* [RESEND][RFC PATCH 2/2] arm: Get rid of meminfo
From: Grygorii Strashko @ 2014-01-23 16:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1389813057-26572-3-git-send-email-lauraa@codeaurora.org>
Hi Laura,
On 01/15/2014 09:10 PM, Laura Abbott wrote:
> memblock is now fully integrated into the kernel and is the prefered
> method for tracking memory. Rather than reinvent the wheel with
> meminfo, migrate to using memblock directly instead of meminfo as
> an intermediate.
>
> TODO: fix early_mem, get rid of NR_BANKS?
There are few comments below.
>
> Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
> ---
> arch/arm/include/asm/mach/arch.h | 4 +-
> arch/arm/include/asm/memblock.h | 3 +-
> arch/arm/include/asm/setup.h | 23 ------
> arch/arm/kernel/atags_parse.c | 5 +-
> arch/arm/kernel/setup.c | 33 +++------
> arch/arm/mach-clps711x/board-clep7312.c | 7 +-
> arch/arm/mach-clps711x/board-edb7211.c | 10 +--
> arch/arm/mach-clps711x/board-p720t.c | 2 +-
> arch/arm/mach-footbridge/cats-hw.c | 2 +-
> arch/arm/mach-footbridge/netwinder-hw.c | 2 +-
> arch/arm/mach-msm/board-halibut.c | 6 --
> arch/arm/mach-msm/board-mahimahi.c | 13 +--
> arch/arm/mach-msm/board-msm7x30.c | 3 +-
> arch/arm/mach-msm/board-sapphire.c | 13 +--
> arch/arm/mach-msm/board-trout.c | 8 +-
> arch/arm/mach-orion5x/common.c | 3 +-
> arch/arm/mach-orion5x/common.h | 3 +-
> arch/arm/mach-pxa/cm-x300.c | 3 +-
> arch/arm/mach-pxa/corgi.c | 10 +--
> arch/arm/mach-pxa/eseries.c | 9 +-
> arch/arm/mach-pxa/poodle.c | 8 +-
> arch/arm/mach-pxa/spitz.c | 9 +--
> arch/arm/mach-pxa/tosa.c | 8 +-
> arch/arm/mach-realview/core.c | 11 +--
> arch/arm/mach-realview/core.h | 3 +-
> arch/arm/mach-realview/realview_pb1176.c | 8 +-
> arch/arm/mach-realview/realview_pbx.c | 17 ++---
> arch/arm/mach-s3c24xx/mach-smdk2413.c | 8 +-
> arch/arm/mach-s3c24xx/mach-vstms.c | 8 +-
> arch/arm/mach-sa1100/assabet.c | 2 +-
> arch/arm/mm/init.c | 61 ++++++----------
> arch/arm/mm/mmu.c | 122 ++++++++++--------------------
> 32 files changed, 143 insertions(+), 284 deletions(-)
>
> diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
> index 17a3fa2..c43473a 100644
[...]
>
> @@ -692,6 +685,12 @@ int __init arm_add_memory(u64 start, u64 size)
> * Pick out the memory size. We look for mem=size at start,
> * where start and size are "size[KkMm]"
> */
> +
> +/*
> + * XXX this is busted when just using memblock. Need to add memblock
> + * hook to reset.
> + */
> +
> static int __init early_mem(char *p)
> {
> static int usermem __initdata = 0;
> @@ -706,7 +705,6 @@ static int __init early_mem(char *p)
> */
> if (usermem == 0) {
> usermem = 1;
> - meminfo.nr_banks = 0;
> }
The below code might work here:
memblock_remove(memblock_start_of_DRAM(),
memblock_end_of_DRAM() - memblock_start_of_DRAM());
>
> start = PHYS_OFFSET;
> @@ -851,13 +849,6 @@ static void __init reserve_crashkernel(void)
> static inline void reserve_crashkernel(void) {}
> #endif /* CONFIG_KEXEC */
>
[...]
> diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
> index e0e3968..c6ea491 100644
> --- a/arch/arm/mm/init.c
> +++ b/arch/arm/mm/init.c
> @@ -81,24 +81,21 @@ __tagtable(ATAG_INITRD2, parse_tag_initrd2);
> * initialization functions, as well as show_mem() for the skipping
> * of holes in the memory map. It is populated by arm_add_memory().
> */
> -struct meminfo meminfo;
> -
> void show_mem(unsigned int filter)
> {
> int free = 0, total = 0, reserved = 0;
> - int shared = 0, cached = 0, slab = 0, i;
> - struct meminfo * mi = &meminfo;
> + int shared = 0, cached = 0, slab = 0;
> + struct memblock_region *reg;
>
> printk("Mem-info:\n");
> show_free_areas(filter);
>
> - for_each_bank (i, mi) {
> - struct membank *bank = &mi->bank[i];
> + for_each_memblock (memory, reg) {
> unsigned int pfn1, pfn2;
> struct page *page, *end;
>
> - pfn1 = bank_pfn_start(bank);
> - pfn2 = bank_pfn_end(bank);
> + pfn1 = memblock_region_memory_base_pfn(reg);
> + pfn2 = memblock_region_memory_end_pfn(reg);
>
> page = pfn_to_page(pfn1);
> end = pfn_to_page(pfn2 - 1) + 1;
> @@ -130,16 +127,9 @@ void show_mem(unsigned int filter)
> static void __init find_limits(unsigned long *min, unsigned long *max_low,
> unsigned long *max_high)
> {
> - struct meminfo *mi = &meminfo;
> - int i;
> -
> - /* This assumes the meminfo array is properly sorted */
> - *min = bank_pfn_start(&mi->bank[0]);
> - for_each_bank (i, mi)
> - if (mi->bank[i].highmem)
> - break;
> - *max_low = bank_pfn_end(&mi->bank[i - 1]);
> - *max_high = bank_pfn_end(&mi->bank[mi->nr_banks - 1]);
> + *max_low = PFN_DOWN(memblock_get_current_limit());
> + *min = PFN_UP(memblock_start_of_DRAM());
> + *max_high = PFN_DOWN(memblock_end_of_DRAM());
Just to notify. Above values may have different values after your
change, because of usage arm_memblock_steal(). Is it ok?
> }
>
> static void __init arm_bootmem_init(unsigned long start_pfn,
> @@ -327,14 +317,8 @@ phys_addr_t __init arm_memblock_steal(phys_addr_t size, phys_addr_t align)
> return phys;
> }
>
> -void __init arm_memblock_init(struct meminfo *mi,
> - const struct machine_desc *mdesc)
> +void __init arm_memblock_init(const struct machine_desc *mdesc)
> {
> - int i;
> -
> - for (i = 0; i < mi->nr_banks; i++)
> - memblock_add(mi->bank[i].start, mi->bank[i].size);
> -
> /* Register the kernel text, kernel data and initrd with memblock. */
> #ifdef CONFIG_XIP_KERNEL
> memblock_reserve(__pa(_sdata), _end - _sdata);
> @@ -466,48 +450,47 @@ free_memmap(unsigned long start_pfn, unsigned long end_pfn)
> /*
> * The mem_map array can get very big. Free the unused area of the memory map.
> */
> -static void __init free_unused_memmap(struct meminfo *mi)
> +static void __init free_unused_memmap(void)
> {
> - unsigned long bank_start, prev_bank_end = 0;
> - unsigned int i;
> + unsigned long start, prev_end = 0;
> + struct memblock_region *reg;
>
> /*
> * This relies on each bank being in address order.
> * The banks are sorted previously in bootmem_init().
> */
> - for_each_bank(i, mi) {
> - struct membank *bank = &mi->bank[i];
> -
> - bank_start = bank_pfn_start(bank);
> + for_each_memblock(memory, reg) {
> + start = __phys_to_pfn(reg->base);
>
> #ifdef CONFIG_SPARSEMEM
> /*
> * Take care not to free memmap entries that don't exist
> * due to SPARSEMEM sections which aren't present.
> */
> - bank_start = min(bank_start,
> - ALIGN(prev_bank_end, PAGES_PER_SECTION));
> + start = min(start,
> + ALIGN(prev_end, PAGES_PER_SECTION));
> #else
> /*
> * Align down here since the VM subsystem insists that the
> * memmap entries are valid from the bank start aligned to
> * MAX_ORDER_NR_PAGES.
> */
> - bank_start = round_down(bank_start, MAX_ORDER_NR_PAGES);
> + start = round_down(start, MAX_ORDER_NR_PAGES);
> #endif
> /*
> * If we had a previous bank, and there is a space
> * between the current bank and the previous, free it.
> */
> - if (prev_bank_end && prev_bank_end < bank_start)
> - free_memmap(prev_bank_end, bank_start);
> + if (prev_end && prev_end < start)
> + free_memmap(prev_end, start);
>
> /*
> * Align up here since the VM subsystem insists that the
> * memmap entries are valid from the bank end aligned to
> * MAX_ORDER_NR_PAGES.
> */
> - prev_bank_end = ALIGN(bank_pfn_end(bank), MAX_ORDER_NR_PAGES);
> + prev_end = ALIGN(start + __phys_to_pfn(reg->size),
> + MAX_ORDER_NR_PAGES);
> }
>
> #ifdef CONFIG_SPARSEMEM
> @@ -589,7 +572,7 @@ void __init mem_init(void)
> max_mapnr = pfn_to_page(max_pfn + PHYS_PFN_OFFSET) - mem_map;
>
> /* this will put all unused low memory onto the freelists */
> - free_unused_memmap(&meminfo);
> + free_unused_memmap();
> free_all_bootmem();
>
> #ifdef CONFIG_SA1111
> diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
> index 4f08c13..394701c 100644
> --- a/arch/arm/mm/mmu.c
> +++ b/arch/arm/mm/mmu.c
> @@ -1043,77 +1043,54 @@ early_param("vmalloc", early_vmalloc);
>
> phys_addr_t arm_lowmem_limit __initdata = 0;
>
> +static void remove_memblock(phys_addr_t base, phys_addr_t size)
> +{
> + memblock_reserve(base, size);
> + memblock_free(base, size);
> + memblock_remove(base, size);
> +}
I think it'll be ok to use just memblock_remove(base, size); below.
> +
> void __init sanity_check_meminfo(void)
> {
> phys_addr_t memblock_limit = 0;
> - int i, j, highmem = 0;
> + int highmem = 0;
> phys_addr_t vmalloc_limit = __pa(vmalloc_min - 1) + 1;
> + struct memblock_region *reg;
>
> - for (i = 0, j = 0; i < meminfo.nr_banks; i++) {
> - struct membank *bank = &meminfo.bank[j];
> - phys_addr_t size_limit;
> -
> - *bank = meminfo.bank[i];
> - size_limit = bank->size;
> + for_each_memblock(memory, reg) {
> + phys_addr_t block_start = reg->base;
> + phys_addr_t block_end = reg->base + reg->size;
> + phys_addr_t size_limit = reg->size;
>
> - if (bank->start >= vmalloc_limit)
> + if (reg->base >= vmalloc_limit)
> highmem = 1;
> else
> - size_limit = vmalloc_limit - bank->start;
> + size_limit = vmalloc_limit - reg->base;
>
> - bank->highmem = highmem;
>
> -#ifdef CONFIG_HIGHMEM
> - /*
> - * Split those memory banks which are partially overlapping
> - * the vmalloc area greatly simplifying things later.
> - */
> - if (!highmem && bank->size > size_limit) {
> - if (meminfo.nr_banks >= NR_BANKS) {
> - printk(KERN_CRIT "NR_BANKS too low, "
> - "ignoring high memory\n");
> - } else {
> - memmove(bank + 1, bank,
> - (meminfo.nr_banks - i) * sizeof(*bank));
> - meminfo.nr_banks++;
> - i++;
> - bank[1].size -= size_limit;
> - bank[1].start = vmalloc_limit;
> - bank[1].highmem = highmem = 1;
> - j++;
> + if (!IS_ENABLED(CONFIG_HIGHMEM) || cache_is_vipt_aliasing()) {
> +
> + if (highmem) {
> + pr_notice("Ignoring ram at %pa-%pa (!CONFIG_HIGHMEM)\n",
> + &block_start, &block_end);
> + remove_memblock(block_start, block_end);
> + continue;
> }
> - bank->size = size_limit;
> - }
> -#else
> - /*
> - * Highmem banks not allowed with !CONFIG_HIGHMEM.
> - */
> - if (highmem) {
> - printk(KERN_NOTICE "Ignoring RAM at %.8llx-%.8llx "
> - "(!CONFIG_HIGHMEM).\n",
> - (unsigned long long)bank->start,
> - (unsigned long long)bank->start + bank->size - 1);
> - continue;
> - }
>
> - /*
> - * Check whether this memory bank would partially overlap
> - * the vmalloc area.
> - */
> - if (bank->size > size_limit) {
> - printk(KERN_NOTICE "Truncating RAM at %.8llx-%.8llx "
> - "to -%.8llx (vmalloc region overlap).\n",
> - (unsigned long long)bank->start,
> - (unsigned long long)bank->start + bank->size - 1,
> - (unsigned long long)bank->start + size_limit - 1);
> - bank->size = size_limit;
> + if (reg->size > size_limit) {
> + phys_addr_t overlap_size = reg->size - size_limit;
> +
> + pr_notice("Truncating RAM at %pa-%pa to -%pa",
> + &block_start, &block_end, &overlap_size);
> + remove_memblock(vmalloc_limit, overlap_size);
> + block_end = vmalloc_limit;
> + }
> }
> -#endif
> - if (!bank->highmem) {
> - phys_addr_t bank_end = bank->start + bank->size;
>
> - if (bank_end > arm_lowmem_limit)
> - arm_lowmem_limit = bank_end;
> + if (!highmem) {
> + if (block_end > arm_lowmem_limit)
> + arm_lowmem_limit = reg->base + size_limit;
> +
>
> /*
> * Find the first non-section-aligned page, and point
> @@ -1129,35 +1106,16 @@ void __init sanity_check_meminfo(void)
> * occurs before any free memory is mapped.
> */
> if (!memblock_limit) {
> - if (!IS_ALIGNED(bank->start, SECTION_SIZE))
> - memblock_limit = bank->start;
> - else if (!IS_ALIGNED(bank_end, SECTION_SIZE))
> - memblock_limit = bank_end;
> + if (!IS_ALIGNED(block_start, SECTION_SIZE))
> + memblock_limit = block_start;
> + else if (!IS_ALIGNED(block_end, SECTION_SIZE))
> + memblock_limit = block_end;
> }
> - }
> - j++;
> - }
> -#ifdef CONFIG_HIGHMEM
> - if (highmem) {
> - const char *reason = NULL;
>
> - if (cache_is_vipt_aliasing()) {
> - /*
> - * Interactions between kmap and other mappings
> - * make highmem support with aliasing VIPT caches
> - * rather difficult.
> - */
> - reason = "with VIPT aliasing cache";
> - }
> - if (reason) {
> - printk(KERN_CRIT "HIGHMEM is not supported %s, ignoring high memory\n",
> - reason);
> - while (j > 0 && meminfo.bank[j - 1].highmem)
> - j--;
> }
> +
> }
> -#endif
> - meminfo.nr_banks = j;
> +
> high_memory = __va(arm_lowmem_limit - 1) + 1;
>
> /*
>
Regards,
- grygorii
^ permalink raw reply
* [PATCH 02/20] ARM64 : Add dummy asm/cpu.h
From: Catalin Marinas @ 2014-01-23 16:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1389961514-13562-3-git-send-email-hanjun.guo@linaro.org>
On Fri, Jan 17, 2014 at 12:24:56PM +0000, Hanjun Guo wrote:
> ACPI requires a cpu.h, add a dummy one copied from arm. This will need
> updated or replaced as ACPI based cpu hotplug or cpu topology for armv8
> is worked out.
>
> Signed-off-by: Graeme Gregory <graeme.gregory@linaro.org>
> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
> ---
> arch/arm64/include/asm/cpu.h | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
> create mode 100644 arch/arm64/include/asm/cpu.h
>
> diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h
> new file mode 100644
> index 0000000..8625eb1
> --- /dev/null
> +++ b/arch/arm64/include/asm/cpu.h
> @@ -0,0 +1,25 @@
> +/*
> + * Copyright (C) 2004-2005 ARM Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __ASM_ARM_CPU_H
> +#define __ASM_ARM_CPU_H
> +
> +#include <linux/percpu.h>
> +#include <linux/cpu.h>
> +#include <linux/topology.h>
> +
> +struct cpuinfo_arm {
> + struct cpu cpu;
> + u64 cpuid;
> +#ifdef CONFIG_SMP
> + unsigned int loops_per_jiffy;
> +#endif
> +};
> +
> +DECLARE_PER_CPU(struct cpuinfo_arm, cpu_data);
> +
> +#endif
Could you not leave this file empty until you add the code that actually
makes use of cpu_data?
--
Catalin
^ permalink raw reply
* [PATCH 03/20] ARM64 / ACPI: Introduce the skeleton of _PDC related for ARM64
From: Catalin Marinas @ 2014-01-23 16:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52DCEA66.90903@linaro.org>
On Mon, Jan 20, 2014 at 09:20:38AM +0000, Hanjun Guo wrote:
> On 2014-1-17 22:25, Sudeep Holla wrote:
> > On 17/01/14 12:24, Hanjun Guo wrote:
> >> --- a/arch/arm64/kernel/process.c
> >> +++ b/arch/arm64/kernel/process.c
> >> @@ -89,6 +89,9 @@ void arch_cpu_idle_prepare(void)
> >> local_fiq_enable();
> >> }
> >>
> >> +unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
> >> +EXPORT_SYMBOL(boot_option_idle_override);
> >> +
> >
> > This is what I mentioned in other email. Do we really foresee use of this in
> > ARM64 or it's just added to avoid build issues ?
>
> Just avoid build issues, can not foresee use of this in ARM64 :)
So ideally we should look for a better solution here.
--
Catalin
^ permalink raw reply
* [PATCH 07/20] ARM64 / ACPI: Enable ARM64 in Kconfig
From: Catalin Marinas @ 2014-01-23 16:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1389961514-13562-8-git-send-email-hanjun.guo@linaro.org>
On Fri, Jan 17, 2014 at 12:25:01PM +0000, Hanjun Guo wrote:
> Add Kconfigs to build ACPI on ARM64, and make ACPI runable on ARM64.
>
> acpi_idle driver is x86/IA64 dependent now, so make CONFIG_ACPI_PROCESSOR
> depends on X86 || IA64, and implement it on ARM/ARM64 in the furture.
>
> In order to make arm-core.c can both run on ARM and ARM64, introduce
> CONFIG_ACPI_ARM to support it.
>
> Signed-off-by: Graeme Gregory <graeme.gregory@linaro.org>
> Signed-off-by: Al Stone <al.stone@linaro.org>
> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
> ---
> arch/arm64/Kconfig | 2 ++
> drivers/acpi/Kconfig | 11 ++++++++---
> drivers/acpi/plat/Makefile | 2 +-
> 3 files changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 6d4dd22..2b1fb1d 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -279,6 +279,8 @@ source "net/Kconfig"
>
> source "drivers/Kconfig"
>
> +source "drivers/acpi/Kconfig"
> +
> source "fs/Kconfig"
>
> source "arch/arm64/kvm/Kconfig"
> diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig
> index 4770de5..cae5dc9 100644
> --- a/drivers/acpi/Kconfig
> +++ b/drivers/acpi/Kconfig
> @@ -2,13 +2,16 @@
> # ACPI Configuration
> #
>
> +config ACPI_ARM
> + bool
Could be better as def_bool ARM64
> +
> menuconfig ACPI
> bool "ACPI (Advanced Configuration and Power Interface) Support"
> depends on !IA64_HP_SIM
> - depends on IA64 || X86
> - depends on PCI
> + depends on ((IA64 || X86) && PCI) || ARM64
> select PNP
> - default y
> + select ACPI_ARM if ARM64
And remove this select here.
--
Catalin
^ permalink raw reply
* [PATCHv2 2/2] pwm: imx: support polarity inversion
From: Russell King - ARM Linux @ 2014-01-23 16:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140123115203.GV15937@n2100.arm.linux.org.uk>
On Thu, Jan 23, 2014 at 11:52:03AM +0000, Russell King - ARM Linux wrote:
> On Thu, Jan 23, 2014 at 08:37:14AM +0100, Lothar Wa?mann wrote:
> > This wouldn't buy much without a material change to of_pwm_get().
> > The function of_parse_phandle_with_args() called by of_pwm_get()
> > requires the number of args in the pwms property be greater or equal to
> > the #pwm-cells property in the pwm node. Thus, the interesting case of
> > having #pwm-cells = <3> without changing the existing users is
> > prohibited by of_parse_phandle_with_args().
>
> I really don't think that's a problem we need to be concerned with at
> the moment. What we need is for the kernel to be able to parse files
> with #pwm-cells = <2> with the pwms property containing two arguments,
> and when they're updated to #pwm-cells = <3> with the pwms property
> containing three arguments.
>
> Yes, that means all the board dt files need to be updated at the same
> time to include the additional argument, but I don't see that as a big
> problem.
>
> What we do need to do is to adjust the PWM parsing code such that it's
> possible to use either specification without causing any side effects.
>
> I would test this, but as u-boot is rather fscked at the moment and the
> networking has broken on my cubox-i as a result... and it seems that the
> u-boot developers have pissed off cubox-i u-boot hackers soo much that
> they've dropped u-boot in favour of barebox...
Okay, finally confirmed that this works with #pwm-cells = 2.
--
FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".
^ permalink raw reply
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