* [Linaro-acpi] [PATCH 04/20] ARM64 / ACPI: Introduce arm_core.c and its related head file
From: Lorenzo Pieralisi @ 2014-01-24 12:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52E22DD4.3050807@linaro.org>
Hi Hanjun,
On Fri, Jan 24, 2014 at 09:09:40AM +0000, Hanjun Guo wrote:
> On 2014?01?23? 23:56, Tomasz Nowicki wrote:
> > Hi Lorenzo,
> >
> > W dniu 22.01.2014 12:54, Lorenzo Pieralisi pisze:
> >> On Fri, Jan 17, 2014 at 12:24:58PM +0000, Hanjun Guo wrote:
> >>
> >> [...]
> >>
> >>> diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
> >>> index bd9bbd0..2210353 100644
> >>> --- a/arch/arm64/kernel/setup.c
> >>> +++ b/arch/arm64/kernel/setup.c
> >>> @@ -41,6 +41,7 @@
> >>> #include <linux/memblock.h>
> >>> #include <linux/of_fdt.h>
> >>> #include <linux/of_platform.h>
> >>> +#include <linux/acpi.h>
> >>>
> >>> #include <asm/cputype.h>
> >>> #include <asm/elf.h>
> >>> @@ -225,6 +226,11 @@ void __init setup_arch(char **cmdline_p)
> >>>
> >>> arm64_memblock_init();
> >>>
> >>> + /* Parse the ACPI tables for possible boot-time configuration */
> >>> + acpi_boot_table_init();
> >>> + early_acpi_boot_init();
> >>> + acpi_boot_init();
> >>> +
> >>> paging_init();
> >>
> >> Can I ask you please why we need to parse ACPI tables before
> >> paging_init() ?
> > This is for future usage and because of couple of reasons. Mainly SRAT
> > table parsing should be done (before paging_init()) for proper NUMA
> > initialization and then paging_init().
Thank you for the explanation. I still have some questions:
1) What are the other reasons ?
2) NUMA is not supported at the moment and I reckon SRAT needs updating
since the only way to associate a CPU to a memory node is through
a local APIC id that is non-existent on ARM and at least deserves a
new entry.
I am still not sure that providing a hook for parsing the ACPI tables before
paging_init() is the main focus at the moment, it is probably best, as we've
mentioned manifold times, to make sure that the infrastructure to detect
ACPI vs DT at run-time is in place in the kernel and allows us to boot
either with ACPI or DT, in a mutual exclusive way (same binary kernel
supporting both, runtime detection/decision on what data to use, ACPI tables
vs DT nodes, detection made once for all and NOT on a per property basis).
I will have a look at SRAT and how it is used on x86, and get back to you on
this.
[...]
> >>> + * acpi_boot_table_init() and acpi_boot_init()
> >>> + * called from setup_arch(), always.
> >>> + * 1. checksums all tables
> >>> + * 2. enumerates lapics
> >>> + * 3. enumerates io-apics
> >>> + *
> >>> + * acpi_table_init() is separated to allow reading SRAT without
> >>> + * other side effects.
> >>> + */
> >>> +void __init acpi_boot_table_init(void)
> >>> +{
> >>> + /*
> >>> + * If acpi_disabled, bail out
> >>> + */
> >>> + if (acpi_disabled)
> >>> + return;
> >>> +
> >>> + /*
> >>> + * Initialize the ACPI boot-time table parser.
> >>> + */
> >>> + if (acpi_table_init()) {
> >>> + disable_acpi();
> >>> + return;
> >>> + }
> >>> +}
> >>> +
> >>> +int __init early_acpi_boot_init(void)
> >>> +{
> >>> + /*
> >>> + * If acpi_disabled, bail out
> >>> + */
> >>> + if (acpi_disabled)
> >>> + return -ENODEV;
> >>> +
> >>> + /*
> >>> + * Process the Multiple APIC Description Table (MADT), if present
> >>> + */
> >>> + early_acpi_process_madt();
> >>> +
> >>> + return 0;
> >>> +}
> >>> +
> >>> +int __init acpi_boot_init(void)
> >>> +{
> >>> + /*
> >>> + * If acpi_disabled, bail out
> >>> + */
> >>> + if (acpi_disabled)
> >>> + return -ENODEV;
> >>> +
> >>> + acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt);
> >>> +
> >>> + /*
> >>> + * Process the Multiple APIC Description Table (MADT), if present
> >>> + */
> >>> + acpi_process_madt();
> >>> +
> >>> + return 0;
> >>> +}
> >>
> >> Well, apart from having three init calls, one returning void and two
> >> returning proper values, do not understand why, and do not understand
> >> why we need three calls in the first place...why should we process MADT
> >> twice in two separate calls ? What is supposed to change in between that
> >> prevents you from merging the two together ?
>
> Thanks for pointing this out. I can merge acpi_boot_table_init() and
> early_acpi_boot_init() together, but can not merge early_acpi_boot_init()
> and acpi_boot_init() together.
>
> early_acpi_boot_init() and acpi_boot_init() was separated intentionally for
> memory hotplug reasons. memory allocated in this stage can not be migrated
> and cause memory hot-remove failed, in order to keep memory allocated
> at base node (general NUMA node 0 in the system) at boot stage, we should
> parse SRAT first before CPU is enumerated, does this make sense to you?
Are you parsing the SRAT in this series to get memory info or memory is
still initialized by DT even when system is supposed to be booted with ACPI
(ie there is a valid ACPI root table ?)
I have a hunch the latter is what's happening (and that's wrong, because
memory information when kernel is booted through ACPI must be retrieved
from UEFI - at least that's what has been defined), so I still see an early
hook to initialize ACPI tables before paging_init() that has no use as the
current patchset stands, please correct me if I am wrong.
Thank you,
Lorenzo
^ permalink raw reply
* [PATCH 15/15] ARM: shmobile: koelsch dts: Enable Quad SPI transfers for the SPI FLASH
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree at vger.kernel.org
---
This depends on spi-rspi and m25p80 updates
arch/arm/boot/dts/r8a7791-koelsch.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 42fd5ebe9119..d4ca21cd2c34 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -160,6 +160,8 @@
compatible = "spansion,s25fl512s";
reg = <0>;
spi-max-frequency = <30000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
m25p,fast-read;
partition at 0 {
--
1.7.9.5
^ permalink raw reply related
* [PATCH 14/15] ARM: shmobile: koelsch legacy: Enable Quad SPI transfers for the SPI FLASH
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
This depends on spi-rspi and m25p80 updates
arch/arm/mach-shmobile/board-koelsch.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
index 56020d9fa841..4cb8674bc4a8 100644
--- a/arch/arm/mach-shmobile/board-koelsch.c
+++ b/arch/arm/mach-shmobile/board-koelsch.c
@@ -195,7 +195,7 @@ static const struct spi_board_info spi_info[] __initconst = {
{
.modalias = "m25p80",
.platform_data = &spi_flash_data,
- .mode = SPI_MODE_0,
+ .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
.max_speed_hz = 30000000,
.bus_num = 0,
.chip_select = 0,
--
1.7.9.5
^ permalink raw reply related
* [PATCH 13/15] ARM: shmobile: lager legacy: Switch QSPI to named IRQs
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
arch/arm/mach-shmobile/board-lager.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index 8dde4462f600..4977a4b9fa2c 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -290,7 +290,7 @@ static const struct spi_board_info spi_info[] __initconst = {
/* QSPI resource */
static const struct resource qspi_resources[] __initconst = {
DEFINE_RES_MEM(0xe6b10000, 0x1000),
- DEFINE_RES_IRQ(gic_spi(184)),
+ DEFINE_RES_IRQ(gic_spi(184), "mux"),
};
/* VIN */
--
1.7.9.5
^ permalink raw reply related
* [PATCH v2 12/15] ARM: shmobile: koelsch dts: Add QSPI nodes
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add pinctrl and SPI devices for QSPI on Koelsch.
Add Spansion s25fl512s SPI FLASH and MTD partitions.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree at vger.kernel.org
---
v2:
- No changes
arch/arm/boot/dts/r8a7791-koelsch.dts | 36 +++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 55ec36e2a1f1..42fd5ebe9119 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -123,6 +123,11 @@
renesas,groups = "scif1_data_d";
renesas,function = "scif1";
};
+
+ qspi_pins: spi {
+ renesas,groups = "qspi_ctrl", "qspi_data4";
+ renesas,function = "qspi";
+ };
};
&sata0 {
@@ -142,3 +147,34 @@
status = "okay";
};
+
+&spi {
+ pinctrl-0 = <&qspi_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ flash: flash at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,s25fl512s";
+ reg = <0>;
+ spi-max-frequency = <30000000>;
+ m25p,fast-read;
+
+ partition at 0 {
+ label = "loader";
+ reg = <0x00000000 0x00080000>;
+ read-only;
+ };
+ partition at 80000 {
+ label = "bootenv";
+ reg = <0x00080000 0x00080000>;
+ read-only;
+ };
+ partition at 100000 {
+ label = "data";
+ reg = <0x00100000 0x03f00000>;
+ };
+ };
+};
--
1.7.9.5
^ permalink raw reply related
* [PATCH v2 11/15] ARM: shmobile: r8a7791 dtsi: Add QSPI node
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree at vger.kernel.org
---
v2:
- No changes
arch/arm/boot/dts/r8a7791.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index d5cc3626dd60..240c4ece1f0c 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -710,4 +710,16 @@
clock-output-names = "scifa3", "scifa4", "scifa5";
};
};
+
+ spi: spi at e6b10000 {
+ compatible = "renesas,qspi-r8a7791", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.7.9.5
^ permalink raw reply related
* [PATCH v3 10/15] ARM: shmobile: koelsch defconfig: Enable RSPI and MTD_M25P80
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
This enables support for the Spansion s25fl512s SPI FLASH on QSPI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
v3:
- No changes
v2:
- No changes
arch/arm/configs/koelsch_defconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
index e14e0a6836b8..105da42ccd51 100644
--- a/arch/arm/configs/koelsch_defconfig
+++ b/arch/arm/configs/koelsch_defconfig
@@ -40,6 +40,8 @@ CONFIG_DEVTMPFS_MOUNT=y
CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y
CONFIG_SATA_RCAR=y
+CONFIG_MTD=y
+CONFIG_MTD_M25P80=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set
@@ -62,6 +64,8 @@ CONFIG_SH_ETH=y
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=20
CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_SPI_RSPI=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
CONFIG_RCAR_THERMAL=y
--
1.7.9.5
^ permalink raw reply related
* [PATCH v3 09/15] ARM: shmobile: koelsch legacy: Add QSPI support
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Enable support for the Spansion s25fl512s SPI FLASH on the Koelsch board:
- Add QSPI platform device, resources, platform data, and pinmux,
- Add FLASH data and MTD partitions.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
v3:
- Switch to named IRQs
v2:
- Split in 2 groups (qspi_ctrl/qspi_data4)
arch/arm/mach-shmobile/board-koelsch.c | 64 ++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
index 2ab5c75ba2c2..56020d9fa841 100644
--- a/arch/arm/mach-shmobile/board-koelsch.c
+++ b/arch/arm/mach-shmobile/board-koelsch.c
@@ -25,12 +25,17 @@
#include <linux/input.h>
#include <linux/kernel.h>
#include <linux/leds.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
#include <linux/phy.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/rcar-du.h>
#include <linux/platform_device.h>
#include <linux/sh_eth.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/rspi.h>
+#include <linux/spi/spi.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7791.h>
@@ -148,6 +153,55 @@ static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
.nbuttons = ARRAY_SIZE(gpio_buttons),
};
+/* QSPI */
+static const struct resource qspi_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6b10000, 0x1000),
+ DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
+};
+
+static const struct rspi_plat_data qspi_pdata __initconst = {
+ .num_chipselect = 1,
+};
+
+/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64 MiB) */
+static struct mtd_partition spi_flash_part[] = {
+ {
+ .name = "loader",
+ .offset = 0x00000000,
+ .size = 512 * 1024,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "bootenv",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 512 * 1024,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "data",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static const struct flash_platform_data spi_flash_data = {
+ .name = "m25p80",
+ .parts = spi_flash_part,
+ .nr_parts = ARRAY_SIZE(spi_flash_part),
+ .type = "s25fl512s",
+};
+
+static const struct spi_board_info spi_info[] __initconst = {
+ {
+ .modalias = "m25p80",
+ .platform_data = &spi_flash_data,
+ .mode = SPI_MODE_0,
+ .max_speed_hz = 30000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ },
+};
+
/* SATA0 */
static const struct resource sata0_resources[] __initconst = {
DEFINE_RES_MEM(0xee300000, 0x2000),
@@ -180,6 +234,11 @@ static const struct pinctrl_map koelsch_pinctrl_map[] = {
"eth_rmii", "eth"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
"intc_irq0", "intc"),
+ /* QSPI */
+ PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
+ "qspi_ctrl", "qspi"),
+ PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
+ "qspi_data4", "qspi"),
/* SCIF0 (CN19: DEBUG SERIAL0) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7791",
"scif0_data_d", "scif0"),
@@ -205,6 +264,11 @@ static void __init koelsch_add_standard_devices(void)
platform_device_register_data(&platform_bus, "gpio-keys", -1,
&koelsch_keys_pdata,
sizeof(koelsch_keys_pdata));
+ platform_device_register_resndata(&platform_bus, "qspi", 0,
+ qspi_resources,
+ ARRAY_SIZE(qspi_resources),
+ &qspi_pdata, sizeof(qspi_pdata));
+ spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
koelsch_add_du_device();
--
1.7.9.5
^ permalink raw reply related
* [PATCH v3 08/15] ARM: shmobile: r8a7791 clock: add QSPI clocks
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
The QSPI clock divider value depends on the MD1, MD2, and MD3 mode
switches.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
v3:
- No changes
v2:
- No changes
arch/arm/mach-shmobile/clock-r8a7791.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index 0f4f500e6e1c..fc9248d0b9d0 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -101,6 +101,7 @@ static struct clk main_clk = {
*/
SH_FIXED_RATIO_CLK_SET(pll1_clk, main_clk, 1, 1);
SH_FIXED_RATIO_CLK_SET(pll3_clk, main_clk, 1, 1);
+SH_FIXED_RATIO_CLK_SET(qspi_clk, pll1_clk, 1, 1);
/* fixed ratio clock */
SH_FIXED_RATIO_CLK_SET(extal_div2_clk, extal_clk, 1, 2);
@@ -124,6 +125,7 @@ static struct clk *main_clks[] = {
&pll3_clk,
&hp_clk,
&p_clk,
+ &qspi_clk,
&rclk_clk,
&mp_clk,
&cp_clk,
@@ -135,6 +137,7 @@ static struct clk *main_clks[] = {
/* MSTP */
enum {
MSTP931, MSTP930, MSTP929, MSTP928, MSTP927, MSTP925,
+ MSTP917,
MSTP815, MSTP814,
MSTP813,
MSTP811, MSTP810, MSTP809,
@@ -154,6 +157,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
[MSTP927] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */
[MSTP925] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */
+ [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
[MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
[MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
[MSTP813] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR8, 13, MSTPSR8, 0), /* Ether */
@@ -195,6 +199,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("zs", &zs_clk),
CLKDEV_CON_ID("hp", &hp_clk),
CLKDEV_CON_ID("p", &p_clk),
+ CLKDEV_CON_ID("qspi", &qspi_clk),
CLKDEV_CON_ID("rclk", &rclk_clk),
CLKDEV_CON_ID("mp", &mp_clk),
CLKDEV_CON_ID("cp", &cp_clk),
@@ -220,6 +225,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */
CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+ CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("i2c-rcar_gen2.0", &mstp_clks[MSTP931]),
@@ -271,6 +277,11 @@ void __init r8a7791_clock_init(void)
break;
}
+ if ((mode & (MD(3) | MD(2) | MD(1))) == MD(2))
+ SH_CLK_SET_RATIO(&qspi_clk_ratio, 1, 16);
+ else
+ SH_CLK_SET_RATIO(&qspi_clk_ratio, 1, 20);
+
for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
ret = clk_register(main_clks[k]);
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 07/15] ARM: shmobile: genmai reference dts: Add RSPI nodes
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add pinctrl and SPI devices for RSPI on Genmai.
On this board, only rspi4 is in use. Its bus contains a single device
(a wm8978 audio codec), for which no bindings are defined yet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree at vger.kernel.org
---
v4:
- No changes
v3:
- No changes
v2:
- Use generic "codec" instead of specific "wm8978" node name.
arch/arm/boot/dts/r7s72100-genmai-reference.dts | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r7s72100-genmai-reference.dts b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
index 367af5c133e0..c2cc4bd5a470 100644
--- a/arch/arm/boot/dts/r7s72100-genmai-reference.dts
+++ b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
@@ -43,7 +43,7 @@
};
&pfc {
- pinctrl-0 = <&scif2_pins ðernet_pins>;
+ pinctrl-0 = <&scif2_pins ðernet_pins &rspi4_pins>;
pinctrl-names = "default";
scif2_pins: serial2 {
@@ -73,6 +73,12 @@
"ethernet_int_p1_15";
renesas,function = "ethernet";
};
+
+ rspi4_pins: spi4 {
+ renesas,groups = "rspi4_rspck_p4_0", "rspi4_ssl0_p4_1",
+ "rspi4_mosi_p4_2", "rspi4_miso_p4_3";
+ renesas,function = "rspi4";
+ };
};
&i2c2 {
@@ -85,3 +91,13 @@
pagesize = <64>;
};
};
+
+&spi4 {
+ status = "okay";
+
+ codec: codec at 0 {
+ compatible = "wlf,wm8978";
+ reg = <0>;
+ spi-max-frequency = <5000000>;
+ };
+};
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 06/15] ARM: shmobile: r7s72100 dtsi: Add RSPI nodes
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree at vger.kernel.org
---
v4:
- Switch to named IRQs
v3:
- No changes
v2:
- No changes
arch/arm/boot/dts/r7s72100.dtsi | 70 +++++++++++++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index ff0bd6be454f..d7013df6bb10 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -34,6 +34,11 @@
gpio10 = &port10;
gpio11 = &port11;
gpio12 = &jtagport0;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ spi2 = &spi2;
+ spi3 = &spi3;
+ spi4 = &spi4;
};
cpus {
@@ -289,4 +294,69 @@
clock-frequency = <100000>;
status = "disabled";
};
+
+ spi0: spi at e800c800 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800c800 0x24>;
+ interrupts = <0 238 IRQ_TYPE_LEVEL_HIGH>,
+ <0 239 IRQ_TYPE_LEVEL_HIGH>,
+ <0 240 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi1: spi at e800d000 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800d000 0x24>;
+ interrupts = <0 241 IRQ_TYPE_LEVEL_HIGH>,
+ <0 242 IRQ_TYPE_LEVEL_HIGH>,
+ <0 243 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi2: spi at e800d800 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800d800 0x24>;
+ interrupts = <0 244 IRQ_TYPE_LEVEL_HIGH>,
+ <0 245 IRQ_TYPE_LEVEL_HIGH>,
+ <0 246 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi3: spi at e800e000 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800e000 0x24>;
+ interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>,
+ <0 248 IRQ_TYPE_LEVEL_HIGH>,
+ <0 249 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi4: spi at e800e800 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800e800 0x24>;
+ interrupts = <0 250 IRQ_TYPE_LEVEL_HIGH>,
+ <0 251 IRQ_TYPE_LEVEL_HIGH>,
+ <0 252 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.7.9.5
^ permalink raw reply related
* [PATCH v2 05/15] ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add DT-style ("%08x.spi") clocks, as Genmai doesn't use the common
clock framework yet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
v2:
- No changes
arch/arm/mach-shmobile/clock-r7s72100.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index bf15b63c3d5a..f17a5db00221 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -194,6 +194,11 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
+ CLKDEV_DEV_ID("e800c800.spi", &mstp_clks[MSTP107]),
+ CLKDEV_DEV_ID("e800d000.spi", &mstp_clks[MSTP106]),
+ CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
+ CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
+ CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
--
1.7.9.5
^ permalink raw reply related
* [PATCH v2 04/15] ARM: shmobile: genmai defconfig: Enable RSPI
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
v2:
- No changes
arch/arm/configs/genmai_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/genmai_defconfig b/arch/arm/configs/genmai_defconfig
index ede35f400df2..401285305251 100644
--- a/arch/arm/configs/genmai_defconfig
+++ b/arch/arm/configs/genmai_defconfig
@@ -79,6 +79,8 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=10
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C_SH_MOBILE=y
+CONFIG_SPI=y
+CONFIG_SPI_RSPI=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
CONFIG_RCAR_THERMAL=y
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 03/15] [WIP] ARM: shmobile: genmai legacy: Add preliminary RSPI pinmux setup
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
This does not work yet, as there's no pinmux configuration in
setup-r7s72100.c
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
v4:
- The platform device basename was changed from "rspi" to "rspi-rz"
v3:
- No changes
v2:
- New
arch/arm/mach-shmobile/board-genmai.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/mach-shmobile/board-genmai.c b/arch/arm/mach-shmobile/board-genmai.c
index 0b01b7f7e240..3d02167967ec 100644
--- a/arch/arm/mach-shmobile/board-genmai.c
+++ b/arch/arm/mach-shmobile/board-genmai.c
@@ -19,6 +19,7 @@
*/
#include <linux/kernel.h>
+#include <linux/pinctrl/machine.h>
#include <linux/platform_device.h>
#include <linux/sh_eth.h>
#include <linux/spi/rspi.h>
@@ -77,9 +78,25 @@ static const struct spi_board_info spi_info[] __initconst = {
},
};
+static const struct pinctrl_map genmai_pinctrl_map[] = {
+ /* RSPI4 */
+ PIN_MAP_MUX_GROUP_DEFAULT("rspi-rz.4", "pfc-r7s72100",
+ "rspi4_rspck_p4_0", "rspi4"),
+ PIN_MAP_MUX_GROUP_DEFAULT("rspi-rz.4", "pfc-r7s72100",
+ "rspi4_ssl0_p4_1", "rspi4"),
+ PIN_MAP_MUX_GROUP_DEFAULT("rspi-rz.4", "pfc-r7s72100",
+ "rspi4_mosi_p4_2", "rspi4"),
+ PIN_MAP_MUX_GROUP_DEFAULT("rspi-rz.4", "pfc-r7s72100",
+ "rspi4_miso_p4_3", "rspi4"),
+};
+
static void __init genmai_add_standard_devices(void)
{
r7s72100_clock_init();
+ pinctrl_register_mappings(genmai_pinctrl_map,
+ ARRAY_SIZE(genmai_pinctrl_map));
+ /* FIXME there's no pinmux configuration in setup-r7s72100.c yet */
+ /* r7s72100_pinmux_init(); */
r7s72100_add_dt_devices();
r7s72100_register_rspi(0);
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 02/15] ARM: shmobile: genmai legacy: Add RSPI support
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add RSPI platform device, resources, platform data, and SPI child.
On this board, only rspi4 is in use. Its bus contains a single device
(a wm8978 audio codec).
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
v4:
- The platform device basename was changed from "rspi" to "rspi-rz",
dropping the platform data flags in the process
- Switch to named IRQs
v3:
- Move platform devices from setup-r7s72100.c to board-genmai.c, as
genmai-reference will use devices instantiated from DT
- Merge with "ARM: shmobile: genmai: Add RSPI children", as this now
touches the same file
- Instantiate SPI children in C on genmai only, as genmai-reference will
instantiate them from DT
v2:
- Correct platform device names ("rspi%u.0" -> "rspi.%u")
- Add missing platform data
- Correct summary (resources -> platform devices)
arch/arm/mach-shmobile/board-genmai.c | 42 +++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/arch/arm/mach-shmobile/board-genmai.c b/arch/arm/mach-shmobile/board-genmai.c
index a1f6fe1fb06f..0b01b7f7e240 100644
--- a/arch/arm/mach-shmobile/board-genmai.c
+++ b/arch/arm/mach-shmobile/board-genmai.c
@@ -21,6 +21,8 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/sh_eth.h>
+#include <linux/spi/rspi.h>
+#include <linux/spi/spi.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r7s72100.h>
@@ -41,11 +43,51 @@ static const struct resource ether_resources[] __initconst = {
DEFINE_RES_IRQ(gic_iid(359)),
};
+/* RSPI */
+#define RSPI_RESOURCE(idx, baseaddr, irq) \
+static const struct resource rspi##idx##_resources[] __initconst = { \
+ DEFINE_RES_MEM(baseaddr, 0x24), \
+ DEFINE_RES_IRQ_NAMED(irq, "error"), \
+ DEFINE_RES_IRQ_NAMED(irq + 1, "rx"), \
+ DEFINE_RES_IRQ_NAMED(irq + 2, "tx"), \
+}
+
+RSPI_RESOURCE(0, 0xe800c800, gic_iid(270));
+RSPI_RESOURCE(1, 0xe800d000, gic_iid(273));
+RSPI_RESOURCE(2, 0xe800d800, gic_iid(276));
+RSPI_RESOURCE(3, 0xe800e000, gic_iid(279));
+RSPI_RESOURCE(4, 0xe800e800, gic_iid(282));
+
+static const struct rspi_plat_data rspi_pdata __initconst = {
+ .num_chipselect = 1,
+};
+
+#define r7s72100_register_rspi(idx) \
+ platform_device_register_resndata(&platform_bus, "rspi-rz", idx, \
+ rspi##idx##_resources, \
+ ARRAY_SIZE(rspi##idx##_resources), \
+ &rspi_pdata, sizeof(rspi_pdata))
+
+static const struct spi_board_info spi_info[] __initconst = {
+ {
+ .modalias = "wm8978",
+ .max_speed_hz = 5000000,
+ .bus_num = 4,
+ .chip_select = 0,
+ },
+};
+
static void __init genmai_add_standard_devices(void)
{
r7s72100_clock_init();
r7s72100_add_dt_devices();
+ r7s72100_register_rspi(0);
+ r7s72100_register_rspi(1);
+ r7s72100_register_rspi(2);
+ r7s72100_register_rspi(3);
+ r7s72100_register_rspi(4);
+ spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
platform_device_register_resndata(&platform_bus, "r7s72100-ether", -1,
ether_resources,
ARRAY_SIZE(ether_resources),
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 01/15] ARM: shmobile: r7s72100 clock: Add RSPI clocks
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390567791-8988-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
v4:
- The platform device basename was changed from "rspi" to "rspi-rz"
v3:
- No changes
v2:
- Correct platform device names ("rspi%u" -> "rspi.%u")
arch/arm/mach-shmobile/clock-r7s72100.c | 21 ++++++++++++++++++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index 0242ca5f499a..bf15b63c3d5a 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -22,13 +22,15 @@
#include <mach/common.h>
#include <mach/r7s72100.h>
-/* registers */
+/* Frequency Control Registers */
#define FRQCR 0xfcfe0010
#define FRQCR2 0xfcfe0014
+/* Standby Control Registers */
#define STBCR3 0xfcfe0420
#define STBCR4 0xfcfe0424
#define STBCR7 0xfcfe0430
#define STBCR9 0xfcfe0438
+#define STBCR10 0xfcfe043c
#define PLL_RATE 30
@@ -146,12 +148,20 @@ struct clk div4_clks[DIV4_NR] = {
| CLK_ENABLE_ON_INIT),
};
-enum { MSTP97, MSTP96, MSTP95, MSTP94,
+enum {
+ MSTP107, MSTP106, MSTP105, MSTP104, MSTP103,
+ MSTP97, MSTP96, MSTP95, MSTP94,
MSTP74,
MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
- MSTP33, MSTP_NR };
+ MSTP33, MSTP_NR
+};
static struct clk mstp_clks[MSTP_NR] = {
+ [MSTP107] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 7, 0), /* RSPI0 */
+ [MSTP106] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 6, 0), /* RSPI1 */
+ [MSTP105] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 5, 0), /* RSPI2 */
+ [MSTP104] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 4, 0), /* RSPI3 */
+ [MSTP103] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 3, 0), /* RSPI4 */
[MSTP97] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 7, 0), /* RIIC0 */
[MSTP96] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 6, 0), /* RIIC1 */
[MSTP95] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 5, 0), /* RIIC2 */
@@ -179,6 +189,11 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
/* MSTP clocks */
+ CLKDEV_DEV_ID("rspi-rz.0", &mstp_clks[MSTP107]),
+ CLKDEV_DEV_ID("rspi-rz.1", &mstp_clks[MSTP106]),
+ CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
+ CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
+ CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
--
1.7.9.5
^ permalink raw reply related
* [PATCH 00/15] ARM: shmobile: RSPI RZ and QSPI SoC and board integration
From: Geert Uytterhoeven @ 2014-01-24 12:49 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon, Magnus,
This patch series contains SoC and board integration for
1. RSPI in the r7s72100 aka RZ/A1H SoC on the Genmai reference board,
2. QSPI in the r8a7791 aka R-Car M2 SoC on the Koelsch reference board.
It was tested on the r7s72100-based Genmai reference board using loopback
mode, and on the r8a7791-based Koelsch reference board using the Spansion
s25fl512s SPI FLASH.
Actual functioning for some parts may depend on the series "[PATCH 0/14]
spi: rspi: Add support for RZ/A1H, DT, and Quad/Dual on QSPI" I posted
earlier today.
Overview:
[v4 01/15] ARM: shmobile: r7s72100 clock: Add RSPI clocks
[v4 02/15] ARM: shmobile: genmai legacy: Add RSPI support
[v4 03/15] [WIP] ARM: shmobile: genmai legacy: Add preliminary RSPI
pinmux setup
[v2 04/15] ARM: shmobile: genmai defconfig: Enable RSPI
[v2 05/15] ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
[v4 06/15] ARM: shmobile: r7s72100 dtsi: Add RSPI nodes
[v4 07/15] ARM: shmobile: genmai reference dts: Add RSPI nodes
[v3 08/15] ARM: shmobile: r8a7791 clock: add QSPI clocks
[v3 09/15] ARM: shmobile: koelsch legacy: Add QSPI support
[v3 10/15] ARM: shmobile: koelsch defconfig: Enable RSPI and MTD_M25P80
[v2 11/15] ARM: shmobile: r8a7791 dtsi: Add QSPI node
[v2 12/15] ARM: shmobile: koelsch dts: Add QSPI nodes
[ 13/15] ARM: shmobile: lager legacy: Switch QSPI to named IRQs
[ 14/15] ARM: shmobile: koelsch legacy: Enable Quad SPI transfers for
the SPI FLASH
[ 15/15] ARM: shmobile: koelsch dts: Enable Quad SPI transfers
Earlier versions of these have been posted before in:
"[PATCH V3 0/5] SoC and board integration for RSPI on r7s72100/genmai"
"[PATCH V2 0/4] SoC and board integration for QSPI on r8a7791/koelsch"
"[PATCH 0/9] Renesas RSPI/QSPI DT support"
The series is based on renesas-devel-v3.13-20140124, with pinctrl work
accepted by Linus, Magnus' pinctrl, Wolfram's riic, Simon's sh_eth,
Valentine's i2c, and Laurent's SCIF DT work applied on top.
[Simon: I don't know in which order you will merge these. If you want me
to rebase my patches, just ask! Thanks!]
All of these should be safe to apply, without runtime dependencies on other
parts, except for [14/15] and [15/15]: those must not go in before
"[14/14] spi: rspi: Add support for Quad and Dual SPI Transfers on QSPI",
as this would disable SPI FLASH access (the SPI core rejects Quad SPI slaves
without Quad SPI master support).
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH 18/20] clocksource / acpi: Add macro CLOCKSOURCE_ACPI_DECLARE
From: Mark Rutland @ 2014-01-24 12:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52E1AFE8.40601@linaro.org>
On Fri, Jan 24, 2014 at 12:12:24AM +0000, Hanjun Guo wrote:
> Hi Linus,
>
> Sorry for the late reply.
>
> On 2014?01?22? 16:26, Linus Walleij wrote:
> > On Fri, Jan 17, 2014 at 1:25 PM, Hanjun Guo <hanjun.guo@linaro.org> wrote:
> >
> >> From: Amit Daniel Kachhap <amit.daniel@samsung.com>
> >>
> >> This macro does the same job as CLOCKSOURCE_OF_DECLARE. The device
> >> name from the ACPI timer table is matched with all the registered
> >> timer controllers and matching initialisation routine is invoked.
> >>
> >> Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
> >> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
> > Actually I have a fat patch renaming CLOCKSOURCE_OF_DECLARE()
> > to TIMER_OF_DECLARE() and I think this macro, if needed, should
> > be named TIMER_ACPI_DECLARE().
> >
> > The reason is that "clocksource" is a Linux-internal name and this
> > macro pertains to the hardware name in respective system
> > description type.
>
> That make sense to me too, I will update in next version if
> this patch is still needed.
>
> >
> >> +#ifdef CONFIG_ACPI
> >> +#define CLOCKSOURCE_ACPI_DECLARE(name, compat, fn) \
> >> + static const struct acpi_device_id __clksrc_acpi_table_##name \
> >> + __used __section(__clksrc_acpi_table) \
> >> + = { .id = compat, \
> >> + .driver_data = (kernel_ulong_t)fn }
> >> +#else
> >> +#define CLOCKSOURCE_ACPI_DECLARE(name, compat, fn)
> >> +#endif
> > This hammers down the world to compile one binary for ACPI
> > and one binary for device tree. Maybe that's fine, I don't know.
>
> This is a problem we can have some discussion on it.
> I prefer mutually exclusive ACPI and DT support.
A lot of work has been put into making a single kernel boot everywhere.
It's forced duplicated code to be factored out, and it's made the kernel
more flexible. While it has been painful, it's forced a far higher
quality standard across the board(s).
Having a separate ACPI-capable or DT-capable kernels goes completely
against that, and it's completely broken:
* It doubles the testing effort required for a particular kernel. I can
guarantee that we will miss bugs (even amazingly bad build bugs)
because no-one will be able to test a full suite of kernels.
* It introduces the possibility of completely pointles arbitrary
differences between the two. How long until we see the first bug-fix
that only works in one configuration?
* It creates additional work for distributions, which need to build more
kernels test them, distribute them, and document which platforms which
kernels are supported on. This creates more pain for end-users too.
Eventually we _will_ get fed up with all of those, and we'll have to do
painful invasive work to make the kernel decide at runtime.
Having separate kernels is a lazy shortcut. It's painful for everyone,
leads to a greater maintenance overhead, it's not what we want now and
not what we want in future.
No thanks.
Either the kernel figures out whether or not to deal with ACPI at
runtime, or it doesn't deal with it at all.
Thanks,
Mark.
^ permalink raw reply
* [PATCH] ARM-i.MX6Q-dts : Added USB_OTG Support
From: Fabio Estevam @ 2014-01-24 12:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140124115005.GG814@e106331-lin.cambridge.arm.com>
Hi Mark,
On Fri, Jan 24, 2014 at 9:50 AM, Mark Rutland <mark.rutland@arm.com> wrote:
>> +
>> + regulators {
>> + compatible = "simple-bus";
>
> This is _not_ a simple bus. It doesn't have the required ranges
> property.
>
> Why do these need to be in a regulators container node? We don't group
> dma controllers under a dmas node, or uarts under a uarts node.
It seems we have this same issue on several imx6 dts files.
Would the below address your suggestion?
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-
index e75e11b..ba35560 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -15,33 +15,29 @@
reg = <0x10000000 0x40000000>;
};
- regulators {
- compatible = "simple-bus";
-
- reg_usb_otg_vbus: usb_otg_vbus {
- compatible = "regulator-fixed";
- regulator-name = "usb_otg_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio3 22 0>;
- enable-active-high;
- };
+ reg_usb_otg_vbus: regulator at 0 {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio3 22 0>;
+ enable-active-high;
+ };
- reg_usb_h1_vbus: usb_h1_vbus {
- compatible = "regulator-fixed";
- regulator-name = "usb_h1_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio1 29 0>;
- enable-active-high;
- };
+ reg_usb_h1_vbus: regulator at 1 {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio1 29 0>;
+ enable-active-high;
+ };
- reg_audio: wm8962_supply {
- compatible = "regulator-fixed";
- regulator-name = "wm8962-supply";
- gpio = <&gpio4 10 0>;
- enable-active-high;
- };
+ reg_audio: regulator at 2 {
+ compatible = "regulator-fixed";
+ regulator-name = "wm8962-supply";
+ gpio = <&gpio4 10 0>;
+ enable-active-high;
};
gpio-keys {
If so, I will prepare some patches to update other dts files.
Thanks,
Fabio Estevam
^ permalink raw reply related
* [PATCH 18/20] clocksource / acpi: Add macro CLOCKSOURCE_ACPI_DECLARE
From: Mark Rutland @ 2014-01-24 12:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52E1B1DE.5050507@linaro.org>
On Fri, Jan 24, 2014 at 12:20:46AM +0000, Hanjun Guo wrote:
> On 2014?01?22? 19:45, Mark Rutland wrote:
> > On Wed, Jan 22, 2014 at 08:26:50AM +0000, Linus Walleij wrote:
> >> On Fri, Jan 17, 2014 at 1:25 PM, Hanjun Guo <hanjun.guo@linaro.org> wrote:
> >>
> >>> From: Amit Daniel Kachhap <amit.daniel@samsung.com>
> >>>
> >>> This macro does the same job as CLOCKSOURCE_OF_DECLARE. The device
> >>> name from the ACPI timer table is matched with all the registered
> >>> timer controllers and matching initialisation routine is invoked.
> >>>
> >>> Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
> >>> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
> >> Actually I have a fat patch renaming CLOCKSOURCE_OF_DECLARE()
> >> to TIMER_OF_DECLARE() and I think this macro, if needed, should
> >> be named TIMER_ACPI_DECLARE().
> >>
> >> The reason is that "clocksource" is a Linux-internal name and this
> >> macro pertains to the hardware name in respective system
> >> description type.
> >>
> >>> +#ifdef CONFIG_ACPI
> >>> +#define CLOCKSOURCE_ACPI_DECLARE(name, compat, fn) \
> >>> + static const struct acpi_device_id __clksrc_acpi_table_##name \
> >>> + __used __section(__clksrc_acpi_table) \
> >>> + = { .id = compat, \
> >>> + .driver_data = (kernel_ulong_t)fn }
> >>> +#else
> >>> +#define CLOCKSOURCE_ACPI_DECLARE(name, compat, fn)
> >>> +#endif
> >> This hammers down the world to compile one binary for ACPI
> >> and one binary for device tree. Maybe that's fine, I don't know.
> > How does it do that?
> >
> > As far as I could tell CONFIG_ACPI and CONFIG_OF are not mutually
> > exclusive, and this just means that we only build the datastructures for
> > matching from ACPI when CONFIG_ACPI is enabled.
> >
> > Have I missed something?
> >
> > I definitely don't want to see mutually exclusive ACPI and DT support.
>
> ACPI and DT did the same job so I think they should mutually exclusive.
> if we enable both DT and ACPI in one system, this will leading confusions.
ACPI and DT do similar jobs, and we should be mutually exclusive at
runtime. However, they should not be mutually exclusive at compile-time.
Being mutually exclusive at compile-time is just broken. It creates more
work for distributions (who need to ship double the number of kernels),
it increases the number of configurations requiring testing, and it
makes it easier for bugs to be introduced. It's just painful, and
there's no reason for it.
At boot time the kernel needs to decide which to use for hardware
description, and completely ignore the other (which should not be
present, but lets not assume that or inevitably someone will break that
assumption for a quick hack).
The same kernel should boot on a system that has a DTB or a system that
has ACPI tables. On a system that's provided both it should use one or
the other, but not both.
Thanks,
Mark.
^ permalink raw reply
* [PATCH] ARM-i.MX6Q-dts : Added USB_OTG Support
From: Mark Rutland @ 2014-01-24 11:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390555724-9779-1-git-send-email-ashutosh.s@phytec.in>
On Fri, Jan 24, 2014 at 09:28:44AM +0000, Ashutosh singh wrote:
> This patch adds support for USB_OTG on Phytec phyFLEX-i.MX6 Quad module.
>
> Signed-off-by: Ashutosh singh <ashutosh.s@phytec.in>
> ---
> arch/arm/boot/dts/imx6q-phytec-pbab01.dts | 4 ++++
> arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi | 22 ++++++++++++++++++++++
> 2 files changed, 26 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6q-phytec-pbab01.dts b/arch/arm/boot/dts/imx6q-phytec-pbab01.dts
> index 7d37ec6..39e69bd 100644
> --- a/arch/arm/boot/dts/imx6q-phytec-pbab01.dts
> +++ b/arch/arm/boot/dts/imx6q-phytec-pbab01.dts
> @@ -32,3 +32,7 @@
> &usdhc3 {
> status = "okay";
> };
> +
> +&usbotg {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi
> index 1a3b50d..dcb1d59 100644
> --- a/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi
> +++ b/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi
> @@ -18,6 +18,19 @@
> memory {
> reg = <0x10000000 0x80000000>;
> };
> +
> + regulators {
> + compatible = "simple-bus";
This is _not_ a simple bus. It doesn't have the required ranges
property.
Why do these need to be in a regulators container node? We don't group
dma controllers under a dmas node, or uarts under a uarts node.
> +
> + reg_usb_otg_vbus: usb_otg_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + gpio = <&gpio4 15 0>;
> + enable-active-low;
> + };
> + };
> };
Thanks,
Mark.
^ permalink raw reply
* [PATCHv3 30/41] ARM: omap3-n900.dts: add display information
From: Tomi Valkeinen @ 2014-01-24 11:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140121152605.GA5983@earth.universe>
On 2014-01-21 17:26, Sebastian Reichel wrote:
> On Tue, Jan 21, 2014 at 12:57:02PM +0200, Tomi Valkeinen wrote:
>> Add DT data for OMAP3 N900 board. The board has the following
>> displays:
>>
>> lcd: LCD panel connected to OMAP's SDI output
>> tv: analog svideo
>>
>> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
>
> Your dss-dt-review-3 branch boots on my N900 with working display.
>
> Tested-by: Sebastian Reichel <sre@debian.org>
Ok, thanks!
Tomi
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^ permalink raw reply
* [PATCH V4 5/5] Documentation: power: reset: Add documentation for generic SYSCON reboot driver
From: Mark Rutland @ 2014-01-24 11:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390504801-24483-6-git-send-email-fkan@apm.com>
On Thu, Jan 23, 2014 at 07:20:01PM +0000, Feng Kan wrote:
> Add documentation for generic SYSCON reboot driver.
>
> Signed-off-by: Feng Kan <fkan@apm.com>
> ---
> .../bindings/power/reset/syscon-reboot.txt | 16 ++++++++++++++++
> 1 files changed, 16 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/power/reset/syscon-reboot.txt
>
> diff --git a/Documentation/devicetree/bindings/power/reset/syscon-reboot.txt b/Documentation/devicetree/bindings/power/reset/syscon-reboot.txt
> new file mode 100644
> index 0000000..e9eb1fe
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/reset/syscon-reboot.txt
> @@ -0,0 +1,16 @@
> +Generic SYSCON mapped register reset driver
Bindings should describe hardware, not drivers.
What precisely does this binding describe?
> +
> +Required properties:
> +- compatible: should contain "syscon-reboot"
> +- regmap: this is phandle to the register map node
> +- offset: offset in the register map for the reboot register
> +- mask: the reset value written to the reboot register
> +
> +Examples:
> +
> +reboot {
> + compatible = "syscon-reboot";
> + regmap = <®mapnode>;
> + offset = <0x0>;
> + mask = <0x1>;
> +};
Access size? Endianness?
Why can we not have a binding for the register bank this exists in, and
have that pass on the appropriate details to a syscon-reboot driver?
That way we can change the way we poke things without requiring changes
to bindings or dts.
Thanks,
Mark.
^ permalink raw reply
* [PATCH v4 2/3] serial: fsl_lpuart: add DMA support
From: Mark Rutland @ 2014-01-24 11:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390363773-24108-3-git-send-email-yao.yuan@freescale.com>
On Wed, Jan 22, 2014 at 04:09:32AM +0000, Yuan Yao wrote:
> Add dma support for lpuart. This function depend on DMA driver.
> You can turn on it by write both the dmas and dma-name properties in dts node.
>
> Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
> ---
> .../devicetree/bindings/serial/fsl-lpuart.txt | 19 +-
> drivers/tty/serial/fsl_lpuart.c | 430 ++++++++++++++++++++-
> 2 files changed, 433 insertions(+), 16 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
> index 6fd1dd1..6e1cbbf 100644
> --- a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
> +++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
> @@ -5,10 +5,21 @@ Required properties:
> - reg : Address and length of the register set for the device
> - interrupts : Should contain uart interrupt
>
> +Optional properties:
> +- dmas: Generic dma devicetree binding as described
> + in Documentation/devicetree/bindings/dma/dma.txt.
> +- dma-names: Two dmas have to be defined, "rx" and "tx".
> + An ordered list of channel names affiliated to the above.
Please describe dmas in terms of dma-names (as with the patch describing
clocks and clock-names).
It would be nice to describe the type of the dmas property, but I see
that we have a propblem with inconsistent terminology in the area of
${THING}-specifiers, so I'll try to get that cleaned up separately.
Cheers,
Mark.
^ permalink raw reply
* [PATCH v4 3/3] serial: fsl_lpuart: documented the clock requirement.
From: Mark Rutland @ 2014-01-24 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390363773-24108-4-git-send-email-yao.yuan@freescale.com>
On Wed, Jan 22, 2014 at 04:09:33AM +0000, Yuan Yao wrote:
> It was previously required but not documented.
> Add the text to the binding along with the new "dmas" addition.
>
> Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
> ---
> Documentation/devicetree/bindings/serial/fsl-lpuart.txt | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
> index 6e1cbbf..9666f97 100644
> --- a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
> +++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
> @@ -4,6 +4,8 @@ Required properties:
> - compatible : Should be "fsl,<soc>-lpuart"
> - reg : Address and length of the register set for the device
> - interrupts : Should contain uart interrupt
> +- clocks : phandle + clock specifier pairs, one for each entry in clock-names
> +- clock-names : should contain: "ipg" - the uart clock
>
> Optional properties:
> - dmas: Generic dma devicetree binding as described
> @@ -19,6 +21,8 @@ uart0: serial at 40027000 {
> compatible = "fsl,vf610-lpuart";
> reg = <0x40027000 0x1000>;
> interrupts = <0 61 0x00>;
> + clocks = <&clks VF610_CLK_UART0>;
> + clock-names = "ipg";
> dmas = <&edma0 0 2>,
> <&edma0 0 3>;
> dma-names = "rx","tx";
As this was a previous requirement, and this is a correction to the
documentation rather than a binding change:
Acked-by: Mark Rutland <mark.rutland@arm.com>
Thanks,
Mark.
^ permalink raw reply
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