* [PATCH 08/18] mfd: max14577: Rename state container to maxim_core
From: Krzysztof Kozlowski @ 2014-01-28 12:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390911522-28209-1-git-send-email-k.kozlowski@samsung.com>
This patch continues the preparation for adding support for max77836
device to existing max14577 driver.
The patch renames the struct "max14577" state container to "maxim_core".
This is only a rename-like patch, new code is not added.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
---
drivers/extcon/extcon-max14577.c | 22 +++++------
drivers/mfd/max14577.c | 68 +++++++++++++++++-----------------
drivers/power/max14577_charger.c | 16 ++++----
drivers/regulator/max14577.c | 6 +--
include/linux/mfd/max14577-private.h | 5 ++-
5 files changed, 60 insertions(+), 57 deletions(-)
diff --git a/drivers/extcon/extcon-max14577.c b/drivers/extcon/extcon-max14577.c
index 6f7145a929cf..2879cc5844dc 100644
--- a/drivers/extcon/extcon-max14577.c
+++ b/drivers/extcon/extcon-max14577.c
@@ -41,7 +41,7 @@ enum max14577_muic_status {
struct max14577_muic_info {
struct device *dev;
- struct max14577 *max14577;
+ struct maxim_core *maxim_core;
struct extcon_dev *edev;
int prev_cable_type;
int prev_chg_type;
@@ -176,7 +176,7 @@ static int max14577_muic_set_debounce_time(struct max14577_muic_info *info,
case ADC_DEBOUNCE_TIME_10MS:
case ADC_DEBOUNCE_TIME_25MS:
case ADC_DEBOUNCE_TIME_38_62MS:
- ret = max14577_update_reg(info->max14577->regmap,
+ ret = max14577_update_reg(info->maxim_core->regmap,
MAXIM_MUIC_REG_CONTROL3,
MAXIM_CONTROL3_ADCDBSET_MASK,
time << MAXIM_CONTROL3_ADCDBSET_SHIFT);
@@ -210,7 +210,7 @@ static int max14577_muic_set_path(struct max14577_muic_info *info,
u8 ctrl1, ctrl2 = 0;
/* Set open state to path before changing hw path */
- ret = max14577_update_reg(info->max14577->regmap,
+ ret = max14577_update_reg(info->maxim_core->regmap,
MAXIM_MUIC_REG_CONTROL1,
MAXIM_CONTROL1_CLEAR_IDBEN_MICEN_MASK,
MAXIM_CONTROL1_SW_OPEN);
@@ -224,7 +224,7 @@ static int max14577_muic_set_path(struct max14577_muic_info *info,
else
ctrl1 = MAXIM_CONTROL1_SW_OPEN;
- ret = max14577_update_reg(info->max14577->regmap,
+ ret = max14577_update_reg(info->maxim_core->regmap,
MAXIM_MUIC_REG_CONTROL1,
MAXIM_CONTROL1_CLEAR_IDBEN_MICEN_MASK, ctrl1);
if (ret < 0) {
@@ -237,7 +237,7 @@ static int max14577_muic_set_path(struct max14577_muic_info *info,
else
ctrl2 |= MAXIM_CONTROL2_LOWPWR_MASK; /* LowPwr=1, CPEn=0 */
- ret = max14577_update_reg(info->max14577->regmap,
+ ret = max14577_update_reg(info->maxim_core->regmap,
MAXIM_MUIC_REG_CONTROL2,
MAXIM_CONTROL2_LOWPWR_MASK | MAXIM_CONTROL2_CPEN_MASK,
ctrl2);
@@ -505,7 +505,7 @@ static void max14577_muic_irq_work(struct work_struct *work)
mutex_lock(&info->mutex);
- ret = max14577_bulk_read(info->max14577->regmap,
+ ret = max14577_bulk_read(info->maxim_core->regmap,
MAXIM_MUIC_REG_STATUS1, info->status, 2);
if (ret) {
dev_err(info->dev, "failed to read MUIC register\n");
@@ -581,7 +581,7 @@ static int max14577_muic_detect_accessory(struct max14577_muic_info *info)
mutex_lock(&info->mutex);
/* Read STATUSx register to detect accessory */
- ret = max14577_bulk_read(info->max14577->regmap,
+ ret = max14577_bulk_read(info->maxim_core->regmap,
MAXIM_MUIC_REG_STATUS1, info->status, 2);
if (ret) {
dev_err(info->dev, "failed to read MUIC register\n");
@@ -626,7 +626,7 @@ static void max14577_muic_detect_cable_wq(struct work_struct *work)
static int max14577_muic_probe(struct platform_device *pdev)
{
- struct max14577 *max14577 = dev_get_drvdata(pdev->dev.parent);
+ struct maxim_core *maxim_core = dev_get_drvdata(pdev->dev.parent);
struct max14577_muic_info *info;
int delay_jiffies;
int ret;
@@ -639,7 +639,7 @@ static int max14577_muic_probe(struct platform_device *pdev)
return -ENOMEM;
}
info->dev = &pdev->dev;
- info->max14577 = max14577;
+ info->maxim_core = maxim_core;
platform_set_drvdata(pdev, info);
mutex_init(&info->mutex);
@@ -651,7 +651,7 @@ static int max14577_muic_probe(struct platform_device *pdev)
struct max14577_muic_irq *muic_irq = &muic_irqs[i];
unsigned int virq = 0;
- virq = regmap_irq_get_virq(max14577->irq_data, muic_irq->irq);
+ virq = regmap_irq_get_virq(maxim_core->irq_data, muic_irq->irq);
if (!virq)
return -EINVAL;
muic_irq->virq = virq;
@@ -693,7 +693,7 @@ static int max14577_muic_probe(struct platform_device *pdev)
max14577_muic_set_path(info, info->path_uart, true);
/* Check revision number of MUIC device*/
- ret = max14577_read_reg(info->max14577->regmap,
+ ret = max14577_read_reg(info->maxim_core->regmap,
MAXIM_MUIC_REG_DEVICEID, &id);
if (ret < 0) {
dev_err(&pdev->dev, "failed to read revision number\n");
diff --git a/drivers/mfd/max14577.c b/drivers/mfd/max14577.c
index a054f6f6c16d..f160e582712d 100644
--- a/drivers/mfd/max14577.c
+++ b/drivers/mfd/max14577.c
@@ -85,7 +85,7 @@ static const struct regmap_irq_chip max14577_irq_chip = {
static int max14577_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
- struct max14577 *max14577;
+ struct maxim_core *maxim_core;
struct max14577_platform_data *pdata = dev_get_platdata(&i2c->dev);
struct device_node *np = i2c->dev.of_node;
u8 reg_data;
@@ -103,70 +103,70 @@ static int max14577_i2c_probe(struct i2c_client *i2c,
return -EINVAL;
}
- max14577 = devm_kzalloc(&i2c->dev, sizeof(*max14577), GFP_KERNEL);
- if (!max14577)
+ maxim_core = devm_kzalloc(&i2c->dev, sizeof(*maxim_core), GFP_KERNEL);
+ if (!maxim_core)
return -ENOMEM;
- i2c_set_clientdata(i2c, max14577);
- max14577->dev = &i2c->dev;
- max14577->i2c = i2c;
- max14577->irq = i2c->irq;
+ i2c_set_clientdata(i2c, maxim_core);
+ maxim_core->dev = &i2c->dev;
+ maxim_core->i2c = i2c;
+ maxim_core->irq = i2c->irq;
- max14577->regmap = devm_regmap_init_i2c(i2c,
- &max14577_muic_regmap_config);
- if (IS_ERR(max14577->regmap)) {
- ret = PTR_ERR(max14577->regmap);
- dev_err(max14577->dev, "Failed to allocate register map: %d\n",
+ maxim_core->regmap = devm_regmap_init_i2c(i2c,
+ &max14577_muic_regmap_config);
+ if (IS_ERR(maxim_core->regmap)) {
+ ret = PTR_ERR(maxim_core->regmap);
+ dev_err(maxim_core->dev, "Failed to allocate register map: %d\n",
ret);
return ret;
}
- ret = max14577_read_reg(max14577->regmap, MAXIM_MUIC_REG_DEVICEID,
+ ret = max14577_read_reg(maxim_core->regmap, MAXIM_MUIC_REG_DEVICEID,
®_data);
if (ret) {
- dev_err(max14577->dev, "Device not found on this channel: %d\n",
+ dev_err(maxim_core->dev, "Device not found on this channel: %d\n",
ret);
return ret;
}
- max14577->vendor_id = ((reg_data & MAXIM_DEVID_VENDORID_MASK) >>
+ maxim_core->vendor_id = ((reg_data & MAXIM_DEVID_VENDORID_MASK) >>
MAXIM_DEVID_VENDORID_SHIFT);
- max14577->device_id = ((reg_data & MAXIM_DEVID_DEVICEID_MASK) >>
+ maxim_core->device_id = ((reg_data & MAXIM_DEVID_DEVICEID_MASK) >>
MAXIM_DEVID_DEVICEID_SHIFT);
- dev_info(max14577->dev, "Device ID: 0x%x, vendor: 0x%x\n",
- max14577->device_id, max14577->vendor_id);
+ dev_info(maxim_core->dev, "Device ID: 0x%x, vendor: 0x%x\n",
+ maxim_core->device_id, maxim_core->vendor_id);
- ret = regmap_add_irq_chip(max14577->regmap, max14577->irq,
+ ret = regmap_add_irq_chip(maxim_core->regmap, maxim_core->irq,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 0,
&max14577_irq_chip,
- &max14577->irq_data);
+ &maxim_core->irq_data);
if (ret != 0) {
dev_err(&i2c->dev, "Failed to request IRQ %d: %d\n",
- max14577->irq, ret);
+ maxim_core->irq, ret);
return ret;
}
- ret = mfd_add_devices(max14577->dev, -1, max14577_devs,
+ ret = mfd_add_devices(maxim_core->dev, -1, max14577_devs,
ARRAY_SIZE(max14577_devs), NULL, 0,
- regmap_irq_get_domain(max14577->irq_data));
+ regmap_irq_get_domain(maxim_core->irq_data));
if (ret < 0)
goto err_mfd;
- device_init_wakeup(max14577->dev, 1);
+ device_init_wakeup(maxim_core->dev, 1);
return 0;
err_mfd:
- regmap_del_irq_chip(max14577->irq, max14577->irq_data);
+ regmap_del_irq_chip(maxim_core->irq, maxim_core->irq_data);
return ret;
}
static int max14577_i2c_remove(struct i2c_client *i2c)
{
- struct max14577 *max14577 = i2c_get_clientdata(i2c);
+ struct maxim_core *maxim_core = i2c_get_clientdata(i2c);
- mfd_remove_devices(max14577->dev);
- regmap_del_irq_chip(max14577->irq, max14577->irq_data);
+ mfd_remove_devices(maxim_core->dev);
+ regmap_del_irq_chip(maxim_core->irq, maxim_core->irq_data);
return 0;
}
@@ -180,10 +180,10 @@ MODULE_DEVICE_TABLE(i2c, max14577_i2c_id);
static int max14577_suspend(struct device *dev)
{
struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);
- struct max14577 *max14577 = i2c_get_clientdata(i2c);
+ struct maxim_core *maxim_core = i2c_get_clientdata(i2c);
if (device_may_wakeup(dev)) {
- enable_irq_wake(max14577->irq);
+ enable_irq_wake(maxim_core->irq);
/*
* MUIC IRQ must be disabled during suspend if this is
* a wake up source because it will be handled before
@@ -194,7 +194,7 @@ static int max14577_suspend(struct device *dev)
* Interrupt handler tries to read registers but this read
* will fail because I2C is still suspended.
*/
- disable_irq(max14577->irq);
+ disable_irq(maxim_core->irq);
}
return 0;
@@ -203,11 +203,11 @@ static int max14577_suspend(struct device *dev)
static int max14577_resume(struct device *dev)
{
struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);
- struct max14577 *max14577 = i2c_get_clientdata(i2c);
+ struct maxim_core *maxim_core = i2c_get_clientdata(i2c);
if (device_may_wakeup(dev)) {
- disable_irq_wake(max14577->irq);
- enable_irq(max14577->irq);
+ disable_irq_wake(maxim_core->irq);
+ enable_irq(maxim_core->irq);
}
return 0;
diff --git a/drivers/power/max14577_charger.c b/drivers/power/max14577_charger.c
index 66a4e4edea42..335c42a13136 100644
--- a/drivers/power/max14577_charger.c
+++ b/drivers/power/max14577_charger.c
@@ -21,8 +21,8 @@
#include <linux/mfd/max14577-private.h>
struct max14577_charger {
- struct device *dev;
- struct max14577 *max14577;
+ struct device *dev;
+ struct maxim_core *maxim_core;
struct power_supply charger;
unsigned int charging_state;
@@ -31,7 +31,7 @@ struct max14577_charger {
static int max14577_get_charger_state(struct max14577_charger *chg)
{
- struct regmap *rmap = chg->max14577->regmap;
+ struct regmap *rmap = chg->maxim_core->regmap;
int state = POWER_SUPPLY_STATUS_DISCHARGING;
u8 reg_data;
@@ -87,7 +87,7 @@ static int max14577_get_charge_type(struct max14577_charger *chg)
static int max14577_get_online(struct max14577_charger *chg)
{
- struct regmap *rmap = chg->max14577->regmap;
+ struct regmap *rmap = chg->maxim_core->regmap;
u8 reg_data;
max14577_read_reg(rmap, MAXIM_MUIC_REG_STATUS2, ®_data);
@@ -116,7 +116,7 @@ static int max14577_get_online(struct max14577_charger *chg)
*/
static int max14577_get_battery_health(struct max14577_charger *chg)
{
- struct regmap *rmap = chg->max14577->regmap;
+ struct regmap *rmap = chg->maxim_core->regmap;
int state = POWER_SUPPLY_HEALTH_GOOD;
u8 reg_data;
@@ -156,7 +156,7 @@ static int max14577_get_present(struct max14577_charger *chg)
*/
static void max14577_charger_reg_init(struct max14577_charger *chg)
{
- struct regmap *rmap = chg->max14577->regmap;
+ struct regmap *rmap = chg->maxim_core->regmap;
u8 reg_data;
/*
@@ -262,7 +262,7 @@ static int max14577_charger_get_property(struct power_supply *psy,
static int max14577_charger_probe(struct platform_device *pdev)
{
struct max14577_charger *chg;
- struct max14577 *max14577 = dev_get_drvdata(pdev->dev.parent);
+ struct maxim_core *maxim_core = dev_get_drvdata(pdev->dev.parent);
int ret;
chg = devm_kzalloc(&pdev->dev, sizeof(*chg), GFP_KERNEL);
@@ -271,7 +271,7 @@ static int max14577_charger_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, chg);
chg->dev = &pdev->dev;
- chg->max14577 = max14577;
+ chg->maxim_core = maxim_core;
max14577_charger_reg_init(chg);
diff --git a/drivers/regulator/max14577.c b/drivers/regulator/max14577.c
index e65d61bb200f..ead56ec819b5 100644
--- a/drivers/regulator/max14577.c
+++ b/drivers/regulator/max14577.c
@@ -196,8 +196,8 @@ static inline struct device_node *match_of_node(int index)
static int max14577_regulator_probe(struct platform_device *pdev)
{
- struct max14577 *max14577 = dev_get_drvdata(pdev->dev.parent);
- struct max14577_platform_data *pdata = dev_get_platdata(max14577->dev);
+ struct maxim_core *maxim_core = dev_get_drvdata(pdev->dev.parent);
+ struct max14577_platform_data *pdata = dev_get_platdata(maxim_core->dev);
int i, ret;
struct regulator_config config = {};
@@ -206,7 +206,7 @@ static int max14577_regulator_probe(struct platform_device *pdev)
return ret;
config.dev = &pdev->dev;
- config.regmap = max14577->regmap;
+ config.regmap = maxim_core->regmap;
for (i = 0; i < ARRAY_SIZE(supported_regulators); i++) {
struct regulator_dev *regulator;
diff --git a/include/linux/mfd/max14577-private.h b/include/linux/mfd/max14577-private.h
index 9f5ce26cb54e..3fdc32b583be 100644
--- a/include/linux/mfd/max14577-private.h
+++ b/include/linux/mfd/max14577-private.h
@@ -247,7 +247,10 @@ enum maxim_irq {
MAXIM_IRQ_NUM,
};
-struct max14577 {
+/*
+ * State container for max14577-like drivers.
+ */
+struct maxim_core {
struct device *dev;
struct i2c_client *i2c; /* Slave addr = 0x4A */
--
1.7.9.5
^ permalink raw reply related
* [PATCH 07/18] mfd: max14577: Rename and add MAX14577 symbols to prepare for max77836
From: Krzysztof Kozlowski @ 2014-01-28 12:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390911522-28209-1-git-send-email-k.kozlowski@samsung.com>
This patch prepares for adding support for max77836 device to existing
max14577 driver:
1. Renames most of symbols and defines prefixed with MAX14577 to MAXIM.
2. Adds prefixes (MAXIM or MAX14577) to defines without any MAX* prefix.
This is only a rename-like patch, new code is not added.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
---
drivers/extcon/extcon-max14577.c | 105 ++++-----
drivers/mfd/max14577.c | 51 ++---
drivers/power/max14577_charger.c | 81 +++----
drivers/regulator/max14577.c | 44 ++--
include/linux/mfd/max14577-private.h | 399 ++++++++++++++++------------------
include/linux/mfd/max14577.h | 2 +-
6 files changed, 333 insertions(+), 349 deletions(-)
diff --git a/drivers/extcon/extcon-max14577.c b/drivers/extcon/extcon-max14577.c
index 59f084fee4f3..6f7145a929cf 100644
--- a/drivers/extcon/extcon-max14577.c
+++ b/drivers/extcon/extcon-max14577.c
@@ -86,14 +86,14 @@ struct max14577_muic_irq {
};
static struct max14577_muic_irq muic_irqs[] = {
- { MAX14577_IRQ_INT1_ADC, "muic-ADC" },
- { MAX14577_IRQ_INT1_ADCLOW, "muic-ADCLOW" },
- { MAX14577_IRQ_INT1_ADCERR, "muic-ADCError" },
- { MAX14577_IRQ_INT2_CHGTYP, "muic-CHGTYP" },
- { MAX14577_IRQ_INT2_CHGDETRUN, "muic-CHGDETRUN" },
- { MAX14577_IRQ_INT2_DCDTMR, "muic-DCDTMR" },
- { MAX14577_IRQ_INT2_DBCHG, "muic-DBCHG" },
- { MAX14577_IRQ_INT2_VBVOLT, "muic-VBVOLT" },
+ { MAXIM_IRQ_INT1_ADC, "muic-ADC" },
+ { MAXIM_IRQ_INT1_ADCLOW, "muic-ADCLOW" },
+ { MAXIM_IRQ_INT1_ADCERR, "muic-ADCError" },
+ { MAXIM_IRQ_INT2_CHGTYP, "muic-CHGTYP" },
+ { MAXIM_IRQ_INT2_CHGDETRUN, "muic-CHGDETRUN" },
+ { MAXIM_IRQ_INT2_DCDTMR, "muic-DCDTMR" },
+ { MAXIM_IRQ_INT2_DBCHG, "muic-DBCHG" },
+ { MAXIM_IRQ_INT2_VBVOLT, "muic-VBVOLT" },
};
/* Define supported accessory type */
@@ -177,9 +177,9 @@ static int max14577_muic_set_debounce_time(struct max14577_muic_info *info,
case ADC_DEBOUNCE_TIME_25MS:
case ADC_DEBOUNCE_TIME_38_62MS:
ret = max14577_update_reg(info->max14577->regmap,
- MAX14577_MUIC_REG_CONTROL3,
- CTRL3_ADCDBSET_MASK,
- time << CTRL3_ADCDBSET_SHIFT);
+ MAXIM_MUIC_REG_CONTROL3,
+ MAXIM_CONTROL3_ADCDBSET_MASK,
+ time << MAXIM_CONTROL3_ADCDBSET_SHIFT);
if (ret) {
dev_err(info->dev, "failed to set ADC debounce time\n");
return ret;
@@ -211,8 +211,9 @@ static int max14577_muic_set_path(struct max14577_muic_info *info,
/* Set open state to path before changing hw path */
ret = max14577_update_reg(info->max14577->regmap,
- MAX14577_MUIC_REG_CONTROL1,
- CLEAR_IDBEN_MICEN_MASK, CTRL1_SW_OPEN);
+ MAXIM_MUIC_REG_CONTROL1,
+ MAXIM_CONTROL1_CLEAR_IDBEN_MICEN_MASK,
+ MAXIM_CONTROL1_SW_OPEN);
if (ret < 0) {
dev_err(info->dev, "failed to update MUIC register\n");
return ret;
@@ -221,24 +222,25 @@ static int max14577_muic_set_path(struct max14577_muic_info *info,
if (attached)
ctrl1 = val;
else
- ctrl1 = CTRL1_SW_OPEN;
+ ctrl1 = MAXIM_CONTROL1_SW_OPEN;
ret = max14577_update_reg(info->max14577->regmap,
- MAX14577_MUIC_REG_CONTROL1,
- CLEAR_IDBEN_MICEN_MASK, ctrl1);
+ MAXIM_MUIC_REG_CONTROL1,
+ MAXIM_CONTROL1_CLEAR_IDBEN_MICEN_MASK, ctrl1);
if (ret < 0) {
dev_err(info->dev, "failed to update MUIC register\n");
return ret;
}
if (attached)
- ctrl2 |= CTRL2_CPEN_MASK; /* LowPwr=0, CPEn=1 */
+ ctrl2 |= MAXIM_CONTROL2_CPEN_MASK; /* LowPwr=0, CPEn=1 */
else
- ctrl2 |= CTRL2_LOWPWR_MASK; /* LowPwr=1, CPEn=0 */
+ ctrl2 |= MAXIM_CONTROL2_LOWPWR_MASK; /* LowPwr=1, CPEn=0 */
ret = max14577_update_reg(info->max14577->regmap,
- MAX14577_REG_CONTROL2,
- CTRL2_LOWPWR_MASK | CTRL2_CPEN_MASK, ctrl2);
+ MAXIM_MUIC_REG_CONTROL2,
+ MAXIM_CONTROL2_LOWPWR_MASK | MAXIM_CONTROL2_CPEN_MASK,
+ ctrl2);
if (ret < 0) {
dev_err(info->dev, "failed to update MUIC register\n");
return ret;
@@ -275,8 +277,9 @@ static int max14577_muic_get_cable_type(struct max14577_muic_info *info,
* Read ADC value to check cable type and decide cable state
* according to cable type
*/
- adc = info->status[MAX14577_MUIC_STATUS1] & STATUS1_ADC_MASK;
- adc >>= STATUS1_ADC_SHIFT;
+ adc = info->status[MAX14577_MUIC_STATUS1] &
+ MAXIM_STATUS1_ADC_MASK;
+ adc >>= MAXIM_STATUS1_ADC_SHIFT;
/*
* Check current cable state/cable type and store cable type
@@ -300,14 +303,14 @@ static int max14577_muic_get_cable_type(struct max14577_muic_info *info,
* according to type of charger cable.
*/
chg_type = info->status[MAX14577_MUIC_STATUS2] &
- STATUS2_CHGTYP_MASK;
- chg_type >>= STATUS2_CHGTYP_SHIFT;
+ MAXIM_STATUS2_CHGTYP_MASK;
+ chg_type >>= MAXIM_STATUS2_CHGTYP_SHIFT;
- if (chg_type == MAX14577_CHARGER_TYPE_NONE) {
+ if (chg_type == MAXIM_CHARGER_TYPE_NONE) {
*attached = false;
cable_type = info->prev_chg_type;
- info->prev_chg_type = MAX14577_CHARGER_TYPE_NONE;
+ info->prev_chg_type = MAXIM_CHARGER_TYPE_NONE;
} else {
*attached = true;
@@ -334,7 +337,7 @@ static int max14577_muic_jig_handler(struct max14577_muic_info *info,
{
char cable_name[32];
int ret = 0;
- u8 path = CTRL1_SW_OPEN;
+ u8 path = MAXIM_CONTROL1_SW_OPEN;
dev_dbg(info->dev,
"external connector is %s (adc:0x%02x)\n",
@@ -344,17 +347,17 @@ static int max14577_muic_jig_handler(struct max14577_muic_info *info,
case MAX14577_MUIC_ADC_FACTORY_MODE_USB_OFF: /* ADC_JIG_USB_OFF */
/* PATH:AP_USB */
strcpy(cable_name, "JIG-USB-OFF");
- path = CTRL1_SW_USB;
+ path = MAXIM_CONTROL1_SW_USB;
break;
case MAX14577_MUIC_ADC_FACTORY_MODE_USB_ON: /* ADC_JIG_USB_ON */
/* PATH:AP_USB */
strcpy(cable_name, "JIG-USB-ON");
- path = CTRL1_SW_USB;
+ path = MAXIM_CONTROL1_SW_USB;
break;
case MAX14577_MUIC_ADC_FACTORY_MODE_UART_OFF: /* ADC_JIG_UART_OFF */
/* PATH:AP_UART */
strcpy(cable_name, "JIG-UART-OFF");
- path = CTRL1_SW_UART;
+ path = MAXIM_CONTROL1_SW_UART;
break;
default:
dev_err(info->dev, "failed to detect %s jig cable\n",
@@ -457,7 +460,7 @@ static int max14577_muic_chg_handler(struct max14577_muic_info *info)
chg_type, info->prev_chg_type);
switch (chg_type) {
- case MAX14577_CHARGER_TYPE_USB:
+ case MAXIM_CHARGER_TYPE_USB:
/* PATH:AP_USB */
ret = max14577_muic_set_path(info, info->path_usb, attached);
if (ret < 0)
@@ -465,21 +468,21 @@ static int max14577_muic_chg_handler(struct max14577_muic_info *info)
extcon_set_cable_state(info->edev, "USB", attached);
break;
- case MAX14577_CHARGER_TYPE_DEDICATED_CHG:
+ case MAXIM_CHARGER_TYPE_DEDICATED_CHG:
extcon_set_cable_state(info->edev, "TA", attached);
break;
- case MAX14577_CHARGER_TYPE_DOWNSTREAM_PORT:
+ case MAXIM_CHARGER_TYPE_DOWNSTREAM_PORT:
extcon_set_cable_state(info->edev,
"Charge-downstream", attached);
break;
- case MAX14577_CHARGER_TYPE_SPECIAL_500MA:
+ case MAXIM_CHARGER_TYPE_SPECIAL_500MA:
extcon_set_cable_state(info->edev, "Slow-charger", attached);
break;
- case MAX14577_CHARGER_TYPE_SPECIAL_1A:
+ case MAXIM_CHARGER_TYPE_SPECIAL_1A:
extcon_set_cable_state(info->edev, "Fast-charger", attached);
break;
- case MAX14577_CHARGER_TYPE_NONE:
- case MAX14577_CHARGER_TYPE_DEAD_BATTERY:
+ case MAXIM_CHARGER_TYPE_NONE:
+ case MAXIM_CHARGER_TYPE_DEAD_BATTERY:
break;
default:
dev_err(info->dev,
@@ -503,7 +506,7 @@ static void max14577_muic_irq_work(struct work_struct *work)
mutex_lock(&info->mutex);
ret = max14577_bulk_read(info->max14577->regmap,
- MAX14577_MUIC_REG_STATUS1, info->status, 2);
+ MAXIM_MUIC_REG_STATUS1, info->status, 2);
if (ret) {
dev_err(info->dev, "failed to read MUIC register\n");
mutex_unlock(&info->mutex);
@@ -543,18 +546,18 @@ static irqreturn_t max14577_muic_irq_handler(int irq, void *data)
irq_type = muic_irqs[i].irq;
switch (irq_type) {
- case MAX14577_IRQ_INT1_ADC:
- case MAX14577_IRQ_INT1_ADCLOW:
- case MAX14577_IRQ_INT1_ADCERR:
+ case MAXIM_IRQ_INT1_ADC:
+ case MAXIM_IRQ_INT1_ADCLOW:
+ case MAXIM_IRQ_INT1_ADCERR:
/* Handle all of accessory except for
type of charger accessory */
info->irq_adc = true;
break;
- case MAX14577_IRQ_INT2_CHGTYP:
- case MAX14577_IRQ_INT2_CHGDETRUN:
- case MAX14577_IRQ_INT2_DCDTMR:
- case MAX14577_IRQ_INT2_DBCHG:
- case MAX14577_IRQ_INT2_VBVOLT:
+ case MAXIM_IRQ_INT2_CHGTYP:
+ case MAXIM_IRQ_INT2_CHGDETRUN:
+ case MAXIM_IRQ_INT2_DCDTMR:
+ case MAXIM_IRQ_INT2_DBCHG:
+ case MAXIM_IRQ_INT2_VBVOLT:
/* Handle charger accessory */
info->irq_chg = true;
break;
@@ -579,7 +582,7 @@ static int max14577_muic_detect_accessory(struct max14577_muic_info *info)
/* Read STATUSx register to detect accessory */
ret = max14577_bulk_read(info->max14577->regmap,
- MAX14577_MUIC_REG_STATUS1, info->status, 2);
+ MAXIM_MUIC_REG_STATUS1, info->status, 2);
if (ret) {
dev_err(info->dev, "failed to read MUIC register\n");
mutex_unlock(&info->mutex);
@@ -599,7 +602,7 @@ static int max14577_muic_detect_accessory(struct max14577_muic_info *info)
chg_type = max14577_muic_get_cable_type(info, MAX14577_CABLE_GROUP_CHG,
&attached);
- if (attached && chg_type != MAX14577_CHARGER_TYPE_NONE) {
+ if (attached && chg_type != MAXIM_CHARGER_TYPE_NONE) {
ret = max14577_muic_chg_handler(info);
if (ret < 0) {
dev_err(info->dev, "Cannot detect charger accessory\n");
@@ -682,8 +685,8 @@ static int max14577_muic_probe(struct platform_device *pdev)
}
/* Default h/w line path */
- info->path_usb = CTRL1_SW_USB;
- info->path_uart = CTRL1_SW_UART;
+ info->path_usb = MAXIM_CONTROL1_SW_USB;
+ info->path_uart = MAXIM_CONTROL1_SW_UART;
delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT);
/* Set initial path for UART */
@@ -691,7 +694,7 @@ static int max14577_muic_probe(struct platform_device *pdev)
/* Check revision number of MUIC device*/
ret = max14577_read_reg(info->max14577->regmap,
- MAX14577_REG_DEVICEID, &id);
+ MAXIM_MUIC_REG_DEVICEID, &id);
if (ret < 0) {
dev_err(&pdev->dev, "failed to read revision number\n");
goto err_extcon;
diff --git a/drivers/mfd/max14577.c b/drivers/mfd/max14577.c
index 75b37082a3fe..a054f6f6c16d 100644
--- a/drivers/mfd/max14577.c
+++ b/drivers/mfd/max14577.c
@@ -36,10 +36,10 @@ static struct mfd_cell max14577_devs[] = {
{ .name = "max14577-charger", },
};
-static bool max14577_volatile_reg(struct device *dev, unsigned int reg)
+static bool max14577_muic_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
- case MAX14577_REG_INT1 ... MAX14577_REG_STATUS3:
+ case MAXIM_MUIC_REG_INT1 ... MAXIM_MUIC_REG_STATUS3:
return true;
default:
break;
@@ -47,35 +47,35 @@ static bool max14577_volatile_reg(struct device *dev, unsigned int reg)
return false;
}
-static const struct regmap_config max14577_regmap_config = {
+static const struct regmap_config max14577_muic_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
- .volatile_reg = max14577_volatile_reg,
- .max_register = MAX14577_REG_END,
+ .volatile_reg = max14577_muic_volatile_reg,
+ .max_register = MAXIM_MUIC_REG_END,
};
static const struct regmap_irq max14577_irqs[] = {
/* INT1 interrupts */
- { .reg_offset = 0, .mask = INT1_ADC_MASK, },
- { .reg_offset = 0, .mask = INT1_ADCLOW_MASK, },
- { .reg_offset = 0, .mask = INT1_ADCERR_MASK, },
+ { .reg_offset = 0, .mask = MAXIM_INT1_ADC_MASK, },
+ { .reg_offset = 0, .mask = MAXIM_INT1_ADCLOW_MASK, },
+ { .reg_offset = 0, .mask = MAXIM_INT1_ADCERR_MASK, },
/* INT2 interrupts */
- { .reg_offset = 1, .mask = INT2_CHGTYP_MASK, },
- { .reg_offset = 1, .mask = INT2_CHGDETRUN_MASK, },
- { .reg_offset = 1, .mask = INT2_DCDTMR_MASK, },
- { .reg_offset = 1, .mask = INT2_DBCHG_MASK, },
- { .reg_offset = 1, .mask = INT2_VBVOLT_MASK, },
+ { .reg_offset = 1, .mask = MAXIM_INT2_CHGTYP_MASK, },
+ { .reg_offset = 1, .mask = MAXIM_INT2_CHGDETRUN_MASK, },
+ { .reg_offset = 1, .mask = MAXIM_INT2_DCDTMR_MASK, },
+ { .reg_offset = 1, .mask = MAXIM_INT2_DBCHG_MASK, },
+ { .reg_offset = 1, .mask = MAXIM_INT2_VBVOLT_MASK, },
/* INT3 interrupts */
- { .reg_offset = 2, .mask = INT3_EOC_MASK, },
- { .reg_offset = 2, .mask = INT3_CGMBC_MASK, },
- { .reg_offset = 2, .mask = INT3_OVP_MASK, },
- { .reg_offset = 2, .mask = INT3_MBCCHGERR_MASK, },
+ { .reg_offset = 2, .mask = MAXIM_INT3_EOC_MASK, },
+ { .reg_offset = 2, .mask = MAXIM_INT3_CGMBC_MASK, },
+ { .reg_offset = 2, .mask = MAXIM_INT3_OVP_MASK, },
+ { .reg_offset = 2, .mask = MAXIM_INT3_MBCCHGERR_MASK, },
};
static const struct regmap_irq_chip max14577_irq_chip = {
.name = "max14577",
- .status_base = MAX14577_REG_INT1,
- .mask_base = MAX14577_REG_INTMASK1,
+ .status_base = MAXIM_MUIC_REG_INT1,
+ .mask_base = MAXIM_MUIC_REG_INTMASK1,
.mask_invert = 1,
.num_regs = 3,
.irqs = max14577_irqs,
@@ -112,7 +112,8 @@ static int max14577_i2c_probe(struct i2c_client *i2c,
max14577->i2c = i2c;
max14577->irq = i2c->irq;
- max14577->regmap = devm_regmap_init_i2c(i2c, &max14577_regmap_config);
+ max14577->regmap = devm_regmap_init_i2c(i2c,
+ &max14577_muic_regmap_config);
if (IS_ERR(max14577->regmap)) {
ret = PTR_ERR(max14577->regmap);
dev_err(max14577->dev, "Failed to allocate register map: %d\n",
@@ -120,17 +121,17 @@ static int max14577_i2c_probe(struct i2c_client *i2c,
return ret;
}
- ret = max14577_read_reg(max14577->regmap, MAX14577_REG_DEVICEID,
+ ret = max14577_read_reg(max14577->regmap, MAXIM_MUIC_REG_DEVICEID,
®_data);
if (ret) {
dev_err(max14577->dev, "Device not found on this channel: %d\n",
ret);
return ret;
}
- max14577->vendor_id = ((reg_data & DEVID_VENDORID_MASK) >>
- DEVID_VENDORID_SHIFT);
- max14577->device_id = ((reg_data & DEVID_DEVICEID_MASK) >>
- DEVID_DEVICEID_SHIFT);
+ max14577->vendor_id = ((reg_data & MAXIM_DEVID_VENDORID_MASK) >>
+ MAXIM_DEVID_VENDORID_SHIFT);
+ max14577->device_id = ((reg_data & MAXIM_DEVID_DEVICEID_MASK) >>
+ MAXIM_DEVID_DEVICEID_SHIFT);
dev_info(max14577->dev, "Device ID: 0x%x, vendor: 0x%x\n",
max14577->device_id, max14577->vendor_id);
diff --git a/drivers/power/max14577_charger.c b/drivers/power/max14577_charger.c
index fad2a75b3604..66a4e4edea42 100644
--- a/drivers/power/max14577_charger.c
+++ b/drivers/power/max14577_charger.c
@@ -46,14 +46,14 @@ static int max14577_get_charger_state(struct max14577_charger *chg)
* - handle properly dead-battery charging (respect timer)
* - handle timers (fast-charge and prequal) /MBCCHGERR/
*/
- max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL2, ®_data);
- if ((reg_data & CHGCTRL2_MBCHOSTEN_MASK) == 0)
+ max14577_read_reg(rmap, MAXIM_CHG_REG_CHGCTRL2, ®_data);
+ if ((reg_data & MAXIM_CHGCTRL2_MBCHOSTEN_MASK) == 0)
goto state_set;
- max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, ®_data);
- if (reg_data & STATUS3_CGMBC_MASK) {
+ max14577_read_reg(rmap, MAXIM_MUIC_REG_STATUS3, ®_data);
+ if (reg_data & MAXIM_STATUS3_CGMBC_MASK) {
/* Charger or USB-cable is connected */
- if (reg_data & STATUS3_EOC_MASK)
+ if (reg_data & MAXIM_STATUS3_EOC_MASK)
state = POWER_SUPPLY_STATUS_FULL;
else
state = POWER_SUPPLY_STATUS_CHARGING;
@@ -90,18 +90,19 @@ static int max14577_get_online(struct max14577_charger *chg)
struct regmap *rmap = chg->max14577->regmap;
u8 reg_data;
- max14577_read_reg(rmap, MAX14577_MUIC_REG_STATUS2, ®_data);
- reg_data = ((reg_data & STATUS2_CHGTYP_MASK) >> STATUS2_CHGTYP_SHIFT);
+ max14577_read_reg(rmap, MAXIM_MUIC_REG_STATUS2, ®_data);
+ reg_data = reg_data & MAXIM_STATUS2_CHGTYP_MASK;
+ reg_data >>= MAXIM_STATUS2_CHGTYP_SHIFT;
switch (reg_data) {
- case MAX14577_CHARGER_TYPE_USB:
- case MAX14577_CHARGER_TYPE_DEDICATED_CHG:
- case MAX14577_CHARGER_TYPE_SPECIAL_500MA:
- case MAX14577_CHARGER_TYPE_SPECIAL_1A:
- case MAX14577_CHARGER_TYPE_DEAD_BATTERY:
+ case MAXIM_CHARGER_TYPE_USB:
+ case MAXIM_CHARGER_TYPE_DEDICATED_CHG:
+ case MAXIM_CHARGER_TYPE_SPECIAL_500MA:
+ case MAXIM_CHARGER_TYPE_SPECIAL_1A:
+ case MAXIM_CHARGER_TYPE_DEAD_BATTERY:
return 1;
- case MAX14577_CHARGER_TYPE_NONE:
- case MAX14577_CHARGER_TYPE_DOWNSTREAM_PORT:
- case MAX14577_CHARGER_TYPE_RESERVED:
+ case MAXIM_CHARGER_TYPE_NONE:
+ case MAXIM_CHARGER_TYPE_DOWNSTREAM_PORT:
+ case MAXIM_CHARGER_TYPE_RESERVED:
default:
return 0;
}
@@ -119,15 +120,16 @@ static int max14577_get_battery_health(struct max14577_charger *chg)
int state = POWER_SUPPLY_HEALTH_GOOD;
u8 reg_data;
- max14577_read_reg(rmap, MAX14577_MUIC_REG_STATUS2, ®_data);
- reg_data = ((reg_data & STATUS2_CHGTYP_MASK) >> STATUS2_CHGTYP_SHIFT);
- if (reg_data == MAX14577_CHARGER_TYPE_DEAD_BATTERY) {
+ max14577_read_reg(rmap, MAXIM_MUIC_REG_STATUS2, ®_data);
+ reg_data = reg_data & MAXIM_STATUS2_CHGTYP_MASK;
+ reg_data >>= MAXIM_STATUS2_CHGTYP_SHIFT;
+ if (reg_data == MAXIM_CHARGER_TYPE_DEAD_BATTERY) {
state = POWER_SUPPLY_HEALTH_DEAD;
goto state_set;
}
- max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, ®_data);
- if (reg_data & STATUS3_OVP_MASK) {
+ max14577_read_reg(rmap, MAXIM_MUIC_REG_STATUS3, ®_data);
+ if (reg_data & MAXIM_STATUS3_OVP_MASK) {
state = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
goto state_set;
}
@@ -162,46 +164,47 @@ static void max14577_charger_reg_init(struct max14577_charger *chg)
* Charger-Detection Enable, default on (set CHGDETEN to 1)
* Combined mask of CHGDETEN and CHGTYPMAN will zero the CHGTYPMAN bit
*/
- reg_data = 0x1 << CDETCTRL1_CHGDETEN_SHIFT;
- max14577_update_reg(rmap, MAX14577_REG_CDETCTRL1,
- CDETCTRL1_CHGDETEN_MASK | CDETCTRL1_CHGTYPMAN_MASK,
+ reg_data = 0x1 << MAXIM_CDETCTRL1_CHGDETEN_SHIFT;
+ max14577_update_reg(rmap, MAXIM_MUIC_REG_CDETCTRL1,
+ MAXIM_CDETCTRL1_CHGDETEN_MASK |
+ MAXIM_CDETCTRL1_CHGTYPMAN_MASK,
reg_data);
/* Battery Fast-Charge Timer, from SM-V700: 6hrs */
- reg_data = 0x3 << CHGCTRL1_TCHW_SHIFT;
- max14577_write_reg(rmap, MAX14577_REG_CHGCTRL1, reg_data);
+ reg_data = 0x3 << MAXIM_CHGCTRL1_TCHW_SHIFT;
+ max14577_write_reg(rmap, MAXIM_CHG_REG_CHGCTRL1, reg_data);
/*
* Wall-Adapter Rapid Charge, default on
* Battery-Charger, default on
*/
- reg_data = 0x1 << CHGCTRL2_VCHGR_RC_SHIFT;
- reg_data |= 0x1 << CHGCTRL2_MBCHOSTEN_SHIFT;
- max14577_write_reg(rmap, MAX14577_REG_CHGCTRL2, reg_data);
+ reg_data = 0x1 << MAXIM_CHGCTRL2_VCHGR_RC_SHIFT;
+ reg_data |= 0x1 << MAXIM_CHGCTRL2_MBCHOSTEN_SHIFT;
+ max14577_write_reg(rmap, MAXIM_CHG_REG_CHGCTRL2, reg_data);
/* Battery-Charger Constant Voltage (CV) Mode, from SM-V700: 4.35V */
- reg_data = 0xf << CHGCTRL3_MBCCVWRC_SHIFT;
- max14577_write_reg(rmap, MAX14577_REG_CHGCTRL3, reg_data);
+ reg_data = 0xf << MAXIM_CHGCTRL3_MBCCVWRC_SHIFT;
+ max14577_write_reg(rmap, MAXIM_CHG_REG_CHGCTRL3, reg_data);
/*
* Fast Battery-Charge Current Low, default 200-950mA
* Fast Battery-Charge Current High, from SM-V700: 450mA
*/
- reg_data = 0x1 << CHGCTRL4_MBCICHWRCL_SHIFT;
- reg_data |= 0x5 << CHGCTRL4_MBCICHWRCH_SHIFT;
- max14577_write_reg(rmap, MAX14577_REG_CHGCTRL4, reg_data);
+ reg_data = 0x1 << MAXIM_CHGCTRL4_MBCICHWRCL_SHIFT;
+ reg_data |= 0x5 << MAXIM_CHGCTRL4_MBCICHWRCH_SHIFT;
+ max14577_write_reg(rmap, MAXIM_CHG_REG_CHGCTRL4, reg_data);
/* End-of-Charge Current, from SM-V700: 50mA */
- reg_data = 0x0 << CHGCTRL5_EOCS_SHIFT;
- max14577_write_reg(rmap, MAX14577_REG_CHGCTRL5, reg_data);
+ reg_data = 0x0 << MAXIM_CHGCTRL5_EOCS_SHIFT;
+ max14577_write_reg(rmap, MAXIM_CHG_REG_CHGCTRL5, reg_data);
/* Auto Charging Stop, default off */
- reg_data = 0x0 << CHGCTRL6_AUTOSTOP_SHIFT;
- max14577_write_reg(rmap, MAX14577_REG_CHGCTRL6, reg_data);
+ reg_data = 0x0 << MAXIM_CHGCTRL6_AUTOSTOP_SHIFT;
+ max14577_write_reg(rmap, MAXIM_CHG_REG_CHGCTRL6, reg_data);
/* Overvoltage-Protection Threshold, from SM-V700: 6.5V */
- reg_data = 0x2 << CHGCTRL7_OTPCGHCVS_SHIFT;
- max14577_write_reg(rmap, MAX14577_REG_CHGCTRL7, reg_data);
+ reg_data = 0x2 << MAXIM_CHGCTRL7_OTPCGHCVS_SHIFT;
+ max14577_write_reg(rmap, MAXIM_CHG_REG_CHGCTRL7, reg_data);
}
/* Support property from charger */
diff --git a/drivers/regulator/max14577.c b/drivers/regulator/max14577.c
index 38821458d413..e65d61bb200f 100644
--- a/drivers/regulator/max14577.c
+++ b/drivers/regulator/max14577.c
@@ -30,11 +30,11 @@ static int max14577_reg_is_enabled(struct regulator_dev *rdev)
switch (rid) {
case MAX14577_CHARGER:
- max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL2, ®_data);
- if ((reg_data & CHGCTRL2_MBCHOSTEN_MASK) == 0)
+ max14577_read_reg(rmap, MAXIM_CHG_REG_CHGCTRL2, ®_data);
+ if ((reg_data & MAXIM_CHGCTRL2_MBCHOSTEN_MASK) == 0)
return 0;
- max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, ®_data);
- if ((reg_data & STATUS3_CGMBC_MASK) == 0)
+ max14577_read_reg(rmap, MAXIM_MUIC_REG_STATUS3, ®_data);
+ if ((reg_data & MAXIM_STATUS3_CGMBC_MASK) == 0)
return 0;
/* MBCHOSTEN and CGMBC are on */
return 1;
@@ -51,13 +51,13 @@ static int max14577_reg_get_current_limit(struct regulator_dev *rdev)
if (rdev_get_id(rdev) != MAX14577_CHARGER)
return -EINVAL;
- max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL4, ®_data);
+ max14577_read_reg(rmap, MAXIM_CHG_REG_CHGCTRL4, ®_data);
- if ((reg_data & CHGCTRL4_MBCICHWRCL_MASK) == 0)
+ if ((reg_data & MAXIM_CHGCTRL4_MBCICHWRCL_MASK) == 0)
return MAX14577_REGULATOR_CURRENT_LIMIT_MIN;
- reg_data = ((reg_data & CHGCTRL4_MBCICHWRCH_MASK) >>
- CHGCTRL4_MBCICHWRCH_SHIFT);
+ reg_data = ((reg_data & MAXIM_CHGCTRL4_MBCICHWRCH_MASK) >>
+ MAXIM_CHGCTRL4_MBCICHWRCH_SHIFT);
return MAX14577_REGULATOR_CURRENT_LIMIT_HIGH_START +
reg_data * MAX14577_REGULATOR_CURRENT_LIMIT_HIGH_STEP;
}
@@ -77,10 +77,10 @@ static int max14577_reg_set_current_limit(struct regulator_dev *rdev,
if (max_uA < MAX14577_REGULATOR_CURRENT_LIMIT_HIGH_START) {
/* Less than 200 mA, so set 90mA (turn only Low Bit off) */
- u8 reg_data = 0x0 << CHGCTRL4_MBCICHWRCL_SHIFT;
+ u8 reg_data = 0x0 << MAXIM_CHGCTRL4_MBCICHWRCL_SHIFT;
return max14577_update_reg(rdev->regmap,
- MAX14577_CHG_REG_CHG_CTRL4,
- CHGCTRL4_MBCICHWRCL_MASK, reg_data);
+ MAXIM_CHG_REG_CHGCTRL4,
+ MAXIM_CHGCTRL4_MBCICHWRCL_MASK, reg_data);
}
/* max_uA is in range: <LIMIT_HIGH_START, inifinite>, so search for
@@ -94,13 +94,13 @@ static int max14577_reg_set_current_limit(struct regulator_dev *rdev,
}
BUG_ON(current_bits < 0); /* Cannot happen */
/* Turn Low Bit on (use range 200mA-950 mA) */
- reg_data = 0x1 << CHGCTRL4_MBCICHWRCL_SHIFT;
+ reg_data = 0x1 << MAXIM_CHGCTRL4_MBCICHWRCL_SHIFT;
/* and set proper High Bits */
- reg_data |= current_bits << CHGCTRL4_MBCICHWRCH_SHIFT;
+ reg_data |= current_bits << MAXIM_CHGCTRL4_MBCICHWRCH_SHIFT;
- return max14577_update_reg(rdev->regmap, MAX14577_CHG_REG_CHG_CTRL4,
- CHGCTRL4_MBCICHWRCL_MASK | CHGCTRL4_MBCICHWRCH_MASK,
- reg_data);
+ return max14577_update_reg(rdev->regmap, MAXIM_CHG_REG_CHGCTRL4,
+ MAXIM_CHGCTRL4_MBCICHWRCL_MASK | MAXIM_CHGCTRL4_MBCICHWRCH_MASK,
+ reg_data);
}
static struct regulator_ops max14577_safeout_ops = {
@@ -127,8 +127,8 @@ static const struct regulator_desc supported_regulators[] = {
.owner = THIS_MODULE,
.n_voltages = 1,
.min_uV = MAX14577_REGULATOR_SAFEOUT_VOLTAGE,
- .enable_reg = MAX14577_REG_CONTROL2,
- .enable_mask = CTRL2_SFOUTORD_MASK,
+ .enable_reg = MAXIM_MUIC_REG_CONTROL2,
+ .enable_mask = MAXIM_CONTROL2_SFOUTORD_MASK,
},
[MAX14577_CHARGER] = {
.name = "CHARGER",
@@ -136,8 +136,8 @@ static const struct regulator_desc supported_regulators[] = {
.ops = &max14577_charger_ops,
.type = REGULATOR_CURRENT,
.owner = THIS_MODULE,
- .enable_reg = MAX14577_CHG_REG_CHG_CTRL2,
- .enable_mask = CHGCTRL2_MBCHOSTEN_MASK,
+ .enable_reg = MAXIM_CHG_REG_CHGCTRL2,
+ .enable_mask = MAXIM_CHGCTRL2_MBCHOSTEN_MASK,
},
};
@@ -159,7 +159,7 @@ static int max14577_regulator_dt_parse_pdata(struct platform_device *pdev)
}
ret = of_regulator_match(&pdev->dev, np, max14577_regulator_matches,
- MAX14577_REG_MAX);
+ ARRAY_SIZE(max14577_regulator_matches));
if (ret < 0) {
dev_err(&pdev->dev, "Error parsing regulator init data: %d\n", ret);
return ret;
@@ -249,7 +249,7 @@ static int __init max14577_regulator_init(void)
BUILD_BUG_ON(MAX14577_REGULATOR_CURRENT_LIMIT_HIGH_START +
MAX14577_REGULATOR_CURRENT_LIMIT_HIGH_STEP * 0xf !=
MAX14577_REGULATOR_CURRENT_LIMIT_MAX);
- BUILD_BUG_ON(ARRAY_SIZE(supported_regulators) != MAX14577_REG_MAX);
+ BUILD_BUG_ON(ARRAY_SIZE(supported_regulators) != MAX14577_REG_NUM);
return platform_driver_register(&max14577_regulator_driver);
}
diff --git a/include/linux/mfd/max14577-private.h b/include/linux/mfd/max14577-private.h
index c9b332fb0d5d..9f5ce26cb54e 100644
--- a/include/linux/mfd/max14577-private.h
+++ b/include/linux/mfd/max14577-private.h
@@ -22,224 +22,199 @@
#include <linux/i2c.h>
#include <linux/regmap.h>
-#define MAX14577_REG_INVALID (0xff)
-
-/* Slave addr = 0x4A: Interrupt */
-enum max14577_reg {
- MAX14577_REG_DEVICEID = 0x00,
- MAX14577_REG_INT1 = 0x01,
- MAX14577_REG_INT2 = 0x02,
- MAX14577_REG_INT3 = 0x03,
- MAX14577_REG_STATUS1 = 0x04,
- MAX14577_REG_STATUS2 = 0x05,
- MAX14577_REG_STATUS3 = 0x06,
- MAX14577_REG_INTMASK1 = 0x07,
- MAX14577_REG_INTMASK2 = 0x08,
- MAX14577_REG_INTMASK3 = 0x09,
- MAX14577_REG_CDETCTRL1 = 0x0A,
- MAX14577_REG_RFU = 0x0B,
- MAX14577_REG_CONTROL1 = 0x0C,
- MAX14577_REG_CONTROL2 = 0x0D,
- MAX14577_REG_CONTROL3 = 0x0E,
- MAX14577_REG_CHGCTRL1 = 0x0F,
- MAX14577_REG_CHGCTRL2 = 0x10,
- MAX14577_REG_CHGCTRL3 = 0x11,
- MAX14577_REG_CHGCTRL4 = 0x12,
- MAX14577_REG_CHGCTRL5 = 0x13,
- MAX14577_REG_CHGCTRL6 = 0x14,
- MAX14577_REG_CHGCTRL7 = 0x15,
-
- MAX14577_REG_END,
+/* Slave addr = 0x4A: MUIC and Charger */
+enum maxim_muic_reg {
+ MAXIM_MUIC_REG_DEVICEID = 0x00,
+ MAXIM_MUIC_REG_INT1 = 0x01,
+ MAXIM_MUIC_REG_INT2 = 0x02,
+ MAXIM_MUIC_REG_INT3 = 0x03,
+ MAXIM_MUIC_REG_STATUS1 = 0x04,
+ MAXIM_MUIC_REG_STATUS2 = 0x05,
+ MAXIM_MUIC_REG_STATUS3 = 0x06,
+ MAXIM_MUIC_REG_INTMASK1 = 0x07,
+ MAXIM_MUIC_REG_INTMASK2 = 0x08,
+ MAXIM_MUIC_REG_INTMASK3 = 0x09,
+ MAXIM_MUIC_REG_CDETCTRL1 = 0x0A,
+ MAXIM_MUIC_REG_RFU = 0x0B,
+ MAXIM_MUIC_REG_CONTROL1 = 0x0C,
+ MAXIM_MUIC_REG_CONTROL2 = 0x0D,
+ MAXIM_MUIC_REG_CONTROL3 = 0x0E,
+ MAXIM_CHG_REG_CHGCTRL1 = 0x0F,
+ MAXIM_CHG_REG_CHGCTRL2 = 0x10,
+ MAXIM_CHG_REG_CHGCTRL3 = 0x11,
+ MAXIM_CHG_REG_CHGCTRL4 = 0x12,
+ MAXIM_CHG_REG_CHGCTRL5 = 0x13,
+ MAXIM_CHG_REG_CHGCTRL6 = 0x14,
+ MAXIM_CHG_REG_CHGCTRL7 = 0x15,
+
+ MAXIM_MUIC_REG_END,
};
-/* Slave addr = 0x4A: MUIC */
-enum max14577_muic_reg {
- MAX14577_MUIC_REG_STATUS1 = 0x04,
- MAX14577_MUIC_REG_STATUS2 = 0x05,
- MAX14577_MUIC_REG_CONTROL1 = 0x0C,
- MAX14577_MUIC_REG_CONTROL3 = 0x0E,
-
- MAX14577_MUIC_REG_END,
-};
-
-enum max14577_muic_charger_type {
- MAX14577_CHARGER_TYPE_NONE = 0,
- MAX14577_CHARGER_TYPE_USB,
- MAX14577_CHARGER_TYPE_DOWNSTREAM_PORT,
- MAX14577_CHARGER_TYPE_DEDICATED_CHG,
- MAX14577_CHARGER_TYPE_SPECIAL_500MA,
- MAX14577_CHARGER_TYPE_SPECIAL_1A,
- MAX14577_CHARGER_TYPE_RESERVED,
- MAX14577_CHARGER_TYPE_DEAD_BATTERY = 7,
+enum maxim_muic_charger_type {
+ MAXIM_CHARGER_TYPE_NONE = 0,
+ MAXIM_CHARGER_TYPE_USB,
+ MAXIM_CHARGER_TYPE_DOWNSTREAM_PORT,
+ MAXIM_CHARGER_TYPE_DEDICATED_CHG,
+ MAXIM_CHARGER_TYPE_SPECIAL_500MA,
+ MAXIM_CHARGER_TYPE_SPECIAL_1A,
+ MAXIM_CHARGER_TYPE_RESERVED,
+ MAXIM_CHARGER_TYPE_DEAD_BATTERY = 7,
};
/* MAX14577 interrupts */
-#define INT1_ADC_MASK (0x1 << 0)
-#define INT1_ADCLOW_MASK (0x1 << 1)
-#define INT1_ADCERR_MASK (0x1 << 2)
+#define MAXIM_INT1_ADC_MASK (0x1 << 0)
+#define MAXIM_INT1_ADCLOW_MASK (0x1 << 1)
+#define MAXIM_INT1_ADCERR_MASK (0x1 << 2)
-#define INT2_CHGTYP_MASK (0x1 << 0)
-#define INT2_CHGDETRUN_MASK (0x1 << 1)
-#define INT2_DCDTMR_MASK (0x1 << 2)
-#define INT2_DBCHG_MASK (0x1 << 3)
-#define INT2_VBVOLT_MASK (0x1 << 4)
+#define MAXIM_INT2_CHGTYP_MASK (0x1 << 0)
+#define MAXIM_INT2_CHGDETRUN_MASK (0x1 << 1)
+#define MAXIM_INT2_DCDTMR_MASK (0x1 << 2)
+#define MAXIM_INT2_DBCHG_MASK (0x1 << 3)
+#define MAXIM_INT2_VBVOLT_MASK (0x1 << 4)
-#define INT3_EOC_MASK (0x1 << 0)
-#define INT3_CGMBC_MASK (0x1 << 1)
-#define INT3_OVP_MASK (0x1 << 2)
-#define INT3_MBCCHGERR_MASK (0x1 << 3)
+#define MAXIM_INT3_EOC_MASK (0x1 << 0)
+#define MAXIM_INT3_CGMBC_MASK (0x1 << 1)
+#define MAXIM_INT3_OVP_MASK (0x1 << 2)
+#define MAXIM_INT3_MBCCHGERR_MASK (0x1 << 3)
/* MAX14577 DEVICE ID register */
-#define DEVID_VENDORID_SHIFT 0
-#define DEVID_DEVICEID_SHIFT 3
-#define DEVID_VENDORID_MASK (0x07 << DEVID_VENDORID_SHIFT)
-#define DEVID_DEVICEID_MASK (0x1f << DEVID_DEVICEID_SHIFT)
+#define MAXIM_DEVID_VENDORID_SHIFT 0
+#define MAXIM_DEVID_DEVICEID_SHIFT 3
+#define MAXIM_DEVID_VENDORID_MASK (0x07 << MAXIM_DEVID_VENDORID_SHIFT)
+#define MAXIM_DEVID_DEVICEID_MASK (0x1f << MAXIM_DEVID_DEVICEID_SHIFT)
/* MAX14577 STATUS1 register */
-#define STATUS1_ADC_SHIFT 0
-#define STATUS1_ADCLOW_SHIFT 5
-#define STATUS1_ADCERR_SHIFT 6
-#define STATUS1_ADC_MASK (0x1f << STATUS1_ADC_SHIFT)
-#define STATUS1_ADCLOW_MASK (0x1 << STATUS1_ADCLOW_SHIFT)
-#define STATUS1_ADCERR_MASK (0x1 << STATUS1_ADCERR_SHIFT)
+#define MAXIM_STATUS1_ADC_SHIFT 0
+#define MAXIM_STATUS1_ADCLOW_SHIFT 5
+#define MAXIM_STATUS1_ADCERR_SHIFT 6
+#define MAXIM_STATUS1_ADC_MASK (0x1f << MAXIM_STATUS1_ADC_SHIFT)
+#define MAXIM_STATUS1_ADCLOW_MASK (0x1 << MAXIM_STATUS1_ADCLOW_SHIFT)
+#define MAXIM_STATUS1_ADCERR_MASK (0x1 << MAXIM_STATUS1_ADCERR_SHIFT)
/* MAX14577 STATUS2 register */
-#define STATUS2_CHGTYP_SHIFT 0
-#define STATUS2_CHGDETRUN_SHIFT 3
-#define STATUS2_DCDTMR_SHIFT 4
-#define STATUS2_DBCHG_SHIFT 5
-#define STATUS2_VBVOLT_SHIFT 6
-#define STATUS2_CHGTYP_MASK (0x7 << STATUS2_CHGTYP_SHIFT)
-#define STATUS2_CHGDETRUN_MASK (0x1 << STATUS2_CHGDETRUN_SHIFT)
-#define STATUS2_DCDTMR_MASK (0x1 << STATUS2_DCDTMR_SHIFT)
-#define STATUS2_DBCHG_MASK (0x1 << STATUS2_DBCHG_SHIFT)
-#define STATUS2_VBVOLT_MASK (0x1 << STATUS2_VBVOLT_SHIFT)
+#define MAXIM_STATUS2_CHGTYP_SHIFT 0
+#define MAXIM_STATUS2_CHGDETRUN_SHIFT 3
+#define MAXIM_STATUS2_DCDTMR_SHIFT 4
+#define MAXIM_STATUS2_DBCHG_SHIFT 5
+#define MAXIM_STATUS2_VBVOLT_SHIFT 6
+#define MAXIM_STATUS2_CHGTYP_MASK (0x7 << MAXIM_STATUS2_CHGTYP_SHIFT)
+#define MAXIM_STATUS2_CHGDETRUN_MASK (0x1 << MAXIM_STATUS2_CHGDETRUN_SHIFT)
+#define MAXIM_STATUS2_DCDTMR_MASK (0x1 << MAXIM_STATUS2_DCDTMR_SHIFT)
+#define MAXIM_STATUS2_DBCHG_MASK (0x1 << MAXIM_STATUS2_DBCHG_SHIFT)
+#define MAXIM_STATUS2_VBVOLT_MASK (0x1 << MAXIM_STATUS2_VBVOLT_SHIFT)
+
+/* MAX14577 STATUS3 register */
+#define MAXIM_STATUS3_EOC_SHIFT 0
+#define MAXIM_STATUS3_CGMBC_SHIFT 1
+#define MAXIM_STATUS3_OVP_SHIFT 2
+#define MAXIM_STATUS3_MBCCHGERR_SHIFT 3
+#define MAXIM_STATUS3_EOC_MASK (0x1 << MAXIM_STATUS3_EOC_SHIFT)
+#define MAXIM_STATUS3_CGMBC_MASK (0x1 << MAXIM_STATUS3_CGMBC_SHIFT)
+#define MAXIM_STATUS3_OVP_MASK (0x1 << MAXIM_STATUS3_OVP_SHIFT)
+#define MAXIM_STATUS3_MBCCHGERR_MASK (0x1 << MAXIM_STATUS3_MBCCHGERR_SHIFT)
/* MAX14577 CONTROL1 register */
-#define COMN1SW_SHIFT 0
-#define COMP2SW_SHIFT 3
-#define MICEN_SHIFT 6
-#define IDBEN_SHIFT 7
-#define COMN1SW_MASK (0x7 << COMN1SW_SHIFT)
-#define COMP2SW_MASK (0x7 << COMP2SW_SHIFT)
-#define MICEN_MASK (0x1 << MICEN_SHIFT)
-#define IDBEN_MASK (0x1 << IDBEN_SHIFT)
-#define CLEAR_IDBEN_MICEN_MASK (COMN1SW_MASK | COMP2SW_MASK)
-#define CTRL1_SW_USB ((1 << COMP2SW_SHIFT) \
- | (1 << COMN1SW_SHIFT))
-#define CTRL1_SW_AUDIO ((2 << COMP2SW_SHIFT) \
- | (2 << COMN1SW_SHIFT))
-#define CTRL1_SW_UART ((3 << COMP2SW_SHIFT) \
- | (3 << COMN1SW_SHIFT))
-#define CTRL1_SW_OPEN ((0 << COMP2SW_SHIFT) \
- | (0 << COMN1SW_SHIFT))
+#define MAXIM_CONTROL1_COMN1SW_SHIFT 0
+#define MAXIM_CONTROL1_COMP2SW_SHIFT 3
+#define MAXIM_CONTROL1_MICEN_SHIFT 6
+#define MAXIM_CONTROL1_IDBEN_SHIFT 7
+#define MAXIM_CONTROL1_COMN1SW_MASK (0x7 << MAXIM_CONTROL1_COMN1SW_SHIFT)
+#define MAXIM_CONTROL1_COMP2SW_MASK (0x7 << MAXIM_CONTROL1_COMP2SW_SHIFT)
+#define MAXIM_CONTROL1_MICEN_MASK (0x1 << MAXIM_CONTROL1_MICEN_SHIFT)
+#define MAXIM_CONTROL1_IDBEN_MASK (0x1 << MAXIM_CONTROL1_IDBEN_SHIFT)
+
+#define MAXIM_CONTROL1_CLEAR_IDBEN_MICEN_MASK (MAXIM_CONTROL1_COMN1SW_MASK | MAXIM_CONTROL1_COMP2SW_MASK)
+#define MAXIM_CONTROL1_SW_USB ((1 << MAXIM_CONTROL1_COMP2SW_SHIFT) \
+ | (1 << MAXIM_CONTROL1_COMN1SW_SHIFT))
+#define MAXIM_CONTROL1_SW_AUDIO ((2 << MAXIM_CONTROL1_COMP2SW_SHIFT) \
+ | (2 << MAXIM_CONTROL1_COMN1SW_SHIFT))
+#define MAXIM_CONTROL1_SW_UART ((3 << MAXIM_CONTROL1_COMP2SW_SHIFT) \
+ | (3 << MAXIM_CONTROL1_COMN1SW_SHIFT))
+#define MAXIM_CONTROL1_SW_OPEN ((0 << MAXIM_CONTROL1_COMP2SW_SHIFT) \
+ | (0 << MAXIM_CONTROL1_COMN1SW_SHIFT))
/* MAX14577 CONTROL2 register */
-#define CTRL2_LOWPWR_SHIFT (0)
-#define CTRL2_ADCEN_SHIFT (1)
-#define CTRL2_CPEN_SHIFT (2)
-#define CTRL2_SFOUTASRT_SHIFT (3)
-#define CTRL2_SFOUTORD_SHIFT (4)
-#define CTRL2_ACCDET_SHIFT (5)
-#define CTRL2_USBCPINT_SHIFT (6)
-#define CTRL2_RCPS_SHIFT (7)
-#define CTRL2_LOWPWR_MASK (0x1 << CTRL2_LOWPWR_SHIFT)
-#define CTRL2_ADCEN_MASK (0x1 << CTRL2_ADCEN_SHIFT)
-#define CTRL2_CPEN_MASK (0x1 << CTRL2_CPEN_SHIFT)
-#define CTRL2_SFOUTASRT_MASK (0x1 << CTRL2_SFOUTASRT_SHIFT)
-#define CTRL2_SFOUTORD_MASK (0x1 << CTRL2_SFOUTORD_SHIFT)
-#define CTRL2_ACCDET_MASK (0x1 << CTRL2_ACCDET_SHIFT)
-#define CTRL2_USBCPINT_MASK (0x1 << CTRL2_USBCPINT_SHIFT)
-#define CTRL2_RCPS_MASK (0x1 << CTR2_RCPS_SHIFT)
-
-#define CTRL2_CPEN1_LOWPWR0 ((1 << CTRL2_CPEN_SHIFT) | \
- (0 << CTRL2_LOWPWR_SHIFT))
-#define CTRL2_CPEN0_LOWPWR1 ((0 << CTRL2_CPEN_SHIFT) | \
- (1 << CTRL2_LOWPWR_SHIFT))
+#define MAXIM_CONTROL2_LOWPWR_SHIFT 0
+#define MAXIM_CONTROL2_ADCEN_SHIFT 1
+#define MAXIM_CONTROL2_CPEN_SHIFT 2
+#define MAXIM_CONTROL2_SFOUTASRT_SHIFT 3
+#define MAXIM_CONTROL2_SFOUTORD_SHIFT 4
+#define MAXIM_CONTROL2_ACCDET_SHIFT 5
+#define MAXIM_CONTROL2_USBCPINT_SHIFT 6
+#define MAXIM_CONTROL2_RCPS_SHIFT 7
+#define MAXIM_CONTROL2_LOWPWR_MASK (0x1 << MAXIM_CONTROL2_LOWPWR_SHIFT)
+#define MAXIM_CONTROL2_ADCEN_MASK (0x1 << MAXIM_CONTROL2_ADCEN_SHIFT)
+#define MAXIM_CONTROL2_CPEN_MASK (0x1 << MAXIM_CONTROL2_CPEN_SHIFT)
+#define MAXIM_CONTROL2_SFOUTASRT_MASK (0x1 << MAXIM_CONTROL2_SFOUTASRT_SHIFT)
+#define MAXIM_CONTROL2_SFOUTORD_MASK (0x1 << MAXIM_CONTROL2_SFOUTORD_SHIFT)
+#define MAXIM_CONTROL2_ACCDET_MASK (0x1 << MAXIM_CONTROL2_ACCDET_SHIFT)
+#define MAXIM_CONTROL2_USBCPINT_MASK (0x1 << MAXIM_CONTROL2_USBCPINT_SHIFT)
+#define MAXIM_CONTROL2_RCPS_MASK (0x1 << MAXIM_CONTROL2_RCPS_SHIFT)
+
+#define MAXIM_CONTROL2_CPEN1_LOWPWR0 ((1 << MAXIM_CONTROL2_CPEN_SHIFT) | \
+ (0 << MAXIM_CONTROL2_LOWPWR_SHIFT))
+#define MAXIM_CONTROL2_CPEN0_LOWPWR1 ((0 << MAXIM_CONTROL2_CPEN_SHIFT) | \
+ (1 << MAXIM_CONTROL2_LOWPWR_SHIFT))
/* MAX14577 CONTROL3 register */
-#define CTRL3_JIGSET_SHIFT 0
-#define CTRL3_BOOTSET_SHIFT 2
-#define CTRL3_ADCDBSET_SHIFT 4
-#define CTRL3_JIGSET_MASK (0x3 << CTRL3_JIGSET_SHIFT)
-#define CTRL3_BOOTSET_MASK (0x3 << CTRL3_BOOTSET_SHIFT)
-#define CTRL3_ADCDBSET_MASK (0x3 << CTRL3_ADCDBSET_SHIFT)
-
-/* Slave addr = 0x4A: Charger */
-enum max14577_charger_reg {
- MAX14577_CHG_REG_STATUS3 = 0x06,
- MAX14577_CHG_REG_CHG_CTRL1 = 0x0F,
- MAX14577_CHG_REG_CHG_CTRL2 = 0x10,
- MAX14577_CHG_REG_CHG_CTRL3 = 0x11,
- MAX14577_CHG_REG_CHG_CTRL4 = 0x12,
- MAX14577_CHG_REG_CHG_CTRL5 = 0x13,
- MAX14577_CHG_REG_CHG_CTRL6 = 0x14,
- MAX14577_CHG_REG_CHG_CTRL7 = 0x15,
-
- MAX14577_CHG_REG_END,
-};
-
-/* MAX14577 STATUS3 register */
-#define STATUS3_EOC_SHIFT 0
-#define STATUS3_CGMBC_SHIFT 1
-#define STATUS3_OVP_SHIFT 2
-#define STATUS3_MBCCHGERR_SHIFT 3
-#define STATUS3_EOC_MASK (0x1 << STATUS3_EOC_SHIFT)
-#define STATUS3_CGMBC_MASK (0x1 << STATUS3_CGMBC_SHIFT)
-#define STATUS3_OVP_MASK (0x1 << STATUS3_OVP_SHIFT)
-#define STATUS3_MBCCHGERR_MASK (0x1 << STATUS3_MBCCHGERR_SHIFT)
+#define MAXIM_CONTROL3_JIGSET_SHIFT 0
+#define MAXIM_CONTROL3_BOOTSET_SHIFT 2
+#define MAXIM_CONTROL3_ADCDBSET_SHIFT 4
+#define MAXIM_CONTROL3_JIGSET_MASK (0x3 << MAXIM_CONTROL3_JIGSET_SHIFT)
+#define MAXIM_CONTROL3_BOOTSET_MASK (0x3 << MAXIM_CONTROL3_BOOTSET_SHIFT)
+#define MAXIM_CONTROL3_ADCDBSET_MASK (0x3 << MAXIM_CONTROL3_ADCDBSET_SHIFT)
/* MAX14577 CDETCTRL1 register */
-#define CDETCTRL1_CHGDETEN_SHIFT 0
-#define CDETCTRL1_CHGTYPMAN_SHIFT 1
-#define CDETCTRL1_DCDEN_SHIFT 2
-#define CDETCTRL1_DCD2SCT_SHIFT 3
-#define CDETCTRL1_DCHKTM_SHIFT 4
-#define CDETCTRL1_DBEXIT_SHIFT 5
-#define CDETCTRL1_DBIDLE_SHIFT 6
-#define CDETCTRL1_CDPDET_SHIFT 7
-#define CDETCTRL1_CHGDETEN_MASK (0x1 << CDETCTRL1_CHGDETEN_SHIFT)
-#define CDETCTRL1_CHGTYPMAN_MASK (0x1 << CDETCTRL1_CHGTYPMAN_SHIFT)
-#define CDETCTRL1_DCDEN_MASK (0x1 << CDETCTRL1_DCDEN_SHIFT)
-#define CDETCTRL1_DCD2SCT_MASK (0x1 << CDETCTRL1_DCD2SCT_SHIFT)
-#define CDETCTRL1_DCHKTM_MASK (0x1 << CDETCTRL1_DCHKTM_SHIFT)
-#define CDETCTRL1_DBEXIT_MASK (0x1 << CDETCTRL1_DBEXIT_SHIFT)
-#define CDETCTRL1_DBIDLE_MASK (0x1 << CDETCTRL1_DBIDLE_SHIFT)
-#define CDETCTRL1_CDPDET_MASK (0x1 << CDETCTRL1_CDPDET_SHIFT)
-
-/* MAX14577 CHGCTRL1 register */
-#define CHGCTRL1_TCHW_SHIFT 4
-#define CHGCTRL1_TCHW_MASK (0x7 << CHGCTRL1_TCHW_SHIFT)
-
-/* MAX14577 CHGCTRL2 register */
-#define CHGCTRL2_MBCHOSTEN_SHIFT 6
-#define CHGCTRL2_MBCHOSTEN_MASK (0x1 << CHGCTRL2_MBCHOSTEN_SHIFT)
-#define CHGCTRL2_VCHGR_RC_SHIFT 7
-#define CHGCTRL2_VCHGR_RC_MASK (0x1 << CHGCTRL2_VCHGR_RC_SHIFT)
-
-/* MAX14577 CHGCTRL3 register */
-#define CHGCTRL3_MBCCVWRC_SHIFT 0
-#define CHGCTRL3_MBCCVWRC_MASK (0xf << CHGCTRL3_MBCCVWRC_SHIFT)
-
-/* MAX14577 CHGCTRL4 register */
-#define CHGCTRL4_MBCICHWRCH_SHIFT 0
-#define CHGCTRL4_MBCICHWRCH_MASK (0xf << CHGCTRL4_MBCICHWRCH_SHIFT)
-#define CHGCTRL4_MBCICHWRCL_SHIFT 4
-#define CHGCTRL4_MBCICHWRCL_MASK (0x1 << CHGCTRL4_MBCICHWRCL_SHIFT)
-
-/* MAX14577 CHGCTRL5 register */
-#define CHGCTRL5_EOCS_SHIFT 0
-#define CHGCTRL5_EOCS_MASK (0xf << CHGCTRL5_EOCS_SHIFT)
-
-/* MAX14577 CHGCTRL6 register */
-#define CHGCTRL6_AUTOSTOP_SHIFT 5
-#define CHGCTRL6_AUTOSTOP_MASK (0x1 << CHGCTRL6_AUTOSTOP_SHIFT)
-
-/* MAX14577 CHGCTRL7 register */
-#define CHGCTRL7_OTPCGHCVS_SHIFT 0
-#define CHGCTRL7_OTPCGHCVS_MASK (0x3 << CHGCTRL7_OTPCGHCVS_SHIFT)
-
-/* MAX14577 regulator current limits (as in CHGCTRL4 register), uA */
+#define MAXIM_CDETCTRL1_CHGDETEN_SHIFT 0
+#define MAXIM_CDETCTRL1_CHGTYPMAN_SHIFT 1
+#define MAXIM_CDETCTRL1_DCDEN_SHIFT 2
+#define MAXIM_CDETCTRL1_DCD2SCT_SHIFT 3
+#define MAXIM_CDETCTRL1_DCHKTM_SHIFT 4
+#define MAXIM_CDETCTRL1_DBEXIT_SHIFT 5
+#define MAXIM_CDETCTRL1_DBIDLE_SHIFT 6
+#define MAXIM_CDETCTRL1_CDPDET_SHIFT 7
+#define MAXIM_CDETCTRL1_CHGDETEN_MASK (0x1 << MAXIM_CDETCTRL1_CHGDETEN_SHIFT)
+#define MAXIM_CDETCTRL1_CHGTYPMAN_MASK (0x1 << MAXIM_CDETCTRL1_CHGTYPMAN_SHIFT)
+#define MAXIM_CDETCTRL1_DCDEN_MASK (0x1 << MAXIM_CDETCTRL1_DCDEN_SHIFT)
+#define MAXIM_CDETCTRL1_DCD2SCT_MASK (0x1 << MAXIM_CDETCTRL1_DCD2SCT_SHIFT)
+#define MAXIM_CDETCTRL1_DCHKTM_MASK (0x1 << MAXIM_CDETCTRL1_DCHKTM_SHIFT)
+#define MAXIM_CDETCTRL1_DBEXIT_MASK (0x1 << MAXIM_CDETCTRL1_DBEXIT_SHIFT)
+#define MAXIM_CDETCTRL1_DBIDLE_MASK (0x1 << MAXIM_CDETCTRL1_DBIDLE_SHIFT)
+#define MAXIM_CDETCTRL1_CDPDET_MASK (0x1 << MAXIM_CDETCTRL1_CDPDET_SHIFT)
+
+/* MAX14577 MAXIM_CHGCTRL1 register */
+#define MAXIM_CHGCTRL1_TCHW_SHIFT 4
+#define MAXIM_CHGCTRL1_TCHW_MASK (0x7 << MAXIM_CHGCTRL1_TCHW_SHIFT)
+
+/* MAX14577 MAXIM_CHGCTRL2 register */
+#define MAXIM_CHGCTRL2_MBCHOSTEN_SHIFT 6
+#define MAXIM_CHGCTRL2_MBCHOSTEN_MASK (0x1 << MAXIM_CHGCTRL2_MBCHOSTEN_SHIFT)
+#define MAXIM_CHGCTRL2_VCHGR_RC_SHIFT 7
+#define MAXIM_CHGCTRL2_VCHGR_RC_MASK (0x1 << MAXIM_CHGCTRL2_VCHGR_RC_SHIFT)
+
+/* MAX14577 MAXIM_CHGCTRL3 register */
+#define MAXIM_CHGCTRL3_MBCCVWRC_SHIFT 0
+#define MAXIM_CHGCTRL3_MBCCVWRC_MASK (0xf << MAXIM_CHGCTRL3_MBCCVWRC_SHIFT)
+
+/* MAX14577 MAXIM_CHGCTRL4 register */
+#define MAXIM_CHGCTRL4_MBCICHWRCH_SHIFT 0
+#define MAXIM_CHGCTRL4_MBCICHWRCH_MASK (0xf << MAXIM_CHGCTRL4_MBCICHWRCH_SHIFT)
+#define MAXIM_CHGCTRL4_MBCICHWRCL_SHIFT 4
+#define MAXIM_CHGCTRL4_MBCICHWRCL_MASK (0x1 << MAXIM_CHGCTRL4_MBCICHWRCL_SHIFT)
+
+/* MAX14577 MAXIM_CHGCTRL5 register */
+#define MAXIM_CHGCTRL5_EOCS_SHIFT 0
+#define MAXIM_CHGCTRL5_EOCS_MASK (0xf << MAXIM_CHGCTRL5_EOCS_SHIFT)
+
+/* MAX14577 MAXIM_CHGCTRL6 register */
+#define MAXIM_CHGCTRL6_AUTOSTOP_SHIFT 5
+#define MAXIM_CHGCTRL6_AUTOSTOP_MASK (0x1 << MAXIM_CHGCTRL6_AUTOSTOP_SHIFT)
+
+/* MAX14577 MAXIM_CHGCTRL7 register */
+#define MAXIM_CHGCTRL7_OTPCGHCVS_SHIFT 0
+#define MAXIM_CHGCTRL7_OTPCGHCVS_MASK (0x3 << MAXIM_CHGCTRL7_OTPCGHCVS_SHIFT)
+
+/* MAX14577 regulator current limits (as in MAXIM_CHGCTRL4 register), uA */
#define MAX14577_REGULATOR_CURRENT_LIMIT_MIN 90000
#define MAX14577_REGULATOR_CURRENT_LIMIT_HIGH_START 200000
#define MAX14577_REGULATOR_CURRENT_LIMIT_HIGH_STEP 50000
@@ -248,26 +223,28 @@ enum max14577_charger_reg {
/* MAX14577 regulator SFOUT LDO voltage, fixed, uV */
#define MAX14577_REGULATOR_SAFEOUT_VOLTAGE 4900000
-enum max14577_irq {
+
+
+enum maxim_irq {
/* INT1 */
- MAX14577_IRQ_INT1_ADC,
- MAX14577_IRQ_INT1_ADCLOW,
- MAX14577_IRQ_INT1_ADCERR,
+ MAXIM_IRQ_INT1_ADC,
+ MAXIM_IRQ_INT1_ADCLOW,
+ MAXIM_IRQ_INT1_ADCERR,
/* INT2 */
- MAX14577_IRQ_INT2_CHGTYP,
- MAX14577_IRQ_INT2_CHGDETRUN,
- MAX14577_IRQ_INT2_DCDTMR,
- MAX14577_IRQ_INT2_DBCHG,
- MAX14577_IRQ_INT2_VBVOLT,
+ MAXIM_IRQ_INT2_CHGTYP,
+ MAXIM_IRQ_INT2_CHGDETRUN,
+ MAXIM_IRQ_INT2_DCDTMR,
+ MAXIM_IRQ_INT2_DBCHG,
+ MAXIM_IRQ_INT2_VBVOLT,
/* INT3 */
- MAX14577_IRQ_INT3_EOC,
- MAX14577_IRQ_INT3_CGMBC,
- MAX14577_IRQ_INT3_OVP,
- MAX14577_IRQ_INT3_MBCCHGERR,
+ MAXIM_IRQ_INT3_EOC,
+ MAXIM_IRQ_INT3_CGMBC,
+ MAXIM_IRQ_INT3_OVP,
+ MAXIM_IRQ_INT3_MBCCHGERR,
- MAX14577_IRQ_NUM,
+ MAXIM_IRQ_NUM,
};
struct max14577 {
diff --git a/include/linux/mfd/max14577.h b/include/linux/mfd/max14577.h
index 736d39c3ec0d..75301be5c548 100644
--- a/include/linux/mfd/max14577.h
+++ b/include/linux/mfd/max14577.h
@@ -32,7 +32,7 @@ enum max14577_regulators {
MAX14577_SAFEOUT = 0,
MAX14577_CHARGER,
- MAX14577_REG_MAX,
+ MAX14577_REG_NUM,
};
struct max14577_regulator_platform_data {
--
1.7.9.5
^ permalink raw reply related
* [PATCH 06/18] extcon: max14577: Change extcon name instead of static name according to device type
From: Krzysztof Kozlowski @ 2014-01-28 12:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390911522-28209-1-git-send-email-k.kozlowski@samsung.com>
From: Chanwoo Choi <cw00.choi@samsung.com>
This patch use device name to make sysfs path according to device type:
max14577-muic
- /sys/class/extcon/max14577-muic/
max77836-muic
- /sys/class/extcon/max77836-muic/
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
---
drivers/extcon/extcon-max14577.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/extcon/extcon-max14577.c b/drivers/extcon/extcon-max14577.c
index 3846941801b8..59f084fee4f3 100644
--- a/drivers/extcon/extcon-max14577.c
+++ b/drivers/extcon/extcon-max14577.c
@@ -24,7 +24,6 @@
#include <linux/mfd/max14577-private.h>
#include <linux/extcon.h>
-#define DEV_NAME "max14577-muic"
#define DELAY_MS_DEFAULT 17000 /* unit: millisecond */
enum max14577_muic_adc_debounce_time {
@@ -673,7 +672,8 @@ static int max14577_muic_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "failed to allocate memory for extcon\n");
return -ENOMEM;
}
- info->edev->name = DEV_NAME;
+
+ info->edev->name = dev_name(&pdev->dev);
info->edev->supported_cable = max14577_extcon_cable;
ret = extcon_dev_register(info->edev);
if (ret) {
@@ -737,7 +737,7 @@ static int max14577_muic_remove(struct platform_device *pdev)
static struct platform_driver max14577_muic_driver = {
.driver = {
- .name = DEV_NAME,
+ .name = "max14577-muic",
.owner = THIS_MODULE,
},
.probe = max14577_muic_probe,
--
1.7.9.5
^ permalink raw reply related
* [PATCH 05/18] mfd: max14577: Use of_match_ptr() in i2c_driver
From: Krzysztof Kozlowski @ 2014-01-28 12:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390911522-28209-1-git-send-email-k.kozlowski@samsung.com>
Use of_match_ptr() in assignment of i2c_driver.of_match_table.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
---
drivers/mfd/max14577.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mfd/max14577.c b/drivers/mfd/max14577.c
index 2ac2f2d7cea6..75b37082a3fe 100644
--- a/drivers/mfd/max14577.c
+++ b/drivers/mfd/max14577.c
@@ -224,7 +224,7 @@ static struct i2c_driver max14577_i2c_driver = {
.name = "max14577",
.owner = THIS_MODULE,
.pm = &max14577_pm,
- .of_match_table = max14577_dt_match,
+ .of_match_table = of_match_ptr(max14577_dt_match),
},
.probe = max14577_i2c_probe,
.remove = max14577_i2c_remove,
--
1.7.9.5
^ permalink raw reply related
* [PATCH 04/18] mfd: max14577: Add of_compatible to extcon mfd_cell
From: Krzysztof Kozlowski @ 2014-01-28 12:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390911522-28209-1-git-send-email-k.kozlowski@samsung.com>
Add of_compatible ("maxim,max14577-muic") to the mfd_cell for extcon
driver. If entry with such compatible is present in the DTS, the extcon
driver will have of_node set.
This may be useful for extcon consumers and it is documented in
bindings documentation.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
---
drivers/mfd/max14577.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/max14577.c b/drivers/mfd/max14577.c
index ac514fb2b877..2ac2f2d7cea6 100644
--- a/drivers/mfd/max14577.c
+++ b/drivers/mfd/max14577.c
@@ -25,7 +25,10 @@
#include <linux/mfd/max14577-private.h>
static struct mfd_cell max14577_devs[] = {
- { .name = "max14577-muic", },
+ {
+ .name = "max14577-muic",
+ .of_compatible = "maxim,max14577-muic",
+ },
{
.name = "max14577-regulator",
.of_compatible = "maxim,max14577-regulator",
--
1.7.9.5
^ permalink raw reply related
* [PATCH 03/18] mfd: max14577: Remove not needed header inclusion
From: Krzysztof Kozlowski @ 2014-01-28 12:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390911522-28209-1-git-send-email-k.kozlowski@samsung.com>
Remove not needed max14577-private.h header inclusion in the main driver
header. Remove obvious comment.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
---
include/linux/mfd/max14577.h | 5 -----
1 file changed, 5 deletions(-)
diff --git a/include/linux/mfd/max14577.h b/include/linux/mfd/max14577.h
index 247b021dfaaf..736d39c3ec0d 100644
--- a/include/linux/mfd/max14577.h
+++ b/include/linux/mfd/max14577.h
@@ -25,13 +25,8 @@
#ifndef __MAX14577_H__
#define __MAX14577_H__
-#include <linux/mfd/max14577-private.h>
#include <linux/regulator/consumer.h>
-/*
- * MAX14577 Regulator
- */
-
/* MAX14577 regulator IDs */
enum max14577_regulators {
MAX14577_SAFEOUT = 0,
--
1.7.9.5
^ permalink raw reply related
* [PATCH 02/18] mfd: max14577: Remove unused enum max14577_irq_source
From: Krzysztof Kozlowski @ 2014-01-28 12:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390911522-28209-1-git-send-email-k.kozlowski@samsung.com>
Remove unused symbol: enum max14577_irq_source.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
---
include/linux/mfd/max14577-private.h | 8 --------
1 file changed, 8 deletions(-)
diff --git a/include/linux/mfd/max14577-private.h b/include/linux/mfd/max14577-private.h
index a3d0185196d3..c9b332fb0d5d 100644
--- a/include/linux/mfd/max14577-private.h
+++ b/include/linux/mfd/max14577-private.h
@@ -248,14 +248,6 @@ enum max14577_charger_reg {
/* MAX14577 regulator SFOUT LDO voltage, fixed, uV */
#define MAX14577_REGULATOR_SAFEOUT_VOLTAGE 4900000
-enum max14577_irq_source {
- MAX14577_IRQ_INT1 = 0,
- MAX14577_IRQ_INT2,
- MAX14577_IRQ_INT3,
-
- MAX14577_IRQ_REGS_NUM,
-};
-
enum max14577_irq {
/* INT1 */
MAX14577_IRQ_INT1_ADC,
--
1.7.9.5
^ permalink raw reply related
* [PATCH 01/18] regulator: max14577: Remove unused state container definition
From: Krzysztof Kozlowski @ 2014-01-28 12:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390911522-28209-1-git-send-email-k.kozlowski@samsung.com>
Remove the "struct max14577_regulator" because this is not used
anywhere. It should be removed earlier along with changing the driver
after review on the mailing lists.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
---
drivers/regulator/max14577.c | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/regulator/max14577.c b/drivers/regulator/max14577.c
index b1078ba3f393..38821458d413 100644
--- a/drivers/regulator/max14577.c
+++ b/drivers/regulator/max14577.c
@@ -1,7 +1,7 @@
/*
* max14577.c - Regulator driver for the Maxim 14577
*
- * Copyright (C) 2013 Samsung Electronics
+ * Copyright (C) 2013,2014 Samsung Electronics
* Krzysztof Kozlowski <k.kozlowski@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
@@ -22,12 +22,6 @@
#include <linux/mfd/max14577-private.h>
#include <linux/regulator/of_regulator.h>
-struct max14577_regulator {
- struct device *dev;
- struct max14577 *max14577;
- struct regulator_dev **regulators;
-};
-
static int max14577_reg_is_enabled(struct regulator_dev *rdev)
{
int rid = rdev_get_id(rdev);
--
1.7.9.5
^ permalink raw reply related
* [PATCH 00/18] mfd: max14577: Add support for MAX77836
From: Krzysztof Kozlowski @ 2014-01-28 12:18 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
This patchset adds support for MAX77836 device to the max14577 driver.
The MAX77836 is almost the same as MAX14577. Basically it is an extended
version of MAX14577. The chipsets have same MUIC component so the extcon,
charger and regulators require only little adjustments. More changes were
needed in the charger (because it uses lower charging current) and regulator
drivers (because mentioned different charing current and additional
regulators). The MAX77836 has also PMIC and Fuel Gauge (which is the same
as MAX17040/17048 Fuel Gauge).
The MAX77836 uses three I2C slave addresses and has additional interrupts
(related to PMIC and Fuel Gauge). It has also Interrupt Source register,
just like MAX77686 and MAX77693.
The patchset is organized in following way:
1. Patches from 1 to 6 clean up the max14577 drivers and add minor tweaks.
2. Patches from 7 to 12 prepare the driver for supporting MAX77836. They
mostly rename symbols and add additional logic related to different
deviec types.
3. Patches from 13 to 17 add support for MAX77836.
4. Patch 18 adds bindings documentation, which was not merged previously.
Here I tried to address also Tomasz Figa's comments from review.
The patchset is based on current Linus' tree (v3.13-8789-g54c0a4b46150).
Testing was done on 3.10.
TODO: Merge max14577, max77686 and max77693 into one common driver. They are
very similar.
Best regards,
Krzysztof Kozlowski
Chanwoo Choi (1):
extcon: max14577: Change extcon name instead of static name according
to device type
Krzysztof Kozlowski (17):
regulator: max14577: Remove unused state container definition
mfd: max14577: Remove unused enum max14577_irq_source
mfd: max14577: Remove not needed header inclusion
mfd: max14577: Add of_compatible to extcon mfd_cell
mfd: max14577: Use of_match_ptr() in i2c_driver
mfd: max14577: Rename and add MAX14577 symbols to prepare for
max77836
mfd: max14577: Rename state container to maxim_core
mfd: max14577: Add "muic" suffix to regmap and irq_chip
mfd: max14577: Add detection of device type
extcon: max14577: Add max14577 prefix to muic_irqs
extcon: max14577: Choose muic_irqs according to device type
mfd: max77836: Add max77836 support to max14577 driver
extcon: max14577: Add support for max77836
regulator: max14577: Add support for max77836 regulators
charger: max14577: Add support for MAX77836 charger
power: max17040: Add ID for max77836 Fuel Gauge block
mfd: max14577: Add device tree bindings document
Documentation/devicetree/bindings/mfd/max14577.txt | 104 ++++
drivers/extcon/extcon-max14577.c | 272 ++++++----
drivers/mfd/max14577.c | 377 ++++++++++---
drivers/power/max14577_charger.c | 170 +++---
drivers/power/max17040_battery.c | 1 +
drivers/regulator/max14577.c | 323 ++++++++---
include/linux/mfd/max14577-private.h | 565 ++++++++++++--------
include/linux/mfd/max14577.h | 24 +-
8 files changed, 1313 insertions(+), 523 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/max14577.txt
--
1.7.9.5
^ permalink raw reply
* [Patch v3 2/2] dmaengine: qcom_bam_dma: Add device tree binding
From: Russell King - ARM Linux @ 2014-01-28 12:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <9156959.vu4XdoKglI@wuerfel>
On Tue, Jan 28, 2014 at 01:08:47PM +0100, Arnd Bergmann wrote:
> On a related note, should we try to remove the slave_id field from
> the slave config structure as well? I believe it is still used by
> the shmobile dma engine in non-DT mode, but that is inconsistent with
> how all the others work, and with what the same driver does for DT.
I didn't see that appear, but now that it is there, I'm in two minds
about it.
The first is that the virtual channel approach is more flexible (one
virtual channel per DMA request line) since it allows users to hold on
to a DMA engine virtual channel and don't have the overhead of getting
that. It also means that they have access to the DMA engine struct
device, which should be used with the DMA API for mapping/unmapping etc.
Another advantage is that it is possible (though we don't really do this
at present) to schedule a number of virtual channels onto the underlying
physical channels according to whatever algorithm(s) we decide.
The second point is that requesting a physical channel and then
configuring it seems more elegant from the DMA engine point of view - but
has the down-side that clients have to release the DMA engine channel
(and thus forget the struct device) as soon as possible to avoid starving
the system of physical DMA channels.
On balance, I think the virtual channel approach makes client drivers
more elegant and simpler, and makes the DMA engine API easier to use,
and gives greater flexibility for future improvements. So, I wouldn't
miss the slave_id being removed.
--
FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".
^ permalink raw reply
* [PATCH 2/2] ARM: dts: imx6sl-evk: Add audio support
From: Fabio Estevam @ 2014-01-28 12:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140128121211.GK20583@S2101-09.ap.freescale.net>
On Tue, Jan 28, 2014 at 10:12 AM, Shawn Guo <shawn.guo@linaro.org> wrote:
>> diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
>> index 95bb37b..04cf457 100644
>> --- a/arch/arm/boot/dts/imx6sl.dtsi
>> +++ b/arch/arm/boot/dts/imx6sl.dtsi
>> @@ -236,6 +236,7 @@
>> <&sdma 38 1 0>;
>> dma-names = "rx", "tx";
>> fsl,fifo-depth = <15>;
>> + fsl,ssi-dma-events = <38 37>;
>
> Do you still need this custom property?
I can get rid of it.
Should I remove from the other SoCs as well?
Regards,
Fabio Estevam
^ permalink raw reply
* [PATCH 2/2] ARM: dts: imx6sl-evk: Add audio support
From: Shawn Guo @ 2014-01-28 12:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390443213-14061-2-git-send-email-festevam@gmail.com>
On Thu, Jan 23, 2014 at 12:13:33AM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> imx6sl-evk has a wm8962 codec. Add support for it.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> arch/arm/boot/dts/imx6sl-evk.dts | 72 +++++++++++++++++++++++++++++++++++++++
> arch/arm/boot/dts/imx6sl-pingrp.h | 11 ++++++
> arch/arm/boot/dts/imx6sl.dtsi | 3 ++
> 3 files changed, 86 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
> index 5ba15ab..9e1ab77 100644
> --- a/arch/arm/boot/dts/imx6sl-evk.dts
> +++ b/arch/arm/boot/dts/imx6sl-evk.dts
> @@ -24,6 +24,22 @@
> #address-cells = <1>;
> #size-cells = <0>;
>
> + reg_aud3v: wm8962_supply_3v15 {
Have node name in generic reglator at num form.
> + compatible = "regulator-fixed";
> + regulator-name = "wm8962-supply-3v15";
> + regulator-min-microvolt = <3150000>;
> + regulator-max-microvolt = <3150000>;
> + regulator-boot-on;
> + };
> +
> + reg_aud4v: wm8962_supply_4v2 {
> + compatible = "regulator-fixed";
> + regulator-name = "wm8962-supply-4v2";
> + regulator-min-microvolt = <4325000>;
> + regulator-max-microvolt = <4325000>;
> + regulator-boot-on;
> + };
> +
> reg_usb_otg1_vbus: regulator at 0 {
> compatible = "regulator-fixed";
> reg = <0>;
> @@ -44,6 +60,28 @@
> enable-active-high;
> };
> };
> +
> + sound {
> + compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
> + model = "wm8962-audio";
> + ssi-controller = <&ssi2>;
> + audio-codec = <&codec>;
> + audio-routing =
> + "Headphone Jack", "HPOUTL",
> + "Headphone Jack", "HPOUTR",
> + "Ext Spk", "SPKOUTL",
> + "Ext Spk", "SPKOUTR",
> + "AMIC", "MICBIAS",
> + "IN3R", "AMIC";
> + mux-int-port = <2>;
> + mux-ext-port = <3>;
> + };
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux3>;
> + status = "okay";
> };
>
> &i2c1 {
> @@ -152,6 +190,27 @@
> };
> };
>
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +
> + codec: wm8962 at 1a {
> + compatible = "wlf,wm8962";
> + reg = <0x1a>;
> + clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
> + DCVDD-supply = <&vgen3_reg>;
> + DBVDD-supply = <®_aud3v>;
> + AVDD-supply = <&vgen3_reg>;
> + CPVDD-supply = <&vgen3_reg>;
> + MICVDD-supply = <®_aud3v>;
> + PLLVDD-supply = <&vgen3_reg>;
> + SPKVDD1-supply = <®_aud4v>;
> + SPKVDD2-supply = <®_aud4v>;
> + };
> +};
> +
> &ecspi1 {
> fsl,spi-num-chipselects = <1>;
> cs-gpios = <&gpio4 11 0>;
> @@ -192,10 +251,18 @@
> >;
> };
>
> + pinctrl_audmux3: audmux3grp {
> + fsl,pins = <MX6SL_AUDMUX3_PINGRP1>;
> + };
> +
> pinctrl_i2c1: i2c1grp {
> fsl,pins = <MX6SL_I2C1_PINGRP1>;
> };
>
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <MX6SL_I2C2_PINGRP1>;
> + };
> +
> pinctrl_ecspi1: ecspi1grp {
> fsl,pins = <MX6SL_ECSPI1_PINGRP1>;
> };
> @@ -277,6 +344,11 @@
> status = "okay";
> };
>
> +&ssi2 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> &uart1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_uart1>;
> diff --git a/arch/arm/boot/dts/imx6sl-pingrp.h b/arch/arm/boot/dts/imx6sl-pingrp.h
> index cada37a..ee50ace 100644
> --- a/arch/arm/boot/dts/imx6sl-pingrp.h
> +++ b/arch/arm/boot/dts/imx6sl-pingrp.h
> @@ -10,6 +10,13 @@
> #ifndef __DTS_IMX6SL_PINGRP_H
> #define __DTS_IMX6SL_PINGRP_H
>
> +#define MX6SL_AUDMUX3_PINGRP1 \
> + MX6SL_PAD_AUD_RXD__AUD3_RXD 0x4130B0 \
> + MX6SL_PAD_AUD_TXC__AUD3_TXC 0x4130B0 \
> + MX6SL_PAD_AUD_TXD__AUD3_TXD 0x4110B0 \
> + MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x4130B0 \
> + MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130B0
> +
> #define MX6SL_ECSPI1_PINGRP1 \
> MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1 \
> MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1 \
> @@ -19,6 +26,10 @@
> MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1 \
> MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1
>
> +#define MX6SL_I2C2_PINGRP1 \
> + MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1 \
> + MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1
> +
> #define MX6SL_FEC_PINGRP1 \
> MX6SL_PAD_FEC_MDC__FEC_MDC 0x1b0b0 \
> MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x1b0b0 \
> diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
> index 95bb37b..04cf457 100644
> --- a/arch/arm/boot/dts/imx6sl.dtsi
> +++ b/arch/arm/boot/dts/imx6sl.dtsi
> @@ -236,6 +236,7 @@
> <&sdma 38 1 0>;
> dma-names = "rx", "tx";
> fsl,fifo-depth = <15>;
> + fsl,ssi-dma-events = <38 37>;
Do you still need this custom property?
Shawn
> status = "disabled";
> };
>
> @@ -250,6 +251,7 @@
> <&sdma 42 1 0>;
> dma-names = "rx", "tx";
> fsl,fifo-depth = <15>;
> + fsl,ssi-dma-events = <42 41>;
> status = "disabled";
> };
>
> @@ -264,6 +266,7 @@
> <&sdma 46 1 0>;
> dma-names = "rx", "tx";
> fsl,fifo-depth = <15>;
> + fsl,ssi-dma-events = <46 45>;
> status = "disabled";
> };
>
> --
> 1.8.1.2
>
^ permalink raw reply
* [PATCH v2 00/10] arm/arm64: KVM: host cache maintainance when guest caches are off
From: Pranavkumar Sawargaonkar @ 2014-01-28 12:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390402602-22777-1-git-send-email-marc.zyngier@arm.com>
Hi Marc,
On 22 January 2014 20:26, Marc Zyngier <marc.zyngier@arm.com> wrote:
> When we run a guest with cache disabled, we don't flush the cache to
> the Point of Coherency, hence possibly missing bits of data that have
> been written in the cache, but have not yet reached memory.
>
> We also have the opposite issue: when a guest enables its cache,
> whatever sits in the cache is suddenly going to become visible,
> shadowing whatever the guest has written into RAM.
>
> There are several approaches to these issues:
> - Using the DC bit when caches are off: this breaks guests assuming
> caches off while doing DMA operations. Bootloaders, for example.
> It also breaks the I-D coherency.
> - Fetch the memory attributes on translation fault, and flush the
> cache while handling the fault. This relies on using the PAR_EL1
> register to obtain the Stage-1 memory attributes, and tends to be
> slow.
> - Detecting the translation faults occuring with MMU off (and
> performing a cache clean), and trapping SCTLR_EL1 to detect the
> moment when the guest is turning its caches on (and performing a
> cache invalidation). Trapping of SCTLR_EL1 is then disabled to
> ensure the best performance.
>
> This patch series implements the last solution, for both arm and
> arm64. Tested on TC2 (ARMv7) and FVP model (ARMv8).
>
> >From v1 (http://www.spinics.net/lists/kvm/msg99404.html):
> - Fixed AArch32 VM handling on arm64 (Reported by Anup)
> - Added ARMv7 support:
> * Fixed a couple of issues regarding handling of 64bit cp15 regs
> * Per-vcpu HCR
> * Switching of AMAIR0 and AMAIR1
>
> Marc Zyngier (10):
> arm64: KVM: force cache clean on page fault when caches are off
> arm64: KVM: allows discrimination of AArch32 sysreg access
> arm64: KVM: trap VM system registers until MMU and caches are ON
> arm64: KVM: flush VM pages before letting the guest enable caches
> ARM: KVM: force cache clean on page fault when caches are off
> ARM: KVM: fix handling of trapped 64bit coprocessor accesses
> ARM: KVM: fix ordering of 64bit coprocessor accesses
> ARM: KVM: introduce per-vcpu HYP Configuration Register
> ARM: KVM: trap VM system registers until MMU and caches are ON
> ARM: KVM: add world-switch for AMAIR{0,1}
>
> arch/arm/include/asm/kvm_arm.h | 4 +-
> arch/arm/include/asm/kvm_asm.h | 4 +-
> arch/arm/include/asm/kvm_host.h | 9 ++--
> arch/arm/include/asm/kvm_mmu.h | 11 ++--
> arch/arm/kernel/asm-offsets.c | 1 +
> arch/arm/kvm/coproc.c | 95 +++++++++++++++++++++++++++-------
> arch/arm/kvm/coproc.h | 14 +++--
> arch/arm/kvm/coproc_a15.c | 2 +-
> arch/arm/kvm/coproc_a7.c | 2 +-
> arch/arm/kvm/guest.c | 1 +
> arch/arm/kvm/interrupts_head.S | 21 +++++---
> arch/arm/kvm/mmu.c | 87 ++++++++++++++++++++++++++++++-
> arch/arm64/include/asm/kvm_arm.h | 3 +-
> arch/arm64/include/asm/kvm_asm.h | 3 +-
> arch/arm64/include/asm/kvm_mmu.h | 12 +++--
> arch/arm64/kvm/sys_regs.c | 107 ++++++++++++++++++++++++++++++++++-----
> arch/arm64/kvm/sys_regs.h | 2 +
> 17 files changed, 316 insertions(+), 62 deletions(-)
>
Me and Anup have successfully tested this patch set on XGENE and on
foundation model.
> --
> 1.8.3.4
>
> _______________________________________________
> kvmarm mailing list
> kvmarm at lists.cs.columbia.edu
> https://lists.cs.columbia.edu/cucslists/listinfo/kvmarm
Thanks,
Pranav
^ permalink raw reply
* [Patch v3 2/2] dmaengine: qcom_bam_dma: Add device tree binding
From: Arnd Bergmann @ 2014-01-28 12:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4916428.f0GtxdkWKj@wuerfel>
On Tuesday 28 January 2014 13:05:10 Arnd Bergmann wrote:
> On Tuesday 28 January 2014 17:02:42 Vinod Koul wrote:
> > On Tue, Jan 28, 2014 at 11:17:57AM +0000, Russell King - ARM Linux wrote:
> > > On Tue, Jan 28, 2014 at 10:16:53AM +0100, Arnd Bergmann wrote:
> > > > On Tuesday 28 January 2014 10:05:35 Lars-Peter Clausen wrote:
> > > > > Why does the direction needs to be specified in specifier? I see two
> > > > > options, either the direction per is fixed in hardware. In that case the DMA
> > > > > controller node should describe which channel is which direction. Or the
> > > > > direction is not fixed in hardware and can be changed at runtime in which
> > > > > case it should be set on a per descriptor basis.
> > > >
> > > > Normally the direction is implied by dmaengine_slave_config().
> > >
> > > No. The direction argument in there is deprecated - we've been talking
> > > about removing it for some time.
> > >
> > > DMA engine drivers should store all parameters of the configuration, and
> > > then select the appropriate ones when preparing a transfer (which itself
> > > involves a direction.)
> >
> > Right all the prep_ calls for slave cases have explcit direction argument so
> > sending it using slave config makes no sense. So will remove it after the merge
> > window closes and fix
>
> Ok, thanks for clearing up my mistake. However, the argument remains:
> the direction doesn't need to be in the DT DMA descriptor since it
> gets set by software anyway.
On a related note, should we try to remove the slave_id field from
the slave config structure as well? I believe it is still used by
the shmobile dma engine in non-DT mode, but that is inconsistent with
how all the others work, and with what the same driver does for DT.
Arnd
^ permalink raw reply
* [PATCH 1/2] ARM: dts: imx6sl-evk: Add PFUZE100 support
From: Shawn Guo @ 2014-01-28 12:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390443213-14061-1-git-send-email-festevam@gmail.com>
On Thu, Jan 23, 2014 at 12:13:32AM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> imx6sl-evk board has Freescale PFUZE100 regulator, so add support for it.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> arch/arm/boot/dts/imx6sl-evk.dts | 110 ++++++++++++++++++++++++++++++++++++++
> arch/arm/boot/dts/imx6sl-pingrp.h | 4 ++
> 2 files changed, 114 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
> index f23b5d1..5ba15ab 100644
> --- a/arch/arm/boot/dts/imx6sl-evk.dts
> +++ b/arch/arm/boot/dts/imx6sl-evk.dts
> @@ -46,6 +46,112 @@
> };
> };
>
> +&i2c1 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1>;
> + status = "okay";
> +
> + pmic: pfuze100 at 08 {
> + compatible = "fsl,pfuze100";
> + reg = <0x08>;
> +
> + regulators {
> + sw1a_reg: sw1ab {
> + regulator-min-microvolt = <300000>;
> + regulator-max-microvolt = <1875000>;
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-ramp-delay = <6250>;
> + };
> +
> + sw1c_reg: sw1c {
> + regulator-min-microvolt = <300000>;
> + regulator-max-microvolt = <1875000>;
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-ramp-delay = <6250>;
> + };
> +
> + sw2_reg: sw2 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + sw3a_reg: sw3a {
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1975000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + sw3b_reg: sw3b {
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1975000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + sw4_reg: sw4 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + swbst_reg: swbst {
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5150000>;
> + };
> +
> + snvs_reg: vsnvs {
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + vref_reg: vrefddr {
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + vgen1_reg: vgen1 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1550000>;
> + };
> +
> + vgen2_reg: vgen2 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1550000>;
> + };
> +
> + vgen3_reg: vgen3 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + vgen4_reg: vgen4 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + vgen5_reg: vgen5 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + vgen6_reg: vgen6 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> + };
> + };
> +};
> +
> &ecspi1 {
> fsl,spi-num-chipselects = <1>;
> cs-gpios = <&gpio4 11 0>;
> @@ -86,6 +192,10 @@
> >;
> };
>
> + pinctrl_i2c1: i2c1grp {
> + fsl,pins = <MX6SL_I2C1_PINGRP1>;
> + };
> +
> pinctrl_ecspi1: ecspi1grp {
> fsl,pins = <MX6SL_ECSPI1_PINGRP1>;
> };
> diff --git a/arch/arm/boot/dts/imx6sl-pingrp.h b/arch/arm/boot/dts/imx6sl-pingrp.h
> index ead26d4..cada37a 100644
> --- a/arch/arm/boot/dts/imx6sl-pingrp.h
> +++ b/arch/arm/boot/dts/imx6sl-pingrp.h
> @@ -15,6 +15,10 @@
> MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1 \
> MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
>
> +#define MX6SL_I2C1_PINGRP1 \
> + MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1 \
> + MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1
> +
The PINGRP is gone.
Shawn
> #define MX6SL_FEC_PINGRP1 \
> MX6SL_PAD_FEC_MDC__FEC_MDC 0x1b0b0 \
> MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x1b0b0 \
> --
> 1.8.1.2
>
^ permalink raw reply
* [PATCH 1/2] ARM: dts: imx6: edmqmx6: fix wrong usbotg pingroup
From: Shawn Guo @ 2014-01-28 12:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390419567-2643-2-git-send-email-silvio.fricke@gmail.com>
On Wed, Jan 22, 2014 at 08:39:26PM +0100, Silvio F wrote:
> Signed-off-by: Silvio F <silvio.fricke@gmail.com>
> ---
> arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
> index b8a1ff4..6706d1b 100644
> --- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
> +++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
> @@ -266,7 +266,7 @@
> };
>
> pinctrl_usbotg: usbotggrp {
> - fsl,pins = <MX6QDL_USBOTG_PINGRP1>;
> + fsl,pins = <MX6QDL_USBOTG_PINGRP2>;
The PINGRP header is gone now. Please rebase it on branch below.
git://git.linaro.org/people/shawn.guo/linux-2.6.git imx/dt
Shawn
> };
>
> pinctrl_usdhc3: usdhc3grp {
> --
> 1.8.5.2
>
^ permalink raw reply
* [Patch v3 2/2] dmaengine: qcom_bam_dma: Add device tree binding
From: Arnd Bergmann @ 2014-01-28 12:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140128113242.GJ10628@intel.com>
On Tuesday 28 January 2014 17:02:42 Vinod Koul wrote:
> On Tue, Jan 28, 2014 at 11:17:57AM +0000, Russell King - ARM Linux wrote:
> > On Tue, Jan 28, 2014 at 10:16:53AM +0100, Arnd Bergmann wrote:
> > > On Tuesday 28 January 2014 10:05:35 Lars-Peter Clausen wrote:
> > > > Why does the direction needs to be specified in specifier? I see two
> > > > options, either the direction per is fixed in hardware. In that case the DMA
> > > > controller node should describe which channel is which direction. Or the
> > > > direction is not fixed in hardware and can be changed at runtime in which
> > > > case it should be set on a per descriptor basis.
> > >
> > > Normally the direction is implied by dmaengine_slave_config().
> >
> > No. The direction argument in there is deprecated - we've been talking
> > about removing it for some time.
> >
> > DMA engine drivers should store all parameters of the configuration, and
> > then select the appropriate ones when preparing a transfer (which itself
> > involves a direction.)
>
> Right all the prep_ calls for slave cases have explcit direction argument so
> sending it using slave config makes no sense. So will remove it after the merge
> window closes and fix
Ok, thanks for clearing up my mistake. However, the argument remains:
the direction doesn't need to be in the DT DMA descriptor since it
gets set by software anyway.
Arnd
^ permalink raw reply
* [PATCH] ARM: imx: enable delaytimer on the imx timer
From: Shawn Guo @ 2014-01-28 12:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390390544-10319-1-git-send-email-bigeasy@linutronix.de>
On Wed, Jan 22, 2014 at 12:35:44PM +0100, Sebastian Andrzej Siewior wrote:
> The imx can support timer-based delays, so implement this.
> Skips past jiffy calibration.
>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Applied, thanks.
^ permalink raw reply
* Building with gcc 4.6.4
From: Russell King - ARM Linux @ 2014-01-28 12:01 UTC (permalink / raw)
To: linux-arm-kernel
So, yesterday I built gcc 4.6.4 (mainline) for the autobuilder, and the
result is that every build failed with the same error:
scripts/mod/empty.c:1:0: error: FPA is unsupported in the AAPCS
This seems to be because linux-elf targets default to fpe3 in mainline
gcc, but specifying -mabi=aapcs-linux switches us into EABI mode where
the compiler errors out with the default FPU.
Hence, I believe we need this to ensure that a compatible VFP is
selected. One can argue that building EABI ARMv4 with VFP is silly,
but it seems that's what the gcc folk have decided (rightly or
wrongly.)
Maybe this is a bug in mainline GCC - which begs the question why
(presumably, since no one has picked this up) Linaro's toolchain
has fixes but mainline GCC doesn't.
Comments?
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 23d5e3946589..08a9ef58d9c3 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -96,7 +96,7 @@ tune-$(CONFIG_CPU_V6K) =$(call cc-option,-mtune=arm1136j-s,-mtune=strongarm)
tune-y := $(tune-y)
ifeq ($(CONFIG_AEABI),y)
-CFLAGS_ABI :=-mabi=aapcs-linux -mno-thumb-interwork
+CFLAGS_ABI :=-mabi=aapcs-linux -mno-thumb-interwork -mfpu=vfp
else
CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,)
endif
--
FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".
^ permalink raw reply related
* [PATCH V3] ARM: imx: add always-on clock array for i.mx6sl to maintain correct usecount
From: Shawn Guo @ 2014-01-28 11:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390374887-22833-1-git-send-email-b20788@freescale.com>
On Wed, Jan 22, 2014 at 03:14:47PM +0800, Anson Huang wrote:
> IPG, ARM and MMDC's clock should be enabled during kernel boot up,
> so we need to maintain their usecount, otherwise, they may be
> disabled unexpectedly if their children's clock are turned off, and
> caused their parent PLLs also get disabled, which is incorrect.
>
> Signed-off-by: Anson Huang <b20788@freescale.com>
Applied, thanks.
^ permalink raw reply
* [PATCH] ARM: dts: imx6qdl-sabreauto: Add PFUZE100 support
From: Shawn Guo @ 2014-01-28 11:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390250840-24196-1-git-send-email-festevam@gmail.com>
On Mon, Jan 20, 2014 at 06:47:20PM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> mx6 sabreauto boards have Freescale PFUZE100 regulator, so add support for it.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 110 +++++++++++++++++++++++++++++++
> 1 file changed, 110 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> index 47c5a3f..e44ff49 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> @@ -63,6 +63,112 @@
> status = "okay";
> };
>
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +
> + pmic: pfuze100 at 08 {
> + compatible = "fsl,pfuze100";
> + reg = <0x08>;
> +
> + regulators {
> + sw1a_reg: sw1ab {
> + regulator-min-microvolt = <300000>;
> + regulator-max-microvolt = <1875000>;
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-ramp-delay = <6250>;
> + };
> +
> + sw1c_reg: sw1c {
> + regulator-min-microvolt = <300000>;
> + regulator-max-microvolt = <1875000>;
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-ramp-delay = <6250>;
> + };
> +
> + sw2_reg: sw2 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + sw3a_reg: sw3a {
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1975000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + sw3b_reg: sw3b {
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1975000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + sw4_reg: sw4 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + swbst_reg: swbst {
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5150000>;
> + };
> +
> + snvs_reg: vsnvs {
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + vref_reg: vrefddr {
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + vgen1_reg: vgen1 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1550000>;
> + };
> +
> + vgen2_reg: vgen2 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1550000>;
> + };
> +
> + vgen3_reg: vgen3 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + vgen4_reg: vgen4 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + vgen5_reg: vgen5 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + vgen6_reg: vgen6 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> + };
> + };
> +};
> +
> &iomuxc {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_hog>;
> @@ -90,6 +196,10 @@
> fsl,pins = <MX6QDL_ENET_PINGRP2_GPIO6>;
> };
>
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <MX6QDL_I2C2_PINGRP3>;
The PINGRP header is gone. Please rebase it against to my imx/dt
branch.
Shawn
> + };
> +
> pinctrl_gpmi_nand: gpminandgrp {
> fsl,pins = <MX6QDL_GPMI_NAND_PINGRP1>;
> };
> --
> 1.8.1.2
>
^ permalink raw reply
* [PATCH v2 1/7] cpufreq: cpufreq-cpu0: allow optional safe voltage during frequency transitions
From: Shawn Guo @ 2014-01-28 11:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJuA9ah1vsgpD04QhM5RApkCe9xcvpPkLvdwzgadKGWvngAt+g@mail.gmail.com>
On Tue, Jan 28, 2014 at 11:00:29AM +0530, Thomas Abraham wrote:
> Hi Mike,
>
> On Tue, Jan 28, 2014 at 1:55 AM, Mike Turquette <mturquette@linaro.org> wrote:
> > Quoting Thomas Abraham (2014-01-18 04:10:51)
> >> From: Thomas Abraham <thomas.ab@samsung.com>
> >>
> >> On some platforms such as the Samsung Exynos, changing the frequency
> >> of the CPU clock requires changing the frequency of the PLL that is
> >> supplying the CPU clock. To change the frequency of the PLL, the CPU
> >> clock is temporarily reparented to another parent clock.
> >>
> >> The clock frequency of this temporary parent clock could be much higher
> >> than the clock frequency of the PLL at the time of reparenting. Due
> >> to the temporary increase in the CPU clock speed, the CPU (and any other
> >> components in the CPU clock domain such as dividers, mux, etc.) have to
> >> to be operated at a higher voltage level, called the safe voltage level.
> >> This patch adds optional support to temporarily switch to a safe voltage
> >> level during CPU frequency transitions.
> >>
> >> Cc: Shawn Guo <shawn.guo@linaro.org>
> >> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
> >
> > I'm not a fan of this change. This corner case should be abstracted away
> > somehow. I had talked to Chander Kayshap previously about handling
> > voltage changes in clock notifier callbacks, which then renders any
> > voltage change as a trivial part of the clock rate transition. That
> > means that this "safe voltage" thing could be handled automagically
> > without any additional code in the CPUfreq driver.
> >
> > There are two nice ways to do this with the clock framework. First is
> > explicit re-parenting with voltage scaling done in the clock rate-change
> > notifiers:
> >
> > clk_set_parent(cpu_clk, temp_parent);
> > /* implicit voltage scaling to "safe voltage" happens above */
> > clk_set_rate(pll, some_rate);
> > clk_set_parent(cpu_clk, pll);
> > /* implicit voltage scaling to nominal OPP voltage happens above */
> >
> > The above sequence would require a separate exnyos CPUfreq driver, due
> > to the added clk_set_parent logic.
> >
> > The second way to do this is to abstract the clk re-muxing logic out
> > into the clk driver, which would allow cpufreq-cpu0 to be used for the
> > exynos chips.
>
> This is the approach this patch series takes (patch 2/7). The clock
> re-muxing logic is handled by a clock driver code. The difference from
> what you suggested is that the safe voltage (that may be optionally)
> required before doing the re-muxing is handled here in cpufreq-cpu0
> driver.
>
> The safe voltage setup can be done in the notifier as you suggested.
> But, doing that in cpufreq-cpu0 driver will help other platforms reuse
> this feature if required. Also, if done here, the regulator handling
> is localized in this driver which otherwise would need to be handled
> in two places, cpufreq-cpu0 driver and the clock notifier.
>
> So I tend to prefer the approach in this patch but I am willing to
> consider any suggestions. Shawn, it would be helpful if you could let
> us know your thoughts on this. I am almost done with testing the v3 of
> this series and want to post it so if there are any objections to the
> changes in this patch, please let me know.
To me, it's the best that we reuse cpufreq-cpu0 for exynos without any
changes on cpufreq-cpu0 driver ;)
Shawn
^ permalink raw reply
* [RFC PATCH 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
From: Anup Patel @ 2014-01-28 11:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52E79408.5000903@arm.com>
On Tue, Jan 28, 2014 at 4:57 PM, Marc Zyngier <marc.zyngier@arm.com> wrote:
> Hi Anup,
>
> On 21/01/14 13:01, Anup Patel wrote:
>> Currently, the in-kernel PSCI emulation provides PSCI v0.1 interface to
>> VCPUs. This patch extends current in-kernel PSCI emulation to provide
>> PSCI v0.2 interface to VCPUs.
>>
>> By default, ARM/ARM64 KVM will always provide PSCI v0.1 interface for
>> keeping the ABI backward-compatible.
>>
>> To select PSCI v0.2 interface for VCPUs, the user space (i.e. QEMU or
>> KVMTOOL) will have to set KVM_ARM_VCPU_PSCI_0_2 feature when doing VCPU
>> init using KVM_ARM_VCPU_INIT ioctl.
>>
>> Signed-off-by: Anup Patel <anup.patel@linaro.org>
>> Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
>> ---
>> arch/arm/include/asm/kvm_host.h | 2 +-
>> arch/arm/include/uapi/asm/kvm.h | 39 ++++++++++++++++--
>> arch/arm/kvm/arm.c | 6 ++-
>> arch/arm/kvm/psci.c | 79 ++++++++++++++++++++++++++++++-------
>> arch/arm64/include/asm/kvm_host.h | 2 +-
>> arch/arm64/include/uapi/asm/kvm.h | 39 ++++++++++++++++--
>> 6 files changed, 143 insertions(+), 24 deletions(-)
>>
>> diff --git a/arch/arm/include/asm/kvm_host.h b/arch/arm/include/asm/kvm_host.h
>> index 8a6f6db..0239ac5 100644
>> --- a/arch/arm/include/asm/kvm_host.h
>> +++ b/arch/arm/include/asm/kvm_host.h
>> @@ -36,7 +36,7 @@
>> #define KVM_COALESCED_MMIO_PAGE_OFFSET 1
>> #define KVM_HAVE_ONE_REG
>>
>> -#define KVM_VCPU_MAX_FEATURES 1
>> +#define KVM_VCPU_MAX_FEATURES 2
>>
>> #include <kvm/arm_vgic.h>
>>
>> diff --git a/arch/arm/include/uapi/asm/kvm.h b/arch/arm/include/uapi/asm/kvm.h
>> index c498b60..d9eb74c 100644
>> --- a/arch/arm/include/uapi/asm/kvm.h
>> +++ b/arch/arm/include/uapi/asm/kvm.h
>> @@ -83,6 +83,7 @@ struct kvm_regs {
>> #define KVM_VGIC_V2_CPU_SIZE 0x2000
>>
>> #define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */
>> +#define KVM_ARM_VCPU_PSCI_0_2 1 /* CPU uses PSCI v0.2 */
>>
>> struct kvm_vcpu_init {
>> __u32 target;
>> @@ -164,7 +165,7 @@ struct kvm_arch_memory_slot {
>> /* Highest supported SPI, from VGIC_NR_IRQS */
>> #define KVM_ARM_IRQ_GIC_MAX 127
>>
>> -/* PSCI interface */
>> +/* PSCI v0.1 interface */
>> #define KVM_PSCI_FN_BASE 0x95c1ba5e
>> #define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n))
>>
>> @@ -173,9 +174,41 @@ struct kvm_arch_memory_slot {
>> #define KVM_PSCI_FN_CPU_ON KVM_PSCI_FN(2)
>> #define KVM_PSCI_FN_MIGRATE KVM_PSCI_FN(3)
>>
>> +/* PSCI v0.2 interface */
>> +#define KVM_PSCI_0_2_FN_BASE 0x84000000
>> +#define KVM_PSCI_0_2_FN(n) (KVM_PSCI_0_2_FN_BASE + (n))
>> +#define KVM_PSCI_0_2_FN64_BASE 0xC4000000
>> +#define KVM_PSCI_0_2_FN64(n) (KVM_PSCI_0_2_FN64_BASE + (n))
>> +
>> +#define KVM_PSCI_0_2_FN_PSCI_VERSION KVM_PSCI_0_2_FN(0)
>> +#define KVM_PSCI_0_2_FN_CPU_SUSPEND KVM_PSCI_0_2_FN(1)
>> +#define KVM_PSCI_0_2_FN_CPU_OFF KVM_PSCI_0_2_FN(2)
>> +#define KVM_PSCI_0_2_FN_CPU_ON KVM_PSCI_0_2_FN(3)
>> +#define KVM_PSCI_0_2_FN_AFFINITY_INFO KVM_PSCI_0_2_FN(4)
>> +#define KVM_PSCI_0_2_FN_MIGRATE KVM_PSCI_0_2_FN(5)
>> +#define KVM_PSCI_0_2_FN_MIGRATE_INFO_TYPE \
>> + KVM_PSCI_0_2_FN(6)
>> +#define KVM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU \
>> + KVM_PSCI_0_2_FN(7)
>> +#define KVM_PSCI_0_2_FN_SYSTEM_OFF KVM_PSCI_0_2_FN(8)
>> +#define KVM_PSCI_0_2_FN_SYSTEM_RESET KVM_PSCI_0_2_FN(9)
>> +
>> +#define KVM_PSCI_0_2_FN64_CPU_SUSPEND KVM_PSCI_0_2_FN64(1)
>> +#define KVM_PSCI_0_2_FN64_CPU_ON KVM_PSCI_0_2_FN64(3)
>> +#define KVM_PSCI_0_2_FN64_AFFINITY_INFO KVM_PSCI_0_2_FN64(4)
>> +#define KVM_PSCI_0_2_FN64_MIGRATE KVM_PSCI_0_2_FN64(5)
>> +#define KVM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU \
>> + KVM_PSCI_0_2_FN64(7)
>> +
>> +/* PSCI return values */
>> #define KVM_PSCI_RET_SUCCESS 0
>> -#define KVM_PSCI_RET_NI ((unsigned long)-1)
>> -#define KVM_PSCI_RET_INVAL ((unsigned long)-2)
>
> This is a massive no-no. It is already part of the userspace API, and we
> cannot break it (neither arm nor arm64). These #defines have to stay
> forever.
>
>> +#define KVM_PSCI_RET_NOT_SUPPORTED ((unsigned long)-1)
>> +#define KVM_PSCI_RET_INVALID_PARAMS ((unsigned long)-2)
>
> As such, you can drop these two defines, and use the original ones in
> your new code, which will reduce the churn.
Sure, I will use the original defines. I was just trying to name all
return values
as described in spec.
>
>> #define KVM_PSCI_RET_DENIED ((unsigned long)-3)
>> +#define KVM_PSCI_RET_ALREADY_ON ((unsigned long)-4)
>> +#define KVM_PSCI_RET_ON_PENDING ((unsigned long)-5)
>> +#define KVM_PSCI_RET_INTERNAL_FAILURE ((unsigned long)-6)
>> +#define KVM_PSCI_RET_NOT_PRESENT ((unsigned long)-7)
>> +#define KVM_PSCI_RET_DISABLED ((unsigned long)-8)
>>
>> #endif /* __ARM_KVM_H__ */
>> diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
>> index 2a700e0..0b7817a 100644
>> --- a/arch/arm/kvm/arm.c
>> +++ b/arch/arm/kvm/arm.c
>> @@ -193,6 +193,7 @@ int kvm_dev_ioctl_check_extension(long ext)
>> case KVM_CAP_DESTROY_MEMORY_REGION_WORKS:
>> case KVM_CAP_ONE_REG:
>> case KVM_CAP_ARM_PSCI:
>> + case KVM_CAP_ARM_PSCI_0_2:
>> r = 1;
>> break;
>> case KVM_CAP_COALESCED_MMIO:
>> @@ -483,7 +484,10 @@ static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu)
>> * PSCI code.
>> */
>> if (test_and_clear_bit(KVM_ARM_VCPU_POWER_OFF, vcpu->arch.features)) {
>> - *vcpu_reg(vcpu, 0) = KVM_PSCI_FN_CPU_OFF;
>> + if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features))
>
> Can you make this a function? Something like:
>
> int get_psci_version(struct kvm_vcpu *vcpu)
> {
> if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features))
> return PSCI_VERSION_0_2;
>
> return PSCI_VERSION_0_1;
> }
>
> probably located in psci.c. This way, when PSCI version 3.14159 comes
> along, we'll have some mechanism in place, and we're free to change the
> detection method without impacting the rest of the code.
Yes, I was not sure about this change.
I will implement "int psci_version(struct kvm_vcpu *vcpu)" in psci.c and use
this wherever applicable (as-per your suggestion).
>
>> + *vcpu_reg(vcpu, 0) = KVM_PSCI_0_2_FN_CPU_OFF;
>> + else
>> + *vcpu_reg(vcpu, 0) = KVM_PSCI_FN_CPU_OFF;
>> kvm_psci_call(vcpu);
>> }
>>
>> diff --git a/arch/arm/kvm/psci.c b/arch/arm/kvm/psci.c
>> index 0881bf1..ee044a3 100644
>> --- a/arch/arm/kvm/psci.c
>> +++ b/arch/arm/kvm/psci.c
>> @@ -55,13 +55,13 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
>> }
>>
>> if (!vcpu)
>> - return KVM_PSCI_RET_INVAL;
>> + return KVM_PSCI_RET_INVALID_PARAMS;
>>
>> target_pc = *vcpu_reg(source_vcpu, 2);
>>
>> wq = kvm_arch_vcpu_wq(vcpu);
>> if (!waitqueue_active(wq))
>> - return KVM_PSCI_RET_INVAL;
>> + return KVM_PSCI_RET_INVALID_PARAMS;
>>
>> kvm_reset_vcpu(vcpu);
>>
>> @@ -84,17 +84,49 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
>> return KVM_PSCI_RET_SUCCESS;
>> }
>>
>> -/**
>> - * kvm_psci_call - handle PSCI call if r0 value is in range
>> - * @vcpu: Pointer to the VCPU struct
>> - *
>> - * Handle PSCI calls from guests through traps from HVC instructions.
>> - * The calling convention is similar to SMC calls to the secure world where
>> - * the function number is placed in r0 and this function returns true if the
>> - * function number specified in r0 is withing the PSCI range, and false
>> - * otherwise.
>> - */
>> -bool kvm_psci_call(struct kvm_vcpu *vcpu)
>> +static bool kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
>> +{
>> + unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
>> + unsigned long val;
>> +
>> + switch (psci_fn) {
>> + case KVM_PSCI_0_2_FN_PSCI_VERSION:
>> + /*
>> + * Bits[31:16] = Major Version = 0
>> + * Bits[15:0] = Minor Version = 2
>> + */
>> + val = 2;
>> + break;
>> + case KVM_PSCI_0_2_FN_CPU_OFF:
>> + kvm_psci_vcpu_off(vcpu);
>> + val = KVM_PSCI_RET_SUCCESS;
>> + break;
>> + case KVM_PSCI_0_2_FN_CPU_ON:
>> + case KVM_PSCI_0_2_FN64_CPU_ON:
>> + val = kvm_psci_vcpu_on(vcpu);
>> + break;
>> + case KVM_PSCI_0_2_FN_CPU_SUSPEND:
>> + case KVM_PSCI_0_2_FN_AFFINITY_INFO:
>> + case KVM_PSCI_0_2_FN_MIGRATE:
>> + case KVM_PSCI_0_2_FN_MIGRATE_INFO_TYPE:
>> + case KVM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
>> + case KVM_PSCI_0_2_FN_SYSTEM_OFF:
>> + case KVM_PSCI_0_2_FN_SYSTEM_RESET:
>> + case KVM_PSCI_0_2_FN64_CPU_SUSPEND:
>> + case KVM_PSCI_0_2_FN64_AFFINITY_INFO:
>> + case KVM_PSCI_0_2_FN64_MIGRATE:
>> + case KVM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
>> + val = KVM_PSCI_RET_NOT_SUPPORTED;
>> + break;
>> + default:
>> + return false;
>> + }
>> +
>> + *vcpu_reg(vcpu, 0) = val;
>> + return true;
>> +}
>> +
>> +static bool kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
>> {
>> unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
>> unsigned long val;
>> @@ -109,9 +141,8 @@ bool kvm_psci_call(struct kvm_vcpu *vcpu)
>> break;
>> case KVM_PSCI_FN_CPU_SUSPEND:
>> case KVM_PSCI_FN_MIGRATE:
>> - val = KVM_PSCI_RET_NI;
>> + val = KVM_PSCI_RET_NOT_SUPPORTED;
>> break;
>> -
>> default:
>> return false;
>> }
>> @@ -119,3 +150,21 @@ bool kvm_psci_call(struct kvm_vcpu *vcpu)
>> *vcpu_reg(vcpu, 0) = val;
>> return true;
>> }
>> +
>> +/**
>> + * kvm_psci_call - handle PSCI call if r0 value is in range
>> + * @vcpu: Pointer to the VCPU struct
>> + *
>> + * Handle PSCI calls from guests through traps from HVC instructions.
>> + * The calling convention is similar to SMC calls to the secure world where
>> + * the function number is placed in r0 and this function returns true if the
>> + * function number specified in r0 is withing the PSCI range, and false
>> + * otherwise.
>> + */
>> +bool kvm_psci_call(struct kvm_vcpu *vcpu)
>> +{
>> + if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features))
>> + return kvm_psci_0_2_call(vcpu);
>> +
>> + return kvm_psci_0_1_call(vcpu);
>> +}
>> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
>> index 0a1d697..92242ce 100644
>> --- a/arch/arm64/include/asm/kvm_host.h
>> +++ b/arch/arm64/include/asm/kvm_host.h
>> @@ -39,7 +39,7 @@
>> #include <kvm/arm_vgic.h>
>> #include <kvm/arm_arch_timer.h>
>>
>> -#define KVM_VCPU_MAX_FEATURES 2
>> +#define KVM_VCPU_MAX_FEATURES 3
>>
>> struct kvm_vcpu;
>> int kvm_target_cpu(void);
>> diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h
>> index d9f026b..0eb254d 100644
>> --- a/arch/arm64/include/uapi/asm/kvm.h
>> +++ b/arch/arm64/include/uapi/asm/kvm.h
>> @@ -77,6 +77,7 @@ struct kvm_regs {
>>
>> #define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */
>> #define KVM_ARM_VCPU_EL1_32BIT 1 /* CPU running a 32bit VM */
>> +#define KVM_ARM_VCPU_PSCI_0_2 2 /* CPU uses PSCI v0.2 */
>>
>> struct kvm_vcpu_init {
>> __u32 target;
>> @@ -150,7 +151,7 @@ struct kvm_arch_memory_slot {
>> /* Highest supported SPI, from VGIC_NR_IRQS */
>> #define KVM_ARM_IRQ_GIC_MAX 127
>>
>> -/* PSCI interface */
>> +/* PSCI v0.1 interface */
>> #define KVM_PSCI_FN_BASE 0x95c1ba5e
>> #define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n))
>>
>> @@ -159,10 +160,42 @@ struct kvm_arch_memory_slot {
>> #define KVM_PSCI_FN_CPU_ON KVM_PSCI_FN(2)
>> #define KVM_PSCI_FN_MIGRATE KVM_PSCI_FN(3)
>>
>> +/* PSCI v0.2 interface */
>> +#define KVM_PSCI_0_2_FN_BASE 0x84000000
>> +#define KVM_PSCI_0_2_FN(n) (KVM_PSCI_0_2_FN_BASE + (n))
>> +#define KVM_PSCI_0_2_FN64_BASE 0xC4000000
>> +#define KVM_PSCI_0_2_FN64(n) (KVM_PSCI_0_2_FN64_BASE + (n))
>> +
>> +#define KVM_PSCI_0_2_FN_PSCI_VERSION KVM_PSCI_0_2_FN(0)
>> +#define KVM_PSCI_0_2_FN_CPU_SUSPEND KVM_PSCI_0_2_FN(1)
>> +#define KVM_PSCI_0_2_FN_CPU_OFF KVM_PSCI_0_2_FN(2)
>> +#define KVM_PSCI_0_2_FN_CPU_ON KVM_PSCI_0_2_FN(3)
>> +#define KVM_PSCI_0_2_FN_AFFINITY_INFO KVM_PSCI_0_2_FN(4)
>> +#define KVM_PSCI_0_2_FN_MIGRATE KVM_PSCI_0_2_FN(5)
>> +#define KVM_PSCI_0_2_FN_MIGRATE_INFO_TYPE \
>> + KVM_PSCI_0_2_FN(6)
>> +#define KVM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU \
>> + KVM_PSCI_0_2_FN(7)
>> +#define KVM_PSCI_0_2_FN_SYSTEM_OFF KVM_PSCI_0_2_FN(8)
>> +#define KVM_PSCI_0_2_FN_SYSTEM_RESET KVM_PSCI_0_2_FN(9)
>> +
>> +#define KVM_PSCI_0_2_FN64_CPU_SUSPEND KVM_PSCI_0_2_FN64(1)
>> +#define KVM_PSCI_0_2_FN64_CPU_ON KVM_PSCI_0_2_FN64(3)
>> +#define KVM_PSCI_0_2_FN64_AFFINITY_INFO KVM_PSCI_0_2_FN64(4)
>> +#define KVM_PSCI_0_2_FN64_MIGRATE KVM_PSCI_0_2_FN64(5)
>> +#define KVM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU \
>> + KVM_PSCI_0_2_FN64(7)
>> +
>> +/* PSCI return values */
>> #define KVM_PSCI_RET_SUCCESS 0
>> -#define KVM_PSCI_RET_NI ((unsigned long)-1)
>> -#define KVM_PSCI_RET_INVAL ((unsigned long)-2)
>> +#define KVM_PSCI_RET_NOT_SUPPORTED ((unsigned long)-1)
>> +#define KVM_PSCI_RET_INVALID_PARAMS ((unsigned long)-2)
>> #define KVM_PSCI_RET_DENIED ((unsigned long)-3)
>> +#define KVM_PSCI_RET_ALREADY_ON ((unsigned long)-4)
>> +#define KVM_PSCI_RET_ON_PENDING ((unsigned long)-5)
>> +#define KVM_PSCI_RET_INTERNAL_FAILURE ((unsigned long)-6)
>> +#define KVM_PSCI_RET_NOT_PRESENT ((unsigned long)-7)
>> +#define KVM_PSCI_RET_DISABLED ((unsigned long)-8)
>>
>> #endif
>>
>> --
>> 1.7.9.5
>
> With the above remarks fixed, I think we'll have a good base for future
> developments. Looking forward to the next version.
I will revise and send-out next version soon.
>
> Thanks,
>
> M.
> --
> Jazz is not dead. It just smells funny...
> _______________________________________________
> kvmarm mailing list
> kvmarm at lists.cs.columbia.edu
> https://lists.cs.columbia.edu/cucslists/listinfo/kvmarm
Thanks,
Anup
^ permalink raw reply
* [PATCH v2 1/7] cpufreq: cpufreq-cpu0: allow optional safe voltage during frequency transitions
From: Thomas Abraham @ 2014-01-28 11:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140128091721.1d8128cd@amdc2363>
Hi Lukasz,
On Tue, Jan 28, 2014 at 1:47 PM, Lukasz Majewski <l.majewski@samsung.com> wrote:
> Hi Thomas, Mike
>
>> Hi Mike,
>>
>> On Tue, Jan 28, 2014 at 1:55 AM, Mike Turquette
>> <mturquette@linaro.org> wrote:
>> > Quoting Thomas Abraham (2014-01-18 04:10:51)
>> >> From: Thomas Abraham <thomas.ab@samsung.com>
>> >>
>> >> On some platforms such as the Samsung Exynos, changing the
>> >> frequency of the CPU clock requires changing the frequency of the
>> >> PLL that is supplying the CPU clock. To change the frequency of
>> >> the PLL, the CPU clock is temporarily reparented to another parent
>> >> clock.
>> >>
>> >> The clock frequency of this temporary parent clock could be much
>> >> higher than the clock frequency of the PLL at the time of
>> >> reparenting. Due to the temporary increase in the CPU clock speed,
>> >> the CPU (and any other components in the CPU clock domain such as
>> >> dividers, mux, etc.) have to to be operated at a higher voltage
>> >> level, called the safe voltage level. This patch adds optional
>> >> support to temporarily switch to a safe voltage level during CPU
>> >> frequency transitions.
>> >>
>> >> Cc: Shawn Guo <shawn.guo@linaro.org>
>> >> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
>> >
>> > I'm not a fan of this change. This corner case should be abstracted
>> > away somehow. I had talked to Chander Kayshap previously about
>> > handling voltage changes in clock notifier callbacks, which then
>> > renders any voltage change as a trivial part of the clock rate
>> > transition. That means that this "safe voltage" thing could be
>> > handled automagically without any additional code in the CPUfreq
>> > driver.
>> >
>> > There are two nice ways to do this with the clock framework. First
>> > is explicit re-parenting with voltage scaling done in the clock
>> > rate-change notifiers:
>> >
>> > clk_set_parent(cpu_clk, temp_parent);
>> > /* implicit voltage scaling to "safe voltage" happens above */
>> > clk_set_rate(pll, some_rate);
>> > clk_set_parent(cpu_clk, pll);
>> > /* implicit voltage scaling to nominal OPP voltage happens above */
>> >
>
> I must agree with Mike here. In my opinion the above approach is more
> compliant with CCF (as I've pointed it out in my other comment - the
> cpu_clk has more than one parent and we could switch between them when
> needed).
The mux which is used to re-parent is part of the larger opaque cpu
clock type (more like the composite clock). So I am not sure how this
isn't compliant with ccf.
>
>> > The above sequence would require a separate exnyos CPUfreq driver,
>> > due to the added clk_set_parent logic.
>> >
>> > The second way to do this is to abstract the clk re-muxing logic out
>> > into the clk driver, which would allow cpufreq-cpu0 to be used for
>> > the exynos chips.
>>
>> This is the approach this patch series takes (patch 2/7). The clock
>> re-muxing logic is handled by a clock driver code. The difference from
>> what you suggested is that the safe voltage (that may be optionally)
>> required before doing the re-muxing is handled here in cpufreq-cpu0
>> driver.
>>
>> The safe voltage setup can be done in the notifier as you suggested.
>
> If the clk_set_parent() approach is not suitable, then cannot we
> consider using the one from highbank-cpufreq.c?
>
> Here we have cpufreq-cpu0.c which sets voltage of the cpu_clk.
> In the highbank-cpufreq.c there are clock notifiers to change the
> voltage.
>
> Cannot Exynos reuse such approach? Why shall we pollute cpufreq-cpu0.c
> with another solution?
The highbank-cpufreq.c file was introduced because platforms using
this driver did not have the usual regulator to control the voltage.
The first commit of this driver explains this (copied below).
"Highbank processors depend on the external ECME to perform voltage
management based on a requested frequency. Communication between the
A9 cores and the ECME happens over the pl320 IPC channel."
So those platforms had no choice but to use an alternative approach to
control the voltage (and reuse cpufreq-cpu0 as much as possible). The
case with exynos is a different one. cpufreq-cpu0 is fully re-usable
for exynos with the additional support for "safe voltage". If we agree
that there might be existing or future platforms with single
clock/voltage rail that require the "safe voltage" feature, then
adding "safe voltage" support in cpufreq-cpu0 driver seems to be the
right approach.
>
>> But, doing that in cpufreq-cpu0 driver will help other platforms reuse
>> this feature if required. Also, if done here, the regulator handling
>> is localized in this driver which otherwise would need to be handled
>> in two places, cpufreq-cpu0 driver and the clock notifier.
>
> I think that there is a logical distinction between setting voltage for
> cpufreq-cpu0 related clock and increasing voltage of reparented clock.
>
> The former fits naturally to cpufreq-cpu0, when the latter seems like
> some corner case (as Mike pointed out) for Exynos.
Agreed, it is a corner case. But for this corner case, we are
performing some additional actions on the same regulator which is used
in the normal functioning of the driver.
>
>>
>> So I tend to prefer the approach in this patch but I am willing to
>> consider any suggestions.
>
> Thomas, what do you think about highbank-cpufreq.c approach (with
> using clock notifiers)?
I have made a related comment on this above.
>
> Do you think, that it is feasible to reuse it with Exynos?
highbank cpufreq driver is intended for a different purpose so I don't
think it can be reused for exynos. Yes, we can make exynos specific
hacks into highbank driver but how would that be better over the
approach in this patch?
>
>> Shawn, it would be helpful if you could let
>> us know your thoughts on this. I am almost done with testing the v3 of
>> this series and want to post it so if there are any objections to the
>> changes in this patch, please let me know.
>>
>> Thanks,
>> Thomas.
>>
>> >
>> > I'm more a fan of explicitly listing the Exact Steps for the cpu opp
>> > transition in a separate exynos-specific CPUfreq driver, but that's
>> > probably an unpopular view.
>> >
>> > Regards,
>> > Mike
>> >
>> >> ---
>> >> .../devicetree/bindings/cpufreq/cpufreq-cpu0.txt | 7 ++++
>> >> drivers/cpufreq/cpufreq-cpu0.c | 37
>> >> +++++++++++++++++-- 2 files changed, 40 insertions(+), 4
>> >> deletions(-)
>> >>
>> >> diff --git
>> >> a/Documentation/devicetree/bindings/cpufreq/cpufreq-cpu0.txt
>> >> b/Documentation/devicetree/bindings/cpufreq/cpufreq-cpu0.txt index
>> >> f055515..37453ab 100644 ---
>> >> a/Documentation/devicetree/bindings/cpufreq/cpufreq-cpu0.txt +++
>> >> b/Documentation/devicetree/bindings/cpufreq/cpufreq-cpu0.txt @@
>> >> -19,6 +19,12 @@ Optional properties:
>> >> - cooling-min-level:
>> >> - cooling-max-level:
>> >> Please refer to
>> >> Documentation/devicetree/bindings/thermal/thermal.txt. +-
>> >> safe-opp: Certain platforms require that during a opp transition,
>> >> + a system should not go below a particular opp level. For such
>> >> systems,
>> >> + this property specifies the minimum opp to be maintained during
>> >> the
>> >> + opp transitions. The safe-opp value is a tuple with first
>> >> element
>> >> + representing the safe frequency and the second element
>> >> representing the
>> >> + safe voltage.
>> >>
>> >> Examples:
>> >>
>> >> @@ -36,6 +42,7 @@ cpus {
>> >> 396000 950000
>> >> 198000 850000
>> >> >;
>> >> + safe-opp = <396000 950000>
>> >> clock-latency = <61036>; /* two CLK32 periods */
>> >> #cooling-cells = <2>;
>> >> cooling-min-level = <0>;
>> >> diff --git a/drivers/cpufreq/cpufreq-cpu0.c
>> >> b/drivers/cpufreq/cpufreq-cpu0.c index 0c12ffc..075d3d1 100644
>> >> --- a/drivers/cpufreq/cpufreq-cpu0.c
>> >> +++ b/drivers/cpufreq/cpufreq-cpu0.c
>> >> @@ -27,6 +27,8 @@
>> >>
>> >> static unsigned int transition_latency;
>> >> static unsigned int voltage_tolerance; /* in percentage */
>> >> +static unsigned long safe_frequency;
>> >> +static unsigned long safe_voltage;
>> >>
>> >> static struct device *cpu_dev;
>> >> static struct clk *cpu_clk;
>> >> @@ -64,17 +66,30 @@ static int cpu0_set_target(struct
>> >> cpufreq_policy *policy, unsigned int index) volt_old =
>> >> regulator_get_voltage(cpu_reg); }
>> >>
>> >> - pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
>> >> + pr_debug("\n\n%u MHz, %ld mV --> %u MHz, %ld mV\n",
>> >> old_freq / 1000, volt_old ? volt_old / 1000 : -1,
>> >> new_freq / 1000, volt ? volt / 1000 : -1);
>> >>
>> >> /* scaling up? scale voltage before frequency */
>> >> - if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
>> >> + if (!IS_ERR(cpu_reg) && new_freq > old_freq &&
>> >> + new_freq >= safe_frequency) {
>> >> ret = regulator_set_voltage_tol(cpu_reg, volt,
>> >> tol); if (ret) {
>> >> pr_err("failed to scale voltage up: %d\n",
>> >> ret); return ret;
>> >> }
>> >> + } else if (!IS_ERR(cpu_reg) && old_freq < safe_frequency) {
>> >> + /*
>> >> + * the scaled up voltage level for the new_freq is
>> >> lower
>> >> + * than the safe voltage level. so set safe_voltage
>> >> + * as the intermediate voltage level and revert it
>> >> + * back after the frequency has been changed.
>> >> + */
>> >> + ret = regulator_set_voltage_tol(cpu_reg,
>> >> safe_voltage, tol);
>> >> + if (ret) {
>> >> + pr_err("failed to set safe voltage: %d\n",
>> >> ret);
>> >> + return ret;
>> >> + }
>> >> }
>> >>
>> >> ret = clk_set_rate(cpu_clk, freq_exact);
>> >> @@ -86,7 +101,8 @@ static int cpu0_set_target(struct
>> >> cpufreq_policy *policy, unsigned int index) }
>> >>
>> >> /* scaling down? scale voltage after frequency */
>> >> - if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
>> >> + if (!IS_ERR(cpu_reg) &&
>> >> + (new_freq < old_freq || new_freq <
>> >> safe_frequency)) { ret = regulator_set_voltage_tol(cpu_reg, volt,
>> >> tol); if (ret) {
>> >> pr_err("failed to scale voltage down:
>> >> %d\n", ret); @@ -116,6 +132,8 @@ static struct cpufreq_driver
>> >> cpu0_cpufreq_driver = {
>> >>
>> >> static int cpu0_cpufreq_probe(struct platform_device *pdev)
>> >> {
>> >> + const struct property *prop;
>> >> + struct dev_pm_opp *opp;
>> >> struct device_node *np;
>> >> int ret;
>> >>
>> >> @@ -165,13 +183,24 @@ static int cpu0_cpufreq_probe(struct
>> >> platform_device *pdev) goto out_put_node;
>> >> }
>> >>
>> >> + prop = of_find_property(np, "safe-opp", NULL);
>> >> + if (prop) {
>> >> + if (prop->value && (prop->length / sizeof(u32)) ==
>> >> 2) {
>> >> + const __be32 *val;
>> >> + val = prop->value;
>> >> + safe_frequency = be32_to_cpup(val++);
>> >> + safe_voltage = be32_to_cpup(val);
>> >> + } else {
>> >> + pr_err("invalid safe-opp level
>> >> specified\n");
>> >> + }
>> >> + }
>> >> +
>> >> of_property_read_u32(np, "voltage-tolerance",
>> >> &voltage_tolerance);
>> >>
>> >> if (of_property_read_u32(np, "clock-latency",
>> >> &transition_latency)) transition_latency = CPUFREQ_ETERNAL;
>> >>
>> >> if (!IS_ERR(cpu_reg)) {
>> >> - struct dev_pm_opp *opp;
>> >> unsigned long min_uV, max_uV;
>> >> int i;
>> >>
>> >> --
>> >> 1.6.6.rc2
>> >>
>
>
>
> --
> Best regards,
>
> Lukasz Majewski
>
> Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
Thanks for your comments Lukasz.
Regards,
Thomas.
^ permalink raw reply
* [PATCH 1/6] arm64: Add macros to manage processor debug state
From: Vijay Kilari @ 2014-01-28 11:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140124163920.GI31040@mudshark.cambridge.arm.com>
Hi Wiil,
On Fri, Jan 24, 2014 at 10:09 PM, Will Deacon <will.deacon@arm.com> wrote:
> Hello,
>
> On Thu, Jan 23, 2014 at 03:29:07PM +0000, vijay.kilari at gmail.com wrote:
>> From: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
>>
>> Add macros to enable and disable to manage PSTATE.D
>> for debugging. The macros local_dbg_save and local_dbg_restore
>> are moved to irqflags.h file
>>
>> KGDB boot tests fail because of PSTATE.D is masked.
>> unmask it for debugging support
>>
>> Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
>> ---
>> arch/arm64/include/asm/debug-monitors.h | 17 -----------
>> arch/arm64/include/asm/irqflags.h | 48 +++++++++++++++++++++++++++++++
>> arch/arm64/kernel/debug-monitors.c | 1 +
>> 3 files changed, 49 insertions(+), 17 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h
>> index 6231479..ee9f28e 100644
>> --- a/arch/arm64/include/asm/debug-monitors.h
>> +++ b/arch/arm64/include/asm/debug-monitors.h
>> @@ -43,23 +43,6 @@ enum debug_el {
>> #ifndef __ASSEMBLY__
>> struct task_struct;
>>
>> -#define local_dbg_save(flags) \
>> - do { \
>> - typecheck(unsigned long, flags); \
>> - asm volatile( \
>> - "mrs %0, daif // local_dbg_save\n" \
>> - "msr daifset, #8" \
>> - : "=r" (flags) : : "memory"); \
>> - } while (0)
>> -
>> -#define local_dbg_restore(flags) \
>> - do { \
>> - typecheck(unsigned long, flags); \
>> - asm volatile( \
>> - "msr daif, %0 // local_dbg_restore\n" \
>> - : : "r" (flags) : "memory"); \
>> - } while (0)
>> -
>> #define DBG_ARCH_ID_RESERVED 0 /* In case of ptrace ABI updates. */
>>
>> #define DBG_HOOK_HANDLED 0
>> diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h
>> index b2fcfbc..f9b013e 100644
>> --- a/arch/arm64/include/asm/irqflags.h
>> +++ b/arch/arm64/include/asm/irqflags.h
>> @@ -90,5 +90,53 @@ static inline int arch_irqs_disabled_flags(unsigned long flags)
>> return flags & PSR_I_BIT;
>> }
>>
>> +/*
>> + * save and restore debug state
>> + */
>> +static inline unsigned long arch_local_dbg_save(void)
>> +{
>> + unsigned long flags;
>> + asm volatile(
>> + "mrs %0, daif // arch_local_dbg_save"
>> + "msr daifset, #8"
>> + : "=r" (flags) : : "memory");
>> + return flags;
>> +}
>> +
>> +static inline void arch_local_dbg_restore(unsigned long flags)
>> +{
>> + asm volatile(
>> + "msr daif, %0 // arch_local_dbg_restore"
>> + :
>> + : "r" (flags)
>> + : "memory");
>> +}
>> +
>> +#define raw_local_dbg_save(flags) \
>> + do { \
>> + typecheck(unsigned long, flags); \
>> + flags = arch_local_dbg_save(); \
>> + } while (0)
>> +
>> +#define raw_local_dbg_restore(flags) \
>> + do { \
>> + typecheck(unsigned long, flags); \
>> + arch_local_dbg_restore(flags); \
>> + } while (0)
>> +
>> +#define local_dbg_save(flags) \
>> + do { \
>> + raw_local_dbg_save(flags); \
>> + } while (0)
>> +
>> +#define local_dbg_restore(flags) \
>> + do { \
>> + typecheck(unsigned long, flags); \
>> + raw_local_dbg_restore(flags); \
>> + } while (0)
>
> Hehe, I think you took me a bit too literally when I said to follow what we
> do for irqs. This code is arm64-specific, so you don't need to construct it
> in the same way. All you need to do is *move* the existing code from
> debug-monitors.h to irqflags.h. That's it!
>
I have reposted the patch (v9) please review.
>> +#define local_dbg_enable() asm("msr daifclr, #8" : : : "memory")
>> +#define local_dbg_disable() asm("msr daifset, #8" : : : "memory")
>
> I'm also fine with adding these two.
>
> Will
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox