* [PATCH 0/4] ARM: dts: OMAP3630+: Add ABB device nodes
From: Nishanth Menon @ 2014-01-29 23:46 UTC (permalink / raw)
To: linux-arm-kernel
Now that clock nodes have been merged to master,
refresh of the series meant for all TI platforms using ABB.
Originally posted [1], I will restart with v1.
dt bindings and driver is already in upstream, and only the dt node is missing.
NOTE: dra7 support depends on [2] - but dt can get sequenced as needed.
This series is based on:
master 0e47c96 Merge tag 'for-linus-20140127' of git://git.infradead.org/linux-mtd
Testing was performed on next-20140123[3]
Andrii.Tseglytskyi (3):
ARM: dts: OMAP36xx: Add device node for ABB
ARM: dts: OMAP4: Add device nodes for ABB
ARM: dts: OMAP5: Add device nodes for ABB
Nishanth Menon (1):
ARM: dts: DRA7: Add device nodes for ABB
arch/arm/boot/dts/dra7.dtsi | 132 +++++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/omap36xx.dtsi | 20 ++++++
arch/arm/boot/dts/omap4.dtsi | 26 ++++++++
arch/arm/boot/dts/omap443x.dtsi | 26 ++++++++
arch/arm/boot/dts/omap4460.dtsi | 37 +++++++++++
arch/arm/boot/dts/omap5.dtsi | 63 +++++++++++++++++++
6 files changed, 304 insertions(+)
[1] http://marc.info/?l=linux-omap&m=136751535923806&w=2
[2] https://git.kernel.org/cgit/linux/kernel/git/broonie/regulator.git/log/?h=topic/ti-abb
[3] https://patchwork.kernel.org/patch/3530111/
--
1.7.9.5
^ permalink raw reply
* [PATCH 2/2] ARM: dts: OMAP3+: add clock nodes for CPU
From: Nishanth Menon @ 2014-01-29 23:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOCHtYjaCBn2oOk66ef9wiz_GJnVwHDyx446_mrkipPoENaeUQ@mail.gmail.com>
On 01/29/2014 01:29 PM, Robert Nelson wrote:
> On Wed, Jan 29, 2014 at 12:19 PM, Nishanth Menon <nm@ti.com> wrote:
>> OMAP34xx, AM3517 and OMAP36xx platforms use dpll1 clock.
>>
>> OMAP443x, OMAP446x, OMAP447x, OMAP5, DRA7, AM43xx platforms use
>> dpll_mpu clock.
>>
>> Latency used is the generic latency defined in omap-cpufreq
>> driver.
>>
>> Signed-off-by: Nishanth Menon <nm@ti.com>
>
> Hi Nishanth,
>
> After this patch, do you see any limitation to finally enabling 1Ghz
> operation on the beagle-xm by default? Or are we still missing a
> dependicy somewhere?
yes, there is:
a) ABB dt series - i will repost this in a few mins
b) AVS conversion from non-dt mode to dt supported mode. (which by
itself depends on VC/VP conversion).
c) clk notifier based dvfs for cpufreq-cpu0 -> this allows us to
introduce the necessary plumbing for mpu voltage domain such that the
TWL4030 regulator, AVS and ABB are rightly sequenced.
What you have done in the patch below is to introduce ABB regulator -
but no one is actually using it -> this might actually work on certain
samples at 1GHz, but prolonged operation will either damage the device
or fail on other samples - I have tried numerous times Internally to
get approval for non ABB/AVS configuration for 1GHz - but I have a
clear feedback that it cannot be done with the constraints of
DM3730/OMAP3630.
Lets do this a series at a time and build up the necessary support -
we get clock nodes for dvfs (using i2c1) here with cpufreq-cpu0 with
this series. If folks can ack and queue this up, we can get in ABB dts
nodes in place - allowing us to work on the next set -> sequencing
using clock notifier. in parallel we could work on converting AVS back
to dt based solution.
yes, the road is long.
--
Regards,
Nishanth Menon
^ permalink raw reply
* [PATCH v2] ARM: iop32x: fix power off handling for the EM7210 board
From: Arnaud Patard (Rtp) @ 2014-01-29 23:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391005215-8520-1-git-send-email-linus.walleij@linaro.org>
Linus Walleij <linus.walleij@linaro.org> writes:
> This board was missed when converting all the others to proper
> abstracted GPIO handling. Fix it up the right way by requesting
> and driving GPIO line 0 high through gpiolib to power off the
> machine.
>
> Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
> Reported-by: Arnd Bergmann <arnd@arndb.de>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> ChangeLog v1->v2:
> - Request the power off and set the power off hook with a
> device_initcall() so we know the GPIO driver is available
> when requesting the line.
> - Refer to POWER OFF rather than RESET everywhere.
>
> ARM SoC folks, if you're happy with this fix, please apply it
> directly to fixes in the ARM SoC tree.
> ---
> arch/arm/mach-iop32x/em7210.c | 32 +++++++++++++++++++++++++++-----
> 1 file changed, 27 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c
> index 177cd073a83b..77e1ff057303 100644
> --- a/arch/arm/mach-iop32x/em7210.c
> +++ b/arch/arm/mach-iop32x/em7210.c
> @@ -23,6 +23,7 @@
> #include <linux/mtd/physmap.h>
> #include <linux/platform_device.h>
> #include <linux/i2c.h>
> +#include <linux/gpio.h>
> #include <mach/hardware.h>
> #include <linux/io.h>
> #include <linux/irq.h>
> @@ -176,11 +177,35 @@ static struct platform_device em7210_serial_device = {
> .resource = &em7210_uart_resource,
> };
>
> +#define EM7210_HARDWARE_POWER 0
> +
> void em7210_power_off(void)
> {
> - *IOP3XX_GPOE &= 0xfe;
> - *IOP3XX_GPOD |= 0x01;
> + int ret;
> +
> + ret = gpio_direction_output(EM7210_HARDWARE_POWER, 1);
btw, any reason for not using gpio_direction_output() in
em7210_request_gpios() and gpio_set_value() here ? (just wondering)
I can't test it on my ss4000e but at least this patch looks fine.
Arnaud
^ permalink raw reply
* [PATCH 03/03] ARM: shmobile: Lager USB0 cable detection workaround
From: Magnus Damm @ 2014-01-29 23:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140129230959.22655.55645.sendpatchset@w520>
From: Magnus Damm <damm@opensource.se>
Add Lager board code to check the PWEN GPIO signal and refuse to
allow probe of the USBHS driver in case of DIP misconfiguration.
For correct operation Lager DIP switches SW5 and SW6 shall be
configured in 2-3 position to enable USB Function support.
If the DIP switch is configured incorrectly then the user can
simply adjust the hardware and either reboot or use the bind interface
to try to probe again:
# echo renesas_usbhs > /sys/bus/platform/drivers/renesas_usbhs/bind
Signed-off-by: Magnus Damm <damm@opensource.se>
---
Depends on "[PATCH 02/03] pinctrl: sh-pfc: r8a7790: Break out USB0 OVC/VBUS"
arch/arm/mach-shmobile/board-lager.c | 25 ++++++++++++++++++++++---
1 file changed, 22 insertions(+), 3 deletions(-)
--- 0004/arch/arm/mach-shmobile/board-lager.c
+++ work/arch/arm/mach-shmobile/board-lager.c 2014-01-24 10:17:20.000000000 +0900
@@ -406,13 +406,30 @@ static int usbhs_hardware_init(struct pl
{
struct usbhs_private *priv = usbhs_get_priv(pdev);
struct usb_phy *phy;
+ int ret;
+
+ /* USB0 Function - use PWEN as GPIO input to detect DIP Switch SW5
+ * setting to avoid VBUS short circuit due to wrong cable.
+ * PWEN should be pulled up high if USB Function is selected by SW5
+ */
+ gpio_request_one(RCAR_GP_PIN(5, 18), GPIOF_IN, NULL); /* USB0_PWEN */
+ if (!gpio_get_value(RCAR_GP_PIN(5, 18))) {
+ pr_warn("Error: USB Function not selected - check SW5 + SW6\n");
+ ret = -ENOTSUPP;
+ goto error;
+ }
phy = usb_get_phy_dev(&pdev->dev, 0);
- if (IS_ERR(phy))
- return PTR_ERR(phy);
+ if (IS_ERR(phy)) {
+ ret = PTR_ERR(phy);
+ goto error;
+ }
priv->phy = phy;
return 0;
+ error:
+ gpio_free(RCAR_GP_PIN(5, 18));
+ return ret;
}
static int usbhs_hardware_exit(struct platform_device *pdev)
@@ -424,6 +441,8 @@ static int usbhs_hardware_exit(struct pl
usb_put_phy(priv->phy);
priv->phy = NULL;
+
+ gpio_free(RCAR_GP_PIN(5, 18));
return 0;
}
@@ -534,7 +553,7 @@ static const struct pinctrl_map lager_pi
"vin1_clk", "vin1"),
/* USB0 */
PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7790",
- "usb0", "usb0"),
+ "usb0_ovc_vbus", "usb0"),
};
static void __init lager_add_standard_devices(void)
^ permalink raw reply
* [PATCH 02/03] pinctrl: sh-pfc: r8a7790: Break out USB0 OVC/VBUS
From: Magnus Damm @ 2014-01-29 23:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140129230959.22655.55645.sendpatchset@w520>
From: Magnus Damm <damm@opensource.se>
Create a new group for the USB0 OVC/VBUS pin by itself. This
allows us to monitor PWEN as GPIO on the Lager board.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 9 +++++++++
1 file changed, 9 insertions(+)
--- 0001/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ work/drivers/pinctrl/sh-pfc/pfc-r8a7790.c 2014-01-24 10:23:32.000000000 +0900
@@ -3231,6 +3231,13 @@ static const unsigned int usb0_pins[] =
static const unsigned int usb0_mux[] = {
USB0_PWEN_MARK, USB0_OVC_VBUS_MARK,
};
+static const unsigned int usb0_ovc_vbus_pins[] = {
+ /* OVC/VBUS */
+ RCAR_GP_PIN(5, 19),
+};
+static const unsigned int usb0_ovc_vbus_mux[] = {
+ USB0_OVC_VBUS_MARK,
+};
/* - USB1 ------------------------------------------------------------------- */
static const unsigned int usb1_pins[] = {
/* PWEN, OVC */
@@ -3789,6 +3796,7 @@ static const struct sh_pfc_pin_group pin
SH_PFC_PIN_GROUP(tpu0_to2),
SH_PFC_PIN_GROUP(tpu0_to3),
SH_PFC_PIN_GROUP(usb0),
+ SH_PFC_PIN_GROUP(usb0_ovc_vbus),
SH_PFC_PIN_GROUP(usb1),
SH_PFC_PIN_GROUP(usb2),
VIN_DATA_PIN_GROUP(vin0_data, 24),
@@ -4134,6 +4142,7 @@ static const char * const tpu0_groups[]
static const char * const usb0_groups[] = {
"usb0",
+ "usb0_ovc_vbus",
};
static const char * const usb1_groups[] = {
^ permalink raw reply
* [PATCH 01/03] ARM: shmobile: Remove Lager USBHS UDC ifdefs
From: Magnus Damm @ 2014-01-29 23:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140129230959.22655.55645.sendpatchset@w520>
From: Magnus Damm <damm@opensource.se>
Remove ifdefs to make the Lager USBHS device always present.
This makes it more like other devices, no need to be special.
Also, these ifdefs by themselves do not hurt much, but combined
with USB Host device ifdefs that were proposed earlier we could
basically end up with a kernel that drives VBUS incorrectly
depending on the kernel configuration - lets not do that.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
arch/arm/mach-shmobile/board-lager.c | 4 ----
1 file changed, 4 deletions(-)
--- 0003/arch/arm/mach-shmobile/board-lager.c
+++ work/arch/arm/mach-shmobile/board-lager.c 2014-01-24 10:16:15.000000000 +0900
@@ -368,7 +368,6 @@ static const struct platform_device_info
};
/* USBHS */
-#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
static const struct resource usbhs_resources[] __initconst = {
DEFINE_RES_MEM(0xe6590000, 0x100),
DEFINE_RES_IRQ(gic_spi(107)),
@@ -478,9 +477,6 @@ static void __init lager_register_usbhs(
&usbhs_priv.info,
sizeof(usbhs_priv.info));
}
-#else /* CONFIG_USB_RENESAS_USBHS_UDC */
-static inline void lager_register_usbhs(void) { }
-#endif /* CONFIG_USB_RENESAS_USBHS_UDC */
/* USBHS PHY */
static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
^ permalink raw reply
* [PATCH 00/03] ARM: shmobile: Lager USBHS update
From: Magnus Damm @ 2014-01-29 23:09 UTC (permalink / raw)
To: linux-arm-kernel
ARM: shmobile: Lager USBHS update
[PATCH 01/03] ARM: shmobile: Remove Lager USBHS UDC ifdefs
[PATCH 02/03] pinctrl: sh-pfc: r8a7790: Break out USB0 OVC/VBUS
[PATCH 03/03] ARM: shmobile: Lager USB0 cable detection workaround
Update the Lager USB0 code to let the USBHS device always be present
and check for DIP switch configuration. To be able to check the DIP
switch configuration the r8a7790 PINCTRL bits need to be updated too.
With this series USB0 on Lager will be fixed to USB Function via the
USBHS driver. In theory the SoC can also use USB Host on this port
either via USBHS or PCI USB, but since cable detection is missing
it is possible for the user to misconfigure USB Host and drive VBUS
with the wrong cable. Because of that USB0 will be forced to stick
to Function-only in the Lager board code.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
Written against renesas.git tag renesas-devel-v3.13-20140127
arch/arm/mach-shmobile/board-lager.c | 29 ++++++++++++++++++++++-------
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 9 +++++++++
2 files changed, 31 insertions(+), 7 deletions(-)
^ permalink raw reply
* [linux-sunxi] Re: [RFC PATCH v2 09/14] mtd: nand: add sunxi NFC dt bindings doc
From: Henrik Nordström @ 2014-01-29 22:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAL_JsqLVr1gSLArqtfOiHce+u6ZK8FiKMX0o9bvMrMoGGhATvg@mail.gmail.com>
ons 2014-01-29 klockan 11:11 -0600 skrev Rob Herring:
> Isn't allwinner,rb implied by a lack of rb-gpios property. Or no R/B
> pin is an option? If so, don't you need some fixed time delay
> properties like max erase time?
>
> rb-gpios could be added to the generic nand binding as well.
The Allwinner NAND controller have dedicated RB pins when NAND is
enabled, only MUXed with other functions when NAND is not enabled.
Leaving RB unconnected is not a valid hardware configuration. The
controller internal timing engine depends on being able to sense RB to
sequence NAND commands properly.
Regards
Henrik
^ permalink raw reply
* [PATCH v2 1/6] audit: Enable arm64 support
From: Richard Guy Briggs @ 2014-01-29 22:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140129202127.GA24068@madcap2.tricolour.ca>
On 14/01/29, Richard Guy Briggs wrote:
> On 14/01/27, AKASHI Takahiro wrote:
> > [To audit maintainers]
> >
> > On 01/23/2014 11:18 PM, Catalin Marinas wrote:
> > >On Fri, Jan 17, 2014 at 08:13:14AM +0000, AKASHI Takahiro wrote:
> > >>--- a/include/uapi/linux/audit.h
> > >>+++ b/include/uapi/linux/audit.h
> > >>@@ -327,6 +327,8 @@ enum {
> > >> /* distinguish syscall tables */
> > >> #define __AUDIT_ARCH_64BIT 0x80000000
> > >> #define __AUDIT_ARCH_LE 0x40000000
> > >>+#define AUDIT_ARCH_AARCH64 (EM_AARCH64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
> > >>+#define AUDIT_ARCH_AARCH64EB (EM_AARCH64|__AUDIT_ARCH_64BIT)
> > >> #define AUDIT_ARCH_ALPHA (EM_ALPHA|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
> > >> #define AUDIT_ARCH_ARM (EM_ARM|__AUDIT_ARCH_LE)
> > >> #define AUDIT_ARCH_ARMEB (EM_ARM)
> > >>diff --git a/init/Kconfig b/init/Kconfig
> > >>index 79383d3..3aae602 100644
> > >>--- a/init/Kconfig
> > >>+++ b/init/Kconfig
> > >>@@ -284,7 +284,7 @@ config AUDIT
> > >>
> > >> config AUDITSYSCALL
> > >> bool "Enable system-call auditing support"
> > >>- depends on AUDIT && (X86 || PARISC || PPC || S390 || IA64 || UML || SPARC64 || SUPERH || (ARM && AEABI && !OABI_COMPAT))
> > >>+ depends on AUDIT && (X86 || PARISC || PPC || S390 || IA64 || UML || SPARC64 || SUPERH || (ARM && AEABI && !OABI_COMPAT) || ARM64)
> > >
> > >The usual comment for such changes: could you please clean this up and
> > >just use something like "depends on HAVE_ARCH_AUDITSYSCALL"?
> >
> > Do you agree to this change?
> >
> > If so, I can create a patch, but have some concerns:
> > 1) I can't verify it on other architectures than (arm &) arm64.
> > 2) Some architectures (microblaze, mips, openrisc) are not listed here, but
> > their ptrace.c have a call to audit_syscall_entry/exit().
> > (audit_syscall_entry/exit are null if !AUDITSYSCALL, though)
>
> I can try: ppc s390 x86_64 ppc64 i686 s390x
These arches above all pass compile and basic tests with the following patches applied:
audit: correct a type mismatch in audit_syscall_exit() pending (already upstream)
audit: Modify a set of system calls in audit class definitions (already upstream)
[PATCH v3] audit: Add generic compat syscall support
[PATCH v2] audit: Enable arm64 support
[PATCH v2] arm64: Add regs_return_value() in syscall.h
[PATCH v2] arm64: Add audit support
[PATCH v2] arm64: audit: Add 32-bit (compat) syscall support
[PATCH v2] arm64: audit: Add makefile rule to create unistd_32.h for compat syscalls
[PATCH v2] arm64: audit: Add audit hook in ptrace/syscall_trace
> > So I'm afraid that the change might break someone's assumption.
> >
> > Thanks,
> > -Takahiro AKASHI
>
> - RGB
- RGB
--
Richard Guy Briggs <rbriggs@redhat.com>
Senior Software Engineer, Kernel Security, AMER ENG Base Operating Systems, Red Hat
Remote, Ottawa, Canada
Voice: +1.647.777.2635, Internal: (81) 32635, Alt: +1.613.693.0684x3545
^ permalink raw reply
* imx6 wand board lockdep warnings on boot
From: Fabio Estevam @ 2014-01-29 22:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAGa+x84Oko25r+xE_Z3wrY_dVCrMcF5AKvbBBMcbyvAMTOSoqg@mail.gmail.com>
On Wed, Jan 29, 2014 at 7:52 PM, Kevin Hilman <khilman@linaro.org> wrote:
> For awhile now, the wand boards have had some noisy lockdep warnings
> during boot, but I'm not sure if anyone is looking into them. I see
> it on the wand-solo and wand-quad, but not the dual. Full boot logs
> for all three are attached from v3.13.
This has been fixed by this commit:
commit a974862faee199cba3ff36b5a148df5fd34bd1e7
Author: Dong Aisheng <b29396@freescale.com>
Date: Thu Dec 26 15:23:53 2013 +0800
mmc: sdhci-esdhc-imx: fix access hardirq-unsafe lock in atomic context
,which is in Linus' tree now.
It is also marked as 3.13 stable.
Regards,
Fabio Estevam
^ permalink raw reply
* imx6 wand board lockdep warnings on boot
From: Russell King - ARM Linux @ 2014-01-29 22:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOesGMiP2nzrACVr4xy5NTfKFOEwkyGdCU2_ZFYRNhv8B_ncPA@mail.gmail.com>
On Wed, Jan 29, 2014 at 01:58:51PM -0800, Olof Johansson wrote:
> On Wed, Jan 29, 2014 at 1:52 PM, Kevin Hilman <khilman@linaro.org> wrote:
> > For awhile now, the wand boards have had some noisy lockdep warnings
> > during boot, but I'm not sure if anyone is looking into them. I see
> > it on the wand-solo and wand-quad, but not the dual. Full boot logs
> > for all three are attached from v3.13.
>
> Yeah, this one is known -- Russell has mentioned it in the past too.
>
> This reminds me, I've been meaning to turn on lockdep on all defconfig
> builds so that we get coverage on more platforms, but I haven't done
> it yet.
It's really worth considering that - as well as building the defconfigs -
that the defconfigs are built with the kernel debugging options forced on
so that things like locking problems are found. Obviously, debug info is
one option you wouldn't want to turn on, because for a build+boot test
system, it just makes the objects unnecessarily larger and wastes disk
space (unless of course you intend to use the debug info.)
I've just modified all my oldconfig builds to have many of the debug
stuff enabled.
--
FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".
^ permalink raw reply
* imx6 wand board lockdep warnings on boot
From: Olof Johansson @ 2014-01-29 21:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAGa+x84Oko25r+xE_Z3wrY_dVCrMcF5AKvbBBMcbyvAMTOSoqg@mail.gmail.com>
On Wed, Jan 29, 2014 at 1:52 PM, Kevin Hilman <khilman@linaro.org> wrote:
> For awhile now, the wand boards have had some noisy lockdep warnings
> during boot, but I'm not sure if anyone is looking into them. I see
> it on the wand-solo and wand-quad, but not the dual. Full boot logs
> for all three are attached from v3.13.
Yeah, this one is known -- Russell has mentioned it in the past too.
This reminds me, I've been meaning to turn on lockdep on all defconfig
builds so that we get coverage on more platforms, but I haven't done
it yet.
-Olof
^ permalink raw reply
* imx6 wand board lockdep warnings on boot
From: Kevin Hilman @ 2014-01-29 21:52 UTC (permalink / raw)
To: linux-arm-kernel
For awhile now, the wand boards have had some noisy lockdep warnings
during boot, but I'm not sure if anyone is looking into them. I see
it on the wand-solo and wand-quad, but not the dual. Full boot logs
for all three are attached from v3.13.
Kevin
-------------- next part --------------
A non-text attachment was scrubbed...
Name: wand-solo.log.gz
Type: application/x-gzip
Size: 9222 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140129/1d56745f/attachment-0003.bin>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: wand-dual.log.gz
Type: application/x-gzip
Size: 5971 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140129/1d56745f/attachment-0004.bin>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: wand-quad.log.gz
Type: application/x-gzip
Size: 9409 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140129/1d56745f/attachment-0005.bin>
^ permalink raw reply
* [PATCH 5/5] ARM: dts: AM33XX: Add ecap interrupt properties
From: Matt Porter @ 2014-01-29 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391029199-3670-1-git-send-email-mporter@linaro.org>
Add missing interrupt properties to the ecap0, ecap1, and ecap2
nodes.
Signed-off-by: Matt Porter <mporter@linaro.org>
---
arch/arm/boot/dts/am33xx.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 6d95d3d..b4139ba 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -582,6 +582,8 @@
compatible = "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48300100 0x80>;
+ interrupts = <31>;
+ interrupt-names = "ecap0";
ti,hwmods = "ecap0";
status = "disabled";
};
@@ -610,6 +612,8 @@
compatible = "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48302100 0x80>;
+ interrupts = <47>;
+ interrupt-names = "ecap1";
ti,hwmods = "ecap1";
status = "disabled";
};
@@ -638,6 +642,8 @@
compatible = "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48304100 0x80>;
+ interrupts = <61>;
+ interrupt-names = "ecap2";
ti,hwmods = "ecap2";
status = "disabled";
};
--
1.8.4
^ permalink raw reply related
* [PATCH 4/5] pwm: enable TI PWMSS if the IIO tiecap driver is selected
From: Matt Porter @ 2014-01-29 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391029199-3670-1-git-send-email-mporter@linaro.org>
The IIO TI ECAP driver depends on the TI PWMSS management
driver in this subsystem. Enable PWMSS when the IIO TI ECAP
driver is selected.
Signed-off-by: Matt Porter <mporter@linaro.org>
---
drivers/pwm/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index 22f2f28..bd3cc65 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -219,7 +219,7 @@ config PWM_TIEHRPWM
config PWM_TIPWMSS
bool
- default y if SOC_AM33XX && (PWM_TIECAP || PWM_TIEHRPWM)
+ default y if SOC_AM33XX && (IIO_TIECAP || PWM_TIECAP || PWM_TIEHRPWM)
help
PWM Subsystem driver support for AM33xx SOC.
--
1.8.4
^ permalink raw reply related
* [PATCH 3/5] iio: enable selection and build of pulse drivers
From: Matt Porter @ 2014-01-29 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391029199-3670-1-git-send-email-mporter@linaro.org>
Add the pulse driver subdirectory when configuring and building
IIO.
Signed-off-by: Matt Porter <mporter@linaro.org>
---
drivers/iio/Kconfig | 1 +
drivers/iio/Makefile | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/iio/Kconfig b/drivers/iio/Kconfig
index 5dd0e12..286acc3 100644
--- a/drivers/iio/Kconfig
+++ b/drivers/iio/Kconfig
@@ -74,6 +74,7 @@ if IIO_TRIGGER
source "drivers/iio/trigger/Kconfig"
endif #IIO_TRIGGER
source "drivers/iio/pressure/Kconfig"
+source "drivers/iio/pulse/Kconfig"
source "drivers/iio/temperature/Kconfig"
endif # IIO
diff --git a/drivers/iio/Makefile b/drivers/iio/Makefile
index 887d390..9a953c9 100644
--- a/drivers/iio/Makefile
+++ b/drivers/iio/Makefile
@@ -24,5 +24,6 @@ obj-y += light/
obj-y += magnetometer/
obj-y += orientation/
obj-y += pressure/
+obj-y += pulse/
obj-y += temperature/
obj-y += trigger/
--
1.8.4
^ permalink raw reply related
* [PATCH 2/5] iio: pulse: add TI ECAP driver
From: Matt Porter @ 2014-01-29 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391029199-3670-1-git-send-email-mporter@linaro.org>
Adds support for capturing PWM signals using the TI ECAP peripheral.
This driver supports triggered buffer capture of pulses on multiple
ECAP instances. In addition, the driver supports configurable polarity
of the signal to be captured.
Signed-off-by: Matt Porter <mporter@linaro.org>
---
drivers/iio/pulse/Kconfig | 20 ++
drivers/iio/pulse/Makefile | 6 +
drivers/iio/pulse/tiecap.c | 493 +++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 519 insertions(+)
create mode 100644 drivers/iio/pulse/Kconfig
create mode 100644 drivers/iio/pulse/Makefile
create mode 100644 drivers/iio/pulse/tiecap.c
diff --git a/drivers/iio/pulse/Kconfig b/drivers/iio/pulse/Kconfig
new file mode 100644
index 0000000..9864d4b
--- /dev/null
+++ b/drivers/iio/pulse/Kconfig
@@ -0,0 +1,20 @@
+#
+# Pulse Capture Devices
+#
+# When adding new entries keep the list in alphabetical order
+
+menu "Pulse Capture Devices"
+
+config IIO_TIECAP
+ tristate "TI ECAP Pulse Capture"
+ depends on SOC_AM33XX
+ select IIO_BUFFER
+ select IIO_TRIGGERED_BUFFER
+ help
+ If you say yes here you get support for the TI ECAP peripheral
+ in pulse capture mode.
+
+ This driver can also be built as a module. If so, the module
+ will be called tiecap
+
+endmenu
diff --git a/drivers/iio/pulse/Makefile b/drivers/iio/pulse/Makefile
new file mode 100644
index 0000000..94d4b00
--- /dev/null
+++ b/drivers/iio/pulse/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for IIO PWM Capture Devices
+#
+
+# When adding new entries keep the list in alphabetical order
+obj-$(CONFIG_IIO_TIECAP) += tiecap.o
diff --git a/drivers/iio/pulse/tiecap.c b/drivers/iio/pulse/tiecap.c
new file mode 100644
index 0000000..8e2b3a0
--- /dev/null
+++ b/drivers/iio/pulse/tiecap.c
@@ -0,0 +1,493 @@
+/*
+ * ECAP IIO pulse capture driver
+ *
+ * Copyright (C) 2014 Linaro Limited
+ * Author: Matt Porter <mporter@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/iio/buffer.h>
+#include <linux/iio/iio.h>
+#include <linux/iio/sysfs.h>
+#include <linux/iio/trigger.h>
+#include <linux/iio/trigger_consumer.h>
+#include <linux/iio/triggered_buffer.h>
+#include <linux/io.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+
+#include "../../pwm/pwm-tipwmss.h"
+
+/* ECAP regs and bits */
+#define CAP1 0x08
+#define CAP2 0x0c
+#define ECCTL1 0x28
+#define ECCTL1_RUN_FREE BIT(15)
+#define ECCTL1_CAPLDEN BIT(8)
+#define ECCTL1_CAP2POL BIT(2)
+#define ECCTL1_CTRRST1 BIT(1)
+#define ECCTL1_CAP1POL BIT(0)
+#define ECCTL2 0x2a
+#define ECCTL2_SYNCO_SEL_DIS BIT(7)
+#define ECCTL2_TSCTR_FREERUN BIT(4)
+#define ECCTL2_REARM BIT(3)
+#define ECCTL2_STOP_WRAP_2 BIT(1)
+#define ECEINT 0x2c
+#define ECFLG 0x2e
+#define ECCLR 0x30
+#define ECINT_CTRCMP BIT(7)
+#define ECINT_CTRPRD BIT(6)
+#define ECINT_CTROVF BIT(5)
+#define ECINT_CEVT4 BIT(4)
+#define ECINT_CEVT3 BIT(3)
+#define ECINT_CEVT2 BIT(2)
+#define ECINT_CEVT1 BIT(1)
+#define ECINT_ALL (ECINT_CTRCMP | \
+ ECINT_CTRPRD | \
+ ECINT_CTROVF | \
+ ECINT_CEVT4 | \
+ ECINT_CEVT3 | \
+ ECINT_CEVT2 | \
+ ECINT_CEVT1)
+
+/* ECAP driver flags */
+#define ECAP_POLARITY_HIGH BIT(1)
+#define ECAP_ENABLED BIT(0)
+
+struct ecap_context {
+ u32 cap1;
+ u32 cap2;
+ u16 ecctl1;
+ u16 ecctl2;
+ u16 eceint;
+};
+
+struct ecap_state {
+ unsigned long flags;
+ unsigned int clk_rate;
+ void __iomem *regs;
+ u32 *buf;
+ struct ecap_context ctx;
+};
+
+#define dev_to_ecap_state(d) iio_priv(dev_to_iio_dev(d))
+
+static const struct iio_chan_spec ecap_channels[] = {
+ {
+ .type = IIO_PULSE,
+ .channel = 0,
+ .info_mask_separate =
+ BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
+ .scan_index = 0,
+ .scan_type = {
+ .sign = 'u',
+ .realbits = 32,
+ .storagebits = 32,
+ .endianness = IIO_LE,
+ },
+ .modified = 0,
+ },
+ IIO_CHAN_SOFT_TIMESTAMP(1)
+};
+
+static ssize_t ecap_attr_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct ecap_state *state = dev_to_ecap_state(dev);
+
+ return sprintf(buf, "%d\n",
+ test_bit(ECAP_POLARITY_HIGH, &state->flags));
+}
+
+static ssize_t ecap_attr_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t len)
+{
+ int ret;
+ bool val;
+ struct ecap_state *state = dev_to_ecap_state(dev);
+
+ if (test_bit(ECAP_ENABLED, &state->flags))
+ return -EINVAL;
+
+ ret = strtobool(buf, &val);
+ if (ret)
+ return ret;
+
+ if (val)
+ set_bit(ECAP_POLARITY_HIGH, &state->flags);
+ else
+ clear_bit(ECAP_POLARITY_HIGH, &state->flags);
+
+ return len;
+}
+
+static IIO_DEVICE_ATTR(in_pulse_polarity, S_IRUGO | S_IWUSR,
+ ecap_attr_show, ecap_attr_store, 0);
+
+static struct attribute *ecap_attributes[] = {
+ &iio_dev_attr_in_pulse_polarity.dev_attr.attr,
+ NULL,
+};
+
+static struct attribute_group ecap_attribute_group = {
+ .attrs = ecap_attributes,
+};
+
+static int ecap_read_raw(struct iio_dev *idev,
+ struct iio_chan_spec const *ch, int *val,
+ int *val2, long mask)
+{
+ struct ecap_state *state = iio_priv(idev);
+
+ switch (mask) {
+ case IIO_CHAN_INFO_RAW:
+ /*
+ * Always return 0 as a pulse width sample
+ * is only valid in a triggered condition
+ */
+ *val = 0;
+ *val2 = 0;
+ return IIO_VAL_INT;
+ case IIO_CHAN_INFO_SCALE:
+ *val = 0;
+ *val2 = NSEC_PER_SEC / state->clk_rate;
+ return IIO_VAL_INT_PLUS_NANO;
+ default:
+ return -EINVAL;
+ }
+}
+
+static const struct iio_info ecap_info = {
+ .driver_module = THIS_MODULE,
+ .attrs = &ecap_attribute_group,
+ .read_raw = &ecap_read_raw,
+};
+
+static irqreturn_t ecap_trigger_handler(int irq, void *private)
+{
+ struct iio_poll_func *pf = private;
+ struct iio_dev *idev = pf->indio_dev;
+ struct ecap_state *state = iio_priv(idev);
+
+ /* Read pulse counter value */
+ *state->buf = readl(state->regs + CAP2);
+
+ iio_push_to_buffers_with_timestamp(idev, state->buf, iio_get_time_ns());
+
+ iio_trigger_notify_done(idev->trig);
+
+ return IRQ_HANDLED;
+};
+
+
+static const struct iio_trigger_ops iio_interrupt_trigger_ops = {
+ .owner = THIS_MODULE,
+};
+
+static irqreturn_t ecap_interrupt_handler(int irq, void *private)
+{
+ struct iio_dev *idev = private;
+ struct ecap_state *state = iio_priv(idev);
+ u16 ints;
+
+ iio_trigger_poll(idev->trig, 0);
+
+ /* Clear CAP2 interrupt */
+ ints = readw(state->regs + ECFLG);
+ if (ints & ECINT_CEVT2)
+ writew(ECINT_CEVT2, state->regs + ECCLR);
+ else
+ dev_warn(&idev->dev, "unhandled interrupt flagged: %04x\n",
+ ints);
+
+ return IRQ_HANDLED;
+}
+
+static int ecap_buffer_predisable(struct iio_dev *idev)
+{
+ struct ecap_state *state = iio_priv(idev);
+ int ret = 0;
+ u16 ecctl2;
+
+ /* Stop capture */
+ clear_bit(ECAP_ENABLED, &state->flags);
+ ecctl2 = readw(state->regs + ECCTL2) & ~ECCTL2_TSCTR_FREERUN;
+ writew(ecctl2, state->regs + ECCTL2);
+
+ /* Disable and clear all interrupts */
+ writew(0, state->regs + ECEINT);
+ writew(ECINT_ALL, state->regs + ECCLR);
+
+ ret = iio_triggered_buffer_predisable(idev);
+
+ pm_runtime_put_sync(idev->dev.parent);
+
+ return ret;
+}
+
+static int ecap_buffer_postenable(struct iio_dev *idev)
+{
+ struct ecap_state *state = iio_priv(idev);
+ int ret = 0;
+ u16 ecctl1, ecctl2;
+
+ pm_runtime_get_sync(idev->dev.parent);
+
+ /* Configure pulse polarity */
+ ecctl1 = readw(state->regs + ECCTL1);
+ if (test_bit(ECAP_POLARITY_HIGH, &state->flags)) {
+ /* CAP1 rising, CAP2 falling */
+ ecctl1 |= ECCTL1_CAP2POL;
+ ecctl1 &= ~ECCTL1_CAP1POL;
+ } else {
+ /* CAP1 falling, CAP2 rising */
+ ecctl1 &= ~ECCTL1_CAP2POL;
+ ecctl1 |= ECCTL1_CAP1POL;
+ }
+ writew(ecctl1, state->regs + ECCTL1);
+
+ /* Enable CAP2 interrupt */
+ writew(ECINT_CEVT2, state->regs + ECEINT);
+
+ /* Enable capture */
+ ecctl2 = readw(state->regs + ECCTL2);
+ ecctl2 |= ECCTL2_TSCTR_FREERUN | ECCTL2_REARM;
+ writew(ecctl2, state->regs + ECCTL2);
+ set_bit(ECAP_ENABLED, &state->flags);
+
+ ret = iio_triggered_buffer_postenable(idev);
+
+ return ret;
+}
+
+static const struct iio_buffer_setup_ops ecap_buffer_setup_ops = {
+ .postenable = &ecap_buffer_postenable,
+ .predisable = &ecap_buffer_predisable,
+};
+
+static void ecap_init_hw(struct iio_dev *idev)
+{
+ struct ecap_state *state = iio_priv(idev);
+
+ clear_bit(ECAP_ENABLED, &state->flags);
+ set_bit(ECAP_POLARITY_HIGH, &state->flags);
+
+ writew(ECCTL1_RUN_FREE | ECCTL1_CAPLDEN |
+ ECCTL1_CAP2POL | ECCTL1_CTRRST1,
+ state->regs + ECCTL1);
+
+ writew(ECCTL2_SYNCO_SEL_DIS | ECCTL2_STOP_WRAP_2,
+ state->regs + ECCTL2);
+}
+
+static const struct of_device_id ecap_of_ids[] = {
+ { .compatible = "ti,am33xx-ecap" },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, ecap_of_ids);
+
+static int ecap_probe(struct platform_device *pdev)
+{
+ int irq, ret;
+ struct iio_dev *idev;
+ struct ecap_state *state;
+ struct resource *r;
+ struct clk *clk;
+ struct iio_trigger *trig;
+ u16 status;
+
+ idev = devm_iio_device_alloc(&pdev->dev, sizeof(struct ecap_state));
+ if (!idev)
+ return -ENOMEM;
+
+ state = iio_priv(idev);
+
+ clk = devm_clk_get(&pdev->dev, "fck");
+ if (IS_ERR(clk)) {
+ dev_err(&pdev->dev, "failed to get clock\n");
+ return PTR_ERR(clk);
+ }
+
+ state->clk_rate = clk_get_rate(clk);
+ if (!state->clk_rate) {
+ dev_err(&pdev->dev, "failed to get clock rate\n");
+ return -EINVAL;
+ }
+
+ platform_set_drvdata(pdev, idev);
+
+ idev->dev.parent = &pdev->dev;
+ idev->name = dev_name(&pdev->dev);
+ idev->modes = INDIO_DIRECT_MODE;
+ idev->info = &ecap_info;
+ idev->channels = ecap_channels;
+ /* One h/w capture and one s/w timestamp channel per instance */
+ idev->num_channels = 2;
+
+ trig = devm_iio_trigger_alloc(&pdev->dev, "%s-dev%d",
+ idev->name, idev->id);
+ if (!trig)
+ return -ENOMEM;
+ trig->dev.parent = idev->dev.parent;
+ iio_trigger_set_drvdata(trig, idev);
+ trig->ops = &iio_interrupt_trigger_ops;
+
+ ret = iio_trigger_register(trig);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to register trigger\n");
+ return ret;
+ }
+
+ ret = iio_triggered_buffer_setup(idev, NULL,
+ &ecap_trigger_handler,
+ &ecap_buffer_setup_ops);
+ if (ret)
+ return ret;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(&pdev->dev, "no irq is specified\n");
+ return irq;
+ }
+ ret = devm_request_irq(&pdev->dev, irq,
+ &ecap_interrupt_handler,
+ 0, dev_name(&pdev->dev), idev);
+ if (ret) {
+ dev_err(&pdev->dev, "unable to request irq\n");
+ goto uninit_buffer;
+ }
+
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ state->regs = devm_ioremap_resource(&pdev->dev, r);
+ if (IS_ERR(state->regs)) {
+ dev_err(&pdev->dev, "unable to remap registers\n");
+ ret = PTR_ERR(state->regs);
+ goto uninit_buffer;
+ };
+
+ ret = iio_device_register(idev);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "unable to register device\n");
+ goto uninit_buffer;
+ }
+
+ state->buf = devm_kzalloc(&idev->dev, idev->scan_bytes, GFP_KERNEL);
+ if (!state->buf) {
+ ret = -ENOMEM;
+ goto uninit_buffer;
+ }
+
+ pm_runtime_enable(&pdev->dev);
+ pm_runtime_get_sync(&pdev->dev);
+
+ status = pwmss_submodule_state_change(pdev->dev.parent,
+ PWMSS_ECAPCLK_EN);
+ if (!(status & PWMSS_ECAPCLK_EN_ACK)) {
+ dev_err(&pdev->dev, "failed to enable PWMSS config space clock\n");
+ ret = -EINVAL;
+ goto pwmss_clk_failure;
+ }
+
+ ecap_init_hw(idev);
+
+ pm_runtime_put_sync(&pdev->dev);
+
+ return 0;
+
+pwmss_clk_failure:
+ pm_runtime_put_sync(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+ iio_device_unregister(idev);
+
+uninit_buffer:
+ iio_triggered_buffer_cleanup(idev);
+
+ return ret;
+}
+
+static int ecap_remove(struct platform_device *pdev)
+{
+ struct iio_dev *idev = platform_get_drvdata(pdev);
+
+ pm_runtime_get_sync(&pdev->dev);
+
+ pwmss_submodule_state_change(pdev->dev.parent, PWMSS_ECAPCLK_STOP_REQ);
+
+ pm_runtime_put_sync(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+
+ iio_device_unregister(idev);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int ecap_suspend(struct device *dev)
+{
+ struct ecap_state *state = dev_to_ecap_state(dev);
+
+ pm_runtime_get_sync(dev);
+ state->ctx.cap1 = readl(state->regs + CAP1);
+ state->ctx.cap2 = readl(state->regs + CAP2);
+ state->ctx.eceint = readw(state->regs + ECEINT);
+ state->ctx.ecctl1 = readw(state->regs + ECCTL1);
+ state->ctx.ecctl2 = readw(state->regs + ECCTL2);
+ pm_runtime_put_sync(dev);
+
+ /* If capture was active, disable ECAP */
+ if (test_bit(ECAP_ENABLED, &state->flags))
+ pm_runtime_put_sync(dev);
+
+ return 0;
+}
+
+static int ecap_resume(struct device *dev)
+{
+ struct ecap_state *state = dev_to_ecap_state(dev);
+
+ /* If capture was active, enable ECAP */
+ if (test_bit(ECAP_ENABLED, &state->flags))
+ pm_runtime_get_sync(dev);
+
+ pm_runtime_get_sync(dev);
+ writel(state->ctx.cap1, state->regs + CAP1);
+ writel(state->ctx.cap2, state->regs + CAP2);
+ writew(state->ctx.eceint, state->regs + ECEINT);
+ writew(state->ctx.ecctl1, state->regs + ECCTL1);
+ writew(state->ctx.ecctl2, state->regs + ECCTL2);
+ pm_runtime_put_sync(dev);
+
+ return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(ecap_pm_ops, ecap_suspend, ecap_resume);
+
+static struct platform_driver ecap_iio_driver = {
+ .driver = {
+ .name = "ecap",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(ecap_of_ids),
+ .pm = &ecap_pm_ops,
+ },
+ .probe = ecap_probe,
+ .remove = ecap_remove,
+};
+
+module_platform_driver(ecap_iio_driver);
+
+MODULE_DESCRIPTION("ECAP IIO pulse capture driver");
+MODULE_AUTHOR("Matt Porter <mporter@linaro.org>");
+MODULE_LICENSE("GPL");
--
1.8.4
^ permalink raw reply related
* [PATCH 1/5] iio: add support for pulse width capture devices
From: Matt Porter @ 2014-01-29 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391029199-3670-1-git-send-email-mporter@linaro.org>
Add a channel type to support pulse width capture devices.
These devices capture the timing of a PWM signal based on a
configurable trigger
Signed-off-by: Matt Porter <mporter@linaro.org>
---
drivers/iio/industrialio-core.c | 1 +
include/linux/iio/types.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c
index acc911a..6ea0cf8 100644
--- a/drivers/iio/industrialio-core.c
+++ b/drivers/iio/industrialio-core.c
@@ -70,6 +70,7 @@ static const char * const iio_chan_type_name_spec[] = {
[IIO_CCT] = "cct",
[IIO_PRESSURE] = "pressure",
[IIO_HUMIDITYRELATIVE] = "humidityrelative",
+ [IIO_PULSE] = "pulse",
};
static const char * const iio_modifier_names[] = {
diff --git a/include/linux/iio/types.h b/include/linux/iio/types.h
index 084d882..4fa8840 100644
--- a/include/linux/iio/types.h
+++ b/include/linux/iio/types.h
@@ -30,6 +30,7 @@ enum iio_chan_type {
IIO_CCT,
IIO_PRESSURE,
IIO_HUMIDITYRELATIVE,
+ IIO_PULSE,
};
enum iio_modifier {
--
1.8.4
^ permalink raw reply related
* [PATCH 0/5] IIO pulse capture support for TI ECAP
From: Matt Porter @ 2014-01-29 20:59 UTC (permalink / raw)
To: linux-arm-kernel
This series adds support for PWM capture devices within IIO and
adds a TI ECAP IIO driver.
PWM capture devices are supported using a new IIO "pulse" channel type.
The IIO ECAP driver implements interrupt driven triggered buffer capture
only as raw sample reads are not applicable to this hardware.
Initially, the driver supports a single pulse width measurement with
configurable polarity. The ECAP hardware can support measurement of a
complete period and duty cycle but this is not yet implemented.
Matt Porter (5):
iio: add support for pulse width capture devices
iio: pulse: add TI ECAP driver
iio: enable selection and build of pulse drivers
pwm: enable TI PWMSS if the IIO tiecap driver is selected
ARM: dts: AM33XX: Add ecap interrupt properties
arch/arm/boot/dts/am33xx.dtsi | 6 +
drivers/iio/Kconfig | 1 +
drivers/iio/Makefile | 1 +
drivers/iio/industrialio-core.c | 1 +
drivers/iio/pulse/Kconfig | 20 ++
drivers/iio/pulse/Makefile | 6 +
drivers/iio/pulse/tiecap.c | 493 ++++++++++++++++++++++++++++++++++++++++
drivers/pwm/Kconfig | 2 +-
include/linux/iio/types.h | 1 +
9 files changed, 530 insertions(+), 1 deletion(-)
create mode 100644 drivers/iio/pulse/Kconfig
create mode 100644 drivers/iio/pulse/Makefile
create mode 100644 drivers/iio/pulse/tiecap.c
--
1.8.4
^ permalink raw reply
* [PATCH v4 2/5] arm: add new asm macro update_sctlr
From: Mark Salter @ 2014-01-29 20:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140129182805.GF11329@bivouac.eciton.net>
On Wed, 2014-01-29 at 18:28 +0000, Leif Lindholm wrote:
> On Wed, Jan 22, 2014 at 11:20:55AM +0000, Will Deacon wrote:
> > > +#ifdef CONFIG_CPU_CP15
> > > +/* Macro for setting/clearing bits in sctlr */
> > > + .macro update_sctlr, set:req, clear:req, tmp:req, tmp2:req
> > > + mrc p15, 0, \tmp, c1, c0, 0
> > > + ldr \tmp2, =\set
> > > + orr \tmp, \tmp, \tmp2
> > > + ldr \tmp2, =\clear
> > > + mvn \tmp2, \tmp2
> > > + and \tmp, \tmp, \tmp2
> > > + mcr p15, 0, \tmp, c1, c0, 0
> >
> > I think this would be cleaner if you force the caller to put set and clear
> > into registers beforehand, rather than have to do the literal load every
> > time. Also, I don't think set and clear should be required (and then you can
> > lose tmp2 as well).
>
> I can't figure out how to make register-parameters non-required
> (i.e. conditionalise on whether an optional parameter was provided),
> so my attempt of refactoring actually ends up using an additional
> register:
>
Register parameters are just strings, so how about this:
.macro foo bar=, baz=
.ifnc \bar,
mov \bar,#0
.endif
.ifnc \baz,
mov \baz,#1
.endif
.endm
foo x0
foo
foo x1, x2
foo ,x3
Results in:
0000000000000000 <.text>:
0: d2800000 mov x0, #0x0 // #0
4: d2800001 mov x1, #0x0 // #0
8: d2800022 mov x2, #0x1 // #1
c: d2800023 mov x3, #0x1 // #1
^ permalink raw reply
* [PATCH v2 1/6] idle: move the cpuidle entry point to the generic idle loop
From: Nicolas Pitre @ 2014-01-29 20:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391017513-12995-2-git-send-email-nicolas.pitre@linaro.org>
On Wed, 29 Jan 2014, Nicolas Pitre wrote:
> In order to integrate cpuidle with the scheduler, we must have a better
> proximity in the core code with what cpuidle is doing and not delegate
> such interaction to arch code.
>
> Architectures implementing arch_cpu_idle() should simply enter
> a cheap idle mode in the absence of a proper cpuidle driver.
>
> Signed-off-by: Nicolas Pitre <nico@linaro.org>
> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
As mentioned in my reply to Olof's comment on patch #5/6, here's a new
version of this patch adding the safety local_irq_enable() to the core
code.
----- >8
From: Nicolas Pitre <nicolas.pitre@linaro.org>
Subject: idle: move the cpuidle entry point to the generic idle loop
In order to integrate cpuidle with the scheduler, we must have a better
proximity in the core code with what cpuidle is doing and not delegate
such interaction to arch code.
Architectures implementing arch_cpu_idle() should simply enter
a cheap idle mode in the absence of a proper cpuidle driver.
In both cases i.e. whether it is a cpuidle driver or the default
arch_cpu_idle(), the calling convention expects IRQs to be disabled
on entry and enabled on exit. There is a warning in place already but
let's add a forced IRQ enable here as well. This will allow for
removing the forced IRQ enable some implementations do locally and
allowing for the warning to trig.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
diff --git a/kernel/cpu/idle.c b/kernel/cpu/idle.c
index 988573a9a3..14ca43430a 100644
--- a/kernel/cpu/idle.c
+++ b/kernel/cpu/idle.c
@@ -3,6 +3,7 @@
*/
#include <linux/sched.h>
#include <linux/cpu.h>
+#include <linux/cpuidle.h>
#include <linux/tick.h>
#include <linux/mm.h>
#include <linux/stackprotector.h>
@@ -95,8 +96,10 @@ static void cpu_idle_loop(void)
if (!current_clr_polling_and_test()) {
stop_critical_timings();
rcu_idle_enter();
- arch_cpu_idle();
- WARN_ON_ONCE(irqs_disabled());
+ if (cpuidle_idle_call())
+ arch_cpu_idle();
+ if (WARN_ON_ONCE(irqs_disabled()))
+ local_irq_enable();
rcu_idle_exit();
start_critical_timings();
} else {
^ permalink raw reply related
* [PATCH v2 1/6] audit: Enable arm64 support
From: Richard Guy Briggs @ 2014-01-29 20:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52E5EAC1.2070306@linaro.org>
On 14/01/27, AKASHI Takahiro wrote:
> [To audit maintainers]
>
> On 01/23/2014 11:18 PM, Catalin Marinas wrote:
> >On Fri, Jan 17, 2014 at 08:13:14AM +0000, AKASHI Takahiro wrote:
> >>--- a/include/uapi/linux/audit.h
> >>+++ b/include/uapi/linux/audit.h
> >>@@ -327,6 +327,8 @@ enum {
> >> /* distinguish syscall tables */
> >> #define __AUDIT_ARCH_64BIT 0x80000000
> >> #define __AUDIT_ARCH_LE 0x40000000
> >>+#define AUDIT_ARCH_AARCH64 (EM_AARCH64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
> >>+#define AUDIT_ARCH_AARCH64EB (EM_AARCH64|__AUDIT_ARCH_64BIT)
> >> #define AUDIT_ARCH_ALPHA (EM_ALPHA|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
> >> #define AUDIT_ARCH_ARM (EM_ARM|__AUDIT_ARCH_LE)
> >> #define AUDIT_ARCH_ARMEB (EM_ARM)
> >>diff --git a/init/Kconfig b/init/Kconfig
> >>index 79383d3..3aae602 100644
> >>--- a/init/Kconfig
> >>+++ b/init/Kconfig
> >>@@ -284,7 +284,7 @@ config AUDIT
> >>
> >> config AUDITSYSCALL
> >> bool "Enable system-call auditing support"
> >>- depends on AUDIT && (X86 || PARISC || PPC || S390 || IA64 || UML || SPARC64 || SUPERH || (ARM && AEABI && !OABI_COMPAT))
> >>+ depends on AUDIT && (X86 || PARISC || PPC || S390 || IA64 || UML || SPARC64 || SUPERH || (ARM && AEABI && !OABI_COMPAT) || ARM64)
> >
> >The usual comment for such changes: could you please clean this up and
> >just use something like "depends on HAVE_ARCH_AUDITSYSCALL"?
>
> Do you agree to this change?
>
> If so, I can create a patch, but have some concerns:
> 1) I can't verify it on other architectures than (arm &) arm64.
> 2) Some architectures (microblaze, mips, openrisc) are not listed here, but
> their ptrace.c have a call to audit_syscall_entry/exit().
> (audit_syscall_entry/exit are null if !AUDITSYSCALL, though)
I can try: ppc s390 x86_64 ppc64 i686 s390x
> So I'm afraid that the change might break someone's assumption.
>
> Thanks,
> -Takahiro AKASHI
- RGB
--
Richard Guy Briggs <rbriggs@redhat.com>
Senior Software Engineer, Kernel Security, AMER ENG Base Operating Systems, Red Hat
Remote, Ottawa, Canada
Voice: +1.647.777.2635, Internal: (81) 32635, Alt: +1.613.693.0684x3545
^ permalink raw reply
* [PATCH v5 16/20] ARM: kirkwood: Add RSTOUT 'reg' entry to devicetree
From: Andrew Lunn @ 2014-01-29 20:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390836440-12744-17-git-send-email-ezequiel.garcia@free-electrons.com>
On Mon, Jan 27, 2014 at 12:27:16PM -0300, Ezequiel Garcia wrote:
> In order to support multiplatform builds the watchdog devicetree binding
> was modified and now the 'reg' property is specified to need two
> entries. This commit adds the second entry as-per the new specification.
>
> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Hi Ezequiel
I tested on Kirkwood, using the standard watchdog test cases. Works
great.
Tested-by: Andrew Lunn <andrew@lunn.ch>
Thanks
Andrew
^ permalink raw reply
* [PATCH v2 5/6] X86: remove redundant cpuidle_idle_call()
From: Nicolas Pitre @ 2014-01-29 20:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOesGMjvOkuxCopog91SAV1-gB9GaEYXpuXwhV1EJQor_pKjBA@mail.gmail.com>
On Wed, 29 Jan 2014, Olof Johansson wrote:
> Hi,
>
> On Wed, Jan 29, 2014 at 9:45 AM, Nicolas Pitre <nicolas.pitre@linaro.org> wrote:
> > The core idle loop now takes care of it.
> >
> > Signed-off-by: Nicolas Pitre <nico@linaro.org>
> > Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> > ---
> > arch/x86/kernel/process.c | 5 +----
> > 1 file changed, 1 insertion(+), 4 deletions(-)
> >
> > diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
> > index 3fb8d95ab8..4505e2a950 100644
> > --- a/arch/x86/kernel/process.c
> > +++ b/arch/x86/kernel/process.c
> > @@ -298,10 +298,7 @@ void arch_cpu_idle_dead(void)
> > */
> > void arch_cpu_idle(void)
> > {
> > - if (cpuidle_idle_call())
> > - x86_idle();
> > - else
> > - local_irq_enable();
> > + x86_idle();
>
> You're taking out the local_irq_enable() here but I don't see the
> equivalent of adding it back in the 1/6 patch that moves the
> cpuidle_idle_call() up to common code. It seems that one of the call
> paths through cpuidle_idle_call() don't re-enable it on its own.
When cpuidle_idle_call() returns non-zero, IRQs are left disabled. When
it returns zero then IRQs should be disabled. Same goes for cpuidle
drivers. That's the theory at least.
Looking into some cpuidle drivers for x86 I found at least one that
doesn't respect this convention. Damn.
> Even if this is the right thing to do, why it's OK to do so should
> probably be documented in the patch description.
Better yet, I'm going to amend patch 1/6 with the below to make things
more reliable while still identifying misbehaving drivers.
diff --git a/kernel/cpu/idle.c b/kernel/cpu/idle.c
index ffcd3ee9af..14ca43430a 100644
--- a/kernel/cpu/idle.c
+++ b/kernel/cpu/idle.c
@@ -98,7 +98,8 @@ static void cpu_idle_loop(void)
rcu_idle_enter();
if (cpuidle_idle_call())
arch_cpu_idle();
- WARN_ON_ONCE(irqs_disabled());
+ if (WARN_ON_ONCE(irqs_disabled()))
+ local_irq_enable();
rcu_idle_exit();
start_critical_timings();
} else {
^ permalink raw reply related
* [PATCH v2 10/10] ARM: KVM: add world-switch for AMAIR{0,1}
From: Christoffer Dall @ 2014-01-29 20:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390402602-22777-11-git-send-email-marc.zyngier@arm.com>
On Wed, Jan 22, 2014 at 02:56:42PM +0000, Marc Zyngier wrote:
> HCR.TVM traps (among other things) accesses to AMAIR0 and AMAIR1.
> In order to minimise the amount of surprise a guest could generate by
> trying to access these registers with caches off, add them to the
> list of registers we switch/handle.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm/include/asm/kvm_asm.h | 4 +++-
> arch/arm/kvm/coproc.c | 6 ++++++
> arch/arm/kvm/interrupts_head.S | 12 ++++++++++--
> 3 files changed, 19 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/include/asm/kvm_asm.h b/arch/arm/include/asm/kvm_asm.h
> index 661da11..53b3c4a 100644
> --- a/arch/arm/include/asm/kvm_asm.h
> +++ b/arch/arm/include/asm/kvm_asm.h
> @@ -48,7 +48,9 @@
> #define c13_TID_URO 26 /* Thread ID, User R/O */
> #define c13_TID_PRIV 27 /* Thread ID, Privileged */
> #define c14_CNTKCTL 28 /* Timer Control Register (PL1) */
> -#define NR_CP15_REGS 29 /* Number of regs (incl. invalid) */
> +#define c10_AMAIR0 29 /* Auxilary Memory Attribute Indirection Reg0 */
> +#define c10_AMAIR1 30 /* Auxilary Memory Attribute Indirection Reg1 */
> +#define NR_CP15_REGS 31 /* Number of regs (incl. invalid) */
>
> #define ARM_EXCEPTION_RESET 0
> #define ARM_EXCEPTION_UNDEFINED 1
> diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
> index 1839770..539f6d4 100644
> --- a/arch/arm/kvm/coproc.c
> +++ b/arch/arm/kvm/coproc.c
> @@ -381,6 +381,12 @@ static const struct coproc_reg cp15_regs[] = {
> { CRn(10), CRm( 2), Op1( 0), Op2( 1), is32,
> access_vm_reg, reset_unknown, c10_NMRR},
>
> + /* AMAIR0/AMAIR1: swapped by interrupt.S. */
> + { CRn(10), CRm( 3), Op1( 0), Op2( 0), is32,
> + access_vm_reg, reset_unknown, c10_AMAIR0},
> + { CRn(10), CRm( 3), Op1( 0), Op2( 1), is32,
> + access_vm_reg, reset_unknown, c10_AMAIR1},
> +
> /* VBAR: swapped by interrupt.S. */
> { CRn(12), CRm( 0), Op1( 0), Op2( 0), is32,
> NULL, reset_val, c12_VBAR, 0x00000000 },
> diff --git a/arch/arm/kvm/interrupts_head.S b/arch/arm/kvm/interrupts_head.S
> index 7cb41e1..e4eaf30 100644
> --- a/arch/arm/kvm/interrupts_head.S
> +++ b/arch/arm/kvm/interrupts_head.S
> @@ -303,13 +303,17 @@ vcpu .req r0 @ vcpu pointer always in r0
>
> mrc p15, 0, r2, c14, c1, 0 @ CNTKCTL
> mrrc p15, 0, r4, r5, c7 @ PAR
> + mrc p15, 0, r6, c10, c3, 0 @ AMAIR0
> + mrc p15, 0, r7, c10, c3, 1 @ AMAIR1
>
> .if \store_to_vcpu == 0
> - push {r2,r4-r5}
> + push {r2,r4-r7}
> .else
> str r2, [vcpu, #CP15_OFFSET(c14_CNTKCTL)]
> add r12, vcpu, #CP15_OFFSET(c7_PAR)
> strd r4, r5, [r12]
> + str r6, [vcpu, #CP15_OFFSET(c10_AMAIR0)]
> + str r7, [vcpu, #CP15_OFFSET(c10_AMAIR1)]
> .endif
> .endm
>
> @@ -322,15 +326,19 @@ vcpu .req r0 @ vcpu pointer always in r0
> */
> .macro write_cp15_state read_from_vcpu
> .if \read_from_vcpu == 0
> - pop {r2,r4-r5}
> + pop {r2,r4-r7}
> .else
> ldr r2, [vcpu, #CP15_OFFSET(c14_CNTKCTL)]
> add r12, vcpu, #CP15_OFFSET(c7_PAR)
> ldrd r4, r5, [r12]
> + ldr r6, [vcpu, #CP15_OFFSET(c10_AMAIR0)]
> + ldr r7, [vcpu, #CP15_OFFSET(c10_AMAIR1)]
> .endif
>
> mcr p15, 0, r2, c14, c1, 0 @ CNTKCTL
> mcrr p15, 0, r4, r5, c7 @ PAR
> + mcr p15, 0, r6, c10, c3, 0 @ AMAIR0
> + mcr p15, 0, r7, c10, c3, 1 @ AMAIR1
>
> .if \read_from_vcpu == 0
> pop {r2-r12}
> --
> 1.8.3.4
>
Looks good, but shouldn't this be added before patch 9 to maintain
functional bisectability?
Otherwise:
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox