* [PATCH 0/2] Add Ether's PHY IRQ support for Lager/Koelsh boards
From: Sergei Shtylyov @ 2014-02-04 15:51 UTC (permalink / raw)
To: linux-arm-kernel
Hello.
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-v3.14-rc1-20130204' tag. Here we add support for the Ether's PHY
IRQ to the R8A7790/Lager and R8A7791/Koelsch boards.
[1/2] ARM: shmobile: Lager: pass Ether PHY IRQ
[1/2] ARM: shmobile: Koelsch: pass Ether PHY IRQ
PS: Sorry for the previous mail, I've hit Ctrl-Enter unexpectedly.
WBR, Sergei
^ permalink raw reply
* [PATCH 0/2] Add Ether's PHY IRQ support for R8A7790/Lager board
From: Sergei Shtylyov @ 2014-02-04 15:48 UTC (permalink / raw)
To: linux-arm-kernel
Hello.
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-v3.13-rc4-20131219' tag. Here we add support for the Ether's PHY
IRQ to the R8A7790/Lager board. The patchset depends on the two 'sh_eth' driver
patches posted earlier in order to compile and work. It would be good if Dave Miller
could merge these patches thru his tree, along with 'sh_eth' patches as this
would have prevented delaying these patches to 3.15 which seems inevitable
otherwise (well, unless Simon merges net-next to his tree?). I'll rebase the
patches to the 'net-next.git' repo if Dave consents to merging them...
[1/2] ARM: shmobile: Lager: pass Ether PHY IRQ
[2/2] ARM: shmobile: Lager: conditionally select CONFIG_MICREL_PHY
WBR, Sergei
^ permalink raw reply
* 'unannotated irqs-on' lockdep warning
From: Christian Gmeiner @ 2014-02-04 15:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140204125839.GC26766@pengutronix.de>
2014-02-04 Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>:
> On Tue, Feb 04, 2014 at 11:02:16AM +0100, Christian Gmeiner wrote:
>> Hi
>>
>> 2014-01-30 Russell King - ARM Linux <linux@arm.linux.org.uk>:
>> > On Thu, Jan 30, 2014 at 03:31:46PM +0100, Christian Gmeiner wrote:
>> >> [ 19.859234] CPU: 0 PID: 1848 Comm: mkdir Not tainted 3.12.4 #44
>> >> [ 19.865190] [<c0013900>] (unwind_backtrace+0x0/0xe0) from
>> >> [<c00113b8>] (show_stack+0x10/0x14)
>> >> [ 19.873739] [<c00113b8>] (show_stack+0x10/0x14) from [<c044e040>]
>> >> (dump_stack+0x64/0xa4)
>> >> [ 19.881851] [<c044e040>] (dump_stack+0x64/0xa4) from [<c0022718>]
>> >> (warn_slowpath_common+0x64/0x84)
>> >> [ 19.890828] [<c0022718>] (warn_slowpath_common+0x64/0x84) from
>> >> [<c00227b8>] (warn_slowpath_fmt+0x2c/0x3c)
>> >> [ 19.900413] [<c00227b8>] (warn_slowpath_fmt+0x2c/0x3c) from
>> >> [<c0076c84>] (check_flags.part.26+0xb4/0x1e4)
>> >> [ 19.910001] [<c0076c84>] (check_flags.part.26+0xb4/0x1e4) from
>> >> [<c0079654>] (lock_release+0x3c/0x100)
>> >> [ 19.919243] [<c0079654>] (lock_release+0x3c/0x100) from
>> >> [<c00485b4>] (lg_local_unlock+0x18/0x6c)
>> >> [ 19.928055] [<c00485b4>] (lg_local_unlock+0x18/0x6c) from
>> >> [<c012a2cc>] (free_fs_struct+0x18/0x30)
>> >> [ 19.936947] [<c012a2cc>] (free_fs_struct+0x18/0x30) from
>> >> [<c0024e24>] (do_exit+0x2ac/0x3f0)
>> >> [ 19.945316] [<c0024e24>] (do_exit+0x2ac/0x3f0) from [<c002501c>]
>> >> (do_group_exit+0x88/0xb4)
>> >> [ 19.953596] [<c002501c>] (do_group_exit+0x88/0xb4) from
>> >> [<c0025058>] (__wake_up_parent+0x0/0x18)
>> >> [ 19.962391] ---[ end trace 98a70b5cdc7b49fe ]---
>> >> [ 19.967017] possible reason: unannotated irqs-on.
>> >> [ 19.971729] irq event stamp: 2910
>> >> [ 19.975050] hardirqs last enabled at (2909): [<c044a160>]
>> >> __slab_free+0x1c0/0x390
>> >> [ 19.982661] hardirqs last disabled at (2910): [<c0456d14>]
>> >> __dabt_svc+0x34/0x60
>> >
>> > So, I wonder how we got from __dabt_svc to __wake_up_parent. It looks
>> > like the unwinder has failed to do a proper job of unwinding, which
>> > makes this undebuggable.
>> >
>> > Can you rebuild in ARM mode with frame pointers enabled please?
>> >
>>
>> Maybe i am blind but I can not find that option via make menuconfig. hmmm
> config FRAME_POINTER
> bool
> depends on !THUMB2_KERNEL
> default y if !ARM_UNWIND || FUNCTION_GRAPH_TRACER
>
> so disable THUMB2_KERNEL and ARM_UNWIND.
>
Thanks Uwe.
This is what I get:
5.761766] udevd[360]: starting version 175
[ 6.436175] input: rotary.15 as /devices/rotary.15/input/input1
[ 9.689303] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null)
[ 9.960301] [EXT4 FS bs=4096, gc=16, bpg=32768, ipg=8192,
mo=8802c818, mo2=0002]
[ 9.960328] EXT4-fs (mmcblk0p2): re-mounted. Opts: debug
[ 14.212395] [EXT4 FS bs=4096, gc=13, bpg=32768, ipg=7888,
mo=8802c818, mo2=0002]
[ 14.212729] EXT4-fs (mmcblk0p1): mounted filesystem with ordered
data mode. Opts: debug
[ 15.063614] ------------[ cut here ]------------
[ 15.068272] WARNING: CPU: 1 PID: 1321 at kernel/lockdep.c:3539
check_flags+0xe8/0x1ec()
[ 15.076287] DEBUG_LOCKS_WARN_ON(!current->hardirqs_enabled)
[ 15.081692] Modules linked in: rotary_encoder
[ 15.086296] CPU: 1 PID: 1321 Comm: mountall.sh Not tainted 3.12.9 #1
[ 15.092658] Backtrace:
[ 15.095153] [<c001213c>] (dump_backtrace+0x0/0x10c) from
[<c00122dc>] (show_stack+0x18/0x1c)
[ 15.103601] r6:ffffffff r5:c06e5660 r4:00000000 r3:00000000
[ 15.109365] [<c00122c4>] (show_stack+0x0/0x1c) from [<c04b83cc>]
(dump_stack+0x6c/0xac)
[ 15.117394] [<c04b8360>] (dump_stack+0x0/0xac) from [<c0025094>]
(warn_slowpath_common+0x70/0x90)
[ 15.126273] r6:00000dd3 r5:00000009 r4:ec44fd50 r3:c2b62a00
[ 15.132028] [<c0025024>] (warn_slowpath_common+0x0/0x90) from
[<c0025158>] (warn_slowpath_fmt+0x38/0x40)
[ 15.141515] r8:ed6a2530 r7:c0128918 r6:c070fe54 r5:ec44e000 r4:c06e5738
[ 15.148331] [<c0025120>] (warn_slowpath_fmt+0x0/0x40) from
[<c0083338>] (check_flags+0xe8/0x1ec)
[ 15.157123] r3:c05ef538 r2:c05e6f2c
[ 15.160754] [<c0083250>] (check_flags+0x0/0x1ec) from [<c0087334>]
(lock_release+0x48/0x290)
[ 15.169199] r6:c06d16ec r5:00000040 r4:ec44e000 r3:00000000
[ 15.174959] [<c00872ec>] (lock_release+0x0/0x290) from [<c0128930>]
(complete_walk+0x6c/0x12c)
[ 15.183586] [<c01288c4>] (complete_walk+0x0/0x12c) from
[<c012b000>] (path_lookupat+0x74/0x7a8)
[ 15.192291] r6:00000000 r5:00000040 r4:ec44fe68 r3:ed6a2530
[ 15.198042] [<c012af8c>] (path_lookupat+0x0/0x7a8) from
[<c012b75c>] (filename_lookup+0x28/0x68)
[ 15.206842] [<c012b734>] (filename_lookup+0x0/0x68) from
[<c012dd9c>] (user_path_at_empty+0x5c/0x84)
[ 15.215981] r7:ffffff9c r6:ec44fe68 r5:00000000 r4:ec477000
[ 15.221732] [<c012dd40>] (user_path_at_empty+0x0/0x84) from
[<c012dde0>] (user_path_at+0x1c/0x24)
[ 15.230610] r8:ffffff9c r7:00eb3274 r6:ec44ff40 r5:00000000 r4:ec44ff00
[ 15.237425] [<c012ddc4>] (user_path_at+0x0/0x24) from [<c0123fd0>]
(vfs_fstatat+0x54/0x98)
[ 15.245703] [<c0123f7c>] (vfs_fstatat+0x0/0x98) from [<c0124038>]
(vfs_lstat+0x24/0x28)
[ 15.253722] [<c0124014>] (vfs_lstat+0x0/0x28) from [<c0124270>]
(SyS_lstat64+0x1c/0x38)
[ 15.261742] [<c0124254>] (SyS_lstat64+0x0/0x38) from [<c000e5c0>]
(ret_fast_syscall+0x0/0x48)
[ 15.270273] r4:0000000b
[ 15.272833] ---[ end trace a6e000210e7fe9c9 ]---
[ 15.277457] possible reason: unannotated irqs-on.
[ 15.282169] irq event stamp: 37958
[ 15.285578] hardirqs last enabled at (37957): [<c000e650>]
no_work_pending+0x8/0x2c
[ 15.293352] hardirqs last disabled at (37958): [<c04beb54>]
__dabt_svc+0x34/0x60
[ 15.300780] softirqs last enabled at (32532): [<c0029b70>]
__do_softirq+0x1bc/0x304
[ 15.308556] softirqs last disabled at (32521): [<c0029d80>]
do_softirq+0x70/0x78
[ 16.977080] NET: Registered protocol family 10
[ 18.394642] fec 2188000.ethernet eth0: Freescale FEC PHY driver
[Generic PHY] (mii_bus:phy_addr=fixed-0:00, irq=-1)
[ 18.409077] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
greets
--
Christian Gmeiner, MSc
https://soundcloud.com/christian-gmeiner
^ permalink raw reply
* UBI leb_write_unlock NULL pointer Oops (continuation) on ARM926
From: Bill Pringlemeir @ 2014-02-04 15:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391500492.1795.36.camel@sauron.fi.intel.com>
>>>> Am 03.02.2014 13:51, schrieb Wiedemer, Thorsten (Lawo AG):
>>>>> I can reproduce it fairly regularly, but not really "quickly". At
>>>>> the moment, I can use a setup of about identical 70 devices. A
>>>>> test over the last weekend resultet In 6 devices showing the bug.
>>>>> What we have are multiple processes which write in different
>>>>> intervals some data on the device and sync it, because this data
>>>>> should be available after a power cut. Perhaps I can force the
>>>>> error more often in writing test processes with shorter write/sync
>>>>> intervals.
>>>>>
>>>>> If I have further access to the "big" setup for some days, I will
>>>>> try to make a test without preemption.
>>> On Mon, 2014-02-03 at 14:56 +0100, Richard Weinberger wrote:
>>>> Hmm, ok.
>>>> Please also apply this patch, just in case...
I don't think this patch will help.
On 4 Feb 2014, dedekind1 at gmail.com wrote:
> May be. Although sometimes corruptions are also deterministics - a
> buffer over-run at the same place causes the same side effects etc.
> But in any case, the only way I know to deal with this issues is start
> putting various prints and assertions, and trying to come closer to the
> root-cause. Sometimes bisecting helps, but this case would be difficult
> to bisect because the reproducability is hard. Indeed, one may think
> that there is no failure duding a day, so the commit as 'good' while it
> may be actually 'bad', the bug just happen to not manifest itself
> quickly enough.
I have seen the same crash on a 2.6.36 system with all of the UbiFs/Ubi
backported. It is also an IMX25 based system.
We have,
PC is at __up_write+0x3c/0x1a8
LR is at __up_write+0x24/0x1a8
pc : [<c0229400>] lr : [<c02293e8>] psr: a0000093
sp : c7225cc8 ip : 00020000 fp : c79fba00
r10: 00000523 r9 : 00000001 r8 : c7b33000
r7 : c793a800 r6 : c7bd473c r5 : c7bd4738 r4 : c7bd4720
r3 : 00000000 r2 : 00000002 r1 : 00000001 r0 : 00000002
Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment user
Code: e4863004 e5953004 e1560003 0a00002a (e593200c)
I run this,
$ printf "\x04\x30\x86\xe4"
"\x04\x30\x95\xe5"
"\x03\x00\x56\xe1"
"\x2a\x00\x00\x0a"
"\x0c\x20\x93\xe5" > crash.dump
$ objdump --disassemble-all -b binary -m arm crash.dump
crash.dump: file format binary
Disassembly of section .data:
00000000 <.data>:
0: e4863004 str r3, [r6], #4
4: e5953004 ldr r3, [r5, #4]
8: e1560003 cmp r6, r3
c: 0a00002a beq 0xbc
10: e593200c ldr r2, [r3, #12]
The values 'r6' and 'r5' are pointers and they are far from non-NULL and
look like good kernel data pointers. Something in the list is 'NULL'.
There is a load of 'r3' as NULL and then the use of '[r3, #12]' which
gives the crash address of '0xc'.
Here is the objdump with source interspersed for my build,
sem->activity = 0;
350: e3a0a000 mov sl, #0
354: e1a05000 mov r5, r0
358: e485a004 str sl, [r5], #4
* list_empty - tests whether a list is empty
* @head: the list to test.
*/
static inline int list_empty(const struct list_head *head)
{
return head->next == head;
35c: e5903004 ldr r3, [r0, #4]
if (!list_empty(&sem->wait_list))
360: e1550003 cmp r5, r3
364: 0a00002b beq 418 <__up_write+0xfc>
/* if we are allowed to wake writers try to grant a single write lock
* if there's a writer at the front of the queue
* - we leave the 'waiting count' incremented to signify potential
* contention
*/
if (waiter->flags & RWSEM_WAITING_FOR_WRITE) {
368: e593200c ldr r2, [r3, #12]
36c: e2124002 ands r4, r2, #2
370: 0a000006 beq 390 <__up_write+0x74>
374: ea000034 b 44c <__up_write+0x130>
The compiler picks different registers,
r3/sl+r3, r5/r0, r6/r5 but the code is the same.
The 'rw_semaphore' is
struct rw_semaphore {
__s32 activity;
struct list_head wait_list;
};
So, the 'wait_list' is non-NULL, the rw_semaphore is non-NULL, but
'wait_list->next' is NULL. This seems to be very consistent with this
'oops'.
It seems that the "ltree_lock" doesn't protect the use of the
ltree_lookup() versus insertions and deletions? Ie, ltree_lookup() may
return non-NULL, but an interrupt/pagefault before a 'le->users +/- =
1;' may mean the node is released? On a UP system, does 'spin_lock()'
actually do anything? The rw_semaphore uses spin_lock_irqsave().
However, that doesn't make sense as I think this occurs mainly on a
ARM926 system.
The ARM926 systems do not have proper 'lock free' idioms like
'ldrex/strex' and they try to do atomic operations by locking
interrupts. I think that UbiFs/UBI maybe called on a 'data fault' or
'program fault' (in user space) when memory pressure is present. I have
seen this occur in some sound drivers where the data source is coming
from disk (or maybe the driver uses vmalloc() or something). So I think
on occasion, the ltree_lookup() may not work or there is something weird
with the atomic primatives and data/page faults.
Fwiw,
Bill Pringlemeir.
^ permalink raw reply
* [PATCH v2 11/11] ARM: shmobile: lager legacy: Switch QSPI to named IRQs
From: Geert Uytterhoeven @ 2014-02-04 15:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391527445-14881-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
v2:
- s/DEFINE_RES_IRQ/DEFINE_RES_IRQ_NAMED/
- Rebased on top of renesas-devel-v3.14-rc1-20140204
arch/arm/mach-shmobile/board-lager.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index fdcc868de1fa..3fe982b5ca87 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -293,7 +293,7 @@ static const struct spi_board_info spi_info[] __initconst = {
/* QSPI resource */
static const struct resource qspi_resources[] __initconst = {
DEFINE_RES_MEM(0xe6b10000, 0x1000),
- DEFINE_RES_IRQ(gic_spi(184)),
+ DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
};
/* VIN */
--
1.7.9.5
^ permalink raw reply related
* [PATCH v3 10/11] ARM: shmobile: koelsch dts: Add QSPI nodes
From: Geert Uytterhoeven @ 2014-02-04 15:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391527445-14881-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add pinctrl and SPI devices for QSPI on Koelsch.
Add Spansion s25fl512s SPI FLASH and MTD partitions.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree at vger.kernel.org
---
v3:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v2:
- No changes
arch/arm/boot/dts/r8a7791-koelsch.dts | 36 +++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 74f098596b5c..d4b9bba38685 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -121,8 +121,44 @@
renesas,groups = "scif1_data_d";
renesas,function = "scif1";
};
+
+ qspi_pins: spi {
+ renesas,groups = "qspi_ctrl", "qspi_data4";
+ renesas,function = "qspi";
+ };
};
&sata0 {
status = "okay";
};
+
+&spi {
+ pinctrl-0 = <&qspi_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ flash: flash at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,s25fl512s";
+ reg = <0>;
+ spi-max-frequency = <30000000>;
+ m25p,fast-read;
+
+ partition at 0 {
+ label = "loader";
+ reg = <0x00000000 0x00080000>;
+ read-only;
+ };
+ partition at 80000 {
+ label = "bootenv";
+ reg = <0x00080000 0x00080000>;
+ read-only;
+ };
+ partition at 100000 {
+ label = "data";
+ reg = <0x00100000 0x03f00000>;
+ };
+ };
+};
--
1.7.9.5
^ permalink raw reply related
* [PATCH v3 09/11] ARM: shmobile: r8a7791 dtsi: Add QSPI node
From: Geert Uytterhoeven @ 2014-02-04 15:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391527445-14881-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree at vger.kernel.org
---
v3:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v2:
- No changes
arch/arm/boot/dts/r8a7791.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index d5cc3626dd60..240c4ece1f0c 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -710,4 +710,16 @@
clock-output-names = "scifa3", "scifa4", "scifa5";
};
};
+
+ spi: spi at e6b10000 {
+ compatible = "renesas,qspi-r8a7791", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 08/11] ARM: shmobile: koelsch defconfig: Enable RSPI and MTD_M25P80
From: Geert Uytterhoeven @ 2014-02-04 15:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391527445-14881-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
This enables support for the Spansion s25fl512s SPI FLASH on QSPI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
v4:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v3:
- No changes
v2:
- No changes
arch/arm/configs/koelsch_defconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
index 30157975998a..ca8aa070befe 100644
--- a/arch/arm/configs/koelsch_defconfig
+++ b/arch/arm/configs/koelsch_defconfig
@@ -40,6 +40,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y
CONFIG_SATA_RCAR=y
+CONFIG_MTD=y
+CONFIG_MTD_M25P80=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set
@@ -62,6 +64,8 @@ CONFIG_SH_ETH=y
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=20
CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_SPI_RSPI=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
CONFIG_RCAR_THERMAL=y
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 07/11] ARM: shmobile: koelsch legacy: Add QSPI support
From: Geert Uytterhoeven @ 2014-02-04 15:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391527445-14881-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Enable support for the Spansion s25fl512s SPI FLASH on the Koelsch board:
- Add QSPI platform device, resources, platform data, and pinmux,
- Add FLASH data and MTD partitions.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
v4:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v3:
- Switch to named IRQs
v2:
- Split in 2 groups (qspi_ctrl/qspi_data4)
arch/arm/mach-shmobile/board-koelsch.c | 64 ++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
index 2ab5c75ba2c2..56020d9fa841 100644
--- a/arch/arm/mach-shmobile/board-koelsch.c
+++ b/arch/arm/mach-shmobile/board-koelsch.c
@@ -25,12 +25,17 @@
#include <linux/input.h>
#include <linux/kernel.h>
#include <linux/leds.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
#include <linux/phy.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/rcar-du.h>
#include <linux/platform_device.h>
#include <linux/sh_eth.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/rspi.h>
+#include <linux/spi/spi.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7791.h>
@@ -148,6 +153,55 @@ static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
.nbuttons = ARRAY_SIZE(gpio_buttons),
};
+/* QSPI */
+static const struct resource qspi_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6b10000, 0x1000),
+ DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
+};
+
+static const struct rspi_plat_data qspi_pdata __initconst = {
+ .num_chipselect = 1,
+};
+
+/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64 MiB) */
+static struct mtd_partition spi_flash_part[] = {
+ {
+ .name = "loader",
+ .offset = 0x00000000,
+ .size = 512 * 1024,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "bootenv",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 512 * 1024,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "data",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static const struct flash_platform_data spi_flash_data = {
+ .name = "m25p80",
+ .parts = spi_flash_part,
+ .nr_parts = ARRAY_SIZE(spi_flash_part),
+ .type = "s25fl512s",
+};
+
+static const struct spi_board_info spi_info[] __initconst = {
+ {
+ .modalias = "m25p80",
+ .platform_data = &spi_flash_data,
+ .mode = SPI_MODE_0,
+ .max_speed_hz = 30000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ },
+};
+
/* SATA0 */
static const struct resource sata0_resources[] __initconst = {
DEFINE_RES_MEM(0xee300000, 0x2000),
@@ -180,6 +234,11 @@ static const struct pinctrl_map koelsch_pinctrl_map[] = {
"eth_rmii", "eth"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
"intc_irq0", "intc"),
+ /* QSPI */
+ PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
+ "qspi_ctrl", "qspi"),
+ PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
+ "qspi_data4", "qspi"),
/* SCIF0 (CN19: DEBUG SERIAL0) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7791",
"scif0_data_d", "scif0"),
@@ -205,6 +264,11 @@ static void __init koelsch_add_standard_devices(void)
platform_device_register_data(&platform_bus, "gpio-keys", -1,
&koelsch_keys_pdata,
sizeof(koelsch_keys_pdata));
+ platform_device_register_resndata(&platform_bus, "qspi", 0,
+ qspi_resources,
+ ARRAY_SIZE(qspi_resources),
+ &qspi_pdata, sizeof(qspi_pdata));
+ spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
koelsch_add_du_device();
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 06/11] ARM: shmobile: r8a7791 clock: add QSPI clocks
From: Geert Uytterhoeven @ 2014-02-04 15:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391527445-14881-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
The QSPI clock divider value depends on the MD1, MD2, and MD3 mode
switches.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
v4:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v3:
- No changes
v2:
- No changes
arch/arm/mach-shmobile/clock-r8a7791.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index e4e4dfac85e9..c8227b334e61 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -101,6 +101,7 @@ static struct clk main_clk = {
*/
SH_FIXED_RATIO_CLK_SET(pll1_clk, main_clk, 1, 1);
SH_FIXED_RATIO_CLK_SET(pll3_clk, main_clk, 1, 1);
+SH_FIXED_RATIO_CLK_SET(qspi_clk, pll1_clk, 1, 1);
/* fixed ratio clock */
SH_FIXED_RATIO_CLK_SET(extal_div2_clk, extal_clk, 1, 2);
@@ -124,6 +125,7 @@ static struct clk *main_clks[] = {
&pll3_clk,
&hp_clk,
&p_clk,
+ &qspi_clk,
&rclk_clk,
&mp_clk,
&cp_clk,
@@ -135,6 +137,7 @@ static struct clk *main_clks[] = {
/* MSTP */
enum {
MSTP931, MSTP930, MSTP929, MSTP928, MSTP927, MSTP925,
+ MSTP917,
MSTP815, MSTP814,
MSTP813,
MSTP811, MSTP810, MSTP809,
@@ -154,6 +157,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
[MSTP927] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */
[MSTP925] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */
+ [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
[MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
[MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
[MSTP813] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR8, 13, MSTPSR8, 0), /* Ether */
@@ -195,6 +199,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("zs", &zs_clk),
CLKDEV_CON_ID("hp", &hp_clk),
CLKDEV_CON_ID("p", &p_clk),
+ CLKDEV_CON_ID("qspi", &qspi_clk),
CLKDEV_CON_ID("rclk", &rclk_clk),
CLKDEV_CON_ID("mp", &mp_clk),
CLKDEV_CON_ID("cp", &cp_clk),
@@ -220,6 +225,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */
CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+ CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("i2c-rcar_gen2.0", &mstp_clks[MSTP931]),
@@ -271,6 +277,11 @@ void __init r8a7791_clock_init(void)
break;
}
+ if ((mode & (MD(3) | MD(2) | MD(1))) == MD(2))
+ SH_CLK_SET_RATIO(&qspi_clk_ratio, 1, 16);
+ else
+ SH_CLK_SET_RATIO(&qspi_clk_ratio, 1, 20);
+
for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
ret = clk_register(main_clks[k]);
--
1.7.9.5
^ permalink raw reply related
* [PATCH v5 05/11] ARM: shmobile: r7s72100 dtsi: Add RSPI nodes
From: Geert Uytterhoeven @ 2014-02-04 15:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391527445-14881-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree at vger.kernel.org
---
v5:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v4:
- Switch to named IRQs
v3:
- No changes
v2:
- No changes
arch/arm/boot/dts/r7s72100-genmai-reference.dts | 2 +-
arch/arm/boot/dts/r7s72100.dtsi | 75 +++++++++++++++++++++++
2 files changed, 76 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r7s72100-genmai-reference.dts b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
index da19c70ed82b..0849017e9d2f 100644
--- a/arch/arm/boot/dts/r7s72100-genmai-reference.dts
+++ b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
@@ -9,7 +9,7 @@
*/
/dts-v1/;
-/include/ "r7s72100.dtsi"
+#include "r7s72100.dtsi"
/ {
model = "Genmai";
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 46b82aa7dc4e..9be67a16fc6f 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -8,12 +8,22 @@
* kind, whether express or implied.
*/
+#include <dt-bindings/interrupt-controller/irq.h>
+
/ {
compatible = "renesas,r7s72100";
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ spi0 = &spi0;
+ spi1 = &spi1;
+ spi2 = &spi2;
+ spi3 = &spi3;
+ spi4 = &spi4;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -33,4 +43,69 @@
reg = <0xe8201000 0x1000>,
<0xe8202000 0x1000>;
};
+
+ spi0: spi at e800c800 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800c800 0x24>;
+ interrupts = <0 238 IRQ_TYPE_LEVEL_HIGH>,
+ <0 239 IRQ_TYPE_LEVEL_HIGH>,
+ <0 240 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi1: spi at e800d000 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800d000 0x24>;
+ interrupts = <0 241 IRQ_TYPE_LEVEL_HIGH>,
+ <0 242 IRQ_TYPE_LEVEL_HIGH>,
+ <0 243 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi2: spi at e800d800 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800d800 0x24>;
+ interrupts = <0 244 IRQ_TYPE_LEVEL_HIGH>,
+ <0 245 IRQ_TYPE_LEVEL_HIGH>,
+ <0 246 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi3: spi at e800e000 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800e000 0x24>;
+ interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>,
+ <0 248 IRQ_TYPE_LEVEL_HIGH>,
+ <0 249 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi4: spi at e800e800 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800e800 0x24>;
+ interrupts = <0 250 IRQ_TYPE_LEVEL_HIGH>,
+ <0 251 IRQ_TYPE_LEVEL_HIGH>,
+ <0 252 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.7.9.5
^ permalink raw reply related
* [PATCH v3 04/11] ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
From: Geert Uytterhoeven @ 2014-02-04 15:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391527445-14881-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add DT-style ("%08x.spi") clocks, as Genmai doesn't use the common
clock framework yet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
v3:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v2:
- No changes
arch/arm/mach-shmobile/clock-r7s72100.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index ffb0fff41375..71c99feeff01 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -191,6 +191,11 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
+ CLKDEV_DEV_ID("e800c800.spi", &mstp_clks[MSTP107]),
+ CLKDEV_DEV_ID("e800d000.spi", &mstp_clks[MSTP106]),
+ CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
+ CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
+ CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
--
1.7.9.5
^ permalink raw reply related
* [PATCH v3 03/11] ARM: shmobile: genmai defconfig: Enable RSPI
From: Geert Uytterhoeven @ 2014-02-04 15:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391527445-14881-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
v3:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v2:
- No changes
arch/arm/configs/genmai_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/genmai_defconfig b/arch/arm/configs/genmai_defconfig
index c56a7ff1dcd7..5ee6ac0931f7 100644
--- a/arch/arm/configs/genmai_defconfig
+++ b/arch/arm/configs/genmai_defconfig
@@ -81,6 +81,8 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=10
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C_SH_MOBILE=y
+CONFIG_SPI=y
+CONFIG_SPI_RSPI=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
CONFIG_RCAR_THERMAL=y
--
1.7.9.5
^ permalink raw reply related
* [PATCH v5 02/11] ARM: shmobile: genmai legacy: Add RSPI support
From: Geert Uytterhoeven @ 2014-02-04 15:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391527445-14881-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add RSPI platform device, resources, platform data, and SPI child.
On this board, only rspi4 is in use. Its bus contains a single device
(a wm8978 audio codec).
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
v5:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v4:
- The platform device basename was changed from "rspi" to "rspi-rz",
dropping the platform data flags in the process
- Switch to named IRQs
v3:
- Move platform devices from setup-r7s72100.c to board-genmai.c, as
genmai-reference will use devices instantiated from DT
- Merge with "ARM: shmobile: genmai: Add RSPI children", as this now
touches the same file
- Instantiate SPI children in C on genmai only, as genmai-reference will
instantiate them from DT
v2:
- Correct platform device names ("rspi%u.0" -> "rspi.%u")
- Add missing platform data
- Correct summary (resources -> platform devices)
arch/arm/mach-shmobile/board-genmai.c | 44 +++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm/mach-shmobile/board-genmai.c b/arch/arm/mach-shmobile/board-genmai.c
index 3e92e3c62d4c..c4064610e223 100644
--- a/arch/arm/mach-shmobile/board-genmai.c
+++ b/arch/arm/mach-shmobile/board-genmai.c
@@ -20,15 +20,59 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
+#include <linux/spi/rspi.h>
+#include <linux/spi/spi.h>
#include <mach/common.h>
+#include <mach/irqs.h>
#include <mach/r7s72100.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+/* RSPI */
+#define RSPI_RESOURCE(idx, baseaddr, irq) \
+static const struct resource rspi##idx##_resources[] __initconst = { \
+ DEFINE_RES_MEM(baseaddr, 0x24), \
+ DEFINE_RES_IRQ_NAMED(irq, "error"), \
+ DEFINE_RES_IRQ_NAMED(irq + 1, "rx"), \
+ DEFINE_RES_IRQ_NAMED(irq + 2, "tx"), \
+}
+
+RSPI_RESOURCE(0, 0xe800c800, gic_iid(270));
+RSPI_RESOURCE(1, 0xe800d000, gic_iid(273));
+RSPI_RESOURCE(2, 0xe800d800, gic_iid(276));
+RSPI_RESOURCE(3, 0xe800e000, gic_iid(279));
+RSPI_RESOURCE(4, 0xe800e800, gic_iid(282));
+
+static const struct rspi_plat_data rspi_pdata __initconst = {
+ .num_chipselect = 1,
+};
+
+#define r7s72100_register_rspi(idx) \
+ platform_device_register_resndata(&platform_bus, "rspi-rz", idx, \
+ rspi##idx##_resources, \
+ ARRAY_SIZE(rspi##idx##_resources), \
+ &rspi_pdata, sizeof(rspi_pdata))
+
+static const struct spi_board_info spi_info[] __initconst = {
+ {
+ .modalias = "wm8978",
+ .max_speed_hz = 5000000,
+ .bus_num = 4,
+ .chip_select = 0,
+ },
+};
+
static void __init genmai_add_standard_devices(void)
{
r7s72100_clock_init();
r7s72100_add_dt_devices();
+
+ r7s72100_register_rspi(0);
+ r7s72100_register_rspi(1);
+ r7s72100_register_rspi(2);
+ r7s72100_register_rspi(3);
+ r7s72100_register_rspi(4);
+ spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
}
static const char * const genmai_boards_compat_dt[] __initconst = {
--
1.7.9.5
^ permalink raw reply related
* [PATCH v5 01/11] ARM: shmobile: r7s72100 clock: Add RSPI clocks
From: Geert Uytterhoeven @ 2014-02-04 15:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391527445-14881-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
---
v5:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v4:
- The platform device basename was changed from "rspi" to "rspi-rz"
v3:
- No changes
v2:
- Correct platform device names ("rspi%u" -> "rspi.%u")
arch/arm/mach-shmobile/clock-r7s72100.c | 21 ++++++++++++++++++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index dd8ce87596de..ffb0fff41375 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -22,12 +22,14 @@
#include <mach/common.h>
#include <mach/r7s72100.h>
-/* registers */
+/* Frequency Control Registers */
#define FRQCR 0xfcfe0010
#define FRQCR2 0xfcfe0014
+/* Standby Control Registers */
#define STBCR3 0xfcfe0420
#define STBCR4 0xfcfe0424
#define STBCR9 0xfcfe0438
+#define STBCR10 0xfcfe043c
#define PLL_RATE 30
@@ -145,11 +147,19 @@ struct clk div4_clks[DIV4_NR] = {
| CLK_ENABLE_ON_INIT),
};
-enum { MSTP97, MSTP96, MSTP95, MSTP94,
+enum {
+ MSTP107, MSTP106, MSTP105, MSTP104, MSTP103,
+ MSTP97, MSTP96, MSTP95, MSTP94,
MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
- MSTP33, MSTP_NR };
+ MSTP33, MSTP_NR
+};
static struct clk mstp_clks[MSTP_NR] = {
+ [MSTP107] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 7, 0), /* RSPI0 */
+ [MSTP106] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 6, 0), /* RSPI1 */
+ [MSTP105] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 5, 0), /* RSPI2 */
+ [MSTP104] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 4, 0), /* RSPI3 */
+ [MSTP103] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 3, 0), /* RSPI4 */
[MSTP97] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 7, 0), /* RIIC0 */
[MSTP96] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 6, 0), /* RIIC1 */
[MSTP95] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 5, 0), /* RIIC2 */
@@ -176,6 +186,11 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
/* MSTP clocks */
+ CLKDEV_DEV_ID("rspi-rz.0", &mstp_clks[MSTP107]),
+ CLKDEV_DEV_ID("rspi-rz.1", &mstp_clks[MSTP106]),
+ CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
+ CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
+ CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
--
1.7.9.5
^ permalink raw reply related
* [PATCH 00/11] ARM: shmobile: RSPI RZ and QSPI SoC and board integration
From: Geert Uytterhoeven @ 2014-02-04 15:23 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon, Magnus,
This patch series contains SoC and board integration for
1. RSPI in the r7s72100 aka RZ/A1H SoC on the Genmai reference board,
2. QSPI in the r8a7791 aka R-Car M2 SoC on the Koelsch reference board.
It was rebased on top of renesas-devel-v3.14-rc1-20140204.
It was tested on the r7s72100-based Genmai reference board using loopback
mode, and on the r8a7791-based Koelsch reference board using the Spansion
s25fl512s SPI FLASH.
- [v5 01/11] ARM: shmobile: r7s72100 clock: Add RSPI clocks
- [v5 02/11] ARM: shmobile: genmai legacy: Add RSPI support
- [v3 03/11] ARM: shmobile: genmai defconfig: Enable RSPI
- [v3 04/11] ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
- [v5 05/11] ARM: shmobile: r7s72100 dtsi: Add RSPI nodes
- [v4 06/11] ARM: shmobile: r8a7791 clock: add QSPI clocks
- [v4 07/11] ARM: shmobile: koelsch legacy: Add QSPI support
- [v4 08/11] ARM: shmobile: koelsch defconfig: Enable RSPI and
- [v3 09/11] ARM: shmobile: r8a7791 dtsi: Add QSPI node
- [v3 10/11] ARM: shmobile: koelsch dts: Add QSPI nodes
- [v2 11/11] ARM: shmobile: lager legacy: Switch QSPI to named IRQs
All of these should be safe to apply, without compile-time or run-time
dependencies on other parts.
Actual functioning for some parts may depend on RSPI work queued up for
3.15 in the spi tree.
Compared to previous submission, the following have been postponed:
- [v4 03/15] [WIP] ARM: shmobile: genmai legacy: Add preliminary RSPI
pinmux setup
This depends on the to-be-written non-DT pinmux configuration for
r7s72100.
- [v4 07/15] ARM: shmobile: genmai reference dts: Add RSPI nodes
This depends on Magnus' "ARM: shmobile: r7s72100 GPIO and PINCTRL device
nodes"
- [v1 14/15] ARM: shmobile: koelsch legacy: Enable Quad SPI transfers for
the SPI FLASH
- [v1 15/15] ARM: shmobile: koelsch dts: Enable Quad SPI transfers
These two depend on the RSPI Dual/Quad work queued up in the spi tree.
After applying the r8a7791/Koelsch patches above, the mainline RSPI/QSPI
driver will work fine. But enabling Quad SPI transfers in board support
code or DT without the corresponding support in the RSPI driver would
cause a regression.
Please apply this series, Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH 3/6] mfd: add bcm59056 pmu driver
From: Lee Jones @ 2014-02-04 15:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140204150156.GC4627@beef>
> > ... then you'll still need this.
>
> Yes, I was far too vague..I'm going to stop explicitly populating the
> data field.
>
> static const struct of_device_id bcm59056_of_match[] = {
> { .compatible = "brcm,bcm59056"},
> { }
> };
+1
> > And I don't think you can drop this, as the I2C subsystem still
> > insists on it.
>
> Agreed. I'm just dropping explicit population of the driver_data field
> here.
>
> static const struct i2c_device_id bcm59056_i2c_id[] = {
> { "bcm59056" },
> { }
> };
+1
> > I think you need to keep this to supply the silly I2C ID table.
> >
> > I would just omit the '.data = (void *) VERSION' from the
> > of_match_table until you require it.
>
> Well, it's not even necessary for I2C ID table. the I2C subsystem is
> happy with just a matching entry on the i2c_device_id name field and
> NULL driver_data. palmas is implemented in this manner.
Guess what? +1 :)
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply
* [PATCH] mmc: omap_hsmmc: Add support for Erratum 2.1.1.128 in device tree boot
From: Nishanth Menon @ 2014-02-04 15:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52F0E098.3050404@ti.com>
On 02/04/2014 06:44 AM, Balaji T K wrote:
> On Tuesday 21 January 2014 04:59 AM, Nishanth Menon wrote:
>> When device is booted using devicetree, platforms impacted by
>> Erratum 2.1.1.128 is not detected easily in the mmc driver. This erratum
>> indicates that the module cannot do multi-block transfers.
>>
>> Handle this by providing a boolean flag to indicate to driver that it is
>> working on a hardware with mentioned limitation.
>>
>> Signed-off-by: Nishanth Menon <nm@ti.com>
>> ---
>>
>> This explains the logs I see:
>> OMAP3430 LDP (ES2.2):
>> uImage only boot: http://slexy.org/raw/s2YrbMAi7c
>> uImage+dtb concatenated boot: http://slexy.org/raw/s20qVg17T0
>>
>> With the following flag set, device is now able to consistently boot with
>> device tree supported uImage+dtb concat boot.
>>
>> .../devicetree/bindings/mmc/ti-omap-hsmmc.txt | 2 ++
>> drivers/mmc/host/omap_hsmmc.c | 3 +++
>> 2 files changed, 5 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> index 8c8908a..ab36f8b 100644
>> --- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> +++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> @@ -26,6 +26,8 @@ specifier is required.
>> dma-names: List of DMA request names. These strings correspond
>> 1:1 with the DMA specifiers listed in dmas. The string naming is
>> to be "rx" and "tx" for RX and TX DMA requests, respectively.
>> +ti,erratum-2.1.1.128: boolean, for OMAP3430/OMAP35xx platforms with broken
>> +multiblock reads
>
> Rather than ti,errata.. specific property, something like
> caps no/disable multiblock read is more readable in my opinion, Otherwise
Is'nt the better definition to state i have quirk X and allow the
driver to do the necessary thing/things needed to handle quirk X? in
this case, there is just one thing to do: broken multi_block_read, in
the case of other quirks, there might be more than 1 thing to do.. let
driver figure that out, dts just states the h/w capabilty or in this
case, the quirk capability.
>
> Acked-by: Balaji T K <balajitk@ti.com>
>
>>
>> Examples:
>>
>> diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
>> index 014bfe5..f2d5940 100644
>> --- a/drivers/mmc/host/omap_hsmmc.c
>> +++ b/drivers/mmc/host/omap_hsmmc.c
>> @@ -1730,6 +1730,9 @@ static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev)
>> if (of_find_property(np, "ti,dual-volt", NULL))
>> pdata->controller_flags |= OMAP_HSMMC_SUPPORTS_DUAL_VOLT;
>>
>> + if (of_find_property(np, "ti,erratum-2.1.1.128", NULL))
>> + pdata->controller_flags |= OMAP_HSMMC_BROKEN_MULTIBLOCK_READ;
>> +
>> /* This driver only supports 1 slot */
>> pdata->nr_slots = 1;
>> pdata->slots[0].switch_pin = cd_gpio;
>>
>
--
Regards,
Nishanth Menon
^ permalink raw reply
* [PATCH] ARM: dts: omap3-ldp: fix mmc configuration
From: Nishanth Menon @ 2014-02-04 15:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52F0E109.30801@ti.com>
On 02/04/2014 06:46 AM, Balaji T K wrote:
> On Tuesday 21 January 2014 05:04 AM, Nishanth Menon wrote:
>> MMC1 is the only MMC interface available on the platform. Further,
>> since the platform is based on older revision of SoC which is not
>> capable of doing multi-block writes, mark it so and add pinmux
>
> s/writes/read
arrgh.. yes.
>
> Thanks and Regards,
> Balaji T K
>
>> to ensure that all relevant pins are configured for non-MMC boot
>> mode.
>>
>> Signed-off-by: Nishanth Menon <nm@ti.com>
>> ---
>> ti,erratum-2.1.1.128 introduced in https://patchwork.kernel.org/patch/3514851/
>> hence depends on the same.
>> arch/arm/boot/dts/omap3-ldp.dts | 22 ++++++++++++++++++++++
>> 1 file changed, 22 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts
>> index ddce0d8..bc0cc66 100644
>> --- a/arch/arm/boot/dts/omap3-ldp.dts
>> +++ b/arch/arm/boot/dts/omap3-ldp.dts
>> @@ -176,6 +176,17 @@
>> &mmc1 {
>> vmmc-supply = <&vmmc1>;
>> bus-width = <4>;
>> + ti,erratum-2.1.1.128;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&mmc1_pins>;
>> +};
>> +
>> +&mmc2 {
>> + status="disabled";
>> +};
>> +
>> +&mmc3 {
>> + status="disabled";
>> };
>>
>> &omap3_pmx_core {
>> @@ -209,6 +220,17 @@
>> 0x174 (PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
>> >;
>> };
>> +
>> + mmc1_pins: pinmux_mmc1_pins {
>> + pinctrl-single,pins = <
>> + OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.mmc1_clk */
>> + OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */
>> + OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.mmc1_dat0 */
>> + OMAP3_CORE1_IOPAD(0x214A, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.mmc1_dat1 */
>> + OMAP3_CORE1_IOPAD(0x214C, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.mmc1_dat2 */
>> + OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */
>> + >;
>> + };
>> };
>>
>> &usb_otg_hs {
>>
>
--
Regards,
Nishanth Menon
^ permalink raw reply
* [PATCH 1/2] PM / OPP: Add support for 'boost' mode OPP
From: Nishanth Menon @ 2014-02-04 15:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391506890-7335-2-git-send-email-thomas.ab@samsung.com>
On 02/04/2014 03:41 AM, Thomas Abraham wrote:
> From: Thomas Abraham <thomas.ab@samsung.com>
>
> Commit 6f19efc0 ("cpufreq: Add boost frequency support in core") adds
> support for CPU boost mode. This patch adds support for finding available
> boost OPPs from device tree and marking them as usable in boost mode.
>
> Cc: Nishanth Menon <nm@ti.com>
> Cc: Lukasz Majewski <l.majewski@samsung.com>
> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
> ---
Why is a cpufreq feature being pushed on to OPP library? you can very
well have a property boot-frequencies = < a b c > and be done with the
job.
I agree with Rob's comment that this is something we have to discuss
in wider "add features to an OPP" discussion[1].
[1] http://marc.info/?t=139108946400001&r=1&w=2
> drivers/base/power/opp.c | 69 +++++++++++++++++++++++++++++++++++++---------
> 1 file changed, 56 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/base/power/opp.c b/drivers/base/power/opp.c
> index 2553867..de4d52d 100644
> --- a/drivers/base/power/opp.c
> +++ b/drivers/base/power/opp.c
> @@ -62,6 +62,7 @@ struct dev_pm_opp {
> struct list_head node;
>
> bool available;
> + bool boost;
> unsigned long rate;
> unsigned long u_volt;
>
> @@ -380,10 +381,12 @@ struct dev_pm_opp *dev_pm_opp_find_freq_floor(struct device *dev,
> EXPORT_SYMBOL_GPL(dev_pm_opp_find_freq_floor);
>
> /**
> - * dev_pm_opp_add() - Add an OPP table from a table definitions
> + * dev_pm_opp_add_flags() - Add an OPP to device OPP list with flags
> * @dev: device for which we do this operation
> * @freq: Frequency in Hz for this OPP
> * @u_volt: Voltage in uVolts for this OPP
> + * @available: initial availability of the OPP with adding it to the list.
> + * @boost: availability of this opp in controller's boost operating mode.
> *
> * This function adds an opp definition to the opp list and returns status.
> * The opp is made available by default and it can be controlled using
> @@ -395,7 +398,8 @@ EXPORT_SYMBOL_GPL(dev_pm_opp_find_freq_floor);
> * that this function is *NOT* called under RCU protection or in contexts where
> * mutex cannot be locked.
> */
> -int dev_pm_opp_add(struct device *dev, unsigned long freq, unsigned long u_volt)
> +static int dev_pm_opp_add_flags(struct device *dev, unsigned long freq,
> + unsigned long u_volt, bool available, bool boost)
> {
> struct device_opp *dev_opp = NULL;
> struct dev_pm_opp *opp, *new_opp;
> @@ -441,7 +445,8 @@ int dev_pm_opp_add(struct device *dev, unsigned long freq, unsigned long u_volt)
> new_opp->dev_opp = dev_opp;
> new_opp->rate = freq;
> new_opp->u_volt = u_volt;
> - new_opp->available = true;
> + new_opp->available = available;
> + new_opp->boost = boost;
>
> /* Insert new OPP in order of increasing frequency */
> head = &dev_opp->opp_list;
> @@ -462,6 +467,27 @@ int dev_pm_opp_add(struct device *dev, unsigned long freq, unsigned long u_volt)
> srcu_notifier_call_chain(&dev_opp->head, OPP_EVENT_ADD, new_opp);
> return 0;
> }
> +
> +/**
> + * dev_pm_opp_add() - Add an OPP table from a table definitions
> + * @dev: device for which we do this operation
> + * @freq: Frequency in Hz for this OPP
> + * @u_volt: Voltage in uVolts for this OPP
> + *
> + * This function adds an opp definition to the opp list and returns status.
> + * The opp is made available by default and it can be controlled using
> + * dev_pm_opp_enable/disable functions.
> + *
> + * Locking: The internal device_opp and opp structures are RCU protected.
> + * Hence this function internally uses RCU updater strategy with mutex locks
> + * to keep the integrity of the internal data structures. Callers should ensure
> + * that this function is *NOT* called under RCU protection or in contexts where
> + * mutex cannot be locked.
> + */
> +int dev_pm_opp_add(struct device *dev, unsigned long freq, unsigned long u_volt)
> +{
> + return dev_pm_opp_add_flags(dev, freq, u_volt, true, false);
> +}
> EXPORT_SYMBOL_GPL(dev_pm_opp_add);
>
> /**
> @@ -651,7 +677,8 @@ int dev_pm_opp_init_cpufreq_table(struct device *dev,
>
> list_for_each_entry(opp, &dev_opp->opp_list, node) {
> if (opp->available) {
> - freq_table[i].driver_data = i;
> + freq_table[i].driver_data =
> + opp->boost ? CPUFREQ_BOOST_FREQ : i;
> freq_table[i].frequency = opp->rate / 1000;
> i++;
> }
> @@ -701,19 +728,14 @@ struct srcu_notifier_head *dev_pm_opp_get_notifier(struct device *dev)
> }
>
> #ifdef CONFIG_OF
> -/**
> - * of_init_opp_table() - Initialize opp table from device tree
> - * @dev: device pointer used to lookup device OPPs.
> - *
> - * Register the initial OPP table with the OPP library for given device.
> - */
> -int of_init_opp_table(struct device *dev)
> +static int of_parse_opp_table(struct device *dev, const char *prop_name,
> + bool boost)
> {
> const struct property *prop;
> const __be32 *val;
> int nr;
>
> - prop = of_find_property(dev->of_node, "operating-points", NULL);
> + prop = of_find_property(dev->of_node, prop_name, NULL);
> if (!prop)
> return -ENODEV;
> if (!prop->value)
> @@ -734,7 +756,7 @@ int of_init_opp_table(struct device *dev)
> unsigned long freq = be32_to_cpup(val++) * 1000;
> unsigned long volt = be32_to_cpup(val++);
>
> - if (dev_pm_opp_add(dev, freq, volt)) {
> + if (dev_pm_opp_add_flags(dev, freq, volt, true, boost)) {
> dev_warn(dev, "%s: Failed to add OPP %ld\n",
> __func__, freq);
> continue;
> @@ -744,5 +766,26 @@ int of_init_opp_table(struct device *dev)
>
> return 0;
> }
> +
> +/**
> + * of_init_opp_table() - Initialize opp table from device tree
> + * @dev: device pointer used to lookup device OPPs.
> + *
> + * Register the initial OPP table with the OPP library for given device.
> + * Additional "boost" operating points of the controller, if any, are
> + * specified with "boost-opp" property.
> + */
> +int of_init_opp_table(struct device *dev)
> +{
> + int ret;
> +
> + ret = of_parse_opp_table(dev, "operating-points", false);
> + if (!ret) {
> + ret = of_parse_opp_table(dev, "boost-opp", true);
> + if (ret == -ENODEV)
> + ret = 0;
> + }
> + return ret;
> +}
> EXPORT_SYMBOL_GPL(of_init_opp_table);
> #endif
>
--
Regards,
Nishanth Menon
^ permalink raw reply
* [Xen-devel] [PATCH v9 0/5] xen/arm/arm64: CONFIG_PARAVIRT and stolen ticks accounting
From: Konrad Rzeszutek Wilk @ 2014-02-04 15:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.DEB.2.02.1401091755390.21510@kaball.uk.xensource.com>
On Thu, Jan 09, 2014 at 06:15:07PM +0000, Stefano Stabellini wrote:
> Hi all,
> this patch series introduces stolen ticks accounting for Xen on ARM and
> ARM64.
> Stolen ticks are clocksource ticks that have been "stolen" from the cpu,
> typically because Linux is running in a virtual machine and the vcpu has
> been descheduled.
> To account for these ticks we introduce CONFIG_PARAVIRT and pv_time_ops
> so that we can make use of:
>
> kernel/sched/cputime.c:steal_account_process_tick
>
>
> Changes in v9:
> - added back missing new files from patches;
> - fix compilation on avr32 (remove patch #5, revert to previous version
> of patch #2).
>
>
>
> Stefano Stabellini (5):
> xen: move xen_setup_runstate_info and get_runstate_snapshot to drivers/xen/time.c
> kernel: missing include in cputime.c
> arm: introduce CONFIG_PARAVIRT, PARAVIRT_TIME_ACCOUNTING and pv_time_ops
> arm64: introduce CONFIG_PARAVIRT, PARAVIRT_TIME_ACCOUNTING and pv_time_ops
> xen/arm: account for stolen ticks
>
> arch/arm/Kconfig | 20 ++++++++
> arch/arm/include/asm/paravirt.h | 20 ++++++++
> arch/arm/kernel/Makefile | 2 +
> arch/arm/kernel/paravirt.c | 25 ++++++++++
> arch/arm/xen/enlighten.c | 21 +++++++++
> arch/arm64/Kconfig | 20 ++++++++
> arch/arm64/include/asm/paravirt.h | 20 ++++++++
> arch/arm64/kernel/Makefile | 1 +
> arch/arm64/kernel/paravirt.c | 25 ++++++++++
> arch/ia64/xen/time.c | 48 +++----------------
> arch/x86/xen/time.c | 76 +------------------------------
> drivers/xen/Makefile | 2 +-
> drivers/xen/time.c | 91 +++++++++++++++++++++++++++++++++++++
> include/xen/xen-ops.h | 5 ++
> kernel/sched/cputime.c | 3 ++
> 15 files changed, 261 insertions(+), 118 deletions(-)
> create mode 100644 arch/arm/include/asm/paravirt.h
> create mode 100644 arch/arm/kernel/paravirt.c
> create mode 100644 arch/arm64/include/asm/paravirt.h
> create mode 100644 arch/arm64/kernel/paravirt.c
> create mode 100644 drivers/xen/time.c
>
>
> git://git.kernel.org/pub/scm/linux/kernel/git/sstabellini/xen.git lost_ticks_9
I tried to merge it on top of 3.14-rc1 + stable/for-linus-3.14 (which
has the revert of " xen/grant-table: Avoid m2p_override during mapping"
And I get:
konrad at phenom:~/linux$ git merge stefano/lost_ticks_9
Auto-merging drivers/xen/Makefile
CONFLICT (content): Merge conflict in drivers/xen/Makefile
Auto-merging arch/x86/xen/time.c
CONFLICT (modify/delete): arch/ia64/xen/time.c deleted in HEAD and
modified in stefano/lost_ticks_9. Version stefano/lost_ticks_9 of
arch/ia64/xen/time.c left in tree.
Auto-merging arch/arm64/kernel/Makefile
CONFLICT (content): Merge conflict in arch/arm64/kernel/Makefile
Auto-merging arch/arm64/Kconfig
Auto-merging arch/arm/xen/enlighten.c
CONFLICT (content): Merge conflict in arch/arm/xen/enlighten.c
Auto-merging arch/arm/Kconfig
CONFLICT (content): Merge conflict in arch/arm/Kconfig
Automatic merge failed; fix conflicts and then commit the result.
I presume that is mostly due to David's FIFO queue patches.
Could you kindly rebase it on top 3.14-rc1 and also tack on
Catalin Marinas Ack on the patches?
Thank you!
>
>
> Cheers,
>
> Stefano
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel at lists.xen.org
> http://lists.xen.org/xen-devel
^ permalink raw reply
* [PATCH 3/6] mfd: add bcm59056 pmu driver
From: Matt Porter @ 2014-02-04 15:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140204144731.GA3154@lee--X1>
On Tue, Feb 04, 2014 at 02:47:31PM +0000, Lee Jones wrote:
> Hold your horses. :)
Holding :)
> > > > Add a driver for the BCM59056 PMU multi-function device. The driver
> > > > initially supports regmap initialization and instantiation of the
> > > > voltage regulator device function of the PMU.
> > > >
> > > > Signed-off-by: Matt Porter <mporter@linaro.org>
> > > > Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
> > > > Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
> > > > ---
> > > > drivers/mfd/Kconfig | 8 +++
> > > > drivers/mfd/Makefile | 1 +
> > > > drivers/mfd/bcm59056.c | 119 +++++++++++++++++++++++++++++++++++++++++++
> > > > include/linux/mfd/bcm59056.h | 35 +++++++++++++
> > > > 4 files changed, 163 insertions(+)
> > > > create mode 100644 drivers/mfd/bcm59056.c
> > > > create mode 100644 include/linux/mfd/bcm59056.h
>
> <snip>
>
> > > I thought this was a DT only driver? If so, you probably want to use
> > > of_match_device() instead.
> >
> > Correct, I'll use of_match_device()
>
> If you're going to use this ...
>
> <snip>
>
> > > You've gone to the trouble of setting a device version here, but you
> > > don't seem to use it?
> >
> > I'll drop the device version
>
> ... then you'll still need this.
Yes, I was far too vague..I'm going to stop explicitly populating the
data field.
static const struct of_device_id bcm59056_of_match[] = {
{ .compatible = "brcm,bcm59056"},
{ }
};
> > > > +static const struct i2c_device_id bcm59056_i2c_id[] = {
> > > > + { "bcm59056", BCM59056 },
> > > > + { }
> > > > +};
> > >
> > > Ah, I guess this is where id->driver comes from.
> > >
> > > It's pretty silly that the I2C subsystem demands the presence of this
> > > table, despite not using it if an of_device_id table is present.
> >
> > It does make it very difficult to follow DT enabled I2C client drivers
> > :( I'll drop the BCM59056 too.
>
> And I don't think you can drop this, as the I2C subsystem still
> insists on it.
Agreed. I'm just dropping explicit population of the driver_data field
here.
static const struct i2c_device_id bcm59056_i2c_id[] = {
{ "bcm59056" },
{ }
};
>
> > > > +/* chip id */
> > > > +#define BCM59056 0
> > >
> > > Lonely, oh so lonely!
> >
> > Understood. Will remove.
>
> I think you need to keep this to supply the silly I2C ID table.
>
> I would just omit the '.data = (void *) VERSION' from the
> of_match_table until you require it.
Well, it's not even necessary for I2C ID table. the I2C subsystem is
happy with just a matching entry on the i2c_device_id name field and
NULL driver_data. palmas is implemented in this manner.
-Matt
^ permalink raw reply
* [PATCH 3/3] ARM: dts: imx27-phytec-phycard-s-rdk: Add pinctrl definitions for SDHC2
From: Alexander Shiyan @ 2014-02-04 14:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391525972-15810-1-git-send-email-shc_work@mail.ru>
This patch adds pinctrl definitions for SDHC2 for Phytec PCA100 RDK board.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
index 04cadfc..1cd3a87 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
@@ -88,6 +88,18 @@
>;
};
+ pinctrl_sdhc2: sdhc2grp {
+ fsl,pins = <
+ MX27_PAD_SD2_CLK__SD2_CLK 0x0
+ MX27_PAD_SD2_CMD__SD2_CMD 0x0
+ MX27_PAD_SD2_D0__SD2_D0 0x0
+ MX27_PAD_SD2_D1__SD2_D1 0x0
+ MX27_PAD_SD2_D2__SD2_D2 0x0
+ MX27_PAD_SD2_D3__SD2_D3 0x0
+ MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX27_PAD_UART1_TXD__UART1_TXD 0x0
@@ -124,6 +136,8 @@
};
&sdhci2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdhc2>;
cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
status = "okay";
};
--
1.8.3.2
^ permalink raw reply related
* [PATCH 2/3] ARM: dts: imx27-phytec-phycard-s-som: Add NFC node
From: Alexander Shiyan @ 2014-02-04 14:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391525972-15810-1-git-send-email-shc_work@mail.ru>
This patch adds the NFC devicetree node for Phytec PCA100 module.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
index a28b6c7..1b62480 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
@@ -78,5 +78,26 @@
MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
>;
};
+
+ pinctrl_nfc: nfcgrp {
+ fsl,pins = <
+ MX27_PAD_NFRB__NFRB 0x0
+ MX27_PAD_NFCLE__NFCLE 0x0
+ MX27_PAD_NFWP_B__NFWP_B 0x0
+ MX27_PAD_NFCE_B__NFCE_B 0x0
+ MX27_PAD_NFALE__NFALE 0x0
+ MX27_PAD_NFRE_B__NFRE_B 0x0
+ MX27_PAD_NFWE_B__NFWE_B 0x0
+ >;
+ };
};
};
+
+&nfc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_nfc>;
+ nand-bus-width = <8>;
+ nand-ecc-mode = "hw";
+ nand-on-flash-bbt;
+ status = "okay";
+};
--
1.8.3.2
^ permalink raw reply related
* [PATCH 1/3] ARM: dts: imx27-phytec-phycard-s-som: Sort entries
From: Alexander Shiyan @ 2014-02-04 14:59 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts | 36 ++++++++++++------------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
index e51e550..a28b6c7 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
@@ -29,6 +29,24 @@
status = "okay";
};
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec1>;
+ status = "okay";
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+
+ at24 at 52 {
+ compatible = "at,24c32";
+ pagesize = <32>;
+ reg = <0x52>;
+ };
+};
+
&iomuxc {
imx27-phycard-s-som {
pinctrl_fec1: fec1grp {
@@ -62,21 +80,3 @@
};
};
};
-
-&fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_fec1>;
- status = "okay";
-};
-
-&i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c2>;
- status = "okay";
-
- at24 at 52 {
- compatible = "at,24c32";
- pagesize = <32>;
- reg = <0x52>;
- };
-};
--
1.8.3.2
^ permalink raw reply related
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