* [PATCH 10/21] ARM: MM: Add DT binding for Feroceon L2 cache
From: Jason Gunthorpe @ 2014-02-07 0:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-11-git-send-email-andrew@lunn.ch>
On Fri, Feb 07, 2014 at 12:42:06AM +0100, Andrew Lunn wrote:
> +#define L2_WRITETHROUGH_KIRKWOOD 0x00000010
BIT(x)?
> +#ifdef CONFIG_OF
> +static const struct of_device_id feroceon_ids[] __initconst = {
> + { .compatible = "marvell,feroceon-kirkwood"},
> + {}
> +}
How about following the naming convention from l2x0:
"marvell,kirkwood-cache"
"marvell,feroceon-cache"
> + if (writethrough) {
> + writel(readl(base) | L2_WRITETHROUGH_KIRKWOOD, base);
> + feroceon_l2_init(1);
> + } else {
> + writel(readl(base) & ~L2_WRITETHROUGH_KIRKWOOD, base);
> + feroceon_l2_init(0);
This should only happen for "marvell,kirkwood-cache" - it is very
kirkwood specific.. Someday mv78xx0 will have a different bit of code.
Maybe pass -1 to feroceon_l2_init and don't print the writethrough
type at all for the "marvell,feroceon-cache" case?
Regards,
Jason
^ permalink raw reply
* [PATCH 02/03] pinctrl: sh-pfc: r8a7790: Break out USB0 OVC/VBUS
From: Laurent Pinchart @ 2014-02-07 0:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140207001541.GF19799@verge.net.au>
Hi Simon,
On Friday 07 February 2014 09:15:44 Simon Horman wrote:
> On Thu, Feb 06, 2014 at 10:34:27PM +0900, Magnus Damm wrote:
> > On Thu, Feb 6, 2014 at 8:01 PM, Laurent Pinchart wrote:
> > > On Friday 31 January 2014 12:10:05 Magnus Damm wrote:
> > >> On Fri, Jan 31, 2014 at 10:17 AM, Laurent Pinchart wrote:
> > >> > On Thursday 30 January 2014 08:10:19 Magnus Damm wrote:
> > >> >> From: Magnus Damm <damm@opensource.se>
> > >> >>
> > >> >> Create a new group for the USB0 OVC/VBUS pin by itself. This
> > >> >> allows us to monitor PWEN as GPIO on the Lager board.
> > >> >>
> > >> >> Signed-off-by: Magnus Damm <damm@opensource.se>
[snip]
> > >
> > > Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> >
> > Thanks,
>
> Thanks Magnus.
>
> Laurent, with that in mind could you pick up this patch?
I was thinking about letting Linus pick up the PFC patches again now that the
flood is over. Of course, if it can help, I can still pick the patches up and
submit pull requests to Linus.
Linus, what's your opinion on this ? Would you rather pick the patches
directly after I've acked them, or process pull requests ?
--
Regards,
Laurent Pinchart
^ permalink raw reply
* [PATCH] ARM: shmobile: r8a7790: Correct SYS DMAC clock defines
From: Simon Horman @ 2014-02-07 0:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1910899.86Rh9nDz51@avalon>
On Thu, Feb 06, 2014 at 11:28:52AM +0100, Laurent Pinchart wrote:
> Hi Simon,
>
> Thank you for the patch.
>
> On Thursday 06 February 2014 09:25:01 Simon Horman wrote:
> > This brings the implementation into line with the documentation.
> >
> > This problem was introduced when SYS DMAC clock defines were added by
> > ac991dce6498b5fc ("ARM: shmobile: r8a7790: Add clock index macros for DT
> > sources") in v3.13-rc2. I do not believe this results in any problems as
> > these defines do not appear to be used anywhere yet.
> >
> > Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Thanks, I have queued this up.
^ permalink raw reply
* [PATCH v8 1/2] ARM: shmobile: r7s72100: Add clock for r7s72100-ether
From: Simon Horman @ 2014-02-07 0:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391675773-5430-2-git-send-email-horms+renesas@verge.net.au>
On Thu, Feb 06, 2014 at 05:36:12PM +0900, Simon Horman wrote:
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
I have queued this up.
^ permalink raw reply
* [PATCH v8 2/2] ARM: shmobile: genmai: Enable r7s72100-ether
From: Simon Horman @ 2014-02-07 0:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391675773-5430-3-git-send-email-horms+renesas@verge.net.au>
On Thu, Feb 06, 2014 at 05:36:13PM +0900, Simon Horman wrote:
> Signed-off-by: Simon Horman <horms@verge.net.au>
> Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
I have queued this up.
^ permalink raw reply
* [PATCH 02/03] pinctrl: sh-pfc: r8a7790: Break out USB0 OVC/VBUS
From: Simon Horman @ 2014-02-07 0:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CANqRtoTQF56e-zRGr0+wpE3Yxd2u-HtTfSD=-QMiKBxZ40nAKQ@mail.gmail.com>
On Thu, Feb 06, 2014 at 10:34:27PM +0900, Magnus Damm wrote:
> Hi Laurent,
>
> On Thu, Feb 6, 2014 at 8:01 PM, Laurent Pinchart
> <laurent.pinchart@ideasonboard.com> wrote:
> > Hi Magnus,
> >
> > On Friday 31 January 2014 12:10:05 Magnus Damm wrote:
> >> On Fri, Jan 31, 2014 at 10:17 AM, Laurent Pinchart wrote:
> >> > On Thursday 30 January 2014 08:10:19 Magnus Damm wrote:
> >> >> From: Magnus Damm <damm@opensource.se>
> >> >>
> >> >> Create a new group for the USB0 OVC/VBUS pin by itself. This
> >> >> allows us to monitor PWEN as GPIO on the Lager board.
> >> >>
> >> >> Signed-off-by: Magnus Damm <damm@opensource.se>
> >> >> ---
> >> >>
> >> >> drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 9 +++++++++
> >> >> 1 file changed, 9 insertions(+)
> >> >>
> >> >> --- 0001/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> >> >> +++ work/drivers/pinctrl/sh-pfc/pfc-r8a7790.c 2014-01-24
> >> > 10:23:32.000000000
> >> >> +0900 @@ -3231,6 +3231,13 @@ static const unsigned int usb0_pins[] =
> >> >> static const unsigned int usb0_mux[] = {
> >> >> USB0_PWEN_MARK, USB0_OVC_VBUS_MARK,
> >> >> };
> >> >> +static const unsigned int usb0_ovc_vbus_pins[] = {
> >> >> + /* OVC/VBUS */
> >> >> + RCAR_GP_PIN(5, 19),
> >> >> +};
> >> >> +static const unsigned int usb0_ovc_vbus_mux[] = {
> >> >> + USB0_OVC_VBUS_MARK,
> >> >> +};
> >> >
> >> > Another option would have been to split the existing usb0 group in
> >> > usb0_pwen and usb0_ovc. I'm not sure which is better though, I'd just
> >> > like to know if you had given it a thought.
> >>
> >> I actually did just that in my first local attempt, but I decided not
> >> to since it will only cause potential breakage.
> >
> > OK. I assume that using PWEN without OVC/VBUS doesn't make sense, right ?
>
> Correct!
>
> >> > Regardless, what about naming the new group usb0_ovc instead of
> >> > usb0_ovc_bus to keep names short ?
> >>
> >> Is there any particular reason why you want shorter names?
> >
> > When it doesn't reduce clarity I prefer to keep names short, as that makes the
> > code easier to read and write, and (slightly) lowers the memory footprint.
>
> That sounds sane. =)
>
> >> From my side, I prefer to keep the names in sync with the data sheet. In
> >> this particular case it is a shared pin so OVC is used for Host while VBUS
> >> is used for gadget, so if you're proposing to ditch VBUS then this feels
> >> somewhat inconsistent with the current gadget use case. =)
> >
> > I thought the pin was used for over current detection only, but that doesn't
> > make sense for function mode, you're right. Let's keep the name as-is then.
> >
> > Provided PWEN without OVC/VBUS doesn't make sense and won't be needed,
> >
> > Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>
> Thanks,
Thanks Magnus.
Laurent, with that in mind could you pick up this patch?
^ permalink raw reply
* [PATCH v5 02/20] clocksource: orion: Use atomic access for shared registers
From: Daniel Lezcano @ 2014-02-06 23:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140205231903.GA30244@localhost>
On 02/05/2014 11:19 PM, Ezequiel Garcia wrote:
> On Wed, Feb 05, 2014 at 02:10:35PM -0500, Jason Cooper wrote:
>> On Mon, Jan 27, 2014 at 12:27:02PM -0300, Ezequiel Garcia wrote:
>>> Replace the driver-specific thread-safe shared register API
>>> by the recently introduced atomic_io_clear_set().
>>>
>>> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
>>> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
>>> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
>>> ---
>>> drivers/clocksource/time-orion.c | 28 ++++++++++------------------
>>> 1 file changed, 10 insertions(+), 18 deletions(-)
>>
>> The MMIO patch this depends on:
>>
>> c5ca95b507c8 ARM: 7930/1: Introduce atomic MMIO modify
>>
>> made it in to v3.14-rc1. It looks like this change is independent of
>> the rest of the watchdog series, so:
>>
>> Acked-by: Jason Cooper <jason@lakedaemon.net>
>>
>
> Thanks, Jason.
>
> Daniel: If you can pick this I'll drop it from the next watchdog patchset
> submission.
Yep, ok. I am out of the office for the moment, I will take care of it
Monday.
Thanks
-- Daniel
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply
* [PATCH 21/21] ARM: Kirkwood: Remove DT support
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
Now that all the device tree support is in mach-mvebu, remove it from
mach-kirkwood.
Regenerate kirkwood_defconfig, removing all DT support, and a couple
of other redundent options have been removed in the process.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/configs/kirkwood_defconfig | 6 -
arch/arm/mach-kirkwood/Kconfig | 18 ---
arch/arm/mach-kirkwood/Makefile | 2 -
arch/arm/mach-kirkwood/board-dt.c | 227 ------------------------------------
4 files changed, 253 deletions(-)
delete mode 100644 arch/arm/mach-kirkwood/board-dt.c
diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
index 2e762d94e94b..95b5585c1fbb 100644
--- a/arch/arm/configs/kirkwood_defconfig
+++ b/arch/arm/configs/kirkwood_defconfig
@@ -20,13 +20,9 @@ CONFIG_MACH_RD88F6281=y
CONFIG_MACH_T5325=y
CONFIG_MACH_TS219=y
CONFIG_MACH_TS41X=y
-CONFIG_ARCH_KIRKWOOD_DT=y
-CONFIG_MACH_MV88F6281GTW_GE_DT=y
# CONFIG_CPU_FEROCEON_OLD_ID is not set
-CONFIG_PCI_MVEBU=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
CONFIG_HIGHMEM=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
@@ -85,7 +81,6 @@ CONFIG_LEGACY_PTY_COUNT=16
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
# CONFIG_I2C_COMPAT is not set
@@ -176,5 +171,4 @@ CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_DEV_MV_CESA=y
CONFIG_CRC_CCITT=y
-CONFIG_CRC16=y
CONFIG_LIBCRC32C=y
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index df4b26340ae4..fb4560d2605f 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -88,24 +88,6 @@ config MACH_TS41X
QNAP TS-410, TS-410U, TS-419P, TS-419P+ and TS-419U Turbo
NAS devices.
-comment "Device tree entries"
-
-config ARCH_KIRKWOOD_DT
- bool "Marvell Kirkwood Flattened Device Tree"
- select KIRKWOOD_CLK
- select OF_IRQ
- select ORION_IRQCHIP
- select ORION_TIMER
- select POWER_SUPPLY
- select POWER_RESET
- select POWER_RESET_GPIO
- select REGULATOR
- select REGULATOR_FIXED_VOLTAGE
- select USE_OF
- help
- Say 'Y' here if you want your kernel to support the
- Marvell Kirkwood using flattened device tree.
-
endmenu
endif
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index 3a72c5c6e747..c772d7584937 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -10,5 +10,3 @@ obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o
obj-$(CONFIG_MACH_T5325) += t5325-setup.o
obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o
obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o
-
-obj-$(CONFIG_ARCH_KIRKWOOD_DT) += board-dt.o
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
deleted file mode 100644
index 2ef59ee2182d..000000000000
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ /dev/null
@@ -1,227 +0,0 @@
-/*
- * Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net>
- *
- * arch/arm/mach-kirkwood/board-dt.c
- *
- * Flattened Device Tree board initialization
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/clk.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_net.h>
-#include <linux/of_platform.h>
-#include <linux/dma-mapping.h>
-#include <linux/irqchip.h>
-#include <linux/kexec.h>
-#include <asm/hardware/cache-feroceon-l2.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <mach/bridge-regs.h>
-#include <plat/common.h>
-#include <plat/pcie.h>
-#include "pm.h"
-
-static struct map_desc kirkwood_io_desc[] __initdata = {
- {
- .virtual = (unsigned long) KIRKWOOD_REGS_VIRT_BASE,
- .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
- .length = KIRKWOOD_REGS_SIZE,
- .type = MT_DEVICE,
- },
-};
-
-static void __init kirkwood_map_io(void)
-{
- iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
-}
-
-static struct resource kirkwood_cpufreq_resources[] = {
- [0] = {
- .start = CPU_CONTROL_PHYS,
- .end = CPU_CONTROL_PHYS + 3,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device kirkwood_cpufreq_device = {
- .name = "kirkwood-cpufreq",
- .id = -1,
- .num_resources = ARRAY_SIZE(kirkwood_cpufreq_resources),
- .resource = kirkwood_cpufreq_resources,
-};
-
-static void __init kirkwood_cpufreq_init(void)
-{
- platform_device_register(&kirkwood_cpufreq_device);
-}
-
-static struct resource kirkwood_cpuidle_resource[] = {
- {
- .flags = IORESOURCE_MEM,
- .start = DDR_OPERATION_BASE,
- .end = DDR_OPERATION_BASE + 3,
- },
-};
-
-static struct platform_device kirkwood_cpuidle = {
- .name = "kirkwood_cpuidle",
- .id = -1,
- .resource = kirkwood_cpuidle_resource,
- .num_resources = 1,
-};
-
-static void __init kirkwood_cpuidle_init(void)
-{
- platform_device_register(&kirkwood_cpuidle);
-}
-
-/* Temporary here since mach-mvebu has a function we can use */
-static void kirkwood_restart(enum reboot_mode mode, const char *cmd)
-{
- /*
- * Enable soft reset to assert RSTOUTn.
- */
- writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
-
- /*
- * Assert soft reset.
- */
- writel(SOFT_RESET, SYSTEM_SOFT_RESET);
-
- while (1)
- ;
-}
-
-#define MV643XX_ETH_MAC_ADDR_LOW 0x0414
-#define MV643XX_ETH_MAC_ADDR_HIGH 0x0418
-
-static void __init kirkwood_dt_eth_fixup(void)
-{
- struct device_node *np;
-
- /*
- * The ethernet interfaces forget the MAC address assigned by u-boot
- * if the clocks are turned off. Usually, u-boot on kirkwood boards
- * has no DT support to properly set local-mac-address property.
- * As a workaround, we get the MAC address from mv643xx_eth registers
- * and update the port device node if no valid MAC address is set.
- */
- for_each_compatible_node(np, NULL, "marvell,kirkwood-eth-port") {
- struct device_node *pnp = of_get_parent(np);
- struct clk *clk;
- struct property *pmac;
- void __iomem *io;
- u8 *macaddr;
- u32 reg;
-
- if (!pnp)
- continue;
-
- /* skip disabled nodes or nodes with valid MAC address*/
- if (!of_device_is_available(pnp) || of_get_mac_address(np))
- goto eth_fixup_skip;
-
- clk = of_clk_get(pnp, 0);
- if (IS_ERR(clk))
- goto eth_fixup_skip;
-
- io = of_iomap(pnp, 0);
- if (!io)
- goto eth_fixup_no_map;
-
- /* ensure port clock is not gated to not hang CPU */
- clk_prepare_enable(clk);
-
- /* store MAC address register contents in local-mac-address */
- pr_err(FW_INFO "%s: local-mac-address is not set\n",
- np->full_name);
-
- pmac = kzalloc(sizeof(*pmac) + 6, GFP_KERNEL);
- if (!pmac)
- goto eth_fixup_no_mem;
-
- pmac->value = pmac + 1;
- pmac->length = 6;
- pmac->name = kstrdup("local-mac-address", GFP_KERNEL);
- if (!pmac->name) {
- kfree(pmac);
- goto eth_fixup_no_mem;
- }
-
- macaddr = pmac->value;
- reg = readl(io + MV643XX_ETH_MAC_ADDR_HIGH);
- macaddr[0] = (reg >> 24) & 0xff;
- macaddr[1] = (reg >> 16) & 0xff;
- macaddr[2] = (reg >> 8) & 0xff;
- macaddr[3] = reg & 0xff;
-
- reg = readl(io + MV643XX_ETH_MAC_ADDR_LOW);
- macaddr[4] = (reg >> 8) & 0xff;
- macaddr[5] = reg & 0xff;
-
- of_update_property(np, pmac);
-
-eth_fixup_no_mem:
- iounmap(io);
- clk_disable_unprepare(clk);
-eth_fixup_no_map:
- clk_put(clk);
-eth_fixup_skip:
- of_node_put(pnp);
- }
-}
-
-/*
- * Disable propagation of mbus errors to the CPU local bus, as this
- * causes mbus errors (which can occur for example for PCI aborts) to
- * throw CPU aborts, which we're not set up to deal with.
- */
-void kirkwood_disable_mbus_error_propagation(void)
-{
- void __iomem *cpu_config;
-
- cpu_config = ioremap(CPU_CONFIG_PHYS, 4);
- writel(readl(cpu_config) & ~CPU_CONFIG_ERROR_PROP, cpu_config);
-}
-
-
-static void __init kirkwood_dt_init(void)
-{
- kirkwood_disable_mbus_error_propagation();
-
- BUG_ON(mvebu_mbus_dt_init());
-
- feroceon_of_init();
-
- kirkwood_cpufreq_init();
- kirkwood_cpuidle_init();
-
- kirkwood_pm_init();
- kirkwood_dt_eth_fixup();
-
-#ifdef CONFIG_KEXEC
- kexec_reinit = kirkwood_enable_pcie;
-#endif
-
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
-
-static const char * const kirkwood_dt_board_compat[] = {
- "marvell,kirkwood",
- NULL
-};
-
-DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)")
- /* Maintainer: Jason Cooper <jason@lakedaemon.net> */
- .map_io = kirkwood_map_io,
- .init_machine = kirkwood_dt_init,
- .restart = kirkwood_restart,
- .dt_compat = kirkwood_dt_board_compat,
-MACHINE_END
--
1.8.5.3
^ permalink raw reply related
* [PATCH 20/21] ARM: MVEBU: Remove unneeded headers
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
Remove headers which are no longer needed, and add a couple of missing
onces.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-mvebu/kirkwood.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c
index 1df0c0b138d5..5d7fef04c36d 100644
--- a/arch/arm/mach-mvebu/kirkwood.c
+++ b/arch/arm/mach-mvebu/kirkwood.c
@@ -13,18 +13,15 @@
#include <linux/clk.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/mbus.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_net.h>
#include <linux/of_platform.h>
-#include <linux/dma-mapping.h>
-#include <linux/irqchip.h>
-#include <linux/kexec.h>
+#include <linux/slab.h>
#include <asm/hardware/cache-feroceon-l2.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <plat/common.h>
-#include <plat/pcie.h>
#include "kirkwood.h"
#include "kirkwood-pm.h"
#include "common.h"
--
1.8.5.3
^ permalink raw reply related
* [PATCH 19/21] ARM: MVEBU: Simplifiy headers and make local
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
kirkwood is very nearly fully DT. Remove most of the address
definitions from the header files and make it a local header file.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-mvebu/include/mach/bridge-regs.h | 85 ---------------
arch/arm/mach-mvebu/include/mach/kirkwood.h | 142 -------------------------
arch/arm/mach-mvebu/kirkwood-pm.c | 2 +-
arch/arm/mach-mvebu/kirkwood.c | 2 +-
arch/arm/mach-mvebu/kirkwood.h | 22 ++++
5 files changed, 24 insertions(+), 229 deletions(-)
delete mode 100644 arch/arm/mach-mvebu/include/mach/bridge-regs.h
delete mode 100644 arch/arm/mach-mvebu/include/mach/kirkwood.h
create mode 100644 arch/arm/mach-mvebu/kirkwood.h
diff --git a/arch/arm/mach-mvebu/include/mach/bridge-regs.h b/arch/arm/mach-mvebu/include/mach/bridge-regs.h
deleted file mode 100644
index 6eb8fea1f76f..000000000000
--- a/arch/arm/mach-mvebu/include/mach/bridge-regs.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * arch/arm/mach-mvebu/include/mach/bridge-regs.h
- *
- * Mbus-L to Mbus Bridge Registers
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_BRIDGE_REGS_H
-#define __ASM_ARCH_BRIDGE_REGS_H
-
-#include <mach/kirkwood.h>
-
-#define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0100)
-#define CPU_CONFIG_PHYS (BRIDGE_PHYS_BASE + 0x0100)
-#define CPU_CONFIG_ERROR_PROP 0x00000004
-
-#define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104)
-#define CPU_CONTROL_PHYS (BRIDGE_PHYS_BASE + 0x0104)
-#define CPU_RESET 0x00000002
-
-#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108)
-#define SOFT_RESET_OUT_EN 0x00000004
-
-#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c)
-#define SOFT_RESET 0x00000001
-
-#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE + 0x0110)
-
-#define BRIDGE_INT_TIMER1_CLR (~0x0004)
-
-#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200)
-#define IRQ_CAUSE_LOW_OFF 0x0000
-#define IRQ_MASK_LOW_OFF 0x0004
-#define IRQ_CAUSE_HIGH_OFF 0x0010
-#define IRQ_MASK_HIGH_OFF 0x0014
-
-#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300)
-#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE + 0x0300)
-
-#define L2_CONFIG_REG (BRIDGE_VIRT_BASE + 0x0128)
-#define L2_WRITETHROUGH 0x00000010
-
-#define CLOCK_GATING_CTRL (BRIDGE_VIRT_BASE + 0x11c)
-#define CGC_BIT_GE0 (0)
-#define CGC_BIT_PEX0 (2)
-#define CGC_BIT_USB0 (3)
-#define CGC_BIT_SDIO (4)
-#define CGC_BIT_TSU (5)
-#define CGC_BIT_DUNIT (6)
-#define CGC_BIT_RUNIT (7)
-#define CGC_BIT_XOR0 (8)
-#define CGC_BIT_AUDIO (9)
-#define CGC_BIT_SATA0 (14)
-#define CGC_BIT_SATA1 (15)
-#define CGC_BIT_XOR1 (16)
-#define CGC_BIT_CRYPTO (17)
-#define CGC_BIT_PEX1 (18)
-#define CGC_BIT_GE1 (19)
-#define CGC_BIT_TDM (20)
-#define CGC_GE0 (1 << 0)
-#define CGC_PEX0 (1 << 2)
-#define CGC_USB0 (1 << 3)
-#define CGC_SDIO (1 << 4)
-#define CGC_TSU (1 << 5)
-#define CGC_DUNIT (1 << 6)
-#define CGC_RUNIT (1 << 7)
-#define CGC_XOR0 (1 << 8)
-#define CGC_AUDIO (1 << 9)
-#define CGC_POWERSAVE (1 << 11)
-#define CGC_SATA0 (1 << 14)
-#define CGC_SATA1 (1 << 15)
-#define CGC_XOR1 (1 << 16)
-#define CGC_CRYPTO (1 << 17)
-#define CGC_PEX1 (1 << 18)
-#define CGC_GE1 (1 << 19)
-#define CGC_TDM (1 << 20)
-#define CGC_RESERVED (0x6 << 21)
-
-#define MEMORY_PM_CTRL (BRIDGE_VIRT_BASE + 0x118)
-#define MEMORY_PM_CTRL_PHYS (BRIDGE_PHYS_BASE + 0x118)
-
-#endif
diff --git a/arch/arm/mach-mvebu/include/mach/kirkwood.h b/arch/arm/mach-mvebu/include/mach/kirkwood.h
deleted file mode 100644
index 9d966dc78d67..000000000000
--- a/arch/arm/mach-mvebu/include/mach/kirkwood.h
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * arch/arm/mach-mvebu/include/mach/kirkwood.h
- *
- * Generic definitions for Marvell Kirkwood SoC flavors:
- * 88F6180, 88F6192 and 88F6281.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_KIRKWOOD_H
-#define __ASM_ARCH_KIRKWOOD_H
-
-/*
- * Marvell Kirkwood address maps.
- *
- * phys
- * e0000000 PCIe #0 Memory space
- * e8000000 PCIe #1 Memory space
- * f1000000 on-chip peripheral registers
- * f2000000 PCIe #0 I/O space
- * f3000000 PCIe #1 I/O space
- * f4000000 NAND controller address window
- * f5000000 Security Accelerator SRAM
- *
- * virt phys size
- * fed00000 f1000000 1M on-chip peripheral registers
- * fee00000 f2000000 1M PCIe #0 I/O space
- * fef00000 f3000000 1M PCIe #1 I/O space
- */
-
-#define KIRKWOOD_SRAM_PHYS_BASE 0xf5000000
-#define KIRKWOOD_SRAM_SIZE SZ_2K
-
-#define KIRKWOOD_NAND_MEM_PHYS_BASE 0xf4000000
-#define KIRKWOOD_NAND_MEM_SIZE SZ_1K
-
-#define KIRKWOOD_PCIE1_IO_PHYS_BASE 0xf3000000
-#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00010000
-#define KIRKWOOD_PCIE1_IO_SIZE SZ_64K
-
-#define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000
-#define KIRKWOOD_PCIE_IO_BUS_BASE 0x00000000
-#define KIRKWOOD_PCIE_IO_SIZE SZ_64K
-
-#define KIRKWOOD_REGS_PHYS_BASE 0xf1000000
-#define KIRKWOOD_REGS_VIRT_BASE IOMEM(0xfed00000)
-#define KIRKWOOD_REGS_SIZE SZ_1M
-
-#define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000
-#define KIRKWOOD_PCIE_MEM_BUS_BASE 0xe0000000
-#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M
-
-#define KIRKWOOD_PCIE1_MEM_PHYS_BASE 0xe8000000
-#define KIRKWOOD_PCIE1_MEM_BUS_BASE 0xe8000000
-#define KIRKWOOD_PCIE1_MEM_SIZE SZ_128M
-
-/*
- * Register Map
- */
-#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x00000)
-#define DDR_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x00000)
-#define DDR_WINDOW_CPU_BASE (DDR_PHYS_BASE + 0x1500)
-#define DDR_WINDOW_CPU_SZ (0x20)
-#define DDR_OPERATION_BASE (DDR_PHYS_BASE + 0x1418)
-
-#define DEV_BUS_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x10000)
-#define DEV_BUS_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x10000)
-#define SAMPLE_AT_RESET (DEV_BUS_VIRT_BASE + 0x0030)
-#define DEVICE_ID (DEV_BUS_VIRT_BASE + 0x0034)
-#define GPIO_LOW_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x0100)
-#define GPIO_HIGH_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x0140)
-#define RTC_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x0300)
-#define SPI_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x0600)
-#define I2C_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x1000)
-#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x2000)
-#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x2000)
-#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x2100)
-#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x2100)
-
-#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x20000)
-#define BRIDGE_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x20000)
-#define BRIDGE_WINS_BASE (BRIDGE_PHYS_BASE)
-#define BRIDGE_WINS_SZ (0x80)
-
-#define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x30000)
-
-#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x40000)
-#define PCIE_LINK_CTRL (PCIE_VIRT_BASE + 0x70)
-#define PCIE_STATUS (PCIE_VIRT_BASE + 0x1a04)
-#define PCIE1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x44000)
-#define PCIE1_LINK_CTRL (PCIE1_VIRT_BASE + 0x70)
-#define PCIE1_STATUS (PCIE1_VIRT_BASE + 0x1a04)
-
-#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x50000)
-
-#define XOR0_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60800)
-#define XOR0_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60800)
-#define XOR1_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60900)
-#define XOR1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60900)
-#define XOR0_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60A00)
-#define XOR0_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60A00)
-#define XOR1_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60B00)
-#define XOR1_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60B00)
-
-#define GE00_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x70000)
-#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x74000)
-
-#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x80000)
-#define SATA_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x80000)
-#define SATA0_IF_CTRL (SATA_VIRT_BASE + 0x2050)
-#define SATA0_PHY_MODE_2 (SATA_VIRT_BASE + 0x2330)
-#define SATA1_IF_CTRL (SATA_VIRT_BASE + 0x4050)
-#define SATA1_PHY_MODE_2 (SATA_VIRT_BASE + 0x4330)
-
-#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x90000)
-
-#define AUDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0xA0000)
-#define AUDIO_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0xA0000)
-
-/*
- * Supported devices and revisions.
- */
-#define MV88F6281_DEV_ID 0x6281
-#define MV88F6281_REV_Z0 0
-#define MV88F6281_REV_A0 2
-#define MV88F6281_REV_A1 3
-
-#define MV88F6192_DEV_ID 0x6192
-#define MV88F6192_REV_Z0 0
-#define MV88F6192_REV_A0 2
-#define MV88F6192_REV_A1 3
-
-#define MV88F6180_DEV_ID 0x6180
-#define MV88F6180_REV_A0 2
-#define MV88F6180_REV_A1 3
-
-#define MV88F6282_DEV_ID 0x6282
-#define MV88F6282_REV_A0 0
-#define MV88F6282_REV_A1 1
-#endif
diff --git a/arch/arm/mach-mvebu/kirkwood-pm.c b/arch/arm/mach-mvebu/kirkwood-pm.c
index b8c8365b84d8..cbb816f2120c 100644
--- a/arch/arm/mach-mvebu/kirkwood-pm.c
+++ b/arch/arm/mach-mvebu/kirkwood-pm.c
@@ -17,7 +17,7 @@
#include <linux/kernel.h>
#include <linux/suspend.h>
#include <linux/io.h>
-#include <mach/bridge-regs.h>
+#include "kirkwood.h"
static void __iomem *ddr_operation_base;
static void __iomem *memory_pm_ctrl;
diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c
index af77923a3483..1df0c0b138d5 100644
--- a/arch/arm/mach-mvebu/kirkwood.c
+++ b/arch/arm/mach-mvebu/kirkwood.c
@@ -23,9 +23,9 @@
#include <asm/hardware/cache-feroceon-l2.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <mach/bridge-regs.h>
#include <plat/common.h>
#include <plat/pcie.h>
+#include "kirkwood.h"
#include "kirkwood-pm.h"
#include "common.h"
diff --git a/arch/arm/mach-mvebu/kirkwood.h b/arch/arm/mach-mvebu/kirkwood.h
new file mode 100644
index 000000000000..89f3d1f51643
--- /dev/null
+++ b/arch/arm/mach-mvebu/kirkwood.h
@@ -0,0 +1,22 @@
+/*
+ * arch/arm/mach-mvebu/kirkwood.h
+ *
+ * Generic definitions for Marvell Kirkwood SoC flavors:
+ * 88F6180, 88F6192 and 88F6281.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#define KIRKWOOD_REGS_PHYS_BASE 0xf1000000
+#define DDR_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x00000)
+#define BRIDGE_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x20000)
+
+#define DDR_OPERATION_BASE (DDR_PHYS_BASE + 0x1418)
+
+#define CPU_CONFIG_PHYS (BRIDGE_PHYS_BASE + 0x0100)
+#define CPU_CONFIG_ERROR_PROP 0x00000004
+
+#define CPU_CONTROL_PHYS (BRIDGE_PHYS_BASE + 0x0104)
+#define MEMORY_PM_CTRL_PHYS (BRIDGE_PHYS_BASE + 0x0118)
--
1.8.5.3
^ permalink raw reply related
* [PATCH 18/21] ARM: config: Add a multi_v5_defconfig
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
To allow regression build testing of multi v5 systems, add a
multi_v5_defconfig, similar to the multi_v7_defconfig. This is based
on kirkwood_defconfig, but with a few other boards added which claim
to be MULTI_v5.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/configs/multi_v5_defconfig | 183 ++++++++++++++++++++++++++++++++++++
1 file changed, 183 insertions(+)
create mode 100644 arch/arm/configs/multi_v5_defconfig
diff --git a/arch/arm/configs/multi_v5_defconfig b/arch/arm/configs/multi_v5_defconfig
new file mode 100644
index 000000000000..8282fab6b514
--- /dev/null
+++ b/arch/arm/configs/multi_v5_defconfig
@@ -0,0 +1,183 @@
+CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=19
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_ARCH_MULTI_V7 is not set
+CONFIG_ARCH_MVEBU=y
+CONFIG_MACH_KIRKWOOD=y
+CONFIG_ARCH_MXC=y
+CONFIG_MACH_IMX25_DT=y
+CONFIG_MACH_IMX27_DT=y
+CONFIG_ARCH_U300=y
+CONFIG_PCI_MVEBU=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_KIRKWOOD_CPUIDLE=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IPV6 is not set
+CONFIG_NET_PKTGEN=m
+CONFIG_CFG80211=y
+CONFIG_MAC80211=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ORION=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_EEPROM_AT24=y
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SR=m
+CONFIG_CHR_DEV_SG=m
+CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_MV=y
+CONFIG_NETDEVICES=y
+CONFIG_NET_DSA_MV88E6123_61_65=y
+CONFIG_MV643XX_ETH=y
+CONFIG_R8169=y
+CONFIG_MARVELL_PHY=y
+CONFIG_LIBERTAS=y
+CONFIG_LIBERTAS_SDIO=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MV64XXX=y
+CONFIG_I2C_NOMADIK=y
+CONFIG_SPI=y
+CONFIG_SPI_ORION=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_POWER_RESET_QNAP=y
+CONFIG_SENSORS_ADT7475=y
+CONFIG_SENSORS_LM63=y
+CONFIG_SENSORS_LM75=y
+CONFIG_SENSORS_LM85=y
+CONFIG_THERMAL=y
+CONFIG_KIRKWOOD_THERMAL=y
+CONFIG_WATCHDOG=y
+# CONFIG_ABX500_CORE is not set
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SOC=y
+CONFIG_SND_KIRKWOOD_SOC=y
+CONFIG_HID_DRAGONRISE=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_PANTHERLORD=y
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
+CONFIG_HID_SMARTJOYPLUS=y
+CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
+CONFIG_HID_ZEROPLUS=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_PRINTER=m
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_MMC=y
+CONFIG_SDIO_UART=y
+CONFIG_MMC_MVSDIO=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_RS5C372=y
+CONFIG_RTC_DRV_PCF8563=y
+CONFIG_RTC_DRV_S35390A=y
+CONFIG_RTC_DRV_MV=y
+CONFIG_DMADEVICES=y
+CONFIG_MV_XOR=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_EXT4_FS=y
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_UDF_FS=m
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+CONFIG_NLS_UTF8=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_FS=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y
+CONFIG_DEBUG_MVEBU_UART_ALTERNATE=y
+CONFIG_DEBUG_UART_VIRT=0xfed12000
+CONFIG_EARLY_PRINTK=y
+CONFIG_CRYPTO_CBC=m
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_DEV_MV_CESA=y
+CONFIG_CRC_CCITT=y
+CONFIG_LIBCRC32C=y
--
1.8.5.3
^ permalink raw reply related
* [PATCH 17/21] ARM: MVEBU: Enable mvebu-soc-id on Kirkwood
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
Add the Kirkwood PCIe compatibility string to mvebu-soc-id, so that it
can get the SoC ID and revision from the PCIe endpoints.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-mvebu/mvebu-soc-id.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/mvebu-soc-id.c b/arch/arm/mach-mvebu/mvebu-soc-id.c
index f3b325f6cbd4..f3d4cf53f746 100644
--- a/arch/arm/mach-mvebu/mvebu-soc-id.c
+++ b/arch/arm/mach-mvebu/mvebu-soc-id.c
@@ -38,6 +38,7 @@ static bool is_id_valid;
static const struct of_device_id mvebu_pcie_of_match_table[] = {
{ .compatible = "marvell,armada-xp-pcie", },
{ .compatible = "marvell,armada-370-pcie", },
+ { .compatible = "marvell,kirkwood-pcie" },
{},
};
--
1.8.5.3
^ permalink raw reply related
* [PATCH 16/21] drivers: Enable building of Kirkwood drivers for mach-mvebu
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
With the move to mach-mvebu, drivers Kconfig need tweeking to allow
the kirkwood specific drivers to be built.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
drivers/cpufreq/Kconfig.arm | 2 +-
drivers/cpuidle/Kconfig.arm | 2 +-
drivers/leds/Kconfig | 4 ++--
drivers/phy/Kconfig | 2 +-
drivers/thermal/Kconfig | 2 +-
sound/soc/kirkwood/Kconfig | 2 +-
6 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 31297499a60a..de931081fd01 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -113,7 +113,7 @@ config ARM_INTEGRATOR
If in doubt, say Y.
config ARM_KIRKWOOD_CPUFREQ
- def_bool ARCH_KIRKWOOD && OF
+ def_bool (ARCH_KIRKWOOD || MACH_KIRKWOOD) && OF
help
This adds the CPUFreq driver for Marvell Kirkwood
SoCs.
diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm
index d988948a89a0..97ccc31dbdd8 100644
--- a/drivers/cpuidle/Kconfig.arm
+++ b/drivers/cpuidle/Kconfig.arm
@@ -22,7 +22,7 @@ config ARM_HIGHBANK_CPUIDLE
config ARM_KIRKWOOD_CPUIDLE
bool "CPU Idle Driver for Marvell Kirkwood SoCs"
- depends on ARCH_KIRKWOOD
+ depends on ARCH_KIRKWOOD || MACH_KIRKWOOD
help
This adds the CPU Idle driver for Marvell Kirkwood SoCs.
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index 72156c123033..44c358ecf5a1 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -421,7 +421,7 @@ config LEDS_MC13783
config LEDS_NS2
tristate "LED support for Network Space v2 GPIO LEDs"
depends on LEDS_CLASS
- depends on ARCH_KIRKWOOD
+ depends on ARCH_KIRKWOOD || MACH_KIRKWOOD
default y
help
This option enable support for the dual-GPIO LED found on the
@@ -431,7 +431,7 @@ config LEDS_NS2
config LEDS_NETXBIG
tristate "LED support for Big Network series LEDs"
depends on LEDS_CLASS
- depends on ARCH_KIRKWOOD
+ depends on ARCH_KIRKWOOD || MACH_KIRKWOOD
default y
help
This option enable support for LEDs found on the LaCie 2Big
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index afa2354f6600..5e6b33f9c294 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -24,7 +24,7 @@ config PHY_EXYNOS_MIPI_VIDEO
config PHY_MVEBU_SATA
def_bool y
- depends on ARCH_KIRKWOOD || ARCH_DOVE
+ depends on ARCH_KIRKWOOD || ARCH_DOVE || MACH_KIRKWOOD
depends on OF
select GENERIC_PHY
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 35c066489a19..1bc9cbc4f1b8 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -142,7 +142,7 @@ config RCAR_THERMAL
config KIRKWOOD_THERMAL
tristate "Temperature sensor on Marvell Kirkwood SoCs"
- depends on ARCH_KIRKWOOD
+ depends on ARCH_KIRKWOOD || MACH_KIRKWOOD
depends on OF
help
Support for the Kirkwood thermal sensor driver into the Linux thermal
diff --git a/sound/soc/kirkwood/Kconfig b/sound/soc/kirkwood/Kconfig
index 78ed4a42ad21..106e2e22fed2 100644
--- a/sound/soc/kirkwood/Kconfig
+++ b/sound/soc/kirkwood/Kconfig
@@ -1,6 +1,6 @@
config SND_KIRKWOOD_SOC
tristate "SoC Audio for the Marvell Kirkwood and Dove chips"
- depends on ARCH_KIRKWOOD || ARCH_DOVE || COMPILE_TEST
+ depends on ARCH_KIRKWOOD || ARCH_DOVE || MACH_KIRKWOOD || COMPILE_TEST
help
Say Y or M if you want to add support for codecs attached to
the Kirkwood I2S interface. You will also need to select the
--
1.8.5.3
^ permalink raw reply related
* [PATCH 15/21] ARM: MVEBU: Let kirkwood use the system controller for restart
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
The mvebu system controller already supports restarting orion
systems. Make use of it, rather than the kirkwood specific code.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/boot/dts/kirkwood.dtsi | 5 +++++
arch/arm/mach-mvebu/kirkwood.c | 20 ++------------------
2 files changed, 7 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 1d8129ac2672..6c4028e410fa 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -145,6 +145,11 @@
reg = <0x20000 0x80>, <0x1500 0x20>;
};
+ system-controller at 20000 {
+ compatible = "marvell,orion-system-controller";
+ reg = <0x20000 0x120>;
+ };
+
bridge_intc: bridge-interrupt-ctrl at 20110 {
compatible = "marvell,orion-bridge-intc";
interrupt-controller;
diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c
index 56e83035bc97..af77923a3483 100644
--- a/arch/arm/mach-mvebu/kirkwood.c
+++ b/arch/arm/mach-mvebu/kirkwood.c
@@ -27,6 +27,7 @@
#include <plat/common.h>
#include <plat/pcie.h>
#include "kirkwood-pm.h"
+#include "common.h"
static struct resource kirkwood_cpufreq_resources[] = {
[0] = {
@@ -68,23 +69,6 @@ static void __init kirkwood_cpuidle_init(void)
platform_device_register(&kirkwood_cpuidle);
}
-/* Temporary here since mach-mvebu has a function we can use */
-static void kirkwood_restart(enum reboot_mode mode, const char *cmd)
-{
- /*
- * Enable soft reset to assert RSTOUTn.
- */
- writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
-
- /*
- * Assert soft reset.
- */
- writel(SOFT_RESET, SYSTEM_SOFT_RESET);
-
- while (1)
- ;
-}
-
#define MV643XX_ETH_MAC_ADDR_LOW 0x0414
#define MV643XX_ETH_MAC_ADDR_HIGH 0x0418
@@ -203,6 +187,6 @@ static const char * const kirkwood_dt_board_compat[] = {
DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)")
/* Maintainer: Jason Cooper <jason@lakedaemon.net> */
.init_machine = kirkwood_dt_init,
- .restart = kirkwood_restart,
+ .restart = mvebu_restart,
.dt_compat = kirkwood_dt_board_compat,
MACHINE_END
--
1.8.5.3
^ permalink raw reply related
* [PATCH 14/21] ARM: Move kirkwood DT boards into mach-mvebu
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
Move the kirkwood DT support into mach-mvebu, and make them part of
ARCH_MULTI_V5. Minimal changes have been made in order to make it
boot. More intergration will take place in following patches.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/boot/dts/Makefile | 34 ++--
arch/arm/mach-mvebu/Kconfig | 24 ++-
arch/arm/mach-mvebu/Makefile | 1 +
arch/arm/mach-mvebu/include/mach/bridge-regs.h | 85 ++++++++++
arch/arm/mach-mvebu/include/mach/kirkwood.h | 142 +++++++++++++++++
arch/arm/mach-mvebu/kirkwood-pm.c | 76 +++++++++
arch/arm/mach-mvebu/kirkwood-pm.h | 26 ++++
arch/arm/mach-mvebu/kirkwood.c | 208 +++++++++++++++++++++++++
8 files changed, 578 insertions(+), 18 deletions(-)
create mode 100644 arch/arm/mach-mvebu/include/mach/bridge-regs.h
create mode 100644 arch/arm/mach-mvebu/include/mach/kirkwood.h
create mode 100644 arch/arm/mach-mvebu/kirkwood-pm.c
create mode 100644 arch/arm/mach-mvebu/kirkwood-pm.h
create mode 100644 arch/arm/mach-mvebu/kirkwood.c
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b9d6a8b485e0..c0253830c7db 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -82,7 +82,23 @@ dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \
integratorcp.dtb
dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
-dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
+dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
+dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb
+dtb-$(CONFIG_ARCH_MSM) += qcom-msm8660-surf.dtb \
+ qcom-msm8960-cdp.dtb \
+ qcom-apq8074-dragonboard.dtb
+dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
+ armada-370-mirabox.dtb \
+ armada-370-netgear-rn102.dtb \
+ armada-370-netgear-rn104.dtb \
+ armada-370-rd.dtb \
+ armada-xp-axpwifiap.dtb \
+ armada-xp-db.dtb \
+ armada-xp-gp.dtb \
+ armada-xp-netgear-rn2120.dtb \
+ armada-xp-matrix.dtb \
+ armada-xp-openblocks-ax3-4.dtb \
+ kirkwood-cloudbox.dtb \
kirkwood-db-88f6281.dtb \
kirkwood-db-88f6282.dtb \
kirkwood-dns320.dtb \
@@ -116,22 +132,6 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
kirkwood-topkick.dtb \
kirkwood-ts219-6281.dtb \
kirkwood-ts219-6282.dtb
-dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
-dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb
-dtb-$(CONFIG_ARCH_MSM) += qcom-msm8660-surf.dtb \
- qcom-msm8960-cdp.dtb \
- qcom-apq8074-dragonboard.dtb
-dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
- armada-370-mirabox.dtb \
- armada-370-netgear-rn102.dtb \
- armada-370-netgear-rn104.dtb \
- armada-370-rd.dtb \
- armada-xp-axpwifiap.dtb \
- armada-xp-db.dtb \
- armada-xp-gp.dtb \
- armada-xp-netgear-rn2120.dtb \
- armada-xp-matrix.dtb \
- armada-xp-openblocks-ax3-4.dtb
dtb-$(CONFIG_ARCH_MXC) += \
imx25-karo-tx25.dtb \
imx25-pdk.dtb \
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 9ab22e1b26cd..2afbd59cad5e 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -1,5 +1,5 @@
config ARCH_MVEBU
- bool "Marvell SOCs with Device Tree support" if ARCH_MULTI_V7
+ bool "Marvell SOCs with Device Tree support" if (ARCH_MULTI_V7 || ARCH_MULTI_V5)
select ARCH_SUPPORTS_BIG_ENDIAN
select CLKSRC_MMIO
select COMMON_CLK
@@ -46,6 +46,28 @@ config MACH_ARMADA_XP
Say 'Y' here if you want your kernel to support boards based
on the Marvell Armada XP SoC with device tree.
+config MACH_KIRKWOOD
+ bool "Marvell Kirkwood boards" if ARCH_MULTI_V5
+ select ARCH_HAS_CPUFREQ
+ select ARCH_REQUIRE_GPIOLIB
+ select CPU_FEROCEON
+ select KIRKWOOD_CLK
+ select OF_IRQ
+ select ORION_IRQCHIP
+ select ORION_TIMER
+ select PCI
+ select PCI_QUIRKS
+ select PINCTRL_KIRKWOOD
+ select POWER_SUPPLY
+ select POWER_RESET
+ select POWER_RESET_GPIO
+ select REGULATOR
+ select REGULATOR_FIXED_VOLTAGE
+ select USE_OF
+ help
+ Say 'Y' here if you want your kernel to support boards based
+ on the Marvell Kirkwood device tree.
+
endmenu
endif
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 878aebe98dcc..c44976470ccf 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o
obj-$(CONFIG_ARCH_MVEBU) += coherency.o coherency_ll.o pmsu.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
+obj-$(CONFIG_MACH_KIRKWOOD) += kirkwood.o kirkwood-pm.o
\ No newline at end of file
diff --git a/arch/arm/mach-mvebu/include/mach/bridge-regs.h b/arch/arm/mach-mvebu/include/mach/bridge-regs.h
new file mode 100644
index 000000000000..6eb8fea1f76f
--- /dev/null
+++ b/arch/arm/mach-mvebu/include/mach/bridge-regs.h
@@ -0,0 +1,85 @@
+/*
+ * arch/arm/mach-mvebu/include/mach/bridge-regs.h
+ *
+ * Mbus-L to Mbus Bridge Registers
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_BRIDGE_REGS_H
+#define __ASM_ARCH_BRIDGE_REGS_H
+
+#include <mach/kirkwood.h>
+
+#define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0100)
+#define CPU_CONFIG_PHYS (BRIDGE_PHYS_BASE + 0x0100)
+#define CPU_CONFIG_ERROR_PROP 0x00000004
+
+#define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104)
+#define CPU_CONTROL_PHYS (BRIDGE_PHYS_BASE + 0x0104)
+#define CPU_RESET 0x00000002
+
+#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108)
+#define SOFT_RESET_OUT_EN 0x00000004
+
+#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c)
+#define SOFT_RESET 0x00000001
+
+#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE + 0x0110)
+
+#define BRIDGE_INT_TIMER1_CLR (~0x0004)
+
+#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200)
+#define IRQ_CAUSE_LOW_OFF 0x0000
+#define IRQ_MASK_LOW_OFF 0x0004
+#define IRQ_CAUSE_HIGH_OFF 0x0010
+#define IRQ_MASK_HIGH_OFF 0x0014
+
+#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300)
+#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE + 0x0300)
+
+#define L2_CONFIG_REG (BRIDGE_VIRT_BASE + 0x0128)
+#define L2_WRITETHROUGH 0x00000010
+
+#define CLOCK_GATING_CTRL (BRIDGE_VIRT_BASE + 0x11c)
+#define CGC_BIT_GE0 (0)
+#define CGC_BIT_PEX0 (2)
+#define CGC_BIT_USB0 (3)
+#define CGC_BIT_SDIO (4)
+#define CGC_BIT_TSU (5)
+#define CGC_BIT_DUNIT (6)
+#define CGC_BIT_RUNIT (7)
+#define CGC_BIT_XOR0 (8)
+#define CGC_BIT_AUDIO (9)
+#define CGC_BIT_SATA0 (14)
+#define CGC_BIT_SATA1 (15)
+#define CGC_BIT_XOR1 (16)
+#define CGC_BIT_CRYPTO (17)
+#define CGC_BIT_PEX1 (18)
+#define CGC_BIT_GE1 (19)
+#define CGC_BIT_TDM (20)
+#define CGC_GE0 (1 << 0)
+#define CGC_PEX0 (1 << 2)
+#define CGC_USB0 (1 << 3)
+#define CGC_SDIO (1 << 4)
+#define CGC_TSU (1 << 5)
+#define CGC_DUNIT (1 << 6)
+#define CGC_RUNIT (1 << 7)
+#define CGC_XOR0 (1 << 8)
+#define CGC_AUDIO (1 << 9)
+#define CGC_POWERSAVE (1 << 11)
+#define CGC_SATA0 (1 << 14)
+#define CGC_SATA1 (1 << 15)
+#define CGC_XOR1 (1 << 16)
+#define CGC_CRYPTO (1 << 17)
+#define CGC_PEX1 (1 << 18)
+#define CGC_GE1 (1 << 19)
+#define CGC_TDM (1 << 20)
+#define CGC_RESERVED (0x6 << 21)
+
+#define MEMORY_PM_CTRL (BRIDGE_VIRT_BASE + 0x118)
+#define MEMORY_PM_CTRL_PHYS (BRIDGE_PHYS_BASE + 0x118)
+
+#endif
diff --git a/arch/arm/mach-mvebu/include/mach/kirkwood.h b/arch/arm/mach-mvebu/include/mach/kirkwood.h
new file mode 100644
index 000000000000..9d966dc78d67
--- /dev/null
+++ b/arch/arm/mach-mvebu/include/mach/kirkwood.h
@@ -0,0 +1,142 @@
+/*
+ * arch/arm/mach-mvebu/include/mach/kirkwood.h
+ *
+ * Generic definitions for Marvell Kirkwood SoC flavors:
+ * 88F6180, 88F6192 and 88F6281.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_KIRKWOOD_H
+#define __ASM_ARCH_KIRKWOOD_H
+
+/*
+ * Marvell Kirkwood address maps.
+ *
+ * phys
+ * e0000000 PCIe #0 Memory space
+ * e8000000 PCIe #1 Memory space
+ * f1000000 on-chip peripheral registers
+ * f2000000 PCIe #0 I/O space
+ * f3000000 PCIe #1 I/O space
+ * f4000000 NAND controller address window
+ * f5000000 Security Accelerator SRAM
+ *
+ * virt phys size
+ * fed00000 f1000000 1M on-chip peripheral registers
+ * fee00000 f2000000 1M PCIe #0 I/O space
+ * fef00000 f3000000 1M PCIe #1 I/O space
+ */
+
+#define KIRKWOOD_SRAM_PHYS_BASE 0xf5000000
+#define KIRKWOOD_SRAM_SIZE SZ_2K
+
+#define KIRKWOOD_NAND_MEM_PHYS_BASE 0xf4000000
+#define KIRKWOOD_NAND_MEM_SIZE SZ_1K
+
+#define KIRKWOOD_PCIE1_IO_PHYS_BASE 0xf3000000
+#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00010000
+#define KIRKWOOD_PCIE1_IO_SIZE SZ_64K
+
+#define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000
+#define KIRKWOOD_PCIE_IO_BUS_BASE 0x00000000
+#define KIRKWOOD_PCIE_IO_SIZE SZ_64K
+
+#define KIRKWOOD_REGS_PHYS_BASE 0xf1000000
+#define KIRKWOOD_REGS_VIRT_BASE IOMEM(0xfed00000)
+#define KIRKWOOD_REGS_SIZE SZ_1M
+
+#define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000
+#define KIRKWOOD_PCIE_MEM_BUS_BASE 0xe0000000
+#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M
+
+#define KIRKWOOD_PCIE1_MEM_PHYS_BASE 0xe8000000
+#define KIRKWOOD_PCIE1_MEM_BUS_BASE 0xe8000000
+#define KIRKWOOD_PCIE1_MEM_SIZE SZ_128M
+
+/*
+ * Register Map
+ */
+#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x00000)
+#define DDR_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x00000)
+#define DDR_WINDOW_CPU_BASE (DDR_PHYS_BASE + 0x1500)
+#define DDR_WINDOW_CPU_SZ (0x20)
+#define DDR_OPERATION_BASE (DDR_PHYS_BASE + 0x1418)
+
+#define DEV_BUS_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x10000)
+#define DEV_BUS_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x10000)
+#define SAMPLE_AT_RESET (DEV_BUS_VIRT_BASE + 0x0030)
+#define DEVICE_ID (DEV_BUS_VIRT_BASE + 0x0034)
+#define GPIO_LOW_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x0100)
+#define GPIO_HIGH_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x0140)
+#define RTC_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x0300)
+#define SPI_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x0600)
+#define I2C_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x1000)
+#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x2000)
+#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x2000)
+#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x2100)
+#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x2100)
+
+#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x20000)
+#define BRIDGE_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x20000)
+#define BRIDGE_WINS_BASE (BRIDGE_PHYS_BASE)
+#define BRIDGE_WINS_SZ (0x80)
+
+#define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x30000)
+
+#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x40000)
+#define PCIE_LINK_CTRL (PCIE_VIRT_BASE + 0x70)
+#define PCIE_STATUS (PCIE_VIRT_BASE + 0x1a04)
+#define PCIE1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x44000)
+#define PCIE1_LINK_CTRL (PCIE1_VIRT_BASE + 0x70)
+#define PCIE1_STATUS (PCIE1_VIRT_BASE + 0x1a04)
+
+#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x50000)
+
+#define XOR0_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60800)
+#define XOR0_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60800)
+#define XOR1_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60900)
+#define XOR1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60900)
+#define XOR0_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60A00)
+#define XOR0_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60A00)
+#define XOR1_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60B00)
+#define XOR1_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60B00)
+
+#define GE00_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x70000)
+#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x74000)
+
+#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x80000)
+#define SATA_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x80000)
+#define SATA0_IF_CTRL (SATA_VIRT_BASE + 0x2050)
+#define SATA0_PHY_MODE_2 (SATA_VIRT_BASE + 0x2330)
+#define SATA1_IF_CTRL (SATA_VIRT_BASE + 0x4050)
+#define SATA1_PHY_MODE_2 (SATA_VIRT_BASE + 0x4330)
+
+#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x90000)
+
+#define AUDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0xA0000)
+#define AUDIO_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0xA0000)
+
+/*
+ * Supported devices and revisions.
+ */
+#define MV88F6281_DEV_ID 0x6281
+#define MV88F6281_REV_Z0 0
+#define MV88F6281_REV_A0 2
+#define MV88F6281_REV_A1 3
+
+#define MV88F6192_DEV_ID 0x6192
+#define MV88F6192_REV_Z0 0
+#define MV88F6192_REV_A0 2
+#define MV88F6192_REV_A1 3
+
+#define MV88F6180_DEV_ID 0x6180
+#define MV88F6180_REV_A0 2
+#define MV88F6180_REV_A1 3
+
+#define MV88F6282_DEV_ID 0x6282
+#define MV88F6282_REV_A0 0
+#define MV88F6282_REV_A1 1
+#endif
diff --git a/arch/arm/mach-mvebu/kirkwood-pm.c b/arch/arm/mach-mvebu/kirkwood-pm.c
new file mode 100644
index 000000000000..b8c8365b84d8
--- /dev/null
+++ b/arch/arm/mach-mvebu/kirkwood-pm.c
@@ -0,0 +1,76 @@
+/*
+ * Power Management driver for Marvell Kirkwood SoCs
+ *
+ * Copyright (C) 2013 Ezequiel Garcia <ezequiel@free-electrons.com>
+ * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License,
+ * version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/suspend.h>
+#include <linux/io.h>
+#include <mach/bridge-regs.h>
+
+static void __iomem *ddr_operation_base;
+static void __iomem *memory_pm_ctrl;
+
+static void kirkwood_low_power(void)
+{
+ u32 mem_pm_ctrl;
+
+ mem_pm_ctrl = readl(memory_pm_ctrl);
+
+ /* Set peripherals to low-power mode */
+ writel_relaxed(~0, memory_pm_ctrl);
+
+ /* Set DDR in self-refresh */
+ writel_relaxed(0x7, ddr_operation_base);
+
+ /*
+ * Set CPU in wait-for-interrupt state.
+ * This disables the CPU core clocks,
+ * the array clocks, and also the L2 controller.
+ */
+ cpu_do_idle();
+
+ writel_relaxed(mem_pm_ctrl, memory_pm_ctrl);
+}
+
+static int kirkwood_suspend_enter(suspend_state_t state)
+{
+ switch (state) {
+ case PM_SUSPEND_STANDBY:
+ kirkwood_low_power();
+ break;
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static int kirkwood_pm_valid_standby(suspend_state_t state)
+{
+ return state == PM_SUSPEND_STANDBY;
+}
+
+static const struct platform_suspend_ops kirkwood_suspend_ops = {
+ .enter = kirkwood_suspend_enter,
+ .valid = kirkwood_pm_valid_standby,
+};
+
+int __init kirkwood_pm_init(void)
+{
+ ddr_operation_base = ioremap(DDR_OPERATION_BASE, 4);
+ memory_pm_ctrl = ioremap(MEMORY_PM_CTRL_PHYS, 4);
+
+ suspend_set_ops(&kirkwood_suspend_ops);
+ return 0;
+}
diff --git a/arch/arm/mach-mvebu/kirkwood-pm.h b/arch/arm/mach-mvebu/kirkwood-pm.h
new file mode 100644
index 000000000000..21e7530f368b
--- /dev/null
+++ b/arch/arm/mach-mvebu/kirkwood-pm.h
@@ -0,0 +1,26 @@
+/*
+ * Power Management driver for Marvell Kirkwood SoCs
+ *
+ * Copyright (C) 2013 Ezequiel Garcia <ezequiel@free-electrons.com>
+ * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License,
+ * version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ARCH_KIRKWOOD_PM_H
+#define __ARCH_KIRKWOOD_PM_H
+
+#ifdef CONFIG_PM
+void kirkwood_pm_init(void);
+#else
+static inline void kirkwood_pm_init(void) {};
+#endif
+
+#endif
diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c
new file mode 100644
index 000000000000..56e83035bc97
--- /dev/null
+++ b/arch/arm/mach-mvebu/kirkwood.c
@@ -0,0 +1,208 @@
+/*
+ * Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net>
+ *
+ * arch/arm/mach-mvebu/kirkwood.c
+ *
+ * Flattened Device Tree board initialization
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/clk.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_net.h>
+#include <linux/of_platform.h>
+#include <linux/dma-mapping.h>
+#include <linux/irqchip.h>
+#include <linux/kexec.h>
+#include <asm/hardware/cache-feroceon-l2.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <mach/bridge-regs.h>
+#include <plat/common.h>
+#include <plat/pcie.h>
+#include "kirkwood-pm.h"
+
+static struct resource kirkwood_cpufreq_resources[] = {
+ [0] = {
+ .start = CPU_CONTROL_PHYS,
+ .end = CPU_CONTROL_PHYS + 3,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device kirkwood_cpufreq_device = {
+ .name = "kirkwood-cpufreq",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(kirkwood_cpufreq_resources),
+ .resource = kirkwood_cpufreq_resources,
+};
+
+static void __init kirkwood_cpufreq_init(void)
+{
+ platform_device_register(&kirkwood_cpufreq_device);
+}
+
+static struct resource kirkwood_cpuidle_resource[] = {
+ {
+ .flags = IORESOURCE_MEM,
+ .start = DDR_OPERATION_BASE,
+ .end = DDR_OPERATION_BASE + 3,
+ },
+};
+
+static struct platform_device kirkwood_cpuidle = {
+ .name = "kirkwood_cpuidle",
+ .id = -1,
+ .resource = kirkwood_cpuidle_resource,
+ .num_resources = 1,
+};
+
+static void __init kirkwood_cpuidle_init(void)
+{
+ platform_device_register(&kirkwood_cpuidle);
+}
+
+/* Temporary here since mach-mvebu has a function we can use */
+static void kirkwood_restart(enum reboot_mode mode, const char *cmd)
+{
+ /*
+ * Enable soft reset to assert RSTOUTn.
+ */
+ writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+ /*
+ * Assert soft reset.
+ */
+ writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+ while (1)
+ ;
+}
+
+#define MV643XX_ETH_MAC_ADDR_LOW 0x0414
+#define MV643XX_ETH_MAC_ADDR_HIGH 0x0418
+
+static void __init kirkwood_dt_eth_fixup(void)
+{
+ struct device_node *np;
+
+ /*
+ * The ethernet interfaces forget the MAC address assigned by u-boot
+ * if the clocks are turned off. Usually, u-boot on kirkwood boards
+ * has no DT support to properly set local-mac-address property.
+ * As a workaround, we get the MAC address from mv643xx_eth registers
+ * and update the port device node if no valid MAC address is set.
+ */
+ for_each_compatible_node(np, NULL, "marvell,kirkwood-eth-port") {
+ struct device_node *pnp = of_get_parent(np);
+ struct clk *clk;
+ struct property *pmac;
+ void __iomem *io;
+ u8 *macaddr;
+ u32 reg;
+
+ if (!pnp)
+ continue;
+
+ /* skip disabled nodes or nodes with valid MAC address*/
+ if (!of_device_is_available(pnp) || of_get_mac_address(np))
+ goto eth_fixup_skip;
+
+ clk = of_clk_get(pnp, 0);
+ if (IS_ERR(clk))
+ goto eth_fixup_skip;
+
+ io = of_iomap(pnp, 0);
+ if (!io)
+ goto eth_fixup_no_map;
+
+ /* ensure port clock is not gated to not hang CPU */
+ clk_prepare_enable(clk);
+
+ /* store MAC address register contents in local-mac-address */
+ pr_err(FW_INFO "%s: local-mac-address is not set\n",
+ np->full_name);
+
+ pmac = kzalloc(sizeof(*pmac) + 6, GFP_KERNEL);
+ if (!pmac)
+ goto eth_fixup_no_mem;
+
+ pmac->value = pmac + 1;
+ pmac->length = 6;
+ pmac->name = kstrdup("local-mac-address", GFP_KERNEL);
+ if (!pmac->name) {
+ kfree(pmac);
+ goto eth_fixup_no_mem;
+ }
+
+ macaddr = pmac->value;
+ reg = readl(io + MV643XX_ETH_MAC_ADDR_HIGH);
+ macaddr[0] = (reg >> 24) & 0xff;
+ macaddr[1] = (reg >> 16) & 0xff;
+ macaddr[2] = (reg >> 8) & 0xff;
+ macaddr[3] = reg & 0xff;
+
+ reg = readl(io + MV643XX_ETH_MAC_ADDR_LOW);
+ macaddr[4] = (reg >> 8) & 0xff;
+ macaddr[5] = reg & 0xff;
+
+ of_update_property(np, pmac);
+
+eth_fixup_no_mem:
+ iounmap(io);
+ clk_disable_unprepare(clk);
+eth_fixup_no_map:
+ clk_put(clk);
+eth_fixup_skip:
+ of_node_put(pnp);
+ }
+}
+
+/*
+ * Disable propagation of mbus errors to the CPU local bus, as this
+ * causes mbus errors (which can occur for example for PCI aborts) to
+ * throw CPU aborts, which we're not set up to deal with.
+ */
+void kirkwood_disable_mbus_error_propagation(void)
+{
+ void __iomem *cpu_config;
+
+ cpu_config = ioremap(CPU_CONFIG_PHYS, 4);
+ writel(readl(cpu_config) & ~CPU_CONFIG_ERROR_PROP, cpu_config);
+}
+
+
+static void __init kirkwood_dt_init(void)
+{
+ kirkwood_disable_mbus_error_propagation();
+
+ BUG_ON(mvebu_mbus_dt_init());
+
+ feroceon_of_init();
+
+ kirkwood_cpufreq_init();
+ kirkwood_cpuidle_init();
+
+ kirkwood_pm_init();
+ kirkwood_dt_eth_fixup();
+
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char * const kirkwood_dt_board_compat[] = {
+ "marvell,kirkwood",
+ NULL
+};
+
+DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)")
+ /* Maintainer: Jason Cooper <jason@lakedaemon.net> */
+ .init_machine = kirkwood_dt_init,
+ .restart = kirkwood_restart,
+ .dt_compat = kirkwood_dt_board_compat,
+MACHINE_END
--
1.8.5.3
^ permalink raw reply related
* [PATCH 13/21] ARM: MM Enable building Feroceon L2 cache controller with ARCH_MVEBU
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
Kirkwood, which uses the Feroceon L2 cache controller will soon be
moving into mach-mvebu. Allow the cache controller to be build in this
situration.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mm/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 1f8fed94c2a4..dccd7e177653 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -855,7 +855,7 @@ config OUTER_CACHE_SYNC
config CACHE_FEROCEON_L2
bool "Enable the Feroceon L2 cache controller"
- depends on ARCH_KIRKWOOD || ARCH_MV78XX0
+ depends on ARCH_KIRKWOOD || ARCH_MV78XX0 || ARCH_MVEBU
default y
select OUTER_CACHE
help
--
1.8.5.3
^ permalink raw reply related
* [PATCH 12/21] ARM: Fix MULTI_TLB for feroceon
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
Feroceon has the same flush operations as v4wbi, but has an additional
flag, TLB_L2CLEAN_FR. When building with MULTI_TLB this flag is placed
into cpu_tlb.tlb_flags, so there needs to be a cpu_tlb specifically
for feroceon, rather than sharing the v4wbi.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mm/proc-feroceon.S | 2 +-
arch/arm/mm/tlb-v4wbi.S | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index db79b62c92fb..b76c2706cb02 100644
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -607,7 +607,7 @@ __\name\()_proc_info:
.long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
.long \cpu_name
.long feroceon_processor_functions
- .long v4wbi_tlb_fns
+ .long fr_tlb_fns
.long feroceon_user_fns
.long \cache
.size __\name\()_proc_info, . - __\name\()_proc_info
diff --git a/arch/arm/mm/tlb-v4wbi.S b/arch/arm/mm/tlb-v4wbi.S
index 1f6062b6c1c1..4e053fef3487 100644
--- a/arch/arm/mm/tlb-v4wbi.S
+++ b/arch/arm/mm/tlb-v4wbi.S
@@ -28,6 +28,7 @@
* - mm - mm_struct describing address space
*/
.align 5
+ENTRY(fr_flush_user_tlb_range)
ENTRY(v4wbi_flush_user_tlb_range)
vma_vm_mm ip, r2
act_mm r3 @ get current->active_mm
@@ -46,6 +47,7 @@ ENTRY(v4wbi_flush_user_tlb_range)
blo 1b
mov pc, lr
+ENTRY(fr_flush_kern_tlb_range)
ENTRY(v4wbi_flush_kern_tlb_range)
mov r3, #0
mcr p15, 0, r3, c7, c10, 4 @ drain WB
@@ -62,3 +64,4 @@ ENTRY(v4wbi_flush_kern_tlb_range)
/* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */
define_tlb_functions v4wbi, v4wbi_tlb_flags
+ define_tlb_functions fr, fr_tlb_flags
--
1.8.5.3
^ permalink raw reply related
* [PATCH 11/21] ARM: Fix default CPU selection for ARCH_MULTI_V5
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
CPU_ARM926T should be selected if no other CPU is. Put the ! in the
right place so this works.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e25419817791..beba369d74de 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -898,7 +898,7 @@ config ARCH_MULTI_V5
bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
depends on !ARCH_MULTI_V6_V7
select ARCH_MULTI_V4_V5
- select CPU_ARM926T if (!CPU_ARM946E || CPU_ARM1020 || \
+ select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
--
1.8.5.3
^ permalink raw reply related
* [PATCH 10/21] ARM: MM: Add DT binding for Feroceon L2 cache
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
Instantiate the L2 cache from DT. Indicate in DT where the cache
control register is and if write through should be made.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
.../devicetree/bindings/arm/mrvl/foroceon.txt | 19 +++++++++
arch/arm/boot/dts/kirkwood.dtsi | 5 +++
arch/arm/include/asm/hardware/cache-feroceon-l2.h | 2 +
arch/arm/mach-kirkwood/board-dt.c | 15 +------
arch/arm/mm/cache-feroceon-l2.c | 46 ++++++++++++++++++++++
5 files changed, 73 insertions(+), 14 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/mrvl/foroceon.txt
diff --git a/Documentation/devicetree/bindings/arm/mrvl/foroceon.txt b/Documentation/devicetree/bindings/arm/mrvl/foroceon.txt
new file mode 100644
index 000000000000..8058676d1476
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mrvl/foroceon.txt
@@ -0,0 +1,19 @@
+* Marvell Feroceon Cache
+
+Required properties:
+- compatible : Should be "marvell,feroceon-kirkwood".
+- reg : Address of the L2 cache control register
+
+Optional properties:
+- writethrough : only if present, the cache will be used in write through mode.
+
+Example:
+ l2: l2-cache at 20128 {
+ compatible = "marvell,marvell,feroceon-kirkwood";
+ reg = <0x20128 0x4>;
+ };
+
+There are at least two variants of the Feroceon, differing in how
+write through is enabled or not. If mv78xx0 support is added, it is
+expected to have a different compatibility string.
+
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 6abf44d257df..1d8129ac2672 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -161,6 +161,11 @@
#clock-cells = <1>;
};
+ l2: l2-cache at 20128 {
+ compatible = "marvell,feroceon-kirkwood";
+ reg = <0x20128 0x4>;
+ };
+
intc: main-interrupt-ctrl at 20200 {
compatible = "marvell,orion-intc";
interrupt-controller;
diff --git a/arch/arm/include/asm/hardware/cache-feroceon-l2.h b/arch/arm/include/asm/hardware/cache-feroceon-l2.h
index 8edd330aabf6..12e1588dc4f1 100644
--- a/arch/arm/include/asm/hardware/cache-feroceon-l2.h
+++ b/arch/arm/include/asm/hardware/cache-feroceon-l2.h
@@ -9,3 +9,5 @@
*/
extern void __init feroceon_l2_init(int l2_wt_override);
+extern int __init feroceon_of_init(void);
+
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index 34c35510fd17..2ef59ee2182d 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -42,19 +42,6 @@ static void __init kirkwood_map_io(void)
iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
}
-static void __init kirkwood_l2_init(void)
-{
-#ifdef CONFIG_CACHE_FEROCEON_L2
-#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
- writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
- feroceon_l2_init(1);
-#else
- writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
- feroceon_l2_init(0);
-#endif
-#endif
-}
-
static struct resource kirkwood_cpufreq_resources[] = {
[0] = {
.start = CPU_CONTROL_PHYS,
@@ -211,7 +198,7 @@ static void __init kirkwood_dt_init(void)
BUG_ON(mvebu_mbus_dt_init());
- kirkwood_l2_init();
+ feroceon_of_init();
kirkwood_cpufreq_init();
kirkwood_cpuidle_init();
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 898362e7972b..193fe7dbdb12 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -13,11 +13,17 @@
*/
#include <linux/init.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include <linux/highmem.h>
+#include <linux/io.h>
#include <asm/cacheflush.h>
#include <asm/cp15.h>
#include <asm/hardware/cache-feroceon-l2.h>
+#define L2_WRITETHROUGH_KIRKWOOD 0x00000010
+
+
/*
* Low-level cache maintenance operations.
*
@@ -350,3 +356,43 @@ void __init feroceon_l2_init(int __l2_wt_override)
printk(KERN_INFO "Feroceon L2: Cache support initialised%s.\n",
l2_wt_override ? ", in WT override mode" : "");
}
+#ifdef CONFIG_OF
+static const struct of_device_id feroceon_ids[] __initconst = {
+ { .compatible = "marvell,feroceon-kirkwood"},
+ {}
+};
+
+int __init feroceon_of_init(void)
+{
+ struct device_node *node;
+ void __iomem *base;
+ bool writethrough = false;
+ struct resource res;
+
+ node = of_find_matching_node(NULL, feroceon_ids);
+ if (!node) {
+ pr_info("Didn't find marvell,feroceon-*, not enabling it\n");
+ return -ENODEV;
+ }
+
+ if (of_property_read_bool(node, "writethrough"))
+ writethrough = true;
+
+ if (of_address_to_resource(node, 0, &res))
+ return -ENODEV;
+
+ base = ioremap(res.start, resource_size(&res));
+ if (!base)
+ return -ENOMEM;
+
+ if (writethrough) {
+ writel(readl(base) | L2_WRITETHROUGH_KIRKWOOD, base);
+ feroceon_l2_init(1);
+ } else {
+ writel(readl(base) & ~L2_WRITETHROUGH_KIRKWOOD, base);
+ feroceon_l2_init(0);
+ }
+
+ return 0;
+}
+#endif
--
1.8.5.3
^ permalink raw reply related
* [PATCH 09/21] ARM: Orion: Move cache-feroceon-l2.h out of plat-orion
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
With the gradual move to DT, kirkwood has become a lot less dependent
on plat-orion. cache-feroceon-l2.h is the last dependency. Move it out
so we can drop plat-orion when building DT only kirkwood boards.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/include/asm/hardware/cache-feroceon-l2.h | 11 +++++++++++
arch/arm/mach-kirkwood/board-dt.c | 2 +-
arch/arm/mach-kirkwood/common.c | 2 +-
arch/arm/mach-mv78xx0/common.c | 2 +-
arch/arm/mm/cache-feroceon-l2.c | 2 +-
arch/arm/plat-orion/include/plat/cache-feroceon-l2.h | 11 -----------
6 files changed, 15 insertions(+), 15 deletions(-)
create mode 100644 arch/arm/include/asm/hardware/cache-feroceon-l2.h
delete mode 100644 arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
diff --git a/arch/arm/include/asm/hardware/cache-feroceon-l2.h b/arch/arm/include/asm/hardware/cache-feroceon-l2.h
new file mode 100644
index 000000000000..8edd330aabf6
--- /dev/null
+++ b/arch/arm/include/asm/hardware/cache-feroceon-l2.h
@@ -0,0 +1,11 @@
+/*
+ * arch/arm/include/asm/hardware/cache-feroceon-l2.h
+ *
+ * Copyright (C) 2008 Marvell Semiconductor
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+extern void __init feroceon_l2_init(int l2_wt_override);
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index 91b61a971af2..34c35510fd17 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -20,11 +20,11 @@
#include <linux/dma-mapping.h>
#include <linux/irqchip.h>
#include <linux/kexec.h>
+#include <asm/hardware/cache-feroceon-l2.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/bridge-regs.h>
#include <plat/common.h>
-#include <plat/cache-feroceon-l2.h>
#include <plat/pcie.h>
#include "pm.h"
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 52aca25432a7..255f33a3903c 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -25,10 +25,10 @@
#include <asm/page.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
+#include <asm/hardware/cache-feroceon-l2.h>
#include <mach/kirkwood.h>
#include <mach/bridge-regs.h>
#include <linux/platform_data/asoc-kirkwood.h>
-#include <plat/cache-feroceon-l2.h>
#include <linux/platform_data/mmc-mvsdio.h>
#include <linux/platform_data/mtd-orion_nand.h>
#include <linux/platform_data/usb-ehci-orion.h>
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 75062eff2494..e6ac679bece9 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -15,11 +15,11 @@
#include <linux/ata_platform.h>
#include <linux/clk-provider.h>
#include <linux/ethtool.h>
+#include <asm/hardware/cache-feroceon-l2.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <mach/mv78xx0.h>
#include <mach/bridge-regs.h>
-#include <plat/cache-feroceon-l2.h>
#include <linux/platform_data/usb-ehci-orion.h>
#include <linux/platform_data/mtd-orion_nand.h>
#include <plat/time.h>
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 48bc3c0a87ce..898362e7972b 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -16,7 +16,7 @@
#include <linux/highmem.h>
#include <asm/cacheflush.h>
#include <asm/cp15.h>
-#include <plat/cache-feroceon-l2.h>
+#include <asm/hardware/cache-feroceon-l2.h>
/*
* Low-level cache maintenance operations.
diff --git a/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h b/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
deleted file mode 100644
index 06f982d55697..000000000000
--- a/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
- *
- * Copyright (C) 2008 Marvell Semiconductor
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-extern void __init feroceon_l2_init(int l2_wt_override);
--
1.8.5.3
^ permalink raw reply related
* [PATCH 08/21] ARM: MVEBU: Add ARCH_MULTI_V7 to SoCs
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
Prepare mach-mvebu to house both ARCH_MULTI_V7 and ARCH_MULTI_V5
systems by adding ARCH_MULTI_V7 to the existing SOCs.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-mvebu/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 5e269d7263ce..9ab22e1b26cd 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -29,7 +29,7 @@ config MACH_ARMADA_370_XP
select CPU_PJ4B
config MACH_ARMADA_370
- bool "Marvell Armada 370 boards"
+ bool "Marvell Armada 370 boards" if ARCH_MULTI_V7
select ARMADA_370_CLK
select MACH_ARMADA_370_XP
select PINCTRL_ARMADA_370
@@ -38,7 +38,7 @@ config MACH_ARMADA_370
on the Marvell Armada 370 SoC with device tree.
config MACH_ARMADA_XP
- bool "Marvell Armada XP boards"
+ bool "Marvell Armada XP boards" if ARCH_MULTI_V7
select ARMADA_XP_CLK
select MACH_ARMADA_370_XP
select PINCTRL_ARMADA_XP
--
1.8.5.3
^ permalink raw reply related
* [PATCH 07/21] ARM: Kirkwood: ioremap memory control register
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
To allow removal of the global map of registers, make the pm code
ioremap the registers it needs.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-kirkwood/include/mach/bridge-regs.h | 1 +
arch/arm/mach-kirkwood/pm.c | 9 ++++++---
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index 2bd12fde1781..6e5077e2ec26 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -80,5 +80,6 @@
#define CGC_RESERVED (0x6 << 21)
#define MEMORY_PM_CTRL (BRIDGE_VIRT_BASE + 0x118)
+#define MEMORY_PM_CTRL_PHYS (BRIDGE_PHYS_BASE + 0x118)
#endif
diff --git a/arch/arm/mach-kirkwood/pm.c b/arch/arm/mach-kirkwood/pm.c
index c6ab8d9303a5..8e5e0329d04c 100644
--- a/arch/arm/mach-kirkwood/pm.c
+++ b/arch/arm/mach-kirkwood/pm.c
@@ -21,15 +21,16 @@
#include "common.h"
static void __iomem *ddr_operation_base;
+static void __iomem *memory_pm_ctrl;
static void kirkwood_low_power(void)
{
u32 mem_pm_ctrl;
- mem_pm_ctrl = readl(MEMORY_PM_CTRL);
+ mem_pm_ctrl = readl(memory_pm_ctrl);
/* Set peripherals to low-power mode */
- writel_relaxed(~0, MEMORY_PM_CTRL);
+ writel_relaxed(~0, memory_pm_ctrl);
/* Set DDR in self-refresh */
writel_relaxed(0x7, ddr_operation_base);
@@ -41,7 +42,7 @@ static void kirkwood_low_power(void)
*/
cpu_do_idle();
- writel_relaxed(mem_pm_ctrl, MEMORY_PM_CTRL);
+ writel_relaxed(mem_pm_ctrl, memory_pm_ctrl);
}
static int kirkwood_suspend_enter(suspend_state_t state)
@@ -69,5 +70,7 @@ static const struct platform_suspend_ops kirkwood_suspend_ops = {
void __init kirkwood_pm_init(void)
{
ddr_operation_base = ioremap(DDR_OPERATION_BASE, 4);
+ memory_pm_ctrl = ioremap(MEMORY_PM_CTRL_PHYS, 4);
+
suspend_set_ops(&kirkwood_suspend_ops);
}
--
1.8.5.3
^ permalink raw reply related
* [PATCH 06/21] ARM: Kirkwood: ioremap the cpu_config register before using it.
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
With the move to mach-mvebu and MULTI_V5, the global iomap for all
registers will be going away. So explicitly map the CPU configuration
register before using it.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-kirkwood/board-dt.c | 22 +++++++++++++++-------
arch/arm/mach-kirkwood/include/mach/bridge-regs.h | 1 +
2 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index 64151a4a378f..91b61a971af2 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -191,15 +191,23 @@ eth_fixup_skip:
}
}
+/*
+ * Disable propagation of mbus errors to the CPU local bus, as this
+ * causes mbus errors (which can occur for example for PCI aborts) to
+ * throw CPU aborts, which we're not set up to deal with.
+ */
+void kirkwood_disable_mbus_error_propagation(void)
+{
+ void __iomem *cpu_config;
+
+ cpu_config = ioremap(CPU_CONFIG_PHYS, 4);
+ writel(readl(cpu_config) & ~CPU_CONFIG_ERROR_PROP, cpu_config);
+}
+
+
static void __init kirkwood_dt_init(void)
{
- /*
- * Disable propagation of mbus errors to the CPU local bus,
- * as this causes mbus errors (which can occur for example
- * for PCI aborts) to throw CPU aborts, which we're not set
- * up to deal with.
- */
- writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
+ kirkwood_disable_mbus_error_propagation();
BUG_ON(mvebu_mbus_dt_init());
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index 8b9d1c9ff199..2bd12fde1781 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -14,6 +14,7 @@
#include <mach/kirkwood.h>
#define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0100)
+#define CPU_CONFIG_PHYS (BRIDGE_PHYS_BASE + 0x0100)
#define CPU_CONFIG_ERROR_PROP 0x00000004
#define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104)
--
1.8.5.3
^ permalink raw reply related
* [PATCH 05/21] ARM: Kirkwood: Seperate board-dt from common and pcie code.
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
In order to be able to move DT support into mach-mvebu, the DT code
needs to be cleanly separated from common and pcie code. Import the
needed bits of these files into board-dt.c. The "common" code then
becomes purely legacy, supporting none DT boards, so reflect this in
the Makefile targets.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-kirkwood/Makefile | 3 +-
arch/arm/mach-kirkwood/board-dt.c | 88 ++++++++++++++++++++++++++++++++++++++-
2 files changed, 88 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index dc22bf5b21ed..3a72c5c6e747 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -1,5 +1,4 @@
-obj-y += common.o pcie.o
-obj-$(CONFIG_KIRKWOOD_LEGACY) += irq.o mpp.o
+obj-$(CONFIG_KIRKWOOD_LEGACY) += irq.o mpp.o common.o pcie.o
obj-$(CONFIG_PM) += pm.o
obj-$(CONFIG_MACH_D2NET_V2) += d2net_v2-setup.o lacie_v2-common.o
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index a0c0ff39788e..64151a4a378f 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -21,11 +21,97 @@
#include <linux/irqchip.h>
#include <linux/kexec.h>
#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
#include <mach/bridge-regs.h>
#include <plat/common.h>
-#include "common.h"
+#include <plat/cache-feroceon-l2.h>
+#include <plat/pcie.h>
#include "pm.h"
+static struct map_desc kirkwood_io_desc[] __initdata = {
+ {
+ .virtual = (unsigned long) KIRKWOOD_REGS_VIRT_BASE,
+ .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
+ .length = KIRKWOOD_REGS_SIZE,
+ .type = MT_DEVICE,
+ },
+};
+
+static void __init kirkwood_map_io(void)
+{
+ iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
+}
+
+static void __init kirkwood_l2_init(void)
+{
+#ifdef CONFIG_CACHE_FEROCEON_L2
+#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
+ writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
+ feroceon_l2_init(1);
+#else
+ writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
+ feroceon_l2_init(0);
+#endif
+#endif
+}
+
+static struct resource kirkwood_cpufreq_resources[] = {
+ [0] = {
+ .start = CPU_CONTROL_PHYS,
+ .end = CPU_CONTROL_PHYS + 3,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device kirkwood_cpufreq_device = {
+ .name = "kirkwood-cpufreq",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(kirkwood_cpufreq_resources),
+ .resource = kirkwood_cpufreq_resources,
+};
+
+static void __init kirkwood_cpufreq_init(void)
+{
+ platform_device_register(&kirkwood_cpufreq_device);
+}
+
+static struct resource kirkwood_cpuidle_resource[] = {
+ {
+ .flags = IORESOURCE_MEM,
+ .start = DDR_OPERATION_BASE,
+ .end = DDR_OPERATION_BASE + 3,
+ },
+};
+
+static struct platform_device kirkwood_cpuidle = {
+ .name = "kirkwood_cpuidle",
+ .id = -1,
+ .resource = kirkwood_cpuidle_resource,
+ .num_resources = 1,
+};
+
+static void __init kirkwood_cpuidle_init(void)
+{
+ platform_device_register(&kirkwood_cpuidle);
+}
+
+/* Temporary here since mach-mvebu has a function we can use */
+static void kirkwood_restart(enum reboot_mode mode, const char *cmd)
+{
+ /*
+ * Enable soft reset to assert RSTOUTn.
+ */
+ writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+ /*
+ * Assert soft reset.
+ */
+ writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+ while (1)
+ ;
+}
+
#define MV643XX_ETH_MAC_ADDR_LOW 0x0414
#define MV643XX_ETH_MAC_ADDR_HIGH 0x0418
--
1.8.5.3
^ permalink raw reply related
* [PATCH 04/21] ARM: Kirkwood: Drop printing the SoC type and revision
From: Andrew Lunn @ 2014-02-06 23:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391730137-14814-1-git-send-email-andrew@lunn.ch>
This will be added back using the mach-mvebu equivelent once the move
has been made.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-kirkwood/board-dt.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index e74b31aa9736..a0c0ff39788e 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -107,8 +107,6 @@ eth_fixup_skip:
static void __init kirkwood_dt_init(void)
{
- pr_info("Kirkwood: %s.\n", kirkwood_id());
-
/*
* Disable propagation of mbus errors to the CPU local bus,
* as this causes mbus errors (which can occur for example
--
1.8.5.3
^ permalink raw reply related
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