* [PATCH 0/7] Remove HAVE_PWM config option
From: Jingoo Han @ 2014-02-10 1:07 UTC (permalink / raw)
To: linux-arm-kernel
The HAVE_PWM symbol is only for legacy platforms that provide
the PWM API without using the generic framework, while PWM symbol
is used for PWM drivers using the generic PWM framework.
I looked at all HAVE_PWMs in the latest mainline kernel 3.14-rc1.
Three platforms are still using HAVE_PWM as below:
1. ARM - PXA
./arch/arm/mach-pxa/Kconfig
2. ARM - NXP LPC32XX
./arch/arm/Kconfig
config ARCH_LPC32XX
select HAVE_PWM
3. MIPS - Ingenic JZ4740 based machines
./arch/mips/Kconfig
config MACH_JZ4740
select HAVE_PWM
However, the legacy PWM drivers for PXA, LPC32XX, and JZ474 were
already moved to the generic PWM framework.
./drivers/pwm/pwm-pxa.c
./drivers/pwm/pwm-lpc32xx.c
./drivers/pwm/pwm-jz4740.c
In conclusion, HAVE_PWM should be removed, because HAVE_PWM is
NOT required anymore.
Jingoo Han (7):
ARM: pxa: don't select HAVE_PWM
ARM: lpc32xx: don't select HAVE_PWM
ARM: remove HAVE_PWM config option
MIPS: jz4740: don't select HAVE_PWM
Input: max8997_haptic: remove HAVE_PWM dependencies
Input: pwm-beepe: remove HAVE_PWM dependencies
pwm: don't use IS_ENABLED(CONFIG_HAVE_PWM)
arch/arm/Kconfig | 4 ----
arch/arm/mach-pxa/Kconfig | 15 ---------------
arch/mips/Kconfig | 1 -
drivers/input/misc/Kconfig | 4 ++--
include/linux/pwm.h | 2 +-
5 files changed, 3 insertions(+), 23 deletions(-)
I would like to merge these patches as below:
1. Through arm-soc tree
[PATCH 1/7] ARM: pxa: don't select HAVE_PWM
[PATCH 2/7] ARM: lpc32xx: don't select HAVE_PWM
[PATCH 3/7] ARM: remove HAVE_PWM config option
2. Through MIPS tree
[PATCH 4/7] MIPS: jz4740: don't select HAVE_PWM
3. Through Input tree
[PATCH 5/7] Input: max8997_haptic: remove HAVE_PWM dependencies
[PATCH 6/7] Input: pwm-beepe: remove HAVE_PWM dependencies
4. Through PWM tree
[PATCH 7/7] pwm: don't use IS_ENABLED(CONFIG_HAVE_PWM)
After merging these patches, all HAVE_PWM will be removed from
the mainline kernel. Thank you. :-)
Best regards,
Jingoo Han
^ permalink raw reply
* [PATCH 1/7] ARM: pxa: don't select HAVE_PWM
From: Jingoo Han @ 2014-02-10 1:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <003901cf25fc$73002790$590076b0$%han@samsung.com>
The HAVE_PWM symbol is only for legacy platforms that provide
the PWM API without using the generic framework. PXA platforms
use the generic PWM framework, after the commit "17b2b47 pwm:
Move PXA PWM driver to PWM framework".
In the case of "CONFIG_HAVE_PWM=y && CONFIG_PWM=n", PXA platforms
make the build errors as below. Thus, selecting HAVE_PWM should
be removed from PXA platforms.
drivers/built-in.o: In function `lm3630a_pwm_ctrl':
drivers/video/backlight/lm3630a_bl.c:168: undefined reference to `pwm_config'
drivers/video/backlight/lm3630a_bl.c:172: undefined reference to `pwm_disable'
drivers/video/backlight/lm3630a_bl.c:170: undefined reference to `pwm_enable'
drivers/built-in.o: In function `lp855x_pwm_ctrl':
drivers/video/backlight/lp855x_bl.c:249: undefined reference to `pwm_config'
drivers/video/backlight/lp855x_bl.c:253: undefined reference to `pwm_disable'
drivers/video/backlight/lp855x_bl.c:251: undefined reference to `pwm_enable'
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
---
arch/arm/mach-pxa/Kconfig | 15 ---------------
1 file changed, 15 deletions(-)
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 96100db..b96244c 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -7,7 +7,6 @@ comment "Intel/Marvell Dev Platforms (sorted by hardware release time)"
config MACH_PXA3XX_DT
bool "Support PXA3xx platforms from device tree"
select CPU_PXA300
- select HAVE_PWM
select POWER_SUPPLY
select PXA3xx
select USE_OF
@@ -23,12 +22,10 @@ config ARCH_LUBBOCK
config MACH_MAINSTONE
bool "Intel HCDDBBVA0 Development Platform (aka Mainstone)"
- select HAVE_PWM
select PXA27x
config MACH_ZYLONITE
bool
- select HAVE_PWM
select PXA3xx
config MACH_ZYLONITE300
@@ -69,7 +66,6 @@ config ARCH_PXA_IDP
config ARCH_VIPER
bool "Arcom/Eurotech VIPER SBC"
select ARCOM_PCMCIA
- select HAVE_PWM
select I2C_GPIO
select ISA
select PXA25x
@@ -120,7 +116,6 @@ config MACH_CM_X300
bool "CompuLab CM-X300 modules"
select CPU_PXA300
select CPU_PXA310
- select HAVE_PWM
select PXA3xx
config MACH_CAPC7117
@@ -211,7 +206,6 @@ config TRIZEPS_PCMCIA
config MACH_LOGICPD_PXA270
bool "LogicPD PXA270 Card Engine Development Platform"
- select HAVE_PWM
select PXA27x
config MACH_PCM027
@@ -222,7 +216,6 @@ config MACH_PCM027
config MACH_PCM990_BASEBOARD
bool "PHYTEC PCM-990 development board"
depends on MACH_PCM027
- select HAVE_PWM
choice
prompt "display on pcm990"
@@ -246,7 +239,6 @@ config MACH_COLIBRI
config MACH_COLIBRI_PXA270_INCOME
bool "Income s.r.o. PXA270 SBC"
depends on MACH_COLIBRI
- select HAVE_PWM
select PXA27x
config MACH_COLIBRI300
@@ -275,7 +267,6 @@ comment "End-user Products (sorted by vendor name)"
config MACH_H4700
bool "HP iPAQ hx4700"
- select HAVE_PWM
select IWMMXT
select PXA27x
@@ -289,14 +280,12 @@ config MACH_HIMALAYA
config MACH_MAGICIAN
bool "Enable HTC Magician Support"
- select HAVE_PWM
select IWMMXT
select PXA27x
config MACH_MIOA701
bool "Mitac Mio A701 Support"
select GPIO_SYSFS
- select HAVE_PWM
select IWMMXT
select PXA27x
help
@@ -306,7 +295,6 @@ config MACH_MIOA701
config PXA_EZX
bool "Motorola EZX Platform"
- select HAVE_PWM
select IWMMXT
select PXA27x
@@ -346,7 +334,6 @@ config MACH_MP900C
config ARCH_PXA_PALM
bool "PXA based Palm PDAs"
- select HAVE_PWM
config MACH_PALM27X
bool
@@ -444,7 +431,6 @@ config MACH_TREO680
config MACH_RAUMFELD_RC
bool "Raumfeld Controller"
select CPU_PXA300
- select HAVE_PWM
select POWER_SUPPLY
select PXA3xx
@@ -608,7 +594,6 @@ config MACH_E800
config MACH_ZIPIT2
bool "Zipit Z2 Handheld"
- select HAVE_PWM
select PXA27x
endmenu
--
1.7.10.4
^ permalink raw reply related
* [PATCH 2/7] ARM: lpc32xx: don't select HAVE_PWM
From: Jingoo Han @ 2014-02-10 1:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <003901cf25fc$73002790$590076b0$%han@samsung.com>
The HAVE_PWM symbol is only for legacy platforms that provide
the PWM API without using the generic framework. The lpc32xx
platforms use the generic PWM framework, after the commit "2132fa8
pwm: add lpc32xx PWM support".
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
---
arch/arm/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e254198..897fa15 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -632,7 +632,6 @@ config ARCH_LPC32XX
select CPU_ARM926T
select GENERIC_CLOCKEVENTS
select HAVE_IDE
- select HAVE_PWM
select USB_ARCH_HAS_OHCI
select USE_OF
help
--
1.7.10.4
^ permalink raw reply related
* [PATCH 3/7] ARM: remove HAVE_PWM config option
From: Jingoo Han @ 2014-02-10 1:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <003901cf25fc$73002790$590076b0$%han@samsung.com>
The HAVE_PWM symbol is only for legacy platforms that provide
the PWM API without using the generic framework. However, legacy
PWM drivers for ARM platforms were already moved to the generic
PWM framework. Thus, HAVE_PWM should be removed, because HAVE_PWM
is not required anymore.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
---
arch/arm/Kconfig | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 897fa15..cc6ce44 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -113,9 +113,6 @@ config ARM_DMA_IOMMU_ALIGNMENT
endif
-config HAVE_PWM
- bool
-
config MIGHT_HAVE_PCI
bool
--
1.7.10.4
^ permalink raw reply related
* [PATCH 2/2] clocksource: Make clocksource register functions void
From: Yijing Wang @ 2014-02-10 1:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.DEB.2.02.1402052139560.24986@ionos.tec.linutronix.de>
On 2014/2/6 4:40, Thomas Gleixner wrote:
> Yijing,
>
> On Thu, 23 Jan 2014, David Laight wrote:
>
>> From: Linuxppc-dev Tony Prisk
>>> On 23/01/14 20:12, Yijing Wang wrote:
>>>> Currently, clocksource_register() and __clocksource_register_scale()
>>>> functions always return 0, it's pointless, make functions void.
>>>> And remove the dead code that check the clocksource_register_hz()
>>>> return value.
>>> ......
>>>> -static inline int clocksource_register_hz(struct clocksource *cs, u32 hz)
>>>> +static inline void clocksource_register_hz(struct clocksource *cs, u32 hz)
>>>> {
>>>> return __clocksource_register_scale(cs, 1, hz);
>>>> }
>>>
>>> This doesn't make sense - you are still returning a value on a function
>>> declared void, and the return is now from a function that doesn't return
>>> anything either ?!?!
>>> Doesn't this throw a compile-time warning??
>>
>> It depends on the compiler.
>> Recent gcc allow it.
>> I don't know if it is actually valid C though.
>>
>> There is no excuse for it on lines like the above though.
>
> Can you please resend with that fixed against 3.14-rc1 ?
OK, I will resend later.
Thanks!
Yijing.
>
> .
>
--
Thanks!
Yijing
^ permalink raw reply
* [PATCH] ARM: multiplatform: remove reference to ARCH_MULTI_V4
From: Paul Bolle @ 2014-02-10 1:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201307141034.42868.arnd@arndb.de>
On Sun, 2013-07-14 at 10:34 +0200, Arnd Bergmann wrote:
> On Saturday 13 July 2013, Paul Bolle wrote:
> > The Kconfig symbol ARCH_MULTI_V4 was removed in commit 24e860fbfd
> > ("ARM: multiplatform: always pick one CPU type"). Remove the last
> > reference to it too.
> >
> > Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
> > ---
> > 0) Untested.
> >
> > 1) Commit 24e860fbfd is silent on the reason to drop ARCH_MULTI_V4. And
> > the ARM section of the Kconfig files is rather complicated for people,
> > like me, that aren't familiar with the way the ARM universe is divided
> > in architectures, machines, platforms, etc. That makes it hard to say
> > whether ARCH_MULTI_V4 was dropped on purpose or by accident.
>
> It was dropped on purpose because it is unused in 3.11 but it will
> be used again in 3.12, so I wouldn't bother with your patch.
>
> Thanks anyway for looking into unused symbols, I think checking for
> unused code like this is very useful in general.
We're now at v3.14-rc1 and ARCH_MULTI_V4 is still unused. Are there still plans to
use it again?
Paul Bolle
^ permalink raw reply
* [Update][PATCH 1/2] clocksource: Remove outdated comments
From: Yijing Wang @ 2014-02-10 1:58 UTC (permalink / raw)
To: linux-arm-kernel
clocksource_register() and __clocksource_register_scale()
always return 0, so the comment is just pointless, it's
outdated, remove it.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
kernel/time/clocksource.c | 3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
index ba3e502..9951575 100644
--- a/kernel/time/clocksource.c
+++ b/kernel/time/clocksource.c
@@ -779,8 +779,6 @@ EXPORT_SYMBOL_GPL(__clocksource_updatefreq_scale);
* @scale: Scale factor multiplied against freq to get clocksource hz
* @freq: clocksource frequency (cycles per second) divided by scale
*
- * Returns -EBUSY if registration fails, zero otherwise.
- *
* This *SHOULD NOT* be called directly! Please use the
* clocksource_register_hz() or clocksource_register_khz helper functions.
*/
@@ -805,7 +803,6 @@ EXPORT_SYMBOL_GPL(__clocksource_register_scale);
* clocksource_register - Used to install new clocksources
* @cs: clocksource to be registered
*
- * Returns -EBUSY if registration fails, zero otherwise.
*/
int clocksource_register(struct clocksource *cs)
{
--
1.7.1
^ permalink raw reply related
* [Update][PATCH 2/2] clocksource: Make clocksource register functions void
From: Yijing Wang @ 2014-02-10 1:58 UTC (permalink / raw)
To: linux-arm-kernel
Currently, clocksource_register() and __clocksource_register_scale()
functions always return 0, it's pointless, make functions void.
And remove the dead code that check the clocksource_register_hz()
return value.
Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Acked-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
arch/arm/mach-davinci/time.c | 5 ++---
arch/arm/mach-msm/timer.c | 4 +---
arch/arm/mach-omap2/timer.c | 8 +++-----
arch/avr32/kernel/time.c | 4 +---
arch/blackfin/kernel/time-ts.c | 6 ++----
arch/microblaze/kernel/timer.c | 3 +--
arch/mips/jz4740/time.c | 6 +-----
arch/mips/loongson/common/cs5536/cs5536_mfgpt.c | 3 ++-
arch/openrisc/kernel/time.c | 3 +--
arch/powerpc/kernel/time.c | 6 +-----
arch/um/kernel/time.c | 6 +-----
arch/x86/platform/uv/uv_time.c | 14 ++++++--------
drivers/clocksource/acpi_pm.c | 3 ++-
drivers/clocksource/cadence_ttc_timer.c | 6 +-----
drivers/clocksource/exynos_mct.c | 4 +---
drivers/clocksource/i8253.c | 3 ++-
drivers/clocksource/mmio.c | 3 ++-
drivers/clocksource/samsung_pwm_timer.c | 5 +----
drivers/clocksource/scx200_hrt.c | 3 ++-
drivers/clocksource/tcb_clksrc.c | 8 +-------
drivers/clocksource/timer-marco.c | 2 +-
drivers/clocksource/timer-prima2.c | 2 +-
drivers/clocksource/vt8500_timer.c | 4 +---
include/linux/clocksource.h | 8 ++++----
kernel/time/clocksource.c | 6 ++----
kernel/time/jiffies.c | 3 ++-
26 files changed, 45 insertions(+), 83 deletions(-)
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 24ad30f..92b772f 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -387,9 +387,8 @@ void __init davinci_timer_init(void)
/* setup clocksource */
clocksource_davinci.name = id_to_name[clocksource_id];
- if (clocksource_register_hz(&clocksource_davinci,
- davinci_clock_tick_rate))
- printk(err, clocksource_davinci.name);
+ clocksource_register_hz(&clocksource_davinci,
+ davinci_clock_tick_rate);
sched_clock_register(davinci_read_sched_clock, 32,
davinci_clock_tick_rate);
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index fd16449..ab485bc 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -226,9 +226,7 @@ static void __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq,
err:
writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE);
- res = clocksource_register_hz(cs, dgt_hz);
- if (res)
- pr_err("clocksource_register failed\n");
+ clocksource_register_hz(cs, dgt_hz);
sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz);
}
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 74044aa..032e1da 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -473,11 +473,9 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
OMAP_TIMER_NONPOSTED);
sched_clock_register(dmtimer_read_sched_clock, 32, clksrc.rate);
- if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
- pr_err("Could not register clocksource %s\n",
- clocksource_gpt.name);
- else
- pr_info("OMAP clocksource: %s at %lu Hz\n",
+ clocksource_register_hz(&clocksource_gpt, clksrc.rate);
+
+ pr_info("OMAP clocksource: %s at %lu Hz\n",
clocksource_gpt.name, clksrc.rate);
}
diff --git a/arch/avr32/kernel/time.c b/arch/avr32/kernel/time.c
index d0f771b..51b4a66 100644
--- a/arch/avr32/kernel/time.c
+++ b/arch/avr32/kernel/time.c
@@ -134,9 +134,7 @@ void __init time_init(void)
/* figure rate for counter */
counter_hz = clk_get_rate(boot_cpu_data.clk);
- ret = clocksource_register_hz(&counter, counter_hz);
- if (ret)
- pr_debug("timer: could not register clocksource: %d\n", ret);
+ clocksource_register_hz(&counter, counter_hz);
/* setup COMPARE clockevent */
comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift);
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index cb0a484..df3bb08 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -51,8 +51,7 @@ static inline unsigned long long bfin_cs_cycles_sched_clock(void)
static int __init bfin_cs_cycles_init(void)
{
- if (clocksource_register_hz(&bfin_cs_cycles, get_cclk()))
- panic("failed to register clocksource");
+ clocksource_register_hz(&bfin_cs_cycles, get_cclk());
return 0;
}
@@ -103,8 +102,7 @@ static int __init bfin_cs_gptimer0_init(void)
{
setup_gptimer0();
- if (clocksource_register_hz(&bfin_cs_gptimer0, get_sclk()))
- panic("failed to register clocksource");
+ clocksource_register_hz(&bfin_cs_gptimer0, get_sclk());
return 0;
}
diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c
index fb0c614..5b8ec44 100644
--- a/arch/microblaze/kernel/timer.c
+++ b/arch/microblaze/kernel/timer.c
@@ -213,8 +213,7 @@ static struct clocksource clocksource_microblaze = {
static int __init xilinx_clocksource_init(void)
{
- if (clocksource_register_hz(&clocksource_microblaze, timer_clock_freq))
- panic("failed to register clocksource");
+ clocksource_register_hz(&clocksource_microblaze, timer_clock_freq);
/* stop timer1 */
out_be32(timer_baseaddr + TCSR1,
diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c
index 5e430ce..041cdff 100644
--- a/arch/mips/jz4740/time.c
+++ b/arch/mips/jz4740/time.c
@@ -105,7 +105,6 @@ static struct irqaction timer_irqaction = {
void __init plat_time_init(void)
{
- int ret;
uint32_t clk_rate;
uint16_t ctrl;
@@ -121,10 +120,7 @@ void __init plat_time_init(void)
clockevents_register_device(&jz4740_clockevent);
- ret = clocksource_register_hz(&jz4740_clocksource, clk_rate);
-
- if (ret)
- printk(KERN_ERR "Failed to register clocksource: %d\n", ret);
+ clocksource_register_hz(&jz4740_clocksource, clk_rate);
setup_irq(JZ4740_IRQ_TCU0, &timer_irqaction);
diff --git a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
index c639b9d..9fa6d99 100644
--- a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
+++ b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
@@ -208,7 +208,8 @@ int __init init_mfgpt_clocksource(void)
if (num_possible_cpus() > 1) /* MFGPT does not scale! */
return 0;
- return clocksource_register_hz(&clocksource_mfgpt, MFGPT_TICK_RATE);
+ clocksource_register_hz(&clocksource_mfgpt, MFGPT_TICK_RATE);
+ return 0;
}
arch_initcall(init_mfgpt_clocksource);
diff --git a/arch/openrisc/kernel/time.c b/arch/openrisc/kernel/time.c
index 7c52e94..3f789aa 100644
--- a/arch/openrisc/kernel/time.c
+++ b/arch/openrisc/kernel/time.c
@@ -156,8 +156,7 @@ static struct clocksource openrisc_timer = {
static int __init openrisc_timer_init(void)
{
- if (clocksource_register_hz(&openrisc_timer, cpuinfo.clock_frequency))
- panic("failed to register clocksource");
+ clocksource_register_hz(&openrisc_timer, cpuinfo.clock_frequency);
/* Enable the incrementer: 'continuous' mode with interrupt disabled */
mtspr(SPR_TTMR, SPR_TTMR_CR);
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index b3dab20..2e66b6f 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -792,11 +792,7 @@ static void __init clocksource_init(void)
else
clock = &clocksource_timebase;
- if (clocksource_register_hz(clock, tb_ticks_per_sec)) {
- printk(KERN_ERR "clocksource: %s is already registered\n",
- clock->name);
- return;
- }
+ clocksource_register_hz(clock, tb_ticks_per_sec);
printk(KERN_INFO "clocksource: %s mult[%x] shift[%d] registered\n",
clock->name, clock->mult, clock->shift);
diff --git a/arch/um/kernel/time.c b/arch/um/kernel/time.c
index 117568d..2034b58 100644
--- a/arch/um/kernel/time.c
+++ b/arch/um/kernel/time.c
@@ -92,11 +92,7 @@ static void __init setup_itimer(void)
clockevent_delta2ns(60 * HZ, &itimer_clockevent);
itimer_clockevent.min_delta_ns =
clockevent_delta2ns(1, &itimer_clockevent);
- err = clocksource_register_hz(&itimer_clocksource, USEC_PER_SEC);
- if (err) {
- printk(KERN_ERR "clocksource_register_hz returned %d\n", err);
- return;
- }
+ clocksource_register_hz(&itimer_clocksource, USEC_PER_SEC);
clockevents_register_device(&itimer_clockevent);
}
diff --git a/arch/x86/platform/uv/uv_time.c b/arch/x86/platform/uv/uv_time.c
index 5c86786..b963774 100644
--- a/arch/x86/platform/uv/uv_time.c
+++ b/arch/x86/platform/uv/uv_time.c
@@ -379,15 +379,13 @@ static __init int uv_rtc_setup_clock(void)
if (!is_uv_system())
return -ENODEV;
- rc = clocksource_register_hz(&clocksource_uv, sn_rtc_cycles_per_second);
- if (rc)
- printk(KERN_INFO "UV RTC clocksource failed rc %d\n", rc);
- else
- printk(KERN_INFO "UV RTC clocksource registered freq %lu MHz\n",
- sn_rtc_cycles_per_second/(unsigned long)1E6);
+ clocksource_register_hz(&clocksource_uv, sn_rtc_cycles_per_second);
+
+ pr_info("UV RTC clocksource registered freq %lu MHz\n",
+ sn_rtc_cycles_per_second/(unsigned long)1E6);
- if (rc || !uv_rtc_evt_enable || x86_platform_ipi_callback)
- return rc;
+ if (!uv_rtc_evt_enable || x86_platform_ipi_callback)
+ return 0;
/* Setup and register clockevents */
rc = uv_rtc_allocate_timers();
diff --git a/drivers/clocksource/acpi_pm.c b/drivers/clocksource/acpi_pm.c
index 6eab889..ab1dc63 100644
--- a/drivers/clocksource/acpi_pm.c
+++ b/drivers/clocksource/acpi_pm.c
@@ -218,8 +218,9 @@ static int __init init_acpi_pm_clocksource(void)
return -ENODEV;
}
- return clocksource_register_hz(&clocksource_acpi_pm,
+ clocksource_register_hz(&clocksource_acpi_pm,
PMTMR_TICKS_PER_SEC);
+ return 0;
}
/* We use fs_initcall because we want the PCI fixups to have run
diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c
index 63f176d..b9b56ed 100644
--- a/drivers/clocksource/cadence_ttc_timer.c
+++ b/drivers/clocksource/cadence_ttc_timer.c
@@ -301,11 +301,7 @@ static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base)
__raw_writel(CNT_CNTRL_RESET,
ttccs->ttc.base_addr + TTC_CNT_CNTRL_OFFSET);
- err = clocksource_register_hz(&ttccs->cs, ttccs->ttc.freq / PRESCALE);
- if (WARN_ON(err)) {
- kfree(ttccs);
- return;
- }
+ clocksource_register_hz(&ttccs->cs, ttccs->ttc.freq / PRESCALE);
ttc_sched_clock_val_reg = base + TTC_COUNT_VAL_OFFSET;
sched_clock_register(ttc_sched_clock_read, 16, ttccs->ttc.freq / PRESCALE);
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index 48f76bc..fcb9454 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -197,9 +197,7 @@ struct clocksource mct_frc = {
static void __init exynos4_clocksource_init(void)
{
exynos4_mct_frc_start(0, 0);
-
- if (clocksource_register_hz(&mct_frc, clk_rate))
- panic("%s: can't register clocksource\n", mct_frc.name);
+ clocksource_register_hz(&mct_frc, clk_rate);
}
static void exynos4_mct_comp0_stop(void)
diff --git a/drivers/clocksource/i8253.c b/drivers/clocksource/i8253.c
index 14ee3ef..9c45f0a 100644
--- a/drivers/clocksource/i8253.c
+++ b/drivers/clocksource/i8253.c
@@ -95,7 +95,8 @@ static struct clocksource i8253_cs = {
int __init clocksource_i8253_init(void)
{
- return clocksource_register_hz(&i8253_cs, PIT_TICK_RATE);
+ clocksource_register_hz(&i8253_cs, PIT_TICK_RATE);
+ return 0;
}
#endif
diff --git a/drivers/clocksource/mmio.c b/drivers/clocksource/mmio.c
index c0e2512..6e0b530 100644
--- a/drivers/clocksource/mmio.c
+++ b/drivers/clocksource/mmio.c
@@ -69,5 +69,6 @@ int __init clocksource_mmio_init(void __iomem *base, const char *name,
cs->clksrc.mask = CLOCKSOURCE_MASK(bits);
cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
- return clocksource_register_hz(&cs->clksrc, hz);
+ clocksource_register_hz(&cs->clksrc, hz);
+ return 0;
}
diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
index 5645cfc..c59292f 100644
--- a/drivers/clocksource/samsung_pwm_timer.c
+++ b/drivers/clocksource/samsung_pwm_timer.c
@@ -340,7 +340,6 @@ static void __init samsung_clocksource_init(void)
{
unsigned long pclk;
unsigned long clock_rate;
- int ret;
pclk = clk_get_rate(pwm.timerclk);
@@ -361,9 +360,7 @@ static void __init samsung_clocksource_init(void)
pwm.variant.bits, clock_rate);
samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits);
- ret = clocksource_register_hz(&samsung_clocksource, clock_rate);
- if (ret)
- panic("samsung_clocksource_timer: can't register clocksource\n");
+ clocksource_register_hz(&samsung_clocksource, clock_rate);
}
static void __init samsung_timer_resources(void)
diff --git a/drivers/clocksource/scx200_hrt.c b/drivers/clocksource/scx200_hrt.c
index 64f9e82..57bdc04 100644
--- a/drivers/clocksource/scx200_hrt.c
+++ b/drivers/clocksource/scx200_hrt.c
@@ -83,7 +83,8 @@ static int __init init_hrt_clocksource(void)
pr_info("enabling scx200 high-res timer (%s MHz +%d ppm)\n", mhz27 ? "27":"1", ppm);
- return clocksource_register_hz(&cs_hrt, freq);
+ clocksource_register_hz(&cs_hrt, freq);
+ return 0;
}
module_init(init_hrt_clocksource);
diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
index 00fdd11..805245d 100644
--- a/drivers/clocksource/tcb_clksrc.c
+++ b/drivers/clocksource/tcb_clksrc.c
@@ -340,9 +340,7 @@ static int __init tcb_clksrc_init(void)
}
/* and away we go! */
- ret = clocksource_register_hz(&clksrc, divided_rate);
- if (ret)
- goto err_disable_t1;
+ clocksource_register_hz(&clksrc, divided_rate);
/* channel 2: periodic and oneshot timer support */
ret = setup_clkevents(tc, clk32k_divisor_idx);
@@ -354,10 +352,6 @@ static int __init tcb_clksrc_init(void)
err_unregister_clksrc:
clocksource_unregister(&clksrc);
-err_disable_t1:
- if (!tc->tcb_config || tc->tcb_config->counter_width != 32)
- clk_disable_unprepare(tc->clk[1]);
-
err_disable_t0:
clk_disable_unprepare(t0_clk);
diff --git a/drivers/clocksource/timer-marco.c b/drivers/clocksource/timer-marco.c
index 09a17d9..ae78ce0 100644
--- a/drivers/clocksource/timer-marco.c
+++ b/drivers/clocksource/timer-marco.c
@@ -283,7 +283,7 @@ static void __init sirfsoc_marco_timer_init(void)
/* Clear all interrupts */
writel_relaxed(0xFFFF, sirfsoc_timer_base + SIRFSOC_TIMER_INTR_STATUS);
- BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
+ clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE);
sirfsoc_clockevent_init();
}
diff --git a/drivers/clocksource/timer-prima2.c b/drivers/clocksource/timer-prima2.c
index 8a492d3..c9cc307 100644
--- a/drivers/clocksource/timer-prima2.c
+++ b/drivers/clocksource/timer-prima2.c
@@ -204,7 +204,7 @@ static void __init sirfsoc_prima2_timer_init(struct device_node *np)
writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS);
- BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
+ clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE);
sched_clock_register(sirfsoc_read_sched_clock, 64, CLOCK_TICK_RATE);
diff --git a/drivers/clocksource/vt8500_timer.c b/drivers/clocksource/vt8500_timer.c
index 1098ed3..13f5fa4 100644
--- a/drivers/clocksource/vt8500_timer.c
+++ b/drivers/clocksource/vt8500_timer.c
@@ -150,9 +150,7 @@ static void __init vt8500_timer_init(struct device_node *np)
writel(0xf, regbase + TIMER_STATUS_VAL);
writel(~0, regbase + TIMER_MATCH_VAL);
- if (clocksource_register_hz(&clocksource, VT8500_TIMER_HZ))
- pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n",
- __func__, clocksource.name);
+ clocksource_register_hz(&clocksource, VT8500_TIMER_HZ);
clockevent.cpumask = cpumask_of(0);
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 67301a4..5a17c5e 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -282,7 +282,7 @@ static inline s64 clocksource_cyc2ns(cycle_t cycles, u32 mult, u32 shift)
}
-extern int clocksource_register(struct clocksource*);
+extern void clocksource_register(struct clocksource *);
extern int clocksource_unregister(struct clocksource*);
extern void clocksource_touch_watchdog(void);
extern struct clocksource* clocksource_get_next(void);
@@ -301,17 +301,17 @@ clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec);
* Don't call __clocksource_register_scale directly, use
* clocksource_register_hz/khz
*/
-extern int
+extern void
__clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq);
extern void
__clocksource_updatefreq_scale(struct clocksource *cs, u32 scale, u32 freq);
-static inline int clocksource_register_hz(struct clocksource *cs, u32 hz)
+static inline void clocksource_register_hz(struct clocksource *cs, u32 hz)
{
return __clocksource_register_scale(cs, 1, hz);
}
-static inline int clocksource_register_khz(struct clocksource *cs, u32 khz)
+static inline void clocksource_register_khz(struct clocksource *cs, u32 khz)
{
return __clocksource_register_scale(cs, 1000, khz);
}
diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
index 9951575..686ff72 100644
--- a/kernel/time/clocksource.c
+++ b/kernel/time/clocksource.c
@@ -782,7 +782,7 @@ EXPORT_SYMBOL_GPL(__clocksource_updatefreq_scale);
* This *SHOULD NOT* be called directly! Please use the
* clocksource_register_hz() or clocksource_register_khz helper functions.
*/
-int __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq)
+void __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq)
{
/* Initialize mult/shift and max_idle_ns */
@@ -794,7 +794,6 @@ int __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq)
clocksource_enqueue_watchdog(cs);
clocksource_select();
mutex_unlock(&clocksource_mutex);
- return 0;
}
EXPORT_SYMBOL_GPL(__clocksource_register_scale);
@@ -804,7 +803,7 @@ EXPORT_SYMBOL_GPL(__clocksource_register_scale);
* @cs: clocksource to be registered
*
*/
-int clocksource_register(struct clocksource *cs)
+void clocksource_register(struct clocksource *cs)
{
/* calculate max adjustment for given mult/shift */
cs->maxadj = clocksource_max_adjustment(cs);
@@ -820,7 +819,6 @@ int clocksource_register(struct clocksource *cs)
clocksource_enqueue_watchdog(cs);
clocksource_select();
mutex_unlock(&clocksource_mutex);
- return 0;
}
EXPORT_SYMBOL(clocksource_register);
diff --git a/kernel/time/jiffies.c b/kernel/time/jiffies.c
index 7a925ba..ae4c534 100644
--- a/kernel/time/jiffies.c
+++ b/kernel/time/jiffies.c
@@ -88,7 +88,8 @@ EXPORT_SYMBOL(jiffies);
static int __init init_jiffies_clocksource(void)
{
- return clocksource_register(&clocksource_jiffies);
+ clocksource_register(&clocksource_jiffies);
+ return 0;
}
core_initcall(init_jiffies_clocksource);
--
1.7.1
^ permalink raw reply related
* [PATCH 1/2] ARM: imx_v4_v5_defconfig: Select CONFIG_MMC_UNSAFE_RESUME
From: Shawn Guo @ 2014-02-10 2:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391094252-10599-1-git-send-email-fabio.estevam@freescale.com>
On Thu, Jan 30, 2014 at 01:04:11PM -0200, Fabio Estevam wrote:
> PM subsystem treats mmc card as removed during suspend.
>
> If MMC is used to store the root file system, it is better to tell the kernel
> not to treat it as a removable media, so select CONFIG_MMC_UNSAFE_RESUME for
> such purpose.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Applied both, thanks.
^ permalink raw reply
* [PATCH] ARM: dts: i.MX51 babbage: Support diagnostic LED
From: Shawn Guo @ 2014-02-10 3:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391522263-17877-1-git-send-email-Ying.Liu@freescale.com>
On Tue, Feb 04, 2014 at 09:57:42PM +0800, Liu Ying wrote:
> The D25 LED controlled by gpio on the i.MX51 babbage
> board is a diagnostic LED according to the board design.
> This patch adds the relevant device tree nodes to the
> i.MX51 babbage device tree file to support this LED.
>
> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
> ---
> arch/arm/boot/dts/imx51-babbage.dts | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
> index be1407c..8d6a74b 100644
> --- a/arch/arm/boot/dts/imx51-babbage.dts
> +++ b/arch/arm/boot/dts/imx51-babbage.dts
> @@ -81,6 +81,17 @@
> };
> };
>
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&led_pin_gpio2_6>;
> +
> + led-diagnostic {
> + label = "diagnostic";
> + gpios = <&gpio2 6 0>;
Just out of curiosity, how will you use/trigger the led?
> + };
> + };
> +
> sound {
> compatible = "fsl,imx51-babbage-sgtl5000",
> "fsl,imx-audio-sgtl5000";
> @@ -280,6 +291,12 @@
> MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
> >;
> };
> +
> + led_pin_gpio2_6: led_gpio2_6 {
This might be copied from some existing file, but I would hope the name
can be more generic, something like the following
pinctrl_gpio_leds: gpioledsgrp {
, so that when we have more gpio controlled leds to add, we can just add
more pins into the same group without concerning the name.
Shawn
> + fsl,pins = <
> + MX51_PAD_EIM_D22__GPIO2_6 0x80000000
> + >;
> + };
> };
> };
>
> --
> 1.7.9.5
>
>
^ permalink raw reply
* [PATCH 1/3] ARM: dts: imx27-phytec-phycard-s-som: Sort entries
From: Shawn Guo @ 2014-02-10 3:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391525972-15810-1-git-send-email-shc_work@mail.ru>
On Tue, Feb 04, 2014 at 06:59:30PM +0400, Alexander Shiyan wrote:
> Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Applied all 3, thanks.
Shawn
> ---
> arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts | 36 ++++++++++++------------
> 1 file changed, 18 insertions(+), 18 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
> index e51e550..a28b6c7 100644
> --- a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
> +++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
> @@ -29,6 +29,24 @@
> status = "okay";
> };
>
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fec1>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +
> + at24 at 52 {
> + compatible = "at,24c32";
> + pagesize = <32>;
> + reg = <0x52>;
> + };
> +};
> +
> &iomuxc {
> imx27-phycard-s-som {
> pinctrl_fec1: fec1grp {
> @@ -62,21 +80,3 @@
> };
> };
> };
> -
> -&fec {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_fec1>;
> - status = "okay";
> -};
> -
> -&i2c2 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_i2c2>;
> - status = "okay";
> -
> - at24 at 52 {
> - compatible = "at,24c32";
> - pagesize = <32>;
> - reg = <0x52>;
> - };
> -};
> --
> 1.8.3.2
>
^ permalink raw reply
* [PATCH 1/2] ARM: dts: mx53: Remove 'enable-active-low' property
From: Shawn Guo @ 2014-02-10 3:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391605810-3285-1-git-send-email-fabio.estevam@freescale.com>
On Wed, Feb 05, 2014 at 11:10:09AM -0200, Fabio Estevam wrote:
> 'enable-active-low' is not a valid property for a GPIO controlled regulator.
>
> According to Documentation/devicetree/bindings/regulator/gpio-regulator.txt:
>
> "Optional properties:
> ...
> - enable-active-high : Polarity of GPIO is active high (default is low)."
>
> ,so the correct way to define an active-low GPIO controlled regulator is to
> simply not pass 'enable-active-high'.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Applied both, thanks.
^ permalink raw reply
* [PATCHv2 2/2] arm: Get rid of meminfo
From: Laura Abbott @ 2014-02-10 3:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140207020949.GQ1706@sonymobile.com>
On 2/6/2014 6:09 PM, Courtney Cavin wrote:
> On Wed, Feb 05, 2014 at 01:02:31AM +0100, Laura Abbott wrote:
>> memblock is now fully integrated into the kernel and is the prefered
>> method for tracking memory. Rather than reinvent the wheel with
>> meminfo, migrate to using memblock directly instead of meminfo as
>> an intermediate.
>>
>> Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
> [...]
>> diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
>> index 0b11c1a..51d814e 100644
>> --- a/arch/arm/mach-pxa/spitz.c
>> +++ b/arch/arm/mach-pxa/spitz.c
>> @@ -32,6 +32,7 @@
>> #include <linux/io.h>
>> #include <linux/module.h>
>> #include <linux/reboot.h>
>> +#include <linux/memblock.h>
>>
>> #include <asm/setup.h>
>> #include <asm/mach-types.h>
>> @@ -971,13 +972,9 @@ static void __init spitz_init(void)
>> spitz_i2c_init();
>> }
>>
>> -static void __init spitz_fixup(struct tag *tags, char **cmdline,
>> - struct meminfo *mi)
>> +static void __init spitz_fixup(struct tag *tags, char **cmdline)
>> {
>> - sharpsl_save_param();
>> - mi->nr_banks = 1;
>> - mi->bank[0].start = 0xa0000000;
>> - mi->bank[0].size = (64*1024*1024);
>> + memblock_addr(0xa0000000, SZ_64M);
>
> memblock_add() ?
Yes, that was a typo on my part. I'll send out a v3 with collected acks.
>
> -Courtney
>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply
* Re: [PATCH] ARM: dts: i.MX51 babbage: Support diagnostic LED
From: Alexander Shiyan @ 2014-02-10 4:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140210030214.GB9628@S2101-09.ap.freescale.net>
???????????, 10 ??????? 2014, 11:02 +08:00 ?? Shawn Guo <shawn.guo@linaro.org>:
> On Tue, Feb 04, 2014 at 09:57:42PM +0800, Liu Ying wrote:
> > The D25 LED controlled by gpio on the i.MX51 babbage
> > board is a diagnostic LED according to the board design.
> > This patch adds the relevant device tree nodes to the
> > i.MX51 babbage device tree file to support this LED.
> >
> > Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
> > ---
> > arch/arm/boot/dts/imx51-babbage.dts | 17 +++++++++++++++++
> > 1 file changed, 17 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/imx51-babbage.dts
> b/arch/arm/boot/dts/imx51-babbage.dts
> > index be1407c..8d6a74b 100644
> > --- a/arch/arm/boot/dts/imx51-babbage.dts
> > +++ b/arch/arm/boot/dts/imx51-babbage.dts
> > @@ -81,6 +81,17 @@
> > };
> > };
> >
> > + leds {
> > + compatible = "gpio-leds";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&led_pin_gpio2_6>;
> > +
> > + led-diagnostic {
> > + label = "diagnostic";
> > + gpios = <&gpio2 6 0>;
>
> Just out of curiosity, how will you use/trigger the led?
And GPIO bindings should be used to specify active level,
GPIO_ACTIVE_HIGH in this case.
---
^ permalink raw reply
* [PATCH] ARM: imx6q: support ptp and rmii clock from pad
From: Shawn Guo @ 2014-02-10 6:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140207104518.GA7085@frolo.macqel>
On Fri, Feb 07, 2014 at 11:45:18AM +0100, Philippe De Muyter wrote:
> Thanks, Shawn
>
> your patch works perfectly. I can now use the same kernel on my sabresd
> board (RGMII, enet_ref_clock generated by the imx6q) and my custom board
> (RMII, clock generated by the PHY).
That's great.
>
> some comments. though :
>
> the patch did not apply cleanly in clk-imx6q.c on v3.13
The patch targets v3.14-rc1, and if you need it for v3.13 you will need
to back port it.
>
> don't forget to complete Documentation/devicetree/bindings/
It requires change on device tree sources but not bindings. Which part
of Documentation/devicetree/bindings/ do you think we need to update?
Shawn
>
> But, again, many thanks for the support
>
> Philippe
>
>
> On Thu, Feb 06, 2014 at 01:53:38PM +0800, Shawn Guo wrote:
> > On imx6qdl, the ENET RMII and PTP clock can come from either internal
> > ANATOP/CCM or external clock source through pad GPIO_16. But in case
> > of the external clock source, bit IOMUXC_GPR1[21] needs to be cleared.
> >
> > The patch adds the support for systems that use an external clock source
> > and distinguishes above two cases by checking if the PTP clock specified
> > in device tree is the one coming from the internal ANATOP/CCM.
> >
> > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> > ---
> > arch/arm/mach-imx/clk-imx6q.c | 1 +
> > arch/arm/mach-imx/mach-imx6q.c | 36 +++++++++++++++++++++++++++++++++++-
> > 2 files changed, 36 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
> > index dd4f1e3..45de2e5 100644
> > --- a/arch/arm/mach-imx/clk-imx6q.c
> > +++ b/arch/arm/mach-imx/clk-imx6q.c
> > @@ -437,6 +437,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
> >
> > clk_register_clkdev(clk[gpt_ipg], "ipg", "imx-gpt.0");
> > clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
> > + clk_register_clkdev(clk[enet_ref], "enet_ref", NULL);
> >
> > if ((imx_get_soc_revision() != IMX_CHIP_REVISION_1_0) ||
> > cpu_is_imx6dl()) {
> > diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
> > index f9cbbf9..d131499b 100644
> > --- a/arch/arm/mach-imx/mach-imx6q.c
> > +++ b/arch/arm/mach-imx/mach-imx6q.c
> > @@ -182,16 +182,50 @@ static void __init imx6q_enet_phy_init(void)
> >
> > static void __init imx6q_1588_init(void)
> > {
> > + struct device_node *np;
> > + struct clk *ptp_clk;
> > + struct clk *enet_ref;
> > struct regmap *gpr;
> > + u32 clksel;
> > +
> > + np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-fec");
> > + if (!np) {
> > + pr_warn("%s: failed to find fec node\n", __func__);
> > + return;
> > + }
> > +
> > + ptp_clk = of_clk_get(np, 2);
> > + if (IS_ERR(ptp_clk)) {
> > + pr_warn("%s: failed to get ptp clock\n", __func__);
> > + goto put_node;
> > + }
> > +
> > + enet_ref = clk_get_sys(NULL, "enet_ref");
> > + if (IS_ERR(enet_ref)) {
> > + pr_warn("%s: failed to get enet clock\n", __func__);
> > + goto put_ptp_clk;
> > + }
> >
> > + /*
> > + * If enet_ref from ANATOP/CCM is the PTP clock source, we need to
> > + * set bit IOMUXC_GPR1[21]. Or the PTP clock must be from pad
> > + * (external OSC), and we need to clear the bit.
> > + */
> > + clksel = ptp_clk == enet_ref ? IMX6Q_GPR1_ENET_CLK_SEL_ANATOP :
> > + IMX6Q_GPR1_ENET_CLK_SEL_PAD;
> > gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
> > if (!IS_ERR(gpr))
> > regmap_update_bits(gpr, IOMUXC_GPR1,
> > IMX6Q_GPR1_ENET_CLK_SEL_MASK,
> > - IMX6Q_GPR1_ENET_CLK_SEL_ANATOP);
> > + clksel);
> > else
> > pr_err("failed to find fsl,imx6q-iomux-gpr regmap\n");
> >
> > + clk_put(enet_ref);
> > +put_ptp_clk:
> > + clk_put(ptp_clk);
> > +put_node:
> > + of_node_put(np);
> > }
> >
> > static void __init imx6q_init_machine(void)
> > --
> > 1.7.9.5
> >
>
> --
> Philippe De Muyter +32 2 6101532 Macq SA rue de l'Aeronef 2 B-1140 Bruxelles
^ permalink raw reply
* [PATCH] ARM: dts: i.MX51 babbage: Support diagnostic LED
From: Liu Ying @ 2014-02-10 6:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140210030214.GB9628@S2101-09.ap.freescale.net>
On 02/10/2014 11:02 AM, Shawn Guo wrote:
> On Tue, Feb 04, 2014 at 09:57:42PM +0800, Liu Ying wrote:
>> The D25 LED controlled by gpio on the i.MX51 babbage
>> board is a diagnostic LED according to the board design.
>> This patch adds the relevant device tree nodes to the
>> i.MX51 babbage device tree file to support this LED.
>>
>> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
>> ---
>> arch/arm/boot/dts/imx51-babbage.dts | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
>> index be1407c..8d6a74b 100644
>> --- a/arch/arm/boot/dts/imx51-babbage.dts
>> +++ b/arch/arm/boot/dts/imx51-babbage.dts
>> @@ -81,6 +81,17 @@
>> };
>> };
>>
>> + leds {
>> + compatible = "gpio-leds";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&led_pin_gpio2_6>;
>> +
>> + led-diagnostic {
>> + label = "diagnostic";
>> + gpios = <&gpio2 6 0>;
>
> Just out of curiosity, how will you use/trigger the led?
>
Switch on the LED:
echo 1 > /sys/class/leds/diagnostic/brightness
Switch off the LED:
echo 0 > /sys/class/leds/diagnostic/brightness
>> + };
>> + };
>> +
>> sound {
>> compatible = "fsl,imx51-babbage-sgtl5000",
>> "fsl,imx-audio-sgtl5000";
>> @@ -280,6 +291,12 @@
>> MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
>> >;
>> };
>> +
>> + led_pin_gpio2_6: led_gpio2_6 {
>
> This might be copied from some existing file, but I would hope the name
> can be more generic, something like the following
>
> pinctrl_gpio_leds: gpioledsgrp {
>
> , so that when we have more gpio controlled leds to add, we can just add
> more pins into the same group without concerning the name.
>
Agree. I will address this comment in patch v2. Thanks!
Regards,
Liu Ying
>
>> + fsl,pins = <
>> + MX51_PAD_EIM_D22__GPIO2_6 0x80000000
>> + >;
>> + };
>> };
>> };
>>
>> --
>> 1.7.9.5
>>
>>
>
^ permalink raw reply
* [PATCH v3 0/2] ASoC: atmel_ssc_dai: add option to choose clock
From: Bo Shen @ 2014-02-10 6:09 UTC (permalink / raw)
To: linux-arm-kernel
When SSC work in slave mode, the clock can come from TK pin and also
can come from RK pin, this is hardware design decided. So, make it
available to choose where the clock from.
Changes in v3:
- Move the property from card to ssc device
Series-changes: 2
- using "-" replace "_" in binding document
Bo Shen (2):
ASoC: atmel_ssc_dai: make option to choose clock
Binding: atmel-ssc: add option to choose clock
Documentation/devicetree/bindings/misc/atmel-ssc.txt | 8 ++++++++
drivers/misc/atmel-ssc.c | 6 ++++++
include/linux/atmel-ssc.h | 1 +
sound/soc/atmel/atmel_ssc_dai.c | 13 +++++++++----
4 files changed, 24 insertions(+), 4 deletions(-)
--
1.8.5.2
^ permalink raw reply
* [PATCH v3 1/2] ASoC: atmel_ssc_dai: make option to choose clock
From: Bo Shen @ 2014-02-10 6:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392012586-30790-1-git-send-email-voice.shen@atmel.com>
When SSC works in slave mode, according to the hardware design, the
clock can get from TK pin, also can get from RK pin. So, add one
parameter to choose where the clock from.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
---
Changes in v3:
- New, move clk-from-rk-pin property from card to ssc device
drivers/misc/atmel-ssc.c | 6 ++++++
include/linux/atmel-ssc.h | 1 +
sound/soc/atmel/atmel_ssc_dai.c | 13 +++++++++----
3 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c
index 5be80840..22de137 100644
--- a/drivers/misc/atmel-ssc.c
+++ b/drivers/misc/atmel-ssc.c
@@ -150,6 +150,12 @@ static int ssc_probe(struct platform_device *pdev)
return -ENODEV;
ssc->pdata = (struct atmel_ssc_platform_data *)plat_dat;
+ if (pdev->dev.of_node) {
+ struct device_node *np = pdev->dev.of_node;
+ ssc->clk_from_rk_pin =
+ of_property_read_bool(np, "atmel,clk-from-rk-pin");
+ }
+
regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
ssc->regs = devm_ioremap_resource(&pdev->dev, regs);
if (IS_ERR(ssc->regs))
diff --git a/include/linux/atmel-ssc.h b/include/linux/atmel-ssc.h
index 66a0e53..571a12e 100644
--- a/include/linux/atmel-ssc.h
+++ b/include/linux/atmel-ssc.h
@@ -18,6 +18,7 @@ struct ssc_device {
struct clk *clk;
int user;
int irq;
+ bool clk_from_rk_pin;
};
struct ssc_device * __must_check ssc_request(unsigned int ssc_num);
diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
index 8697ced..ca1d8a3 100644
--- a/sound/soc/atmel/atmel_ssc_dai.c
+++ b/sound/soc/atmel/atmel_ssc_dai.c
@@ -341,6 +341,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream,
{
int id = dai->id;
struct atmel_ssc_info *ssc_p = &ssc_info[id];
+ struct ssc_device *ssc = ssc_p->ssc;
struct atmel_pcm_dma_params *dma_params;
int dir, channels, bits;
u32 tfmr, rfmr, tcmr, rcmr;
@@ -466,7 +467,8 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream,
| SSC_BF(RCMR_START, start_event)
| SSC_BF(RCMR_CKI, SSC_CKI_RISING)
| SSC_BF(RCMR_CKO, SSC_CKO_NONE)
- | SSC_BF(RCMR_CKS, SSC_CKS_CLOCK);
+ | SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
+ SSC_CKS_PIN : SSC_CKS_CLOCK);
rfmr = SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
| SSC_BF(RFMR_FSOS, SSC_FSOS_NONE)
@@ -481,7 +483,8 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream,
| SSC_BF(TCMR_START, start_event)
| SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
| SSC_BF(TCMR_CKO, SSC_CKO_NONE)
- | SSC_BF(TCMR_CKS, SSC_CKS_PIN);
+ | SSC_BF(TCMR_CKS, ssc->clk_from_rk_pin ?
+ SSC_CKS_CLOCK : SSC_CKS_PIN);
tfmr = SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
| SSC_BF(TFMR_FSDEN, 0)
@@ -550,7 +553,8 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream,
| SSC_BF(RCMR_START, SSC_START_RISING_RF)
| SSC_BF(RCMR_CKI, SSC_CKI_RISING)
| SSC_BF(RCMR_CKO, SSC_CKO_NONE)
- | SSC_BF(RCMR_CKS, SSC_CKS_PIN);
+ | SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
+ SSC_CKS_PIN : SSC_CKS_CLOCK);
rfmr = SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
| SSC_BF(RFMR_FSOS, SSC_FSOS_NONE)
@@ -565,7 +569,8 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream,
| SSC_BF(TCMR_START, SSC_START_RISING_RF)
| SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
| SSC_BF(TCMR_CKO, SSC_CKO_NONE)
- | SSC_BF(TCMR_CKS, SSC_CKS_PIN);
+ | SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
+ SSC_CKS_CLOCK : SSC_CKS_PIN);
tfmr = SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
| SSC_BF(TFMR_FSDEN, 0)
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 2/2] Binding: atmel-ssc: add option to choose clock
From: Bo Shen @ 2014-02-10 6:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392012586-30790-1-git-send-email-voice.shen@atmel.com>
Add the option to choose clock on which pin input to SSC (as slave).
Default is on TK pin to SSC, add "atmel,clk-from-rk-pin" option to
specify the clock is on RK pin to SSC.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
---
Changes in v3:
- None
Series-changes: 2
- using "-" replace "_" in binding document
Documentation/devicetree/bindings/misc/atmel-ssc.txt | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/misc/atmel-ssc.txt b/Documentation/devicetree/bindings/misc/atmel-ssc.txt
index a45ae08..5c1e14e 100644
--- a/Documentation/devicetree/bindings/misc/atmel-ssc.txt
+++ b/Documentation/devicetree/bindings/misc/atmel-ssc.txt
@@ -14,6 +14,14 @@ Required properties for devices compatible with "atmel,at91sam9g45-ssc":
See Documentation/devicetree/bindings/dma/atmel-dma.txt for details.
- dma-names: Must be "tx", "rx".
+Optional properties:
+ - atmel,clk-from-rk-pin: bool property.
+ - When SSC works in slave mode, according to the hardware design, the
+ clock can get from TK pin, and also can get from RK pin. So, add
+ this parameter to choose where the clock from.
+ - By default the clock is from TK pin, if the clock from RK pin, this
+ property is needed.
+
Examples:
- PDC transfer:
ssc0: ssc at fffbc000 {
--
1.8.5.2
^ permalink raw reply related
* [PATCH v3 1/2] ARM: dts: imx6sl-evk: Add PFUZE100 support
From: Shawn Guo @ 2014-02-10 6:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391684271-6621-1-git-send-email-festevam@gmail.com>
On Thu, Feb 06, 2014 at 08:57:50AM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> imx6sl-evk board has Freescale PFUZE100 regulator, so add support for it.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Applied both, thanks.
^ permalink raw reply
* [PATCH v2] ARM: dts: imx6qdl-sabreauto: Add PFUZE100 support
From: Shawn Guo @ 2014-02-10 6:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391684719-7720-1-git-send-email-festevam@gmail.com>
On Thu, Feb 06, 2014 at 09:05:19AM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> mx6 sabreauto boards have Freescale PFUZE100 regulator, so add support for it.
>
> ARM: dts: imx6qdl-sabreauto: Add PFUZE100 support
>
> mx6 sabreauto boards have Freescale PFUZE100 regulator, so add support for it.
Why duplicating the patch subject and commit log here? Dropped the two
lines and applied the patch.
Shawn
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> Changes since v1:
> - Keep it sorted
>
> arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 113 +++++++++++++++++++++++++++++++
> 1 file changed, 113 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> index 10a00e4..466a544 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> @@ -63,6 +63,112 @@
> status = "okay";
> };
>
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +
> + pmic: pfuze100 at 08 {
> + compatible = "fsl,pfuze100";
> + reg = <0x08>;
> +
> + regulators {
> + sw1a_reg: sw1ab {
> + regulator-min-microvolt = <300000>;
> + regulator-max-microvolt = <1875000>;
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-ramp-delay = <6250>;
> + };
> +
> + sw1c_reg: sw1c {
> + regulator-min-microvolt = <300000>;
> + regulator-max-microvolt = <1875000>;
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-ramp-delay = <6250>;
> + };
> +
> + sw2_reg: sw2 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + sw3a_reg: sw3a {
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1975000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + sw3b_reg: sw3b {
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1975000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + sw4_reg: sw4 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + swbst_reg: swbst {
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5150000>;
> + };
> +
> + snvs_reg: vsnvs {
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + vref_reg: vrefddr {
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + vgen1_reg: vgen1 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1550000>;
> + };
> +
> + vgen2_reg: vgen2 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1550000>;
> + };
> +
> + vgen3_reg: vgen3 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + vgen4_reg: vgen4 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + vgen5_reg: vgen5 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + vgen6_reg: vgen6 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> + };
> + };
> +};
> +
> &iomuxc {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_hog>;
> @@ -133,6 +239,13 @@
> >;
> };
>
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> pinctrl_pwm3: pwm1grp {
> fsl,pins = <
> MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
> --
> 1.8.1.2
>
^ permalink raw reply
* [PATCH] ARM: dts: i.MX51 babbage: Support diagnostic LED
From: Liu Ying @ 2014-02-10 6:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392006579.703394606@f357.i.mail.ru>
On 02/10/2014 12:29 PM, Alexander Shiyan wrote:
> ???????????, 10 ??????? 2014, 11:02 +08:00 ?? Shawn Guo <shawn.guo@linaro.org>:
>> On Tue, Feb 04, 2014 at 09:57:42PM +0800, Liu Ying wrote:
>>> The D25 LED controlled by gpio on the i.MX51 babbage
>>> board is a diagnostic LED according to the board design.
>>> This patch adds the relevant device tree nodes to the
>>> i.MX51 babbage device tree file to support this LED.
>>>
>>> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
>>> ---
>>> arch/arm/boot/dts/imx51-babbage.dts | 17 +++++++++++++++++
>>> 1 file changed, 17 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/imx51-babbage.dts
>> b/arch/arm/boot/dts/imx51-babbage.dts
>>> index be1407c..8d6a74b 100644
>>> --- a/arch/arm/boot/dts/imx51-babbage.dts
>>> +++ b/arch/arm/boot/dts/imx51-babbage.dts
>>> @@ -81,6 +81,17 @@
>>> };
>>> };
>>>
>>> + leds {
>>> + compatible = "gpio-leds";
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&led_pin_gpio2_6>;
>>> +
>>> + led-diagnostic {
>>> + label = "diagnostic";
>>> + gpios = <&gpio2 6 0>;
>>
>> Just out of curiosity, how will you use/trigger the led?
>
> And GPIO bindings should be used to specify active level,
> GPIO_ACTIVE_HIGH in this case.
Based on Linux 3.14-rc2, this gives me no single output:
grep GPIO_ACTIVE arch/arm/boot/dts/ -nr | grep imx
So, this patch follows the old approach.
I agree to use GPIO_ACTIVE_HIGH/GPIO_ACTIVE_LOW macros.
How about generating dedicated patch sets for this purpose?
Actually, I had one set for i.MX51 platforms.
Regards,
Liu Ying
^ permalink raw reply
* [PATCH] ARM: dts: i.MX51 babbage: Support diagnostic LED
From: Shawn Guo @ 2014-02-10 6:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52F87087.4000908@freescale.com>
On Mon, Feb 10, 2014 at 02:24:07PM +0800, Liu Ying wrote:
> >>> @@ -81,6 +81,17 @@
> >>> };
> >>> };
> >>>
> >>> + leds {
> >>> + compatible = "gpio-leds";
> >>> + pinctrl-names = "default";
> >>> + pinctrl-0 = <&led_pin_gpio2_6>;
> >>> +
> >>> + led-diagnostic {
> >>> + label = "diagnostic";
> >>> + gpios = <&gpio2 6 0>;
> >>
> >> Just out of curiosity, how will you use/trigger the led?
> >
> > And GPIO bindings should be used to specify active level,
> > GPIO_ACTIVE_HIGH in this case.
>
> Based on Linux 3.14-rc2, this gives me no single output:
> grep GPIO_ACTIVE arch/arm/boot/dts/ -nr | grep imx
If you grep linux-next, you will find quite a few.
>
> So, this patch follows the old approach.
>
> I agree to use GPIO_ACTIVE_HIGH/GPIO_ACTIVE_LOW macros.
> How about generating dedicated patch sets for this purpose?
> Actually, I had one set for i.MX51 platforms.
I prefer to have this change in the same patch.
Shawn
^ permalink raw reply
* [GIT PULL] ARM: imx: device tree changes for 3.15, take 1
From: Shawn Guo @ 2014-02-10 6:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4771497.sfdTTRjnSv@phil>
On Fri, Feb 07, 2014 at 11:04:30AM +0100, Heiko St?bner wrote:
> Hi Shawn,
>
> Am Mittwoch, 5. Februar 2014, 20:23:01 schrieb Shawn Guo:
> > - Make pinctrl nodes board specific to avoid floating board specific
> > device tree blob with so many unused pinctrl data.
>
> can you take a look at "dtc: add ability to make nodes conditional on them
> being referenced" [0] to see if it can help to solve the floating pinctrl
> problem more generic in the future?
Yes, if it gets accepted, we will consider to use it in the future
projects.
Shawn
> [0] http://www.spinics.net/lists/arm-kernel/msg303967.html
>
^ permalink raw reply
* [PATCH] ARM: imx: avoid calling clk APIs in idle thread which may cause schedule
From: Anson Huang @ 2014-02-10 6:34 UTC (permalink / raw)
To: linux-arm-kernel
As clk_pllv3_wait_lock will call usleep_range, and the clk APIs
mutex lock may be held when CPU entering idle, so calling clk
APIs must be avoided in cpu idle thread, this is to avoid reschedule
warning in cpu idle, just access register directly to achieve that.
bad: scheduling from the idle thread!
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.14.0-rc1+ #657
Backtrace:
[<80012188>] (dump_backtrace) from [<8001246c>] (show_stack+0x18/0x1c)
r6:808c0038 r5:00000000 r4:808e5a1c r3:00000000
[<80012454>] (show_stack) from [<8064b2ec>] (dump_stack+0x84/0x9c)
[<8064b268>] (dump_stack) from [<80055ee0>] (dequeue_task_idle+0x20/0x30)
r5:808bef40 r4:bf7dff40
[<80055ec0>] (dequeue_task_idle) from [<8004f028>] (dequeue_task+0x30/0x50)
r4:bf7dff40 r3:80055ec0
[<8004eff8>] (dequeue_task) from [<800503c0>] (deactivate_task+0x30/0x34)
r4:bf7dff40
[<80050390>] (deactivate_task) from [<8064d8e4>] (__schedule+0x2c8/0x5c0)
[<8064d61c>] (__schedule) from [<8064dc14>] (schedule+0x38/0x88)
r10:80912964 r9:808c1e50 r8:808c0038 r7:808cbf30 r6:80e128ec r5:60000093
r4:80912968
[<8064dbdc>] (schedule) from [<8064dfec>] (schedule_preempt_disabled+0x10/0x14)
[<8064dfdc>] (schedule_preempt_disabled) from [<8064ebc0>] (mutex_lock_nested+0x1c0/0x3c0)
[<8064ea00>] (mutex_lock_nested) from [<804ae71c>] (clk_prepare_lock+0x44/0xe4)
r10:806554cc r9:bf7df1bc r8:808cf4f8 r7:808cf544 r6:bf7df1b8 r5:808c0010
r4:80e69750
[<804ae6d8>] (clk_prepare_lock) from [<804af214>] (clk_get_rate+0x14/0x64)
r6:bf7df1b8 r5:00000002 r4:bf017000 r3:80922ad0
[<804af200>] (clk_get_rate) from [<80025d30>] (imx6sl_set_wait_clk+0x18/0x20)
r5:00000002 r4:00000001
[<80025d18>] (imx6sl_set_wait_clk) from [<80023454>] (imx6sl_enter_wait+0x20/0x48)
[<80023434>] (imx6sl_enter_wait) from [<80477c24>] (cpuidle_enter_state+0x44/0xfc)
r4:3c386e48 r3:80023434
[<80477be0>] (cpuidle_enter_state) from [<80477dd8>] (cpuidle_idle_call+0xfc/0x160)
r8:808cf4f8 r7:00000001 r6:80e69534 r5:00000000 r4:bf7df1b8
[<80477cdc>] (cpuidle_idle_call) from [<8000f61c>] (arch_cpu_idle+0x10/0x50)
r9:808c0000 r8:00000000 r7:80921a89 r6:808c8938 r5:808c899c r4:808c0000
[<8000f60c>] (arch_cpu_idle) from [<8006fa94>] (cpu_startup_entry+0x108/0x160)
[<8006f98c>] (cpu_startup_entry) from [<806452ac>] (rest_init+0xb4/0xdc)
r7:808afae0
[<806451f8>] (rest_init) from [<8086fb58>] (start_kernel+0x328/0x38c)
r6:ffffffff r5:808c8880 r4:808c8a30
[<8086f830>] (start_kernel) from [<80008074>] (0x80008074)
Signed-off-by: Anson Huang <b20788@freescale.com>
---
arch/arm/mach-imx/clk-imx6sl.c | 80 +++++++++++++++++++++++++++++++++++++---
1 file changed, 74 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c
index b71570d..971f47b 100644
--- a/arch/arm/mach-imx/clk-imx6sl.c
+++ b/arch/arm/mach-imx/clk-imx6sl.c
@@ -18,6 +18,22 @@
#include "clk.h"
#include "common.h"
+#define CCSR 0xc
+#define BM_CCSR_PLL1_SW_CLK_SEL (1 << 2)
+#define CACRR 0x10
+#define CDHIPR 0x48
+#define BM_CDHIPR_ARM_PODF_BUSY (1 << 16)
+#define ARM_WAIT_DIV_396M 2
+#define ARM_WAIT_DIV_792M 4
+#define ARM_WAIT_DIV_996M 6
+
+#define PLL_ARM 0x0
+#define BM_PLL_ARM_DIV_SELECT (0x7f << 0)
+#define BM_PLL_ARM_POWERDOWN (1 << 12)
+#define BM_PLL_ARM_ENABLE (1 << 13)
+#define BM_PLL_ARM_LOCK (1 << 31)
+#define PLL_ARM_DIV_792M 66
+
static const char *step_sels[] = { "osc", "pll2_pfd2", };
static const char *pll1_sw_sels[] = { "pll1_sys", "step", };
static const char *ocram_alt_sels[] = { "pll2_pfd2", "pll3_pfd1", };
@@ -65,6 +81,8 @@ static struct clk_div_table video_div_table[] = {
static struct clk *clks[IMX6SL_CLK_END];
static struct clk_onecell_data clk_data;
+static void __iomem *ccm_base;
+static void __iomem *anatop_base;
static const u32 clks_init_on[] __initconst = {
IMX6SL_CLK_IPG, IMX6SL_CLK_ARM, IMX6SL_CLK_MMDC_ROOT,
@@ -81,19 +99,67 @@ static const u32 clks_init_on[] __initconst = {
* entering WAIT mode.
*
* This function will set the ARM clk to max value within the 12:5 limit.
+ * As IPG clock is fixed@66MHz(so ARM freq must not exceed 158.4MHz),
+ * ARM freq are one of below setpoints: 396MHz, 792MHz and 996MHz, since
+ * the clk APIs can NOT be called in idle thread(may cause kernel schedule
+ * as there is sleep function in PLL wait function), so here we just slow
+ * down ARM to below freq according to previous freq:
+ *
+ * run mode wait mode
+ * 396MHz -> 132MHz;
+ * 792MHz -> 158.4MHz;
+ * 996MHz -> 142.3MHz;
*/
+static int imx6sl_get_arm_divider_for_wait(void)
+{
+ if (readl_relaxed(ccm_base + CCSR) & BM_CCSR_PLL1_SW_CLK_SEL) {
+ return ARM_WAIT_DIV_396M;
+ } else {
+ if ((readl_relaxed(anatop_base + PLL_ARM) &
+ BM_PLL_ARM_DIV_SELECT) == PLL_ARM_DIV_792M)
+ return ARM_WAIT_DIV_792M;
+ else
+ return ARM_WAIT_DIV_996M;
+ }
+}
+
+static void imx6sl_enable_pll_arm(bool enable)
+{
+ static u32 saved_pll_arm;
+ u32 val;
+
+ if (enable) {
+ saved_pll_arm = val = readl_relaxed(anatop_base + PLL_ARM);
+ val |= BM_PLL_ARM_ENABLE;
+ val &= ~BM_PLL_ARM_POWERDOWN;
+ writel_relaxed(val, anatop_base + PLL_ARM);
+ while (!(__raw_readl(anatop_base + PLL_ARM) & BM_PLL_ARM_LOCK))
+ ;
+ } else {
+ writel_relaxed(saved_pll_arm, anatop_base + PLL_ARM);
+ }
+}
+
void imx6sl_set_wait_clk(bool enter)
{
- static unsigned long saved_arm_rate;
+ static unsigned long saved_arm_div;
+ /*
+ * According to hardware design, arm podf change need
+ * PLL1 clock enabled.
+ */
+ imx6sl_enable_pll_arm(true);
if (enter) {
- unsigned long ipg_rate = clk_get_rate(clks[IMX6SL_CLK_IPG]);
- unsigned long max_arm_wait_rate = (12 * ipg_rate) / 5;
- saved_arm_rate = clk_get_rate(clks[IMX6SL_CLK_ARM]);
- clk_set_rate(clks[IMX6SL_CLK_ARM], max_arm_wait_rate);
+ saved_arm_div = readl_relaxed(ccm_base + CACRR);
+ writel_relaxed(imx6sl_get_arm_divider_for_wait(),
+ ccm_base + CACRR);
} else {
- clk_set_rate(clks[IMX6SL_CLK_ARM], saved_arm_rate);
+ writel_relaxed(saved_arm_div, ccm_base + CACRR);
}
+
+ while (__raw_readl(ccm_base + CDHIPR) & BM_CDHIPR_ARM_PODF_BUSY)
+ ;
+ imx6sl_enable_pll_arm(false);
}
static void __init imx6sl_clocks_init(struct device_node *ccm_node)
@@ -110,6 +176,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
np = of_find_compatible_node(NULL, NULL, "fsl,imx6sl-anatop");
base = of_iomap(np, 0);
+ anatop_base = base;
WARN_ON(!base);
/* type name parent base div_mask */
@@ -157,6 +224,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
np = ccm_node;
base = of_iomap(np, 0);
+ ccm_base = base;
WARN_ON(!base);
/* Reuse imx6q pm code */
--
1.7.9.5
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