* [PATCH] ARM: S3C24XX: Fix typo "CONFIG_CPUS_3C2443"
From: Sachin Kamat @ 2014-02-12 9:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392198068.23759.7.camel@x220>
On 12 February 2014 15:11, Paul Bolle <pebolle@tiscali.nl> wrote:
> Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
> ---
> Untested. This needs testing by people with access to knowledge,
> compilers, and/or hardware related to CPU_S3C2443. I'm not one of them.
>
> arch/arm/mach-s3c24xx/common.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
> index 4adaa4b..1d77d70 100644
> --- a/arch/arm/mach-s3c24xx/common.c
> +++ b/arch/arm/mach-s3c24xx/common.c
> @@ -484,7 +484,7 @@ struct platform_device s3c2440_device_dma = {
> };
> #endif
>
> -#if defined(CONFIG_CPUS_3C2443) || defined(CONFIG_CPU_S3C2416)
> +#if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416)
This is definitely a typo and the current fix looks good.
Reviewed-by: Sachin Kamat <sachin.kamat@linaro.org>
--
With warm regards,
Sachin
^ permalink raw reply
* [PATCH 1/2] usb: dwc3: core: continue probing if usb phy library returns -ENODEV/-ENXIO
From: Kishon Vijay Abraham I @ 2014-02-12 9:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140129144659.GA22152@xps8300>
On Wednesday 29 January 2014 08:17 PM, Heikki Krogerus wrote:
> Hi,
>
> On Tue, Jan 28, 2014 at 10:30:36AM -0600, Felipe Balbi wrote:
>> On Tue, Jan 28, 2014 at 05:32:30PM +0200, Heikki Krogerus wrote:
>>> On Mon, Jan 27, 2014 at 10:05:20AM -0600, Felipe Balbi wrote:
>>> For the controller drivers the PHYs are just a resource like any
>>> other. The controller drivers can't have any responsibility of
>>> them. They should not care if PHY drivers are available for them or
>>> not, or even if the PHY framework is available or not.
>>
>> huh? If memory isn't available you don't continue probing, right ? If
>> your IORESOURCE_MEM is missing, you also don't continue probing, if your
>> IRQ line is missing, you bail too. Those are also nothing but resources
>> to the driver, what you're asking here is to treat PHY as a _different_
>> resource; which might be fine, but we need to make sure we don't
>> continue probing when a PHY is missing in a platform that certainly
>> needs a PHY.
>
> Yes, true. In my head I was comparing the PHY only to resources like
> gpios, clocks, dma channels, etc. that are often optional to the
> drivers.
>
>>>>>> But I really want to see the argument against using no-op. As far as I
>>>>>> could see, everybody needs a PHY driver one way or another, some
>>>>>> platforms just haven't sent any PHY driver upstream and have their own
>>>>>> hacked up solution to avoid using the PHY layer.
>>>>>
>>>>> Not true in our case. Platforms using Intel's SoCs and chip sets may
>>>>> or may not have controllable USB PHY. Quite often they don't. The
>>>>> Baytrails have usually ULPI PHY for USB2, but that does not mean they
>>>>> provide any vendor specific functions or any need for a driver in any
>>>>> case.
>>>>
>>>> that's different from what I heard.
>>>
>>> I don't know where you got that impression, but it's not true. The
>>> Baytrail SoCs for example don't have internal USB PHYs, which means
>>> the manufacturers using it can select what they want. So we have
>>> boards where PHY driver(s) is needed and boards where it isn't.
>>
>> alright, that explains it ;-) So you have external USB2 and USB3 PHYs ?
>> You have an external PIPE3 interface ? That's quite an achievement,
>> kudos to your HW designers. Getting timing closure on PIPE3 is a
>> difficult task.
>
> No, only the USB2 PHY is external. I'm giving you wrong information,
> I'm sorry about that. Need to concentrate on what I'm writing.
>
> <snip>
>
>>> This is really good to get. We have some projects where we are dealing
>>> with more embedded environments, like IVI, where the kernel should be
>>> stripped of everything useless. Since the PHYs are autonomous, we
>>> should be able to disable the PHY libraries/frameworks.
>>
>> hmmm, in that case it's a lot easier to treat. We can use
>> ERR_PTR(-ENXIO) as an indication that the framework is disabled, or
>> something like that.
>>
>> The difficult is really reliably supporting e.g. OMAP5 (which won't work
>> without a PHY) and your BayTrail with autonomous PHYs. What can we use
>> as an indication ?
>
> OMAP has it's own glue driver, so shouldn't it depend on the PHY
> layer?
right, but the PHY is connected to the dwc3 core and not to the glue.
>
>> I mean, I need to know that a particular platform depends on a PHY
>> driver before I decide to return -EPROBE_DEFER or just assume the PHY
>> isn't needed ;-)
>
> I don't think dwc3 (core) should care about that. The PHY layer needs
> to tell us that. If the PHY driver that the platform depends is not
> available yet, the PHY layer returns -EPROBE_DEFER and dwc3 ends up
> returning -EPROBE_DEFER.
I don't think the PHY layer can 'reliably' tell if PHY driver is available or
not. Consider when the phy_provider_register fails, there is no way to know if
PHY driver is available or not. There are a few cases where PHY layer returns
-EPROBE_DEFER but none of them can tell for sure that PHY driver is either
available and failed or not available at all. It would be best for us to leave
that to the platforms if we want to be sure if the platform needs a PHY or not.
Thanks
Kishon
^ permalink raw reply
* [PATCH] ARM: OMAP2+: Remove legacy macros for zoom platforms
From: Paul Bolle @ 2014-02-12 9:45 UTC (permalink / raw)
To: linux-arm-kernel
Commit 97411608fd5f ("ARM: OMAP2+: Remove legacy support for zoom
platforms") removed the Kconfig symbols MACH_OMAP_ZOOM2 and
MACH_OMAP_ZOOM3. Remove the last usage of the related macros too.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
---
Untested, but should have zero impact.
arch/arm/mach-omap2/io.c | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index d408b15..af432b1 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -179,15 +179,6 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
.length = L4_EMU_34XX_SIZE,
.type = MT_DEVICE
},
-#if defined(CONFIG_DEBUG_LL) && \
- (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
- {
- .virtual = ZOOM_UART_VIRT,
- .pfn = __phys_to_pfn(ZOOM_UART_BASE),
- .length = SZ_1M,
- .type = MT_DEVICE
- },
-#endif
};
#endif
--
1.8.5.3
^ permalink raw reply related
* [PATCH 2/2] ARM: imx: add speed grading check for i.mx6 soc
From: Anson.Huang at freescale.com @ 2014-02-12 9:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140212093926.GB24834@S2101-09.ap.freescale.net>
Right, will improve it in V2, thanks.
Best Regards.
Anson Huang
?
Freescale Semiconductor Shanghai
Tel:021-28937058
>-----Original Message-----
>From: Shawn Guo [mailto:shawn.guo at linaro.org]
>Sent: Wednesday, February 12, 2014 5:39 PM
>To: Huang Yongcai-B20788
>Cc: kernel at pengutronix.de; devicetree at vger.kernel.org; linux-arm-
>kernel at lists.infradead.org
>Subject: Re: [PATCH 2/2] ARM: imx: add speed grading check for i.mx6 soc
>
>On Wed, Feb 12, 2014 at 03:56:17PM +0800, Anson Huang wrote:
>> The fuse map of speed_grading[1:0] defines the max speed of ARM, see
>> below the definition:
>>
>> 2b'11: 1200000000Hz;
>> 2b'10: 996000000Hz;
>> 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
>> 2b'00: 792000000Hz;
>>
>> Need to remove all illegal setpoints according to fuse map.
>>
>> Signed-off-by: Anson Huang <b20788@freescale.com>
>> ---
>> arch/arm/mach-imx/mach-imx6q.c | 22 ++++++++++++++++++++--
>> 1 file changed, 20 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/mach-imx/mach-imx6q.c
>> b/arch/arm/mach-imx/mach-imx6q.c index f9cbbf9..ad9da1f 100644
>> --- a/arch/arm/mach-imx/mach-imx6q.c
>> +++ b/arch/arm/mach-imx/mach-imx6q.c
>> @@ -219,8 +219,10 @@ static void __init imx6q_init_machine(void)
>> #define OCOTP_CFG3 0x440
>> #define OCOTP_CFG3_SPEED_SHIFT 16
>> #define OCOTP_CFG3_SPEED_1P2GHZ 0x3
>> +#define OCOTP_CFG3_SPEED_996MHZ 0x2
>> +#define OCOTP_CFG3_SPEED_852MHZ 0x1
>>
>> -static void __init imx6q_opp_check_1p2ghz(struct device *cpu_dev)
>> +static void __init imx6q_opp_check_speed_grading(struct device
>> +*cpu_dev)
>> {
>> struct device_node *np;
>> void __iomem *base;
>> @@ -238,11 +240,27 @@ static void __init imx6q_opp_check_1p2ghz(struct
>device *cpu_dev)
>> goto put_node;
>> }
>>
>> + /*
>> + * SPEED_GRADING[1:0] defines the max speed of ARM:
>> + * 2b'11: 1200000000Hz;
>> + * 2b'10: 996000000Hz;
>> + * 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
>> + * 2b'00: 792000000Hz;
>> + * We need to set the max speed of ARM according to fuse map.
>> + */
>> val = readl_relaxed(base + OCOTP_CFG3);
>> val >>= OCOTP_CFG3_SPEED_SHIFT;
>
> val &= 0x3;
>
>Then you do not need to do it in every if-clause below.
>
>> if ((val & 0x3) != OCOTP_CFG3_SPEED_1P2GHZ)
>> if (dev_pm_opp_disable(cpu_dev, 1200000000))
>> pr_warn("failed to disable 1.2 GHz OPP\n");
>> + if ((val & 0x3) < OCOTP_CFG3_SPEED_996MHZ)
>> + if (dev_pm_opp_disable(cpu_dev, 996000000))
>> + pr_warn("failed to disable 996 MHz OPP\n");
>> + if (cpu_is_imx6q()) {
>> + if ((val & 0x3) != OCOTP_CFG3_SPEED_852MHZ)
>
> if (cpu_is_imx6q() && val != OCOTP_CFG3_SPEED_852MHZ)
>
>Shawn
>
>> + if (dev_pm_opp_disable(cpu_dev, 852000000))
>> + pr_warn("failed to disable 852 MHz OPP\n");
>> + }
>>
>> put_node:
>> of_node_put(np);
>> @@ -268,7 +286,7 @@ static void __init imx6q_opp_init(void)
>> goto put_node;
>> }
>>
>> - imx6q_opp_check_1p2ghz(cpu_dev);
>> + imx6q_opp_check_speed_grading(cpu_dev);
>>
>> put_node:
>> of_node_put(np);
>> --
>> 1.7.9.5
>>
>>
^ permalink raw reply
* [PATCH 0/3] arm64: Use pte manipulation functions for THP
From: Steve Capper @ 2014-02-12 9:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391696171-8922-1-git-send-email-steve.capper@linaro.org>
On Thu, Feb 06, 2014 at 02:16:08PM +0000, Steve Capper wrote:
> This series replaces the Transparent HugePage pmd manipulation
> functions with calls to the standard pte functions. This allows the THP
> code to take advantage of the new PTE_WRITE logic, and provides better
> parity with the HugeTLB code (which already uses the pte functions).
>
> Testing was done on the Fast Model with LTP THP tests, and the 3.14-rc1
> kernel was used.
Hi,
Does this series look reasonable?
Thanks,
--
Steve
>
> Steve Capper (3):
> arm64: mm: Remove PMD_BIT_FUNC macro
> arm64: mm: Route pmd thp functions through pte equivalents
> arm64: mm: Correct definition of pmd_mknotpresent
>
> arch/arm64/include/asm/pgtable.h | 91 +++++++++++++++++++++++++++-------------
> 1 file changed, 62 insertions(+), 29 deletions(-)
>
> --
> 1.8.1.4
>
^ permalink raw reply
* [PATCH] ARM: S3C24XX: Fix typo "CONFIG_CPUS_3C2443"
From: Paul Bolle @ 2014-02-12 9:41 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
---
Untested. This needs testing by people with access to knowledge,
compilers, and/or hardware related to CPU_S3C2443. I'm not one of them.
arch/arm/mach-s3c24xx/common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index 4adaa4b..1d77d70 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -484,7 +484,7 @@ struct platform_device s3c2440_device_dma = {
};
#endif
-#if defined(CONFIG_CPUS_3C2443) || defined(CONFIG_CPU_S3C2416)
+#if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416)
static struct resource s3c2443_dma_resource[] = {
[0] = DEFINE_RES_MEM(S3C24XX_PA_DMA, S3C24XX_SZ_DMA),
[1] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA0),
--
1.8.5.3
^ permalink raw reply related
* [PATCH 2/2] ARM: imx: add speed grading check for i.mx6 soc
From: Shawn Guo @ 2014-02-12 9:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392191777-15703-2-git-send-email-b20788@freescale.com>
On Wed, Feb 12, 2014 at 03:56:17PM +0800, Anson Huang wrote:
> The fuse map of speed_grading[1:0] defines the max speed
> of ARM, see below the definition:
>
> 2b'11: 1200000000Hz;
> 2b'10: 996000000Hz;
> 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
> 2b'00: 792000000Hz;
>
> Need to remove all illegal setpoints according to fuse
> map.
>
> Signed-off-by: Anson Huang <b20788@freescale.com>
> ---
> arch/arm/mach-imx/mach-imx6q.c | 22 ++++++++++++++++++++--
> 1 file changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
> index f9cbbf9..ad9da1f 100644
> --- a/arch/arm/mach-imx/mach-imx6q.c
> +++ b/arch/arm/mach-imx/mach-imx6q.c
> @@ -219,8 +219,10 @@ static void __init imx6q_init_machine(void)
> #define OCOTP_CFG3 0x440
> #define OCOTP_CFG3_SPEED_SHIFT 16
> #define OCOTP_CFG3_SPEED_1P2GHZ 0x3
> +#define OCOTP_CFG3_SPEED_996MHZ 0x2
> +#define OCOTP_CFG3_SPEED_852MHZ 0x1
>
> -static void __init imx6q_opp_check_1p2ghz(struct device *cpu_dev)
> +static void __init imx6q_opp_check_speed_grading(struct device *cpu_dev)
> {
> struct device_node *np;
> void __iomem *base;
> @@ -238,11 +240,27 @@ static void __init imx6q_opp_check_1p2ghz(struct device *cpu_dev)
> goto put_node;
> }
>
> + /*
> + * SPEED_GRADING[1:0] defines the max speed of ARM:
> + * 2b'11: 1200000000Hz;
> + * 2b'10: 996000000Hz;
> + * 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
> + * 2b'00: 792000000Hz;
> + * We need to set the max speed of ARM according to fuse map.
> + */
> val = readl_relaxed(base + OCOTP_CFG3);
> val >>= OCOTP_CFG3_SPEED_SHIFT;
val &= 0x3;
Then you do not need to do it in every if-clause below.
> if ((val & 0x3) != OCOTP_CFG3_SPEED_1P2GHZ)
> if (dev_pm_opp_disable(cpu_dev, 1200000000))
> pr_warn("failed to disable 1.2 GHz OPP\n");
> + if ((val & 0x3) < OCOTP_CFG3_SPEED_996MHZ)
> + if (dev_pm_opp_disable(cpu_dev, 996000000))
> + pr_warn("failed to disable 996 MHz OPP\n");
> + if (cpu_is_imx6q()) {
> + if ((val & 0x3) != OCOTP_CFG3_SPEED_852MHZ)
if (cpu_is_imx6q() && val != OCOTP_CFG3_SPEED_852MHZ)
Shawn
> + if (dev_pm_opp_disable(cpu_dev, 852000000))
> + pr_warn("failed to disable 852 MHz OPP\n");
> + }
>
> put_node:
> of_node_put(np);
> @@ -268,7 +286,7 @@ static void __init imx6q_opp_init(void)
> goto put_node;
> }
>
> - imx6q_opp_check_1p2ghz(cpu_dev);
> + imx6q_opp_check_speed_grading(cpu_dev);
>
> put_node:
> of_node_put(np);
> --
> 1.7.9.5
>
>
^ permalink raw reply
* [PATCH] hwrng: msm: switch Kconfig to ARCH_QCOM depends
From: Stanimir Varbanov @ 2014-02-12 9:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392150105-21057-1-git-send-email-galak@codeaurora.org>
Hi,
> We've split Qualcomm MSM support into legacy and multiplatform. The RNG
> driver is only relevant on the multiplatform supported SoCs so switch the
> Kconfig depends to ARCH_QCOM.
>
> CC: Herbert Xu <herbert@gondor.apana.org.au>
> Signed-off-by: Kumar Gala <galak@codeaurora.org>
> ---
> drivers/char/hw_random/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
> index 2f2b084..289bd3a 100644
> --- a/drivers/char/hw_random/Kconfig
> +++ b/drivers/char/hw_random/Kconfig
> @@ -343,7 +343,7 @@ config HW_RANDOM_TPM
>
> config HW_RANDOM_MSM
> tristate "Qualcomm MSM Random Number Generator support"
> - depends on HW_RANDOM && ARCH_MSM
> + depends on HW_RANDOM && ARCH_QCOM
> ---help---
> This driver provides kernel-side support for the Random Number
> Generator hardware found on Qualcomm MSM SoCs.
>
IMO, after this change the "MSM" abbreviation in help clause is
irrelevant, could you remove it?
Reviewed-by: Stanimir Varbanov <svarbanov@mm-sol.com>
regards,
Stan
^ permalink raw reply
* [PATCH] ARM: dts: qcom: Add RNG device tree node
From: Stanimir Varbanov @ 2014-02-12 9:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140208033740.GD10784@codeaurora.org>
Hi, Stephen
On 02/08/2014 05:37 AM, Stephen Boyd wrote:
> On 02/07, Stanimir Varbanov wrote:
>> Add the necessary DT node to probe the rng driver on
>> msm8974 platforms.
>>
>
> Looks good. We should add it to msm8960-cdp and enable the driver
> in the defconfig as well.
Sure, I can prepare a patch. Unfortunately I haven't msm8960 CDP to test it.
>
>> Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
>
> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
>
Thanks!
regards,
Stan
^ permalink raw reply
* [PATCH 2/3] ARM: mvebu: use GPIO DT defines in Armada 370/XP boards
From: Thomas Petazzoni @ 2014-02-12 9:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140212074946.GC30814@lunn.ch>
Dear Andrew Lunn,
On Wed, 12 Feb 2014 08:49:46 +0100, Andrew Lunn wrote:
> What i did for kirkwood is include both gpio.h and input.h in
> kirkwood.dtsi. Quite a few other systems do that, rather than each
> .dts file having to include them. However i don't have a strong
> opinion.
Right, I don't have a strong opinion on this either. I did it this way
because a few other .dts files for Armada boards (Netgear NAS) were
already including these header files.
I guess it is clearly something that can be factorized later on as the
number of Armada boards needing this grows.
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply
* [PATCH] arm64: fix psci power state pack
From: Prashant Gaikwad @ 2014-02-12 9:22 UTC (permalink / raw)
To: linux-arm-kernel
Values has to be shifted right to create pack.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
---
arch/arm64/kernel/psci.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/kernel/psci.c b/arch/arm64/kernel/psci.c
index 4f97db3..6e8f1df 100644
--- a/arch/arm64/kernel/psci.c
+++ b/arch/arm64/kernel/psci.c
@@ -87,11 +87,11 @@ static int psci_to_linux_errno(int errno)
static u32 psci_power_state_pack(struct psci_power_state state)
{
return ((state.id & PSCI_POWER_STATE_ID_MASK)
- << PSCI_POWER_STATE_ID_SHIFT) |
+ >> PSCI_POWER_STATE_ID_SHIFT) |
((state.type & PSCI_POWER_STATE_TYPE_MASK)
- << PSCI_POWER_STATE_TYPE_SHIFT) |
+ >> PSCI_POWER_STATE_TYPE_SHIFT) |
((state.affinity_level & PSCI_POWER_STATE_AFFL_MASK)
- << PSCI_POWER_STATE_AFFL_SHIFT);
+ >> PSCI_POWER_STATE_AFFL_SHIFT);
}
/*
--
1.7.4.1
^ permalink raw reply related
* [PATCH] ARM: dts: imx6qdl-sabresd: Do not place regulator nodes under simple-bus
From: Shawn Guo @ 2014-02-12 9:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392165078-25794-1-git-send-email-festevam@gmail.com>
On Tue, Feb 11, 2014 at 10:31:18PM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> According to Documentation/devicetree/bindings/regulator/regulator.txt
> regulator nodes should not be placed under 'simple-bus'.
I failed to read that statement from the binding doc. Can you quote the
doc specifically on that statement?
>
> Mark Rutland also explains about it at:
> http://www.spinics.net/lists/linux-usb/msg101497.html
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> Shawn,
>
> I can convert other dts files if you are fine with this approach.
I take it as an unnecessary churn, unless I see the consensus from most
of DT maintainers and arm-soc folks that we should make this change.
And see comment below ...
>
> arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 51 ++++++++++++++--------------------
> 1 file changed, 21 insertions(+), 30 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> index 0d816d3..d7df5b2 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> @@ -18,38 +18,29 @@
> reg = <0x10000000 0x40000000>;
> };
>
> - regulators {
> - compatible = "simple-bus";
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - reg_usb_otg_vbus: regulator at 0 {
> - compatible = "regulator-fixed";
> - reg = <0>;
> - regulator-name = "usb_otg_vbus";
> - regulator-min-microvolt = <5000000>;
> - regulator-max-microvolt = <5000000>;
> - gpio = <&gpio3 22 0>;
> - enable-active-high;
> - };
> + reg_usb_otg_vbus: regulator at 0 {
nodename at num should only be used for nodes that have 'reg' property.
Why are you dropping 'reg' property here? Right, it does not compile if
you do not drop it. You can take it as a reason of why I endorse
simple-bus regulators container.
Shawn
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + gpio = <&gpio3 22 0>;
> + enable-active-high;
> + };
>
> - reg_usb_h1_vbus: regulator at 1 {
> - compatible = "regulator-fixed";
> - reg = <1>;
> - regulator-name = "usb_h1_vbus";
> - regulator-min-microvolt = <5000000>;
> - regulator-max-microvolt = <5000000>;
> - gpio = <&gpio1 29 0>;
> - enable-active-high;
> - };
> + reg_usb_h1_vbus: regulator at 1 {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + gpio = <&gpio1 29 0>;
> + enable-active-high;
> + };
>
> - reg_audio: regulator at 2 {
> - compatible = "regulator-fixed";
> - reg = <2>;
> - regulator-name = "wm8962-supply";
> - gpio = <&gpio4 10 0>;
> - enable-active-high;
> - };
> + reg_audio: regulator at 2 {
> + compatible = "regulator-fixed";
> + regulator-name = "wm8962-supply";
> + gpio = <&gpio4 10 0>;
> + enable-active-high;
> };
>
> gpio-keys {
> --
> 1.8.1.2
>
^ permalink raw reply
* [BUG] Circular locking dependency - DRM/CMA/MM/hotplug/...
From: Daniel Vetter @ 2014-02-12 9:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140211183543.GK26684@n2100.arm.linux.org.uk>
On Tue, Feb 11, 2014 at 06:35:43PM +0000, Russell King - ARM Linux wrote:
> The cubox-i4 just hit a new lockdep problem - not quite sure what to
> make of this - it looks like an interaction between quite a lot of
> locks - I suspect more than the lockdep code is reporting in its
> "Possible unsafe locking scenario" report.
>
> I'm hoping I've sent this to appropriate people... if anyone thinks
> this needs to go to someone else, please forward it. Thanks.
I didn't dare to look too closely since the console_lock is in the chain,
but looks rather similar to
http://www.spinics.net/lists/kernel/msg1685909.html
akpm is still bikeshedding that one though.
-Daniel
>
> ======================================================
> [ INFO: possible circular locking dependency detected ]
> 3.14.0-rc2+ #517 Tainted: G W
> -------------------------------------------------------
> Xorg/805 is trying to acquire lock:
> (cma_mutex){+.+.+.}, at: [<c03716f4>] dma_release_from_contiguous+0xb8/0xf8
>
> but task is already holding lock:
> (&dev->struct_mutex){+.+...}, at: [<c03512ec>] drm_gem_object_handle_unreference_unlocked+0xdc/0x148
>
> which lock already depends on the new lock.
>
>
> the existing dependency chain (in reverse order) is:
> -> #5 (&dev->struct_mutex){+.+...}:
> [<c0066f04>] __lock_acquire+0x151c/0x1ca0
> [<c0067c28>] lock_acquire+0xa0/0x130
> [<c0698180>] mutex_lock_nested+0x5c/0x3ac
> [<c0350c30>] drm_gem_mmap+0x40/0xdc
> [<c03671d8>] drm_gem_cma_mmap+0x14/0x2c
> [<c00ef4f4>] mmap_region+0x3ac/0x59c
> [<c00ef9ac>] do_mmap_pgoff+0x2c8/0x370
> [<c00dd730>] vm_mmap_pgoff+0x6c/0x9c
> [<c00ee1fc>] SyS_mmap_pgoff+0x54/0x98
> [<c000e6e0>] ret_fast_syscall+0x0/0x48
> -> #4 (&mm->mmap_sem){++++++}:
> [<c0066f04>] __lock_acquire+0x151c/0x1ca0
> [<c0067c28>] lock_acquire+0xa0/0x130
> [<c00e6c5c>] might_fault+0x6c/0x94
> [<c0335440>] con_set_unimap+0x158/0x27c
> [<c032f800>] vt_ioctl+0x1298/0x1388
> [<c0323f44>] tty_ioctl+0x168/0xbf4
> [<c0115fac>] do_vfs_ioctl+0x84/0x664
> [<c01165d0>] SyS_ioctl+0x44/0x64
> [<c000e6e0>] ret_fast_syscall+0x0/0x48
> -> #3 (console_lock){+.+.+.}:
> [<c0066f04>] __lock_acquire+0x151c/0x1ca0
> [<c0067c28>] lock_acquire+0xa0/0x130
> [<c006edcc>] console_lock+0x60/0x74
> [<c006f7b8>] console_cpu_notify+0x28/0x34
> [<c004904c>] notifier_call_chain+0x4c/0x8c
> [<c004916c>] __raw_notifier_call_chain+0x1c/0x24
> [<c0024124>] __cpu_notify+0x34/0x50
> [<c002424c>] cpu_notify_nofail+0x18/0x24
> [<c068e168>] _cpu_down+0x100/0x244
> [<c068e2dc>] cpu_down+0x30/0x44
> [<c036ef8c>] cpu_subsys_offline+0x14/0x18
> [<c036af28>] device_offline+0x94/0xbc
> [<c036b030>] online_store+0x4c/0x74
> [<c0368d3c>] dev_attr_store+0x20/0x2c
> [<c016b2e0>] sysfs_kf_write+0x54/0x58
> [<c016eaa4>] kernfs_fop_write+0xc4/0x160
> [<c0105a54>] vfs_write+0xbc/0x184
> [<c0105dfc>] SyS_write+0x48/0x70
> [<c000e6e0>] ret_fast_syscall+0x0/0x48
> -> #2 (cpu_hotplug.lock){+.+.+.}:
> [<c0066f04>] __lock_acquire+0x151c/0x1ca0
> [<c0067c28>] lock_acquire+0xa0/0x130
> [<c0698180>] mutex_lock_nested+0x5c/0x3ac
> [<c0024218>] get_online_cpus+0x3c/0x58
> [<c00d0ab0>] lru_add_drain_all+0x24/0x190
> [<c0101d3c>] migrate_prep+0x10/0x18
> [<c00cba04>] alloc_contig_range+0xf4/0x30c
> [<c0371588>] dma_alloc_from_contiguous+0x7c/0x130
> [<c0018ef8>] __alloc_from_contiguous+0x38/0x12c
> [<c0908694>] atomic_pool_init+0x74/0x128
> [<c0008850>] do_one_initcall+0x3c/0x164
> [<c0903c98>] kernel_init_freeable+0x104/0x1d0
> [<c068de54>] kernel_init+0x10/0xec
> [<c000e7a8>] ret_from_fork+0x14/0x2c
> -> #1 (lock){+.+...}:
> [<c0066f04>] __lock_acquire+0x151c/0x1ca0
> [<c0067c28>] lock_acquire+0xa0/0x130
> [<c0698180>] mutex_lock_nested+0x5c/0x3ac
> [<c00d0aa8>] lru_add_drain_all+0x1c/0x190
> [<c0101d3c>] migrate_prep+0x10/0x18
> [<c00cba04>] alloc_contig_range+0xf4/0x30c
> [<c0371588>] dma_alloc_from_contiguous+0x7c/0x130
> [<c0018ef8>] __alloc_from_contiguous+0x38/0x12c
> [<c0908694>] atomic_pool_init+0x74/0x128
> [<c0008850>] do_one_initcall+0x3c/0x164
> [<c0903c98>] kernel_init_freeable+0x104/0x1d0
> [<c068de54>] kernel_init+0x10/0xec
> [<c000e7a8>] ret_from_fork+0x14/0x2c
> -> #0 (cma_mutex){+.+.+.}:
> [<c0690850>] print_circular_bug+0x70/0x2f0
> [<c0066f68>] __lock_acquire+0x1580/0x1ca0
> [<c0067c28>] lock_acquire+0xa0/0x130
> [<c0698180>] mutex_lock_nested+0x5c/0x3ac
> [<c03716f4>] dma_release_from_contiguous+0xb8/0xf8
> [<c00197a4>] __arm_dma_free.isra.11+0x194/0x218
> [<c0019868>] arm_dma_free+0x1c/0x24
> [<c0366e34>] drm_gem_cma_free_object+0x68/0xb8
> [<c0351194>] drm_gem_object_free+0x30/0x38
> [<c0351318>] drm_gem_object_handle_unreference_unlocked+0x108/0x148
> [<c0351498>] drm_gem_handle_delete+0xb0/0x10c
> [<c0351508>] drm_gem_dumb_destroy+0x14/0x18
> [<c035e838>] drm_mode_destroy_dumb_ioctl+0x34/0x40
> [<c034f918>] drm_ioctl+0x3f4/0x498
> [<c0115fac>] do_vfs_ioctl+0x84/0x664
> [<c01165d0>] SyS_ioctl+0x44/0x64
> [<c000e6e0>] ret_fast_syscall+0x0/0x48
>
> other info that might help us debug this:
>
> Chain exists of: cma_mutex --> &mm->mmap_sem --> &dev->struct_mutex
> Possible unsafe locking scenario:
>
> CPU0 CPU1
> ---- ----
> lock(&dev->struct_mutex);
> lock(&mm->mmap_sem);
> lock(&dev->struct_mutex);
> lock(cma_mutex);
>
> *** DEADLOCK ***
>
> 1 lock held by Xorg/805:
> #0: (&dev->struct_mutex){+.+...}, at: [<c03512ec>] drm_gem_object_handle_unreference_unlocked+0xdc/0x148
>
> stack backtrace:
> CPU: 0 PID: 805 Comm: Xorg Tainted: G W 3.14.0-rc2+ #517
> Backtrace:
> [<c00124e0>] (dump_backtrace) from [<c0012680>] (show_stack+0x18/0x1c)
> r6:c0a869f0 r5:c0a8d540 r4:00000000 r3:00000000
> [<c0012668>] (show_stack) from [<c0693310>] (dump_stack+0x70/0x8c)
> [<c06932a0>] (dump_stack) from [<c0690a7c>] (print_circular_bug+0x29c/0x2f0)
> r4:c0a79570 r3:e9338980
> [<c06907e0>] (print_circular_bug) from [<c0066f68>] (__lock_acquire+0x1580/0x1ca0)
> r10:c0a6da70 r8:e9338dc8 r7:c10ed83c r6:00000001 r5:e9338db0 r4:e9338980
> [<c00659e8>] (__lock_acquire) from [<c0067c28>] (lock_acquire+0xa0/0x130)
> r10:00000000 r9:00000002 r8:00000000 r7:00000000 r6:c099e3b0 r5:e8ca2000
> r4:00000000
> [<c0067b88>] (lock_acquire) from [<c0698180>] (mutex_lock_nested+0x5c/0x3ac)
> r10:e9338980 r9:ea16d010 r8:e8ca2000 r7:00000000 r6:c0ebe304 r5:c03716f4
> r4:c099e378
> [<c0698124>] (mutex_lock_nested) from [<c03716f4>] (dma_release_from_contiguous+0xb8/0xf8)
> r10:ebb00000 r9:ea16d010 r8:c0979cc8 r7:0002bb00 r6:000003fc r5:0003bb00
> r4:c10f4a78
> [<c037163c>] (dma_release_from_contiguous) from [<c00197a4>] (__arm_dma_free.isra.11+0x194/0x218)
> r6:003fc000 r5:ea7d8000 r4:ead4e000 r3:c001db4c
> [<c0019610>] (__arm_dma_free.isra.11) from [<c0019868>] (arm_dma_free+0x1c/0x24)
> r10:e9902e20 r9:e8ca3e38 r8:e989e000 r7:e9902e58 r6:e9902f10 r5:e989e030
> r4:e9aad540
> [<c001984c>] (arm_dma_free) from [<c0366e34>] (drm_gem_cma_free_object+0x68/0xb8)
> [<c0366dcc>] (drm_gem_cma_free_object) from [<c0351194>] (drm_gem_object_free+0x30/0x38)
> r4:e9aad540
> [<c0351164>] (drm_gem_object_free) from [<c0351318>] (drm_gem_object_handle_unreference_unlocked+0x108/0x148)
> [<c0351210>] (drm_gem_object_handle_unreference_unlocked) from [<c0351498>] (drm_gem_handle_delete+0xb0/0x10c)
> r5:e9aad540 r4:e9902e00
> [<c03513e8>] (drm_gem_handle_delete) from [<c0351508>] (drm_gem_dumb_destroy+0x14/0x18)
> r10:c06e3448 r8:e8ca3e38 r7:e8ca2000 r6:e9902e00 r5:000000b4 r4:e8ca3e38
> [<c03514f4>] (drm_gem_dumb_destroy) from [<c035e838>] (drm_mode_destroy_dumb_ioctl+0x34/0x40)
> [<c035e804>] (drm_mode_destroy_dumb_ioctl) from [<c034f918>] (drm_ioctl+0x3f4/0x498)
> r4:e989e000 r3:c035e804
> [<c034f524>] (drm_ioctl) from [<c0115fac>] (do_vfs_ioctl+0x84/0x664)
> r10:00000000 r9:e8ca2000 r8:beeb6bb4 r7:e9824560 r6:c01165d0 r5:00000006
> r4:e9b97300
> [<c0115f28>] (do_vfs_ioctl) from [<c01165d0>] (SyS_ioctl+0x44/0x64)
> r10:00000000 r9:e8ca2000 r8:00000006 r7:c00464b4 r6:beeb6bb4 r5:e9b97300
> r4:00000000
> [<c011658c>] (SyS_ioctl) from [<c000e6e0>] (ret_fast_syscall+0x0/0x48)
> r8:c000e8a4 r7:00000036 r6:00000006 r5:c00464b4 r4:beeb6bb4
>
> --
> FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
> in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
> Estimate before purchase was "up to 13.2Mbit".
> _______________________________________________
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply
* [PATCH v6 0/3] perf: AARCH64 arch support
From: Jean Pihet @ 2014-02-12 8:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391451509-31265-1-git-send-email-jean.pihet@linaro.org>
Hi Will,
Ping on the series. Is this OK for inclusion?
Regards,
Jean
On 3 February 2014 19:18, Jean Pihet <jean.pihet@linaro.org> wrote:
> Add AARCH64 specific support. This includes the following:
> - AARCH64 perf registers definition and hooks,
> - compat mode registers use, i.e. profiling a 32-bit binary on
> a 64-bit system,
> - unwinding using the dwarf information from the .debug_frame
> section of the ELF binary,
> - unwinding using the frame pointer information; in 64-bit and
> compat modes.
>
> Notes:
> - the tools/perf change is submitted separately on LKML,
> - support for unwinding using the dwarf information in compat
> mode requires some changes to the libunwind code. Those changes
> have been submitted on the libunwind ML and are in discussion.
>
> Tested on ARMv7, ARMv8 and x86_64 platforms. The compat mode has been
> tested on ARMv8 using statically built 32-bit binaries.
>
>
> Jean Pihet (3):
> ARM64: perf: add support for perf registers API
> ARM64: perf: add support for frame pointer unwinding in compat mode
> ARM64: perf: support dwarf unwinding in compat mode
>
> arch/arm64/Kconfig | 2 +
> arch/arm64/include/asm/compat.h | 2 +-
> arch/arm64/include/asm/ptrace.h | 3 +-
> arch/arm64/include/uapi/asm/Kbuild | 1 +
> arch/arm64/include/uapi/asm/perf_regs.h | 40 ++++++++++++++++++
> arch/arm64/kernel/Makefile | 1 +
> arch/arm64/kernel/perf_event.c | 75 +++++++++++++++++++++++++++++----
> arch/arm64/kernel/perf_regs.c | 44 +++++++++++++++++++
> 8 files changed, 158 insertions(+), 10 deletions(-)
> create mode 100644 arch/arm64/include/uapi/asm/perf_regs.h
> create mode 100644 arch/arm64/kernel/perf_regs.c
>
> --
> 1.7.11.7
>
^ permalink raw reply
* [PATCH] phy-core: Don't allow building phy-core as a module
From: Roger Quadros @ 2014-02-12 8:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392134631-32030-1-git-send-email-hdegoede@redhat.com>
On 02/11/2014 06:03 PM, Hans de Goede wrote:
> include/phy/phy.h has stub code in there for when building without the
> phy-core enabled. This is useful for generic drivers such as ahci-platform,
> ehci-platoform and ohci-platform which have support for driving an optional
> phy passed to them through the devicetree.
>
> Since on some boards this phy functionality is not needed, being able to
> disable the phy subsystem without needing a lot of #ifdef magic in the
> driver using it is quite useful.
>
> However this breaks when the module using the phy subsystem is build-in and
> the phy-core is not, which leads to the build failing with missing symbol
> errors in the linking stage of the zImage.
>
> Which leads to gems such as this being added to the Kconfig for achi_platform:
>
> depends on GENERIC_PHY || !GENERIC_PHY
>
> Rather then duplicating this code in a lot of places using the phy-core,
> I believe it is better to simply not allow the phy-core to be built as a
> module. The phy core is quite small and has no external dependencies, so
> always building it in when enabling it should not be an issue.
>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Roger Quadros <rogerq@ti.com>
--
cheers,
-roger
> ---
> drivers/phy/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 6070c99..6e336b4 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -5,7 +5,7 @@
> menu "PHY Subsystem"
>
> config GENERIC_PHY
> - tristate "PHY Core"
> + bool "PHY Core"
> help
> Generic PHY support.
>
>
^ permalink raw reply
* [PATCH] perf: ARM64: wire up perf_regs and unwind support
From: Jean Pihet @ 2014-02-12 8:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1391451427-31221-1-git-send-email-jean.pihet@linaro.org>
Hi Arnaldo, Will,
Ping on this patch.
Regards,
Jean
On 3 February 2014 19:17, Jean Pihet <jean.pihet@linaro.org> wrote:
> This patch hooks in the perf_regs and libunwind code for ARM64.
> The tools/perf/arch/arm64 is created; it contains the arch specific
> code for DWARF unwinding.
>
> Signed-off-by: Jean Pihet <jean.pihet@linaro.org>
> Acked-by: Will Deacon <will.deacon@arm.com>
> ---
> tools/perf/arch/arm64/Makefile | 7 +++
> tools/perf/arch/arm64/include/perf_regs.h | 88 +++++++++++++++++++++++++++++++
> tools/perf/arch/arm64/util/dwarf-regs.c | 80 ++++++++++++++++++++++++++++
> tools/perf/arch/arm64/util/unwind.c | 82 ++++++++++++++++++++++++++++
> tools/perf/config/Makefile | 8 ++-
> 5 files changed, 264 insertions(+), 1 deletion(-)
> create mode 100644 tools/perf/arch/arm64/Makefile
> create mode 100644 tools/perf/arch/arm64/include/perf_regs.h
> create mode 100644 tools/perf/arch/arm64/util/dwarf-regs.c
> create mode 100644 tools/perf/arch/arm64/util/unwind.c
>
> diff --git a/tools/perf/arch/arm64/Makefile b/tools/perf/arch/arm64/Makefile
> new file mode 100644
> index 0000000..fe9b61e
> --- /dev/null
> +++ b/tools/perf/arch/arm64/Makefile
> @@ -0,0 +1,7 @@
> +ifndef NO_DWARF
> +PERF_HAVE_DWARF_REGS := 1
> +LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o
> +endif
> +ifndef NO_LIBUNWIND
> +LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/unwind.o
> +endif
> diff --git a/tools/perf/arch/arm64/include/perf_regs.h b/tools/perf/arch/arm64/include/perf_regs.h
> new file mode 100644
> index 0000000..2359546
> --- /dev/null
> +++ b/tools/perf/arch/arm64/include/perf_regs.h
> @@ -0,0 +1,88 @@
> +#ifndef ARCH_PERF_REGS_H
> +#define ARCH_PERF_REGS_H
> +
> +#include <stdlib.h>
> +#include "../../util/types.h"
> +#include <asm/perf_regs.h>
> +
> +#define PERF_REGS_MASK ((1ULL << PERF_REG_ARM64_MAX) - 1)
> +#define PERF_REG_IP PERF_REG_ARM64_PC
> +#define PERF_REG_SP PERF_REG_ARM64_SP
> +
> +static inline const char *perf_reg_name(int id)
> +{
> + switch (id) {
> + case PERF_REG_ARM64_X0:
> + return "x0";
> + case PERF_REG_ARM64_X1:
> + return "x1";
> + case PERF_REG_ARM64_X2:
> + return "x2";
> + case PERF_REG_ARM64_X3:
> + return "x3";
> + case PERF_REG_ARM64_X4:
> + return "x4";
> + case PERF_REG_ARM64_X5:
> + return "x5";
> + case PERF_REG_ARM64_X6:
> + return "x6";
> + case PERF_REG_ARM64_X7:
> + return "x7";
> + case PERF_REG_ARM64_X8:
> + return "x8";
> + case PERF_REG_ARM64_X9:
> + return "x9";
> + case PERF_REG_ARM64_X10:
> + return "x10";
> + case PERF_REG_ARM64_X11:
> + return "x11";
> + case PERF_REG_ARM64_X12:
> + return "x12";
> + case PERF_REG_ARM64_X13:
> + return "x13";
> + case PERF_REG_ARM64_X14:
> + return "x14";
> + case PERF_REG_ARM64_X15:
> + return "x15";
> + case PERF_REG_ARM64_X16:
> + return "x16";
> + case PERF_REG_ARM64_X17:
> + return "x17";
> + case PERF_REG_ARM64_X18:
> + return "x18";
> + case PERF_REG_ARM64_X19:
> + return "x19";
> + case PERF_REG_ARM64_X20:
> + return "x20";
> + case PERF_REG_ARM64_X21:
> + return "x21";
> + case PERF_REG_ARM64_X22:
> + return "x22";
> + case PERF_REG_ARM64_X23:
> + return "x23";
> + case PERF_REG_ARM64_X24:
> + return "x24";
> + case PERF_REG_ARM64_X25:
> + return "x25";
> + case PERF_REG_ARM64_X26:
> + return "x26";
> + case PERF_REG_ARM64_X27:
> + return "x27";
> + case PERF_REG_ARM64_X28:
> + return "x28";
> + case PERF_REG_ARM64_X29:
> + return "x29";
> + case PERF_REG_ARM64_SP:
> + return "sp";
> + case PERF_REG_ARM64_LR:
> + return "lr";
> + case PERF_REG_ARM64_PC:
> + return "pc";
> + default:
> + return NULL;
> + }
> +
> + return NULL;
> +}
> +
> +#endif /* ARCH_PERF_REGS_H */
> diff --git a/tools/perf/arch/arm64/util/dwarf-regs.c b/tools/perf/arch/arm64/util/dwarf-regs.c
> new file mode 100644
> index 0000000..d49efeb
> --- /dev/null
> +++ b/tools/perf/arch/arm64/util/dwarf-regs.c
> @@ -0,0 +1,80 @@
> +/*
> + * Mapping of DWARF debug register numbers into register names.
> + *
> + * Copyright (C) 2010 Will Deacon, ARM Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <stddef.h>
> +#include <dwarf-regs.h>
> +
> +struct pt_regs_dwarfnum {
> + const char *name;
> + unsigned int dwarfnum;
> +};
> +
> +#define STR(s) #s
> +#define REG_DWARFNUM_NAME(r, num) {.name = r, .dwarfnum = num}
> +#define GPR_DWARFNUM_NAME(num) \
> + {.name = STR(%x##num), .dwarfnum = num}
> +#define REG_DWARFNUM_END {.name = NULL, .dwarfnum = 0}
> +
> +/*
> + * Reference:
> + * http://infocenter.arm.com/help/topic/com.arm.doc.ihi0057b/IHI0057B_aadwarf64.pdf
> + */
> +static const struct pt_regs_dwarfnum regdwarfnum_table[] = {
> + GPR_DWARFNUM_NAME(0),
> + GPR_DWARFNUM_NAME(1),
> + GPR_DWARFNUM_NAME(2),
> + GPR_DWARFNUM_NAME(3),
> + GPR_DWARFNUM_NAME(4),
> + GPR_DWARFNUM_NAME(5),
> + GPR_DWARFNUM_NAME(6),
> + GPR_DWARFNUM_NAME(7),
> + GPR_DWARFNUM_NAME(8),
> + GPR_DWARFNUM_NAME(9),
> + GPR_DWARFNUM_NAME(10),
> + GPR_DWARFNUM_NAME(11),
> + GPR_DWARFNUM_NAME(12),
> + GPR_DWARFNUM_NAME(13),
> + GPR_DWARFNUM_NAME(14),
> + GPR_DWARFNUM_NAME(15),
> + GPR_DWARFNUM_NAME(16),
> + GPR_DWARFNUM_NAME(17),
> + GPR_DWARFNUM_NAME(18),
> + GPR_DWARFNUM_NAME(19),
> + GPR_DWARFNUM_NAME(20),
> + GPR_DWARFNUM_NAME(21),
> + GPR_DWARFNUM_NAME(22),
> + GPR_DWARFNUM_NAME(23),
> + GPR_DWARFNUM_NAME(24),
> + GPR_DWARFNUM_NAME(25),
> + GPR_DWARFNUM_NAME(26),
> + GPR_DWARFNUM_NAME(27),
> + GPR_DWARFNUM_NAME(28),
> + GPR_DWARFNUM_NAME(29),
> + REG_DWARFNUM_NAME("%lr", 30),
> + REG_DWARFNUM_NAME("%sp", 31),
> + REG_DWARFNUM_END,
> +};
> +
> +/**
> + * get_arch_regstr() - lookup register name from it's DWARF register number
> + * @n: the DWARF register number
> + *
> + * get_arch_regstr() returns the name of the register in struct
> + * regdwarfnum_table from it's DWARF register number. If the register is not
> + * found in the table, this returns NULL;
> + */
> +const char *get_arch_regstr(unsigned int n)
> +{
> + const struct pt_regs_dwarfnum *roff;
> + for (roff = regdwarfnum_table; roff->name != NULL; roff++)
> + if (roff->dwarfnum == n)
> + return roff->name;
> + return NULL;
> +}
> diff --git a/tools/perf/arch/arm64/util/unwind.c b/tools/perf/arch/arm64/util/unwind.c
> new file mode 100644
> index 0000000..8d37a4c
> --- /dev/null
> +++ b/tools/perf/arch/arm64/util/unwind.c
> @@ -0,0 +1,82 @@
> +
> +#include <errno.h>
> +#include <libunwind.h>
> +#include "perf_regs.h"
> +#include "../../util/unwind.h"
> +
> +int unwind__arch_reg_id(int regnum)
> +{
> + switch (regnum) {
> + case UNW_AARCH64_X0:
> + return PERF_REG_ARM64_X0;
> + case UNW_AARCH64_X1:
> + return PERF_REG_ARM64_X1;
> + case UNW_AARCH64_X2:
> + return PERF_REG_ARM64_X2;
> + case UNW_AARCH64_X3:
> + return PERF_REG_ARM64_X3;
> + case UNW_AARCH64_X4:
> + return PERF_REG_ARM64_X4;
> + case UNW_AARCH64_X5:
> + return PERF_REG_ARM64_X5;
> + case UNW_AARCH64_X6:
> + return PERF_REG_ARM64_X6;
> + case UNW_AARCH64_X7:
> + return PERF_REG_ARM64_X7;
> + case UNW_AARCH64_X8:
> + return PERF_REG_ARM64_X8;
> + case UNW_AARCH64_X9:
> + return PERF_REG_ARM64_X9;
> + case UNW_AARCH64_X10:
> + return PERF_REG_ARM64_X10;
> + case UNW_AARCH64_X11:
> + return PERF_REG_ARM64_X11;
> + case UNW_AARCH64_X12:
> + return PERF_REG_ARM64_X12;
> + case UNW_AARCH64_X13:
> + return PERF_REG_ARM64_X13;
> + case UNW_AARCH64_X14:
> + return PERF_REG_ARM64_X14;
> + case UNW_AARCH64_X15:
> + return PERF_REG_ARM64_X15;
> + case UNW_AARCH64_X16:
> + return PERF_REG_ARM64_X16;
> + case UNW_AARCH64_X17:
> + return PERF_REG_ARM64_X17;
> + case UNW_AARCH64_X18:
> + return PERF_REG_ARM64_X18;
> + case UNW_AARCH64_X19:
> + return PERF_REG_ARM64_X19;
> + case UNW_AARCH64_X20:
> + return PERF_REG_ARM64_X20;
> + case UNW_AARCH64_X21:
> + return PERF_REG_ARM64_X21;
> + case UNW_AARCH64_X22:
> + return PERF_REG_ARM64_X22;
> + case UNW_AARCH64_X23:
> + return PERF_REG_ARM64_X23;
> + case UNW_AARCH64_X24:
> + return PERF_REG_ARM64_X24;
> + case UNW_AARCH64_X25:
> + return PERF_REG_ARM64_X25;
> + case UNW_AARCH64_X26:
> + return PERF_REG_ARM64_X26;
> + case UNW_AARCH64_X27:
> + return PERF_REG_ARM64_X27;
> + case UNW_AARCH64_X28:
> + return PERF_REG_ARM64_X28;
> + case UNW_AARCH64_X29:
> + return PERF_REG_ARM64_X29;
> + case UNW_AARCH64_X30:
> + return PERF_REG_ARM64_LR;
> + case UNW_AARCH64_SP:
> + return PERF_REG_ARM64_SP;
> + case UNW_AARCH64_PC:
> + return PERF_REG_ARM64_PC;
> + default:
> + pr_err("unwind: invalid reg id %d\n", regnum);
> + return -EINVAL;
> + }
> +
> + return -EINVAL;
> +}
> diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
> index c48d449..5c0a6ed 100644
> --- a/tools/perf/config/Makefile
> +++ b/tools/perf/config/Makefile
> @@ -29,11 +29,17 @@ ifeq ($(ARCH),x86)
> endif
> NO_PERF_REGS := 0
> endif
> +
> ifeq ($(ARCH),arm)
> NO_PERF_REGS := 0
> LIBUNWIND_LIBS = -lunwind -lunwind-arm
> endif
>
> +ifeq ($(ARCH),arm64)
> + NO_PERF_REGS := 0
> + LIBUNWIND_LIBS = -lunwind -lunwind-aarch64
> +endif
> +
> ifeq ($(LIBUNWIND_LIBS),)
> NO_LIBUNWIND := 1
> else
> @@ -327,7 +333,7 @@ ifndef NO_LIBUNWIND
> msg := $(warning No libunwind found, disabling post unwind support. Please install libunwind-dev[el] >= 1.1);
> NO_LIBUNWIND := 1
> else
> - ifeq ($(ARCH),arm)
> + ifeq ($(ARCH),$(filter $(ARCH),arm arm64))
> $(call feature_check,libunwind-debug-frame)
> ifneq ($(feature-libunwind-debug-frame), 1)
> msg := $(warning No debug_frame support found in libunwind);
> --
> 1.7.11.7
>
^ permalink raw reply
* [PATCH v2 1/2] ohci-platform: Change compatible string from usb-ohci to generic-ohci
From: Roger Quadros @ 2014-02-12 8:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392136529-5060-2-git-send-email-hdegoede@redhat.com>
On 02/11/2014 06:35 PM, Hans de Goede wrote:
> The initial versions of the devicetree enablement patches for ohci-platform
> used "ohci-platform" as compatible string. However this was disliked by various
> reviewers because the platform bus is a Linux invention and devicetree is
> supposed to be OS agnostic. After much discussion I gave up and went with
> the generic usb-ohci as requested.
>
> In retro-spect I should have chosen something different, the dts files for many
> existing boards already claim to be compatible with "usb-ohci", ie they have:
>
> compatible = "ti,ohci-omap3", "usb-ohci";
>
> In theory this should not be a problem since the "ti,ohci-omap3" entry takes
> presedence, but in practice using a conflicting compatible string is an issue,
> because it makes which driver gets used depend on driver registration order.
>
> This patch changes the compatible string claimed by ohci-platform to
> "generic-ohci", avoiding the driver registration / module loading ordering
> problems.
>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> ---
> Documentation/devicetree/bindings/usb/usb-ohci.txt | 4 ++--
> drivers/usb/host/ohci-platform.c | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/usb/usb-ohci.txt b/Documentation/devicetree/bindings/usb/usb-ohci.txt
> index 6933b0c..45f67d9 100644
> --- a/Documentation/devicetree/bindings/usb/usb-ohci.txt
> +++ b/Documentation/devicetree/bindings/usb/usb-ohci.txt
> @@ -1,7 +1,7 @@
> USB OHCI controllers
>
> Required properties:
> -- compatible : "usb-ohci"
> +- compatible : "generic-ohci"
> - reg : ohci controller register range (address and length)
> - interrupts : ohci controller interrupt
>
> @@ -16,7 +16,7 @@ Optional properties:
> Example:
>
> ohci0: usb at 01c14400 {
> - compatible = "allwinner,sun4i-a10-ohci", "usb-ohci";
> + compatible = "allwinner,sun4i-a10-ohci", "generic-ohci";
> reg = <0x01c14400 0x100>;
> interrupts = <64>;
> clocks = <&usb_clk 6>, <&ahb_gates 2>;
> diff --git a/drivers/usb/host/ohci-platform.c b/drivers/usb/host/ohci-platform.c
> index e2c28fd..b6ca0b2 100644
> --- a/drivers/usb/host/ohci-platform.c
> +++ b/drivers/usb/host/ohci-platform.c
> @@ -319,7 +319,7 @@ static int ohci_platform_resume(struct device *dev)
> #endif /* CONFIG_PM */
>
> static const struct of_device_id ohci_platform_ids[] = {
> - { .compatible = "usb-ohci", },
> + { .compatible = "generic-ohci", },
> { }
> };
> MODULE_DEVICE_TABLE(of, ohci_platform_ids);
>
both v2 patches
Acked-by: Roger Quadros <rogerq@ti.com>
^ permalink raw reply
* [PATCH v2 1/4] tty/serial: Add GPIOLIB helpers for controlling modem lines
From: Richard Genoud @ 2014-02-12 8:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392142986.607813065@f171.i.mail.ru>
2014-02-11 19:23 GMT+01:00 Alexander Shiyan <shc_work@mail.ru>:
> Hello.
Hi !
>
> ???????, 11 ??????? 2014, 18:45 +01:00 ?? Richard Genoud <richard.genoud@gmail.com>:
>> This patch add some helpers to control modem lines (CTS/RTS/DSR...) via
>> GPIO.
>> This will be useful for many boards which have a serial controller that
>> only handle CTS/RTS pins (or even just RX/TX).
>>
>> Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
>> ---
>
> OK, a few comments below.
>
> ...
>> +config SERIAL_MCTRL_GPIO
>> + def_bool y
>> + depends on GPIOLIB
>
> I suggest to move GPIOLIB dependency to serial_mctrl_gpio.h header, so
> unit can be used with or without GPIOLIB, so Kconfig will look something like this:
>
> config SERIAL_MCTRL_GPIO
> tristate
>
> Then, you can select this option for particular UART:
> config SERIAL_ATMEL
> ...
> select SERIAL_MCTRL_GPIO
Yes, you're right, it seems better like that.
> ...
>> +++ b/drivers/tty/serial/serial_mctrl_gpio.c
> ...
>> +static const char *mctrl_gpio_of_names[UART_GPIO_MAX] = {
>> + "cts", "dsr", "dcd", "ri", "rts", "dtr"
>> +};
>
> Make a combined array. This will use cycles for set/get operations.
>
> static struct {
> const char *name;
> unsigned int mctrl;
> } mctrl_gpios[] = {
> { "cts", TIOCM_CTS, },
> ...
> };
yes, good idea !
> ...
>> +int mctrl_gpio_init(struct device *dev, struct mctrl_gpios *gpios)
>> +{
>
> I'm not sure whether to make a non-DT support at all ...
I don't understand what you mean.
You would like another _init() function for non-DT board ?
Well, I thought that non DT board could handle their GPIO init (like I
did in atmel_serial.c for platform_data based boards), but still use
the mctrl_gpio_{get,set} functions.
>> + enum mctrl_gpio_idx i;
>> + int err = 0;
>> + int ret = 0;
>> +
>> + for (i = UART_GPIO_MIN; i < UART_GPIO_MAX; i++) {
>> + gpios->gpio[i] = gpiod_get(dev, mctrl_gpio_of_names[i]);
>
> What a reason to using gpiod_xxx() ?
> Why we cannot use standart devm_gpio_request/get/set etc. ?
Ah ! I missed devm_gpiod_get()
I'll use it.
>
> In addition, I recommend create this patch as separate,
> because it will most likely still be comments later.
Well, I'd rather not separate this patch from at least "patch 4/4
tty/serial: at91: use mctrl_gpio helpers"
because if the patch 4/4 is merged before this one, the compilation
will fail, and git bisecting will be a pain.
Or there's another solution ?
> Thanks.
Thanks !
^ permalink raw reply
* [PATCHv3 2/2] arm: Get rid of meminfo
From: Marek Szyprowski @ 2014-02-12 8:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392153265-14439-3-git-send-email-lauraa@codeaurora.org>
Hello,
On 2014-02-11 22:14, Laura Abbott wrote:
> memblock is now fully integrated into the kernel and is the prefered
> method for tracking memory. Rather than reinvent the wheel with
> meminfo, migrate to using memblock directly instead of meminfo as
> an intermediate.
>
> Acked-by: Jason Cooper <jason@lakedaemon.net>
> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
> Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
> arch/arm/include/asm/mach/arch.h | 4 +-
> arch/arm/include/asm/memblock.h | 3 +-
> arch/arm/include/asm/setup.h | 23 ------
> arch/arm/kernel/atags_parse.c | 5 +-
> arch/arm/kernel/devtree.c | 5 --
> arch/arm/kernel/setup.c | 30 ++------
> arch/arm/mach-clps711x/board-clep7312.c | 7 +-
> arch/arm/mach-clps711x/board-edb7211.c | 10 +--
> arch/arm/mach-clps711x/board-p720t.c | 2 +-
> arch/arm/mach-footbridge/cats-hw.c | 2 +-
> arch/arm/mach-footbridge/netwinder-hw.c | 2 +-
> arch/arm/mach-msm/board-halibut.c | 6 --
> arch/arm/mach-msm/board-mahimahi.c | 13 +---
> arch/arm/mach-msm/board-msm7x30.c | 3 +-
> arch/arm/mach-msm/board-sapphire.c | 13 ++--
> arch/arm/mach-msm/board-trout.c | 8 +--
> arch/arm/mach-orion5x/common.c | 3 +-
> arch/arm/mach-orion5x/common.h | 3 +-
> arch/arm/mach-pxa/cm-x300.c | 3 +-
> arch/arm/mach-pxa/corgi.c | 10 +--
> arch/arm/mach-pxa/eseries.c | 9 +--
> arch/arm/mach-pxa/poodle.c | 8 +--
> arch/arm/mach-pxa/spitz.c | 8 +--
> arch/arm/mach-pxa/tosa.c | 8 +--
> arch/arm/mach-realview/core.c | 11 +--
> arch/arm/mach-realview/core.h | 3 +-
> arch/arm/mach-realview/realview_pb1176.c | 8 +--
> arch/arm/mach-realview/realview_pbx.c | 17 ++---
> arch/arm/mach-s3c24xx/mach-smdk2413.c | 8 +--
> arch/arm/mach-s3c24xx/mach-vstms.c | 8 +--
> arch/arm/mach-sa1100/assabet.c | 2 +-
> arch/arm/mm/init.c | 67 +++++++-----------
> arch/arm/mm/mmu.c | 115 +++++++++---------------------
> 33 files changed, 136 insertions(+), 291 deletions(-)
>
> diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
> index 17a3fa2..c43473a 100644
> --- a/arch/arm/include/asm/mach/arch.h
> +++ b/arch/arm/include/asm/mach/arch.h
> @@ -14,7 +14,6 @@
> #include <linux/reboot.h>
>
> struct tag;
> -struct meminfo;
> struct pt_regs;
> struct smp_operations;
> #ifdef CONFIG_SMP
> @@ -47,8 +46,7 @@ struct machine_desc {
> enum reboot_mode reboot_mode; /* default restart mode */
> struct smp_operations *smp; /* SMP operations */
> bool (*smp_init)(void);
> - void (*fixup)(struct tag *, char **,
> - struct meminfo *);
> + void (*fixup)(struct tag *, char **);
> void (*init_meminfo)(void);
> void (*reserve)(void);/* reserve mem blocks */
> void (*map_io)(void);/* IO mapping function */
> diff --git a/arch/arm/include/asm/memblock.h b/arch/arm/include/asm/memblock.h
> index c2f5102..bf47a6c 100644
> --- a/arch/arm/include/asm/memblock.h
> +++ b/arch/arm/include/asm/memblock.h
> @@ -1,10 +1,9 @@
> #ifndef _ASM_ARM_MEMBLOCK_H
> #define _ASM_ARM_MEMBLOCK_H
>
> -struct meminfo;
> struct machine_desc;
>
> -void arm_memblock_init(struct meminfo *, const struct machine_desc *);
> +void arm_memblock_init(const struct machine_desc *);
> phys_addr_t arm_memblock_steal(phys_addr_t size, phys_addr_t align);
>
> #endif
> diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
> index 8d6a089..0196091 100644
> --- a/arch/arm/include/asm/setup.h
> +++ b/arch/arm/include/asm/setup.h
> @@ -26,29 +26,6 @@ static const struct tagtable __tagtable_##fn __tag = { tag, fn }
> */
> #define NR_BANKS CONFIG_ARM_NR_BANKS
>
> -struct membank {
> - phys_addr_t start;
> - phys_addr_t size;
> - unsigned int highmem;
> -};
> -
> -struct meminfo {
> - int nr_banks;
> - struct membank bank[NR_BANKS];
> -};
> -
> -extern struct meminfo meminfo;
> -
> -#define for_each_bank(iter,mi) \
> - for (iter = 0; iter < (mi)->nr_banks; iter++)
> -
> -#define bank_pfn_start(bank) __phys_to_pfn((bank)->start)
> -#define bank_pfn_end(bank) __phys_to_pfn((bank)->start + (bank)->size)
> -#define bank_pfn_size(bank) ((bank)->size >> PAGE_SHIFT)
> -#define bank_phys_start(bank) (bank)->start
> -#define bank_phys_end(bank) ((bank)->start + (bank)->size)
> -#define bank_phys_size(bank) (bank)->size
> -
> extern int arm_add_memory(u64 start, u64 size);
> extern void early_print(const char *str, ...);
> extern void dump_machine_table(void);
> diff --git a/arch/arm/kernel/atags_parse.c b/arch/arm/kernel/atags_parse.c
> index 8c14de8..7807ef5 100644
> --- a/arch/arm/kernel/atags_parse.c
> +++ b/arch/arm/kernel/atags_parse.c
> @@ -22,6 +22,7 @@
> #include <linux/fs.h>
> #include <linux/root_dev.h>
> #include <linux/screen_info.h>
> +#include <linux/memblock.h>
>
> #include <asm/setup.h>
> #include <asm/system_info.h>
> @@ -222,10 +223,10 @@ setup_machine_tags(phys_addr_t __atags_pointer, unsigned int machine_nr)
> }
>
> if (mdesc->fixup)
> - mdesc->fixup(tags, &from, &meminfo);
> + mdesc->fixup(tags, &from);
>
> if (tags->hdr.tag == ATAG_CORE) {
> - if (meminfo.nr_banks != 0)
> + if (memblock_phys_mem_size())
> squash_mem_tags(tags);
> save_atags(tags);
> parse_tags(tags);
> diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
> index f751714..398cd5f 100644
> --- a/arch/arm/kernel/devtree.c
> +++ b/arch/arm/kernel/devtree.c
> @@ -26,11 +26,6 @@
> #include <asm/mach/arch.h>
> #include <asm/mach-types.h>
>
> -void __init early_init_dt_add_memory_arch(u64 base, u64 size)
> -{
> - arm_add_memory(base, size);
> -}
> -
> void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
> {
> return memblock_virt_alloc(size, align);
> diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
> index 1e8b030..7dd83d0 100644
> --- a/arch/arm/kernel/setup.c
> +++ b/arch/arm/kernel/setup.c
> @@ -625,15 +625,8 @@ void __init dump_machine_table(void)
>
> int __init arm_add_memory(u64 start, u64 size)
> {
> - struct membank *bank = &meminfo.bank[meminfo.nr_banks];
> u64 aligned_start;
>
> - if (meminfo.nr_banks >= NR_BANKS) {
> - pr_crit("NR_BANKS too low, ignoring memory at 0x%08llx\n",
> - (long long)start);
> - return -EINVAL;
> - }
> -
> /*
> * Ensure that start/size are aligned to a page boundary.
> * Size is appropriately rounded down, start is rounded up.
> @@ -674,17 +667,17 @@ int __init arm_add_memory(u64 start, u64 size)
> aligned_start = PHYS_OFFSET;
> }
>
> - bank->start = aligned_start;
> - bank->size = size & ~(phys_addr_t)(PAGE_SIZE - 1);
> + start = aligned_start;
> + size = size & ~(phys_addr_t)(PAGE_SIZE - 1);
>
> /*
> * Check whether this memory region has non-zero size or
> * invalid node number.
> */
> - if (bank->size == 0)
> + if (size == 0)
> return -EINVAL;
>
> - meminfo.nr_banks++;
> + memblock_add(start, size);
> return 0;
> }
>
> @@ -692,6 +685,7 @@ int __init arm_add_memory(u64 start, u64 size)
> * Pick out the memory size. We look for mem=size at start,
> * where start and size are "size[KkMm]"
> */
> +
> static int __init early_mem(char *p)
> {
> static int usermem __initdata = 0;
> @@ -706,7 +700,8 @@ static int __init early_mem(char *p)
> */
> if (usermem == 0) {
> usermem = 1;
> - meminfo.nr_banks = 0;
> + memblock_remove(memblock_start_of_DRAM(),
> + memblock_end_of_DRAM() - memblock_start_of_DRAM());
> }
>
> start = PHYS_OFFSET;
> @@ -851,13 +846,6 @@ static void __init reserve_crashkernel(void)
> static inline void reserve_crashkernel(void) {}
> #endif /* CONFIG_KEXEC */
>
> -static int __init meminfo_cmp(const void *_a, const void *_b)
> -{
> - const struct membank *a = _a, *b = _b;
> - long cmp = bank_pfn_start(a) - bank_pfn_start(b);
> - return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
> -}
> -
> void __init hyp_mode_check(void)
> {
> #ifdef CONFIG_ARM_VIRT_EXT
> @@ -900,12 +888,10 @@ void __init setup_arch(char **cmdline_p)
>
> parse_early_param();
>
> - sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
> -
> early_paging_init(mdesc, lookup_processor_type(read_cpuid_id()));
> setup_dma_zone(mdesc);
> sanity_check_meminfo();
> - arm_memblock_init(&meminfo, mdesc);
> + arm_memblock_init(mdesc);
>
> paging_init(mdesc);
> request_standard_resources(mdesc);
> diff --git a/arch/arm/mach-clps711x/board-clep7312.c b/arch/arm/mach-clps711x/board-clep7312.c
> index b476424..4d04b91 100644
> --- a/arch/arm/mach-clps711x/board-clep7312.c
> +++ b/arch/arm/mach-clps711x/board-clep7312.c
> @@ -18,6 +18,7 @@
> #include <linux/init.h>
> #include <linux/types.h>
> #include <linux/string.h>
> +#include <linux/memblock.h>
>
> #include <asm/setup.h>
> #include <asm/mach-types.h>
> @@ -26,11 +27,9 @@
> #include "common.h"
>
> static void __init
> -fixup_clep7312(struct tag *tags, char **cmdline, struct meminfo *mi)
> +fixup_clep7312(struct tag *tags, char **cmdline)
> {
> - mi->nr_banks=1;
> - mi->bank[0].start = 0xc0000000;
> - mi->bank[0].size = 0x01000000;
> + memblock_add(0xc0000000, 0x01000000);
> }
>
> MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312")
> diff --git a/arch/arm/mach-clps711x/board-edb7211.c b/arch/arm/mach-clps711x/board-edb7211.c
> index fe6184e..b617aa2 100644
> --- a/arch/arm/mach-clps711x/board-edb7211.c
> +++ b/arch/arm/mach-clps711x/board-edb7211.c
> @@ -16,6 +16,7 @@
> #include <linux/interrupt.h>
> #include <linux/backlight.h>
> #include <linux/platform_device.h>
> +#include <linux/memblock.h>
>
> #include <linux/mtd/physmap.h>
> #include <linux/mtd/partitions.h>
> @@ -133,7 +134,7 @@ static void __init edb7211_reserve(void)
> }
>
> static void __init
> -fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi)
> +fixup_edb7211(struct tag *tags, char **cmdline)
> {
> /*
> * Bank start addresses are not present in the information
> @@ -143,11 +144,8 @@ fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi)
> * Banks sizes _are_ present in the param block, but we're
> * not using that information yet.
> */
> - mi->bank[0].start = 0xc0000000;
> - mi->bank[0].size = SZ_8M;
> - mi->bank[1].start = 0xc1000000;
> - mi->bank[1].size = SZ_8M;
> - mi->nr_banks = 2;
> + memblock_add(0xc0000000, SZ_8M);
> + memblock_add(0xc1000000, SZ_8M);
> }
>
> static void __init edb7211_init(void)
> diff --git a/arch/arm/mach-clps711x/board-p720t.c b/arch/arm/mach-clps711x/board-p720t.c
> index dd81b06..c1c6729 100644
> --- a/arch/arm/mach-clps711x/board-p720t.c
> +++ b/arch/arm/mach-clps711x/board-p720t.c
> @@ -295,7 +295,7 @@ static struct generic_bl_info p720t_lcd_backlight_pdata = {
> };
>
> static void __init
> -fixup_p720t(struct tag *tag, char **cmdline, struct meminfo *mi)
> +fixup_p720t(struct tag *tag, char **cmdline)
> {
> /*
> * Our bootloader doesn't setup any tags (yet).
> diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
> index 9669cc0..de86ab6 100644
> --- a/arch/arm/mach-footbridge/cats-hw.c
> +++ b/arch/arm/mach-footbridge/cats-hw.c
> @@ -76,7 +76,7 @@ __initcall(cats_hw_init);
> * hard reboots fail on early boards.
> */
> static void __init
> -fixup_cats(struct tag *tags, char **cmdline, struct meminfo *mi)
> +fixup_cats(struct tag *tags, char **cmdline)
> {
> screen_info.orig_video_lines = 25;
> screen_info.orig_video_points = 16;
> diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
> index eb1fa5c..cdee08c 100644
> --- a/arch/arm/mach-footbridge/netwinder-hw.c
> +++ b/arch/arm/mach-footbridge/netwinder-hw.c
> @@ -620,7 +620,7 @@ __initcall(nw_hw_init);
> * the parameter page.
> */
> static void __init
> -fixup_netwinder(struct tag *tags, char **cmdline, struct meminfo *mi)
> +fixup_netwinder(struct tag *tags, char **cmdline)
> {
> #ifdef CONFIG_ISAPNP
> extern int isapnp_disable;
> diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
> index a775298..61bfe58 100644
> --- a/arch/arm/mach-msm/board-halibut.c
> +++ b/arch/arm/mach-msm/board-halibut.c
> @@ -83,11 +83,6 @@ static void __init halibut_init(void)
> platform_add_devices(devices, ARRAY_SIZE(devices));
> }
>
> -static void __init halibut_fixup(struct tag *tags, char **cmdline,
> - struct meminfo *mi)
> -{
> -}
> -
> static void __init halibut_map_io(void)
> {
> msm_map_common_io();
> @@ -100,7 +95,6 @@ static void __init halibut_init_late(void)
>
> MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)")
> .atag_offset = 0x100,
> - .fixup = halibut_fixup,
> .map_io = halibut_map_io,
> .init_early = halibut_init_early,
> .init_irq = halibut_init_irq,
> diff --git a/arch/arm/mach-msm/board-mahimahi.c b/arch/arm/mach-msm/board-mahimahi.c
> index 7d9981c..873c3ca 100644
> --- a/arch/arm/mach-msm/board-mahimahi.c
> +++ b/arch/arm/mach-msm/board-mahimahi.c
> @@ -22,6 +22,7 @@
> #include <linux/io.h>
> #include <linux/kernel.h>
> #include <linux/platform_device.h>
> +#include <linux/memblock.h>
>
> #include <asm/mach-types.h>
> #include <asm/mach/arch.h>
> @@ -52,16 +53,10 @@ static void __init mahimahi_init(void)
> platform_add_devices(devices, ARRAY_SIZE(devices));
> }
>
> -static void __init mahimahi_fixup(struct tag *tags, char **cmdline,
> - struct meminfo *mi)
> +static void __init mahimahi_fixup(struct tag *tags, char **cmdline)
> {
> - mi->nr_banks = 2;
> - mi->bank[0].start = PHYS_OFFSET;
> - mi->bank[0].node = PHYS_TO_NID(PHYS_OFFSET);
> - mi->bank[0].size = (219*1024*1024);
> - mi->bank[1].start = MSM_HIGHMEM_BASE;
> - mi->bank[1].node = PHYS_TO_NID(MSM_HIGHMEM_BASE);
> - mi->bank[1].size = MSM_HIGHMEM_SIZE;
> + memblock_add(PHYS_OFFSET, 219*SZ_1M);
> + memblock_add(MSM_HIGHMEM_BASE, MSM_HIGHMEM_SIZE);
> }
>
> static void __init mahimahi_map_io(void)
> diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
> index 46de789..b621b23 100644
> --- a/arch/arm/mach-msm/board-msm7x30.c
> +++ b/arch/arm/mach-msm/board-msm7x30.c
> @@ -40,8 +40,7 @@
> #include "proc_comm.h"
> #include "common.h"
>
> -static void __init msm7x30_fixup(struct tag *tag, char **cmdline,
> - struct meminfo *mi)
> +static void __init msm7x30_fixup(struct tag *tag, char **cmdline)
> {
> for (; tag->hdr.size; tag = tag_next(tag))
> if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) {
> diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c
> index 3276051..e509679 100644
> --- a/arch/arm/mach-msm/board-sapphire.c
> +++ b/arch/arm/mach-msm/board-sapphire.c
> @@ -35,6 +35,7 @@
>
> #include <linux/mtd/nand.h>
> #include <linux/mtd/partitions.h>
> +#include <linux/memblock.h>
>
> #include "gpio_chip.h"
> #include "board-sapphire.h"
> @@ -74,22 +75,18 @@ static struct map_desc sapphire_io_desc[] __initdata = {
> }
> };
>
> -static void __init sapphire_fixup(struct tag *tags, char **cmdline,
> - struct meminfo *mi)
> +static void __init sapphire_fixup(struct tag *tags, char **cmdline)
> {
> int smi_sz = parse_tag_smi((const struct tag *)tags);
>
> - mi->nr_banks = 1;
> - mi->bank[0].start = PHYS_OFFSET;
> - mi->bank[0].node = PHYS_TO_NID(PHYS_OFFSET);
> if (smi_sz == 32) {
> - mi->bank[0].size = (84*1024*1024);
> + memblock_add(PHYS_OFFSET, 84*SZ_1M);
> } else if (smi_sz == 64) {
> - mi->bank[0].size = (101*1024*1024);
> + memblock_add(PHYS_OFFSET, 101*SZ_1M);
> } else {
> + memblock_add(PHYS_OFFSET, 101*SZ_1M);
> /* Give a default value when not get smi size */
> smi_sz = 64;
> - mi->bank[0].size = (101*1024*1024);
> }
> }
>
> diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
> index 015d544..58826cf 100644
> --- a/arch/arm/mach-msm/board-trout.c
> +++ b/arch/arm/mach-msm/board-trout.c
> @@ -19,6 +19,7 @@
> #include <linux/init.h>
> #include <linux/platform_device.h>
> #include <linux/clkdev.h>
> +#include <linux/memblock.h>
>
> #include <asm/system_info.h>
> #include <asm/mach-types.h>
> @@ -55,12 +56,9 @@ static void __init trout_init_irq(void)
> msm_init_irq();
> }
>
> -static void __init trout_fixup(struct tag *tags, char **cmdline,
> - struct meminfo *mi)
> +static void __init trout_fixup(struct tag *tags, char **cmdline)
> {
> - mi->nr_banks = 1;
> - mi->bank[0].start = PHYS_OFFSET;
> - mi->bank[0].size = (101*1024*1024);
> + memblock_add(PHYS_OFFSET, 101*SZ_1M);
> }
>
> static void __init trout_init(void)
> diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
> index 3f1de11..6bbb7b5 100644
> --- a/arch/arm/mach-orion5x/common.c
> +++ b/arch/arm/mach-orion5x/common.c
> @@ -365,8 +365,7 @@ void orion5x_restart(enum reboot_mode mode, const char *cmd)
> * Many orion-based systems have buggy bootloader implementations.
> * This is a common fixup for bogus memory tags.
> */
> -void __init tag_fixup_mem32(struct tag *t, char **from,
> - struct meminfo *meminfo)
> +void __init tag_fixup_mem32(struct tag *t, char **from)
> {
> for (; t->hdr.size; t = tag_next(t))
> if (t->hdr.tag == ATAG_MEM &&
> diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
> index f565f99..175ec4c 100644
> --- a/arch/arm/mach-orion5x/common.h
> +++ b/arch/arm/mach-orion5x/common.h
> @@ -71,9 +71,8 @@ void edmini_v2_init(void);
> static inline void edmini_v2_init(void) {};
> #endif
>
> -struct meminfo;
> struct tag;
> -extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *);
> +extern void __init tag_fixup_mem32(struct tag *, char **);
>
> /*****************************************************************************
> * Helpers to access Orion registers
> diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
> index 584439bf..4d3588d 100644
> --- a/arch/arm/mach-pxa/cm-x300.c
> +++ b/arch/arm/mach-pxa/cm-x300.c
> @@ -837,8 +837,7 @@ static void __init cm_x300_init(void)
> cm_x300_init_bl();
> }
>
> -static void __init cm_x300_fixup(struct tag *tags, char **cmdline,
> - struct meminfo *mi)
> +static void __init cm_x300_fixup(struct tag *tags, char **cmdline)
> {
> /* Make sure that mi->bank[0].start = PHYS_ADDR */
> for (; tags->hdr.size; tags = tag_next(tags))
> diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
> index f162f1b..a763744 100644
> --- a/arch/arm/mach-pxa/corgi.c
> +++ b/arch/arm/mach-pxa/corgi.c
> @@ -33,6 +33,7 @@
> #include <linux/mtd/sharpsl.h>
> #include <linux/input/matrix_keypad.h>
> #include <linux/module.h>
> +#include <linux/memblock.h>
> #include <video/w100fb.h>
>
> #include <asm/setup.h>
> @@ -713,16 +714,13 @@ static void __init corgi_init(void)
> platform_add_devices(devices, ARRAY_SIZE(devices));
> }
>
> -static void __init fixup_corgi(struct tag *tags, char **cmdline,
> - struct meminfo *mi)
> +static void __init fixup_corgi(struct tag *tags, char **cmdline)
> {
> sharpsl_save_param();
> - mi->nr_banks=1;
> - mi->bank[0].start = 0xa0000000;
> if (machine_is_corgi())
> - mi->bank[0].size = (32*1024*1024);
> + memblock_add(0xa0000000, SZ_32M);
> else
> - mi->bank[0].size = (64*1024*1024);
> + memblock_add(0xa0000000, SZ_64M);
> }
>
> #ifdef CONFIG_MACH_CORGI
> diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
> index 8280ebca..cfb8641 100644
> --- a/arch/arm/mach-pxa/eseries.c
> +++ b/arch/arm/mach-pxa/eseries.c
> @@ -21,6 +21,7 @@
> #include <linux/mtd/nand.h>
> #include <linux/mtd/partitions.h>
> #include <linux/usb/gpio_vbus.h>
> +#include <linux/memblock.h>
>
> #include <video/w100fb.h>
>
> @@ -41,14 +42,12 @@
> #include "clock.h"
>
> /* Only e800 has 128MB RAM */
> -void __init eseries_fixup(struct tag *tags, char **cmdline, struct meminfo *mi)
> +void __init eseries_fixup(struct tag *tags, char **cmdline)
> {
> - mi->nr_banks=1;
> - mi->bank[0].start = 0xa0000000;
> if (machine_is_e800())
> - mi->bank[0].size = (128*1024*1024);
> + memblock_add(0xa0000000, SZ_128M);
> else
> - mi->bank[0].size = (64*1024*1024);
> + memblock_add(0xa0000000, SZ_64M);
> }
>
> struct gpio_vbus_mach_info e7xx_udc_info = {
> diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
> index aedf053..1319916 100644
> --- a/arch/arm/mach-pxa/poodle.c
> +++ b/arch/arm/mach-pxa/poodle.c
> @@ -29,6 +29,7 @@
> #include <linux/spi/ads7846.h>
> #include <linux/spi/pxa2xx_spi.h>
> #include <linux/mtd/sharpsl.h>
> +#include <linux/memblock.h>
>
> #include <mach/hardware.h>
> #include <asm/mach-types.h>
> @@ -456,13 +457,10 @@ static void __init poodle_init(void)
> poodle_init_spi();
> }
>
> -static void __init fixup_poodle(struct tag *tags, char **cmdline,
> - struct meminfo *mi)
> +static void __init fixup_poodle(struct tag *tags, char **cmdline)
> {
> sharpsl_save_param();
> - mi->nr_banks=1;
> - mi->bank[0].start = 0xa0000000;
> - mi->bank[0].size = (32*1024*1024);
> + memblock_add(0xa0000000, SZ_32M);
> }
>
> MACHINE_START(POODLE, "SHARP Poodle")
> diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
> index 0b11c1a..840c3a4 100644
> --- a/arch/arm/mach-pxa/spitz.c
> +++ b/arch/arm/mach-pxa/spitz.c
> @@ -32,6 +32,7 @@
> #include <linux/io.h>
> #include <linux/module.h>
> #include <linux/reboot.h>
> +#include <linux/memblock.h>
>
> #include <asm/setup.h>
> #include <asm/mach-types.h>
> @@ -971,13 +972,10 @@ static void __init spitz_init(void)
> spitz_i2c_init();
> }
>
> -static void __init spitz_fixup(struct tag *tags, char **cmdline,
> - struct meminfo *mi)
> +static void __init spitz_fixup(struct tag *tags, char **cmdline)
> {
> sharpsl_save_param();
> - mi->nr_banks = 1;
> - mi->bank[0].start = 0xa0000000;
> - mi->bank[0].size = (64*1024*1024);
> + memblock_add(0xa0000000, SZ_64M);
> }
>
> #ifdef CONFIG_MACH_SPITZ
> diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
> index ef5557b..c158a6e 100644
> --- a/arch/arm/mach-pxa/tosa.c
> +++ b/arch/arm/mach-pxa/tosa.c
> @@ -37,6 +37,7 @@
> #include <linux/i2c/pxa-i2c.h>
> #include <linux/usb/gpio_vbus.h>
> #include <linux/reboot.h>
> +#include <linux/memblock.h>
>
> #include <asm/setup.h>
> #include <asm/mach-types.h>
> @@ -960,13 +961,10 @@ static void __init tosa_init(void)
> platform_add_devices(devices, ARRAY_SIZE(devices));
> }
>
> -static void __init fixup_tosa(struct tag *tags, char **cmdline,
> - struct meminfo *mi)
> +static void __init fixup_tosa(struct tag *tags, char **cmdline)
> {
> sharpsl_save_param();
> - mi->nr_banks=1;
> - mi->bank[0].start = 0xa0000000;
> - mi->bank[0].size = (64*1024*1024);
> + memblock_add(0xa0000000, SZ_64M);
> }
>
> MACHINE_START(TOSA, "SHARP Tosa")
> diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
> index 1d5ee5c..c2fae3a 100644
> --- a/arch/arm/mach-realview/core.c
> +++ b/arch/arm/mach-realview/core.c
> @@ -31,6 +31,7 @@
> #include <linux/amba/mmci.h>
> #include <linux/gfp.h>
> #include <linux/mtd/physmap.h>
> +#include <linux/memblock.h>
>
> #include <mach/hardware.h>
> #include <asm/irq.h>
> @@ -370,19 +371,15 @@ void __init realview_timer_init(unsigned int timer_irq)
> /*
> * Setup the memory banks.
> */
> -void realview_fixup(struct tag *tags, char **from, struct meminfo *meminfo)
> +void realview_fixup(struct tag *tags, char **from)
> {
> /*
> * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
> * Half of this is mirrored at 0.
> */
> #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
> - meminfo->bank[0].start = 0x70000000;
> - meminfo->bank[0].size = SZ_512M;
> - meminfo->nr_banks = 1;
> + memblock_add(0x70000000, SZ_512M);
> #else
> - meminfo->bank[0].start = 0;
> - meminfo->bank[0].size = SZ_256M;
> - meminfo->nr_banks = 1;
> + memblock_add(0, SZ_256M);
> #endif
> }
> diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
> index 602ca5e..844946d 100644
> --- a/arch/arm/mach-realview/core.h
> +++ b/arch/arm/mach-realview/core.h
> @@ -51,8 +51,7 @@ extern int realview_flash_register(struct resource *res, u32 num);
> extern int realview_eth_register(const char *name, struct resource *res);
> extern int realview_usb_register(struct resource *res);
> extern void realview_init_early(void);
> -extern void realview_fixup(struct tag *tags, char **from,
> - struct meminfo *meminfo);
> +extern void realview_fixup(struct tag *tags, char **from);
>
> extern struct smp_operations realview_smp_ops;
> extern void realview_cpu_die(unsigned int cpu);
> diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
> index c5eade7..6abf6a0 100644
> --- a/arch/arm/mach-realview/realview_pb1176.c
> +++ b/arch/arm/mach-realview/realview_pb1176.c
> @@ -32,6 +32,7 @@
> #include <linux/irqchip/arm-gic.h>
> #include <linux/platform_data/clk-realview.h>
> #include <linux/reboot.h>
> +#include <linux/memblock.h>
>
> #include <mach/hardware.h>
> #include <asm/irq.h>
> @@ -339,15 +340,12 @@ static void realview_pb1176_restart(enum reboot_mode mode, const char *cmd)
> dsb();
> }
>
> -static void realview_pb1176_fixup(struct tag *tags, char **from,
> - struct meminfo *meminfo)
> +static void realview_pb1176_fixup(struct tag *tags, char **from)
> {
> /*
> * RealView PB1176 only has 128MB of RAM mapped at 0.
> */
> - meminfo->bank[0].start = 0;
> - meminfo->bank[0].size = SZ_128M;
> - meminfo->nr_banks = 1;
> + memblock_add(0, SZ_128M);
> }
>
> static void __init realview_pb1176_init(void)
> diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
> index 9d75493..60d322a 100644
> --- a/arch/arm/mach-realview/realview_pbx.c
> +++ b/arch/arm/mach-realview/realview_pbx.c
> @@ -29,6 +29,7 @@
> #include <linux/irqchip/arm-gic.h>
> #include <linux/platform_data/clk-realview.h>
> #include <linux/reboot.h>
> +#include <linux/memblock.h>
>
> #include <asm/irq.h>
> #include <asm/mach-types.h>
> @@ -325,23 +326,19 @@ static void __init realview_pbx_timer_init(void)
> realview_pbx_twd_init();
> }
>
> -static void realview_pbx_fixup(struct tag *tags, char **from,
> - struct meminfo *meminfo)
> +static void realview_pbx_fixup(struct tag *tags, char **from)
> {
> #ifdef CONFIG_SPARSEMEM
> /*
> * Memory configuration with SPARSEMEM enabled on RealView PBX (see
> * asm/mach/memory.h for more information).
> */
> - meminfo->bank[0].start = 0;
> - meminfo->bank[0].size = SZ_256M;
> - meminfo->bank[1].start = 0x20000000;
> - meminfo->bank[1].size = SZ_512M;
> - meminfo->bank[2].start = 0x80000000;
> - meminfo->bank[2].size = SZ_256M;
> - meminfo->nr_banks = 3;
> +
> + memblock_add(0, SZ_256M);
> + memblock_add(0x20000000, SZ_512M);
> + memblock_add(0x80000000, SZ_256M);
> #else
> - realview_fixup(tags, from, meminfo);
> + realview_fixup(tags, from);
> #endif
> }
>
> diff --git a/arch/arm/mach-s3c24xx/mach-smdk2413.c b/arch/arm/mach-s3c24xx/mach-smdk2413.c
> index f5bc721..0551758 100644
> --- a/arch/arm/mach-s3c24xx/mach-smdk2413.c
> +++ b/arch/arm/mach-s3c24xx/mach-smdk2413.c
> @@ -21,6 +21,7 @@
> #include <linux/serial_core.h>
> #include <linux/platform_device.h>
> #include <linux/io.h>
> +#include <linux/memblock.h>
>
> #include <asm/mach/arch.h>
> #include <asm/mach/map.h>
> @@ -93,13 +94,10 @@ static struct platform_device *smdk2413_devices[] __initdata = {
> &s3c2412_device_dma,
> };
>
> -static void __init smdk2413_fixup(struct tag *tags, char **cmdline,
> - struct meminfo *mi)
> +static void __init smdk2413_fixup(struct tag *tags, char **cmdline)
> {
> if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
> - mi->nr_banks=1;
> - mi->bank[0].start = 0x30000000;
> - mi->bank[0].size = SZ_64M;
> + memblock_add(0x30000000, SZ_64M);
> }
> }
>
> diff --git a/arch/arm/mach-s3c24xx/mach-vstms.c b/arch/arm/mach-s3c24xx/mach-vstms.c
> index f7ec9c5..aa550f5 100644
> --- a/arch/arm/mach-s3c24xx/mach-vstms.c
> +++ b/arch/arm/mach-s3c24xx/mach-vstms.c
> @@ -22,6 +22,7 @@
> #include <linux/mtd/nand.h>
> #include <linux/mtd/nand_ecc.h>
> #include <linux/mtd/partitions.h>
> +#include <linux/memblock.h>
>
> #include <asm/mach/arch.h>
> #include <asm/mach/map.h>
> @@ -129,13 +130,10 @@ static struct platform_device *vstms_devices[] __initdata = {
> &s3c2412_device_dma,
> };
>
> -static void __init vstms_fixup(struct tag *tags, char **cmdline,
> - struct meminfo *mi)
> +static void __init vstms_fixup(struct tag *tags, char **cmdline)
> {
> if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
> - mi->nr_banks=1;
> - mi->bank[0].start = 0x30000000;
> - mi->bank[0].size = SZ_64M;
> + memblock_add(0x30000000, SZ_64M);
> }
> }
>
> diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
> index 8443a27..7dd894e 100644
> --- a/arch/arm/mach-sa1100/assabet.c
> +++ b/arch/arm/mach-sa1100/assabet.c
> @@ -531,7 +531,7 @@ static void __init get_assabet_scr(void)
> }
>
> static void __init
> -fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
> +fixup_assabet(struct tag *tags, char **cmdline)
> {
> /* This must be done before any call to machine_has_neponset() */
> map_sa1100_gpio_regs();
> diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
> index 42fc139..a62dadd 100644
> --- a/arch/arm/mm/init.c
> +++ b/arch/arm/mm/init.c
> @@ -81,24 +81,21 @@ __tagtable(ATAG_INITRD2, parse_tag_initrd2);
> * initialization functions, as well as show_mem() for the skipping
> * of holes in the memory map. It is populated by arm_add_memory().
> */
> -struct meminfo meminfo;
> -
> void show_mem(unsigned int filter)
> {
> int free = 0, total = 0, reserved = 0;
> - int shared = 0, cached = 0, slab = 0, i;
> - struct meminfo * mi = &meminfo;
> + int shared = 0, cached = 0, slab = 0;
> + struct memblock_region *reg;
>
> printk("Mem-info:\n");
> show_free_areas(filter);
>
> - for_each_bank (i, mi) {
> - struct membank *bank = &mi->bank[i];
> + for_each_memblock (memory, reg) {
> unsigned int pfn1, pfn2;
> struct page *page, *end;
>
> - pfn1 = bank_pfn_start(bank);
> - pfn2 = bank_pfn_end(bank);
> + pfn1 = memblock_region_memory_base_pfn(reg);
> + pfn2 = memblock_region_memory_end_pfn(reg);
>
> page = pfn_to_page(pfn1);
> end = pfn_to_page(pfn2 - 1) + 1;
> @@ -130,16 +127,9 @@ void show_mem(unsigned int filter)
> static void __init find_limits(unsigned long *min, unsigned long *max_low,
> unsigned long *max_high)
> {
> - struct meminfo *mi = &meminfo;
> - int i;
> -
> - /* This assumes the meminfo array is properly sorted */
> - *min = bank_pfn_start(&mi->bank[0]);
> - for_each_bank (i, mi)
> - if (mi->bank[i].highmem)
> - break;
> - *max_low = bank_pfn_end(&mi->bank[i - 1]);
> - *max_high = bank_pfn_end(&mi->bank[mi->nr_banks - 1]);
> + *max_low = PFN_DOWN(memblock_get_current_limit());
> + *min = PFN_UP(memblock_start_of_DRAM());
> + *max_high = PFN_DOWN(memblock_end_of_DRAM());
> }
>
> #ifdef CONFIG_ZONE_DMA
> @@ -275,14 +265,8 @@ phys_addr_t __init arm_memblock_steal(phys_addr_t size, phys_addr_t align)
> return phys;
> }
>
> -void __init arm_memblock_init(struct meminfo *mi,
> - const struct machine_desc *mdesc)
> +void __init arm_memblock_init(const struct machine_desc *mdesc)
> {
> - int i;
> -
> - for (i = 0; i < mi->nr_banks; i++)
> - memblock_add(mi->bank[i].start, mi->bank[i].size);
> -
> /* Register the kernel text, kernel data and initrd with memblock. */
> #ifdef CONFIG_XIP_KERNEL
> memblock_reserve(__pa(_sdata), _end - _sdata);
> @@ -413,54 +397,53 @@ free_memmap(unsigned long start_pfn, unsigned long end_pfn)
> /*
> * The mem_map array can get very big. Free the unused area of the memory map.
> */
> -static void __init free_unused_memmap(struct meminfo *mi)
> +static void __init free_unused_memmap(void)
> {
> - unsigned long bank_start, prev_bank_end = 0;
> - unsigned int i;
> + unsigned long start, prev_end = 0;
> + struct memblock_region *reg;
>
> /*
> * This relies on each bank being in address order.
> * The banks are sorted previously in bootmem_init().
> */
> - for_each_bank(i, mi) {
> - struct membank *bank = &mi->bank[i];
> -
> - bank_start = bank_pfn_start(bank);
> + for_each_memblock(memory, reg) {
> + start = __phys_to_pfn(reg->base);
>
> #ifdef CONFIG_SPARSEMEM
> /*
> * Take care not to free memmap entries that don't exist
> * due to SPARSEMEM sections which aren't present.
> */
> - bank_start = min(bank_start,
> - ALIGN(prev_bank_end, PAGES_PER_SECTION));
> + start = min(start,
> + ALIGN(prev_end, PAGES_PER_SECTION));
> #else
> /*
> * Align down here since the VM subsystem insists that the
> * memmap entries are valid from the bank start aligned to
> * MAX_ORDER_NR_PAGES.
> */
> - bank_start = round_down(bank_start, MAX_ORDER_NR_PAGES);
> + start = round_down(start, MAX_ORDER_NR_PAGES);
> #endif
> /*
> * If we had a previous bank, and there is a space
> * between the current bank and the previous, free it.
> */
> - if (prev_bank_end && prev_bank_end < bank_start)
> - free_memmap(prev_bank_end, bank_start);
> + if (prev_end && prev_end < start)
> + free_memmap(prev_end, start);
>
> /*
> * Align up here since the VM subsystem insists that the
> * memmap entries are valid from the bank end aligned to
> * MAX_ORDER_NR_PAGES.
> */
> - prev_bank_end = ALIGN(bank_pfn_end(bank), MAX_ORDER_NR_PAGES);
> + prev_end = ALIGN(start + __phys_to_pfn(reg->size),
> + MAX_ORDER_NR_PAGES);
> }
>
> #ifdef CONFIG_SPARSEMEM
> - if (!IS_ALIGNED(prev_bank_end, PAGES_PER_SECTION))
> - free_memmap(prev_bank_end,
> - ALIGN(prev_bank_end, PAGES_PER_SECTION));
> + if (!IS_ALIGNED(prev_end, PAGES_PER_SECTION))
> + free_memmap(prev_end,
> + ALIGN(prev_end, PAGES_PER_SECTION));
> #endif
> }
>
> @@ -536,7 +519,7 @@ void __init mem_init(void)
> set_max_mapnr(pfn_to_page(max_pfn) - mem_map);
>
> /* this will put all unused low memory onto the freelists */
> - free_unused_memmap(&meminfo);
> + free_unused_memmap();
> free_all_bootmem();
>
> #ifdef CONFIG_SA1111
> diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
> index 4f08c13..23433ef 100644
> --- a/arch/arm/mm/mmu.c
> +++ b/arch/arm/mm/mmu.c
> @@ -1046,74 +1046,44 @@ phys_addr_t arm_lowmem_limit __initdata = 0;
> void __init sanity_check_meminfo(void)
> {
> phys_addr_t memblock_limit = 0;
> - int i, j, highmem = 0;
> + int highmem = 0;
> phys_addr_t vmalloc_limit = __pa(vmalloc_min - 1) + 1;
> + struct memblock_region *reg;
>
> - for (i = 0, j = 0; i < meminfo.nr_banks; i++) {
> - struct membank *bank = &meminfo.bank[j];
> - phys_addr_t size_limit;
> -
> - *bank = meminfo.bank[i];
> - size_limit = bank->size;
> + for_each_memblock(memory, reg) {
> + phys_addr_t block_start = reg->base;
> + phys_addr_t block_end = reg->base + reg->size;
> + phys_addr_t size_limit = reg->size;
>
> - if (bank->start >= vmalloc_limit)
> + if (reg->base >= vmalloc_limit)
> highmem = 1;
> else
> - size_limit = vmalloc_limit - bank->start;
> + size_limit = vmalloc_limit - reg->base;
>
> - bank->highmem = highmem;
>
> -#ifdef CONFIG_HIGHMEM
> - /*
> - * Split those memory banks which are partially overlapping
> - * the vmalloc area greatly simplifying things later.
> - */
> - if (!highmem && bank->size > size_limit) {
> - if (meminfo.nr_banks >= NR_BANKS) {
> - printk(KERN_CRIT "NR_BANKS too low, "
> - "ignoring high memory\n");
> - } else {
> - memmove(bank + 1, bank,
> - (meminfo.nr_banks - i) * sizeof(*bank));
> - meminfo.nr_banks++;
> - i++;
> - bank[1].size -= size_limit;
> - bank[1].start = vmalloc_limit;
> - bank[1].highmem = highmem = 1;
> - j++;
> + if (!IS_ENABLED(CONFIG_HIGHMEM) || cache_is_vipt_aliasing()) {
> +
> + if (highmem) {
> + pr_notice("Ignoring ram at %pa-%pa (!CONFIG_HIGHMEM)\n",
> + &block_start, &block_end);
> + memblock_remove(block_start, block_end);
> + continue;
> }
> - bank->size = size_limit;
> - }
> -#else
> - /*
> - * Highmem banks not allowed with !CONFIG_HIGHMEM.
> - */
> - if (highmem) {
> - printk(KERN_NOTICE "Ignoring RAM at %.8llx-%.8llx "
> - "(!CONFIG_HIGHMEM).\n",
> - (unsigned long long)bank->start,
> - (unsigned long long)bank->start + bank->size - 1);
> - continue;
> - }
>
> - /*
> - * Check whether this memory bank would partially overlap
> - * the vmalloc area.
> - */
> - if (bank->size > size_limit) {
> - printk(KERN_NOTICE "Truncating RAM at %.8llx-%.8llx "
> - "to -%.8llx (vmalloc region overlap).\n",
> - (unsigned long long)bank->start,
> - (unsigned long long)bank->start + bank->size - 1,
> - (unsigned long long)bank->start + size_limit - 1);
> - bank->size = size_limit;
> + if (reg->size > size_limit) {
> + phys_addr_t overlap_size = reg->size - size_limit;
> +
> + pr_notice("Truncating RAM at %pa-%pa to -%pa",
> + &block_start, &block_end, &overlap_size);
> + memblock_remove(vmalloc_limit, overlap_size);
> + block_end = vmalloc_limit;
> + }
> }
> -#endif
> - if (!bank->highmem) {
> - phys_addr_t bank_end = bank->start + bank->size;
>
> - if (bank_end > arm_lowmem_limit)
> - arm_lowmem_limit = bank_end;
> + if (!highmem) {
> + if (block_end > arm_lowmem_limit)
> + arm_lowmem_limit = reg->base + size_limit;
> +
>
> /*
> * Find the first non-section-aligned page, and point
> @@ -1129,35 +1099,16 @@ void __init sanity_check_meminfo(void)
> * occurs before any free memory is mapped.
> */
> if (!memblock_limit) {
> - if (!IS_ALIGNED(bank->start, SECTION_SIZE))
> - memblock_limit = bank->start;
> - else if (!IS_ALIGNED(bank_end, SECTION_SIZE))
> - memblock_limit = bank_end;
> + if (!IS_ALIGNED(block_start, SECTION_SIZE))
> + memblock_limit = block_start;
> + else if (!IS_ALIGNED(block_end, SECTION_SIZE))
> + memblock_limit = block_end;
> }
> - }
> - j++;
> - }
> -#ifdef CONFIG_HIGHMEM
> - if (highmem) {
> - const char *reason = NULL;
>
> - if (cache_is_vipt_aliasing()) {
> - /*
> - * Interactions between kmap and other mappings
> - * make highmem support with aliasing VIPT caches
> - * rather difficult.
> - */
> - reason = "with VIPT aliasing cache";
> - }
> - if (reason) {
> - printk(KERN_CRIT "HIGHMEM is not supported %s, ignoring high memory\n",
> - reason);
> - while (j > 0 && meminfo.bank[j - 1].highmem)
> - j--;
> }
> +
> }
> -#endif
> - meminfo.nr_banks = j;
> +
> high_memory = __va(arm_lowmem_limit - 1) + 1;
>
> /*
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
^ permalink raw reply
* [PATCH 07/12] mfd: syscon: Consider platform data a regmap config name
From: Lee Jones @ 2014-02-12 8:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392188982.914924525@f237.i.mail.ru>
> > Use the device platform data as a regmap config
> > name. This is particularly useful in the regmap
> > debugfs when there is more than one syscon device
> > registered, to distinguish the register blocks.
> >
> > Cc: Samuel Ortiz <sameo@linux.intel.com>
> > Cc: Lee Jones <lee.jones@linaro.org>
> > Signed-off-by: Pawel Moll <pawel.moll@arm.com>
> > ---
> ...
> > syscon_regmap_config.max_register = res->end - res->start - 3;
> > + syscon_regmap_config.name = dev_get_platdata(&pdev->dev);
>
> Is dev_name(&pdev->dev) can be used for such purpose?
Yes of course.
Either use the automatically generated name or over-ride with
dev->init_name prior to registration or call dev_set_name()
manually. Then retrieve with Alexander's suggestion.
Is there any technical reason why this is not possible with your
implementation?
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply
* [PATCH v2 07/11] watchdog: xilinx: Use of_property_read_u32
From: Michal Simek @ 2014-02-12 8:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140211202038.GC11798@roeck-us.net>
On 02/11/2014 09:20 PM, Guenter Roeck wrote:
> On Tue, Feb 11, 2014 at 07:55:50AM +0100, Michal Simek wrote:
>> Use of_property_read_u32 functions to clean probe function.
>>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>> ---
>>
> [ ... ]
>
>> +
>> + if (enable_once)
>> watchdog_set_nowayout(xilinx_wdt_wdd, true);
>> - }
>
> watchdog_set_nowayout(xilinx_wdt_wdd, enable_once);
>
> would probably do as well (the function checks the flag as well).
>
> Nitpick, so
>
> Reviewed-by: Guenter Roeck <linux@roeck-us.net>
I will change it and send v3.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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^ permalink raw reply
* [PATCH 1/4] arm64: topology: Implement basic CPU topology support
From: Vincent Guittot @ 2014-02-12 8:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140211140749.GE3748@arm.com>
On 11 February 2014 15:07, Catalin Marinas <catalin.marinas@arm.com> wrote:
> On Tue, Feb 11, 2014 at 01:18:56PM +0000, Vincent Guittot wrote:
>> On 11 February 2014 11:34, Will Deacon <will.deacon@arm.com> wrote:
>> > On Tue, Feb 11, 2014 at 08:15:19AM +0000, Vincent Guittot wrote:
>> >> On 10 February 2014 17:46, Mark Brown <broonie@kernel.org> wrote:
>> >> > On Mon, Feb 10, 2014 at 04:22:31PM +0000, Catalin Marinas wrote:
>> >> >> On Mon, Feb 10, 2014 at 01:02:01PM +0000, Mark Brown wrote:
>> >> >
>> >> >> > + if (cpu != cpuid)
>> >> >> > + cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling);
>> >> >> > + }
>> >> >> > + smp_wmb();
>> >> >
>> >> >> I now noticed there are a couple of smp_wmb() calls in this patch. What
>> >> >> are they for?
>> >> >
>> >> > To be honest I mostly cargo culted them from the ARM implementation; I
>> >> > did look a bit but didn't fully dig into it - it seemed they were
>> >> > required to ensure that the updates for the new CPU are visible over all
>> >> > CPUs. Vincent?
>> >>
>> >> Yes that's it. we must ensure that updates are made visible to other CPUs
>> >
>> > In relation to what? The smp_* barriers ensure ordering of observability
>> > between a number of independent accesses, so you must be ensuring
>> > ordering against something else. Also, you need to guarantee ordering on the
>> > read-side too -- how is this achieved? I can't see any smp_rmb calls from a
>> > quick grep, so I assume you're making use of address dependencies?
>>
>> The boot sequence ensures the rmb
>
> As Will said, smp_*mb() do not ensure absolute visibility, only relative
> to subsequent memory accesses on the same processor. So just placing a
It's my time to be a bit confused, if smp_*mb() do not ensure absolute
visibility on other CPUs, how can we ensure that ?
> barrier at the end of a function does not mean much, it only shows half
> of the problem it is trying to solve.
>
> How are the secondary CPUs using this information? AFAICT, secondaries
> call smp_store_cpu_info() which also go through each CPU in
> update_siblings_mask(). Is there any race here that smp_wmb() is trying
> to solve?
The fields will be used to construct topology so we must ensure their
visibility
Vincent
>
> I guess for secondaries you could move the barrier just before
> set_cpu_online(), this way it is clear that we want any previous writes
> to become visible when this CPU is marked online. For the primary, any
> memory writes should become visible before the CPU is started. One
> synchronisation point is the pen release, depending on the smp_ops. I
> think that's already covered by code like arch/arm/mach-*/platsmp.c.
>
> So my proposal is to remove the smp_wmb() from topology.c and add it
> where it is relevant as described above. If we have some race in
> topology.c (like for example we may later decide to start more
> secondaries at the same time), it needs to be solved using spinlocks.
>
> --
> Catalin
^ permalink raw reply
* Toggling gpio pins while powering down
From: Andrew Lunn @ 2014-02-12 7:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAFXY0108eWG_zZKb9TYGKEF6dpXhY9QuPfQpP0VnF4O4n-YFog@mail.gmail.com>
On Tue, Feb 11, 2014 at 07:33:11PM +0000, Jasbir Matharu wrote:
> I'm trying to determine the correct way of toggling gpio pins when the
> soc is powering down to enter low power mode. My current crude
> implementation is perform these within a pm_power_off function however
> this is currently done within the board file by checking for a
> compatible board type (ugly). The alternative would be create a driver
> and implement the pm_power_off function within. However given there
> could many drivers implementing a pm_power_off functions there's no
> guarantee mine will be called? Another requirement is that the gpio
> need to be set in the correct order.
Have you seen:
drivers/power/reset/gpio-poweroff.c
It currently only allows for a single gpio, but it would not be too
hard to extend it for multiple gpios.
Andrew
^ permalink raw reply
* [PATCH 2/2] ARM: imx: add speed grading check for i.mx6 soc
From: Anson Huang @ 2014-02-12 7:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1392191777-15703-1-git-send-email-b20788@freescale.com>
The fuse map of speed_grading[1:0] defines the max speed
of ARM, see below the definition:
2b'11: 1200000000Hz;
2b'10: 996000000Hz;
2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
2b'00: 792000000Hz;
Need to remove all illegal setpoints according to fuse
map.
Signed-off-by: Anson Huang <b20788@freescale.com>
---
arch/arm/mach-imx/mach-imx6q.c | 22 ++++++++++++++++++++--
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index f9cbbf9..ad9da1f 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -219,8 +219,10 @@ static void __init imx6q_init_machine(void)
#define OCOTP_CFG3 0x440
#define OCOTP_CFG3_SPEED_SHIFT 16
#define OCOTP_CFG3_SPEED_1P2GHZ 0x3
+#define OCOTP_CFG3_SPEED_996MHZ 0x2
+#define OCOTP_CFG3_SPEED_852MHZ 0x1
-static void __init imx6q_opp_check_1p2ghz(struct device *cpu_dev)
+static void __init imx6q_opp_check_speed_grading(struct device *cpu_dev)
{
struct device_node *np;
void __iomem *base;
@@ -238,11 +240,27 @@ static void __init imx6q_opp_check_1p2ghz(struct device *cpu_dev)
goto put_node;
}
+ /*
+ * SPEED_GRADING[1:0] defines the max speed of ARM:
+ * 2b'11: 1200000000Hz;
+ * 2b'10: 996000000Hz;
+ * 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
+ * 2b'00: 792000000Hz;
+ * We need to set the max speed of ARM according to fuse map.
+ */
val = readl_relaxed(base + OCOTP_CFG3);
val >>= OCOTP_CFG3_SPEED_SHIFT;
if ((val & 0x3) != OCOTP_CFG3_SPEED_1P2GHZ)
if (dev_pm_opp_disable(cpu_dev, 1200000000))
pr_warn("failed to disable 1.2 GHz OPP\n");
+ if ((val & 0x3) < OCOTP_CFG3_SPEED_996MHZ)
+ if (dev_pm_opp_disable(cpu_dev, 996000000))
+ pr_warn("failed to disable 996 MHz OPP\n");
+ if (cpu_is_imx6q()) {
+ if ((val & 0x3) != OCOTP_CFG3_SPEED_852MHZ)
+ if (dev_pm_opp_disable(cpu_dev, 852000000))
+ pr_warn("failed to disable 852 MHz OPP\n");
+ }
put_node:
of_node_put(np);
@@ -268,7 +286,7 @@ static void __init imx6q_opp_init(void)
goto put_node;
}
- imx6q_opp_check_1p2ghz(cpu_dev);
+ imx6q_opp_check_speed_grading(cpu_dev);
put_node:
of_node_put(np);
--
1.7.9.5
^ permalink raw reply related
* [PATCH 1/2] ARM: dts: imx6q: add 852MHz setpoint for CPU freq
From: Anson Huang @ 2014-02-12 7:56 UTC (permalink / raw)
To: linux-arm-kernel
According to datasheet, i.MX6Q has setpoint of 852MHz
which is exclusive with 996MHz, the fuse map of speed_grading
defines the max speed of ARM, here we add this 852MHz
setpoint opp info, kernel will check the speed_grading
fuse and remove all illegal setpoints.
Signed-off-by: Anson Huang <b20788@freescale.com>
---
arch/arm/boot/dts/imx6q.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 422d169..fadf498 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -30,6 +30,7 @@
/* kHz uV */
1200000 1275000
996000 1250000
+ 852000 1250000
792000 1150000
396000 975000
>;
@@ -37,6 +38,7 @@
/* ARM kHz SOC-PU uV */
1200000 1275000
996000 1250000
+ 852000 1250000
792000 1175000
396000 1175000
>;
--
1.7.9.5
^ permalink raw reply related
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