* [PATCH v10 0/8] ARM: berlin: add AHCI support
From: Antoine Ténart @ 2014-07-18 12:29 UTC (permalink / raw)
To: linux-arm-kernel
Tejun, Kishon, Sebastian,
I looked into the AHCI framework to see how to map PHYs and ports
information. I see two ways of doing this:
- We can attach the ahci_port_priv to the ahci_host_priv structure,
but that would require quite a lot of changes since the
ahci_port_priv is initialized at the very end (in port_start()) and
because ahci_port_priv is currently retrieved from the ata_port
structure in libahci functions. We do want to parse the dt ports
early in the AHCI initialization to be able to generate the right
port_map mask. Tests would be needed to ensure nothing is broken.
- We can move the PHY handling to where the ports are handled, moving
PHYs from ahci_host_priv to ahci_port_priv. This also would require
to perform some tests as PHY operations would be moved from
libahci_platform to libahci.
In both cases we do not have time to do this for the next release, as
the request popped up quite late.
So as of now:
- Either the series is merged as is and changes to the AHCI framework
can be made for 3.18, as it's not particularly linked to this
series.
- Or you really do not want it. Then that would be great if patches
1-2 and 7-8 could be merged so that we do not end up with this big
series going for yet another cycle... I think Kishon already took
patches 1-2.
I've done the required modifications so that port_map is not used
anymore as a mask during the initialization (patch 3).
Thanks,
Antoine
Changes since v9:
- moved port_map parameters into the AHCI structure
Changes since v8:
- stopped reset the controller from the PHY driver
- removed fixed array sizes
- got rid of the custom to_berlin_sata_phy_priv() macro
- added dependency to HAS_IOMEM
Changes since v7:
- got back to the each PHY as a sub-node representation
- renamed the power bit in the PHY driver
Changes since v6:
- added the 'clocks' property and support in the PHY driver
- updated the PHY compatible
Changes since v5:
- rebased on top of v3.16-rc1
- added the 'clocks' property in the sata node
Changes since v4:
- updated PHY driver as tristate
- handled the case were no SATA port is enabled
- updated the compatible to a generic one
- cosmetic fixups
Changes since v3:
- moved all PHY operations to the PHY driver
- removed PHY sub-nodes
- removed the custom Berlin AHCI driver and switched to
ahci_platform
- added multiple PHYs support to the libahci_platform
Changes since v2:
- modeled each PHY as a sub-node
- cosmetic fixups
Changes since v1:
- added a PHY driver, allowing to enable each port
individually and removed the 'force-port-map' property
- made the drivers a bit less magic :)
- wrote a function to select and configure registers in the
AHCI driver
- removed BG2 / BG2CD nodes
Antoine T?nart (8):
phy: add a driver for the Berlin SATA PHY
Documentation: bindings: add the Berlin SATA PHY
ata: libahci_platform: move port_map parameters into the AHCI
structure
ata: libahci: allow to use multiple PHYs
ata: ahci_platform: add a generic AHCI compatible
Documentation: bindings: document the sub-nodes AHCI bindings
ARM: berlin: add the AHCI node for the BG2Q
ARM: berlin: enable the eSATA interface on the BG2Q DMP
.../devicetree/bindings/ata/ahci-platform.txt | 37 +++
.../devicetree/bindings/phy/berlin-sata-phy.txt | 34 +++
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 8 +
arch/arm/boot/dts/berlin2q.dtsi | 39 +++
drivers/ata/ahci.h | 9 +-
drivers/ata/ahci_da850.c | 3 +-
drivers/ata/ahci_imx.c | 3 +-
drivers/ata/ahci_mvebu.c | 3 +-
drivers/ata/ahci_platform.c | 5 +-
drivers/ata/ahci_st.c | 2 +-
drivers/ata/ahci_sunxi.c | 2 +-
drivers/ata/ahci_xgene.c | 2 +-
drivers/ata/libahci.c | 17 +-
drivers/ata/libahci_platform.c | 187 ++++++++++----
drivers/phy/Kconfig | 7 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-berlin-sata.c | 284 +++++++++++++++++++++
include/linux/ahci_platform.h | 4 +-
18 files changed, 574 insertions(+), 73 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/berlin-sata-phy.txt
create mode 100644 drivers/phy/phy-berlin-sata.c
--
1.9.1
^ permalink raw reply
* [PATCH v10 01/11] irq: gic: support hip04 gic
From: Jason Cooper @ 2014-07-18 12:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1404957850-13340-2-git-send-email-haojian.zhuang@linaro.org>
Haojian,
On Thu, Jul 10, 2014 at 10:04:00AM +0800, Haojian Zhuang wrote:
> There's a little difference between ARM GIC and HiP04 GIC.
>
> * HiP04 GIC could support 16 cores at most, and ARM GIC could support
> 8 cores at most. So the difination on GIC_DIST_TARGET registers are
> different since CPU interfaces are increased from 8-bit to 16-bit.
>
> * HiP04 GIC could support 510 interrupts at most, and ARM GIC could
> support 1020 interrupts at most.
>
> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
> ---
> Documentation/devicetree/bindings/arm/gic.txt | 1 +
> drivers/irqchip/irq-gic.c | 141 +++++++++++++++++++-------
> 2 files changed, 108 insertions(+), 34 deletions(-)
I need to apologize. This is my first full cycle maintaining irqchip
and I'm still coming up to speed. The tl;dr is, I'm just not
comfortable with the approach in this patch.
If irq-gic.c was only used by one SoC, it'd be different, but in the
scenario we have, I think it would be best if this were a separate
driver, say irq-gic-hip04.c. You can link in irq-gic-common.o to get
gic_dist_config(), and you'll be able to remove a lot of the static
functions and conditionals.
I really think it's worth the extra maintenance overhead to do it this
way.
thx,
Jason.
^ permalink raw reply
* [PATCH] cpufreq: tests: Providing cpufreq regression test
From: Lukasz Majewski @ 2014-07-18 12:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2218713.u72ghDj0Dh@vostro.rjw.lan>
Hi Rafael,
> On Friday, July 18, 2014 12:23:05 PM Lukasz Majewski wrote:
> > This commit adds first regression test "cpufreq_freq_test.sh" for
> > the cpufreq subsystem.
>
> Care to add any description of how it is supposed to work and what it
> is going to test?
Ok. I will extend the description in the README file.
>
> > Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
> > ---
> > drivers/cpufreq/tests/README | 23 +++++
> > drivers/cpufreq/tests/cpufreq_freq_test.sh | 149
> > +++++++++++++++++++++++++++++ 2 files changed, 172 insertions(+)
> > create mode 100644 drivers/cpufreq/tests/README
> > create mode 100755 drivers/cpufreq/tests/cpufreq_freq_test.sh
> >
> > diff --git a/drivers/cpufreq/tests/README
> > b/drivers/cpufreq/tests/README new file mode 100644
> > index 0000000..66638d2
> > --- /dev/null
> > +++ b/drivers/cpufreq/tests/README
> > @@ -0,0 +1,23 @@
> > +This file contains list of cpufreq's available regression tests
> > with a short +usage description.
> > +
> > +1. cpufreq_freq_test.sh
> > +
> > +Description:
> > +------------
> > +This test is supposed to test if cpufreq attributes exported by
> > sysfs are +exposing a correct values.
> > +
> > +It can work with or without boost enabled and helps spotting
> > errors related to +cpufreq and common clock framework.
> > +
> > +Used attributes:
> > +----------------
> > +- "scaling_available_frequencies"
> > +- "cpuinfo_cur_freq"
> > +- "scaling_governor"
> > +
> > +Target devices:
> > +---------------
> > +
> > +All devices which exports mentioned above sysfs attributes.
> > \ No newline at end of file
> > diff --git a/drivers/cpufreq/tests/cpufreq_freq_test.sh
> > b/drivers/cpufreq/tests/cpufreq_freq_test.sh new file mode 100755
> > index 0000000..53156ca
> > --- /dev/null
> > +++ b/drivers/cpufreq/tests/cpufreq_freq_test.sh
> > @@ -0,0 +1,149 @@
> > +#!/bin/bash
> > +#
> > +# This file provides a simple mean to test if all declared freqs at
> > +# "scaling_available_frequencies" can be set and if
> > "cpuinfo_cur_freq" +# returns this value.
> > +#
> > +# Usage: ./cpufreq_freq_test.sh
> > +# Requisite: Compile in "performance" governor
> > +#
> > +# This program is free software; you can redistribute it and/or
> > modify +# it under the terms of the GNU General Public License as
> > published by +# the Free Software Foundation; either version 2 of
> > the License, or +# (at your option) any later version.
> > +#
> > +# This program is distributed in the hope that it will be useful,
> > +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > +# GNU General Public License for more details.
> > +#
> > +# You should have received a copy of the GNU General Public License
> > +# along with this program; if not, you can access it online at
> > +# http://www.gnu.org/licenses/gpl-2.0.html.
> > +#
> > +# Copyright (C) Samsung Electronics, 2014
> > +#
> > +# Author: Lukasz Majewski <l.majewski@samsung.com>
> > +
> > +set +x
> > +
> > +COLOUR_RED="\33[31m"
> > +COLOUR_BLUE="\33[34m"
> > +COLOUR_GREEN="\33[32m"
> > +COLOUR_DEFAULT="\33[0m"
> > +
> > +T_PATCH=/sys/devices/system/cpu/cpu0/cpufreq
> > +BOOST_PATCH=/sys/devices/system/cpu/cpufreq
> > +
> > +if [ ! -d "$T_PATCH" ]; then
> > + printf " $COLOUR_RED No patch to CPUFREQ $COLOUR_DEFAULT\n"
> > + exit 1
> > +fi
> > +
> > +ERRORS=0
> > +
> > +OLD_GOV=`cat $T_PATCH/scaling_governor`
> > +echo "CURRENT GOVERNOR: $OLD_GOV"
> > +echo "SET GOVERNOR: performance"
> > +echo "performance" > $T_PATCH/scaling_governor
> > +
> > +function test_freqs1 {
> > + FREQS=`cat $1`
> > + for I in $FREQS; do
> > + cpufreq_set_freq $I
> > + if [ "$2" ]; then
> > + printf "$COLOUR_BLUE BOOST $COLOUR_DEFAULT" $I
> > + fi
> > + cpufreq_test_freq $I
> > + done
> > +}
> > +
> > +function test_freqs2 {
> > + FREQ=`cat $1`
> > + FREQS_ARRAY=($FREQ)
> > +
> > + for freq in ${FREQS_ARRAY[@]}
> > + do
> > + echo "REFERENCE FREQ: $freq"
> > + for f in ${FREQS_ARRAY[@]}
> > + do
> > + cpufreq_set_freq $freq
> > + echo -n "----> "
> > + cpufreq_set_freq $f
> > + cpufreq_test_freq $f
> > + done
> > + done
> > +}
> > +
> > +function restore {
> > + if [ -f $BOOST_PATCH/boost ]; then
> > + cpufreq_boost_state $BOOST_STATE
> > + fi
> > +
> > + echo "SET GOVERNOR: $OLD_GOV"
> > + echo $OLD_GOV > $T_PATCH/scaling_governor
> > +}
> > +
> > +function die {
> > + printf " $COLOUR_RED FAILED $COLOUR_DEFAULT\n"
> > + restore_gov
> > + exit 1
> > +}
> > +
> > +function cpufreq_test_freq {
> > + gzip < /dev/urandom > /dev/null &
> > + pid=$!
> > + sleep 0.1
> > + CURR_FREQ=`cat $T_PATCH/cpuinfo_cur_freq`
> > + if [ $1 -eq $CURR_FREQ ]; then
> > + printf "\t$COLOUR_GREEN OK $COLOUR_DEFAULT\n"
> > + else
> > + printf "$COLOUR_RED CURRENT $CURR_FREQ $COLOUR_DEFAULT\n"
> > + ERRORS=`expr $ERRORS + 1`
> > + #die
> > + fi
> > + kill -9 $pid
> > + wait $! 2>/dev/null
> > +}
> > +
> > +function cpufreq_set_freq {
> > + echo $1 > $T_PATCH/scaling_max_freq || die $?
> > + printf "FREQ:$COLOUR_GREEN %s $COLOUR_DEFAULT" $1
> > +}
> > +
> > +function cpufreq_boost_state {
> > + echo $1 > $BOOST_PATCH/boost
> > +}
> > +
> > +function cpufreq_boost_status {
> > + cat $BOOST_PATCH/boost
> > +}
> > +
> > +if [ -f $BOOST_PATCH/boost ]; then
> > + echo "######################################"
> > + echo "TEST BOOST OPERATION"
> > + echo "######################################"
> > +
> > + BOOST_STATE=$(cpufreq_boost_status)
> > + if [ $BOOST_STATE -eq 0 ]; then
> > + cpufreq_boost_state 1
> > + fi
> > + test_freqs1 $T_PATCH/scaling_boost_frequencies 1
> > +fi
> > +
> > +echo "######################################"
> > +echo "TEST AVAILABLE FREQS"
> > +echo "######################################"
> > +test_freqs1 $T_PATCH/scaling_available_frequencies
> > +
> > +echo "######################################"
> > +echo "TEST FREQS SWITCHING"
> > +echo "######################################"
> > +test_freqs2 $T_PATCH/scaling_available_frequencies
> > +
> > +echo "######################################"
> > +echo "ERRORS: $ERRORS"
> > +echo "######################################"
> > +
> > +restore
> > +exit 0
> >
>
--
Best regards,
Lukasz Majewski
Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
^ permalink raw reply
* [PATCH] cpufreq: tests: Providing cpufreq regression test
From: Lukasz Majewski @ 2014-07-18 11:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAK5sBcH=L-7=BHNPQUjuoQfQx5QeFmBSdwdow+RXBExgCOP0Ww@mail.gmail.com>
Hi Sachin,
> Hi Lukasz,
>
> I tested this script on 4210 based Origen board.
> This is the output:
> ./cpufreq_freq_test.sh
> CURRENT GOVERNOR: performance
> SET GOVERNOR: performance
> ######################################
> TEST AVAILABLE FREQS
> ######################################
> FREQ: 1200000 sleep: invalid number '0.1'
> [ 5.918347] random: gzip urandom read with 61 bits of entropy
> available OK
> FREQ: 1000000 sleep: invalid number '0.1'
> OK
> FREQ: 800000 sleep: invalid number '0.1'
> OK
> FREQ: 500000 sleep: invalid number '0.1'
> OK
> FREQ: 200000 sleep: invalid number '0.1'
> OK
> ######################################
> TEST FREQS SWITCHING
> ######################################
> REFERENCE FREQ: 1200000
> FREQ: 1200000 ----> FREQ: 1200000 sleep: invalid number '0.1'
> OK
> FREQ: 1200000 ----> FREQ: 1000000 sleep: invalid number '0.1'
> OK
> FREQ: 1200000 ----> FREQ: 800000 sleep: invalid number '0.1'
> OK
> FREQ: 1200000 ----> FREQ: 500000 sleep: invalid number '0.1'
> OK
> FREQ: 1200000 ----> FREQ: 200000 sleep: invalid number '0.1'
> OK
> REFERENCE FREQ: 1000000
> FREQ: 1000000 ----> FREQ: 1200000 sleep: invalid number '0.1'
> OK
> FREQ: 1000000 ----> FREQ: 1000000 sleep: invalid number '0.1'
> OK
> FREQ: 1000000 ----> FREQ: 800000 sleep: invalid number '0.1'
> OK
> FREQ: 1000000 ----> FREQ: 500000 sleep: invalid number '0.1'
> OK
> FREQ: 1000000 ----> FREQ: 200000 sleep: invalid number '0.1'
> OK
> REFERENCE FREQ: 800000
> FREQ: 800000 ----> FREQ: 1200000 sleep: invalid number '0.1'
> OK
> FREQ: 800000 ----> FREQ: 1000000 sleep: invalid number '0.1'
> OK
> FREQ: 800000 ----> FREQ: 800000 sleep: invalid number '0.1'
> OK
> FREQ: 800000 ----> FREQ: 500000 sleep: invalid number '0.1'
> OK
> FREQ: 800000 ----> FREQ: 200000 sleep: invalid number '0.1'
> OK
> REFERENCE FREQ: 500000
> FREQ: 500000 ----> FREQ: 1200000 sleep: invalid number '0.1'
> OK
> FREQ: 500000 ----> FREQ: 1000000 sleep: invalid number '0.1'
> OK
> FREQ: 500000 ----> FREQ: 800000 sleep: invalid number '0.1'
> OK
> FREQ: 500000 ----> FREQ: 500000 sleep: invalid number '0.1'
> OK
> FREQ: 500000 ----> FREQ: 200000 sleep: invalid number '0.1'
> OK
> REFERENCE FREQ: 200000
> FREQ: 200000 ----> FREQ: 1200000 sleep: invalid number '0.1'
> OK
> FREQ: 200000 ----> FREQ: 1000000 sleep: invalid number '0.1'
> OK
> FREQ: 200000 ----> FREQ: 800000 sleep: invalid number '0.1'
> OK
> FREQ: 200000 ----> FREQ: 500000 sleep: invalid number '0.1'
> OK
> FREQ: 200000 ----> FREQ: 200000 sleep: invalid number '0.1'
> OK
> ######################################
> ERRORS: 0
> ######################################
>
> Though it says 0 errors, what does the "invalid number..." signify?
I guess that this message is caused by your default sleep
implementation.
Could you type 'sleep 0.1' and then 'sleep 1' in your console on the
target system?
Is the "invalid number" not present with the second case?
>
>
> On Fri, Jul 18, 2014 at 3:53 PM, Lukasz Majewski
> <l.majewski@samsung.com> wrote:
> > This commit adds first regression test "cpufreq_freq_test.sh" for
> > the cpufreq subsystem.
> >
> > Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
> > ---
> > drivers/cpufreq/tests/README | 23 +++++
> > drivers/cpufreq/tests/cpufreq_freq_test.sh | 149
> > +++++++++++++++++++++++++++++ 2 files changed, 172 insertions(+)
> > create mode 100644 drivers/cpufreq/tests/README
> > create mode 100755 drivers/cpufreq/tests/cpufreq_freq_test.sh
> >
> > diff --git a/drivers/cpufreq/tests/README
> > b/drivers/cpufreq/tests/README new file mode 100644
> > index 0000000..66638d2
> > --- /dev/null
> > +++ b/drivers/cpufreq/tests/README
> > @@ -0,0 +1,23 @@
> > +This file contains list of cpufreq's available regression tests
> > with a short +usage description.
> > +
> > +1. cpufreq_freq_test.sh
> > +
> > +Description:
> > +------------
> > +This test is supposed to test if cpufreq attributes exported by
> > sysfs are
>
> s/test/script would be better
Yes, you are right.
>
> > +exposing a correct values.
>
> s/ exposing a correct values / exposing correct values
>
> > +
> > +It can work with or without boost enabled and helps spotting
> > errors related to
>
> s/ helps spotting / helps in spotting
>
Thanks for feedback.
> <snip>
>
> > +
> > +set +x
> > +
> > +COLOUR_RED="\33[31m"
> > +COLOUR_BLUE="\33[34m"
> > +COLOUR_GREEN="\33[32m"
> > +COLOUR_DEFAULT="\33[0m"
> > +
> > +T_PATCH=/sys/devices/system/cpu/cpu0/cpufreq
>
> Shouldn't this be called PATH instead of PATCH?
Hmm.... It really should be PATH :-).
>
> > +BOOST_PATCH=/sys/devices/system/cpu/cpufreq
>
> ditto and rest of the places in the document.
>
Ok, I will correct that.
--
Best regards,
Lukasz Majewski
Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
^ permalink raw reply
* [PATCH] arm64: make CONFIG_ZONE_DMA user settable
From: Anup Patel @ 2014-07-18 11:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140718110718.GC19850@arm.com>
Hi Catalin,
On 18 July 2014 16:37, Catalin Marinas <catalin.marinas@arm.com> wrote:
> On Tue, Jun 24, 2014 at 03:38:34PM +0100, Mark Salter wrote:
>> On Tue, 2014-06-24 at 15:14 +0100, Catalin Marinas wrote:
>> > On Mon, Jun 23, 2014 at 02:17:03PM +0100, Mark Salter wrote:
>> > > On Mon, 2014-06-23 at 12:09 +0100, Catalin Marinas wrote:
>> > > > My proposal (in the absence of any kind of description) is to still
>> > > > create a ZONE_DMA if we have DMA memory below 32-bit, otherwise just add
>> > > > everything (>32-bit) to ZONE_DMA. Basically an extension from your CMA
>> > > > patch, make dma_phys_limit static in that file and set it to
>> > > > memblock_end_of_DRAM() if no 32-bit DMA. Re-use it in the
>> > > > zone_sizes_init() function for ZONE_DMA (maybe with a pr_info for no
>> > > > 32-bit only DMA zone).
>> > >
>> > > There's a performance issue with all memory being in ZONE_DMA. It means
>> > > all normal allocations will fail on ZONE_NORMAL and then have to fall
>> > > back to ZONE_DMA. It would be better to put some percentage of memory
>> > > in ZONE_DMA.
>> >
>> > Is the performance penalty real or just theoretical? I haven't run any
>> > benchmarks myself.
>>
>> It is real insofar as you must eat cycles eliminating ZONE_NORMAL from
>> consideration in the page allocation hot path. How much that really
>> costs, I don't know. But it seems like it could be easily avoided by
>> limiting ZONE_DMA size. Is there any reason it needs to be larger than
>> 4GiB?
>
> Basically ZONE_DMA should allow a 32-bit dma mask. When memory starts
> above 4G, in the absence of an IOMMU, it is likely that 32-bit devices
> get some offset for the top bits to be able to address the bottom of the
> memory. The problem is that dma_to_phys() that early in the kernel has
> no idea about DMA offsets until later (they can be specified in DT per
> device).
>
> The patch belows tries to guess a DMA offset and use the bottom 32-bit
> of the DRAM as ZONE_DMA.
>
> -------8<-----------------------
>
> From 133656f8378dbb838ad5f12ea29aa9303d7ca922 Mon Sep 17 00:00:00 2001
> From: Catalin Marinas <catalin.marinas@arm.com>
> Date: Fri, 18 Jul 2014 11:54:37 +0100
> Subject: [PATCH] arm64: Create non-empty ZONE_DMA when DRAM starts above 4GB
>
> ZONE_DMA is created to allow 32-bit only devices to access memory in the
> absence of an IOMMU. On systems where the memory starts above 4GB, it is
> expected that some devices have a DMA offset hardwired to be able to
> access the bottom of the memory. Linux currently supports DT bindings
> for the DMA offsets but they are not (easily) available early during
> boot.
>
> This patch tries to guess a DMA offset and assumes that ZONE_DMA
> corresponds to the 32-bit mask above the start of DRAM.
>
> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Mark Salter <msalter@redhat.com>
> ---
> arch/arm64/mm/init.c | 17 +++++++++++++----
> 1 file changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
> index 7f68804814a1..160bbaa4fc78 100644
> --- a/arch/arm64/mm/init.c
> +++ b/arch/arm64/mm/init.c
> @@ -60,6 +60,17 @@ static int __init early_initrd(char *p)
> early_param("initrd", early_initrd);
> #endif
>
> +/*
> + * Return the maximum physical address for ZONE_DMA (DMA_BIT_MASK(32)). It
> + * currently assumes that for memory starting above 4G, 32-bit devices will
> + * use a DMA offset.
> + */
> +static phys_addr_t max_zone_dma_phys(void)
> +{
> + phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, 32);
> + return min(offset + (1ULL << 32), memblock_end_of_DRAM());
> +}
> +
> static void __init zone_sizes_init(unsigned long min, unsigned long max)
> {
> struct memblock_region *reg;
> @@ -70,9 +81,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
>
> /* 4GB maximum for 32-bit only capable devices */
> if (IS_ENABLED(CONFIG_ZONE_DMA)) {
> - unsigned long max_dma_phys =
> - (unsigned long)(dma_to_phys(NULL, DMA_BIT_MASK(32)) + 1);
> - max_dma = max(min, min(max, max_dma_phys >> PAGE_SHIFT));
> + max_dma = PFN_DOWN(max_zone_dma_phys());
> zone_size[ZONE_DMA] = max_dma - min;
> }
> zone_size[ZONE_NORMAL] = max - max_dma;
> @@ -142,7 +151,7 @@ void __init arm64_memblock_init(void)
>
> /* 4GB maximum for 32-bit only capable devices */
> if (IS_ENABLED(CONFIG_ZONE_DMA))
> - dma_phys_limit = dma_to_phys(NULL, DMA_BIT_MASK(32)) + 1;
> + dma_phys_limit = max_zone_dma_phys();
> dma_contiguous_reserve(dma_phys_limit);
>
> memblock_allow_resize();
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Linux-3.16-rcX is broken on X-Gene Mustang because
on X-Gene Mustang the DRAM starts at 0x4000000000.
I have tested your patch and the original patch from
this thread. Both patches fixes the issue for X-Gene
Mustang and Linux-3.16-rc5 happily boots on X-Gene.
Can you to send your patch as Linux-3.16-rcX fix?
For your patch, you can have:
Tested-by: Anup Patel <anup.patel@linaro.org>
Thanks,
Anup
^ permalink raw reply
* [RFC] PCI: pci-imx6: Add delay to workaround kernel hang
From: "David Müller (ELSOFT AG)" @ 2014-07-18 11:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1405675599.6072.8.camel@weser.hi.pengutronix.de>
Hello
Lucas Stach wrote:
> @@ -215,6 +215,8 @@ static int imx6_pcie_assert_core_reset(struct pcie_port *pp)
> {
> struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
>
> + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
> + IMX6Q_GPR12_PCIE_CTL_2, 0 << 10);
> regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> IMX6Q_GPR1_PCIE_TEST_PD, 1 << 18);
> regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
>
Sorry, this doesn't seem to fix the problem (at least not with my
hardware).
Dave
^ permalink raw reply
* [PATCH] cpufreq: tests: Providing cpufreq regression test
From: Rafael J. Wysocki @ 2014-07-18 11:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1405678985-21677-1-git-send-email-l.majewski@samsung.com>
On Friday, July 18, 2014 12:23:05 PM Lukasz Majewski wrote:
> This commit adds first regression test "cpufreq_freq_test.sh" for the
> cpufreq subsystem.
Care to add any description of how it is supposed to work and what it is
going to test?
> Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
> ---
> drivers/cpufreq/tests/README | 23 +++++
> drivers/cpufreq/tests/cpufreq_freq_test.sh | 149 +++++++++++++++++++++++++++++
> 2 files changed, 172 insertions(+)
> create mode 100644 drivers/cpufreq/tests/README
> create mode 100755 drivers/cpufreq/tests/cpufreq_freq_test.sh
>
> diff --git a/drivers/cpufreq/tests/README b/drivers/cpufreq/tests/README
> new file mode 100644
> index 0000000..66638d2
> --- /dev/null
> +++ b/drivers/cpufreq/tests/README
> @@ -0,0 +1,23 @@
> +This file contains list of cpufreq's available regression tests with a short
> +usage description.
> +
> +1. cpufreq_freq_test.sh
> +
> +Description:
> +------------
> +This test is supposed to test if cpufreq attributes exported by sysfs are
> +exposing a correct values.
> +
> +It can work with or without boost enabled and helps spotting errors related to
> +cpufreq and common clock framework.
> +
> +Used attributes:
> +----------------
> +- "scaling_available_frequencies"
> +- "cpuinfo_cur_freq"
> +- "scaling_governor"
> +
> +Target devices:
> +---------------
> +
> +All devices which exports mentioned above sysfs attributes.
> \ No newline at end of file
> diff --git a/drivers/cpufreq/tests/cpufreq_freq_test.sh b/drivers/cpufreq/tests/cpufreq_freq_test.sh
> new file mode 100755
> index 0000000..53156ca
> --- /dev/null
> +++ b/drivers/cpufreq/tests/cpufreq_freq_test.sh
> @@ -0,0 +1,149 @@
> +#!/bin/bash
> +#
> +# This file provides a simple mean to test if all declared freqs at
> +# "scaling_available_frequencies" can be set and if "cpuinfo_cur_freq"
> +# returns this value.
> +#
> +# Usage: ./cpufreq_freq_test.sh
> +# Requisite: Compile in "performance" governor
> +#
> +# This program is free software; you can redistribute it and/or modify
> +# it under the terms of the GNU General Public License as published by
> +# the Free Software Foundation; either version 2 of the License, or
> +# (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, you can access it online at
> +# http://www.gnu.org/licenses/gpl-2.0.html.
> +#
> +# Copyright (C) Samsung Electronics, 2014
> +#
> +# Author: Lukasz Majewski <l.majewski@samsung.com>
> +
> +set +x
> +
> +COLOUR_RED="\33[31m"
> +COLOUR_BLUE="\33[34m"
> +COLOUR_GREEN="\33[32m"
> +COLOUR_DEFAULT="\33[0m"
> +
> +T_PATCH=/sys/devices/system/cpu/cpu0/cpufreq
> +BOOST_PATCH=/sys/devices/system/cpu/cpufreq
> +
> +if [ ! -d "$T_PATCH" ]; then
> + printf " $COLOUR_RED No patch to CPUFREQ $COLOUR_DEFAULT\n"
> + exit 1
> +fi
> +
> +ERRORS=0
> +
> +OLD_GOV=`cat $T_PATCH/scaling_governor`
> +echo "CURRENT GOVERNOR: $OLD_GOV"
> +echo "SET GOVERNOR: performance"
> +echo "performance" > $T_PATCH/scaling_governor
> +
> +function test_freqs1 {
> + FREQS=`cat $1`
> + for I in $FREQS; do
> + cpufreq_set_freq $I
> + if [ "$2" ]; then
> + printf "$COLOUR_BLUE BOOST $COLOUR_DEFAULT" $I
> + fi
> + cpufreq_test_freq $I
> + done
> +}
> +
> +function test_freqs2 {
> + FREQ=`cat $1`
> + FREQS_ARRAY=($FREQ)
> +
> + for freq in ${FREQS_ARRAY[@]}
> + do
> + echo "REFERENCE FREQ: $freq"
> + for f in ${FREQS_ARRAY[@]}
> + do
> + cpufreq_set_freq $freq
> + echo -n "----> "
> + cpufreq_set_freq $f
> + cpufreq_test_freq $f
> + done
> + done
> +}
> +
> +function restore {
> + if [ -f $BOOST_PATCH/boost ]; then
> + cpufreq_boost_state $BOOST_STATE
> + fi
> +
> + echo "SET GOVERNOR: $OLD_GOV"
> + echo $OLD_GOV > $T_PATCH/scaling_governor
> +}
> +
> +function die {
> + printf " $COLOUR_RED FAILED $COLOUR_DEFAULT\n"
> + restore_gov
> + exit 1
> +}
> +
> +function cpufreq_test_freq {
> + gzip < /dev/urandom > /dev/null &
> + pid=$!
> + sleep 0.1
> + CURR_FREQ=`cat $T_PATCH/cpuinfo_cur_freq`
> + if [ $1 -eq $CURR_FREQ ]; then
> + printf "\t$COLOUR_GREEN OK $COLOUR_DEFAULT\n"
> + else
> + printf "$COLOUR_RED CURRENT $CURR_FREQ $COLOUR_DEFAULT\n"
> + ERRORS=`expr $ERRORS + 1`
> + #die
> + fi
> + kill -9 $pid
> + wait $! 2>/dev/null
> +}
> +
> +function cpufreq_set_freq {
> + echo $1 > $T_PATCH/scaling_max_freq || die $?
> + printf "FREQ:$COLOUR_GREEN %s $COLOUR_DEFAULT" $1
> +}
> +
> +function cpufreq_boost_state {
> + echo $1 > $BOOST_PATCH/boost
> +}
> +
> +function cpufreq_boost_status {
> + cat $BOOST_PATCH/boost
> +}
> +
> +if [ -f $BOOST_PATCH/boost ]; then
> + echo "######################################"
> + echo "TEST BOOST OPERATION"
> + echo "######################################"
> +
> + BOOST_STATE=$(cpufreq_boost_status)
> + if [ $BOOST_STATE -eq 0 ]; then
> + cpufreq_boost_state 1
> + fi
> + test_freqs1 $T_PATCH/scaling_boost_frequencies 1
> +fi
> +
> +echo "######################################"
> +echo "TEST AVAILABLE FREQS"
> +echo "######################################"
> +test_freqs1 $T_PATCH/scaling_available_frequencies
> +
> +echo "######################################"
> +echo "TEST FREQS SWITCHING"
> +echo "######################################"
> +test_freqs2 $T_PATCH/scaling_available_frequencies
> +
> +echo "######################################"
> +echo "ERRORS: $ERRORS"
> +echo "######################################"
> +
> +restore
> +exit 0
>
--
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.
^ permalink raw reply
* [PATCH v2] watchdog: imx2_wdt: add support for WDOG_B signal generation
From: Markus Niebel @ 2014-07-18 11:38 UTC (permalink / raw)
To: linux-arm-kernel
From: Markus Niebel <Markus.Niebel@tq-group.com>
Watchdog unit of i.MX supports output of a signal at
watchdog shutdown. This feature can be useful to signal an
external supevisor that a watchdog reset occured.
Support this feature as an option via devicetree.
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
---
History
v2:
Fix incorrect sent patch
- add include of.h
- fix missing if in probe
.../devicetree/bindings/watchdog/fsl-imx-wdt.txt | 3 +++
drivers/watchdog/imx2_wdt.c | 11 +++++++++--
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.txt b/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.txt
index 2144af1..cb759cd 100644
--- a/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.txt
@@ -5,6 +5,9 @@ Required properties:
- reg : Should contain WDT registers location and length
- interrupts : Should contain WDT interrupt
+Optional properties:
+- fsl,use-wre: set if watchdog reset out (WDOG_B) signal shall be asserted
+
Examples:
wdt at 73f98000 {
diff --git a/drivers/watchdog/imx2_wdt.c b/drivers/watchdog/imx2_wdt.c
index 9d4874f..bde96db 100644
--- a/drivers/watchdog/imx2_wdt.c
+++ b/drivers/watchdog/imx2_wdt.c
@@ -58,6 +58,7 @@ struct imx2_wdt_device {
struct regmap *regmap;
struct timer_list timer; /* Pings the watchdog when closed */
struct watchdog_device wdog;
+ unsigned int use_wre:1; /* enable WRE feature */
};
static bool nowayout = WATCHDOG_NOWAYOUT;
@@ -88,7 +89,10 @@ static inline void imx2_wdt_setup(struct watchdog_device *wdog)
/* Strip the old watchdog Time-Out value */
val &= ~IMX2_WDT_WCR_WT;
/* Generate reset if WDOG times out */
- val &= ~IMX2_WDT_WCR_WRE;
+ if (wdev->use_wre)
+ val |= IMX2_WDT_WCR_WRE;
+ else
+ val &= ~IMX2_WDT_WCR_WRE;
/* Keep Watchdog Disabled */
val &= ~IMX2_WDT_WCR_WDE;
/* Set the watchdog's Time-Out value */
@@ -219,6 +223,9 @@ static int __init imx2_wdt_probe(struct platform_device *pdev)
return PTR_ERR(wdev->clk);
}
+ if (of_property_read_bool(pdev->dev.of_node, "fsl,use-wre"))
+ wdev->use_wre = 1;
+
wdog = &wdev->wdog;
wdog->info = &imx2_wdt_info;
wdog->ops = &imx2_wdt_ops;
@@ -226,7 +233,7 @@ static int __init imx2_wdt_probe(struct platform_device *pdev)
wdog->max_timeout = IMX2_WDT_MAX_TIME;
clk_prepare_enable(wdev->clk);
-
+
regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
--
1.7.9.5
^ permalink raw reply related
* [PATCH v5 1/8] of: Add NVIDIA Tegra SATA controller binding
From: Mikko Perttunen @ 2014-07-18 11:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <53C8F6E6.6020901@redhat.com>
On 18/07/14 13:28, Hans de Goede wrote:
> Hi,
>
> On 07/18/2014 09:16 AM, Mikko Perttunen wrote:
>> So here's v5: this time, as suggested, I handle the sata clock myself and let ahci_platform handle it too, leading it to be prepared+enabled twice. This works fine, and allows us to remove the DT ordering requirement.
>>
>> I also have in the works a patchset that adds the name-based ahci_platform_get_resources function, but that is not quite ready yet, even if it is quite far along. Also, I am going on vacation and returning on 28.7., so if this v5 is acceptable maybe it could be merged for 3.17 and I could work on the new get_resources scheme after I get back from vacation?
>
> Yes that works for me v3 of all the patches with no newer version +
> v5 of patch 1 and 7 are pretty clean and can go into 3.17 from my pov,
> Tejun can you pick these up for 3.17 please?
Note that the DTC step will fail if Thierry's xusb pinctrl series is not
applied before this one. (The DTS changes depend on a node called
'padctl' and the pinctrl-tegra-xusb header)
>
> And thanks for working on a name-based ahci_platform_get_resources function
> since what we've now in v5 is quite clean already I think it will be good
> to take our time to get this right, so postponing this to 3.18 is fine
> with me.
Yes.
>
> Regards,
>
> Hans
>
Thanks, Mikko
^ permalink raw reply
* [PATCH] SPI: spi-imx: enable realtime master workqueue
From: Markus Niebel @ 2014-07-18 11:30 UTC (permalink / raw)
To: linux-arm-kernel
From: Markus Niebel <Markus.Niebel@tq-group.de>
SPI master provides an option to run the SPI workqueue
with realtime prio. This feature is currently used only
by spi-pl022.
Support this feature for spi-imx by parsing an optional
bool value from device tree.
Note: maybe useful for all SPI controllers.
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.de>
---
.../devicetree/bindings/spi/fsl-imx-cspi.txt | 4 ++++
drivers/spi/spi-imx.c | 1 +
2 files changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt b/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt
index 4256a6d..6b908c7 100644
--- a/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt
+++ b/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt
@@ -8,6 +8,10 @@ Required properties:
- fsl,spi-num-chipselects : Contains the number of the chipselect
- cs-gpios : Specifies the gpio pins to be used for chipselects.
+Optional properties:
+- fsl,rt : indicates the controller should run the message pump with realtime
+ priority to minimise the transfer latency on the bus (boolean)
+
Example:
ecspi at 70010000 {
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index 5daff20..3a9c373 100644
--- a/drivers/spi/spi-imx.c
+++ b/drivers/spi/spi-imx.c
@@ -835,6 +835,7 @@ static int spi_imx_probe(struct platform_device *pdev)
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
master->bus_num = pdev->id;
master->num_chipselect = num_cs;
+ master->rt = of_property_read_bool(np, "fsl,rt");
spi_imx = spi_master_get_devdata(master);
spi_imx->bitbang.master = master;
--
1.7.9.5
^ permalink raw reply related
* [PATCH] spi: omap2-mcspi: fix blatant abuse of the resource subsystem
From: Lothar Waßmann @ 2014-07-18 11:30 UTC (permalink / raw)
To: linux-arm-kernel
Aua. This really hurts. I wonder how this could ever be admitted to
the Linux kernel...
Further comments suppressed because the would most likely violate the
CDA.
If someone should not grasp what this patch does, they should consider
what happens upon unloading/reloading the kernel module.
Signed-off-by: Lothar Wa?mann <LW@KARO-electronics.de>
---
drivers/spi/spi-omap2-mcspi.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index 68441fa..cb23f5d 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -1379,15 +1379,13 @@ static int omap2_mcspi_probe(struct platform_device *pdev)
goto free_master;
}
- r->start += regs_offset;
- r->end += regs_offset;
- mcspi->phys = r->start;
-
mcspi->base = devm_ioremap_resource(&pdev->dev, r);
if (IS_ERR(mcspi->base)) {
status = PTR_ERR(mcspi->base);
goto free_master;
}
+ mcspi->phys = r->start + regs_offset;
+ mcspi->base += regs_offset;
mcspi->dev = &pdev->dev;
--
1.7.10.4
^ permalink raw reply related
* [PATCH] cpufreq: tests: Providing cpufreq regression test
From: Sachin Kamat @ 2014-07-18 11:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1405678985-21677-1-git-send-email-l.majewski@samsung.com>
Hi Lukasz,
I tested this script on 4210 based Origen board.
This is the output:
./cpufreq_freq_test.sh
CURRENT GOVERNOR: performance
SET GOVERNOR: performance
######################################
TEST AVAILABLE FREQS
######################################
FREQ: 1200000 sleep: invalid number '0.1'
[ 5.918347] random: gzip urandom read with 61 bits of entropy available
OK
FREQ: 1000000 sleep: invalid number '0.1'
OK
FREQ: 800000 sleep: invalid number '0.1'
OK
FREQ: 500000 sleep: invalid number '0.1'
OK
FREQ: 200000 sleep: invalid number '0.1'
OK
######################################
TEST FREQS SWITCHING
######################################
REFERENCE FREQ: 1200000
FREQ: 1200000 ----> FREQ: 1200000 sleep: invalid number '0.1'
OK
FREQ: 1200000 ----> FREQ: 1000000 sleep: invalid number '0.1'
OK
FREQ: 1200000 ----> FREQ: 800000 sleep: invalid number '0.1'
OK
FREQ: 1200000 ----> FREQ: 500000 sleep: invalid number '0.1'
OK
FREQ: 1200000 ----> FREQ: 200000 sleep: invalid number '0.1'
OK
REFERENCE FREQ: 1000000
FREQ: 1000000 ----> FREQ: 1200000 sleep: invalid number '0.1'
OK
FREQ: 1000000 ----> FREQ: 1000000 sleep: invalid number '0.1'
OK
FREQ: 1000000 ----> FREQ: 800000 sleep: invalid number '0.1'
OK
FREQ: 1000000 ----> FREQ: 500000 sleep: invalid number '0.1'
OK
FREQ: 1000000 ----> FREQ: 200000 sleep: invalid number '0.1'
OK
REFERENCE FREQ: 800000
FREQ: 800000 ----> FREQ: 1200000 sleep: invalid number '0.1'
OK
FREQ: 800000 ----> FREQ: 1000000 sleep: invalid number '0.1'
OK
FREQ: 800000 ----> FREQ: 800000 sleep: invalid number '0.1'
OK
FREQ: 800000 ----> FREQ: 500000 sleep: invalid number '0.1'
OK
FREQ: 800000 ----> FREQ: 200000 sleep: invalid number '0.1'
OK
REFERENCE FREQ: 500000
FREQ: 500000 ----> FREQ: 1200000 sleep: invalid number '0.1'
OK
FREQ: 500000 ----> FREQ: 1000000 sleep: invalid number '0.1'
OK
FREQ: 500000 ----> FREQ: 800000 sleep: invalid number '0.1'
OK
FREQ: 500000 ----> FREQ: 500000 sleep: invalid number '0.1'
OK
FREQ: 500000 ----> FREQ: 200000 sleep: invalid number '0.1'
OK
REFERENCE FREQ: 200000
FREQ: 200000 ----> FREQ: 1200000 sleep: invalid number '0.1'
OK
FREQ: 200000 ----> FREQ: 1000000 sleep: invalid number '0.1'
OK
FREQ: 200000 ----> FREQ: 800000 sleep: invalid number '0.1'
OK
FREQ: 200000 ----> FREQ: 500000 sleep: invalid number '0.1'
OK
FREQ: 200000 ----> FREQ: 200000 sleep: invalid number '0.1'
OK
######################################
ERRORS: 0
######################################
Though it says 0 errors, what does the "invalid number..." signify?
On Fri, Jul 18, 2014 at 3:53 PM, Lukasz Majewski <l.majewski@samsung.com> wrote:
> This commit adds first regression test "cpufreq_freq_test.sh" for the
> cpufreq subsystem.
>
> Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
> ---
> drivers/cpufreq/tests/README | 23 +++++
> drivers/cpufreq/tests/cpufreq_freq_test.sh | 149 +++++++++++++++++++++++++++++
> 2 files changed, 172 insertions(+)
> create mode 100644 drivers/cpufreq/tests/README
> create mode 100755 drivers/cpufreq/tests/cpufreq_freq_test.sh
>
> diff --git a/drivers/cpufreq/tests/README b/drivers/cpufreq/tests/README
> new file mode 100644
> index 0000000..66638d2
> --- /dev/null
> +++ b/drivers/cpufreq/tests/README
> @@ -0,0 +1,23 @@
> +This file contains list of cpufreq's available regression tests with a short
> +usage description.
> +
> +1. cpufreq_freq_test.sh
> +
> +Description:
> +------------
> +This test is supposed to test if cpufreq attributes exported by sysfs are
s/test/script would be better
> +exposing a correct values.
s/ exposing a correct values / exposing correct values
> +
> +It can work with or without boost enabled and helps spotting errors related to
s/ helps spotting / helps in spotting
<snip>
> +
> +set +x
> +
> +COLOUR_RED="\33[31m"
> +COLOUR_BLUE="\33[34m"
> +COLOUR_GREEN="\33[32m"
> +COLOUR_DEFAULT="\33[0m"
> +
> +T_PATCH=/sys/devices/system/cpu/cpu0/cpufreq
Shouldn't this be called PATH instead of PATCH?
> +BOOST_PATCH=/sys/devices/system/cpu/cpufreq
ditto and rest of the places in the document.
--
Regards,
Sachin.
^ permalink raw reply
* [PATCH] watchdog: imx2_wdt: add support for WDOG_B signal generation
From: Markus Niebel @ 2014-07-18 11:23 UTC (permalink / raw)
To: linux-arm-kernel
From: Markus Niebel <Markus.Niebel@tq-group.com>
Watchdog unit of i.MX supports output of a signal at
watchdog shutdown. This feature can be useful to signal an
external supevisor that a watchdog reset occured.
Support this feature as an option via devicetree.
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
---
.../devicetree/bindings/watchdog/fsl-imx-wdt.txt | 3 +++
drivers/watchdog/imx2_wdt.c | 9 ++++++++-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.txt b/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.txt
index 2144af1..cb759cd 100644
--- a/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.txt
@@ -5,6 +5,9 @@ Required properties:
- reg : Should contain WDT registers location and length
- interrupts : Should contain WDT interrupt
+Optional properties:
+- fsl,use-wre: set if watchdog reset out (WDOG_B) signal shall be asserted
+
Examples:
wdt at 73f98000 {
diff --git a/drivers/watchdog/imx2_wdt.c b/drivers/watchdog/imx2_wdt.c
index 9d4874f..6497711 100644
--- a/drivers/watchdog/imx2_wdt.c
+++ b/drivers/watchdog/imx2_wdt.c
@@ -58,6 +58,7 @@ struct imx2_wdt_device {
struct regmap *regmap;
struct timer_list timer; /* Pings the watchdog when closed */
struct watchdog_device wdog;
+ unsigned int use_wre:1; /* enable WRE feature */
};
static bool nowayout = WATCHDOG_NOWAYOUT;
@@ -88,7 +89,10 @@ static inline void imx2_wdt_setup(struct watchdog_device *wdog)
/* Strip the old watchdog Time-Out value */
val &= ~IMX2_WDT_WCR_WT;
/* Generate reset if WDOG times out */
- val &= ~IMX2_WDT_WCR_WRE;
+ if (wdev->use_wre)
+ val |= IMX2_WDT_WCR_WRE;
+ else
+ val &= ~IMX2_WDT_WCR_WRE;
/* Keep Watchdog Disabled */
val &= ~IMX2_WDT_WCR_WDE;
/* Set the watchdog's Time-Out value */
@@ -219,6 +223,9 @@ static int __init imx2_wdt_probe(struct platform_device *pdev)
return PTR_ERR(wdev->clk);
}
+ (of_property_read_bool(pdev->dev.of_node, "fsl,use-wre"))
+ wdev->use_wre = 1;
+
wdog = &wdev->wdog;
wdog->info = &imx2_wdt_info;
wdog->ops = &imx2_wdt_ops;
--
1.7.9.5
^ permalink raw reply related
* [PATCHv6 1/4] iio: adc: exynos_adc: Add exynos_adc_data structure to improve readability
From: Arnd Bergmann @ 2014-07-18 11:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAHfPSqBDOEH5HurG=rECV=d+MM_YjTEpsiwuTgtNgFgCQ0P2bw@mail.gmail.com>
On Friday 18 July 2014 15:41:27 Naveen Krishna Ch wrote:
> >
> > {
> > .name = "s3c24xx-adc",
> > .driver_data = TYPE_ADCV1,
> > }, {
> > .name = "s3c2443-adc",
> > .driver_data = TYPE_ADCV11,
> > }, {
> > .name = "s3c2416-adc",
> > .driver_data = TYPE_ADCV12,
> > }, {
> > .name = "s3c64xx-adc",
> > .driver_data = TYPE_ADCV2,
> > }, {
> > .name = "samsung-adc-v3",
> > .driver_data = TYPE_ADCV3,
> > }
> >
> > Where TYPE_ADCV3 seems to be the same as the new ADC_V1 used in this
> > driver. Do you have an explanation for that?
>
> As per suggestion from Doug Anderson,
> I've implemented IIO based ADC driver to work with Exynos5250.
> keeping the plat-samsung/adc.c unchanged.
>
> Assuming Exynos5250 is the one using the driver for the first time.
> i've named it v1 and so on.
>
> Now, This seems to cause a lot of confusion.
Ah, so the version numbers don't come from Samsung hardware
documents but are just counting the versions we have drivers
for?
In this case, I guess using the first SoC that had a particular
version would have been better, and we should probably do that
when we add support for the older hardware in this driver.
Arnd
^ permalink raw reply
* [PATCHv6 2/4] iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC
From: Arnd Bergmann @ 2014-07-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <53C8F050.6060104@samsung.com>
On Friday 18 July 2014 19:00:48 Chanwoo Choi wrote:
> On 07/18/2014 06:47 PM, Arnd Bergmann wrote:
> >
> > Further, why is it called "sclk_adc" rather than just "sclk"?
>
> The sclk means 'special clock' in Exynos TRM. Exynos SoC has varisou sclk clocks.
> 'sclk_adc' is only used for ADC IP.
But that sounds like sclk_adc is the name of the global name
of the clock signal coming out of the clock controller.
I still think it would be best to name it 'sclk' as the input
for the adc. It shouldn't rely on a particular name of the
clock controller.
Arnd
^ permalink raw reply
* HYP panic with 3.16-rc5, arm64 + 64k pages
From: Will Deacon @ 2014-07-18 11:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140718084030.GA9548@arm.com>
On Fri, Jul 18, 2014 at 09:40:30AM +0100, Will Deacon wrote:
> On Thu, Jul 17, 2014 at 06:31:26PM +0100, Joel Schopp wrote:
> > Not a lot to go on there. If you get desperate you can configure FTRACE
> > and pass "ftrace=function ftrace_dump_on_oops" as additional additional
> > kernel command line arguments. If you get really desperate you can do
> > the same on the host. Just beware the output is really long.
>
> Cheers for the replies. It could be that I'm tickling something with kvmtool
> that qemu doesn't do, so I'll add some traces and try to figure out some more
> information later on today.
FWIW I just reproduced this issue but, this time, I didn't see a HYP panic.
The guest stopped at exactly the same point, but I then see a screaming
timer interrupt on the host. The weird part is that the screaming interrupt
is a PPI on physical CPU0, whilst the vcpus are affined to cores 4 and 5
(it's a Juno, so I've pinned the guest to the big cores).
I'll keep digging...
Will
^ permalink raw reply
* [PATCH] arm64: make CONFIG_ZONE_DMA user settable
From: Catalin Marinas @ 2014-07-18 11:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1403620714.755.69.camel@deneb.redhat.com>
On Tue, Jun 24, 2014 at 03:38:34PM +0100, Mark Salter wrote:
> On Tue, 2014-06-24 at 15:14 +0100, Catalin Marinas wrote:
> > On Mon, Jun 23, 2014 at 02:17:03PM +0100, Mark Salter wrote:
> > > On Mon, 2014-06-23 at 12:09 +0100, Catalin Marinas wrote:
> > > > My proposal (in the absence of any kind of description) is to still
> > > > create a ZONE_DMA if we have DMA memory below 32-bit, otherwise just add
> > > > everything (>32-bit) to ZONE_DMA. Basically an extension from your CMA
> > > > patch, make dma_phys_limit static in that file and set it to
> > > > memblock_end_of_DRAM() if no 32-bit DMA. Re-use it in the
> > > > zone_sizes_init() function for ZONE_DMA (maybe with a pr_info for no
> > > > 32-bit only DMA zone).
> > >
> > > There's a performance issue with all memory being in ZONE_DMA. It means
> > > all normal allocations will fail on ZONE_NORMAL and then have to fall
> > > back to ZONE_DMA. It would be better to put some percentage of memory
> > > in ZONE_DMA.
> >
> > Is the performance penalty real or just theoretical? I haven't run any
> > benchmarks myself.
>
> It is real insofar as you must eat cycles eliminating ZONE_NORMAL from
> consideration in the page allocation hot path. How much that really
> costs, I don't know. But it seems like it could be easily avoided by
> limiting ZONE_DMA size. Is there any reason it needs to be larger than
> 4GiB?
Basically ZONE_DMA should allow a 32-bit dma mask. When memory starts
above 4G, in the absence of an IOMMU, it is likely that 32-bit devices
get some offset for the top bits to be able to address the bottom of the
memory. The problem is that dma_to_phys() that early in the kernel has
no idea about DMA offsets until later (they can be specified in DT per
device).
The patch belows tries to guess a DMA offset and use the bottom 32-bit
of the DRAM as ZONE_DMA.
-------8<-----------------------
>From 133656f8378dbb838ad5f12ea29aa9303d7ca922 Mon Sep 17 00:00:00 2001
From: Catalin Marinas <catalin.marinas@arm.com>
Date: Fri, 18 Jul 2014 11:54:37 +0100
Subject: [PATCH] arm64: Create non-empty ZONE_DMA when DRAM starts above 4GB
ZONE_DMA is created to allow 32-bit only devices to access memory in the
absence of an IOMMU. On systems where the memory starts above 4GB, it is
expected that some devices have a DMA offset hardwired to be able to
access the bottom of the memory. Linux currently supports DT bindings
for the DMA offsets but they are not (easily) available early during
boot.
This patch tries to guess a DMA offset and assumes that ZONE_DMA
corresponds to the 32-bit mask above the start of DRAM.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Salter <msalter@redhat.com>
---
arch/arm64/mm/init.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index 7f68804814a1..160bbaa4fc78 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -60,6 +60,17 @@ static int __init early_initrd(char *p)
early_param("initrd", early_initrd);
#endif
+/*
+ * Return the maximum physical address for ZONE_DMA (DMA_BIT_MASK(32)). It
+ * currently assumes that for memory starting above 4G, 32-bit devices will
+ * use a DMA offset.
+ */
+static phys_addr_t max_zone_dma_phys(void)
+{
+ phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, 32);
+ return min(offset + (1ULL << 32), memblock_end_of_DRAM());
+}
+
static void __init zone_sizes_init(unsigned long min, unsigned long max)
{
struct memblock_region *reg;
@@ -70,9 +81,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
/* 4GB maximum for 32-bit only capable devices */
if (IS_ENABLED(CONFIG_ZONE_DMA)) {
- unsigned long max_dma_phys =
- (unsigned long)(dma_to_phys(NULL, DMA_BIT_MASK(32)) + 1);
- max_dma = max(min, min(max, max_dma_phys >> PAGE_SHIFT));
+ max_dma = PFN_DOWN(max_zone_dma_phys());
zone_size[ZONE_DMA] = max_dma - min;
}
zone_size[ZONE_NORMAL] = max - max_dma;
@@ -142,7 +151,7 @@ void __init arm64_memblock_init(void)
/* 4GB maximum for 32-bit only capable devices */
if (IS_ENABLED(CONFIG_ZONE_DMA))
- dma_phys_limit = dma_to_phys(NULL, DMA_BIT_MASK(32)) + 1;
+ dma_phys_limit = max_zone_dma_phys();
dma_contiguous_reserve(dma_phys_limit);
memblock_allow_resize();
^ permalink raw reply related
* [PATCH v2 3/3] iommu/omap: Remove platform data da_start and da_end fields
From: Laurent Pinchart @ 2014-07-18 10:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1405680597-10012-1-git-send-email-laurent.pinchart@ideasonboard.com>
The fields were used by the now gone omap-iovmm driver. They're not used
anymore, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
include/linux/platform_data/iommu-omap.h | 6 ------
1 file changed, 6 deletions(-)
diff --git a/include/linux/platform_data/iommu-omap.h b/include/linux/platform_data/iommu-omap.h
index 5b429c4..54a0a95 100644
--- a/include/linux/platform_data/iommu-omap.h
+++ b/include/linux/platform_data/iommu-omap.h
@@ -31,14 +31,10 @@ struct omap_iommu_arch_data {
/**
* struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod
- * @da_start: device address where the va space starts.
- * @da_end: device address where the va space ends.
* @nr_tlb_entries: number of entries supported by the translation
* look-aside buffer (TLB).
*/
struct omap_mmu_dev_attr {
- u32 da_start;
- u32 da_end;
int nr_tlb_entries;
};
@@ -46,8 +42,6 @@ struct iommu_platform_data {
const char *name;
const char *reset_name;
int nr_tlb_entries;
- u32 da_start;
- u32 da_end;
int (*assert_reset)(struct platform_device *pdev, const char *name);
int (*deassert_reset)(struct platform_device *pdev, const char *name);
--
1.8.5.5
^ permalink raw reply related
* [PATCH v2 2/3] ARM: omap: Don't set iommu pdata da_start and da_end fields
From: Laurent Pinchart @ 2014-07-18 10:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1405680597-10012-1-git-send-email-laurent.pinchart@ideasonboard.com>
The fields are not used by the driver and will be removed from platform
data. Don't set them.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
arch/arm/mach-omap2/omap-iommu.c | 2 --
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 4 ----
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 4 ----
3 files changed, 10 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index f1fab56..4068350 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -34,8 +34,6 @@ static int __init omap_iommu_dev_init(struct omap_hwmod *oh, void *unused)
pdata->name = oh->name;
pdata->nr_tlb_entries = a->nr_tlb_entries;
- pdata->da_start = a->da_start;
- pdata->da_end = a->da_end;
if (oh->rst_lines_cnt == 1) {
pdata->reset_name = oh->rst_lines->name;
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 1cd0cfd..e9516b4 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -2986,8 +2986,6 @@ static struct omap_hwmod_class omap3xxx_mmu_hwmod_class = {
/* mmu isp */
static struct omap_mmu_dev_attr mmu_isp_dev_attr = {
- .da_start = 0x0,
- .da_end = 0xfffff000,
.nr_tlb_entries = 8,
};
@@ -3026,8 +3024,6 @@ static struct omap_hwmod omap3xxx_mmu_isp_hwmod = {
/* mmu iva */
static struct omap_mmu_dev_attr mmu_iva_dev_attr = {
- .da_start = 0x11000000,
- .da_end = 0xfffff000,
.nr_tlb_entries = 32,
};
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 41e54f7..b4acc0a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2084,8 +2084,6 @@ static struct omap_hwmod_class omap44xx_mmu_hwmod_class = {
/* mmu ipu */
static struct omap_mmu_dev_attr mmu_ipu_dev_attr = {
- .da_start = 0x0,
- .da_end = 0xfffff000,
.nr_tlb_entries = 32,
};
@@ -2133,8 +2131,6 @@ static struct omap_hwmod omap44xx_mmu_ipu_hwmod = {
/* mmu dsp */
static struct omap_mmu_dev_attr mmu_dsp_dev_attr = {
- .da_start = 0x0,
- .da_end = 0xfffff000,
.nr_tlb_entries = 32,
};
--
1.8.5.5
^ permalink raw reply related
* [PATCH v2 1/3] iommu/omap: Remove virtual memory manager
From: Laurent Pinchart @ 2014-07-18 10:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1405680597-10012-1-git-send-email-laurent.pinchart@ideasonboard.com>
The OMAP3 ISP driver was the only user of the OMAP IOVMM API. Now that
is has been ported to the DMA API, remove the unused virtual memory
manager.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
drivers/iommu/Kconfig | 10 +-
drivers/iommu/Makefile | 1 -
drivers/iommu/omap-iommu-debug.c | 114 ------
drivers/iommu/omap-iommu.c | 13 -
drivers/iommu/omap-iommu.h | 8 +-
drivers/iommu/omap-iovmm.c | 791 ---------------------------------------
include/linux/omap-iommu.h | 37 +-
7 files changed, 8 insertions(+), 966 deletions(-)
delete mode 100644 drivers/iommu/omap-iovmm.c
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index d260605..154e5a8 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -143,16 +143,12 @@ config OMAP_IOMMU
depends on ARCH_OMAP2PLUS
select IOMMU_API
-config OMAP_IOVMM
- tristate "OMAP IO Virtual Memory Manager Support"
- depends on OMAP_IOMMU
-
config OMAP_IOMMU_DEBUG
- tristate "Export OMAP IOMMU/IOVMM internals in DebugFS"
- depends on OMAP_IOVMM && DEBUG_FS
+ tristate "Export OMAP IOMMU internals in DebugFS"
+ depends on OMAP_IOMMU && DEBUG_FS
help
Select this to see extensive information about
- the internal state of OMAP IOMMU/IOVMM in debugfs.
+ the internal state of OMAP IOMMU in debugfs.
Say N unless you know you need this.
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 8893bad..6a4a00e 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -11,7 +11,6 @@ obj-$(CONFIG_IPMMU_VMSA) += ipmmu-vmsa.o
obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o
obj-$(CONFIG_OMAP_IOMMU) += omap-iommu.o
obj-$(CONFIG_OMAP_IOMMU) += omap-iommu2.o
-obj-$(CONFIG_OMAP_IOVMM) += omap-iovmm.o
obj-$(CONFIG_OMAP_IOMMU_DEBUG) += omap-iommu-debug.o
obj-$(CONFIG_TEGRA_IOMMU_GART) += tegra-gart.o
obj-$(CONFIG_TEGRA_IOMMU_SMMU) += tegra-smmu.o
diff --git a/drivers/iommu/omap-iommu-debug.c b/drivers/iommu/omap-iommu-debug.c
index 80fffba..531658d 100644
--- a/drivers/iommu/omap-iommu-debug.c
+++ b/drivers/iommu/omap-iommu-debug.c
@@ -213,116 +213,6 @@ static ssize_t debug_read_pagetable(struct file *file, char __user *userbuf,
return bytes;
}
-static ssize_t debug_read_mmap(struct file *file, char __user *userbuf,
- size_t count, loff_t *ppos)
-{
- struct device *dev = file->private_data;
- struct omap_iommu *obj = dev_to_omap_iommu(dev);
- char *p, *buf;
- struct iovm_struct *tmp;
- int uninitialized_var(i);
- ssize_t bytes;
-
- buf = (char *)__get_free_page(GFP_KERNEL);
- if (!buf)
- return -ENOMEM;
- p = buf;
-
- p += sprintf(p, "%-3s %-8s %-8s %6s %8s\n",
- "No", "start", "end", "size", "flags");
- p += sprintf(p, "-------------------------------------------------\n");
-
- mutex_lock(&iommu_debug_lock);
-
- list_for_each_entry(tmp, &obj->mmap, list) {
- size_t len;
- const char *str = "%3d %08x-%08x %6x %8x\n";
- const int maxcol = 39;
-
- len = tmp->da_end - tmp->da_start;
- p += snprintf(p, maxcol, str,
- i, tmp->da_start, tmp->da_end, len, tmp->flags);
-
- if (PAGE_SIZE - (p - buf) < maxcol)
- break;
- i++;
- }
-
- bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
-
- mutex_unlock(&iommu_debug_lock);
- free_page((unsigned long)buf);
-
- return bytes;
-}
-
-static ssize_t debug_read_mem(struct file *file, char __user *userbuf,
- size_t count, loff_t *ppos)
-{
- struct device *dev = file->private_data;
- char *p, *buf;
- struct iovm_struct *area;
- ssize_t bytes;
-
- count = min_t(ssize_t, count, PAGE_SIZE);
-
- buf = (char *)__get_free_page(GFP_KERNEL);
- if (!buf)
- return -ENOMEM;
- p = buf;
-
- mutex_lock(&iommu_debug_lock);
-
- area = omap_find_iovm_area(dev, (u32)ppos);
- if (!area) {
- bytes = -EINVAL;
- goto err_out;
- }
- memcpy(p, area->va, count);
- p += count;
-
- bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
-err_out:
- mutex_unlock(&iommu_debug_lock);
- free_page((unsigned long)buf);
-
- return bytes;
-}
-
-static ssize_t debug_write_mem(struct file *file, const char __user *userbuf,
- size_t count, loff_t *ppos)
-{
- struct device *dev = file->private_data;
- struct iovm_struct *area;
- char *p, *buf;
-
- count = min_t(size_t, count, PAGE_SIZE);
-
- buf = (char *)__get_free_page(GFP_KERNEL);
- if (!buf)
- return -ENOMEM;
- p = buf;
-
- mutex_lock(&iommu_debug_lock);
-
- if (copy_from_user(p, userbuf, count)) {
- count = -EFAULT;
- goto err_out;
- }
-
- area = omap_find_iovm_area(dev, (u32)ppos);
- if (!area) {
- count = -EINVAL;
- goto err_out;
- }
- memcpy(area->va, p, count);
-err_out:
- mutex_unlock(&iommu_debug_lock);
- free_page((unsigned long)buf);
-
- return count;
-}
-
#define DEBUG_FOPS(name) \
static const struct file_operations debug_##name##_fops = { \
.open = simple_open, \
@@ -342,8 +232,6 @@ DEBUG_FOPS_RO(ver);
DEBUG_FOPS_RO(regs);
DEBUG_FOPS_RO(tlb);
DEBUG_FOPS(pagetable);
-DEBUG_FOPS_RO(mmap);
-DEBUG_FOPS(mem);
#define __DEBUG_ADD_FILE(attr, mode) \
{ \
@@ -389,8 +277,6 @@ static int iommu_debug_register(struct device *dev, void *data)
DEBUG_ADD_FILE_RO(regs);
DEBUG_ADD_FILE_RO(tlb);
DEBUG_ADD_FILE(pagetable);
- DEBUG_ADD_FILE_RO(mmap);
- DEBUG_ADD_FILE(mem);
return 0;
diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c
index 895af06..61599e2 100644
--- a/drivers/iommu/omap-iommu.c
+++ b/drivers/iommu/omap-iommu.c
@@ -959,31 +959,18 @@ static int omap_iommu_probe(struct platform_device *pdev)
return err;
if (obj->nr_tlb_entries != 32 && obj->nr_tlb_entries != 8)
return -EINVAL;
- /*
- * da_start and da_end are needed for omap-iovmm, so hardcode
- * these values as used by OMAP3 ISP - the only user for
- * omap-iovmm
- */
- obj->da_start = 0;
- obj->da_end = 0xfffff000;
if (of_find_property(of, "ti,iommu-bus-err-back", NULL))
obj->has_bus_err_back = MMU_GP_REG_BUS_ERR_BACK_EN;
} else {
obj->nr_tlb_entries = pdata->nr_tlb_entries;
obj->name = pdata->name;
- obj->da_start = pdata->da_start;
- obj->da_end = pdata->da_end;
}
- if (obj->da_end <= obj->da_start)
- return -EINVAL;
obj->dev = &pdev->dev;
obj->ctx = (void *)obj + sizeof(*obj);
spin_lock_init(&obj->iommu_lock);
- mutex_init(&obj->mmap_lock);
spin_lock_init(&obj->page_table_lock);
- INIT_LIST_HEAD(&obj->mmap);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
obj->regbase = devm_ioremap_resource(obj->dev, res);
diff --git a/drivers/iommu/omap-iommu.h b/drivers/iommu/omap-iommu.h
index ea920c3..1275a82 100644
--- a/drivers/iommu/omap-iommu.h
+++ b/drivers/iommu/omap-iommu.h
@@ -46,12 +46,7 @@ struct omap_iommu {
int nr_tlb_entries;
- struct list_head mmap;
- struct mutex mmap_lock; /* protect mmap */
-
void *ctx; /* iommu context: registres saved area */
- u32 da_start;
- u32 da_end;
int has_bus_err_back;
};
@@ -154,9 +149,12 @@ static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)
#define MMU_RAM_PADDR_MASK \
((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT)
+#define MMU_RAM_ENDIAN_SHIFT 9
#define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT)
+#define MMU_RAM_ENDIAN_LITTLE (0 << MMU_RAM_ENDIAN_SHIFT)
#define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT)
+#define MMU_RAM_ELSZ_SHIFT 7
#define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT)
#define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT)
#define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT)
diff --git a/drivers/iommu/omap-iovmm.c b/drivers/iommu/omap-iovmm.c
deleted file mode 100644
index d147259..0000000
--- a/drivers/iommu/omap-iovmm.c
+++ /dev/null
@@ -1,791 +0,0 @@
-/*
- * omap iommu: simple virtual address space management
- *
- * Copyright (C) 2008-2009 Nokia Corporation
- *
- * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/module.h>
-#include <linux/err.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/device.h>
-#include <linux/scatterlist.h>
-#include <linux/iommu.h>
-#include <linux/omap-iommu.h>
-#include <linux/platform_data/iommu-omap.h>
-
-#include <asm/cacheflush.h>
-#include <asm/mach/map.h>
-
-#include "omap-iopgtable.h"
-#include "omap-iommu.h"
-
-/*
- * IOVMF_FLAGS: attribute for iommu virtual memory area(iovma)
- *
- * lower 16 bit is used for h/w and upper 16 bit is for s/w.
- */
-#define IOVMF_SW_SHIFT 16
-
-/*
- * iovma: h/w flags derived from cam and ram attribute
- */
-#define IOVMF_CAM_MASK (~((1 << 10) - 1))
-#define IOVMF_RAM_MASK (~IOVMF_CAM_MASK)
-
-#define IOVMF_PGSZ_MASK (3 << 0)
-#define IOVMF_PGSZ_1M MMU_CAM_PGSZ_1M
-#define IOVMF_PGSZ_64K MMU_CAM_PGSZ_64K
-#define IOVMF_PGSZ_4K MMU_CAM_PGSZ_4K
-#define IOVMF_PGSZ_16M MMU_CAM_PGSZ_16M
-
-#define IOVMF_ENDIAN_MASK (1 << 9)
-#define IOVMF_ENDIAN_BIG MMU_RAM_ENDIAN_BIG
-
-#define IOVMF_ELSZ_MASK (3 << 7)
-#define IOVMF_ELSZ_16 MMU_RAM_ELSZ_16
-#define IOVMF_ELSZ_32 MMU_RAM_ELSZ_32
-#define IOVMF_ELSZ_NONE MMU_RAM_ELSZ_NONE
-
-#define IOVMF_MIXED_MASK (1 << 6)
-#define IOVMF_MIXED MMU_RAM_MIXED
-
-/*
- * iovma: s/w flags, used for mapping and umapping internally.
- */
-#define IOVMF_MMIO (1 << IOVMF_SW_SHIFT)
-#define IOVMF_ALLOC (2 << IOVMF_SW_SHIFT)
-#define IOVMF_ALLOC_MASK (3 << IOVMF_SW_SHIFT)
-
-/* "superpages" is supported just with physically linear pages */
-#define IOVMF_DISCONT (1 << (2 + IOVMF_SW_SHIFT))
-#define IOVMF_LINEAR (2 << (2 + IOVMF_SW_SHIFT))
-#define IOVMF_LINEAR_MASK (3 << (2 + IOVMF_SW_SHIFT))
-
-#define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT))
-
-static struct kmem_cache *iovm_area_cachep;
-
-/* return the offset of the first scatterlist entry in a sg table */
-static unsigned int sgtable_offset(const struct sg_table *sgt)
-{
- if (!sgt || !sgt->nents)
- return 0;
-
- return sgt->sgl->offset;
-}
-
-/* return total bytes of sg buffers */
-static size_t sgtable_len(const struct sg_table *sgt)
-{
- unsigned int i, total = 0;
- struct scatterlist *sg;
-
- if (!sgt)
- return 0;
-
- for_each_sg(sgt->sgl, sg, sgt->nents, i) {
- size_t bytes;
-
- bytes = sg->length + sg->offset;
-
- if (!iopgsz_ok(bytes)) {
- pr_err("%s: sg[%d] not iommu pagesize(%u %u)\n",
- __func__, i, bytes, sg->offset);
- return 0;
- }
-
- if (i && sg->offset) {
- pr_err("%s: sg[%d] offset not allowed in internal entries\n",
- __func__, i);
- return 0;
- }
-
- total += bytes;
- }
-
- return total;
-}
-#define sgtable_ok(x) (!!sgtable_len(x))
-
-static unsigned max_alignment(u32 addr)
-{
- int i;
- unsigned pagesize[] = { SZ_16M, SZ_1M, SZ_64K, SZ_4K, };
- for (i = 0; i < ARRAY_SIZE(pagesize) && addr & (pagesize[i] - 1); i++)
- ;
- return (i < ARRAY_SIZE(pagesize)) ? pagesize[i] : 0;
-}
-
-/*
- * calculate the optimal number sg elements from total bytes based on
- * iommu superpages
- */
-static unsigned sgtable_nents(size_t bytes, u32 da, u32 pa)
-{
- unsigned nr_entries = 0, ent_sz;
-
- if (!IS_ALIGNED(bytes, PAGE_SIZE)) {
- pr_err("%s: wrong size %08x\n", __func__, bytes);
- return 0;
- }
-
- while (bytes) {
- ent_sz = max_alignment(da | pa);
- ent_sz = min_t(unsigned, ent_sz, iopgsz_max(bytes));
- nr_entries++;
- da += ent_sz;
- pa += ent_sz;
- bytes -= ent_sz;
- }
-
- return nr_entries;
-}
-
-/* allocate and initialize sg_table header(a kind of 'superblock') */
-static struct sg_table *sgtable_alloc(const size_t bytes, u32 flags,
- u32 da, u32 pa)
-{
- unsigned int nr_entries;
- int err;
- struct sg_table *sgt;
-
- if (!bytes)
- return ERR_PTR(-EINVAL);
-
- if (!IS_ALIGNED(bytes, PAGE_SIZE))
- return ERR_PTR(-EINVAL);
-
- if (flags & IOVMF_LINEAR) {
- nr_entries = sgtable_nents(bytes, da, pa);
- if (!nr_entries)
- return ERR_PTR(-EINVAL);
- } else
- nr_entries = bytes / PAGE_SIZE;
-
- sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
- if (!sgt)
- return ERR_PTR(-ENOMEM);
-
- err = sg_alloc_table(sgt, nr_entries, GFP_KERNEL);
- if (err) {
- kfree(sgt);
- return ERR_PTR(err);
- }
-
- pr_debug("%s: sgt:%p(%d entries)\n", __func__, sgt, nr_entries);
-
- return sgt;
-}
-
-/* free sg_table header(a kind of superblock) */
-static void sgtable_free(struct sg_table *sgt)
-{
- if (!sgt)
- return;
-
- sg_free_table(sgt);
- kfree(sgt);
-
- pr_debug("%s: sgt:%p\n", __func__, sgt);
-}
-
-/* map 'sglist' to a contiguous mpu virtual area and return 'va' */
-static void *vmap_sg(const struct sg_table *sgt)
-{
- u32 va;
- size_t total;
- unsigned int i;
- struct scatterlist *sg;
- struct vm_struct *new;
- const struct mem_type *mtype;
-
- mtype = get_mem_type(MT_DEVICE);
- if (!mtype)
- return ERR_PTR(-EINVAL);
-
- total = sgtable_len(sgt);
- if (!total)
- return ERR_PTR(-EINVAL);
-
- new = __get_vm_area(total, VM_IOREMAP, VMALLOC_START, VMALLOC_END);
- if (!new)
- return ERR_PTR(-ENOMEM);
- va = (u32)new->addr;
-
- for_each_sg(sgt->sgl, sg, sgt->nents, i) {
- size_t bytes;
- u32 pa;
- int err;
-
- pa = sg_phys(sg) - sg->offset;
- bytes = sg->length + sg->offset;
-
- BUG_ON(bytes != PAGE_SIZE);
-
- err = ioremap_page(va, pa, mtype);
- if (err)
- goto err_out;
-
- va += bytes;
- }
-
- flush_cache_vmap((unsigned long)new->addr,
- (unsigned long)(new->addr + total));
- return new->addr;
-
-err_out:
- WARN_ON(1); /* FIXME: cleanup some mpu mappings */
- vunmap(new->addr);
- return ERR_PTR(-EAGAIN);
-}
-
-static inline void vunmap_sg(const void *va)
-{
- vunmap(va);
-}
-
-static struct iovm_struct *__find_iovm_area(struct omap_iommu *obj,
- const u32 da)
-{
- struct iovm_struct *tmp;
-
- list_for_each_entry(tmp, &obj->mmap, list) {
- if ((da >= tmp->da_start) && (da < tmp->da_end)) {
- size_t len;
-
- len = tmp->da_end - tmp->da_start;
-
- dev_dbg(obj->dev, "%s: %08x-%08x-%08x(%x) %08x\n",
- __func__, tmp->da_start, da, tmp->da_end, len,
- tmp->flags);
-
- return tmp;
- }
- }
-
- return NULL;
-}
-
-/**
- * omap_find_iovm_area - find iovma which includes @da
- * @dev: client device
- * @da: iommu device virtual address
- *
- * Find the existing iovma starting at @da
- */
-struct iovm_struct *omap_find_iovm_area(struct device *dev, u32 da)
-{
- struct omap_iommu *obj = dev_to_omap_iommu(dev);
- struct iovm_struct *area;
-
- mutex_lock(&obj->mmap_lock);
- area = __find_iovm_area(obj, da);
- mutex_unlock(&obj->mmap_lock);
-
- return area;
-}
-EXPORT_SYMBOL_GPL(omap_find_iovm_area);
-
-/*
- * This finds the hole(area) which fits the requested address and len
- * in iovmas mmap, and returns the new allocated iovma.
- */
-static struct iovm_struct *alloc_iovm_area(struct omap_iommu *obj, u32 da,
- size_t bytes, u32 flags)
-{
- struct iovm_struct *new, *tmp;
- u32 start, prev_end, alignment;
-
- if (!obj || !bytes)
- return ERR_PTR(-EINVAL);
-
- start = da;
- alignment = PAGE_SIZE;
-
- if (~flags & IOVMF_DA_FIXED) {
- /* Don't map address 0 */
- start = obj->da_start ? obj->da_start : alignment;
-
- if (flags & IOVMF_LINEAR)
- alignment = iopgsz_max(bytes);
- start = roundup(start, alignment);
- } else if (start < obj->da_start || start > obj->da_end ||
- obj->da_end - start < bytes) {
- return ERR_PTR(-EINVAL);
- }
-
- tmp = NULL;
- if (list_empty(&obj->mmap))
- goto found;
-
- prev_end = 0;
- list_for_each_entry(tmp, &obj->mmap, list) {
-
- if (prev_end > start)
- break;
-
- if (tmp->da_start > start && (tmp->da_start - start) >= bytes)
- goto found;
-
- if (tmp->da_end >= start && ~flags & IOVMF_DA_FIXED)
- start = roundup(tmp->da_end + 1, alignment);
-
- prev_end = tmp->da_end;
- }
-
- if ((start >= prev_end) && (obj->da_end - start >= bytes))
- goto found;
-
- dev_dbg(obj->dev, "%s: no space to fit %08x(%x) flags: %08x\n",
- __func__, da, bytes, flags);
-
- return ERR_PTR(-EINVAL);
-
-found:
- new = kmem_cache_zalloc(iovm_area_cachep, GFP_KERNEL);
- if (!new)
- return ERR_PTR(-ENOMEM);
-
- new->iommu = obj;
- new->da_start = start;
- new->da_end = start + bytes;
- new->flags = flags;
-
- /*
- * keep ascending order of iovmas
- */
- if (tmp)
- list_add_tail(&new->list, &tmp->list);
- else
- list_add(&new->list, &obj->mmap);
-
- dev_dbg(obj->dev, "%s: found %08x-%08x-%08x(%x) %08x\n",
- __func__, new->da_start, start, new->da_end, bytes, flags);
-
- return new;
-}
-
-static void free_iovm_area(struct omap_iommu *obj, struct iovm_struct *area)
-{
- size_t bytes;
-
- BUG_ON(!obj || !area);
-
- bytes = area->da_end - area->da_start;
-
- dev_dbg(obj->dev, "%s: %08x-%08x(%x) %08x\n",
- __func__, area->da_start, area->da_end, bytes, area->flags);
-
- list_del(&area->list);
- kmem_cache_free(iovm_area_cachep, area);
-}
-
-/**
- * omap_da_to_va - convert (d) to (v)
- * @dev: client device
- * @da: iommu device virtual address
- * @va: mpu virtual address
- *
- * Returns mpu virtual addr which corresponds to a given device virtual addr
- */
-void *omap_da_to_va(struct device *dev, u32 da)
-{
- struct omap_iommu *obj = dev_to_omap_iommu(dev);
- void *va = NULL;
- struct iovm_struct *area;
-
- mutex_lock(&obj->mmap_lock);
-
- area = __find_iovm_area(obj, da);
- if (!area) {
- dev_dbg(obj->dev, "%s: no da area(%08x)\n", __func__, da);
- goto out;
- }
- va = area->va;
-out:
- mutex_unlock(&obj->mmap_lock);
-
- return va;
-}
-EXPORT_SYMBOL_GPL(omap_da_to_va);
-
-static void sgtable_fill_vmalloc(struct sg_table *sgt, void *_va)
-{
- unsigned int i;
- struct scatterlist *sg;
- void *va = _va;
- void *va_end;
-
- for_each_sg(sgt->sgl, sg, sgt->nents, i) {
- struct page *pg;
- const size_t bytes = PAGE_SIZE;
-
- /*
- * iommu 'superpage' isn't supported with 'omap_iommu_vmalloc()'
- */
- pg = vmalloc_to_page(va);
- BUG_ON(!pg);
- sg_set_page(sg, pg, bytes, 0);
-
- va += bytes;
- }
-
- va_end = _va + PAGE_SIZE * i;
-}
-
-static inline void sgtable_drain_vmalloc(struct sg_table *sgt)
-{
- /*
- * Actually this is not necessary at all, just exists for
- * consistency of the code readability.
- */
- BUG_ON(!sgt);
-}
-
-/* create 'da' <-> 'pa' mapping from 'sgt' */
-static int map_iovm_area(struct iommu_domain *domain, struct iovm_struct *new,
- const struct sg_table *sgt, u32 flags)
-{
- int err;
- unsigned int i, j;
- struct scatterlist *sg;
- u32 da = new->da_start;
-
- if (!domain || !sgt)
- return -EINVAL;
-
- BUG_ON(!sgtable_ok(sgt));
-
- for_each_sg(sgt->sgl, sg, sgt->nents, i) {
- u32 pa;
- size_t bytes;
-
- pa = sg_phys(sg) - sg->offset;
- bytes = sg->length + sg->offset;
-
- flags &= ~IOVMF_PGSZ_MASK;
-
- if (bytes_to_iopgsz(bytes) < 0)
- goto err_out;
-
- pr_debug("%s: [%d] %08x %08x(%x)\n", __func__,
- i, da, pa, bytes);
-
- err = iommu_map(domain, da, pa, bytes, flags);
- if (err)
- goto err_out;
-
- da += bytes;
- }
- return 0;
-
-err_out:
- da = new->da_start;
-
- for_each_sg(sgt->sgl, sg, i, j) {
- size_t bytes;
-
- bytes = sg->length + sg->offset;
-
- /* ignore failures.. we're already handling one */
- iommu_unmap(domain, da, bytes);
-
- da += bytes;
- }
- return err;
-}
-
-/* release 'da' <-> 'pa' mapping */
-static void unmap_iovm_area(struct iommu_domain *domain, struct omap_iommu *obj,
- struct iovm_struct *area)
-{
- u32 start;
- size_t total = area->da_end - area->da_start;
- const struct sg_table *sgt = area->sgt;
- struct scatterlist *sg;
- int i;
- size_t unmapped;
-
- BUG_ON(!sgtable_ok(sgt));
- BUG_ON((!total) || !IS_ALIGNED(total, PAGE_SIZE));
-
- start = area->da_start;
- for_each_sg(sgt->sgl, sg, sgt->nents, i) {
- size_t bytes;
-
- bytes = sg->length + sg->offset;
-
- unmapped = iommu_unmap(domain, start, bytes);
- if (unmapped < bytes)
- break;
-
- dev_dbg(obj->dev, "%s: unmap %08x(%x) %08x\n",
- __func__, start, bytes, area->flags);
-
- BUG_ON(!IS_ALIGNED(bytes, PAGE_SIZE));
-
- total -= bytes;
- start += bytes;
- }
- BUG_ON(total);
-}
-
-/* template function for all unmapping */
-static struct sg_table *unmap_vm_area(struct iommu_domain *domain,
- struct omap_iommu *obj, const u32 da,
- void (*fn)(const void *), u32 flags)
-{
- struct sg_table *sgt = NULL;
- struct iovm_struct *area;
-
- if (!IS_ALIGNED(da, PAGE_SIZE)) {
- dev_err(obj->dev, "%s: alignment err(%08x)\n", __func__, da);
- return NULL;
- }
-
- mutex_lock(&obj->mmap_lock);
-
- area = __find_iovm_area(obj, da);
- if (!area) {
- dev_dbg(obj->dev, "%s: no da area(%08x)\n", __func__, da);
- goto out;
- }
-
- if ((area->flags & flags) != flags) {
- dev_err(obj->dev, "%s: wrong flags(%08x)\n", __func__,
- area->flags);
- goto out;
- }
- sgt = (struct sg_table *)area->sgt;
-
- unmap_iovm_area(domain, obj, area);
-
- fn(area->va);
-
- dev_dbg(obj->dev, "%s: %08x-%08x-%08x(%x) %08x\n", __func__,
- area->da_start, da, area->da_end,
- area->da_end - area->da_start, area->flags);
-
- free_iovm_area(obj, area);
-out:
- mutex_unlock(&obj->mmap_lock);
-
- return sgt;
-}
-
-static u32 map_iommu_region(struct iommu_domain *domain, struct omap_iommu *obj,
- u32 da, const struct sg_table *sgt, void *va,
- size_t bytes, u32 flags)
-{
- int err = -ENOMEM;
- struct iovm_struct *new;
-
- mutex_lock(&obj->mmap_lock);
-
- new = alloc_iovm_area(obj, da, bytes, flags);
- if (IS_ERR(new)) {
- err = PTR_ERR(new);
- goto err_alloc_iovma;
- }
- new->va = va;
- new->sgt = sgt;
-
- if (map_iovm_area(domain, new, sgt, new->flags))
- goto err_map;
-
- mutex_unlock(&obj->mmap_lock);
-
- dev_dbg(obj->dev, "%s: da:%08x(%x) flags:%08x va:%p\n",
- __func__, new->da_start, bytes, new->flags, va);
-
- return new->da_start;
-
-err_map:
- free_iovm_area(obj, new);
-err_alloc_iovma:
- mutex_unlock(&obj->mmap_lock);
- return err;
-}
-
-static inline u32
-__iommu_vmap(struct iommu_domain *domain, struct omap_iommu *obj,
- u32 da, const struct sg_table *sgt,
- void *va, size_t bytes, u32 flags)
-{
- return map_iommu_region(domain, obj, da, sgt, va, bytes, flags);
-}
-
-/**
- * omap_iommu_vmap - (d)-(p)-(v) address mapper
- * @domain: iommu domain
- * @dev: client device
- * @sgt: address of scatter gather table
- * @flags: iovma and page property
- *
- * Creates 1-n-1 mapping with given @sgt and returns @da.
- * All @sgt element must be io page size aligned.
- */
-u32 omap_iommu_vmap(struct iommu_domain *domain, struct device *dev, u32 da,
- const struct sg_table *sgt, u32 flags)
-{
- struct omap_iommu *obj = dev_to_omap_iommu(dev);
- size_t bytes;
- void *va = NULL;
-
- if (!obj || !obj->dev || !sgt)
- return -EINVAL;
-
- bytes = sgtable_len(sgt);
- if (!bytes)
- return -EINVAL;
- bytes = PAGE_ALIGN(bytes);
-
- if (flags & IOVMF_MMIO) {
- va = vmap_sg(sgt);
- if (IS_ERR(va))
- return PTR_ERR(va);
- }
-
- flags |= IOVMF_DISCONT;
- flags |= IOVMF_MMIO;
-
- da = __iommu_vmap(domain, obj, da, sgt, va, bytes, flags);
- if (IS_ERR_VALUE(da))
- vunmap_sg(va);
-
- return da + sgtable_offset(sgt);
-}
-EXPORT_SYMBOL_GPL(omap_iommu_vmap);
-
-/**
- * omap_iommu_vunmap - release virtual mapping obtained by 'omap_iommu_vmap()'
- * @domain: iommu domain
- * @dev: client device
- * @da: iommu device virtual address
- *
- * Free the iommu virtually contiguous memory area starting at
- * @da, which was returned by 'omap_iommu_vmap()'.
- */
-struct sg_table *
-omap_iommu_vunmap(struct iommu_domain *domain, struct device *dev, u32 da)
-{
- struct omap_iommu *obj = dev_to_omap_iommu(dev);
- struct sg_table *sgt;
- /*
- * 'sgt' is allocated before 'omap_iommu_vmalloc()' is called.
- * Just returns 'sgt' to the caller to free
- */
- da &= PAGE_MASK;
- sgt = unmap_vm_area(domain, obj, da, vunmap_sg,
- IOVMF_DISCONT | IOVMF_MMIO);
- if (!sgt)
- dev_dbg(obj->dev, "%s: No sgt\n", __func__);
- return sgt;
-}
-EXPORT_SYMBOL_GPL(omap_iommu_vunmap);
-
-/**
- * omap_iommu_vmalloc - (d)-(p)-(v) address allocator and mapper
- * @dev: client device
- * @da: contiguous iommu virtual memory
- * @bytes: allocation size
- * @flags: iovma and page property
- *
- * Allocate @bytes linearly and creates 1-n-1 mapping and returns
- * @da again, which might be adjusted if 'IOVMF_DA_FIXED' is not set.
- */
-u32
-omap_iommu_vmalloc(struct iommu_domain *domain, struct device *dev, u32 da,
- size_t bytes, u32 flags)
-{
- struct omap_iommu *obj = dev_to_omap_iommu(dev);
- void *va;
- struct sg_table *sgt;
-
- if (!obj || !obj->dev || !bytes)
- return -EINVAL;
-
- bytes = PAGE_ALIGN(bytes);
-
- va = vmalloc(bytes);
- if (!va)
- return -ENOMEM;
-
- flags |= IOVMF_DISCONT;
- flags |= IOVMF_ALLOC;
-
- sgt = sgtable_alloc(bytes, flags, da, 0);
- if (IS_ERR(sgt)) {
- da = PTR_ERR(sgt);
- goto err_sgt_alloc;
- }
- sgtable_fill_vmalloc(sgt, va);
-
- da = __iommu_vmap(domain, obj, da, sgt, va, bytes, flags);
- if (IS_ERR_VALUE(da))
- goto err_iommu_vmap;
-
- return da;
-
-err_iommu_vmap:
- sgtable_drain_vmalloc(sgt);
- sgtable_free(sgt);
-err_sgt_alloc:
- vfree(va);
- return da;
-}
-EXPORT_SYMBOL_GPL(omap_iommu_vmalloc);
-
-/**
- * omap_iommu_vfree - release memory allocated by 'omap_iommu_vmalloc()'
- * @dev: client device
- * @da: iommu device virtual address
- *
- * Frees the iommu virtually continuous memory area starting at
- * @da, as obtained from 'omap_iommu_vmalloc()'.
- */
-void omap_iommu_vfree(struct iommu_domain *domain, struct device *dev,
- const u32 da)
-{
- struct omap_iommu *obj = dev_to_omap_iommu(dev);
- struct sg_table *sgt;
-
- sgt = unmap_vm_area(domain, obj, da, vfree,
- IOVMF_DISCONT | IOVMF_ALLOC);
- if (!sgt)
- dev_dbg(obj->dev, "%s: No sgt\n", __func__);
- sgtable_free(sgt);
-}
-EXPORT_SYMBOL_GPL(omap_iommu_vfree);
-
-static int __init iovmm_init(void)
-{
- const unsigned long flags = SLAB_HWCACHE_ALIGN;
- struct kmem_cache *p;
-
- p = kmem_cache_create("iovm_area_cache", sizeof(struct iovm_struct), 0,
- flags, NULL);
- if (!p)
- return -ENOMEM;
- iovm_area_cachep = p;
-
- return 0;
-}
-module_init(iovmm_init);
-
-static void __exit iovmm_exit(void)
-{
- kmem_cache_destroy(iovm_area_cachep);
-}
-module_exit(iovmm_exit);
-
-MODULE_DESCRIPTION("omap iommu: simple virtual address space management");
-MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>");
-MODULE_LICENSE("GPL v2");
diff --git a/include/linux/omap-iommu.h b/include/linux/omap-iommu.h
index cac78de..c1aede4 100644
--- a/include/linux/omap-iommu.h
+++ b/include/linux/omap-iommu.h
@@ -10,41 +10,8 @@
* published by the Free Software Foundation.
*/
-#ifndef _INTEL_IOMMU_H_
-#define _INTEL_IOMMU_H_
-
-struct iovm_struct {
- struct omap_iommu *iommu; /* iommu object which this belongs to */
- u32 da_start; /* area definition */
- u32 da_end;
- u32 flags; /* IOVMF_: see below */
- struct list_head list; /* linked in ascending order */
- const struct sg_table *sgt; /* keep 'page' <-> 'da' mapping */
- void *va; /* mpu side mapped address */
-};
-
-#define MMU_RAM_ENDIAN_SHIFT 9
-#define MMU_RAM_ENDIAN_LITTLE (0 << MMU_RAM_ENDIAN_SHIFT)
-#define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT)
-#define IOVMF_ENDIAN_LITTLE MMU_RAM_ENDIAN_LITTLE
-#define MMU_RAM_ELSZ_SHIFT 7
-#define IOVMF_ELSZ_8 MMU_RAM_ELSZ_8
-
-struct iommu_domain;
-
-extern struct iovm_struct *omap_find_iovm_area(struct device *dev, u32 da);
-extern u32
-omap_iommu_vmap(struct iommu_domain *domain, struct device *dev, u32 da,
- const struct sg_table *sgt, u32 flags);
-extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain,
- struct device *dev, u32 da);
-extern u32
-omap_iommu_vmalloc(struct iommu_domain *domain, struct device *dev,
- u32 da, size_t bytes, u32 flags);
-extern void
-omap_iommu_vfree(struct iommu_domain *domain, struct device *dev,
- const u32 da);
-extern void *omap_da_to_va(struct device *dev, u32 da);
+#ifndef _OMAP_IOMMU_H_
+#define _OMAP_IOMMU_H_
extern void omap_iommu_save_ctx(struct device *dev);
extern void omap_iommu_restore_ctx(struct device *dev);
--
1.8.5.5
^ permalink raw reply related
* [PATCH v5 7/8] ata: Add support for the Tegra124 SATA controller
From: Mikko Perttunen @ 2014-07-18 10:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <53C8F65C.2020800@redhat.com>
Thanks!
- Mikko
On 18/07/14 13:26, Hans de Goede wrote:
> Hi,
>
> On 07/18/2014 09:12 AM, Mikko Perttunen wrote:
>> This adds support for the integrated AHCI-compliant Serial ATA
>> controller present on the NVIDIA Tegra124 system-on-chip.
>>
>> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
>> ---
>> v5: let ahci_platform handle sata clock and also handle it ourselves.
>> this allows use of ahci_platform while having a special sequence
>> for the clock.
>
> Thanks, I like this one, much better then what we had before.
>
> Acked-by: Hans de Goede <hdegoede@redhat.com>
>
> Regards,
>
> Hans
>
>
>
>> ...
^ permalink raw reply
* [PATCH v2 0/3] iommu: Remove OMAP IOVMM driver
From: Laurent Pinchart @ 2014-07-18 10:49 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
The OMAP3 ISP driver was the only user of the OMAP IOVMM API. Now that is has
been ported to the DMA API, remove the unused virtual memory manager.
The removal is split in three patches to ease upstream merge. The first patch
removes the omap-iovmm driver, the second patch removes setting of now unused
platform data fields from arch code, and the last patch cleans up the platform
data structure.
I'd like to get at least the first patch merged in v3.17. To avoid splitting
the series across three kernel versions, it would be nice to also merge at
least the second patch for v3.17. If there's no risk of conflict everything
could be merged in one go through the ARM SoC tree. Otherwise a stable branch
with patch 1/3 will be needed to base the arch change on.
Joerg, Tony, how would you like to proceed ?
Changes compared to v1:
- Fix OMAP_IOMMU_DEBUG dependency on OMAP_IOMMU
- Remove omap_iommu da_start and da_end fields
- Added patches 2/3 and 3/3
Laurent Pinchart (3):
iommu/omap: Remove virtual memory manager
ARM: omap: Don't set iommu pdata da_start and da_end fields
iommu/omap: Remove platform data da_start and da_end fields
arch/arm/mach-omap2/omap-iommu.c | 2 -
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 4 -
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 4 -
drivers/iommu/Kconfig | 10 +-
drivers/iommu/Makefile | 1 -
drivers/iommu/omap-iommu-debug.c | 114 -----
drivers/iommu/omap-iommu.c | 13 -
drivers/iommu/omap-iommu.h | 8 +-
drivers/iommu/omap-iovmm.c | 791 -----------------------------
include/linux/omap-iommu.h | 37 +-
include/linux/platform_data/iommu-omap.h | 6 -
11 files changed, 8 insertions(+), 982 deletions(-)
delete mode 100644 drivers/iommu/omap-iovmm.c
--
Regards,
Laurent Pinchart
^ permalink raw reply
* [PATCH v10 5/7] arm: add basic support for Mediatek MT6589 boards
From: Heiko Stübner @ 2014-07-18 10:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <53C8ED0B.5080802@linaro.org>
Hi Daniel,
Am Freitag, 18. Juli 2014, 11:46:51 schrieb Daniel Lezcano:
> On 07/07/2014 05:13 PM, Matthias Brugger wrote:
> > This adds a generic devicetree board file and a dtsi for boards
> > based on MT6589 SoCs from Mediatek.
> >
> > Apart from the generic parts (gic, clocks) the only component
> > currently supported are the timers.
> >
> > Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
> > --
>
> I will take this patchset through my tree but this patch touches an area
> I am not handling.
>
> Olof, Arnd, do you mind to ack this patch ?
wouldn't it be easier to just take patches 1,2,3,4 through your tree and let
patches 5,6,7 go through arm-soc?
There is no compile-time dependency between the two parts, so they will come
together nicely in linux-next and during the merge-window.
Also in [0] Olof wrote:
----------
Traditionally we usually take the DT changes through arm-soc, but as
long as we share the branch we might be ok. We tend to stick them in
different branches in our tree though, so rockchip will be a little
mis-sorted this release. Not a big deal, and we can deal with it.
-----------
So I'd assume splitting the patchset this way might be a nice solution?
Heiko
[0] http://www.spinics.net/lists/arm-kernel/msg347053.html
^ permalink raw reply
* [GIT PULL] Xilinx Zynq changes for v3.17
From: Michal Simek @ 2014-07-18 10:34 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
please pull these two patches to your arm-soc tree.
Thanks,
Michal
The following changes since commit 1795cd9b3a91d4b5473c97f491d63892442212ab:
Linux 3.16-rc5 (2014-07-13 14:04:33 -0700)
are available in the git repository at:
git://git.xilinx.com/linux-xlnx.git tags/zynq-dt-for-3.17
for you to fetch changes up to 8fe9346b945d76ddb3f08c00e34d701174c62fa0:
ARM: zynq: DT: Migrate UART to Cadence binding (2014-07-18 11:54:24 +0200)
----------------------------------------------------------------
arm: Xilinx Zynq dt patches for v3.17
- Document and use new cadence serial binding
----------------------------------------------------------------
Soren Brinkmann (2):
tty: cadence: Document DT binding
ARM: zynq: DT: Migrate UART to Cadence binding
Documentation/devicetree/bindings/serial/cdns,uart.txt | 20 ++++++++++++++++++++
arch/arm/boot/dts/zynq-7000.dtsi | 8 ++++----
2 files changed, 24 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/serial/cdns,uart.txt
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 263 bytes
Desc: OpenPGP digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140718/99d358e5/attachment-0001.sig>
^ permalink raw reply
* [PATCH v5 1/8] of: Add NVIDIA Tegra SATA controller binding
From: Hans de Goede @ 2014-07-18 10:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <53C8C9BD.3070709@nvidia.com>
Hi,
On 07/18/2014 09:16 AM, Mikko Perttunen wrote:
> So here's v5: this time, as suggested, I handle the sata clock myself and let ahci_platform handle it too, leading it to be prepared+enabled twice. This works fine, and allows us to remove the DT ordering requirement.
>
> I also have in the works a patchset that adds the name-based ahci_platform_get_resources function, but that is not quite ready yet, even if it is quite far along. Also, I am going on vacation and returning on 28.7., so if this v5 is acceptable maybe it could be merged for 3.17 and I could work on the new get_resources scheme after I get back from vacation?
Yes that works for me v3 of all the patches with no newer version +
v5 of patch 1 and 7 are pretty clean and can go into 3.17 from my pov,
Tejun can you pick these up for 3.17 please?
And thanks for working on a name-based ahci_platform_get_resources function
since what we've now in v5 is quite clean already I think it will be good
to take our time to get this right, so postponing this to 3.18 is fine
with me.
Regards,
Hans
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox