* [GIT PULL] ARM: mvebu: Fixes for v3.16 (round 3)
From: Olof Johansson @ 2014-07-18 21:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140718213214.GL24496@titan.lakedaemon.net>
On Fri, Jul 18, 2014 at 2:32 PM, Jason Cooper <jason@lakedaemon.net> wrote:
> All,
>
> Here is hopefully the last round of fixes for mvebu.
>
> This is an incremental pull request from tags/mvebu-fixes-3.16-2 up to
> tags/mvebu-fixes-3.16-3 on the mvebu/fixes branch.
>
> Please pull.
>
> thx,
>
> Jason.
>
> The following changes since commit 6509dc74c9f55ffaa558738b96c4da8b98d39571:
>
> ARM: mvebu: fix cpuidle implementation to work on big-endian systems (2014-06-30 18:15:11 +0000)
>
> are available in the git repository at:
>
> git://git.infradead.org/linux-mvebu.git tags/mvebu-fixes-3.16-3
>
> for you to fetch changes up to a728b977429383b3fe92b6e3bff9e69365609e0f:
>
> ARM: mvebu: Fix coherency bus notifiers by using separate notifiers (2014-07-08 13:53:53 +0000)
Merged, thanks.
-Olof
^ permalink raw reply
* [GIT PULL] ARM: mvebu: Fixes for v3.16 (round 3)
From: Jason Cooper @ 2014-07-18 21:32 UTC (permalink / raw)
To: linux-arm-kernel
All,
Here is hopefully the last round of fixes for mvebu.
This is an incremental pull request from tags/mvebu-fixes-3.16-2 up to
tags/mvebu-fixes-3.16-3 on the mvebu/fixes branch.
Please pull.
thx,
Jason.
The following changes since commit 6509dc74c9f55ffaa558738b96c4da8b98d39571:
ARM: mvebu: fix cpuidle implementation to work on big-endian systems (2014-06-30 18:15:11 +0000)
are available in the git repository at:
git://git.infradead.org/linux-mvebu.git tags/mvebu-fixes-3.16-3
for you to fetch changes up to a728b977429383b3fe92b6e3bff9e69365609e0f:
ARM: mvebu: Fix coherency bus notifiers by using separate notifiers (2014-07-08 13:53:53 +0000)
----------------------------------------------------------------
mvebu fixes for v3.16 (round 3)
- Fix SMP boot on 38x/375 in big endian
- Fix operand list for pmsu on 370/XP
- Fix coherency bus notifiers
----------------------------------------------------------------
Ezequiel Garcia (1):
ARM: mvebu: Fix coherency bus notifiers by using separate notifiers
Gregory CLEMENT (1):
ARM: mvebu: Fix the operand list in the inline asm of armada_370_xp_pmsu_idle_enter
Thomas Petazzoni (1):
ARM: mvebu: fix SMP boot for Armada 38x and Armada 375 Z1 in big endian
arch/arm/mach-mvebu/coherency.c | 6 +++++-
arch/arm/mach-mvebu/headsmp-a9.S | 9 ++++++++-
arch/arm/mach-mvebu/pmsu.c | 10 +++++-----
3 files changed, 18 insertions(+), 7 deletions(-)
^ permalink raw reply
* [PATCH 2/4] ARM: add IPI tracepoints
From: Steven Rostedt @ 2014-07-18 21:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.LFD.2.11.1407181652080.3647@knanqh.ubzr>
On Fri, 18 Jul 2014 16:55:42 -0400 (EDT)
Nicolas Pitre <nicolas.pitre@linaro.org> wrote:
>
> Here's the patch I have at the head of the series now, with the above
> ugliness changed to an unconditional __tracepoint_string attribute.
>
I was thinking of something like this. Feel free to add this to your
series.
-- Steve
From: Steven Rostedt <rostedt@goodmis.org>
Subject: [PATCH] tracing: Do not do anything special with tracepoint_string when tracing is disabled
When CONFIG_TRACING is not enabled, there's no reason to save the trace
strings either by the linker or as a static variable that can be
referenced later. Simply pass back the string that is given to
tracepoint_string().
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
---
diff --git a/include/linux/ftrace_event.h b/include/linux/ftrace_event.h
index cff3106..b296363 100644
--- a/include/linux/ftrace_event.h
+++ b/include/linux/ftrace_event.h
@@ -574,6 +574,7 @@ do { \
__trace_printk(ip, fmt, ##args); \
} while (0)
+#ifdef CONFIG_TRACING
/**
* tracepoint_string - register constant persistent string to trace system
* @str - a constant persistent string that will be referenced in tracepoints
@@ -607,6 +608,15 @@ do { \
___tp_str; \
})
#define __tracepoint_string __attribute__((section("__tracepoint_str")))
+#else
+/*
+ * tracepoint_string() is used to save the string address for userspace
+ * tracing tools. When tracing isn't configured, there's no need to save
+ * anything.
+ */
+# define tracepoint_string(str) str
+# define __tracepoint_string
+#endif
#ifdef CONFIG_PERF_EVENTS
struct perf_event;
^ permalink raw reply related
* [PATCH v2 7/7] x86_64, entry: Use split-phase syscall_trace_enter for 64-bit syscalls
From: Andy Lutomirski @ 2014-07-18 21:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1405717901.git.luto@amacapital.net>
On KVM on my box, this reduces the overhead from an always-accept
seccomp filter from ~130ns to ~17ns. Most of that comes from
avoiding IRET on every syscall when seccomp is enabled.
In extremely approximate hacked-up benchmarking, just bypassing IRET
saves about 80ns, so there's another 43ns of savings here from
simplifying the seccomp path.
The diffstat is also rather nice :)
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
---
arch/x86/kernel/entry_64.S | 38 +++++++++++++++-----------------------
1 file changed, 15 insertions(+), 23 deletions(-)
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 1eb3094..13e0c1d 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -479,22 +479,6 @@ sysret_signal:
#ifdef CONFIG_AUDITSYSCALL
/*
- * Fast path for syscall audit without full syscall trace.
- * We just call __audit_syscall_entry() directly, and then
- * jump back to the normal fast path.
- */
-auditsys:
- movq %r10,%r9 /* 6th arg: 4th syscall arg */
- movq %rdx,%r8 /* 5th arg: 3rd syscall arg */
- movq %rsi,%rcx /* 4th arg: 2nd syscall arg */
- movq %rdi,%rdx /* 3rd arg: 1st syscall arg */
- movq %rax,%rsi /* 2nd arg: syscall number */
- movl $AUDIT_ARCH_X86_64,%edi /* 1st arg: audit arch */
- call __audit_syscall_entry
- LOAD_ARGS 0 /* reload call-clobbered registers */
- jmp system_call_fastpath
-
- /*
* Return fast path for syscall audit. Call __audit_syscall_exit()
* directly and then jump back to the fast path with TIF_SYSCALL_AUDIT
* masked off.
@@ -511,17 +495,25 @@ sysret_audit:
/* Do syscall tracing */
tracesys:
-#ifdef CONFIG_AUDITSYSCALL
- testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
- jz auditsys
-#endif
+ leaq -REST_SKIP(%rsp), %rdi
+ movq $AUDIT_ARCH_X86_64, %rsi
+ call syscall_trace_enter_phase1
+ test %rax, %rax
+ jnz tracesys_phase2 /* if needed, run the slow path */
+ LOAD_ARGS 0 /* else restore clobbered regs */
+ jmp system_call_fastpath /* and return to the fast path */
+
+tracesys_phase2:
SAVE_REST
FIXUP_TOP_OF_STACK %rdi
- movq %rsp,%rdi
- call syscall_trace_enter
+ movq %rsp, %rdi
+ movq $AUDIT_ARCH_X86_64, %rsi
+ movq %rax,%rdx
+ call syscall_trace_enter_phase2
+
/*
* Reload arg registers from stack in case ptrace changed them.
- * We don't reload %rax because syscall_trace_enter() returned
+ * We don't reload %rax because syscall_trace_entry_phase2() returned
* the value it wants us to use in the table lookup.
*/
LOAD_ARGS ARGOFFSET, 1
--
1.9.3
^ permalink raw reply related
* [PATCH v2 6/7] x86_64, entry: Treat regs->ax the same in fastpath and slowpath syscalls
From: Andy Lutomirski @ 2014-07-18 21:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1405717901.git.luto@amacapital.net>
For slowpath syscalls, we initialize regs->ax to -ENOSYS and stick
the syscall number into regs->orig_ax prior to any possible tracing
and syscall execution. This is user-visible ABI used by ptrace
syscall emulation and seccomp.
For fastpath syscalls, there's no good reason not to do the same
thing. It's even slightly simpler than what we're currently doing.
It probably has no measureable performance impact. It should have
no user-visible effect.
The purpose of this patch is to prepare for two-phase syscall
tracing, in which the first phase might modify the saved RAX without
leaving the fast path. This change is just subtle enough that I'm
keeping it separate.
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
---
arch/x86/include/asm/calling.h | 6 +++++-
arch/x86/kernel/entry_64.S | 13 ++++---------
2 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/arch/x86/include/asm/calling.h b/arch/x86/include/asm/calling.h
index cb4c73b..76659b6 100644
--- a/arch/x86/include/asm/calling.h
+++ b/arch/x86/include/asm/calling.h
@@ -85,7 +85,7 @@ For 32-bit we have the following conventions - kernel is built with
#define ARGOFFSET R11
#define SWFRAME ORIG_RAX
- .macro SAVE_ARGS addskip=0, save_rcx=1, save_r891011=1
+ .macro SAVE_ARGS addskip=0, save_rcx=1, save_r891011=1, rax_enosys=0
subq $9*8+\addskip, %rsp
CFI_ADJUST_CFA_OFFSET 9*8+\addskip
movq_cfi rdi, 8*8
@@ -96,7 +96,11 @@ For 32-bit we have the following conventions - kernel is built with
movq_cfi rcx, 5*8
.endif
+ .if \rax_enosys
+ movq $-ENOSYS, 4*8(%rsp)
+ .else
movq_cfi rax, 4*8
+ .endif
.if \save_r891011
movq_cfi r8, 3*8
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index b25ca96..1eb3094 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -405,8 +405,8 @@ GLOBAL(system_call_after_swapgs)
* and short:
*/
ENABLE_INTERRUPTS(CLBR_NONE)
- SAVE_ARGS 8,0
- movq %rax,ORIG_RAX-ARGOFFSET(%rsp)
+ SAVE_ARGS 8, 0, rax_enosys=1
+ movq_cfi rax,(ORIG_RAX-ARGOFFSET)
movq %rcx,RIP-ARGOFFSET(%rsp)
CFI_REL_OFFSET rip,RIP-ARGOFFSET
testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
@@ -418,7 +418,7 @@ system_call_fastpath:
andl $__SYSCALL_MASK,%eax
cmpl $__NR_syscall_max,%eax
#endif
- ja badsys
+ ja ret_from_sys_call /* and return regs->ax */
movq %r10,%rcx
call *sys_call_table(,%rax,8) # XXX: rip relative
movq %rax,RAX-ARGOFFSET(%rsp)
@@ -477,10 +477,6 @@ sysret_signal:
FIXUP_TOP_OF_STACK %r11, -ARGOFFSET
jmp int_check_syscall_exit_work
-badsys:
- movq $-ENOSYS,RAX-ARGOFFSET(%rsp)
- jmp ret_from_sys_call
-
#ifdef CONFIG_AUDITSYSCALL
/*
* Fast path for syscall audit without full syscall trace.
@@ -520,7 +516,6 @@ tracesys:
jz auditsys
#endif
SAVE_REST
- movq $-ENOSYS,RAX(%rsp) /* ptrace can change this for a bad syscall */
FIXUP_TOP_OF_STACK %rdi
movq %rsp,%rdi
call syscall_trace_enter
@@ -537,7 +532,7 @@ tracesys:
andl $__SYSCALL_MASK,%eax
cmpl $__NR_syscall_max,%eax
#endif
- ja int_ret_from_sys_call /* RAX(%rsp) set to -ENOSYS above */
+ ja int_ret_from_sys_call /* RAX(%rsp) is already set */
movq %r10,%rcx /* fixup for C */
call *sys_call_table(,%rax,8)
movq %rax,RAX-ARGOFFSET(%rsp)
--
1.9.3
^ permalink raw reply related
* [PATCH v2 5/7] x86: Split syscall_trace_enter into two phases
From: Andy Lutomirski @ 2014-07-18 21:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1405717901.git.luto@amacapital.net>
This splits syscall_trace_enter into syscall_trace_enter_phase1 and
syscall_trace_enter_phase2. Only phase 2 has full pt_regs, and only
phase 2 is permitted to modify any of pt_regs except for orig_ax.
The intent is that phase 1 can be called from the syscall fast path.
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
---
arch/x86/include/asm/ptrace.h | 5 ++
arch/x86/kernel/ptrace.c | 139 ++++++++++++++++++++++++++++++++++++------
2 files changed, 125 insertions(+), 19 deletions(-)
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index 6205f0c..86fc2bb 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -75,6 +75,11 @@ convert_ip_to_linear(struct task_struct *child, struct pt_regs *regs);
extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
int error_code, int si_code);
+
+extern unsigned long syscall_trace_enter_phase1(struct pt_regs *, u32 arch);
+extern long syscall_trace_enter_phase2(struct pt_regs *, u32 arch,
+ unsigned long phase1_result);
+
extern long syscall_trace_enter(struct pt_regs *);
extern void syscall_trace_leave(struct pt_regs *);
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 39296d2..dc8c251 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -1441,13 +1441,111 @@ void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
force_sig_info(SIGTRAP, &info, tsk);
}
+static void do_audit_syscall_entry(struct pt_regs *regs, u32 arch)
+{
+ if (arch == AUDIT_ARCH_X86_64) {
+ audit_syscall_entry(arch, regs->orig_ax, regs->di,
+ regs->si, regs->dx, regs->r10);
+ } else {
+ audit_syscall_entry(arch, regs->orig_ax, regs->bx,
+ regs->cx, regs->dx, regs->si);
+ }
+}
+
/*
- * We must return the syscall number to actually look up in the table.
- * This can be -1L to skip running any syscall at all.
+ * We can return 0 to resume the syscall or anything else to go to phase
+ * 2. If we resume the syscall, we need to put something appropriate in
+ * regs->orig_ax.
+ *
+ * NB: We don't have full pt_regs here, but regs->orig_ax and regs->ax
+ * are fully functional.
+ *
+ * For phase 2's benefit, our return value is:
+ * 0: resume the syscall
+ * 1: go to phase 2; no seccomp phase 2 needed
+ * 2: go to phase 2; pass return value to seccomp
*/
-long syscall_trace_enter(struct pt_regs *regs)
+unsigned long syscall_trace_enter_phase1(struct pt_regs *regs, u32 arch)
+{
+ unsigned long ret = 0;
+ u32 work;
+
+ BUG_ON(regs != task_pt_regs(current));
+
+ work = ACCESS_ONCE(current_thread_info()->flags) &
+ _TIF_WORK_SYSCALL_ENTRY;
+
+#ifdef CONFIG_SECCOMP
+ /*
+ * Do seccomp first -- it should minimize exposure of other
+ * code, and keeping seccomp fast is probably more valuable
+ * than the rest of this.
+ */
+ if (work & _TIF_SECCOMP) {
+ struct seccomp_data sd;
+
+ sd.arch = arch;
+ sd.nr = regs->orig_ax;
+ sd.instruction_pointer = regs->ip;
+ if (arch == AUDIT_ARCH_X86_64) {
+ sd.args[0] = regs->di;
+ sd.args[1] = regs->si;
+ sd.args[2] = regs->dx;
+ sd.args[3] = regs->r10;
+ sd.args[4] = regs->r8;
+ sd.args[5] = regs->r9;
+ } else {
+ sd.args[0] = regs->bx;
+ sd.args[1] = regs->cx;
+ sd.args[2] = regs->dx;
+ sd.args[3] = regs->si;
+ sd.args[4] = regs->di;
+ sd.args[5] = regs->bp;
+ }
+
+ BUILD_BUG_ON(SECCOMP_PHASE1_OK != 0);
+ BUILD_BUG_ON(SECCOMP_PHASE1_SKIP != 1);
+
+ ret = seccomp_phase1(&sd);
+ if (ret == SECCOMP_PHASE1_SKIP) {
+ regs->orig_ax = -1;
+ ret = 0;
+ } else if (ret != SECCOMP_PHASE1_OK) {
+ return ret; /* Go directly to phase 2 */
+ }
+
+ work &= ~_TIF_SECCOMP;
+ }
+#endif
+
+ /* Do our best to finish without phase 2. */
+ if (work == 0)
+ return ret; /* seccomp only (ret == 0 here) */
+
+#ifdef CONFIG_AUDITSYSCALL
+ if (work == _TIF_SYSCALL_AUDIT) {
+ /*
+ * If there is no more work to be done except auditing,
+ * then audit in phase 1. Phase 2 always audits, so, if
+ * we audit here, then we can't go on to phase 2.
+ */
+ do_audit_syscall_entry(regs, arch);
+ return 0;
+ }
+#endif
+
+ return 1; /* Something is enabled that we can't handle in phase 1 */
+}
+
+/* Returns the syscall nr to run (which should match regs->orig_ax). */
+long syscall_trace_enter_phase2(struct pt_regs *regs, u32 arch,
+ unsigned long phase1_result)
{
long ret = 0;
+ u32 work = ACCESS_ONCE(current_thread_info()->flags) &
+ _TIF_WORK_SYSCALL_ENTRY;
+
+ BUG_ON(regs != task_pt_regs(current));
user_exit();
@@ -1458,17 +1556,20 @@ long syscall_trace_enter(struct pt_regs *regs)
* do_debug() and we need to set it again to restore the user
* state. If we entered on the slow path, TF was already set.
*/
- if (test_thread_flag(TIF_SINGLESTEP))
+ if (work & _TIF_SINGLESTEP)
regs->flags |= X86_EFLAGS_TF;
- /* do the secure computing check first */
- if (secure_computing()) {
+ /*
+ * Call seccomp_phase2 before running the other hooks so that
+ * they can see any changes made by a seccomp tracer.
+ */
+ if (phase1_result > 1 && seccomp_phase2(phase1_result)) {
/* seccomp failures shouldn't expose any additional code. */
ret = -1L;
goto out;
}
- if (unlikely(test_thread_flag(TIF_SYSCALL_EMU)))
+ if (unlikely(work & _TIF_SYSCALL_EMU))
ret = -1L;
if ((ret || test_thread_flag(TIF_SYSCALL_TRACE)) &&
@@ -1478,23 +1579,23 @@ long syscall_trace_enter(struct pt_regs *regs)
if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
trace_sys_enter(regs, regs->orig_ax);
- if (is_ia32_task())
- audit_syscall_entry(AUDIT_ARCH_I386,
- regs->orig_ax,
- regs->bx, regs->cx,
- regs->dx, regs->si);
-#ifdef CONFIG_X86_64
- else
- audit_syscall_entry(AUDIT_ARCH_X86_64,
- regs->orig_ax,
- regs->di, regs->si,
- regs->dx, regs->r10);
-#endif
+ do_audit_syscall_entry(regs, arch);
out:
return ret ?: regs->orig_ax;
}
+long syscall_trace_enter(struct pt_regs *regs)
+{
+ u32 arch = is_ia32_task() ? AUDIT_ARCH_I386 : AUDIT_ARCH_X86_64;
+ unsigned long phase1_result = syscall_trace_enter_phase1(regs, arch);
+
+ if (phase1_result == 0)
+ return regs->orig_ax;
+ else
+ return syscall_trace_enter_phase2(regs, arch, phase1_result);
+}
+
void syscall_trace_leave(struct pt_regs *regs)
{
bool step;
--
1.9.3
^ permalink raw reply related
* [PATCH v2 4/7] x86,x32,audit: Fix x32's AUDIT_ARCH wrt audit
From: Andy Lutomirski @ 2014-07-18 21:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1405717901.git.luto@amacapital.net>
is_compat_task() is the wrong check for audit arch; the check should
be is_ia32_task(): x32 syscalls should be AUDIT_ARCH_X86_64, not
AUDIT_ARCH_I386.
CONFIG_AUDITSYSCALL is currently incompatible with x32, so this has
no visible effect.
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
---
arch/x86/kernel/ptrace.c | 11 +----------
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 93c182a..39296d2 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -1441,15 +1441,6 @@ void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
force_sig_info(SIGTRAP, &info, tsk);
}
-
-#ifdef CONFIG_X86_32
-# define IS_IA32 1
-#elif defined CONFIG_IA32_EMULATION
-# define IS_IA32 is_compat_task()
-#else
-# define IS_IA32 0
-#endif
-
/*
* We must return the syscall number to actually look up in the table.
* This can be -1L to skip running any syscall at all.
@@ -1487,7 +1478,7 @@ long syscall_trace_enter(struct pt_regs *regs)
if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
trace_sys_enter(regs, regs->orig_ax);
- if (IS_IA32)
+ if (is_ia32_task())
audit_syscall_entry(AUDIT_ARCH_I386,
regs->orig_ax,
regs->bx, regs->cx,
--
1.9.3
^ permalink raw reply related
* [PATCH v2 3/7] seccomp: Allow arch code to provide seccomp_data
From: Andy Lutomirski @ 2014-07-18 21:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1405717901.git.luto@amacapital.net>
populate_seccomp_data is expensive: it works by inspecting
task_pt_regs and various other bits to piece together all the
information, and it's does so in multiple partially redundant steps.
Arch-specific code in the syscall entry path can do much better.
Admittedly this adds a bit of additional room for error, but the
speedup should be worth it.
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
---
include/linux/seccomp.h | 2 +-
kernel/seccomp.c | 32 +++++++++++++++++++-------------
2 files changed, 20 insertions(+), 14 deletions(-)
diff --git a/include/linux/seccomp.h b/include/linux/seccomp.h
index 3885108..a19ddac 100644
--- a/include/linux/seccomp.h
+++ b/include/linux/seccomp.h
@@ -39,7 +39,7 @@ static inline int secure_computing(void)
#define SECCOMP_PHASE1_OK 0
#define SECCOMP_PHASE1_SKIP 1
-extern u32 seccomp_phase1(void);
+extern u32 seccomp_phase1(struct seccomp_data *sd);
int seccomp_phase2(u32 phase1_result);
#else
extern void secure_computing_strict(int this_syscall);
diff --git a/kernel/seccomp.c b/kernel/seccomp.c
index 0088d29..80115b0 100644
--- a/kernel/seccomp.c
+++ b/kernel/seccomp.c
@@ -173,10 +173,10 @@ static int seccomp_check_filter(struct sock_filter *filter, unsigned int flen)
*
* Returns valid seccomp BPF response codes.
*/
-static u32 seccomp_run_filters(void)
+static u32 seccomp_run_filters(struct seccomp_data *sd)
{
struct seccomp_filter *f = ACCESS_ONCE(current->seccomp.filter);
- struct seccomp_data sd;
+ struct seccomp_data sd_local;
u32 ret = SECCOMP_RET_ALLOW;
/* Ensure unexpected behavior doesn't result in failing open. */
@@ -186,14 +186,17 @@ static u32 seccomp_run_filters(void)
/* Make sure cross-thread synced filter points somewhere sane. */
smp_read_barrier_depends();
- populate_seccomp_data(&sd);
+ if (!sd) {
+ populate_seccomp_data(&sd_local);
+ sd = &sd_local;
+ }
/*
* All filters in the list are evaluated and the lowest BPF return
* value always takes priority (ignoring the DATA).
*/
for (; f; f = f->prev) {
- u32 cur_ret = SK_RUN_FILTER(f->prog, (void *)&sd);
+ u32 cur_ret = SK_RUN_FILTER(f->prog, (void *)sd);
if ((cur_ret & SECCOMP_RET_ACTION) < (ret & SECCOMP_RET_ACTION))
ret = cur_ret;
@@ -599,7 +602,7 @@ void secure_computing_strict(int this_syscall)
#else
int __secure_computing(void)
{
- u32 phase1_result = seccomp_phase1();
+ u32 phase1_result = seccomp_phase1(NULL);
if (likely(phase1_result == SECCOMP_PHASE1_OK))
return 0;
@@ -610,7 +613,7 @@ int __secure_computing(void)
}
#ifdef CONFIG_SECCOMP_FILTER
-static u32 __seccomp_phase1_filter(int this_syscall, struct pt_regs *regs)
+static u32 __seccomp_phase1_filter(int this_syscall, struct seccomp_data *sd)
{
u32 filter_ret, action;
int data;
@@ -621,20 +624,20 @@ static u32 __seccomp_phase1_filter(int this_syscall, struct pt_regs *regs)
*/
rmb();
- filter_ret = seccomp_run_filters();
+ filter_ret = seccomp_run_filters(sd);
data = filter_ret & SECCOMP_RET_DATA;
action = filter_ret & SECCOMP_RET_ACTION;
switch (action) {
case SECCOMP_RET_ERRNO:
/* Set the low-order 16-bits as a errno. */
- syscall_set_return_value(current, regs,
+ syscall_set_return_value(current, task_pt_regs(current),
-data, 0);
goto skip;
case SECCOMP_RET_TRAP:
/* Show the handler the original registers. */
- syscall_rollback(current, regs);
+ syscall_rollback(current, task_pt_regs(current));
/* Let the filter pass back 16 bits of data. */
seccomp_send_sigsys(this_syscall, data);
goto skip;
@@ -661,11 +664,14 @@ skip:
/**
* seccomp_phase1() - run fast path seccomp checks on the current syscall
+ * @arg sd: The seccomp_data or NULL
*
* This only reads pt_regs via the syscall_xyz helpers. The only change
* it will make to pt_regs is via syscall_set_return_value, and it will
* only do that if it returns SECCOMP_PHASE1_SKIP.
*
+ * If sd is provided, it will not read pt_regs@all.
+ *
* It may also call do_exit or force a signal; these actions must be
* safe.
*
@@ -679,11 +685,11 @@ skip:
* If it returns anything else, then the return value should be passed
* to seccomp_phase2 from a context in which ptrace hooks are safe.
*/
-u32 seccomp_phase1(void)
+u32 seccomp_phase1(struct seccomp_data *sd)
{
int mode = current->seccomp.mode;
- struct pt_regs *regs = task_pt_regs(current);
- int this_syscall = syscall_get_nr(current, regs);
+ int this_syscall = sd ? sd->nr :
+ syscall_get_nr(current, task_pt_regs(current));
switch (mode) {
case SECCOMP_MODE_STRICT:
@@ -691,7 +697,7 @@ u32 seccomp_phase1(void)
return SECCOMP_PHASE1_OK;
#ifdef CONFIG_SECCOMP_FILTER
case SECCOMP_MODE_FILTER:
- return __seccomp_phase1_filter(this_syscall, regs);
+ return __seccomp_phase1_filter(this_syscall, sd);
#endif
default:
BUG();
--
1.9.3
^ permalink raw reply related
* [PATCH v2 2/7] seccomp: Refactor the filter callback and the API
From: Andy Lutomirski @ 2014-07-18 21:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1405717901.git.luto@amacapital.net>
The reason I did this is to add a seccomp API that will be usable
for an x86 fast path. The x86 entry code needs to use a rather
expensive slow path for a syscall that might be visible to things
like ptrace. By splitting seccomp into two phases, we can check
whether we need the slow path and then use the fast path in if the
filter allows the syscall or just returns some errno.
As a side effect, I think the new code is much easier to understand
than the old code.
This has one user-visible effect: the audit record written for
SECCOMP_RET_TRACE is now a simple indication that SECCOMP_RET_TRACE
happened. It used to depend in a complicated way on what the tracer
did. I couldn't make much sense of it.
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
---
include/linux/seccomp.h | 6 ++
kernel/seccomp.c | 190 +++++++++++++++++++++++++++++++-----------------
2 files changed, 130 insertions(+), 66 deletions(-)
diff --git a/include/linux/seccomp.h b/include/linux/seccomp.h
index aa3c040..3885108 100644
--- a/include/linux/seccomp.h
+++ b/include/linux/seccomp.h
@@ -35,6 +35,12 @@ static inline int secure_computing(void)
return __secure_computing();
return 0;
}
+
+#define SECCOMP_PHASE1_OK 0
+#define SECCOMP_PHASE1_SKIP 1
+
+extern u32 seccomp_phase1(void);
+int seccomp_phase2(u32 phase1_result);
#else
extern void secure_computing_strict(int this_syscall);
#endif
diff --git a/kernel/seccomp.c b/kernel/seccomp.c
index 861d7ee..0088d29 100644
--- a/kernel/seccomp.c
+++ b/kernel/seccomp.c
@@ -21,8 +21,6 @@
#include <linux/slab.h>
#include <linux/syscalls.h>
-/* #define SECCOMP_DEBUG 1 */
-
#ifdef CONFIG_HAVE_ARCH_SECCOMP_FILTER
#include <asm/syscall.h>
#endif
@@ -601,10 +599,21 @@ void secure_computing_strict(int this_syscall)
#else
int __secure_computing(void)
{
- struct pt_regs *regs = task_pt_regs(current);
- int this_syscall = syscall_get_nr(current, regs);
- int exit_sig = 0;
- u32 ret;
+ u32 phase1_result = seccomp_phase1();
+
+ if (likely(phase1_result == SECCOMP_PHASE1_OK))
+ return 0;
+ else if (likely(phase1_result == SECCOMP_PHASE1_SKIP))
+ return -1;
+ else
+ return seccomp_phase2(phase1_result);
+}
+
+#ifdef CONFIG_SECCOMP_FILTER
+static u32 __seccomp_phase1_filter(int this_syscall, struct pt_regs *regs)
+{
+ u32 filter_ret, action;
+ int data;
/*
* Make sure that any changes to mode from another thread have
@@ -612,73 +621,122 @@ int __secure_computing(void)
*/
rmb();
- switch (current->seccomp.mode) {
+ filter_ret = seccomp_run_filters();
+ data = filter_ret & SECCOMP_RET_DATA;
+ action = filter_ret & SECCOMP_RET_ACTION;
+
+ switch (action) {
+ case SECCOMP_RET_ERRNO:
+ /* Set the low-order 16-bits as a errno. */
+ syscall_set_return_value(current, regs,
+ -data, 0);
+ goto skip;
+
+ case SECCOMP_RET_TRAP:
+ /* Show the handler the original registers. */
+ syscall_rollback(current, regs);
+ /* Let the filter pass back 16 bits of data. */
+ seccomp_send_sigsys(this_syscall, data);
+ goto skip;
+
+ case SECCOMP_RET_TRACE:
+ return filter_ret; /* Save the rest for phase 2. */
+
+ case SECCOMP_RET_ALLOW:
+ return SECCOMP_PHASE1_OK;
+
+ case SECCOMP_RET_KILL:
+ default:
+ audit_seccomp(this_syscall, SIGSYS, action);
+ do_exit(SIGSYS);
+ }
+
+ unreachable();
+
+skip:
+ audit_seccomp(this_syscall, 0, action);
+ return SECCOMP_PHASE1_SKIP;
+}
+#endif
+
+/**
+ * seccomp_phase1() - run fast path seccomp checks on the current syscall
+ *
+ * This only reads pt_regs via the syscall_xyz helpers. The only change
+ * it will make to pt_regs is via syscall_set_return_value, and it will
+ * only do that if it returns SECCOMP_PHASE1_SKIP.
+ *
+ * It may also call do_exit or force a signal; these actions must be
+ * safe.
+ *
+ * If it returns SECCOMP_PHASE1_OK, the syscall passes checks and should
+ * be processed normally.
+ *
+ * If it returns SECCOMP_PHASE1_SKIP, then the syscall should not be
+ * invoked. In this case, seccomp_phase1 will have set the return value
+ * using syscall_set_return_value.
+ *
+ * If it returns anything else, then the return value should be passed
+ * to seccomp_phase2 from a context in which ptrace hooks are safe.
+ */
+u32 seccomp_phase1(void)
+{
+ int mode = current->seccomp.mode;
+ struct pt_regs *regs = task_pt_regs(current);
+ int this_syscall = syscall_get_nr(current, regs);
+
+ switch (mode) {
case SECCOMP_MODE_STRICT:
- __secure_computing_strict(this_syscall);
- return 0;
+ __secure_computing_strict(this_syscall); /* may call do_exit */
+ return SECCOMP_PHASE1_OK;
#ifdef CONFIG_SECCOMP_FILTER
- case SECCOMP_MODE_FILTER: {
- int data;
- ret = seccomp_run_filters();
- data = ret & SECCOMP_RET_DATA;
- ret &= SECCOMP_RET_ACTION;
- switch (ret) {
- case SECCOMP_RET_ERRNO:
- /* Set the low-order 16-bits as a errno. */
- syscall_set_return_value(current, regs,
- -data, 0);
- goto skip;
- case SECCOMP_RET_TRAP:
- /* Show the handler the original registers. */
- syscall_rollback(current, regs);
- /* Let the filter pass back 16 bits of data. */
- seccomp_send_sigsys(this_syscall, data);
- goto skip;
- case SECCOMP_RET_TRACE:
- /* Skip these calls if there is no tracer. */
- if (!ptrace_event_enabled(current, PTRACE_EVENT_SECCOMP)) {
- syscall_set_return_value(current, regs,
- -ENOSYS, 0);
- goto skip;
- }
- /* Allow the BPF to provide the event message */
- ptrace_event(PTRACE_EVENT_SECCOMP, data);
- /*
- * The delivery of a fatal signal during event
- * notification may silently skip tracer notification.
- * Terminating the task now avoids executing a system
- * call that may not be intended.
- */
- if (fatal_signal_pending(current))
- break;
- if (syscall_get_nr(current, regs) < 0)
- goto skip; /* Explicit request to skip. */
-
- return 0;
- case SECCOMP_RET_ALLOW:
- return 0;
- case SECCOMP_RET_KILL:
- default:
- break;
- }
- exit_sig = SIGSYS;
- break;
- }
+ case SECCOMP_MODE_FILTER:
+ return __seccomp_phase1_filter(this_syscall, regs);
#endif
default:
BUG();
}
+}
-#ifdef SECCOMP_DEBUG
- dump_stack();
-#endif
- audit_seccomp(this_syscall, exit_sig, ret);
- do_exit(exit_sig);
-#ifdef CONFIG_SECCOMP_FILTER
-skip:
- audit_seccomp(this_syscall, exit_sig, ret);
- return -1;
-#endif
+/**
+ * seccomp_phase2() - finish slow path seccomp work for the current syscall
+ * @phase1_result: The return value from seccomp_phase1()
+ *
+ * This must be called from a context in which ptrace hooks can be used.
+ *
+ * Returns 0 if the syscall should be processed or -1 to skip the syscall.
+ */
+int seccomp_phase2(u32 phase1_result)
+{
+ struct pt_regs *regs = task_pt_regs(current);
+ u32 action = phase1_result & SECCOMP_RET_ACTION;
+ int data = phase1_result & SECCOMP_RET_DATA;
+
+ BUG_ON(action != SECCOMP_RET_TRACE);
+
+ audit_seccomp(syscall_get_nr(current, regs), 0, action);
+
+ /* Skip these calls if there is no tracer. */
+ if (!ptrace_event_enabled(current, PTRACE_EVENT_SECCOMP)) {
+ syscall_set_return_value(current, regs,
+ -ENOSYS, 0);
+ return -1;
+ }
+
+ /* Allow the BPF to provide the event message */
+ ptrace_event(PTRACE_EVENT_SECCOMP, data);
+ /*
+ * The delivery of a fatal signal during event
+ * notification may silently skip tracer notification.
+ * Terminating the task now avoids executing a system
+ * call that may not be intended.
+ */
+ if (fatal_signal_pending(current))
+ do_exit(SIGSYS);
+ if (syscall_get_nr(current, regs) < 0)
+ return -1; /* Explicit request to skip. */
+
+ return 0;
}
#endif /* CONFIG_HAVE_ARCH_SECCOMP_FILTER */
--
1.9.3
^ permalink raw reply related
* [PATCH v2 1/7] seccomp, x86, arm, mips, s390: Remove nr parameter from secure_computing
From: Andy Lutomirski @ 2014-07-18 21:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1405717901.git.luto@amacapital.net>
The secure_computing function took a syscall number parameter, but
it only paid any attention to that parameter if seccomp mode 1 was
enabled. Rather than coming up with a kludge to get the parameter
to work in mode 2, just remove the parameter.
To avoid churn in arches that don't have seccomp filters (and may
not even support syscall_get_nr right now), this leaves the
parameter in secure_computing_strict, which is now a real function.
For ARM, this is a bit ugly due to the fact that ARM conditionally
supports seccomp filters. Fixing that would probably only be a
couple of lines of code, but it should be coordinated with the audit
maintainers.
This will be a slight slowdown on some arches. The right fix is to
pass in all of seccomp_data instead of trying to make just the
syscall nr part be fast.
This is a prerequisite for making two-phase seccomp work cleanly.
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel at lists.infradead.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips at linux-mips.org
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: linux-s390 at vger.kernel.org
Cc: x86 at kernel.org
Cc: Kees Cook <keescook@chromium.org>
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
---
arch/arm/kernel/ptrace.c | 7 ++++-
arch/mips/kernel/ptrace.c | 2 +-
arch/s390/kernel/ptrace.c | 2 +-
arch/x86/kernel/ptrace.c | 2 +-
arch/x86/kernel/vsyscall_64.c | 2 +-
include/linux/seccomp.h | 21 +++++++-------
kernel/seccomp.c | 64 ++++++++++++++++++++++++++++++-------------
7 files changed, 66 insertions(+), 34 deletions(-)
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 0c27ed6..5e772a2 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -933,8 +933,13 @@ asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno)
current_thread_info()->syscall = scno;
/* Do the secure computing check first; failures should be fast. */
- if (secure_computing(scno) == -1)
+#ifdef CONFIG_HAVE_ARCH_SECCOMP_FILTER
+ if (secure_computing() == -1)
return -1;
+#else
+ /* XXX: remove this once OABI gets fixed */
+ secure_computing_strict(scno);
+#endif
if (test_thread_flag(TIF_SYSCALL_TRACE))
tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index f639ccd..808bafc 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -639,7 +639,7 @@ asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
long ret = 0;
user_exit();
- if (secure_computing(syscall) == -1)
+ if (secure_computing() == -1)
return -1;
if (test_thread_flag(TIF_SYSCALL_TRACE) &&
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index 2d716734..7ab8b91 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -795,7 +795,7 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
long ret = 0;
/* Do the secure computing check first. */
- if (secure_computing(regs->gprs[2])) {
+ if (secure_computing()) {
/* seccomp failures shouldn't expose any additional code. */
ret = -1;
goto out;
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 678c0ad..93c182a 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -1471,7 +1471,7 @@ long syscall_trace_enter(struct pt_regs *regs)
regs->flags |= X86_EFLAGS_TF;
/* do the secure computing check first */
- if (secure_computing(regs->orig_ax)) {
+ if (secure_computing()) {
/* seccomp failures shouldn't expose any additional code. */
ret = -1L;
goto out;
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index ea5b570..23c0c23 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -216,7 +216,7 @@ bool emulate_vsyscall(struct pt_regs *regs, unsigned long address)
*/
regs->orig_ax = syscall_nr;
regs->ax = -ENOSYS;
- tmp = secure_computing(syscall_nr);
+ tmp = secure_computing();
if ((!tmp && regs->orig_ax != syscall_nr) || regs->ip != address) {
warn_bad_vsyscall(KERN_DEBUG, regs,
"seccomp tried to change syscall nr or ip");
diff --git a/include/linux/seccomp.h b/include/linux/seccomp.h
index 5d586a4..aa3c040 100644
--- a/include/linux/seccomp.h
+++ b/include/linux/seccomp.h
@@ -27,19 +27,17 @@ struct seccomp {
struct seccomp_filter *filter;
};
-extern int __secure_computing(int);
-static inline int secure_computing(int this_syscall)
+#ifdef CONFIG_HAVE_ARCH_SECCOMP_FILTER
+extern int __secure_computing(void);
+static inline int secure_computing(void)
{
if (unlikely(test_thread_flag(TIF_SECCOMP)))
- return __secure_computing(this_syscall);
+ return __secure_computing();
return 0;
}
-
-/* A wrapper for architectures supporting only SECCOMP_MODE_STRICT. */
-static inline void secure_computing_strict(int this_syscall)
-{
- BUG_ON(secure_computing(this_syscall) != 0);
-}
+#else
+extern void secure_computing_strict(int this_syscall);
+#endif
extern long prctl_get_seccomp(void);
extern long prctl_set_seccomp(unsigned long, char __user *);
@@ -56,8 +54,11 @@ static inline int seccomp_mode(struct seccomp *s)
struct seccomp { };
struct seccomp_filter { };
-static inline int secure_computing(int this_syscall) { return 0; }
+#ifdef CONFIG_HAVE_ARCH_SECCOMP_FILTER
+static inline int secure_computing(void) { return 0; }
+#else
static inline void secure_computing_strict(int this_syscall) { return; }
+#endif
static inline long prctl_get_seccomp(void)
{
diff --git a/kernel/seccomp.c b/kernel/seccomp.c
index 74f4601..861d7ee 100644
--- a/kernel/seccomp.c
+++ b/kernel/seccomp.c
@@ -23,8 +23,11 @@
/* #define SECCOMP_DEBUG 1 */
-#ifdef CONFIG_SECCOMP_FILTER
+#ifdef CONFIG_HAVE_ARCH_SECCOMP_FILTER
#include <asm/syscall.h>
+#endif
+
+#ifdef CONFIG_SECCOMP_FILTER
#include <linux/filter.h>
#include <linux/pid.h>
#include <linux/ptrace.h>
@@ -172,7 +175,7 @@ static int seccomp_check_filter(struct sock_filter *filter, unsigned int flen)
*
* Returns valid seccomp BPF response codes.
*/
-static u32 seccomp_run_filters(int syscall)
+static u32 seccomp_run_filters(void)
{
struct seccomp_filter *f = ACCESS_ONCE(current->seccomp.filter);
struct seccomp_data sd;
@@ -564,10 +567,43 @@ static int mode1_syscalls_32[] = {
};
#endif
-int __secure_computing(int this_syscall)
+static void __secure_computing_strict(int this_syscall)
+{
+ int *syscall_whitelist = mode1_syscalls;
+#ifdef CONFIG_COMPAT
+ if (is_compat_task())
+ syscall_whitelist = mode1_syscalls_32;
+#endif
+ do {
+ if (*syscall_whitelist == this_syscall)
+ return;
+ } while (*++syscall_whitelist);
+
+#ifdef SECCOMP_DEBUG
+ dump_stack();
+#endif
+ audit_seccomp(this_syscall, SIGKILL, SECCOMP_RET_KILL);
+ do_exit(SIGKILL);
+}
+
+#ifndef CONFIG_HAVE_ARCH_SECCOMP_FILTER
+void secure_computing_strict(int this_syscall)
+{
+ int mode = current->seccomp.mode;
+
+ if (mode == 0)
+ return;
+ else if (mode == SECCOMP_MODE_STRICT)
+ __secure_computing_strict(this_syscall);
+ else
+ BUG();
+}
+#else
+int __secure_computing(void)
{
+ struct pt_regs *regs = task_pt_regs(current);
+ int this_syscall = syscall_get_nr(current, regs);
int exit_sig = 0;
- int *syscall;
u32 ret;
/*
@@ -578,23 +614,12 @@ int __secure_computing(int this_syscall)
switch (current->seccomp.mode) {
case SECCOMP_MODE_STRICT:
- syscall = mode1_syscalls;
-#ifdef CONFIG_COMPAT
- if (is_compat_task())
- syscall = mode1_syscalls_32;
-#endif
- do {
- if (*syscall == this_syscall)
- return 0;
- } while (*++syscall);
- exit_sig = SIGKILL;
- ret = SECCOMP_RET_KILL;
- break;
+ __secure_computing_strict(this_syscall);
+ return 0;
#ifdef CONFIG_SECCOMP_FILTER
case SECCOMP_MODE_FILTER: {
int data;
- struct pt_regs *regs = task_pt_regs(current);
- ret = seccomp_run_filters(this_syscall);
+ ret = seccomp_run_filters();
data = ret & SECCOMP_RET_DATA;
ret &= SECCOMP_RET_ACTION;
switch (ret) {
@@ -652,9 +677,10 @@ int __secure_computing(int this_syscall)
#ifdef CONFIG_SECCOMP_FILTER
skip:
audit_seccomp(this_syscall, exit_sig, ret);
-#endif
return -1;
+#endif
}
+#endif /* CONFIG_HAVE_ARCH_SECCOMP_FILTER */
long prctl_get_seccomp(void)
{
--
1.9.3
^ permalink raw reply related
* [PATCH v2 0/7] Two-phase seccomp and x86 tracing changes
From: Andy Lutomirski @ 2014-07-18 21:18 UTC (permalink / raw)
To: linux-arm-kernel
This is both a cleanup and a speedup. It reduces overhead due to
installing a trivial seccomp filter by 87%. The speedup comes from
avoiding the full syscall tracing mechanism for filters that don't
return SECCOMP_RET_TRACE.
This series works by splitting the seccomp hooks into two phases.
The first phase evaluates the filter; it can skip syscalls, allow
them, kill the calling task, or pass a u32 to the second phase. The
second phase requires a full tracing context, and it sends ptrace
events if necessary.
Once this is done, I implemented a similar split for the x86 syscall
entry work. The C callback is invoked in two phases: the first has
only a partial frame, and it can request phase 2 processing with a
full frame.
Finally, I switch the 64-bit system_call code to use the new split
entry work. This is a net deletion of assembly code: it replaces
all of the audit entry muck.
In the process, I fixed some bugs.
If this is acceptable, someone can do the same tweak for the
ia32entry and entry_32 code.
This passes all seccomp tests that I know of. Now that it's properly
rebased, even the previously expected failures are gone.
Kees, if you like this version, can you create a branch with patches
1-3? I think that the rest should go into tip/x86 once everyone's happy
with it.
Changes from v1:
- Rebased on top of Kees' shiny new seccomp tree (no effect on the x86
part).
- Improved patch 6 vs patch 7 split (thanks Alexei!)
- Fixed bogus -ENOSYS in patch 5 (thanks Kees!)
- Improved changelog message in patch 6.
Changes from RFC version:
- The first three patches are more or less the same
- The rest is more or less a rewrite
Andy Lutomirski (7):
seccomp,x86,arm,mips,s390: Remove nr parameter from secure_computing
seccomp: Refactor the filter callback and the API
seccomp: Allow arch code to provide seccomp_data
x86,x32,audit: Fix x32's AUDIT_ARCH wrt audit
x86: Split syscall_trace_enter into two phases
x86_64,entry: Treat regs->ax the same in fastpath and slowpath
syscalls
x86_64,entry: Use split-phase syscall_trace_enter for 64-bit syscalls
arch/arm/kernel/ptrace.c | 7 +-
arch/mips/kernel/ptrace.c | 2 +-
arch/s390/kernel/ptrace.c | 2 +-
arch/x86/include/asm/calling.h | 6 +-
arch/x86/include/asm/ptrace.h | 5 +
arch/x86/kernel/entry_64.S | 51 ++++-----
arch/x86/kernel/ptrace.c | 146 +++++++++++++++++++-----
arch/x86/kernel/vsyscall_64.c | 2 +-
include/linux/seccomp.h | 25 ++--
kernel/seccomp.c | 252 ++++++++++++++++++++++++++++-------------
10 files changed, 344 insertions(+), 154 deletions(-)
--
1.9.3
^ permalink raw reply
* [GIT PULL] Allwinner clocks additions for 3.17
From: Maxime Ripard @ 2014-07-18 21:13 UTC (permalink / raw)
To: linux-arm-kernel
Hi Mike,
Here is the first pull request for the Allwinner clocks changes
Unless something major comes up, or we agree quickly on the MMC
changes I posted yesterday, there shouldn't be any follow up for the
3.17 relaese cycle.
Thanks!
Maxime
The following changes since commit 7171511eaec5bf23fb06078f59784a3a0626b38f:
Linux 3.16-rc1 (2014-06-15 17:45:28 -1000)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux.git tags/sunxi-clocks-for-3.17
for you to fetch changes up to 6c1d66f0da59362cb33ce37d436cd28c77c2b2cb:
clk: sunxi: sun6i-a31-apb0-gates: Add A23 APB0 support (2014-07-15 08:53:24 +0200)
----------------------------------------------------------------
Allwinner clocks additions for 3.17
This pull request adds support for the clocks found in the newly supported
Allwinner A23 clocks.
----------------------------------------------------------------
Chen-Yu Tsai (9):
clk: sunxi: register clock gates with clkdev
clk: sunxi: move "ahb_sdram" to protected clock list
clk: sunxi: Support factor clocks with N factor starting not from 0
clk: sunxi: Add support for table-based divider clocks
clk: sunxi: Add A23 clocks support
clk: sunxi: Add A23 APB0 divider clock support
clk: sunxi: Fix gate indexing for sun6i-a31-apb0-gates
clk: sunxi: sun6i-apb0-gates: use bitmaps for valid gate indices
clk: sunxi: sun6i-a31-apb0-gates: Add A23 APB0 support
Documentation/devicetree/bindings/clock/sunxi.txt | 7 ++
drivers/clk/sunxi/Makefile | 4 +-
drivers/clk/sunxi/clk-factors.c | 2 +-
drivers/clk/sunxi/clk-factors.h | 1 +
drivers/clk/sunxi/clk-sun6i-apb0-gates.c | 76 ++++++++------
drivers/clk/sunxi/clk-sun8i-apb0.c | 68 +++++++++++++
drivers/clk/sunxi/clk-sunxi.c | 119 ++++++++++++++++++++--
7 files changed, 234 insertions(+), 43 deletions(-)
create mode 100644 drivers/clk/sunxi/clk-sun8i-apb0.c
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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* [PATCH v3 1/3] asm-generic/io.h: Implement generic {read,write}s*()
From: Sam Ravnborg @ 2014-07-18 21:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140718205953.GA21964@ravnborg.org>
>
> All these things are not introduced by your patch but now that
> you show some love and care for this file maybe we could take
> the next step and bring more order to the current semi chaos?
And I just noticed...
These are never used - and only defined a few places:
#define inb_p(addr) inb(addr)
#define inw_p(addr) inw(addr)
#define inl_p(addr) inl(addr)
#define outb_p(x, addr) outb((x), (addr))
#define outw_p(x, addr) outw((x), (addr))
#define outl_p(x, addr) outl((x), (addr))
Likewise for these:
#define insb_p(port,to,len) insb(port,to,len)
#define insw_p(port,to,len) insw(port,to,len)
#define insl_p(port,to,len) insl(port,to,len)
#define outsb_p(port,from,len) outsb(port,from,len)
#define outsw_p(port,from,len) outsw(port,from,len)
#define outsl_p(port,from,len) outsl(port,from,len)
This set:
#define inb_p(addr) inb(addr)
#define inw_p(addr) inw(addr)
#define inl_p(addr) inl(addr)
#define outb_p(x, addr) outb((x), (addr))
#define outw_p(x, addr) outw((x), (addr))
#define outl_p(x, addr) outl((x), (addr))
Should have a comment that say they are deprecated.
Especially the "b" variants still have many users.
Sam
^ permalink raw reply
* [PATCH v3 1/3] asm-generic/io.h: Implement generic {read,write}s*()
From: Sam Ravnborg @ 2014-07-18 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1405508484-18303-1-git-send-email-thierry.reding@gmail.com>
On Wed, Jul 16, 2014 at 01:01:22PM +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> Currently driver writers need to use io{read,write}{8,16,32}_rep() when
> accessing FIFO registers portably. This is bad for two reasons: it is
> inconsistent with how other registers are accessed using the standard
> {read,write}{b,w,l}() functions, which can lead to confusion. On some
> architectures the io{read,write}*() functions also need to perform some
> extra checks to determine whether an address is memory-mapped or refers
> to I/O space. Drivers which can be expected to never use I/O can safely
> use the {read,write}s{b,w,l,q}(), just like they use their non-string
> variants and there's no need for these extra checks.
>
> This patch implements generic versions of readsb(), readsw(), readsl(),
> readsq(), writesb(), writesw(), writesl() and writesq(). Variants of
> these string functions for I/O accesses (ins*() and outs*() as well as
> ioread*_rep() and iowrite*_rep()) are now implemented in terms of the
> new functions.
>
> Going forward, {read,write}{,s}{b,w,l,q}() should be used consistently
> by drivers for devices that will only ever be memory-mapped and hence
> don't need to access I/O space, whereas io{read,write}{8,16,32}_rep()
> should be used by drivers for devices that can be either memory-mapped
> or I/O-mapped.
>
> While at it, also make sure that any of the functions provided as
> fallback for architectures that don't override them can't be overridden
> subsequently.
>
> This is compile- and runtime-tested on 32-bit and 64-bit ARM and compile
> tested on Microblaze, s390, SPARC and Xtensa. For ARC, Blackfin, Metag,
> OpenRISC, Score and Unicore32 which also use asm-generic/io.h I couldn't
> find or build a cross-compiler that would run on my system. But by code
> inspection they shouldn't break with this patch.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
Hi Thierry.
While browsing the resulting asm-generic/io.h it is irritating
that the functions are messed up like they are.
>From the start of the file the IO accessors are defined in following order:
__raw_readb
__raw_readw
__raw_readl
readb
readw
readl
__raw_writeb
__raw_writew
__raw_writel
writeb
writew
writel
__raw_readq
readq
__raw_writeq
writeq
See how strange it looks?
A semi related question.
Why do we play all these macro tricks in io.h?
Example:
#define writeb __raw_writeb
The consensus these days is to use static inline to have the
correct prototype but this file is contains a lot of these
macro conversions.
All these things are not introduced by your patch but now that
you show some love and care for this file maybe we could take
the next step and bring more order to the current semi chaos?
Sam
^ permalink raw reply
* [PATCH 4/4] (RFC) X86: add IPI tracepoints
From: Nicolas Pitre @ 2014-07-18 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140718162750.62cbf965@gandalf.local.home>
On Fri, 18 Jul 2014, Steven Rostedt wrote:
> On Fri, 18 Jul 2014 01:18:55 -0400
> Nicolas Pitre <nicolas.pitre@linaro.org> wrote:
>
>
> > diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
> > index be8e1bde07..e154d176cf 100644
> > --- a/arch/x86/kernel/smp.c
> > +++ b/arch/x86/kernel/smp.c
> > @@ -31,6 +31,12 @@
> > #include <asm/apic.h>
> > #include <asm/nmi.h>
> > #include <asm/trace/irq_vectors.h>
> > +
> > +#define CREATE_TRACE_POINTS
> > +#undef TRACE_INCLUDE_PATH
> > +#undef TRACE_INCLUDE_FILE
>
> I'm curious to why you added the #undefs. I wouldn't think they were
> needed.
They are needed because asm/trace/irq_vectors.h included prior that
point defines them for itself and that makes the inclusion of
trace/events/ipi.h fail.
> -- Steve
>
> > +#include <trace/events/ipi.h>
> > +
> > /*
> > * Some notes on x86 processor bugs affecting SMP operation:
> > *
>
>
^ permalink raw reply
* [PATCH 2/4] ARM: add IPI tracepoints
From: Nicolas Pitre @ 2014-07-18 20:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140718160418.54d11f6a@gandalf.local.home>
On Fri, 18 Jul 2014, Steven Rostedt wrote:
> On Fri, 18 Jul 2014 01:18:53 -0400
> Nicolas Pitre <nicolas.pitre@linaro.org> wrote:
>
>
> > -#ifdef CONFIG_IRQ_WORK
> > -void arch_irq_work_raise(void)
> > -{
> > - if (is_smp())
> > - smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
> > -}
> > +static const char *ipi_types[NR_IPI]
> > +#ifdef CONFIG_TRACING
> > +__tracepoint_string
> > #endif
>
> Oh, this is ugly. I should probably add a define when !CONFIG_TRACING
> is set. Something like:
>
> #ifdef CONFIG_TRACING
> ...
> #else
> # define __tracepoint_string
> #endif
>
> Such that users of __tracepoint_string don't need to add ugly ifdefs in
> the code.
>
> If you want to add that to ftrace_event.h to this series, I'll ack it.
Here's the patch I have at the head of the series now, with the above
ugliness changed to an unconditional __tracepoint_string attribute.
From: Nicolas Pitre <nicolas.pitre@linaro.org>
Date: Fri, 18 Jul 2014 16:34:39 -0400
Subject: [PATCH] trace: don't refer __tracepoint_string to an undefined linker section
When CONFIG_TRACING is not set, the linker script doesn't specify any
__tracepoint_str section. Let those __tracepoint_string marked strings
live in the default rodata section in that case.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
diff --git a/include/linux/ftrace_event.h b/include/linux/ftrace_event.h
index cff3106ffe..d6346607e4 100644
--- a/include/linux/ftrace_event.h
+++ b/include/linux/ftrace_event.h
@@ -606,7 +606,11 @@ do { \
static const char *___tp_str __tracepoint_string = str; \
___tp_str; \
})
+#ifdef CONFIG_TRACING
#define __tracepoint_string __attribute__((section("__tracepoint_str")))
+#else
+#define __tracepoint_string
+#endif
#ifdef CONFIG_PERF_EVENTS
struct perf_event;
^ permalink raw reply related
* [GIT PULL] Allwinner core additions for 3.17
From: Maxime Ripard @ 2014-07-18 20:55 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd, Kevin, Olof,
Here are the few mach-sunxi patches to merge for the 3.17 release cycle.
Thanks!
Maxime
The following changes since commit 7171511eaec5bf23fb06078f59784a3a0626b38f:
Linux 3.16-rc1 (2014-06-15 17:45:28 -1000)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux.git tags/sunxi-core-for-3.17
for you to fetch changes up to 5ba1657ecdee507df4adcd05b533d09e9934fc11:
ARM: sunxi: select MFD_SUN6I_PRCM when sun8i arch support is enabled (2014-07-07 11:00:06 +0200)
----------------------------------------------------------------
Allwinner core additions for 3.17
Nothing very fancy here, only the introduction from the new Allwinner A23 SoC.
----------------------------------------------------------------
Chen-Yu Tsai (3):
ARM: sunxi: Introduce Allwinner A23 support
ARM: sunxi: Add earlyprintk support using R_UART (sun6i/sun8i)
ARM: sunxi: select MFD_SUN6I_PRCM when sun8i arch support is enabled
arch/arm/Kconfig.debug | 10 ++++++++++
arch/arm/mach-sunxi/Kconfig | 8 ++++++++
arch/arm/mach-sunxi/sunxi.c | 9 +++++++++
3 files changed, 27 insertions(+)
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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* [GIT PULL] Allwinner DT additions for 3.17
From: Maxime Ripard @ 2014-07-18 20:50 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd, Kevin, Olof,
Here are the sunxi DT changes for 3.17.
Thanks!
Maxime
The following changes since commit 7171511eaec5bf23fb06078f59784a3a0626b38f:
Linux 3.16-rc1 (2014-06-15 17:45:28 -1000)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux.git tags/sunxi-dt-for-3.17
for you to fetch changes up to c220aec2bb793bf5a1fb451fd3e4db87654c5ba5:
ARM: dts: sun6i: Add Merrii A31 Hummingbird support (2014-07-18 22:40:37 +0200)
----------------------------------------------------------------
Allwinner DT additions for 3.17
Among the few patches that we have so far, there's a few noticeable changes:
- Introduction of the Allwinner A23 SoC
- Support for the GMAC on the A31. This is only available so far on the
boards which bootloader enable the PHY regulator.
- Addition of the infrared receiver
----------------------------------------------------------------
Alexander Bersenev (3):
ARM: sunxi: Add pins for IR controller on A20 to dtsi
ARM: sunxi: Enable IR controller on cubieboard 2 and cubietruck in dts
ARM: sunxi: Add IR controllers on A20 to dtsi
Carlo Caione (2):
ARM: dts: sun4i: Add AXP209 support to various boards
ARM: dts: sun7i: Add AXP209 support to various boards
Chen-Yu Tsai (10):
ARM: sunxi: Add Allwinner A23 dtsi
ARM: sun8i: dt: Add Ippo-q8h v5 support
ARM: dts: sunxi: Add #interrupt-cells to pinctrl nodes
ARM: sun8i: Add basic clock nodes to the DTSI
ARM: sun8i: Add reset controller nodes to the DTSI
ARM: sun8i: Add PRCM clock and reset controller nodes to the DTSI
ARM: dts: sun6i: Add pin muxing options for GMAC
ARM: dts: sun6i: Add GMAC clock node to the A31 dtsi
ARM: dts: sun6i: Add A31 GMAC gigabit ethernet controller node
ARM: dts: sun6i: Add ethernet alias for GMAC
Hans de Goede (5):
ARM: dts: sun7i: Rename sun7i-a20-ir to sun4i-a10-ir
ARM: dts: sun7i: Add ir receiver support to a20-i12-tvbox
ARM: dts: sun4i: Add new ba10-tvbox board
ARM: dts: sun4i: Add ir controller nodes and pinmux
ARM: dts: sun4i: Add ir node to various boards
Maxime Ripard (1):
ARM: dts: sun6i: Add Merrii A31 Hummingbird support
Zoltan HERPAI (1):
ARM: dts: sun7i: Add board support for LinkSprite pcDuino V3
arch/arm/boot/dts/Makefile | 7 +-
arch/arm/boot/dts/sun4i-a10-a1000.dts | 15 ++
arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts | 110 ++++++++
arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 15 ++
arch/arm/boot/dts/sun4i-a10-hackberry.dts | 21 ++
arch/arm/boot/dts/sun4i-a10-inet97fv2.dts | 21 +-
arch/arm/boot/dts/sun4i-a10-mini-xplus.dts | 28 ++
arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 15 ++
arch/arm/boot/dts/sun4i-a10-pcduino.dts | 9 +
arch/arm/boot/dts/sun4i-a10.dtsi | 34 ++-
arch/arm/boot/dts/sun5i-a10s.dtsi | 2 +-
arch/arm/boot/dts/sun5i-a13.dtsi | 2 +-
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 119 ++++++++
arch/arm/boot/dts/sun6i-a31.dtsi | 92 ++++++-
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 16 ++
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 16 ++
arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts | 22 ++
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 10 +
arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 173 ++++++++++++
arch/arm/boot/dts/sun7i-a20.dtsi | 34 ++-
arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts | 30 +++
arch/arm/boot/dts/sun8i-a23.dtsi | 343 ++++++++++++++++++++++++
22 files changed, 1121 insertions(+), 13 deletions(-)
create mode 100644 arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
create mode 100644 arch/arm/boot/dts/sun6i-a31-hummingbird.dts
create mode 100644 arch/arm/boot/dts/sun7i-a20-pcduino3.dts
create mode 100644 arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
create mode 100644 arch/arm/boot/dts/sun8i-a23.dtsi
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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* [RFC] PCI: pci-imx6: Add delay to workaround kernel hang
From: Marek Vasut @ 2014-07-18 20:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140717152707.GA8537@dragon>
On Thursday, July 17, 2014 at 05:27:09 PM, Shawn Guo wrote:
> On Thu, Jul 17, 2014 at 10:23:10AM +0200, Marek Vasut wrote:
> > On Thursday, July 17, 2014 at 08:51:48 AM, Uwe Kleine-K?nig wrote:
> > > Hello,
> > >
> > > On Tue, Jun 24, 2014 at 04:18:27PM -0300, Fabio Estevam wrote:
> > > > From: Fabio Estevam <fabio.estevam@freescale.com>
> > > >
> > > > When the mx6 PCI conctroller is initialized in the bootloader we see
> > > > a kernel hang inside imx6_add_pcie_port().
> > > >
> > > > Adding a 30ms delay allows the kernel to boot.
> > >
> > > Just my thought on how to debug that: I'd try to bisect the pci init
> > > routine in the boot loader. I.e. first only do the first half of the
> > > initialisation in U-Boot. Depending on Linux being able to boot or not
> > > initialize more or less on the next run.
> > >
> > > Maybe there is a single register write that makes Linux fail?!
> >
> > I am still hell-bent on thinking that the missing PCIe block reset is
> > what makes the Linux fail. Missing block reset is always a problem.
>
> Indeed. We're missing a hardware reset for PCIe on i.MX6Q and i.MX6DL.
> Such reset is available on i.MX6SX, so there is no this problem for
> i.MX6SX PCIe.
>
> > Or do we now have a
> > mean to reset the PCIe block and it's PHY from software?
>
> Richard is trying to find a SW workaround for it, but we're not really
> sure if it's possible.
I hate to ask this, but does that mean all but MX6SLX are irrepairably broken
and will never have a reliable PCIe implementation ever?
Best regards,
Marek Vasut
^ permalink raw reply
* [PATCH v2 0/5] ARM: dts: sun6i: Add support for GMAC
From: Maxime Ripard @ 2014-07-18 20:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1405444547-21870-1-git-send-email-wens@csie.org>
Hi,
On Wed, Jul 16, 2014 at 01:15:42AM +0800, Chen-Yu Tsai wrote:
> Hi Maxime,
>
> This is v2 of the A31 GMAC support series. The GMAC is the same as in
> the A20, except it has an extra reset control. The GMAC clock module is
> mostly the same as in the A20, without the extra dividers, which I left
> out intentionally from the clock driver.
>
> The register offsets and interrupts were copied from A31 SDK in Rhombus
> Tech's repository. The pin muxes were from the EVB fex file.
>
> I've tested this on my A31 Hummingbird under 100M and 1000M.
>
> Patch 5 adds support for the A31 Hummingbird. It is based on your work,
> so it has your name on it. I cleaned up the format and descriptions,
> got rid of missing devices, and added usb and the external rtc.
Applied all the patches. Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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^ permalink raw reply
* [PATCH v6 4/5] PCI: add PCI controller for keystone PCIe h/w
From: Murali Karicheri @ 2014-07-18 20:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAL_JsqKheoWrSGtxPO=AE8g9iOAqfwRa=81Ku=Cfx8_gpDysOg@mail.gmail.com>
Rob,
On 07/18/2014 03:31 PM, Rob Herring wrote:
> On Fri, Jul 18, 2014 at 10:14 AM, Murali Karicheri<m-karicheri2@ti.com> wrote:
--- Cut ---
>> +
>> +Optional properties:-
>> + phys: phandle to Generic Keystone SerDes phy for PCI
>> + phy-names: name of the Generic Keystine SerDes phy for PCI
>> + - If boot loader already does PCI link establishment, then phys and
>> + phy-names shouldn't be present.
>> + ti,enable-linktrain - Enable Link training.
>> + - If boot loader already does PCI link establishment, then this
>> + shouldn't be present.
>
> Can't you read from the h/w if the link is trained?
Yes.
There are customers who use this driver with PCI Link setup done in the
boot loader. This property tells the driver to bypass Link setup
procedure in that case. Is this undesirable and if so. how other
platforms handle it? Check first if link is trained or start the link
setup procedure? Let me know. If this is fine, please provide your Ack.
Thanks.
Murali
>
> Rob
^ permalink raw reply
* [PATCH 4/4] (RFC) X86: add IPI tracepoints
From: Steven Rostedt @ 2014-07-18 20:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1405660735-13408-5-git-send-email-nicolas.pitre@linaro.org>
On Fri, 18 Jul 2014 01:18:55 -0400
Nicolas Pitre <nicolas.pitre@linaro.org> wrote:
> diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
> index be8e1bde07..e154d176cf 100644
> --- a/arch/x86/kernel/smp.c
> +++ b/arch/x86/kernel/smp.c
> @@ -31,6 +31,12 @@
> #include <asm/apic.h>
> #include <asm/nmi.h>
> #include <asm/trace/irq_vectors.h>
> +
> +#define CREATE_TRACE_POINTS
> +#undef TRACE_INCLUDE_PATH
> +#undef TRACE_INCLUDE_FILE
I'm curious to why you added the #undefs. I wouldn't think they were
needed.
-- Steve
> +#include <trace/events/ipi.h>
> +
> /*
> * Some notes on x86 processor bugs affecting SMP operation:
> *
^ permalink raw reply
* [PATCHv4 5/5] arm64: cpuinfo: print info for all CPUs
From: Christopher Covington @ 2014-07-18 20:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140718164102.GA17374@leverpostej>
On 07/18/2014 12:41 PM, Mark Rutland wrote:
> On Fri, Jul 18, 2014 at 05:18:27PM +0100, Peter Maydell wrote:
>> On 18 July 2014 16:58, Mark Rutland <mark.rutland@arm.com> wrote:
>>> On Fri, Jul 18, 2014 at 04:52:37PM +0100, Peter Maydell wrote:
>>>> Comments in the kernel sources aren't going to guide
>>>> anybody except kernel developers.
>>>
>>> That's not entirely true, some people skim the kernel sources to figure
>>> out how they're meant to use syscalls and such (though admitedly this
>>> isn't all that common).
>>
>> Every time anybody has to do that it means you've failed to document
>> something...
>
> ...and in this case, the thing to document is the hwcaps.
>
>>>> I was expecting from this commit message that you were going to emit
>>>> actual comments in /proc/cpuinfo...
>>>
>>> I don't think that's a good idea, and I can only see that reading when I
>>> squint quite hard. ;)
>>
>> You have to admit it would put the documentation right where
>> the people looking at cpuinfo can find it :-)
>
> Sure :)
>
>> How about a patch to Documentation/filesystems/proc.txt ?
>
> Currently there seems to be a single relevant line, and it doesn't seem
> to be up-to-date for SMP:
>
> cpuinfo Info about the CPU
>
> It might make sense to have something under Documentation/arm64, but I
> don't know what precisely.
If you're looking to communicate information to users I would highly recommend
including an update to the Linux man page.
http://man7.org/linux/man-pages/man5/proc.5.html
https://www.kernel.org/doc/man-pages/contributing.html
Regards,
Christopher
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by the Linux Foundation.
^ permalink raw reply
* [PATCH v6 4/5] PCI: add PCI controller for keystone PCIe h/w
From: Murali Karicheri @ 2014-07-18 20:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5467203.eMVRoNeSx1@wuerfel>
On 07/18/2014 03:50 PM, Arnd Bergmann wrote:
> On Friday 18 July 2014 14:31:39 Rob Herring wrote:
>>> +
>>> + Example:
>>> + pcie_msi_intc: msi-interrupt-controller {
>>> + interrupt-controller;
>>> + #interrupt-cells =<1>;
>>> + interrupt-parent =<&gic>;
>>> + interrupts =<GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
>>> +<GIC_SPI 31 IRQ_TYPE_EDGE_RISING>,
>>> +<GIC_SPI 32 IRQ_TYPE_EDGE_RISING>,
>>> +<GIC_SPI 33 IRQ_TYPE_EDGE_RISING>,
>>> +<GIC_SPI 34 IRQ_TYPE_EDGE_RISING>,
>>> +<GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
>>> +<GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
>>> +<GIC_SPI 37 IRQ_TYPE_EDGE_RISING>;
>>> + };
>>> +
>>> +pcie_intc: Interrupt controller device node for Legacy irq chip
>>> + interrupt-cells: should be set to 1
>>> + interrupt-parent: Parent interrupt controller phandle
>>> + interrupts: GIC interrupt lines connected to PCI Legacy interrupt lines
>>> +
>>> + Example:
>>> + pcie_intc: legacy-interrupt-controller {
>>> + interrupt-controller;
>>> + #interrupt-cells =<1>;
>>> + interrupt-parent =<&gic>;
>>> + interrupts =<GIC_SPI 26 IRQ_TYPE_EDGE_RISING>,
>>> +<GIC_SPI 27 IRQ_TYPE_EDGE_RISING>,
>>> +<GIC_SPI 28 IRQ_TYPE_EDGE_RISING>,
>>> +<GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
>>> + };
>> This seems wrong. Legacy interrupts should be described with
>> interrupt-map and then PCI child devices have a standard interrupt
>> specifier.
>>
>> I'm not sure about MSIs, but I would think they would have a standard
>> format too.
>>
> IIRC, it's actually the correct way to do this here: the problem is that
> the PCI IRQs are not directly connected to the GIC, but instead there is
> a nested irqchip that has each PCI IRQ routed to it and that requires
> an extra EOI for each interrupt.
>
> The interrupt-map in the PCI host points to this special irqchip rather
> than to the GIC.
Arnd,
Thanks. I agree with Arnd and believe there is no issue here
> Arnd
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH 2/4] ARM: add IPI tracepoints
From: Steven Rostedt @ 2014-07-18 20:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1405660735-13408-3-git-send-email-nicolas.pitre@linaro.org>
On Fri, 18 Jul 2014 01:18:53 -0400
Nicolas Pitre <nicolas.pitre@linaro.org> wrote:
> -#ifdef CONFIG_IRQ_WORK
> -void arch_irq_work_raise(void)
> -{
> - if (is_smp())
> - smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
> -}
> +static const char *ipi_types[NR_IPI]
> +#ifdef CONFIG_TRACING
> +__tracepoint_string
> #endif
Oh, this is ugly. I should probably add a define when !CONFIG_TRACING
is set. Something like:
#ifdef CONFIG_TRACING
...
#else
# define __tracepoint_string
#endif
Such that users of __tracepoint_string don't need to add ugly ifdefs in
the code.
If you want to add that to ftrace_event.h to this series, I'll ack it.
-- Steve
> -
> -static const char *ipi_types[NR_IPI] = {
> += {
> #define S(x,s) [x] = s
> S(IPI_WAKEUP, "CPU wakeup interrupts"),
> S(IPI_TIMER, "Timer broadcast interrupts"),
> @@ -473,6 +457,12 @@ static const char *ipi_types[NR_IPI] = {
> S(IPI_COMPLETION, "completion interrupts"),
> };
>
^ permalink raw reply
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