* [PATCH/REBASED] usb: chipidea: Properly mark little endian descriptors
From: Stephen Boyd @ 2016-09-14 5:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160914025045.GD30760@b29397-desktop>
The DMA descriptors are little endian, and we do a pretty good
job of handling them with the proper le32_to_cpu() markings, but
we don't actually mark them as __le32. This means checkers like
sparse can't easily find new bugs. Let's mark the members of
structures properly and fix the few places where we're missing
conversions.
Cc: Peter Chen <peter.chen@nxp.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
Peter Chen wrote:
>
> I am afraid I can't apply for testing
>
> Applying: usb: chipidea: Properly mark little endian descriptors
> fatal: sha1 information is lacking or useless
> (drivers/usb/chipidea/udc.c).
> error: could not build fake ancestor
> Patch failed at 0001 usb: chipidea: Properly mark little endian
> descriptors
> The copy of the patch that failed is found in: .git/rebase-apply/patch
> When you have resolved this problem, run "git am --continue".
> If you prefer to skip this patch, run "git am --skip" instead.
> To restore the original branch and stop patching, run "git am --abort".
>
> Would you please rebase my ci-for-usb-next branch?
Sure no problem. Maybe you shouldn't specify a 3 way merge so that
it attempts to apply without building a fake ancestor? Anyway, here
it is.
drivers/usb/chipidea/udc.c | 6 +++---
drivers/usb/chipidea/udc.h | 12 ++++++------
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index 661f43fe0f9e..a9b07befd398 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -365,7 +365,7 @@ static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
if (hwreq->req.length == 0
|| hwreq->req.length % hwep->ep.maxpacket)
mul++;
- node->ptr->token |= mul << __ffs(TD_MULTO);
+ node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
}
temp = (u32) (hwreq->req.dma + hwreq->req.actual);
@@ -504,7 +504,7 @@ static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
if (hwreq->req.length == 0
|| hwreq->req.length % hwep->ep.maxpacket)
mul++;
- hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
+ hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
}
ret = hw_ep_prime(ci, hwep->num, hwep->dir,
@@ -529,7 +529,7 @@ static void free_pending_td(struct ci_hw_ep *hwep)
static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
struct td_node *node)
{
- hwep->qh.ptr->td.next = node->dma;
+ hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
hwep->qh.ptr->td.token &=
cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
diff --git a/drivers/usb/chipidea/udc.h b/drivers/usb/chipidea/udc.h
index e66df0020bd4..2ecd1174d66c 100644
--- a/drivers/usb/chipidea/udc.h
+++ b/drivers/usb/chipidea/udc.h
@@ -22,11 +22,11 @@
/* DMA layout of transfer descriptors */
struct ci_hw_td {
/* 0 */
- u32 next;
+ __le32 next;
#define TD_TERMINATE BIT(0)
#define TD_ADDR_MASK (0xFFFFFFEUL << 5)
/* 1 */
- u32 token;
+ __le32 token;
#define TD_STATUS (0x00FFUL << 0)
#define TD_STATUS_TR_ERR BIT(3)
#define TD_STATUS_DT_ERR BIT(5)
@@ -36,7 +36,7 @@ struct ci_hw_td {
#define TD_IOC BIT(15)
#define TD_TOTAL_BYTES (0x7FFFUL << 16)
/* 2 */
- u32 page[5];
+ __le32 page[5];
#define TD_CURR_OFFSET (0x0FFFUL << 0)
#define TD_FRAME_NUM (0x07FFUL << 0)
#define TD_RESERVED_MASK (0x0FFFUL << 0)
@@ -45,18 +45,18 @@ struct ci_hw_td {
/* DMA layout of queue heads */
struct ci_hw_qh {
/* 0 */
- u32 cap;
+ __le32 cap;
#define QH_IOS BIT(15)
#define QH_MAX_PKT (0x07FFUL << 16)
#define QH_ZLT BIT(29)
#define QH_MULT (0x0003UL << 30)
#define QH_ISO_MULT(x) ((x >> 11) & 0x03)
/* 1 */
- u32 curr;
+ __le32 curr;
/* 2 - 8 */
struct ci_hw_td td;
/* 9 */
- u32 RESERVED;
+ __le32 RESERVED;
struct usb_ctrlrequest setup;
} __attribute__ ((packed, aligned(4)));
--
2.9.0.rc2.8.ga28705d
^ permalink raw reply related
* [RFC/PATCH] usb: misc: Add a driver for TC7USB40MU
From: Stephen Boyd @ 2016-09-14 5:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160914033200.GE30760@b29397-desktop>
Quoting Peter Chen (2016-09-13 20:32:00)
> On Tue, Sep 13, 2016 at 06:42:46PM -0700, Stephen Boyd wrote:
> > On the db410c 96boards platform we have a TC7USB40MU[1] on the
> > board to mux the D+/D- lines from the SoC between a micro usb
> > "device" port and a USB hub for "host" roles. Upon a role switch,
> > we need to change this mux to forward the D+/D- lines to either
> > the port or the hub. Therefore, introduce a driver for this
> > device that intercepts extcon USB_HOST events and logically
> > asserts a gpio to mux the "host" D+/D- lines when a host cable is
> > attached. When the cable goes away, it will logically deassert
> > the gpio and mux the "device" lines.
>
> Would you please draw the design? It can also help me review your
> chipidea patch well.
>
> 1. How many ports on the board?
> 2. How the lines are connected on the board?
>
The schematic for the db410c is publically available here[2][3].
There's also the 96boards spec[4] which talks about this switch based
design a little bit. See the section titled "Single USB port Example".
[2] https://github.com/96boards/documentation/blob/master/ConsumerEdition/DragonBoard-410c/HardwareDocs/Schematics_DragonBoard.pdf
[3] https://github.com/96boards/documentation/raw/master/ConsumerEdition/DragonBoard-410c/HardwareDocs/Schematics_DragonBoard.pdf
[4] https://www.96boards.org/wp-content/uploads/2015/02/96BoardsCESpecificationv1.0-EA1.pdf
^ permalink raw reply
* [PATCH/REBASED] usb: chipidea: Properly mark little endian descriptors
From: Peter Chen @ 2016-09-14 6:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160914055302.1132-1-stephen.boyd@linaro.org>
On Tue, Sep 13, 2016 at 10:53:02PM -0700, Stephen Boyd wrote:
> The DMA descriptors are little endian, and we do a pretty good
> job of handling them with the proper le32_to_cpu() markings, but
> we don't actually mark them as __le32. This means checkers like
> sparse can't easily find new bugs. Let's mark the members of
> structures properly and fix the few places where we're missing
> conversions.
>
> Cc: Peter Chen <peter.chen@nxp.com>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
> ---
>
> Peter Chen wrote:
> >
> > I am afraid I can't apply for testing
> >
> > Applying: usb: chipidea: Properly mark little endian descriptors
> > fatal: sha1 information is lacking or useless
> > (drivers/usb/chipidea/udc.c).
> > error: could not build fake ancestor
> > Patch failed at 0001 usb: chipidea: Properly mark little endian
> > descriptors
> > The copy of the patch that failed is found in: .git/rebase-apply/patch
> > When you have resolved this problem, run "git am --continue".
> > If you prefer to skip this patch, run "git am --skip" instead.
> > To restore the original branch and stop patching, run "git am --abort".
> >
> > Would you please rebase my ci-for-usb-next branch?
>
> Sure no problem. Maybe you shouldn't specify a 3 way merge so that
> it attempts to apply without building a fake ancestor? Anyway, here
> it is.
I tried w/o 3 ways merge, the new one can be applied.
Peter
>
> drivers/usb/chipidea/udc.c | 6 +++---
> drivers/usb/chipidea/udc.h | 12 ++++++------
> 2 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
> index 661f43fe0f9e..a9b07befd398 100644
> --- a/drivers/usb/chipidea/udc.c
> +++ b/drivers/usb/chipidea/udc.c
> @@ -365,7 +365,7 @@ static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
> if (hwreq->req.length == 0
> || hwreq->req.length % hwep->ep.maxpacket)
> mul++;
> - node->ptr->token |= mul << __ffs(TD_MULTO);
> + node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
> }
>
> temp = (u32) (hwreq->req.dma + hwreq->req.actual);
> @@ -504,7 +504,7 @@ static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
> if (hwreq->req.length == 0
> || hwreq->req.length % hwep->ep.maxpacket)
> mul++;
> - hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
> + hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
> }
>
> ret = hw_ep_prime(ci, hwep->num, hwep->dir,
> @@ -529,7 +529,7 @@ static void free_pending_td(struct ci_hw_ep *hwep)
> static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
> struct td_node *node)
> {
> - hwep->qh.ptr->td.next = node->dma;
> + hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
> hwep->qh.ptr->td.token &=
> cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
>
> diff --git a/drivers/usb/chipidea/udc.h b/drivers/usb/chipidea/udc.h
> index e66df0020bd4..2ecd1174d66c 100644
> --- a/drivers/usb/chipidea/udc.h
> +++ b/drivers/usb/chipidea/udc.h
> @@ -22,11 +22,11 @@
> /* DMA layout of transfer descriptors */
> struct ci_hw_td {
> /* 0 */
> - u32 next;
> + __le32 next;
> #define TD_TERMINATE BIT(0)
> #define TD_ADDR_MASK (0xFFFFFFEUL << 5)
> /* 1 */
> - u32 token;
> + __le32 token;
> #define TD_STATUS (0x00FFUL << 0)
> #define TD_STATUS_TR_ERR BIT(3)
> #define TD_STATUS_DT_ERR BIT(5)
> @@ -36,7 +36,7 @@ struct ci_hw_td {
> #define TD_IOC BIT(15)
> #define TD_TOTAL_BYTES (0x7FFFUL << 16)
> /* 2 */
> - u32 page[5];
> + __le32 page[5];
> #define TD_CURR_OFFSET (0x0FFFUL << 0)
> #define TD_FRAME_NUM (0x07FFUL << 0)
> #define TD_RESERVED_MASK (0x0FFFUL << 0)
> @@ -45,18 +45,18 @@ struct ci_hw_td {
> /* DMA layout of queue heads */
> struct ci_hw_qh {
> /* 0 */
> - u32 cap;
> + __le32 cap;
> #define QH_IOS BIT(15)
> #define QH_MAX_PKT (0x07FFUL << 16)
> #define QH_ZLT BIT(29)
> #define QH_MULT (0x0003UL << 30)
> #define QH_ISO_MULT(x) ((x >> 11) & 0x03)
> /* 1 */
> - u32 curr;
> + __le32 curr;
> /* 2 - 8 */
> struct ci_hw_td td;
> /* 9 */
> - u32 RESERVED;
> + __le32 RESERVED;
> struct usb_ctrlrequest setup;
> } __attribute__ ((packed, aligned(4)));
>
> --
> 2.9.0.rc2.8.ga28705d
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Best Regards,
Peter Chen
^ permalink raw reply
* [PATCH v7 7/9] drm/mediatek: add dsi transfer function
From: YT Shen @ 2016-09-14 6:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473758754.28437.40.camel@mtksdaap41>
Hi CK,
On Tue, 2016-09-13 at 17:25 +0800, CK Hu wrote:
> Hi, YT:
>
> On Mon, 2016-09-12 at 18:16 +0800, YT Shen wrote:
> > Hi CK,
> >
> > On Wed, 2016-09-07 at 10:33 +0800, CK Hu wrote:
> > > Hi, YT:
> > >
> > > On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote:
> > > > From: shaoming chen <shaoming.chen@mediatek.com>
> > > >
> > > > add dsi read/write commands for transfer function
> > > >
> > > > Signed-off-by: shaoming chen <shaoming.chen@mediatek.com>
> > > > ---
> > > > drivers/gpu/drm/mediatek/mtk_dsi.c | 188 +++++++++++++++++++++++++++++++++++++
> > > > 1 file changed, 188 insertions(+)
> > > >
> > >
> > > [snip...]
> > >
> > > >
> > > > +static void mtk_dsi_irq_data_clear(struct mtk_dsi *dsi, u32 irq_bit)
> > > > +{
> > > > + dsi->irq_data &= ~irq_bit;
> > > > +}
> > > > +
> > >
> > > [snip...]
> > >
> > > > +
> > > > +static s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi *dsi, u32 irq_flag,
> > > > + unsigned int timeout)
> > > > +{
> > > > + s32 ret = 0;
> > > > + unsigned long jiffies = msecs_to_jiffies(timeout);
> > > > +
> > > > + ret = wait_event_interruptible_timeout(_dsi_irq_wait_queue,
> > > > + dsi->irq_data & irq_flag,
> > > > + jiffies);
> > > > + if (ret == 0) {
> > > > + dev_info(dsi->dev, "Wait DSI IRQ(0x%08x) Timeout\n", irq_flag);
> > > > +
> > > > + mtk_dsi_enable(dsi);
> > > > + mtk_dsi_reset_engine(dsi);
> > > > + }
> > > > +
> > > > + return ret;
> > > > +}
> > >
> > > I think mtk_dsi_irq_data_clear() and mtk_dsi_wait_for_irq_done() should
> > > be moved to the 6th patch [1] of this series because these two functions
> > > deal the irq control.
> > We will move mtk_dsi_irq_data_clear() to patch "drm/mediatek: add dsi
> > interrupt control" and put mtk_dsi_wait_for_irq_done() here, because it
> > is used in the transfer function.
>
> mtk_dsi_irq_data_clear() is also only used in transfer function now. I
> think both function could be used for other application rather than
> transfer function, so these two function are general function for irq
> control.
We will rollback the changes here. Move mtk_dsi_irq_data_clear() to
original place.
Add new functions could be used in the future will have problems.
warning: 'mtk_dsi_wait_for_irq_done' defined but not used
[-Wunused-function]
static s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi *dsi, u32 irq_flag,
warning: 'mtk_dsi_irq_data_clear' defined but not used
[-Wunused-function]
static void mtk_dsi_irq_data_clear(struct mtk_dsi *dsi, u32 irq_bit)
> Regards,
> CK
>
> >
> > Regards,
> > yt.shen
> > >
> > >
> > > [1] https://patchwork.kernel.org/patch/9310819/
> > >
> > >
> > > Regards,
> > > CK
> > >
> >
> >
>
>
^ permalink raw reply
* [PATCH v4 22/22] phy: Add support for Qualcomm's USB HS phy
From: Stephen Boyd @ 2016-09-14 6:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160914021133.GB30760@b29397-desktop>
Quoting Peter Chen (2016-09-13 19:11:33)
> On Tue, Sep 13, 2016 at 01:41:44PM -0700, Stephen Boyd wrote:
> > Quoting Peter Chen (2016-09-13 00:03:58)
> > > On Wed, Sep 07, 2016 at 02:35:19PM -0700, Stephen Boyd wrote:
> > > > The high-speed phy on qcom SoCs is controlled via the ULPI
> > > > viewport.
> > > >
> > >
> > > Hi Stephen, I am a little puzzled how this driver co-work with chipidea
> > > driver. According to nxp IC guys, the ULPI PHY's clock needs to be enabled
> > > before access portsc.pts (calling hw_phymode_configure), otherwise,
> > > the system will hang. But I find you call hw_phymode_configure before
> > > phy->power_on, doesn't your design have this requirement?
> >
> > Which clk needs to be enabled? The xcvr_clk? I believe that clk
> > corresponds to the "core" clk that we enable in the msm glue driver
> > layer. When that clk is enabled, the ULPI phy is able to respond to
> > register read/writes via the ULPI viewport.
> >
>
> The input clock for ULPI PHY, maybe it is ref_clk at this PHY driver,
> so in your platform, even PHY clock is gated, you can still access
> portsc.pts to configure PHY mode at controller register?
There are a couple input clocks for this phy. I'm not sure which one the
nxp IC guys think needs to be enabled. Typically, the ref_clk is always
on so it's hard for me to test a scenario where it isn't enabled. But
I'm not sure that the ref_clk is what we're talking about anyway. Would
you know the frequency perhaps? The ref_clk is usually 19.2MHz on these
SoCs. That would match up with the "crystal input" pin in the ULPI
spec[1].
Do you know if this is documented anywhere in the chipidea manual?
I'll have to look again and see if there's something in there, but I
didn't see anything like this.
I would guess that we're talking about the xcvr clock though, because
from what I see in the manual, this is used to clock the interface
between the ULPI phy and the controller. In the ULPI spec, this matches
up with the "clock" signal for the ULPI phy and that usually runs at
something >= 60MHz.
>
> > >
> > > Besides, you read ulpi id before phy->power_on, how can read work before
> > > phy power on?
> > >
> >
> > I've found that even having the link clk enabled before phy->power_on
> > doesn't mean it's possible to read the id registers though. That's
> > because there can be other power supplies, like regulators, which need
> > to be on for the phy to operate properly.
> >
>
> Then I am puzzled the current initialization for your case, in my mind,
> it should like below:
>
> qcom_usb_hs_phy_probe->qcom_usb_hs_phy_power_on->ci_ulpi_init
>
> Like other PHYs, it should get PHY first, then power on it, after that,
> you can access its register.
>
Hmm.. maybe the confusion is in which registers we should be able to
access? Are we talking about the ULPI viewport MMIO register space or
the ULPI registers that we access through the viewport? I have a
hw_phymode_configure() inside of of ci_ulpi_init() so that the
identification registers through the ULPI viewport read properly
(assuming there aren't other power requirements like regulators). If we
don't set the portsc.pts before using the viewport, the viewport doesn't
work and reads timeout. So we really don't touch the ULPI registers
except for the scratch space and the id registers until after the phy is
properly powered on with clks and regulators, because the only place we
touch them after doing the id checking is in this phy driver in
qcom_usb_hs_phy_power_on(). We've "solved" the chicken-egg problem where
we don't know which device driver to probe because the phy needs to be
powered on to read the id registers to know which device driver to use
by using DT to match up device drivers instead.
[1] https://www.sparkfun.com/datasheets/Components/SMD/ULPI_v1_1.pdf
^ permalink raw reply
* [PATCH v1 1/3] ARM: dts: imx6qdl-apalis: Do not rely on DDC I2C bus bitbang for HDMI
From: Sanchayan Maity @ 2016-09-14 6:35 UTC (permalink / raw)
To: linux-arm-kernel
Remove the use of DDC I2C bus bitbang to support reading of EDID
and rely on support from internal HDMI I2C master controller instead.
As a result remove the device tree property ddc-i2c-bus.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
---
Hello,
This patch is tested with the following patch applied
https://patchwork.kernel.org/patch/9296883/
and is based on the suggestions from Vladimir
https://lkml.org/lkml/2016/8/29/322
This and following two patches are based on top of shawn's
for-next branch.
Regards,
Sanchayan.
---
arch/arm/boot/dts/imx6q-apalis-ixora.dts | 6 ------
arch/arm/boot/dts/imx6qdl-apalis.dtsi | 25 +++++++++----------------
2 files changed, 9 insertions(+), 22 deletions(-)
diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
index 207b85b..d99979e 100644
--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
@@ -55,7 +55,6 @@
"fsl,imx6q";
aliases {
- i2c0 = &i2cddc;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
@@ -186,11 +185,6 @@
};
&hdmi {
- ddc-i2c-bus = <&i2cddc>;
- status = "okay";
-};
-
-&i2cddc {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
index 99e323b..8c67dd8 100644
--- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
@@ -53,18 +53,6 @@
status = "disabled";
};
- /* DDC_I2C: I2C2_SDA/SCL on MXM3 205/207 */
- i2cddc: i2c at 0 {
- compatible = "i2c-gpio";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c_ddc>;
- gpios = <&gpio3 16 GPIO_ACTIVE_HIGH /* sda */
- &gpio2 30 GPIO_ACTIVE_HIGH /* scl */
- >;
- i2c-gpio,delay-us = <2>; /* ~100 kHz */
- status = "disabled";
- };
-
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "1P8V";
@@ -209,6 +197,12 @@
};
};
+&hdmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hdmi_ddc>;
+ status = "disabled";
+};
+
/*
* GEN1_I2C: I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier
* board)
@@ -633,11 +627,10 @@
>;
};
- pinctrl_i2c_ddc: gpioi2cddcgrp {
+ pinctrl_hdmi_ddc: hdmiddcgrp {
fsl,pins = <
- /* DDC bitbang */
- MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
- MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x1b0b0
+ MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x4001b8b1
>;
};
--
2.9.3
^ permalink raw reply related
* [PATCH v1 2/3] ARM: dts: imx6q-apalis-ixora: Remove use of pwm-leds
From: Sanchayan Maity @ 2016-09-14 6:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <9d2c17aa2e00e6ff4349a53de8247860d2382607.1473833908.git.maitysanchayan@gmail.com>
Remove use of pwm-leds and use the standard /sys/class/pwm
interface from PWM subsystem.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
---
arch/arm/boot/dts/imx6q-apalis-ixora.dts | 22 ----------------------
1 file changed, 22 deletions(-)
diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
index d99979e..70a3da0 100644
--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
@@ -146,28 +146,6 @@
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
};
};
-
- pwmleds {
- compatible = "pwm-leds";
-
- ledpwm1 {
- label = "PWM1";
- pwms = <&pwm1 0 50000>;
- max-brightness = <255>;
- };
-
- ledpwm2 {
- label = "PWM2";
- pwms = <&pwm2 0 50000>;
- max-brightness = <255>;
- };
-
- ledpwm3 {
- label = "PWM3";
- pwms = <&pwm3 0 50000>;
- max-brightness = <255>;
- };
- };
};
&backlight {
--
2.9.3
^ permalink raw reply related
* [PATCH v1 3/3] ARM: dts: imx6qdl-apalis: Use enable-gpios property for backlight
From: Sanchayan Maity @ 2016-09-14 6:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <9d2c17aa2e00e6ff4349a53de8247860d2382607.1473833908.git.maitysanchayan@gmail.com>
Use enable-gpios property of PWM backlight driver for backlight
control. While at it also fix the use of brightness levels required
by EDT displays which require inverted PWM's.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
---
arch/arm/boot/dts/imx6qdl-apalis.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
index 8c67dd8..9100bde 100644
--- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
@@ -49,7 +49,10 @@
backlight: backlight {
compatible = "pwm-backlight";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_bl_on>;
pwms = <&pwm4 0 5000000>;
+ enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
@@ -614,6 +617,12 @@
>;
};
+ pinctrl_gpio_bl_on: gpioblon {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b0
+ >;
+ };
+
pinctrl_gpio_keys: gpio1io04grp {
fsl,pins = <
/* Power button */
--
2.9.3
^ permalink raw reply related
* [PATCH v7 7/9] drm/mediatek: add dsi transfer function
From: CK Hu @ 2016-09-14 6:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473833946.24354.8.camel@mtksdaap41>
Hi, YT:
On Wed, 2016-09-14 at 14:19 +0800, YT Shen wrote:
> Hi CK,
>
> On Tue, 2016-09-13 at 17:25 +0800, CK Hu wrote:
> > Hi, YT:
> >
> > On Mon, 2016-09-12 at 18:16 +0800, YT Shen wrote:
> > > Hi CK,
> > >
> > > On Wed, 2016-09-07 at 10:33 +0800, CK Hu wrote:
> > > > Hi, YT:
> > > >
> > > > On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote:
> > > > > From: shaoming chen <shaoming.chen@mediatek.com>
> > > > >
> > > > > add dsi read/write commands for transfer function
> > > > >
> > > > > Signed-off-by: shaoming chen <shaoming.chen@mediatek.com>
> > > > > ---
> > > > > drivers/gpu/drm/mediatek/mtk_dsi.c | 188 +++++++++++++++++++++++++++++++++++++
> > > > > 1 file changed, 188 insertions(+)
> > > > >
> > > >
> > > > [snip...]
> > > >
> > > > >
> > > > > +static void mtk_dsi_irq_data_clear(struct mtk_dsi *dsi, u32 irq_bit)
> > > > > +{
> > > > > + dsi->irq_data &= ~irq_bit;
> > > > > +}
> > > > > +
> > > >
> > > > [snip...]
> > > >
> > > > > +
> > > > > +static s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi *dsi, u32 irq_flag,
> > > > > + unsigned int timeout)
> > > > > +{
> > > > > + s32 ret = 0;
> > > > > + unsigned long jiffies = msecs_to_jiffies(timeout);
> > > > > +
> > > > > + ret = wait_event_interruptible_timeout(_dsi_irq_wait_queue,
> > > > > + dsi->irq_data & irq_flag,
> > > > > + jiffies);
> > > > > + if (ret == 0) {
> > > > > + dev_info(dsi->dev, "Wait DSI IRQ(0x%08x) Timeout\n", irq_flag);
> > > > > +
> > > > > + mtk_dsi_enable(dsi);
> > > > > + mtk_dsi_reset_engine(dsi);
> > > > > + }
> > > > > +
> > > > > + return ret;
> > > > > +}
> > > >
> > > > I think mtk_dsi_irq_data_clear() and mtk_dsi_wait_for_irq_done() should
> > > > be moved to the 6th patch [1] of this series because these two functions
> > > > deal the irq control.
> > > We will move mtk_dsi_irq_data_clear() to patch "drm/mediatek: add dsi
> > > interrupt control" and put mtk_dsi_wait_for_irq_done() here, because it
> > > is used in the transfer function.
> >
> > mtk_dsi_irq_data_clear() is also only used in transfer function now. I
> > think both function could be used for other application rather than
> > transfer function, so these two function are general function for irq
> > control.
> We will rollback the changes here. Move mtk_dsi_irq_data_clear() to
> original place.
>
> Add new functions could be used in the future will have problems.
> warning: 'mtk_dsi_wait_for_irq_done' defined but not used
> [-Wunused-function]
> static s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi *dsi, u32 irq_flag,
> warning: 'mtk_dsi_irq_data_clear' defined but not used
> [-Wunused-function]
> static void mtk_dsi_irq_data_clear(struct mtk_dsi *dsi, u32 irq_bit)
Please refer to [1], '__maybe_unused' can fix your problem.
[1]
http://lxr.free-electrons.com/source/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c#L76
Regards,
CK
>
> > Regards,
> > CK
> >
> > >
> > > Regards,
> > > yt.shen
> > > >
> > > >
> > > > [1] https://patchwork.kernel.org/patch/9310819/
> > > >
> > > >
> > > > Regards,
> > > > CK
> > > >
> > >
> > >
> >
> >
>
>
^ permalink raw reply
* [GIT PULL] STi DT updates for v4.9
From: Patrice Chotard @ 2016-09-14 6:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4599921.Xv3Qd3jgsj@wuerfel>
Hi Arnd
On 09/13/2016 05:27 PM, Arnd Bergmann wrote:
> On Friday, September 2, 2016 3:58:00 PM CEST Patrice Chotard wrote:
>> git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti.git
>>
>> for you to fetch changes up to ba5ba11906d5462993f5fd4e3da4d234505427a0:
>>
>> ARM: dts: STiH41x-b2020: Update gpio specifier (2016-09-02 15:15:14 +0200)
>>
>> ----------------------------------------------------------------
>>
>> STi dts fixes and new STi 96board support:
>>
>> Add thermal node for STiH407 family boards
>> Add specific nodes for STMicroelectronics 96Board
>> Add new B2260 STi board file = 96Board
>> Fix ahci issue on STiH407 family
>> Fix debugfs/pinctrl kernel warning
>> Update gpio-cells and gpio specifier
>>
>
> Pulled into next/dt. The URL had no tag name, but I found the tag "sti-dt-for-v4.9-1"
OK i will check that point.
> in your tree with that commit ID, so I pulled that.
Perfect !
Thanks
>
> Not sure what went wrong on your end, it wasn't a big deal but please
> try to always include the tag. Thanks!
>
> Arnd
>
^ permalink raw reply
* [PATCH v9 00/19] Add support for FDMA DMA controller and slim core rproc found on STi chipsets
From: Patrice Chotard @ 2016-09-14 6:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160913180616.GD21438@tuxbot>
Hi Bjorn
On 09/13/2016 08:06 PM, Bjorn Andersson wrote:
> On Tue 13 Sep 02:31 PDT 2016, Peter Griffin wrote:
>
>> Hi Vinod & Bjorn,
>>
>> [..]
>>
>> On Mon, 05 Sep 2016, Peter Griffin wrote:
>>
>>> v8 actions some review feedback from Bjorn to the slim rproc driver, and also includes
>>> a patch which fixes a recursive Kconfig error which is triggered when st_fdma selects
>>> slim_rproc driver. The series has also been rebased on v4.8-rc3.
>>>
>>> v9 actions some review feedback from Bjorn, Lee and Vinod. See below. Importantly a bug
>>> was found during testing now that the platform boots without clk_ignore_unused parameter
>>> whereby the clocks would not be enabled properly before firmware loading was attempted.
>>>
>>> regards,
>>>
>>> Peter.
>>>
>>> Changes since v8:
>>> - Add MODULE_ALIAS (Vinod)
>>> - devm_kzalloc to devm_kcalloc (Vinod)
>>> - quisce tasklet initialised by vchan_init() (Vinod)
>>> - Don't make SLIM rproc user selectable (Bjorn)
>>> - slim_rproc: Ensure clocks enabled before firmware load (Peter)
>>> - Various code style nits / commit message change (Lee)
>>> - Separate patch for '\n' kconfig removal (Vinod)
>>
>> I hate to send a ping,
>
> Sorry about that.
>
>> but do you think we can merge this fdma series? It has gone
>> through quite a few review rounds now.
>>
>
> I think the remoteproc part looks good.
>
> Vinod, I don't have any changes queued in remoteproc that should cause
> merge issues. If you want to you could take the remoteproc patch
> through your tree.
>
>
> I do however think that the dts patches should go through arm-soc.
I will take care about dts patches by adding them in the next STi DT pull request
Thanks
Patrice
>
> Regards,
> Bjorn
>
^ permalink raw reply
* [PATCH v7 7/9] drm/mediatek: add dsi transfer function
From: YT Shen @ 2016-09-14 7:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473835151.10216.2.camel@mtksdaap41>
Hi CK,
On Wed, 2016-09-14 at 14:39 +0800, CK Hu wrote:
> Hi, YT:
>
> On Wed, 2016-09-14 at 14:19 +0800, YT Shen wrote:
> > Hi CK,
> >
> > On Tue, 2016-09-13 at 17:25 +0800, CK Hu wrote:
> > > Hi, YT:
> > >
> > > On Mon, 2016-09-12 at 18:16 +0800, YT Shen wrote:
> > > > Hi CK,
> > > >
> > > > On Wed, 2016-09-07 at 10:33 +0800, CK Hu wrote:
> > > > > Hi, YT:
> > > > >
> > > > > On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote:
> > > > > > From: shaoming chen <shaoming.chen@mediatek.com>
> > > > > >
> > > > > > add dsi read/write commands for transfer function
> > > > > >
> > > > > > Signed-off-by: shaoming chen <shaoming.chen@mediatek.com>
> > > > > > ---
> > > > > > drivers/gpu/drm/mediatek/mtk_dsi.c | 188 +++++++++++++++++++++++++++++++++++++
> > > > > > 1 file changed, 188 insertions(+)
> > > > > >
> > > > >
> > > > > [snip...]
> > > > >
> > > > > >
> > > > > > +static void mtk_dsi_irq_data_clear(struct mtk_dsi *dsi, u32 irq_bit)
> > > > > > +{
> > > > > > + dsi->irq_data &= ~irq_bit;
> > > > > > +}
> > > > > > +
> > > > >
> > > > > [snip...]
> > > > >
> > > > > > +
> > > > > > +static s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi *dsi, u32 irq_flag,
> > > > > > + unsigned int timeout)
> > > > > > +{
> > > > > > + s32 ret = 0;
> > > > > > + unsigned long jiffies = msecs_to_jiffies(timeout);
> > > > > > +
> > > > > > + ret = wait_event_interruptible_timeout(_dsi_irq_wait_queue,
> > > > > > + dsi->irq_data & irq_flag,
> > > > > > + jiffies);
> > > > > > + if (ret == 0) {
> > > > > > + dev_info(dsi->dev, "Wait DSI IRQ(0x%08x) Timeout\n", irq_flag);
> > > > > > +
> > > > > > + mtk_dsi_enable(dsi);
> > > > > > + mtk_dsi_reset_engine(dsi);
> > > > > > + }
> > > > > > +
> > > > > > + return ret;
> > > > > > +}
> > > > >
> > > > > I think mtk_dsi_irq_data_clear() and mtk_dsi_wait_for_irq_done() should
> > > > > be moved to the 6th patch [1] of this series because these two functions
> > > > > deal the irq control.
> > > > We will move mtk_dsi_irq_data_clear() to patch "drm/mediatek: add dsi
> > > > interrupt control" and put mtk_dsi_wait_for_irq_done() here, because it
> > > > is used in the transfer function.
> > >
> > > mtk_dsi_irq_data_clear() is also only used in transfer function now. I
> > > think both function could be used for other application rather than
> > > transfer function, so these two function are general function for irq
> > > control.
> > We will rollback the changes here. Move mtk_dsi_irq_data_clear() to
> > original place.
> >
> > Add new functions could be used in the future will have problems.
> > warning: 'mtk_dsi_wait_for_irq_done' defined but not used
> > [-Wunused-function]
> > static s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi *dsi, u32 irq_flag,
> > warning: 'mtk_dsi_irq_data_clear' defined but not used
> > [-Wunused-function]
> > static void mtk_dsi_irq_data_clear(struct mtk_dsi *dsi, u32 irq_bit)
>
> Please refer to [1], '__maybe_unused' can fix your problem.
>
> [1]
> http://lxr.free-electrons.com/source/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c#L76
Add __maybe_unused just let GCC not produce a warning for this function.
So you want add patch like this?
[PATCH v7 6/9] drm/mediatek: add dsi interrupt control
+static __maybe_unused s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi
*dsi, u32 irq_flag,
+static __maybe_unused void mtk_dsi_irq_data_set(struct mtk_dsi *dsi,
u32 irq_bit)
[PATCH v7 7/9] drm/mediatek: add dsi transfer function
-static __maybe_unused s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi
*dsi, u32 irq_flag,
+static s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi *dsi, u32 irq_flag,
-static __maybe_unused void mtk_dsi_irq_data_clear(struct mtk_dsi *dsi,
u32 irq_bit)
+static void mtk_dsi_irq_data_clear(struct mtk_dsi *dsi, u32 irq_bit)
Put the static function earlier and add __maybe_unused annotations.
Then remove _maybe_unused annotations later. Or you want to keep
__maybe_unused annotations inside? Sounds unnecessary, it is different
from your reference sharp_panel_read().
>
> Regards,
> CK
>
> >
> > > Regards,
> > > CK
> > >
> > > >
> > > > Regards,
> > > > yt.shen
> > > > >
> > > > >
> > > > > [1] https://patchwork.kernel.org/patch/9310819/
> > > > >
> > > > >
> > > > > Regards,
> > > > > CK
> > > > >
> > > >
> > > >
> > >
> > >
> >
> >
>
>
^ permalink raw reply
* [PATCH v7 7/9] drm/mediatek: add dsi transfer function
From: CK Hu @ 2016-09-14 7:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473837742.24354.28.camel@mtksdaap41>
Hi, YT:
On Wed, 2016-09-14 at 15:22 +0800, YT Shen wrote:
> Hi CK,
>
> On Wed, 2016-09-14 at 14:39 +0800, CK Hu wrote:
> > Hi, YT:
> >
> > On Wed, 2016-09-14 at 14:19 +0800, YT Shen wrote:
> > > Hi CK,
> > >
> > > On Tue, 2016-09-13 at 17:25 +0800, CK Hu wrote:
> > > > Hi, YT:
> > > >
> > > > On Mon, 2016-09-12 at 18:16 +0800, YT Shen wrote:
> > > > > Hi CK,
> > > > >
> > > > > On Wed, 2016-09-07 at 10:33 +0800, CK Hu wrote:
> > > > > > Hi, YT:
> > > > > >
> > > > > > On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote:
> > > > > > > From: shaoming chen <shaoming.chen@mediatek.com>
> > > > > > >
> > > > > > > add dsi read/write commands for transfer function
> > > > > > >
> > > > > > > Signed-off-by: shaoming chen <shaoming.chen@mediatek.com>
> > > > > > > ---
> > > > > > > drivers/gpu/drm/mediatek/mtk_dsi.c | 188 +++++++++++++++++++++++++++++++++++++
> > > > > > > 1 file changed, 188 insertions(+)
> > > > > > >
> > > > > >
> > > > > > [snip...]
> > > > > >
> > > > > > >
> > > > > > > +static void mtk_dsi_irq_data_clear(struct mtk_dsi *dsi, u32 irq_bit)
> > > > > > > +{
> > > > > > > + dsi->irq_data &= ~irq_bit;
> > > > > > > +}
> > > > > > > +
> > > > > >
> > > > > > [snip...]
> > > > > >
> > > > > > > +
> > > > > > > +static s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi *dsi, u32 irq_flag,
> > > > > > > + unsigned int timeout)
> > > > > > > +{
> > > > > > > + s32 ret = 0;
> > > > > > > + unsigned long jiffies = msecs_to_jiffies(timeout);
> > > > > > > +
> > > > > > > + ret = wait_event_interruptible_timeout(_dsi_irq_wait_queue,
> > > > > > > + dsi->irq_data & irq_flag,
> > > > > > > + jiffies);
> > > > > > > + if (ret == 0) {
> > > > > > > + dev_info(dsi->dev, "Wait DSI IRQ(0x%08x) Timeout\n", irq_flag);
> > > > > > > +
> > > > > > > + mtk_dsi_enable(dsi);
> > > > > > > + mtk_dsi_reset_engine(dsi);
> > > > > > > + }
> > > > > > > +
> > > > > > > + return ret;
> > > > > > > +}
> > > > > >
> > > > > > I think mtk_dsi_irq_data_clear() and mtk_dsi_wait_for_irq_done() should
> > > > > > be moved to the 6th patch [1] of this series because these two functions
> > > > > > deal the irq control.
> > > > > We will move mtk_dsi_irq_data_clear() to patch "drm/mediatek: add dsi
> > > > > interrupt control" and put mtk_dsi_wait_for_irq_done() here, because it
> > > > > is used in the transfer function.
> > > >
> > > > mtk_dsi_irq_data_clear() is also only used in transfer function now. I
> > > > think both function could be used for other application rather than
> > > > transfer function, so these two function are general function for irq
> > > > control.
> > > We will rollback the changes here. Move mtk_dsi_irq_data_clear() to
> > > original place.
> > >
> > > Add new functions could be used in the future will have problems.
> > > warning: 'mtk_dsi_wait_for_irq_done' defined but not used
> > > [-Wunused-function]
> > > static s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi *dsi, u32 irq_flag,
> > > warning: 'mtk_dsi_irq_data_clear' defined but not used
> > > [-Wunused-function]
> > > static void mtk_dsi_irq_data_clear(struct mtk_dsi *dsi, u32 irq_bit)
> >
> > Please refer to [1], '__maybe_unused' can fix your problem.
> >
> > [1]
> > http://lxr.free-electrons.com/source/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c#L76
> Add __maybe_unused just let GCC not produce a warning for this function.
> So you want add patch like this?
>
> [PATCH v7 6/9] drm/mediatek: add dsi interrupt control
> +static __maybe_unused s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi
> *dsi, u32 irq_flag,
>
> +static __maybe_unused void mtk_dsi_irq_data_set(struct mtk_dsi *dsi,
> u32 irq_bit)
>
> [PATCH v7 7/9] drm/mediatek: add dsi transfer function
> -static __maybe_unused s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi
> *dsi, u32 irq_flag,
> +static s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi *dsi, u32 irq_flag,
>
> -static __maybe_unused void mtk_dsi_irq_data_clear(struct mtk_dsi *dsi,
> u32 irq_bit)
> +static void mtk_dsi_irq_data_clear(struct mtk_dsi *dsi, u32 irq_bit)
>
> Put the static function earlier and add __maybe_unused annotations.
> Then remove _maybe_unused annotations later. Or you want to keep
> __maybe_unused annotations inside? Sounds unnecessary, it is different
> from your reference sharp_panel_read().
Removing '__maybe_unused' in later patch looks good to me.
Regards,
CK
>
> >
> > Regards,
> > CK
> >
> > >
> > > > Regards,
> > > > CK
> > > >
> > > > >
> > > > > Regards,
> > > > > yt.shen
> > > > > >
> > > > > >
> > > > > > [1] https://patchwork.kernel.org/patch/9310819/
> > > > > >
> > > > > >
> > > > > > Regards,
> > > > > > CK
> > > > > >
> > > > >
> > > > >
> > > >
> > > >
> > >
> > >
> >
> >
>
>
^ permalink raw reply
* [RFC/PATCH] usb: misc: Add a driver for TC7USB40MU
From: Peter Chen @ 2016-09-14 8:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <147383270635.1464.10706917860873291816@sboyd-linaro>
On Tue, Sep 13, 2016 at 10:58:26PM -0700, Stephen Boyd wrote:
> Quoting Peter Chen (2016-09-13 20:32:00)
> > On Tue, Sep 13, 2016 at 06:42:46PM -0700, Stephen Boyd wrote:
> > > On the db410c 96boards platform we have a TC7USB40MU[1] on the
> > > board to mux the D+/D- lines from the SoC between a micro usb
> > > "device" port and a USB hub for "host" roles. Upon a role switch,
> > > we need to change this mux to forward the D+/D- lines to either
> > > the port or the hub. Therefore, introduce a driver for this
> > > device that intercepts extcon USB_HOST events and logically
> > > asserts a gpio to mux the "host" D+/D- lines when a host cable is
> > > attached. When the cable goes away, it will logically deassert
> > > the gpio and mux the "device" lines.
> >
> > Would you please draw the design? It can also help me review your
> > chipidea patch well.
> >
> > 1. How many ports on the board?
> > 2. How the lines are connected on the board?
> >
>
> The schematic for the db410c is publically available here[2][3].
>
> There's also the 96boards spec[4] which talks about this switch based
> design a little bit. See the section titled "Single USB port Example".
>
> [2] https://github.com/96boards/documentation/blob/master/ConsumerEdition/DragonBoard-410c/HardwareDocs/Schematics_DragonBoard.pdf
> [3] https://github.com/96boards/documentation/raw/master/ConsumerEdition/DragonBoard-410c/HardwareDocs/Schematics_DragonBoard.pdf
> [4] https://www.96boards.org/wp-content/uploads/2015/02/96BoardsCESpecificationv1.0-EA1.pdf
Ok, I see several use cases for this role switch
1. Using the hardware switch (218-4LPST)
In this case, you can set USB_SW_SEL as input gpio, and use
extcon-usb-gpio.c like before, just set this gpio as active
low at dts.
2. Using USB_HS_ID as vbus-gpio (input), and USB_SW_SEL as id-gpio (output)
I can't find hardware relationship between each other, maybe I miss
something.
This use case (design) seems strange, usually, we use ID pin controls
vbus, but seldom use vbus pin control ID.
How you would like to implement it? When the USB cable is connected
(between PC), it receives vbus-gpio interrupt, then you set USB_SW_SEL
as low? If disconnected, you set USB_SW_SEL as high?
When the USB controller works at Host mode, what will happen if the user
connects USB cable at device port?
3. Using sysfs to switch the role
Set USB_SW_SEL according to "role" at debugfs
Which one you would like to implement? Or anything else I miss?
--
Best Regards,
Peter Chen
^ permalink raw reply
* [PATCH v5 0/3] arm64: hibernate: Resume when hibernate image created on non-boot CPU
From: James Morse @ 2016-09-14 8:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1915054.tgNoUpZ8kP@vostro.rjw.lan>
Hi Rafael,
On 14/09/16 02:07, Rafael J. Wysocki wrote:
> What's the status of this?
Will has queued it in his for-next/core branch.
Thanks,
James
^ permalink raw reply
* [PATCH v3 0/6] ARM: dts: bcm283x: add and use pinctrl groups
From: Gerd Hoffmann @ 2016-09-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
New in v3: Fixes in patch #2 (dpi name, drop changelog from commit
message) and patch #5 (drop unused alt3 group), the other patches are
unmodified.
cheers,
Gerd
Eric Anholt (1):
ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
Gerd Hoffmann (5):
pinctrl: bcm2835: add pull defines to dt bindings
ARM: dts: bcm283x: add pinctrl group to &pwm, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio
arch/arm/boot/dts/bcm2835-rpi.dtsi | 15 ++-
arch/arm/boot/dts/bcm283x.dtsi | 203 ++++++++++++++++++++++++++++++++++
drivers/pinctrl/bcm/pinctrl-bcm2835.c | 6 -
include/dt-bindings/pinctrl/bcm2835.h | 5 +
4 files changed, 217 insertions(+), 12 deletions(-)
--
1.8.3.1
^ permalink raw reply
* [PATCH v3 1/6] pinctrl: bcm2835: add pull defines to dt bindings
From: Gerd Hoffmann @ 2016-09-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473841415-937-1-git-send-email-kraxel@redhat.com>
Also delete (unused) private enum from driver.
The pull defines can be used instead if needed.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
drivers/pinctrl/bcm/pinctrl-bcm2835.c | 6 ------
include/dt-bindings/pinctrl/bcm2835.h | 5 +++++
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index fa77165..4cf612b 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -76,12 +76,6 @@ enum bcm2835_pinconf_param {
BCM2835_PINCONF_PARAM_PULL,
};
-enum bcm2835_pinconf_pull {
- BCM2835_PINCONFIG_PULL_NONE,
- BCM2835_PINCONFIG_PULL_DOWN,
- BCM2835_PINCONFIG_PULL_UP,
-};
-
#define BCM2835_PINCONF_PACK(_param_, _arg_) ((_param_) << 16 | (_arg_))
#define BCM2835_PINCONF_UNPACK_PARAM(_conf_) ((_conf_) >> 16)
#define BCM2835_PINCONF_UNPACK_ARG(_conf_) ((_conf_) & 0xffff)
diff --git a/include/dt-bindings/pinctrl/bcm2835.h b/include/dt-bindings/pinctrl/bcm2835.h
index 6f0bc37..e4e4fdf 100644
--- a/include/dt-bindings/pinctrl/bcm2835.h
+++ b/include/dt-bindings/pinctrl/bcm2835.h
@@ -24,4 +24,9 @@
#define BCM2835_FSEL_ALT2 6
#define BCM2835_FSEL_ALT3 7
+/* brcm,pull property */
+#define BCM2835_PUD_OFF 0
+#define BCM2835_PUD_DOWN 1
+#define BCM2835_PUD_UP 2
+
#endif /* __DT_BINDINGS_PINCTRL_BCM2835_H__ */
--
1.8.3.1
^ permalink raw reply related
* [PATCH v3 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
From: Gerd Hoffmann @ 2016-09-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473841415-937-1-git-send-email-kraxel@redhat.com>
From: Eric Anholt <eric@anholt.net>
The BCM2835-ARM-Peripherals.pdf documentation specifies what the
function selects do for the pins, and there are a bunch of obvious
groupings to be made. With these created, we'll be able to replace
bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
references to specific groups we want enabled.
Also add pinctrl groups for emmc and sdhost.
Based on patches by Eric Anholt <eric@anholt.net>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
arch/arm/boot/dts/bcm283x.dtsi | 203 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 203 insertions(+)
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 4d9f3ab..68d559e 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -131,6 +131,209 @@
interrupt-controller;
#interrupt-cells = <2>;
+
+ /* Defines pin muxing groups according to
+ * BCM2835-ARM-Peripherals.pdf page 102.
+ *
+ * While each pin can have its mux selected
+ * for various functions individually, some
+ * groups only make sense to switch to a
+ * particular function together.
+ */
+ dpi_gpio0: dpi_gpio0 {
+ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
+ 12 13 14 15 16 17 18 19
+ 20 21 22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ emmc_gpio22: emmc_gpio22 {
+ brcm,pins = <22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ emmc_gpio34: emmc_gpio34 {
+ brcm,pins = <34 35 36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ brcm,pull = <BCM2835_PUD_OFF
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP>;
+ };
+ emmc_gpio48: emmc_gpio48 {
+ brcm,pins = <48 49 50 51 52 53>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ gpclk0_gpio4: gpclk0_gpio4 {
+ brcm,pins = <4>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio5: gpclk1_gpio5 {
+ brcm,pins = <5>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio42: gpclk1_gpio42 {
+ brcm,pins = <42>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio44: gpclk1_gpio44 {
+ brcm,pins = <44>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk2_gpio6: gpclk2_gpio6 {
+ brcm,pins = <6>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk2_gpio43: gpclk2_gpio43 {
+ brcm,pins = <43>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+ i2c0_gpio0: i2c0_gpio0 {
+ brcm,pins = <0 1>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c0_gpio32: i2c0_gpio32 {
+ brcm,pins = <32 34>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c0_gpio44: i2c0_gpio44 {
+ brcm,pins = <44 45>;
+ brcm,function = <BCM2835_FSEL_ALT1>;
+ };
+ i2c1_gpio2: i2c1_gpio2 {
+ brcm,pins = <2 3>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c1_gpio44: i2c1_gpio44 {
+ brcm,pins = <44 45>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ i2c_slave_gpio18: i2c_slave_gpio18 {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ jtag_gpio4: jtag_gpio4 {
+ brcm,pins = <4 5 6 12 13>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ jtag_gpio22: jtag_gpio22 {
+ brcm,pins = <22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+
+ pcm_gpio18: pcm_gpio18 {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pcm_gpio28: pcm_gpio28 {
+ brcm,pins = <28 29 30 31>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+
+ pwm0_gpio12: pwm0_gpio12 {
+ brcm,pins = <12>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm0_gpio18: pwm0_gpio18 {
+ brcm,pins = <18>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm0_gpio40: pwm0_gpio40 {
+ brcm,pins = <40>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio13: pwm1_gpio13 {
+ brcm,pins = <13>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio19: pwm1_gpio19 {
+ brcm,pins = <19>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm1_gpio41: pwm1_gpio41 {
+ brcm,pins = <41>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio45: pwm1_gpio45 {
+ brcm,pins = <45>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+ sdhost_gpio48: sdhost_gpio48 {
+ brcm,pins = <48 49 50 51 52 53>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+ spi0_gpio7: spi0_gpio7 {
+ brcm,pins = <7 8 9 10 11>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ spi0_gpio35: spi0_gpio35 {
+ brcm,pins = <35 36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ spi1_gpio16: spi1_gpio16 {
+ brcm,pins = <16 17 18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ spi2_gpio40: spi2_gpio40 {
+ brcm,pins = <40 41 42 43 44 45>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+
+ uart0_gpio14: uart0_gpio14 {
+ brcm,pins = <14 15>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ /* Separate from the uart0_gpio14 group
+ * because it conflicts with spi1_gpio16, and
+ * people often run uart0 on the two pins
+ * without flow contrl.
+ */
+ uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
+ brcm,pins = <16 17>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ uart0_gpio30: uart0_gpio30 {
+ brcm,pins = <30 31>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
+ brcm,pins = <32 33>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ uart1_gpio14: uart1_gpio14 {
+ brcm,pins = <14 15>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
+ brcm,pins = <16 17>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_gpio32: uart1_gpio32 {
+ brcm,pins = <32 33>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
+ brcm,pins = <30 31>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_gpio36: uart1_gpio36 {
+ brcm,pins = <36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ uart1_gpio40: uart1_gpio40 {
+ brcm,pins = <40 41>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
+ brcm,pins = <42 43>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
};
uart0: serial at 7e201000 {
--
1.8.3.1
^ permalink raw reply related
* [PATCH v3 3/6] ARM: dts: bcm283x: add pinctrl group to &pwm, drop pins from &gpio
From: Gerd Hoffmann @ 2016-09-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473841415-937-1-git-send-email-kraxel@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 88bcd0c..ff62236 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
};
alt0: alt0 {
- brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 40 45>;
+ brcm,pins = <0 1 2 3 4 5 7 8 9 10 11>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
@@ -68,6 +68,8 @@
};
&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
status = "okay";
};
--
1.8.3.1
^ permalink raw reply related
* [PATCH v3 4/6] ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio
From: Gerd Hoffmann @ 2016-09-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473841415-937-1-git-send-email-kraxel@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index ff62236..b936978 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
};
alt0: alt0 {
- brcm,pins = <0 1 2 3 4 5 7 8 9 10 11>;
+ brcm,pins = <2 3 4 5 7 8 9 10 11>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
@@ -49,6 +49,8 @@
};
&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_gpio0>;
status = "okay";
clock-frequency = <100000>;
};
--
1.8.3.1
^ permalink raw reply related
* [PATCH v3 5/6] ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio
From: Gerd Hoffmann @ 2016-09-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473841415-937-1-git-send-email-kraxel@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index b936978..8688204 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
};
alt0: alt0 {
- brcm,pins = <2 3 4 5 7 8 9 10 11>;
+ brcm,pins = <4 5 7 8 9 10 11>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
@@ -56,6 +56,8 @@
};
&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_gpio2>;
status = "okay";
clock-frequency = <100000>;
};
--
1.8.3.1
^ permalink raw reply related
* [PATCH v3 6/6] ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio
From: Gerd Hoffmann @ 2016-09-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473841415-937-1-git-send-email-kraxel@redhat.com>
As the alt3 group has no pins left after this
update drop the whole alt3 group from &gpio.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 8688204..a46fa41 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -41,11 +41,6 @@
brcm,pins = <4 5 7 8 9 10 11>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
-
- alt3: alt3 {
- brcm,pins = <48 49 50 51 52 53>;
- brcm,function = <BCM2835_FSEL_ALT3>;
- };
};
&i2c0 {
@@ -67,6 +62,8 @@
};
&sdhci {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_gpio48>;
status = "okay";
bus-width = <4>;
};
--
1.8.3.1
^ permalink raw reply related
* ARM, SoC: About the use DT-defined properties by 3rd-party drivers
From: Sebastian Frias @ 2016-09-14 8:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160913154722.GD23336@leverpostej>
Hi Mark,
On 09/13/2016 05:47 PM, Mark Rutland wrote:
>>> If you believe that the bindings don't matter, then there is absolutely
>>> no reason for them to exist in the first place.
>>>
>>> If those binding matter to *anyone*, then those collating the bindings
>>> have some responsibility of stewardship, and that includes
>>> review/maintenance/etc.
>>
>> The thing is that right now it seems the "responsibility of stewardship"
>> lies only within "Linux", whereas DT is proposed as open for everybody,
>> Bootloaders, FreeBSD, etc.
>>
>> In that case, shouldn't the "responsibility" be shared?
>
> Ideally, yes.
>
> Which is one of the reasons devicetree.org was set up as a common forum
> for projects to collaborate on devicetree.
I see, what about using different 'sections' on a DT to allow different
parties be responsible for their 'section'?
- 'generic' sections (i.e.: those using bindings used by Linux drivers)
would be under stewardship of Linux.
- 'specific' sections (i.e.: my example, bindings *not used by Linux*, but
they could be bindings for other OSs as you said) would be under a
different stewardship.
DT seems essentially free-form, like XML.
One could imagine that some tool could then be used to guarantee that
some parts of DT conform to a given XML schema, including backwards
compatibility, while at the same time ignoring 'staging'/'specific' stuff.
NOTE: this appears to be possible using 'overlays' as Warner suggested, but
in that case not all parts are public, which limits public information.
Best regards,
Sebastian
^ permalink raw reply
* [GIT PULL] ARM: at91: dt for 4.9
From: Alexandre Belloni @ 2016-09-14 8:28 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd, Olof
Only a single DT patch for this release:
The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc:
Linux 4.8-rc1 (2016-08-07 18:18:00 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git tags/at91-ab-4.9-dt1
for you to fetch changes up to e46f48ad86f4483dfaa5947a7b7dbd4a63b0398a:
ARM: dts: at91: sama5d2: add ETM and ETB nodes (2016-08-08 12:08:00 +0200)
----------------------------------------------------------------
DT Changes for 4.9:
- add ETM and ETB nodes on sama5d2
----------------------------------------------------------------
Olivier Schonken (1):
ARM: dts: at91: sama5d2: add ETM and ETB nodes
arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
--
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* [PATCH v9 01/19] remoteproc: st_slim_rproc: add a slimcore rproc driver
From: Lee Jones @ 2016-09-14 8:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160913175656.GC21438@tuxbot>
On Tue, 13 Sep 2016, Bjorn Andersson wrote:
> On Mon 05 Sep 06:16 PDT 2016, Peter Griffin wrote:
>
> > slim core is used as a basis for many IPs in the STi
> > chipsets such as fdma and demux. To avoid duplicating
> > the elf loading code in each device driver a slim
> > rproc driver has been created.
> >
> > This driver is designed to be used by other device drivers
> > such as fdma, or demux whose IP is based around a slim core.
> > The device driver can call slim_rproc_alloc() to allocate
> > a slim rproc and slim_rproc_put() when finished.
> >
> > This driver takes care of ioremapping the slim
> > registers (dmem, imem, slimcore, peripherals), whose offsets
> > and sizes can change between IP's. It also obtains and enables
> > any clocks used by the device. This approach avoids having
> > a double mapping of the registers as slim_rproc does not register
> > its own platform device. It also maps well to device tree
> > abstraction as it allows us to have one dt node for the whole
> > device.
> >
> > All of the generic rproc elf loading code can be reused, and
> > we provide start() stop() hooks to start and stop the slim
> > core once the firmware has been loaded. This has been tested
> > successfully with fdma driver.
> >
> > Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
>
> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
What's preventing this from being applied right away?
> > ---
> > drivers/remoteproc/Kconfig | 4 +
> > drivers/remoteproc/Makefile | 1 +
> > drivers/remoteproc/st_slim_rproc.c | 364 +++++++++++++++++++++++++++++++
> > include/linux/remoteproc/st_slim_rproc.h | 58 +++++
> > 4 files changed, 427 insertions(+)
> > create mode 100644 drivers/remoteproc/st_slim_rproc.c
> > create mode 100644 include/linux/remoteproc/st_slim_rproc.h
> >
> > diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
> > index 1a8bf76a..a7bedc6 100644
> > --- a/drivers/remoteproc/Kconfig
> > +++ b/drivers/remoteproc/Kconfig
> > @@ -100,4 +100,8 @@ config ST_REMOTEPROC
> > processor framework.
> > This can be either built-in or a loadable module.
> >
> > +config ST_SLIM_REMOTEPROC
> > + tristate
> > + select REMOTEPROC
> > +
> > endmenu
> > diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
> > index 92d3758..db1dae7 100644
> > --- a/drivers/remoteproc/Makefile
> > +++ b/drivers/remoteproc/Makefile
> > @@ -14,3 +14,4 @@ obj-$(CONFIG_DA8XX_REMOTEPROC) += da8xx_remoteproc.o
> > obj-$(CONFIG_QCOM_MDT_LOADER) += qcom_mdt_loader.o
> > obj-$(CONFIG_QCOM_Q6V5_PIL) += qcom_q6v5_pil.o
> > obj-$(CONFIG_ST_REMOTEPROC) += st_remoteproc.o
> > +obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o
> > diff --git a/drivers/remoteproc/st_slim_rproc.c b/drivers/remoteproc/st_slim_rproc.c
> > new file mode 100644
> > index 0000000..1484e97
> > --- /dev/null
> > +++ b/drivers/remoteproc/st_slim_rproc.c
> > @@ -0,0 +1,364 @@
> > +/*
> > + * SLIM core rproc driver
> > + *
> > + * Copyright (C) 2016 STMicroelectronics
> > + *
> > + * Author: Peter Griffin <peter.griffin@linaro.org>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + */
> > +
> > +#include <linux/clk.h>
> > +#include <linux/err.h>
> > +#include <linux/kernel.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/of_device.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/remoteproc.h>
> > +#include <linux/remoteproc/st_slim_rproc.h>
> > +#include "remoteproc_internal.h"
> > +
> > +/* SLIM core registers */
> > +#define SLIM_ID_OFST 0x0
> > +#define SLIM_VER_OFST 0x4
> > +
> > +#define SLIM_EN_OFST 0x8
> > +#define SLIM_EN_RUN BIT(0)
> > +
> > +#define SLIM_CLK_GATE_OFST 0xC
> > +#define SLIM_CLK_GATE_DIS BIT(0)
> > +#define SLIM_CLK_GATE_RESET BIT(2)
> > +
> > +#define SLIM_SLIM_PC_OFST 0x20
> > +
> > +/* DMEM registers */
> > +#define SLIM_REV_ID_OFST 0x0
> > +#define SLIM_REV_ID_MIN_MASK GENMASK(15, 8)
> > +#define SLIM_REV_ID_MIN(id) ((id & SLIM_REV_ID_MIN_MASK) >> 8)
> > +#define SLIM_REV_ID_MAJ_MASK GENMASK(23, 16)
> > +#define SLIM_REV_ID_MAJ(id) ((id & SLIM_REV_ID_MAJ_MASK) >> 16)
> > +
> > +
> > +/* peripherals registers */
> > +#define SLIM_STBUS_SYNC_OFST 0xF88
> > +#define SLIM_STBUS_SYNC_DIS BIT(0)
> > +
> > +#define SLIM_INT_SET_OFST 0xFD4
> > +#define SLIM_INT_CLR_OFST 0xFD8
> > +#define SLIM_INT_MASK_OFST 0xFDC
> > +
> > +#define SLIM_CMD_CLR_OFST 0xFC8
> > +#define SLIM_CMD_MASK_OFST 0xFCC
> > +
> > +static const char *mem_names[ST_SLIM_MEM_MAX] = {
> > + [ST_SLIM_DMEM] = "dmem",
> > + [ST_SLIM_IMEM] = "imem",
> > +};
> > +
> > +static int slim_clk_get(struct st_slim_rproc *slim_rproc, struct device *dev)
> > +{
> > + int clk, err;
> > +
> > + for (clk = 0; clk < ST_SLIM_MAX_CLK; clk++) {
> > + slim_rproc->clks[clk] = of_clk_get(dev->of_node, clk);
> > + if (IS_ERR(slim_rproc->clks[clk])) {
> > + err = PTR_ERR(slim_rproc->clks[clk]);
> > + if (err == -EPROBE_DEFER)
> > + goto err_put_clks;
> > + slim_rproc->clks[clk] = NULL;
> > + break;
> > + }
> > + }
> > +
> > + return 0;
> > +
> > +err_put_clks:
> > + while (--clk >= 0)
> > + clk_put(slim_rproc->clks[clk]);
> > +
> > + return err;
> > +}
> > +
> > +static void slim_clk_disable(struct st_slim_rproc *slim_rproc)
> > +{
> > + int clk;
> > +
> > + for (clk = 0; clk < ST_SLIM_MAX_CLK && slim_rproc->clks[clk]; clk++)
> > + clk_disable_unprepare(slim_rproc->clks[clk]);
> > +}
> > +
> > +static int slim_clk_enable(struct st_slim_rproc *slim_rproc)
> > +{
> > + int clk, ret;
> > +
> > + for (clk = 0; clk < ST_SLIM_MAX_CLK && slim_rproc->clks[clk]; clk++) {
> > + ret = clk_prepare_enable(slim_rproc->clks[clk]);
> > + if (ret)
> > + goto err_disable_clks;
> > + }
> > +
> > + return 0;
> > +
> > +err_disable_clks:
> > + while (--clk >= 0)
> > + clk_disable_unprepare(slim_rproc->clks[clk]);
> > +
> > + return ret;
> > +}
> > +
> > +/*
> > + * Remoteproc slim specific device handlers
> > + */
> > +static int slim_rproc_start(struct rproc *rproc)
> > +{
> > + struct device *dev = &rproc->dev;
> > + struct st_slim_rproc *slim_rproc = rproc->priv;
> > + unsigned long hw_id, hw_ver, fw_rev;
> > + u32 val;
> > +
> > + /* disable CPU pipeline clock & reset CPU pipeline */
> > + val = SLIM_CLK_GATE_DIS | SLIM_CLK_GATE_RESET;
> > + writel(val, slim_rproc->slimcore + SLIM_CLK_GATE_OFST);
> > +
> > + /* disable SLIM core STBus sync */
> > + writel(SLIM_STBUS_SYNC_DIS, slim_rproc->peri + SLIM_STBUS_SYNC_OFST);
> > +
> > + /* enable cpu pipeline clock */
> > + writel(!SLIM_CLK_GATE_DIS,
> > + slim_rproc->slimcore + SLIM_CLK_GATE_OFST);
> > +
> > + /* clear int & cmd mailbox */
> > + writel(~0U, slim_rproc->peri + SLIM_INT_CLR_OFST);
> > + writel(~0U, slim_rproc->peri + SLIM_CMD_CLR_OFST);
> > +
> > + /* enable all channels cmd & int */
> > + writel(~0U, slim_rproc->peri + SLIM_INT_MASK_OFST);
> > + writel(~0U, slim_rproc->peri + SLIM_CMD_MASK_OFST);
> > +
> > + /* enable cpu */
> > + writel(SLIM_EN_RUN, slim_rproc->slimcore + SLIM_EN_OFST);
> > +
> > + hw_id = readl_relaxed(slim_rproc->slimcore + SLIM_ID_OFST);
> > + hw_ver = readl_relaxed(slim_rproc->slimcore + SLIM_VER_OFST);
> > +
> > + fw_rev = readl(slim_rproc->mem[ST_SLIM_DMEM].cpu_addr +
> > + SLIM_REV_ID_OFST);
> > +
> > + dev_info(dev, "fw rev:%ld.%ld on SLIM %ld.%ld\n",
> > + SLIM_REV_ID_MAJ(fw_rev), SLIM_REV_ID_MIN(fw_rev),
> > + hw_id, hw_ver);
> > +
> > + return 0;
> > +}
> > +
> > +static int slim_rproc_stop(struct rproc *rproc)
> > +{
> > + struct st_slim_rproc *slim_rproc = rproc->priv;
> > + u32 val;
> > +
> > + /* mask all (cmd & int) channels */
> > + writel(0UL, slim_rproc->peri + SLIM_INT_MASK_OFST);
> > + writel(0UL, slim_rproc->peri + SLIM_CMD_MASK_OFST);
> > +
> > + /* disable cpu pipeline clock */
> > + writel(SLIM_CLK_GATE_DIS, slim_rproc->slimcore + SLIM_CLK_GATE_OFST);
> > +
> > + writel(!SLIM_EN_RUN, slim_rproc->slimcore + SLIM_EN_OFST);
> > +
> > + val = readl(slim_rproc->slimcore + SLIM_EN_OFST);
> > + if (val & SLIM_EN_RUN)
> > + dev_warn(&rproc->dev, "Failed to disable SLIM");
> > +
> > + dev_dbg(&rproc->dev, "slim stopped\n");
> > +
> > + return 0;
> > +}
> > +
> > +static void *slim_rproc_da_to_va(struct rproc *rproc, u64 da, int len)
> > +{
> > + struct st_slim_rproc *slim_rproc = rproc->priv;
> > + void *va = NULL;
> > + int i;
> > +
> > + for (i = 0; i < ST_SLIM_MEM_MAX; i++) {
> > + if (da != slim_rproc->mem[i].bus_addr)
> > + continue;
> > +
> > + if (len <= slim_rproc->mem[i].size) {
> > + /* __force to make sparse happy with type conversion */
> > + va = (__force void *)slim_rproc->mem[i].cpu_addr;
> > + break;
> > + }
> > + }
> > +
> > + dev_dbg(&rproc->dev, "da = 0x%llx len = 0x%x va = 0x%p\n", da, len, va);
> > +
> > + return va;
> > +}
> > +
> > +static struct rproc_ops slim_rproc_ops = {
> > + .start = slim_rproc_start,
> > + .stop = slim_rproc_stop,
> > + .da_to_va = slim_rproc_da_to_va,
> > +};
> > +
> > +/*
> > + * Firmware handler operations: sanity, boot address, load ...
> > + */
> > +
> > +static struct resource_table empty_rsc_tbl = {
> > + .ver = 1,
> > + .num = 0,
> > +};
> > +
> > +static struct resource_table *slim_rproc_find_rsc_table(struct rproc *rproc,
> > + const struct firmware *fw,
> > + int *tablesz)
> > +{
> > + *tablesz = sizeof(empty_rsc_tbl);
> > + return &empty_rsc_tbl;
> > +}
> > +
> > +static struct rproc_fw_ops slim_rproc_fw_ops = {
> > + .find_rsc_table = slim_rproc_find_rsc_table,
> > +};
> > +
> > +/**
> > + * st_slim_rproc_alloc() - allocate and initialise slim rproc
> > + * @pdev: Pointer to the platform_device struct
> > + * @fw_name: Name of firmware for rproc to use
> > + *
> > + * Function for allocating and initialising a slim rproc for use by
> > + * device drivers whose IP is based around the SLIM core. It
> > + * obtains and enables any clocks required by the SLIM core and also
> > + * ioremaps the various IO.
> > + *
> > + * Returns st_slim_rproc pointer or PTR_ERR() on error.
> > + */
> > +
> > +struct st_slim_rproc *st_slim_rproc_alloc(struct platform_device *pdev,
> > + char *fw_name)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct st_slim_rproc *slim_rproc;
> > + struct device_node *np = dev->of_node;
> > + struct rproc *rproc;
> > + struct resource *res;
> > + int err, i;
> > + const struct rproc_fw_ops *elf_ops;
> > +
> > + if (!fw_name)
> > + return ERR_PTR(-EINVAL);
> > +
> > + if (!of_device_is_compatible(np, "st,slim-rproc"))
> > + return ERR_PTR(-EINVAL);
> > +
> > + rproc = rproc_alloc(dev, np->name, &slim_rproc_ops,
> > + fw_name, sizeof(*slim_rproc));
> > + if (!rproc)
> > + return ERR_PTR(-ENOMEM);
> > +
> > + rproc->has_iommu = false;
> > +
> > + slim_rproc = rproc->priv;
> > + slim_rproc->rproc = rproc;
> > +
> > + elf_ops = rproc->fw_ops;
> > + /* Use some generic elf ops */
> > + slim_rproc_fw_ops.load = elf_ops->load;
> > + slim_rproc_fw_ops.sanity_check = elf_ops->sanity_check;
> > +
> > + rproc->fw_ops = &slim_rproc_fw_ops;
> > +
> > + /* get imem and dmem */
> > + for (i = 0; i < ARRAY_SIZE(mem_names); i++) {
> > + res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
> > + mem_names[i]);
> > +
> > + slim_rproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res);
> > + if (IS_ERR(slim_rproc->mem[i].cpu_addr)) {
> > + dev_err(&pdev->dev, "devm_ioremap_resource failed\n");
> > + err = PTR_ERR(slim_rproc->mem[i].cpu_addr);
> > + goto err;
> > + }
> > + slim_rproc->mem[i].bus_addr = res->start;
> > + slim_rproc->mem[i].size = resource_size(res);
> > + }
> > +
> > + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "slimcore");
> > + slim_rproc->slimcore = devm_ioremap_resource(dev, res);
> > + if (IS_ERR(slim_rproc->slimcore)) {
> > + dev_err(&pdev->dev, "failed to ioremap slimcore IO\n");
> > + err = PTR_ERR(slim_rproc->slimcore);
> > + goto err;
> > + }
> > +
> > + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "peripherals");
> > + slim_rproc->peri = devm_ioremap_resource(dev, res);
> > + if (IS_ERR(slim_rproc->peri)) {
> > + dev_err(&pdev->dev, "failed to ioremap peripherals IO\n");
> > + err = PTR_ERR(slim_rproc->peri);
> > + goto err;
> > + }
> > +
> > + err = slim_clk_get(slim_rproc, dev);
> > + if (err)
> > + goto err;
> > +
> > + err = slim_clk_enable(slim_rproc);
> > + if (err) {
> > + dev_err(dev, "Failed to enable clocks\n");
> > + goto err_clk_put;
> > + }
> > +
> > + /* Register as a remoteproc device */
> > + err = rproc_add(rproc);
> > + if (err) {
> > + dev_err(dev, "registration of slim remoteproc failed\n");
> > + goto err_clk_dis;
> > + }
> > +
> > + return slim_rproc;
> > +
> > +err_clk_dis:
> > + slim_clk_disable(slim_rproc);
> > +err_clk_put:
> > + for (i = 0; i < ST_SLIM_MAX_CLK && slim_rproc->clks[i]; i++)
> > + clk_put(slim_rproc->clks[i]);
> > +err:
> > + rproc_put(rproc);
> > + return ERR_PTR(err);
> > +}
> > +EXPORT_SYMBOL(st_slim_rproc_alloc);
> > +
> > +/**
> > + * st_slim_rproc_put() - put slim rproc resources
> > + * @slim_rproc: Pointer to the st_slim_rproc struct
> > + *
> > + * Function for calling respective _put() functions on slim_rproc resources.
> > + *
> > + */
> > +void st_slim_rproc_put(struct st_slim_rproc *slim_rproc)
> > +{
> > + int clk;
> > +
> > + if (!slim_rproc)
> > + return;
> > +
> > + slim_clk_disable(slim_rproc);
> > +
> > + for (clk = 0; clk < ST_SLIM_MAX_CLK && slim_rproc->clks[clk]; clk++)
> > + clk_put(slim_rproc->clks[clk]);
> > +
> > + rproc_del(slim_rproc->rproc);
> > + rproc_put(slim_rproc->rproc);
> > +}
> > +EXPORT_SYMBOL(st_slim_rproc_put);
> > +
> > +MODULE_AUTHOR("Peter Griffin <peter.griffin@linaro.org>");
> > +MODULE_DESCRIPTION("STMicroelectronics SLIM core rproc driver");
> > +MODULE_LICENSE("GPL v2");
> > diff --git a/include/linux/remoteproc/st_slim_rproc.h b/include/linux/remoteproc/st_slim_rproc.h
> > new file mode 100644
> > index 0000000..4155556
> > --- /dev/null
> > +++ b/include/linux/remoteproc/st_slim_rproc.h
> > @@ -0,0 +1,58 @@
> > +/*
> > + * SLIM core rproc driver header
> > + *
> > + * Copyright (C) 2016 STMicroelectronics
> > + *
> > + * Author: Peter Griffin <peter.griffin@linaro.org>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + */
> > +#ifndef _ST_REMOTEPROC_SLIM_H
> > +#define _ST_REMOTEPROC_SLIM_H
> > +
> > +#define ST_SLIM_MEM_MAX 2
> > +#define ST_SLIM_MAX_CLK 4
> > +
> > +enum {
> > + ST_SLIM_DMEM,
> > + ST_SLIM_IMEM,
> > +};
> > +
> > +/**
> > + * struct st_slim_mem - slim internal memory structure
> > + * @cpu_addr: MPU virtual address of the memory region
> > + * @bus_addr: Bus address used to access the memory region
> > + * @size: Size of the memory region
> > + */
> > +struct st_slim_mem {
> > + void __iomem *cpu_addr;
> > + phys_addr_t bus_addr;
> > + size_t size;
> > +};
> > +
> > +/**
> > + * struct st_slim_rproc - SLIM slim core
> > + * @rproc: rproc handle
> > + * @mem: slim memory information
> > + * @slimcore: slim slimcore regs
> > + * @peri: slim peripheral regs
> > + * @clks: slim clocks
> > + */
> > +struct st_slim_rproc {
> > + struct rproc *rproc;
> > + struct st_slim_mem mem[ST_SLIM_MEM_MAX];
> > + void __iomem *slimcore;
> > + void __iomem *peri;
> > +
> > + /* st_slim_rproc private */
> > + struct clk *clks[ST_SLIM_MAX_CLK];
> > +};
> > +
> > +struct st_slim_rproc *st_slim_rproc_alloc(struct platform_device *pdev,
> > + char *fw_name);
> > +void st_slim_rproc_put(struct st_slim_rproc *slim_rproc);
> > +
> > +#endif
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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