* [PATCH 1/1] ARM: imx5: Add clocks configuration
From: Shawn Guo @ 2016-09-18 0:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160918002159.GD15478@tiger>
On Sun, Sep 18, 2016 at 08:21:59AM +0800, Shawn Guo wrote:
> On Thu, Sep 15, 2016 at 08:42:33PM +0300, Alexander Shiyan wrote:
> > >???????, 15 ???????? 2016, 13:13 +03:00 ?? Fabien Lahoudere <fabien.lahoudere@collabora.co.uk>:
> > >
> > >From: Kalle Kankare < kalle.kankare@vincit.fi >
> > >
> > >Add clocks configuration for CSI, FIRI and IEEE1588.
> > >
> > >Signed-off-by: Fabien Lahoudere < fabien.lahoudere@collabora.co.uk >
> > >---
> > >?drivers/clk/imx/clk-imx51-imx53.c | 20 ++++++++++++++++++++
> > >?include/dt-bindings/clock/imx5-clock.h | 15 ++++++++++++++-
> > >?2 files changed, 34 insertions(+), 1 deletion(-)
> > >
> > >diff --git a/drivers/clk/imx/clk-imx51-imx53.c b/drivers/clk/imx/clk-imx51-imx53.c
> > >index 29d4c44..1e3c9ea 100644
> > >--- a/drivers/clk/imx/clk-imx51-imx53.c
> > >+++ b/drivers/clk/imx/clk-imx51-imx53.c
> > >@@ -126,6 +126,7 @@ static const char *spdif0_com_sel[] = { "spdif0_podf", "ssi1_root_gate", };
> > >?static const char *mx51_spdif1_com_sel[] = { "spdif1_podf", "ssi2_root_gate", };
> > >?static const char *step_sels[] = { "lp_apm", };
> > >?static const char *cpu_podf_sels[] = { "pll1_sw", "step_sel" };
> > >+static const char *ieee1588_sels[] = { "pll3_sw", "pll4_sw", "dummy" /* usbphy2_clk */, "dummy" /* fec_phy_clk */ };
> > >?
> > >?static struct clk *clk[IMX5_CLK_END];
> > >?static struct clk_onecell_data clk_data;
> > >@@ -543,6 +544,25 @@ static void __init mx53_clocks_init(struct device_node *np)
> > ...
> >
> > 2 Shawn Guo: Since the change affects only on i.MX53 architecture,
> > I would ask to change the subject to i.MX53 if it possible.
>
> Yes. Actually, since clock driver is not moved to drivers/clk, we
s/not/now
> shouldn't prefix it with "ARM: " any longer.
Shawn
^ permalink raw reply
* [PATCH 1/1] ARM: imx5: Add clocks configuration
From: Shawn Guo @ 2016-09-18 0:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473961353.68713919@f429.i.mail.ru>
On Thu, Sep 15, 2016 at 08:42:33PM +0300, Alexander Shiyan wrote:
> >???????, 15 ???????? 2016, 13:13 +03:00 ?? Fabien Lahoudere <fabien.lahoudere@collabora.co.uk>:
> >
> >From: Kalle Kankare < kalle.kankare@vincit.fi >
> >
> >Add clocks configuration for CSI, FIRI and IEEE1588.
> >
> >Signed-off-by: Fabien Lahoudere < fabien.lahoudere@collabora.co.uk >
> >---
> >?drivers/clk/imx/clk-imx51-imx53.c | 20 ++++++++++++++++++++
> >?include/dt-bindings/clock/imx5-clock.h | 15 ++++++++++++++-
> >?2 files changed, 34 insertions(+), 1 deletion(-)
> >
> >diff --git a/drivers/clk/imx/clk-imx51-imx53.c b/drivers/clk/imx/clk-imx51-imx53.c
> >index 29d4c44..1e3c9ea 100644
> >--- a/drivers/clk/imx/clk-imx51-imx53.c
> >+++ b/drivers/clk/imx/clk-imx51-imx53.c
> >@@ -126,6 +126,7 @@ static const char *spdif0_com_sel[] = { "spdif0_podf", "ssi1_root_gate", };
> >?static const char *mx51_spdif1_com_sel[] = { "spdif1_podf", "ssi2_root_gate", };
> >?static const char *step_sels[] = { "lp_apm", };
> >?static const char *cpu_podf_sels[] = { "pll1_sw", "step_sel" };
> >+static const char *ieee1588_sels[] = { "pll3_sw", "pll4_sw", "dummy" /* usbphy2_clk */, "dummy" /* fec_phy_clk */ };
> >?
> >?static struct clk *clk[IMX5_CLK_END];
> >?static struct clk_onecell_data clk_data;
> >@@ -543,6 +544,25 @@ static void __init mx53_clocks_init(struct device_node *np)
> ...
>
> 2 Shawn Guo: Since the change affects only on i.MX53 architecture,
> I would ask to change the subject to i.MX53 if it possible.
Yes. Actually, since clock driver is not moved to drivers/clk, we
shouldn't prefix it with "ARM: " any longer.
Shawn
^ permalink raw reply
* [PATCH 2/2] clk: imx6: initialize GPU clocks
From: Shawn Guo @ 2016-09-18 0:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474017371-28966-2-git-send-email-l.stach@pengutronix.de>
On Fri, Sep 16, 2016 at 11:16:11AM +0200, Lucas Stach wrote:
> Initialize the GPU clock muxes to sane inputs. Until now they have
> not been changed from their default values, which means that both
> GPU3D shader and GPU2D core were fed by clock inputs whose rates
> exceed the maximium allowed frequency of the cores by as much as
> 200MHz.
>
> This fixes a severe GPU stability issue on i.MX6DL.
>
> Cc: stable at vger.kernel.org
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> drivers/clk/imx/clk-imx6q.c | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
> index 64c243173395..751c3e7d5843 100644
> --- a/drivers/clk/imx/clk-imx6q.c
> +++ b/drivers/clk/imx/clk-imx6q.c
> @@ -633,6 +633,24 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
> if (IS_ENABLED(CONFIG_PCI_IMX6))
> clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]);
>
> + /*
> + * Initialize the GPU clock muxes, so that the maximum specified clock
> + * rates for the respective SoC are not exceeded.
> + */
> + if (clk_on_imx6dl()) {
> + clk_set_parent(clk[IMX6QDL_CLK_GPU3D_CORE_SEL],
> + clk[IMX6QDL_CLK_PLL2_PFD1_594M]);
> + clk_set_parent(clk[IMX6QDL_CLK_GPU2D_CORE_SEL],
> + clk[IMX6QDL_CLK_PLL2_PFD1_594M]);
> + } else if (clk_on_imx6q()) {
> + clk_set_parent(clk[IMX6QDL_CLK_GPU3D_CORE_SEL],
> + clk[IMX6QDL_CLK_MMDC_CH0_AXI]);
> + clk_set_parent(clk[IMX6QDL_CLK_GPU3D_SHADER_SEL],
> + clk[IMX6QDL_CLK_PLL2_PFD1_594M]);
> + clk_set_parent(clk[IMX6QDL_CLK_GPU2D_CORE_SEL],
> + clk[IMX6QDL_CLK_PLL3_USB_OTG]);
> + }
> +
Can we handle these with assigned-clock-parents from device tree?
Shawn
> imx_register_uart_clocks(uart_clks);
> }
> CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init);
> --
> 2.8.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH 1/2] clk: imx6: fix i.MX6DL clock tree to reflect reality
From: Shawn Guo @ 2016-09-18 0:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474017371-28966-1-git-send-email-l.stach@pengutronix.de>
Hi Anson,
Can you please help review/confirm the following clock tree changes
for i.MX6DL? Thanks.
Shawn
On Fri, Sep 16, 2016 at 11:16:10AM +0200, Lucas Stach wrote:
> The current clock tree only implements the minimal set of differences
> between the i.MX6Q and the i.MX6DL, but that doesn't really reflect
> reality.
>
> Apply the following fixes to match the RM:
> - DL has no GPU3D_SHADER_SEL/PODF, the shader domain is clocked by
> GPU3D_CORE
> - GPU3D_SHADER_SEL/PODF has been repurposed as GPU2D_CORE_SEL/PODF
> - GPU2D_CORE_SEL/PODF has been repurposed as MLB_SEL/PODF
>
> Cc: stable at vger.kernel.org
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> drivers/clk/imx/clk-imx6q.c | 28 ++++++++++++++++------------
> include/dt-bindings/clock/imx6qdl-clock.h | 4 +++-
> 2 files changed, 19 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
> index ba1c1ae72ac2..64c243173395 100644
> --- a/drivers/clk/imx/clk-imx6q.c
> +++ b/drivers/clk/imx/clk-imx6q.c
> @@ -318,11 +318,16 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
> clk[IMX6QDL_CLK_IPG_PER_SEL] = imx_clk_mux("ipg_per_sel", base + 0x1c, 6, 1, ipg_per_sels, ARRAY_SIZE(ipg_per_sels));
> clk[IMX6QDL_CLK_UART_SEL] = imx_clk_mux("uart_sel", base + 0x24, 6, 1, uart_sels, ARRAY_SIZE(uart_sels));
> clk[IMX6QDL_CLK_GPU2D_CORE_SEL] = imx_clk_mux("gpu2d_core_sel", base + 0x18, 16, 2, gpu2d_core_sels_2, ARRAY_SIZE(gpu2d_core_sels_2));
> + } else if (clk_on_imx6dl()) {
> + clk[IMX6QDL_CLK_MLB_SEL] = imx_clk_mux("mlb_sel", base + 0x18, 16, 2, gpu2d_core_sels, ARRAY_SIZE(gpu2d_core_sels));
> } else {
> clk[IMX6QDL_CLK_GPU2D_CORE_SEL] = imx_clk_mux("gpu2d_core_sel", base + 0x18, 16, 2, gpu2d_core_sels, ARRAY_SIZE(gpu2d_core_sels));
> }
> clk[IMX6QDL_CLK_GPU3D_CORE_SEL] = imx_clk_mux("gpu3d_core_sel", base + 0x18, 4, 2, gpu3d_core_sels, ARRAY_SIZE(gpu3d_core_sels));
> - clk[IMX6QDL_CLK_GPU3D_SHADER_SEL] = imx_clk_mux("gpu3d_shader_sel", base + 0x18, 8, 2, gpu3d_shader_sels, ARRAY_SIZE(gpu3d_shader_sels));
> + if (clk_on_imx6dl())
> + clk[IMX6QDL_CLK_GPU2D_CORE_SEL] = imx_clk_mux("gpu2d_core_sel", base + 0x18, 8, 2, gpu3d_shader_sels, ARRAY_SIZE(gpu3d_shader_sels));
> + else
> + clk[IMX6QDL_CLK_GPU3D_SHADER_SEL] = imx_clk_mux("gpu3d_shader_sel", base + 0x18, 8, 2, gpu3d_shader_sels, ARRAY_SIZE(gpu3d_shader_sels));
> clk[IMX6QDL_CLK_IPU1_SEL] = imx_clk_mux("ipu1_sel", base + 0x3c, 9, 2, ipu_sels, ARRAY_SIZE(ipu_sels));
> clk[IMX6QDL_CLK_IPU2_SEL] = imx_clk_mux("ipu2_sel", base + 0x3c, 14, 2, ipu_sels, ARRAY_SIZE(ipu_sels));
> clk[IMX6QDL_CLK_LDB_DI0_SEL] = imx_clk_mux_flags("ldb_di0_sel", base + 0x2c, 9, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels), CLK_SET_RATE_PARENT);
> @@ -400,9 +405,15 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
> clk[IMX6QDL_CLK_LDB_DI0_DIV_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);
> clk[IMX6QDL_CLK_LDB_DI1_DIV_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7);
> }
> - clk[IMX6QDL_CLK_GPU2D_CORE_PODF] = imx_clk_divider("gpu2d_core_podf", "gpu2d_core_sel", base + 0x18, 23, 3);
> + if (clk_on_imx6dl())
> + clk[IMX6QDL_CLK_MLB_PODF] = imx_clk_divider("mlb_podf", "mlb_sel", base + 0x18, 23, 3);
> + else
> + clk[IMX6QDL_CLK_GPU2D_CORE_PODF] = imx_clk_divider("gpu2d_core_podf", "gpu2d_core_sel", base + 0x18, 23, 3);
> clk[IMX6QDL_CLK_GPU3D_CORE_PODF] = imx_clk_divider("gpu3d_core_podf", "gpu3d_core_sel", base + 0x18, 26, 3);
> - clk[IMX6QDL_CLK_GPU3D_SHADER] = imx_clk_divider("gpu3d_shader", "gpu3d_shader_sel", base + 0x18, 29, 3);
> + if (clk_on_imx6dl())
> + clk[IMX6QDL_CLK_GPU2D_CORE_PODF] = imx_clk_divider("gpu2d_core_podf", "gpu2d_core_sel", base + 0x18, 29, 3);
> + else
> + clk[IMX6QDL_CLK_GPU3D_SHADER] = imx_clk_divider("gpu3d_shader", "gpu3d_shader_sel", base + 0x18, 29, 3);
> clk[IMX6QDL_CLK_IPU1_PODF] = imx_clk_divider("ipu1_podf", "ipu1_sel", base + 0x3c, 11, 3);
> clk[IMX6QDL_CLK_IPU2_PODF] = imx_clk_divider("ipu2_podf", "ipu2_sel", base + 0x3c, 16, 3);
> clk[IMX6QDL_CLK_LDB_DI0_PODF] = imx_clk_divider_flags("ldb_di0_podf", "ldb_di0_div_3_5", base + 0x20, 10, 1, 0);
> @@ -473,14 +484,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
> clk[IMX6QDL_CLK_ESAI_MEM] = imx_clk_gate2_shared("esai_mem", "ahb", base + 0x6c, 16, &share_count_esai);
> clk[IMX6QDL_CLK_GPT_IPG] = imx_clk_gate2("gpt_ipg", "ipg", base + 0x6c, 20);
> clk[IMX6QDL_CLK_GPT_IPG_PER] = imx_clk_gate2("gpt_ipg_per", "ipg_per", base + 0x6c, 22);
> - if (clk_on_imx6dl())
> - /*
> - * The multiplexer and divider of imx6q clock gpu3d_shader get
> - * redefined/reused as gpu2d_core_sel and gpu2d_core_podf on imx6dl.
> - */
> - clk[IMX6QDL_CLK_GPU2D_CORE] = imx_clk_gate2("gpu2d_core", "gpu3d_shader", base + 0x6c, 24);
> - else
> - clk[IMX6QDL_CLK_GPU2D_CORE] = imx_clk_gate2("gpu2d_core", "gpu2d_core_podf", base + 0x6c, 24);
> + clk[IMX6QDL_CLK_GPU2D_CORE] = imx_clk_gate2("gpu2d_core", "gpu2d_core_podf", base + 0x6c, 24);
> clk[IMX6QDL_CLK_GPU3D_CORE] = imx_clk_gate2("gpu3d_core", "gpu3d_core_podf", base + 0x6c, 26);
> clk[IMX6QDL_CLK_HDMI_IAHB] = imx_clk_gate2("hdmi_iahb", "ahb", base + 0x70, 0);
> clk[IMX6QDL_CLK_HDMI_ISFR] = imx_clk_gate2("hdmi_isfr", "video_27m", base + 0x70, 4);
> @@ -511,7 +515,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
> * The multiplexer and divider of the imx6q clock gpu2d get
> * redefined/reused as mlb_sys_sel and mlb_sys_clk_podf on imx6dl.
> */
> - clk[IMX6QDL_CLK_MLB] = imx_clk_gate2("mlb", "gpu2d_core_podf", base + 0x74, 18);
> + clk[IMX6QDL_CLK_MLB] = imx_clk_gate2("mlb", "mlb_podf", base + 0x74, 18);
> else
> clk[IMX6QDL_CLK_MLB] = imx_clk_gate2("mlb", "axi", base + 0x74, 18);
> clk[IMX6QDL_CLK_MMDC_CH0_AXI] = imx_clk_gate2("mmdc_ch0_axi", "mmdc_ch0_axi_podf", base + 0x74, 20);
> diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h
> index 29050337d9d5..da59fd9cdb5e 100644
> --- a/include/dt-bindings/clock/imx6qdl-clock.h
> +++ b/include/dt-bindings/clock/imx6qdl-clock.h
> @@ -269,6 +269,8 @@
> #define IMX6QDL_CLK_PRG0_APB 256
> #define IMX6QDL_CLK_PRG1_APB 257
> #define IMX6QDL_CLK_PRE_AXI 258
> -#define IMX6QDL_CLK_END 259
> +#define IMX6QDL_CLK_MLB_SEL 259
> +#define IMX6QDL_CLK_MLB_PODF 260
> +#define IMX6QDL_CLK_END 261
>
> #endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */
> --
> 2.8.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH devicetree] ARM: BCM53573: Specify PMU and its ILP clock in the DT
From: Rafał Miłecki @ 2016-09-17 20:13 UTC (permalink / raw)
To: linux-arm-kernel
From: Rafa? Mi?ecki <rafal@milecki.pl>
ILP clock (sometimes called a "slow clock") is a part of PMU (Power
Management Unit). There has been recently added a driver for it, so add
a proper entry in the DT as well.
Signed-off-by: Rafa? Mi?ecki <rafal@milecki.pl>
---
arch/arm/boot/dts/bcm53573.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/bcm53573.dtsi b/arch/arm/boot/dts/bcm53573.dtsi
index efa07de..e2c496a 100644
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -143,5 +143,17 @@
gmac1: ethernet at b000 {
reg = <0xb000 0x1000>;
};
+
+ pmu at 12000 {
+ compatible = "simple-mfd", "syscon";
+ reg = <0x00012000 0x00001000>;
+
+ ilp: ilp {
+ compatible = "brcm,bcm53573-ilp";
+ clocks = <&alp>;
+ #clock-cells = <0>;
+ clock-output-names = "ilp";
+ };
+ };
};
};
--
2.9.3
^ permalink raw reply related
* [PATCH v2] ARM: dts: exynos: Add entries for sound support on Odroid-XU board
From: Krzysztof Kozlowski @ 2016-09-17 20:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <71286ef8-4b7f-cfde-7bb9-9f3bd2289527@samsung.com>
On Fri, Sep 16, 2016 at 01:58:32PM +0200, Krzysztof Kozlowski wrote:
> On 09/16/2016 01:25 PM, Sylwester Nawrocki wrote:
> > On 09/16/2016 01:22 PM, Sylwester Nawrocki wrote:
> >> This patch adds device nodes for the AUDSS clock controller,
> >> peripheral DMA 0/1 controllers and the Audio Subsystem I2S controller.
> >> These entries are required for sound support on Odroid-XU board.
> >>
> >> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> >> ---
> >> This patch depends on a patch adding clock ID macro definitions.
> >> I'm going to provide a topic branch containing required changes.
> >>
> >> Changes since v1:
> >> - GIC_SPI, IRQ_TYPE_NONE used in the PDMA and max98080 interrupt
> >> specifiers,
> >> - assigned-clock-* properties moved to respective controller
> >> nodes.
> >
> > And here is a pull request containing clk dependency patches:
> >
> > The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc:
> >
> > Linux 4.8-rc1 (2016-08-07 18:18:00 -0700)
> >
> > are available in the git repository at:
> >
> > git://linuxtv.org/snawrocki/samsung.git tags/clk-v4.9-exynos54x0-dt
> >
> > for you to fetch changes up to 58d6506f327e3d192998ba03632f546da221b8d8:
> >
> > clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocks (2016-09-09
> > 10:13:02 +0200)
> >
>
> Pulled and applied, thanks!
>
This does not boot...
http://www.krzk.eu/builders/boot-odroid-xu-exynos/builds/216
http://www.krzk.eu/builders/boot-odroid-xu-multi_v7/builds/195
I am going to send pull request this weekend (or Monday) so probably this
won't be included. If by any chance you prepare a fix soon, then it
will save me from rebasing the branch.
Best regards,
Krzysztof
^ permalink raw reply
* [RFC PATCH 00/10] ARM: dts: exynos: Fix invalid GIC interrupt flags
From: Krzysztof Kozlowski @ 2016-09-17 17:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAGOxZ50WiEVGNKf_1_8DQiKruxY=0813dko18fPfuRqxeyud0A@mail.gmail.com>
On Sat, Sep 17, 2016 at 11:05:39PM +0530, Alim Akhtar wrote:
> Hi Krzysztof,
>
> On Sat, Sep 17, 2016 at 1:12 AM, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> > Hi,
> >
> > Marek (internally), Geert and Alban reported errors like:
> > genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68)
> > The patchset fixes this issue.
> >
> > Tested on:
> > 1. Exynos4412: Odroid U3,
> > 2. Exynos5410: Odroid XU,
> > 3. Exynos5422: Odroid XU3.
> >
>
> Tested on Exynos5800 based peach-pi board, so fpr patch 06/10
>
> Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
>
>
> > Other platforms not tested so testing would be highly appreciated.
> >
> > Best regards,
> > Krzysztof
> >
> > Krzysztof Kozlowski (10):
> > ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4
> > ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4210
> > ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4x12
> > ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4415
> > ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos3250
> > ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5
> > ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5250
> > ARM: dts: exynos: Fix invalid GIC interrupt flags in
> > exynos5410/exynos542x
> > ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5260
> > ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5440
> >
>
> In general these patches looks good, feel free to add my review-by tag
> for this series.
>
> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
>
Thanks, I'll add your reviewed-by to all patches.
Best regards,
Krzysztof
^ permalink raw reply
* [RFC PATCH 00/10] ARM: dts: exynos: Fix invalid GIC interrupt flags
From: Alim Akhtar @ 2016-09-17 17:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474054971-16831-1-git-send-email-krzk@kernel.org>
Hi Krzysztof,
On Sat, Sep 17, 2016 at 1:12 AM, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> Hi,
>
> Marek (internally), Geert and Alban reported errors like:
> genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68)
> The patchset fixes this issue.
>
> Tested on:
> 1. Exynos4412: Odroid U3,
> 2. Exynos5410: Odroid XU,
> 3. Exynos5422: Odroid XU3.
>
Tested on Exynos5800 based peach-pi board, so fpr patch 06/10
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
> Other platforms not tested so testing would be highly appreciated.
>
> Best regards,
> Krzysztof
>
> Krzysztof Kozlowski (10):
> ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4
> ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4210
> ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4x12
> ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4415
> ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos3250
> ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5
> ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5250
> ARM: dts: exynos: Fix invalid GIC interrupt flags in
> exynos5410/exynos542x
> ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5260
> ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5440
>
In general these patches looks good, feel free to add my review-by tag
for this series.
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 20 +++++--
> arch/arm/boot/dts/exynos3250.dtsi | 93 +++++++++++++++++-------------
> arch/arm/boot/dts/exynos4.dtsi | 94 ++++++++++++++++---------------
> arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 20 +++++--
> arch/arm/boot/dts/exynos4210.dtsi | 36 ++++++++----
> arch/arm/boot/dts/exynos4415-pinctrl.dtsi | 20 +++++--
> arch/arm/boot/dts/exynos4415.dtsi | 92 +++++++++++++++++-------------
> arch/arm/boot/dts/exynos4x12-pinctrl.dtsi | 20 +++++--
> arch/arm/boot/dts/exynos4x12.dtsi | 48 ++++++++++------
> arch/arm/boot/dts/exynos5.dtsi | 60 ++++++++++++++------
> arch/arm/boot/dts/exynos5250.dtsi | 80 +++++++++++++-------------
> arch/arm/boot/dts/exynos5260.dtsi | 39 ++++++++-----
> arch/arm/boot/dts/exynos5410.dtsi | 26 ++++-----
> arch/arm/boot/dts/exynos5420.dtsi | 78 ++++++++++++-------------
> arch/arm/boot/dts/exynos5440.dtsi | 48 ++++++++++------
> arch/arm/boot/dts/exynos54xx.dtsi | 34 +++++------
> 16 files changed, 485 insertions(+), 323 deletions(-)
>
> --
> 2.7.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Regards,
Alim
^ permalink raw reply
* [PATCH] mtd: s3c2410: add device tree support
From: Boris Brezillon @ 2016-09-17 17:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474125760-28168-1-git-send-email-sergio.prado@e-labworks.com>
Hi Sergio,
On Sat, 17 Sep 2016 12:22:40 -0300
Sergio Prado <sergio.prado@e-labworks.com> wrote:
> Tested on FriendlyARM Mini2440
>
> Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
> ---
> .../devicetree/bindings/mtd/samsung-s3c2410.txt | 70 +++++++++++
DT maintainers usually ask people to keep the DT bindings doc in a
separate patch.
> drivers/mtd/nand/s3c2410.c | 129 ++++++++++++++++++++-
> include/linux/platform_data/mtd-nand-s3c2410.h | 1 +
> 3 files changed, 195 insertions(+), 5 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt
>
> diff --git a/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt b/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt
> new file mode 100644
> index 000000000000..1c39f6cf483b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt
> @@ -0,0 +1,70 @@
> +* Samsung S3C2410 and compatible NAND flash controller
> +
> +Required properties:
> +- compatible : The possible values are:
> + "samsung,s3c2410-nand"
> + "samsung,s3c2412-nand"
> + "samsung,s3c2440-nand"
> + "samsung,s3c6400-nand"
> +- reg : register's location and length.
> +- #address-cells, #size-cells : see nand.txt
> +- clocks : phandle to the nand controller clock
> +- clock-names : must contain "nand"
> +
> +Optional properties:
> +- samsung,tacls : time for active CLE/ALE to nWE/nOE
> +- samsung,twrph0 : active time for nWE/nOE
> +- samsung,twrph1 : time for release CLE/ALE from nWE/nOE inactive
Can you try to extract these information from the nand_sdr_timings
struct instead of passing it in your DT?
> +- samsung,ignore_unset_ecc : boolean to ignore error when we have
> + 0xff,0xff,0xff read ECC, on the
> + assumption that it is an un-eccd page
> +
> +Optional children nodes:
> +Children nodes representing the available nand chips.
> +
> +Optional children properties:
> +- nand-ecc-mode : see nand.txt
> +- nand-on-flash-bbt : see nand.txt
> +
> +Each children device node may optionally contain a 'partitions' sub-node,
> +which further contains sub-nodes describing the flash partition mapping.
> +See partition.txt for more detail.
> +
> +Example:
> +
> +nand at 4e000000 {
s/nand/nand-controller/
> + compatible = "samsung,s3c2440-nand";
> + reg = <0x4e000000 0x40>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + clocks = <&clocks HCLK_NAND>;
> + clock-names = "nand";
> +
> + samsung,tacls = <0>;
> + samsung,twrph0 = <25>;
> + samsung,twrph1 = <15>;
As said above, I think these timings can be extracted from the
nand_sdr_timings struct, which is know automatically attached to
nand_chip at detection time.
> + samsung,ignore_unset_ecc;
Just discovered this ->ignore_unset_ecc property, and I don't
understand why it's here for...
Either you don't want to have ECC, and in this case you should set
NAND_ECC_NONE, or you want to have ECC calculated, and in this case,
the only valid situation where ECC bytes are 0xff is when the page is
erased.
If I'm right, please fix the driver instead of adding this DT property.
If I'm wrong, could you explain in more detail when you have ECC bytes
set to 0xff?
> +
> + nand at 0 {
@0 implies having a reg property. I don't see any in your example, and
it's not document in the required property list.
Is your controller able to connect to different CS?
> + nand-ecc-mode = "soft";
> + nand-on-flash-bbt;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + partition at 0 {
> + label = "u-boot";
> + reg = <0 0x040000>;
> + };
> +
> + partition at 40000 {
> + label = "kernel";
> + reg = <0x040000 0x500000>;
> + };
> + };
> + };
> +};
> diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
> index d9309cf0ce2e..ecbb9c9c1e9a 100644
> --- a/drivers/mtd/nand/s3c2410.c
> +++ b/drivers/mtd/nand/s3c2410.c
> @@ -39,6 +39,8 @@
> #include <linux/slab.h>
> #include <linux/clk.h>
> #include <linux/cpufreq.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
>
> #include <linux/mtd/mtd.h>
> #include <linux/mtd/nand.h>
> @@ -185,6 +187,26 @@ struct s3c2410_nand_info {
> #endif
> };
>
> +struct s3c24XX_nand_devtype_data {
> + enum s3c_cpu_type type;
> +};
> +
> +struct s3c24XX_nand_devtype_data s3c2410_nand_devtype_data = {
> + .type = TYPE_S3C2410,
> +};
> +
> +struct s3c24XX_nand_devtype_data s3c2412_nand_devtype_data = {
> + .type = TYPE_S3C2412,
> +};
> +
> +struct s3c24XX_nand_devtype_data s3c2440_nand_devtype_data = {
> + .type = TYPE_S3C2440,
> +};
> +
> +struct s3c24XX_nand_devtype_data s3c6400_nand_devtype_data = {
> + .type = TYPE_S3C2412,
> +};
> +
> /* conversion functions */
>
> static struct s3c2410_nand_mtd *s3c2410_nand_mtd_toours(struct mtd_info *mtd)
> @@ -813,6 +835,8 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
> struct nand_chip *chip = &nmtd->chip;
> void __iomem *regs = info->regs;
>
> + nand_set_flash_node(chip, set->of_node);
> +
> chip->write_buf = s3c2410_nand_write_buf;
> chip->read_buf = s3c2410_nand_read_buf;
> chip->select_chip = s3c2410_nand_select_chip;
> @@ -947,6 +971,96 @@ static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
> }
> }
>
> +#ifdef CONFIG_OF_MTD
Hm, I thought this symbol had been dropped, but apparently I forgot to
remove it. You should make it dependent on CONFIG_OF, not CONFIG_OF_MTD.
Anyway, I'm not even sure this ifdef is needed. Just test if
pdev->dev.of_node is NULL in s3c24xx_nand_probe_dt() and return -1 in
this case.
> +static const struct of_device_id s3c24xx_nand_dt_ids[] = {
> + {
> + .compatible = "samsung,s3c2410-nand",
> + .data = &s3c2410_nand_devtype_data,
> + }, {
> + .compatible = "samsung,s3c2412-nand",
> + .data = &s3c2412_nand_devtype_data,
> + }, {
> + .compatible = "samsung,s3c2440-nand",
> + .data = &s3c2440_nand_devtype_data,
> + }, {
> + .compatible = "samsung,s3c6400-nand",
> + .data = &s3c6400_nand_devtype_data,
> + },
> + { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, s3c24xx_nand_dt_ids);
> +
> +static int s3c24xx_nand_probe_dt(struct platform_device *pdev)
> +{
> + const struct s3c24XX_nand_devtype_data *devtype_data;
> + struct s3c2410_platform_nand *pdata;
> + struct s3c2410_nand_info *info = platform_get_drvdata(pdev);
> + struct device_node *np = pdev->dev.of_node, *child;
> + const struct of_device_id *of_id;
> + struct s3c2410_nand_set *sets;
> +
> + of_id = of_match_device(s3c24xx_nand_dt_ids, &pdev->dev);
> + if (!of_id)
> + return 1;
> +
> + devtype_data = of_id->data;
> + info->cpu_type = devtype_data->type;
> +
> + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
> + if (!pdata)
> + return -ENOMEM;
> +
> + pdev->dev.platform_data = pdata;
> +
> + of_property_read_u32(np, "samsung,tacls", &pdata->tacls);
> + of_property_read_u32(np, "samsung,twrph0", &pdata->twrph0);
> + of_property_read_u32(np, "samsung,twrph1", &pdata->twrph1);
> +
> + if (of_get_property(np, "samsung,ignore_unset_ecc", NULL))
> + pdata->ignore_unset_ecc = 1;
> +
> + pdata->nr_sets = of_get_child_count(np);
> + if (!pdata->nr_sets)
> + return 0;
> +
> + sets = devm_kzalloc(&pdev->dev, sizeof(*sets) * pdata->nr_sets,
> + GFP_KERNEL);
> + if (!sets)
> + return -ENOMEM;
> +
> + pdata->sets = sets;
> +
> + for_each_available_child_of_node(np, child) {
> +
> + sets->name = (char *)child->name;
> + sets->of_node = child;
> + sets->nr_chips = 1;
> +
> + if (!of_property_match_string(child, "nand-ecc-mode", "none"))
> + sets->disable_ecc = 1;
> +
> + if (of_get_property(child, "nand-on-flash-bbt", NULL))
> + sets->flash_bbt = 1;
> +
These properties are automatically extracted in nand_scan_ident(), why
do you need to parse them twice?
> + sets++;
> + }
> +
> + return 0;
> +}
> +#else
> +static int s3c24xx_nand_probe_dt(struct platform_device *pdev)
> +{
> + return 1;
> +}
> +#endif
> +
> +static void s3c24xx_nand_probe_pdata(struct platform_device *pdev)
> +{
> + struct s3c2410_nand_info *info = platform_get_drvdata(pdev);
> +
> + info->cpu_type = platform_get_device_id(pdev)->driver_data;
> +}
> +
> /* s3c24xx_nand_probe
> *
> * called by device layer when it finds a device matching
> @@ -956,8 +1070,7 @@ static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
> */
> static int s3c24xx_nand_probe(struct platform_device *pdev)
> {
> - struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
> - enum s3c_cpu_type cpu_type;
> + struct s3c2410_platform_nand *plat;
> struct s3c2410_nand_info *info;
> struct s3c2410_nand_mtd *nmtd;
> struct s3c2410_nand_set *sets;
> @@ -967,8 +1080,6 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
> int nr_sets;
> int setno;
>
> - cpu_type = platform_get_device_id(pdev)->driver_data;
> -
> info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
> if (info == NULL) {
> err = -ENOMEM;
> @@ -991,6 +1102,14 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
>
> s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
>
> + err = s3c24xx_nand_probe_dt(pdev);
> + if (err > 0)
> + s3c24xx_nand_probe_pdata(pdev);
> + else if (err < 0)
> + goto exit_error;
> +
> + plat = to_nand_plat(pdev);
> +
> /* allocate and map the resource */
>
> /* currently we assume we have the one resource */
> @@ -999,7 +1118,6 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
>
> info->device = &pdev->dev;
> info->platform = plat;
> - info->cpu_type = cpu_type;
>
> info->regs = devm_ioremap_resource(&pdev->dev, res);
> if (IS_ERR(info->regs)) {
> @@ -1156,6 +1274,7 @@ static struct platform_driver s3c24xx_nand_driver = {
> .id_table = s3c24xx_driver_ids,
> .driver = {
> .name = "s3c24xx-nand",
> + .of_match_table = s3c24xx_nand_dt_ids,
If you keep the #ifdef CONFIG_OF section
.of_match_table = of_match_ptr(s3c24xx_nand_dt_ids),
> },
> };
>
> diff --git a/include/linux/platform_data/mtd-nand-s3c2410.h b/include/linux/platform_data/mtd-nand-s3c2410.h
> index c55e42ee57fa..9d20871e4bbd 100644
> --- a/include/linux/platform_data/mtd-nand-s3c2410.h
> +++ b/include/linux/platform_data/mtd-nand-s3c2410.h
> @@ -40,6 +40,7 @@ struct s3c2410_nand_set {
> char *name;
> int *nr_map;
> struct mtd_partition *partitions;
> + struct device_node *of_node;
> };
>
> struct s3c2410_platform_nand {
^ permalink raw reply
* [PATCH 06/10] ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5
From: Alim Akhtar @ 2016-09-17 17:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474054971-16831-7-git-send-email-krzk@kernel.org>
On Sat, Sep 17, 2016 at 1:12 AM, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and
> generates an error:
> genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68)
>
> The GIC requires shared interrupts to be edge rising or level high.
> Platform declares support for both. Choose level high everywhere.
>
> Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
> Reported-by: Alban Browaeys <alban.browaeys@gmail.com>
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> ---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested in exynos5800, so
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
> arch/arm/boot/dts/exynos5.dtsi | 60 ++++++++++++++++++++++++++++++------------
> 1 file changed, 43 insertions(+), 17 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
> index 8f06609879f5..d9b1607db5ad 100644
> --- a/arch/arm/boot/dts/exynos5.dtsi
> +++ b/arch/arm/boot/dts/exynos5.dtsi
> @@ -13,6 +13,7 @@
> * published by the Free Software Foundation.
> */
>
> +#include <dt-bindings/interrupt-controller/irq.h>
> #include "exynos-syscon-restart.dtsi"
>
> / {
> @@ -53,14 +54,38 @@
> interrupt-controller;
> samsung,combiner-nr = <32>;
> reg = <0x10440000 0x1000>;
> - interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
> - <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
> - <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
> - <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
> - <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
> - <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
> - <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
> - <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
> + interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
> + <0 1 IRQ_TYPE_LEVEL_HIGH>,
> + <0 2 IRQ_TYPE_LEVEL_HIGH>,
> + <0 3 IRQ_TYPE_LEVEL_HIGH>,
> + <0 4 IRQ_TYPE_LEVEL_HIGH>,
> + <0 5 IRQ_TYPE_LEVEL_HIGH>,
> + <0 6 IRQ_TYPE_LEVEL_HIGH>,
> + <0 7 IRQ_TYPE_LEVEL_HIGH>,
> + <0 8 IRQ_TYPE_LEVEL_HIGH>,
> + <0 9 IRQ_TYPE_LEVEL_HIGH>,
> + <0 10 IRQ_TYPE_LEVEL_HIGH>,
> + <0 11 IRQ_TYPE_LEVEL_HIGH>,
> + <0 12 IRQ_TYPE_LEVEL_HIGH>,
> + <0 13 IRQ_TYPE_LEVEL_HIGH>,
> + <0 14 IRQ_TYPE_LEVEL_HIGH>,
> + <0 15 IRQ_TYPE_LEVEL_HIGH>,
> + <0 16 IRQ_TYPE_LEVEL_HIGH>,
> + <0 17 IRQ_TYPE_LEVEL_HIGH>,
> + <0 18 IRQ_TYPE_LEVEL_HIGH>,
> + <0 19 IRQ_TYPE_LEVEL_HIGH>,
> + <0 20 IRQ_TYPE_LEVEL_HIGH>,
> + <0 21 IRQ_TYPE_LEVEL_HIGH>,
> + <0 22 IRQ_TYPE_LEVEL_HIGH>,
> + <0 23 IRQ_TYPE_LEVEL_HIGH>,
> + <0 24 IRQ_TYPE_LEVEL_HIGH>,
> + <0 25 IRQ_TYPE_LEVEL_HIGH>,
> + <0 26 IRQ_TYPE_LEVEL_HIGH>,
> + <0 27 IRQ_TYPE_LEVEL_HIGH>,
> + <0 28 IRQ_TYPE_LEVEL_HIGH>,
> + <0 29 IRQ_TYPE_LEVEL_HIGH>,
> + <0 30 IRQ_TYPE_LEVEL_HIGH>,
> + <0 31 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> gic: interrupt-controller at 10481000 {
> @@ -82,31 +107,31 @@
> serial_0: serial at 12C00000 {
> compatible = "samsung,exynos4210-uart";
> reg = <0x12C00000 0x100>;
> - interrupts = <0 51 0>;
> + interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> serial_1: serial at 12C10000 {
> compatible = "samsung,exynos4210-uart";
> reg = <0x12C10000 0x100>;
> - interrupts = <0 52 0>;
> + interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> serial_2: serial at 12C20000 {
> compatible = "samsung,exynos4210-uart";
> reg = <0x12C20000 0x100>;
> - interrupts = <0 53 0>;
> + interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> serial_3: serial at 12C30000 {
> compatible = "samsung,exynos4210-uart";
> reg = <0x12C30000 0x100>;
> - interrupts = <0 54 0>;
> + interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> i2c_0: i2c at 12C60000 {
> compatible = "samsung,s3c2440-i2c";
> reg = <0x12C60000 0x100>;
> - interrupts = <0 56 0>;
> + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> samsung,sysreg-phandle = <&sysreg_system_controller>;
> @@ -116,7 +141,7 @@
> i2c_1: i2c at 12C70000 {
> compatible = "samsung,s3c2440-i2c";
> reg = <0x12C70000 0x100>;
> - interrupts = <0 57 0>;
> + interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> samsung,sysreg-phandle = <&sysreg_system_controller>;
> @@ -126,7 +151,7 @@
> i2c_2: i2c at 12C80000 {
> compatible = "samsung,s3c2440-i2c";
> reg = <0x12C80000 0x100>;
> - interrupts = <0 58 0>;
> + interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> samsung,sysreg-phandle = <&sysreg_system_controller>;
> @@ -136,7 +161,7 @@
> i2c_3: i2c at 12C90000 {
> compatible = "samsung,s3c2440-i2c";
> reg = <0x12C90000 0x100>;
> - interrupts = <0 59 0>;
> + interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> samsung,sysreg-phandle = <&sysreg_system_controller>;
> @@ -153,7 +178,8 @@
> rtc: rtc at 101E0000 {
> compatible = "samsung,s3c6410-rtc";
> reg = <0x101E0000 0x100>;
> - interrupts = <0 43 0>, <0 44 0>;
> + interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>,
> + <0 44 IRQ_TYPE_LEVEL_HIGH>;
> status = "disabled";
> };
>
> --
> 2.7.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Regards,
Alim
^ permalink raw reply
* [RFC PATCH 9/9] ethernet: sun8i-emac: add pm_runtime support
From: Florian Fainelli @ 2016-09-17 16:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160914140304.GA27639@Red>
On 09/14/2016 07:03 AM, LABBE Corentin wrote:
> On Mon, Sep 12, 2016 at 10:44:51PM +0200, Maxime Ripard wrote:
>>> +static int __maybe_unused sun8i_emac_resume(struct platform_device *pdev)
>>> +{
>>> + struct net_device *ndev = platform_get_drvdata(pdev);
>>> + struct sun8i_emac_priv *priv = netdev_priv(ndev);
>>> +
>>> + phy_start(ndev->phydev);
>>> +
>>> + sun8i_emac_start_tx(ndev);
>>> + sun8i_emac_start_rx(ndev);
>>> +
>>> + if (netif_running(ndev))
>>> + netif_device_attach(ndev);
>>> +
>>> + netif_start_queue(ndev);
>>> +
>>> + napi_enable(&priv->napi);
>>> +
>>> + return 0;
>>> +}
>>
>> The main idea behind the runtime PM hooks is that they bring the
>> device to a working state and shuts it down when it's not needed
>> anymore.
>>
>
> I expect that the first part (all pm_runtime_xxx) of the patch bring that.
> When the interface is not opened:
> cat /sys/devices/platform/soc/1c30000.ethernet/power/runtime_status
> suspended
If your interface is not open, it should be in a low power state, only
when it gets open (which means it is used) should you make it
functional, that's pretty much the same thing as the runtime PM
reference count usage here.
I don't see a lot of value for using runtime_pm_* hooks here except
calling into the existing suspend/resume functions that you have defined
already, but then again, the code should be modular enough already in
the driver.
Runtime PM for network devices cannot be used as efficiently as you
would with any kind of host-initiated bus/controller because your device
needs to be able to receive packets without the host's ability to wake
up the device to receive packets, so, with the exception of MDIO (which
is host initiated), everything else besides except packet transmission
(then again, I would not want to wait N ms to bring the interface in a
state where it can now transmit packets, that's terrible for latency) is
pretty much impossible to fully suspend due to its asynchronous nature.
--
Florian
^ permalink raw reply
* [PATCH v3 0/2] KVM: ARM: Enable vtimers with user space gic
From: Ard Biesheuvel @ 2016-09-17 16:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAFEAcA8JRscJox0Up3vRyDeOzy7PEHpm0p0cKBNeAYO6xeSZZQ@mail.gmail.com>
On 17 September 2016 at 16:38, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 17 September 2016 at 16:28, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
>> Another thing to keep in mind is that GICv2
>> compatibility is disabled on the non-secure side if the secure side
>> elects to configure its view of the GIC as v3 (i.e., in order to
>> support >8 cores)
>
> If I'm reading the 'legacy configurations' chapter of the GICv3
> spec correctly, that is true for the NS host OS (ie the one
> handling physical interrupts) but a guest OS can still use
> the old GICv2-compat interface (assuming it was implemented
> in silicon at all).
>
Ah right, apologies for spreading misinformation. But my first point
is still valid.
^ permalink raw reply
* [RFT] arm64 dts: exynos: Fix invalid GIC interrupt flags in exynos7
From: Krzysztof Kozlowski @ 2016-09-17 16:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <57DD2AA8.9060507@samsung.com>
On Sat, Sep 17, 2016 at 05:06:08PM +0530, Alim Akhtar wrote:
> Hi Krzysztof,
>
> On 09/17/2016 01:31 AM, Krzysztof Kozlowski wrote:
> >Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and
> >generates an error:
> > genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68)
> >
> >The GIC requires shared interrupts to be edge rising or level high.
> >Platform declares support for both. Choose level high everywhere.
> >
> >Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
> >Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
> >Reported-by: Alban Browaeys <alban.browaeys@gmail.com>
> >Cc: Marc Zyngier <marc.zyngier@arm.com>
> >Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> >---
>
> This patch does resolve the error reported in commit.
> Have booted on exynos7 board, things looks fine (have not done a extensive
> testing though).
> With the _Typo_ fixed as pointed by you, feel free to add
>
> Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
>
> On another note, please cc me if case you want to check/verify something on
> exynos7 platform. I almost missed this patch.
Great, thanks! I'll remember that.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH v3 0/2] KVM: ARM: Enable vtimers with user space gic
From: Peter Maydell @ 2016-09-17 15:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAKv+Gu_+txUFT158VzJqeE3Jwdd1LL1n2kzOzYKuk03UFxW3NQ@mail.gmail.com>
On 17 September 2016 at 16:28, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
> Another thing to keep in mind is that GICv2
> compatibility is disabled on the non-secure side if the secure side
> elects to configure its view of the GIC as v3 (i.e., in order to
> support >8 cores)
If I'm reading the 'legacy configurations' chapter of the GICv3
spec correctly, that is true for the NS host OS (ie the one
handling physical interrupts) but a guest OS can still use
the old GICv2-compat interface (assuming it was implemented
in silicon at all).
thanks
-- PMM
^ permalink raw reply
* [PATCH 24/24] ste_dma40: Rename a jump label in d40_log_lli_to_lcxa()
From: SF Markus Elfring @ 2016-09-17 15:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <92810066-69b6-94e7-dcec-a28594b1328f@users.sourceforge.net>
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Sat, 17 Sep 2016 16:39:06 +0200
Adjust a jump label according to the current Linux coding style convention.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
---
drivers/dma/ste_dma40.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 01fe3a2..dcb26c6 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -874,7 +874,7 @@ static void d40_log_lli_to_lcxa(struct d40_chan *chan, struct d40_desc *desc)
}
if (curr_lcla < 0)
- goto out;
+ goto set_current;
for (; lli_current < lli_len; lli_current++) {
unsigned int lcla_offset = chan->phy_chan->num * 1024 +
@@ -925,8 +925,7 @@ static void d40_log_lli_to_lcxa(struct d40_chan *chan, struct d40_desc *desc)
break;
}
}
-
-out:
+ set_current:
desc->lli_current = lli_current;
}
--
2.10.0
^ permalink raw reply related
* [PATCH 23/24] ste_dma40: Rename a jump label in __d40_execute_command_phy()
From: SF Markus Elfring @ 2016-09-17 15:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <92810066-69b6-94e7-dcec-a28594b1328f@users.sourceforge.net>
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Sat, 17 Sep 2016 16:28:54 +0200
Adjust a jump label according to the current Linux coding style convention.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
---
drivers/dma/ste_dma40.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 0082ae0..01fe3a2 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -1083,7 +1083,7 @@ static int __d40_execute_command_phy(struct d40_chan *d40c,
D40_CHAN_POS(d40c->phy_chan->num);
if (status == D40_DMA_SUSPENDED || status == D40_DMA_STOP)
- goto done;
+ goto unlock;
}
wmask = 0xffffffff & ~(D40_CHAN_POS_MASK(d40c->phy_chan->num));
@@ -1119,7 +1119,7 @@ static int __d40_execute_command_phy(struct d40_chan *d40c,
}
}
-done:
+ unlock:
spin_unlock_irqrestore(&d40c->base->execmd_lock, flags);
return ret;
}
--
2.10.0
^ permalink raw reply related
* [PATCH 22/24] ste_dma40: Rename a jump label in dma_tasklet()
From: SF Markus Elfring @ 2016-09-17 15:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <92810066-69b6-94e7-dcec-a28594b1328f@users.sourceforge.net>
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Sat, 17 Sep 2016 16:23:43 +0200
Adjust a jump label according to the current Linux coding style convention.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
---
drivers/dma/ste_dma40.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 4a2f39b..0082ae0 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -1606,7 +1606,7 @@ static void dma_tasklet(unsigned long data)
/* Check if we have reached here for cyclic job */
d40d = d40_first_active_get(d40c);
if (d40d == NULL || !d40d->cyclic)
- goto err;
+ goto check_pending_tx;
}
if (!d40d->cyclic)
@@ -1648,8 +1648,7 @@ static void dma_tasklet(unsigned long data)
dmaengine_desc_callback_invoke(&cb, NULL);
return;
-
-err:
+ check_pending_tx:
/* Rescue manouver if receiving double interrupts */
if (d40c->pending_tx > 0)
d40c->pending_tx--;
--
2.10.0
^ permalink raw reply related
* [PATCH 21/24] ste_dma40: Rename jump labels in d40_alloc_mask_set()
From: SF Markus Elfring @ 2016-09-17 15:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <92810066-69b6-94e7-dcec-a28594b1328f@users.sourceforge.net>
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Sat, 17 Sep 2016 16:16:42 +0200
Adjust jump labels according to the current Linux coding style convention.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
---
drivers/dma/ste_dma40.c | 22 ++++++++++------------
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index fbe87a2..4a2f39b 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -1778,42 +1778,40 @@ static bool d40_alloc_mask_set(struct d40_phy_res *phy,
phy->allocated_dst == D40_ALLOC_FREE) {
phy->allocated_dst = D40_ALLOC_PHY;
phy->allocated_src = D40_ALLOC_PHY;
- goto found;
+ goto found_unlock;
} else
- goto not_found;
+ goto not_found_unlock;
}
/* Logical channel */
if (is_src) {
if (phy->allocated_src == D40_ALLOC_PHY)
- goto not_found;
+ goto not_found_unlock;
if (phy->allocated_src == D40_ALLOC_FREE)
phy->allocated_src = D40_ALLOC_LOG_FREE;
if (!(phy->allocated_src & BIT(log_event_line))) {
phy->allocated_src |= BIT(log_event_line);
- goto found;
+ goto found_unlock;
} else
- goto not_found;
+ goto not_found_unlock;
} else {
if (phy->allocated_dst == D40_ALLOC_PHY)
- goto not_found;
+ goto not_found_unlock;
if (phy->allocated_dst == D40_ALLOC_FREE)
phy->allocated_dst = D40_ALLOC_LOG_FREE;
if (!(phy->allocated_dst & BIT(log_event_line))) {
phy->allocated_dst |= BIT(log_event_line);
- goto found;
- } else
- goto not_found;
+ goto found_unlock;
+ }
}
-
-not_found:
+ not_found_unlock:
spin_unlock_irqrestore(&phy->lock, flags);
return false;
-found:
+ found_unlock:
spin_unlock_irqrestore(&phy->lock, flags);
return true;
}
--
2.10.0
^ permalink raw reply related
* [PATCH 20/24] ste_dma40: Rename a jump label in d40_alloc_mask_free()
From: SF Markus Elfring @ 2016-09-17 15:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <92810066-69b6-94e7-dcec-a28594b1328f@users.sourceforge.net>
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Sat, 17 Sep 2016 16:10:41 +0200
Adjust a jump label according to the current Linux coding style convention.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
---
drivers/dma/ste_dma40.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 917b24a..fbe87a2 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -1829,7 +1829,7 @@ static bool d40_alloc_mask_free(struct d40_phy_res *phy, bool is_src,
phy->allocated_dst = D40_ALLOC_FREE;
phy->allocated_src = D40_ALLOC_FREE;
is_free = true;
- goto out;
+ goto unlock;
}
/* Logical channel */
@@ -1845,8 +1845,7 @@ static bool d40_alloc_mask_free(struct d40_phy_res *phy, bool is_src,
is_free = ((phy->allocated_src | phy->allocated_dst) ==
D40_ALLOC_FREE);
-
-out:
+ unlock:
spin_unlock_irqrestore(&phy->lock, flags);
return is_free;
--
2.10.0
^ permalink raw reply related
* [PATCH 19/24] ste_dma40: Rename a jump label in d40_free_dma()
From: SF Markus Elfring @ 2016-09-17 15:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <92810066-69b6-94e7-dcec-a28594b1328f@users.sourceforge.net>
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Sat, 17 Sep 2016 16:04:46 +0200
Adjust a jump label according to the current Linux coding style convention.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
---
drivers/dma/ste_dma40.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index d99241c..917b24a 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -2045,7 +2045,7 @@ static int d40_free_dma(struct d40_chan *d40c)
res = d40_channel_execute_command(d40c, D40_DMA_STOP);
if (res) {
chan_err(d40c, "stop failed\n");
- goto out;
+ goto mark_last_busy;
}
d40_alloc_mask_free(phy, is_src, chan_is_logical(d40c) ? event : 0);
@@ -2063,8 +2063,7 @@ static int d40_free_dma(struct d40_chan *d40c)
d40c->busy = false;
d40c->phy_chan = NULL;
d40c->configured = false;
-out:
-
+ mark_last_busy:
pm_runtime_mark_last_busy(d40c->base->dev);
pm_runtime_put_autosuspend(d40c->base->dev);
return res;
--
2.10.0
^ permalink raw reply related
* [PATCH 18/24] ste_dma40: Rename a jump label in d40_is_paused()
From: SF Markus Elfring @ 2016-09-17 15:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <92810066-69b6-94e7-dcec-a28594b1328f@users.sourceforge.net>
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Sat, 17 Sep 2016 16:00:05 +0200
Adjust jump labels according to the current Linux coding style convention.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
---
drivers/dma/ste_dma40.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 4a21778..d99241c 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -2092,8 +2092,7 @@ static bool d40_is_paused(struct d40_chan *d40c)
D40_CHAN_POS(d40c->phy_chan->num);
if (status == D40_DMA_SUSPENDED || status == D40_DMA_STOP)
is_paused = true;
-
- goto _exit;
+ goto unlock;
}
if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||
@@ -2103,7 +2102,7 @@ static bool d40_is_paused(struct d40_chan *d40c)
status = readl(chanbase + D40_CHAN_REG_SSLNK);
} else {
chan_err(d40c, "Unknown direction\n");
- goto _exit;
+ goto unlock;
}
status = (status & D40_EVENTLINE_MASK(event)) >>
@@ -2111,7 +2110,7 @@ static bool d40_is_paused(struct d40_chan *d40c)
if (status != D40_DMA_RUN)
is_paused = true;
-_exit:
+ unlock:
spin_unlock_irqrestore(&d40c->lock, flags);
return is_paused;
--
2.10.0
^ permalink raw reply related
* [PATCH v3 0/2] KVM: ARM: Enable vtimers with user space gic
From: Ard Biesheuvel @ 2016-09-17 15:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <10C5B047-6A7F-4255-BE56-5358AF88DA5E@suse.de>
On 16 September 2016 at 13:44, Alexander Graf <agraf@suse.de> wrote:
>
>> On 16 Sep 2016, at 14:40, Paolo Bonzini <pbonzini@redhat.com> wrote:
>>
>>
>>
>> On 16/09/2016 14:29, Christoffer Dall wrote:
>>>> It may be useful for migrating a gicv2 VM to a gicv3 host without gicv2 emulation as well.
>>>
>>> I don't see why you'd do this; the VGIC hardware can perfectly well be
>>> used for nesting as well, and this works rather well.
>>
>> Can GICv3 emulate GICv2 in a guest?
>
> It depends on the gicv3 configuration. As an SOC vendor you can either enable gicv2 compatibility or disable it. ThunderX for example is gicv3 only. LS2085 can handle gicv2 in the guest with gicv3 on the host.
>
Note that 'disabled' here means 'not implemented it in silicon', so
there is no way you will ever be able to re-enable GICv2 compatibility
on a ThunderX. Another thing to keep in mind is that GICv2
compatibility is disabled on the non-secure side if the secure side
elects to configure its view of the GIC as v3 (i.e., in order to
support >8 cores)
^ permalink raw reply
* [PATCH 17/24] ste_dma40: Move an assignment in d40_prep_desc()
From: SF Markus Elfring @ 2016-09-17 15:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <92810066-69b6-94e7-dcec-a28594b1328f@users.sourceforge.net>
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Sat, 17 Sep 2016 15:54:12 +0200
Move one assignment for the local variable "cfg" so that its setting
will only be performed after a call of the function "d40_desc_get"
succeeded by this function.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
---
drivers/dma/ste_dma40.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 7f38496..4a21778 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -2196,7 +2196,7 @@ static struct d40_desc *
d40_prep_desc(struct d40_chan *chan, struct scatterlist *sg,
unsigned int sg_len, unsigned long dma_flags)
{
- struct stedma40_chan_cfg *cfg = &chan->dma_cfg;
+ struct stedma40_chan_cfg *cfg;
struct d40_desc *desc;
int ret;
@@ -2204,6 +2204,7 @@ d40_prep_desc(struct d40_chan *chan, struct scatterlist *sg,
if (!desc)
return NULL;
+ cfg = &chan->dma_cfg;
desc->lli_len = d40_sg_2_dmalen(sg, sg_len, cfg->src_info.data_width,
cfg->dst_info.data_width);
if (desc->lli_len < 0) {
--
2.10.0
^ permalink raw reply related
* [PATCH 16/24] ste_dma40: Rename a jump label in d40_prep_desc()
From: SF Markus Elfring @ 2016-09-17 15:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <92810066-69b6-94e7-dcec-a28594b1328f@users.sourceforge.net>
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Sat, 17 Sep 2016 15:51:37 +0200
Adjust jump labels according to the current Linux coding style convention.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
---
drivers/dma/ste_dma40.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 6725b66..7f38496 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -2208,13 +2208,13 @@ d40_prep_desc(struct d40_chan *chan, struct scatterlist *sg,
cfg->dst_info.data_width);
if (desc->lli_len < 0) {
chan_err(chan, "Unaligned size\n");
- goto err;
+ goto free_desc;
}
ret = d40_pool_lli_alloc(chan, desc, desc->lli_len);
if (ret < 0) {
chan_err(chan, "Could not allocate lli\n");
- goto err;
+ goto free_desc;
}
desc->lli_current = 0;
@@ -2224,8 +2224,7 @@ d40_prep_desc(struct d40_chan *chan, struct scatterlist *sg,
dma_async_tx_descriptor_init(&desc->txd, &chan->chan);
return desc;
-
-err:
+ free_desc:
d40_desc_free(chan, desc);
return NULL;
}
--
2.10.0
^ permalink raw reply related
* [PATCH 15/24] ste_dma40: Move two assignments in d40_prep_sg()
From: SF Markus Elfring @ 2016-09-17 15:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <92810066-69b6-94e7-dcec-a28594b1328f@users.sourceforge.net>
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Sat, 17 Sep 2016 15:40:05 +0200
Move assignments for two local variables so that their setting
will only be performed after corresponding data processing succeeded
by this function.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
---
drivers/dma/ste_dma40.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index a7e7cd0..6725b66 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -2236,8 +2236,8 @@ d40_prep_sg(struct dma_chan *dchan, struct scatterlist *sg_src,
enum dma_transfer_direction direction, unsigned long dma_flags)
{
struct d40_chan *chan = container_of(dchan, struct d40_chan, chan);
- dma_addr_t src_dev_addr = 0;
- dma_addr_t dst_dev_addr = 0;
+ dma_addr_t src_dev_addr;
+ dma_addr_t dst_dev_addr;
struct d40_desc *desc;
unsigned long flags;
int ret;
@@ -2256,6 +2256,8 @@ d40_prep_sg(struct dma_chan *dchan, struct scatterlist *sg_src,
if (sg_next(&sg_src[sg_len - 1]) == sg_src)
desc->cyclic = true;
+ src_dev_addr = 0;
+ dst_dev_addr = 0;
if (direction == DMA_DEV_TO_MEM)
src_dev_addr = chan->runtime_addr;
else if (direction == DMA_MEM_TO_DEV)
--
2.10.0
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