* [PATCH 00/19] [RESEND] Remove STiH415 and STiH416 SoC platform support
From: Peter Griffin @ 2016-09-19 8:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <10792443.jxCOopyCy4@wuerfel>
Hi Arnd,
On Thu, 15 Sep 2016, Arnd Bergmann wrote:
> On Thursday, September 15, 2016 8:01:39 AM CEST Peter Griffin wrote:
> >
> > STiH415 I'm sure never shipped. I'm reasonably sure STiH416 didn't
> > either. These SoCs were considered legacy even when I was at ST
> > ~3 years ago.
> >
> > Also remember these are STB SoC's, so JTAG fuses are blown in
> > production boxes, and also full security is enabled. This means the
> > primary bootloader will only boot a signed kernel. So if a end user
> > did happen to have a box they would be unable to upgrade their kernel.
> >
> > From the landing team perspective they were interesting in that they
> > shared many IPs with the STiH407 family on which future chipsets were
> > based, and were available to us when that silicon was harder to get
> > hold of. So we used it as a vehicle for upstreaming so that upstream
> > support was already quite good when STiH407 silicon did land on our
> > desk.
>
> Ok, makes sense. I did stumble over one machine basedon STiH412
> the other day [1], but there probably isn't much shared with that
> one. Since this a NAS server rather than an STB box, it's probably
> less locked-down and potentially a target for OpenWRT or similar.
I just double checked with ST and STiH412 is a STiH407 family based SoC
so support still exists for this upstream. No idea what if any security is
enabled on this product though.
Most probably the A/V stack on it will be SDK2, although native upstream
multimedia drivers for this chipset are looking pretty good now.
Peter.
> [1] http://www.heise.de/preisvergleich/synology-diskstation-ds216play-16tb-a1400885.html
^ permalink raw reply
* [PATCH RFC 4/8] ARM: shmobile: r8a7743: basic SoC support
From: Geert Uytterhoeven @ 2016-09-19 8:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <7093322.WFIWVqz40g@wasted.cogentembedded.com>
Hi Sergei,
On Fri, Sep 16, 2016 at 3:33 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Add minimal support for the RZ/G1M (R8A7743) SoC.
>
> Based on the original (and large) patch by Dmitry Shifrin
> <dmitry.shifrin@cogentembedded.com>.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>
> ---
> arch/arm/mach-shmobile/Kconfig | 5 ++++
> arch/arm/mach-shmobile/Makefile | 1
> arch/arm/mach-shmobile/setup-r8a7743.c | 34 +++++++++++++++++++++++++++++++++
> 3 files changed, 40 insertions(+)
>
> Index: renesas/arch/arm/mach-shmobile/Kconfig
> ===================================================================
> --- renesas.orig/arch/arm/mach-shmobile/Kconfig
> +++ renesas/arch/arm/mach-shmobile/Kconfig
> @@ -68,6 +68,11 @@ config ARCH_R8A7740
> select ARCH_RMOBILE
> select RENESAS_INTC_IRQPIN
>
> +config ARCH_R8A7743
> + bool "RZ/G1M (R8A77430)"
> + select ARCH_RCAR_GEN2
> + select I2C
The only reason R8A779[013] selects I2C is because they need
regulator-quirk-rcar-gen2.c. Without schematics, it's hard to say if this is
needed for SK-RZG1M, too.
The Board Hardware Manual states SK-RZG1M has both DA9063 and DA9210.
It does state DA9063 is connected to IRQ2, but doesn't mention an interrupt
line for DA9210, so we don't know if they share IRQ2. Note that the Koelsch
fails to mention that DA9210 uses IRQ2, so this doesn't mean much.
For Porter we do not have the quirk enabled, while it has both regulators, too.
You can try to enable regulator-quirk-rcar-gen2.c for "renesas,sk-rzg1m" too,
and see what's printed by the kernel after a cold boot...
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [GIT PULL 3/4] Broadcom devicetree changes for 4.9
From: Arnd Bergmann @ 2016-09-19 8:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473213558-11782-3-git-send-email-f.fainelli@gmail.com>
On Tuesday, September 6, 2016 6:59:17 PM CEST Florian Fainelli wrote:
> This pull request contains Broadcom ARM-based Device Tree changes for v4.9,
> please pull the following:
>
> - Jon adds support for the Ethernet MAC DT nodes (AMAC) and provides the
> following updates for Broadcom references boards:
> * New Northstar Plus reference boards added: BCM958525er, BCM958522er,
> BCM988312hr, BCM958623hr and BCM958622hr
> * Add SATA nodes to the BCM958625hr and XMC boards
> * Add I2C nodes to the XMC board
> * Fixes the amount of RAM on BCM958625HR, BCM958625K and BCM958525XMC boards
> * Add the GPIO reboot method for BCM958625hr and XMC boards
>
> - Dhanajay adds PWM nodes for the Northstar Plus SoCs
>
> - Rafal adds the USB 2.0 PHY to the BCM5301x Device Tree file include
>
> - Stefan adds a missing USB clock to the BCM283x DT files, adds a DTSI file for
> the USB host mode on BCM283x and finally documents and adds support for the
> Raspberry Pi Zero
>
> - Florian adds support for the Northstar Plus Switch Register Access block which
> enables the integrated switch on these SoCs and enables the switch ports on the
> BCM958625HR reference board
>
I pulled this into next/dt last Thursday but forgot to send a notification.
Florian already asked me about on Friday, thanks a lot for paying attention!
Arnd
^ permalink raw reply
* [PATCH] pinctrl: nomadik: don't default-flag IRQs as falling
From: Marc Zyngier @ 2016-09-19 8:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474273330-15789-1-git-send-email-linus.walleij@linaro.org>
On 19/09/16 09:22, Linus Walleij wrote:
> There is no point in adding any default trigger for these
> GPIO interrupts: the device tree should contain all trigger
> information and the platforms using the driver boots
> exclusively from device tree.
>
> Also the boot log is nagging me to fix this:
>
> [ 0.771057] ------------[ cut here ]------------
> [ 0.775695] WARNING: CPU: 0 PID: 1 at
> ../drivers/gpio/gpiolib.c:1622 _gpiochip_irqchip_add+0x138/0x160
> [ 0.785034] /soc/gpio at 8012e000: Ignoring 2 default trigger
> (...)
> [ 0.942962] gpio 8012e000.gpio: at address e08f8000
> (etc ad nauseam)
>
> Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> drivers/pinctrl/nomadik/pinctrl-nomadik.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c
> index 205fb399268a..d318ca055489 100644
> --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c
> +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c
> @@ -1177,7 +1177,7 @@ static int nmk_gpio_probe(struct platform_device *dev)
> irqchip,
> 0,
> handle_edge_irq,
> - IRQ_TYPE_EDGE_FALLING);
> + IRQ_TYPE_NONE);
> if (ret) {
> dev_err(&dev->dev, "could not add irqchip\n");
> gpiochip_remove(&nmk_chip->chip);
>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply
* [PATCH v2] ARM: dts: exynos: Add entries for sound support on Odroid-XU board
From: Sylwester Nawrocki @ 2016-09-19 8:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160917200017.GA13666@kozik-lap>
On 09/17/2016 10:00 PM, Krzysztof Kozlowski wrote:
> On Fri, Sep 16, 2016 at 01:58:32PM +0200, Krzysztof Kozlowski wrote:
>> > On 09/16/2016 01:25 PM, Sylwester Nawrocki wrote:
>>> > > On 09/16/2016 01:22 PM, Sylwester Nawrocki wrote:
>>>> > >> This patch adds device nodes for the AUDSS clock controller,
>>>> > >> peripheral DMA 0/1 controllers and the Audio Subsystem I2S controller.
>>>> > >> These entries are required for sound support on Odroid-XU board.
>>>> > >>
>>>> > >> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
>>>> > >> ---
>>>> > >> This patch depends on a patch adding clock ID macro definitions.
>>>> > >> I'm going to provide a topic branch containing required changes.
>>>> > >>
>>>> > >> Changes since v1:
>>>> > >> - GIC_SPI, IRQ_TYPE_NONE used in the PDMA and max98080 interrupt
>>>> > >> specifiers,
>>>> > >> - assigned-clock-* properties moved to respective controller
>>>> > >> nodes.
>>> > >
>>> > > And here is a pull request containing clk dependency patches:
>>> > >
>>> > > The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc:
>>> > >
>>> > > Linux 4.8-rc1 (2016-08-07 18:18:00 -0700)
>>> > >
>>> > > are available in the git repository at:
>>> > >
>>> > > git://linuxtv.org/snawrocki/samsung.git tags/clk-v4.9-exynos54x0-dt
>>> > >
>>> > > for you to fetch changes up to 58d6506f327e3d192998ba03632f546da221b8d8:
>>> > >
>>> > > clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocks (2016-09-09
>>> > > 10:13:02 +0200)
>>> > >
>> >
>> > Pulled and applied, thanks!
>
> This does not boot...
> http://www.krzk.eu/builders/boot-odroid-xu-exynos/builds/216
> http://www.krzk.eu/builders/boot-odroid-xu-multi_v7/builds/195
>
> I am going to send pull request this weekend (or Monday) so probably this
> won't be included. If by any chance you prepare a fix soon, then it
> will save me from rebasing the branch.
Oops, indeed, I didn't test with just that part of clk changes applied.
The only resolution here I can see is to pull my whole clk branch,
it has already been pulled to the upstream clk tree.
The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc:
Linux 4.8-rc1 (2016-08-07 18:18:00 -0700)
are available in the git repository at:
git://linuxtv.org/snawrocki/samsung.git tags/clk-v4.9-samsung
for you to fetch changes up to be95d2c7d918b2b7b973378a1e92bdc6559c21f9:
clk: samsung: Add support for EPLL on exynos5410 (2016-09-09 17:35:13 +0200)
----------------------------------------------------------------
In addition to a few clean up and code consolidation patches this
includes:
- addition of sound subsystem related clocks for Exynos5410 SoC
(EPLL, PDMA) and support for "samsung,exynos5410-audss-clock"
compatible in the clk-exynos-audss driver,
- addition of DRAM controller related clocks for exynos5420,
- MAINTAINERS update adding Chanwoo Choi as the Samsung SoC
clock drivers co-maintainer.
----------------------------------------------------------------
Chanwoo Choi (5):
clk: samsung: Add clock IDs for the CMU_CDREX (DRAM Express Controller)
MAINTAINERS: Add myself as Samsung SoC clock drivers co-maintainer
clk: samsung: exynos5260: Move struct samsung_cmu_info to init section
clk: samsung: exynos5410: Use samsung_cmu_register_one() to simplify code
clk: samsung: exynos5420: Add clocks for CMU_CDREX domain
Sylwester Nawrocki (7):
clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocks
clk: samsung: exynos5410: Expose the peripheral DMA gate clocks
clk: samsung: Use common registration function for pll2550x
clk: samsung: clk-exynos-audss: controller variant handling rework
clk: samsung: clk-exynos-audss: Add exynos5410 compatible
clk: samsung: clk-exynos-audss: Whitespace and debug trace cleanup
clk: samsung: Add support for EPLL on exynos5410
.../devicetree/bindings/clock/clk-exynos-audss.txt | 4 +-
.../devicetree/bindings/clock/exynos5410-clock.txt | 21 +-
MAINTAINERS | 3 +
drivers/clk/samsung/clk-exynos-audss.c | 84 +++--
drivers/clk/samsung/clk-exynos5260.c | 350 ++++++++++-----------
drivers/clk/samsung/clk-exynos5410.c | 61 ++--
drivers/clk/samsung/clk-exynos5420.c | 37 +++
drivers/clk/samsung/clk-exynos5440.c | 9 +-
drivers/clk/samsung/clk-pll.c | 154 ++++++---
drivers/clk/samsung/clk-pll.h | 2 +
include/dt-bindings/clock/exynos5410.h | 3 +
include/dt-bindings/clock/exynos5420.h | 11 +-
include/dt-bindings/clock/exynos5440.h | 2 +
13 files changed, 453 insertions(+), 288 deletions(-)
--
Thanks,
Sylwester
^ permalink raw reply
* [PATCH] arm: dts: fix rk3066a based boards vdd_log voltage initialization
From: Andy Yan @ 2016-09-19 8:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474274639-27768-1-git-send-email-andy.yan@rock-chips.com>
The current rk3066a based boards(Rayeager, Bqcurie2, Marsboard) use
pwm modulate vdd_logic voltage, but the pwm is default disabled and
the pwm pin acts as a gpio before pwm regulator probed, so the pwm
regulator driver will get a zero dutycycle at probe time, so change
the initial dutycycle to zero to match pwm_regulator_init_state check.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 2 +-
arch/arm/boot/dts/rk3066a-marsboard.dts | 2 +-
arch/arm/boot/dts/rk3066a-rayeager.dts | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index bc674ee..618450d 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -61,7 +61,7 @@
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
- voltage-table = <1000000 100>,
+ voltage-table = <1000000 0>,
<1200000 42>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/rk3066a-marsboard.dts b/arch/arm/boot/dts/rk3066a-marsboard.dts
index a2b763e..ddc680b 100644
--- a/arch/arm/boot/dts/rk3066a-marsboard.dts
+++ b/arch/arm/boot/dts/rk3066a-marsboard.dts
@@ -59,7 +59,7 @@
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
- voltage-table = <1000000 100>,
+ voltage-table = <1000000 0>,
<1200000 42>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/rk3066a-rayeager.dts b/arch/arm/boot/dts/rk3066a-rayeager.dts
index 2536b3a..30aee99 100644
--- a/arch/arm/boot/dts/rk3066a-rayeager.dts
+++ b/arch/arm/boot/dts/rk3066a-rayeager.dts
@@ -84,7 +84,7 @@
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
- voltage-table = <1000000 100>,
+ voltage-table = <1000000 0>,
<1200000 42>;
status = "okay";
};
--
2.7.4
^ permalink raw reply related
* [PATCH 0/1] fix rk3066a based boards boot issue on linux-4.8
From: Andy Yan @ 2016-09-19 8:43 UTC (permalink / raw)
To: linux-arm-kernel
Hi, heiko:
I found my Rayeager board couldn't boot up on linux 4.8. After some
dig, I found the pwm-regulator for vdd_log register failed and found
some change in Boris's patch: commit 87248991a1de(regulator: pwm: Properly
initialize the ->state field).
I send this patch to make the pwm-regulator can register success on
this change.
Andy Yan (1):
arm: dts: fix rk3066a based boards vdd_log voltage initialization
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 2 +-
arch/arm/boot/dts/rk3066a-marsboard.dts | 2 +-
arch/arm/boot/dts/rk3066a-rayeager.dts | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
--
2.7.4
^ permalink raw reply
* [PATCH v4 7/7] ARM: dts: bcm283x: drop alt3 from &gpio
From: Gerd Hoffmann @ 2016-09-19 8:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474274603-24215-1-git-send-email-kraxel@redhat.com>
As the alt3 group has no pins left drop it from &gpio.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 2 +-
arch/arm/boot/dts/bcm2835-rpi-a.dts | 2 +-
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 2 +-
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 2 +-
arch/arm/boot/dts/bcm2835-rpi-b.dts | 2 +-
arch/arm/boot/dts/bcm2835-rpi-zero.dts | 2 +-
arch/arm/boot/dts/bcm2835-rpi.dtsi | 5 -----
arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 2 +-
8 files changed, 7 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
index f7f9db3..21507c9 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
@@ -22,7 +22,7 @@
};
&gpio {
- pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
+ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
/* I2S interface */
i2s_alt0: i2s_alt0 {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts
index 8be102f..5afba09 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
@@ -15,7 +15,7 @@
};
&gpio {
- pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>;
+ pinctrl-0 = <&gpioout &alt0 &i2s_alt2>;
/* I2S interface */
i2s_alt2: i2s_alt2 {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
index 35cde65..38f66aa 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
@@ -23,7 +23,7 @@
};
&gpio {
- pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
+ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
/* I2S interface */
i2s_alt0: i2s_alt0 {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
index 84df85e..75e045a 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
@@ -16,7 +16,7 @@
};
&gpio {
- pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>;
+ pinctrl-0 = <&gpioout &alt0 &i2s_alt2>;
/* I2S interface */
i2s_alt2: i2s_alt2 {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
index 8e626a8..76a254b 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -16,7 +16,7 @@
};
&gpio {
- pinctrl-0 = <&gpioout &alt0 &alt3>;
+ pinctrl-0 = <&gpioout &alt0>;
};
&hdmi {
diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
index 60e359f..7c1c180 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
@@ -26,7 +26,7 @@
};
&gpio {
- pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
+ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
/* I2S interface */
i2s_alt0: i2s_alt0 {
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 3f0ce61..a46fa41 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -41,11 +41,6 @@
brcm,pins = <4 5 7 8 9 10 11>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
-
- alt3: alt3 {
- brcm,pins = <>;
- brcm,function = <BCM2835_FSEL_ALT3>;
- };
};
&i2c0 {
diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
index 39dccf6..bf19e8c 100644
--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
@@ -27,7 +27,7 @@
};
&gpio {
- pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
+ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
/* I2S interface */
i2s_alt0: i2s_alt0 {
--
1.8.3.1
^ permalink raw reply related
* [PATCH v4 6/7] ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio
From: Gerd Hoffmann @ 2016-09-19 8:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474274603-24215-1-git-send-email-kraxel@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 8688204..3f0ce61 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -43,7 +43,7 @@
};
alt3: alt3 {
- brcm,pins = <48 49 50 51 52 53>;
+ brcm,pins = <>;
brcm,function = <BCM2835_FSEL_ALT3>;
};
};
@@ -67,6 +67,8 @@
};
&sdhci {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_gpio48>;
status = "okay";
bus-width = <4>;
};
--
1.8.3.1
^ permalink raw reply related
* [PATCH v4 5/7] ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio
From: Gerd Hoffmann @ 2016-09-19 8:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474274603-24215-1-git-send-email-kraxel@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index b936978..8688204 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
};
alt0: alt0 {
- brcm,pins = <2 3 4 5 7 8 9 10 11>;
+ brcm,pins = <4 5 7 8 9 10 11>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
@@ -56,6 +56,8 @@
};
&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_gpio2>;
status = "okay";
clock-frequency = <100000>;
};
--
1.8.3.1
^ permalink raw reply related
* [PATCH v4 4/7] ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio
From: Gerd Hoffmann @ 2016-09-19 8:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474274603-24215-1-git-send-email-kraxel@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index ff62236..b936978 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
};
alt0: alt0 {
- brcm,pins = <0 1 2 3 4 5 7 8 9 10 11>;
+ brcm,pins = <2 3 4 5 7 8 9 10 11>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
@@ -49,6 +49,8 @@
};
&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_gpio0>;
status = "okay";
clock-frequency = <100000>;
};
--
1.8.3.1
^ permalink raw reply related
* [PATCH v4 3/7] ARM: dts: bcm283x: add pinctrl group to &pwm, drop pins from &gpio
From: Gerd Hoffmann @ 2016-09-19 8:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474274603-24215-1-git-send-email-kraxel@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 88bcd0c..ff62236 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
};
alt0: alt0 {
- brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 40 45>;
+ brcm,pins = <0 1 2 3 4 5 7 8 9 10 11>;
brcm,function = <BCM2835_FSEL_ALT0>;
};
@@ -68,6 +68,8 @@
};
&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
status = "okay";
};
--
1.8.3.1
^ permalink raw reply related
* [PATCH v4 2/7] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
From: Gerd Hoffmann @ 2016-09-19 8:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474274603-24215-1-git-send-email-kraxel@redhat.com>
From: Eric Anholt <eric@anholt.net>
The BCM2835-ARM-Peripherals.pdf documentation specifies what the
function selects do for the pins, and there are a bunch of obvious
groupings to be made. With these created, we'll be able to replace
bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
references to specific groups we want enabled.
Also add pinctrl groups for emmc and sdhost.
Based on patches by Eric Anholt <eric@anholt.net>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
arch/arm/boot/dts/bcm283x.dtsi | 203 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 203 insertions(+)
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 4d9f3ab..68d559e 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -131,6 +131,209 @@
interrupt-controller;
#interrupt-cells = <2>;
+
+ /* Defines pin muxing groups according to
+ * BCM2835-ARM-Peripherals.pdf page 102.
+ *
+ * While each pin can have its mux selected
+ * for various functions individually, some
+ * groups only make sense to switch to a
+ * particular function together.
+ */
+ dpi_gpio0: dpi_gpio0 {
+ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
+ 12 13 14 15 16 17 18 19
+ 20 21 22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ emmc_gpio22: emmc_gpio22 {
+ brcm,pins = <22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ emmc_gpio34: emmc_gpio34 {
+ brcm,pins = <34 35 36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ brcm,pull = <BCM2835_PUD_OFF
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP
+ BCM2835_PUD_UP>;
+ };
+ emmc_gpio48: emmc_gpio48 {
+ brcm,pins = <48 49 50 51 52 53>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ gpclk0_gpio4: gpclk0_gpio4 {
+ brcm,pins = <4>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio5: gpclk1_gpio5 {
+ brcm,pins = <5>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio42: gpclk1_gpio42 {
+ brcm,pins = <42>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio44: gpclk1_gpio44 {
+ brcm,pins = <44>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk2_gpio6: gpclk2_gpio6 {
+ brcm,pins = <6>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk2_gpio43: gpclk2_gpio43 {
+ brcm,pins = <43>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+ i2c0_gpio0: i2c0_gpio0 {
+ brcm,pins = <0 1>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c0_gpio32: i2c0_gpio32 {
+ brcm,pins = <32 34>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c0_gpio44: i2c0_gpio44 {
+ brcm,pins = <44 45>;
+ brcm,function = <BCM2835_FSEL_ALT1>;
+ };
+ i2c1_gpio2: i2c1_gpio2 {
+ brcm,pins = <2 3>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c1_gpio44: i2c1_gpio44 {
+ brcm,pins = <44 45>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ i2c_slave_gpio18: i2c_slave_gpio18 {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ jtag_gpio4: jtag_gpio4 {
+ brcm,pins = <4 5 6 12 13>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ jtag_gpio22: jtag_gpio22 {
+ brcm,pins = <22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+
+ pcm_gpio18: pcm_gpio18 {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pcm_gpio28: pcm_gpio28 {
+ brcm,pins = <28 29 30 31>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+
+ pwm0_gpio12: pwm0_gpio12 {
+ brcm,pins = <12>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm0_gpio18: pwm0_gpio18 {
+ brcm,pins = <18>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm0_gpio40: pwm0_gpio40 {
+ brcm,pins = <40>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio13: pwm1_gpio13 {
+ brcm,pins = <13>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio19: pwm1_gpio19 {
+ brcm,pins = <19>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm1_gpio41: pwm1_gpio41 {
+ brcm,pins = <41>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio45: pwm1_gpio45 {
+ brcm,pins = <45>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+ sdhost_gpio48: sdhost_gpio48 {
+ brcm,pins = <48 49 50 51 52 53>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+ spi0_gpio7: spi0_gpio7 {
+ brcm,pins = <7 8 9 10 11>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ spi0_gpio35: spi0_gpio35 {
+ brcm,pins = <35 36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ spi1_gpio16: spi1_gpio16 {
+ brcm,pins = <16 17 18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ spi2_gpio40: spi2_gpio40 {
+ brcm,pins = <40 41 42 43 44 45>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+
+ uart0_gpio14: uart0_gpio14 {
+ brcm,pins = <14 15>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ /* Separate from the uart0_gpio14 group
+ * because it conflicts with spi1_gpio16, and
+ * people often run uart0 on the two pins
+ * without flow contrl.
+ */
+ uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
+ brcm,pins = <16 17>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ uart0_gpio30: uart0_gpio30 {
+ brcm,pins = <30 31>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
+ brcm,pins = <32 33>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ uart1_gpio14: uart1_gpio14 {
+ brcm,pins = <14 15>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
+ brcm,pins = <16 17>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_gpio32: uart1_gpio32 {
+ brcm,pins = <32 33>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
+ brcm,pins = <30 31>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_gpio36: uart1_gpio36 {
+ brcm,pins = <36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ uart1_gpio40: uart1_gpio40 {
+ brcm,pins = <40 41>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
+ brcm,pins = <42 43>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
};
uart0: serial at 7e201000 {
--
1.8.3.1
^ permalink raw reply related
* [PATCH v4 1/7] pinctrl: bcm2835: add pull defines to dt bindings
From: Gerd Hoffmann @ 2016-09-19 8:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474274603-24215-1-git-send-email-kraxel@redhat.com>
Also delete (unused) private enum from driver.
The pull defines can be used instead if needed.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
drivers/pinctrl/bcm/pinctrl-bcm2835.c | 6 ------
include/dt-bindings/pinctrl/bcm2835.h | 5 +++++
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index fa77165..4cf612b 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -76,12 +76,6 @@ enum bcm2835_pinconf_param {
BCM2835_PINCONF_PARAM_PULL,
};
-enum bcm2835_pinconf_pull {
- BCM2835_PINCONFIG_PULL_NONE,
- BCM2835_PINCONFIG_PULL_DOWN,
- BCM2835_PINCONFIG_PULL_UP,
-};
-
#define BCM2835_PINCONF_PACK(_param_, _arg_) ((_param_) << 16 | (_arg_))
#define BCM2835_PINCONF_UNPACK_PARAM(_conf_) ((_conf_) >> 16)
#define BCM2835_PINCONF_UNPACK_ARG(_conf_) ((_conf_) & 0xffff)
diff --git a/include/dt-bindings/pinctrl/bcm2835.h b/include/dt-bindings/pinctrl/bcm2835.h
index 6f0bc37..e4e4fdf 100644
--- a/include/dt-bindings/pinctrl/bcm2835.h
+++ b/include/dt-bindings/pinctrl/bcm2835.h
@@ -24,4 +24,9 @@
#define BCM2835_FSEL_ALT2 6
#define BCM2835_FSEL_ALT3 7
+/* brcm,pull property */
+#define BCM2835_PUD_OFF 0
+#define BCM2835_PUD_DOWN 1
+#define BCM2835_PUD_UP 2
+
#endif /* __DT_BINDINGS_PINCTRL_BCM2835_H__ */
--
1.8.3.1
^ permalink raw reply related
* [PATCH v4 0/7] ARM: dts: bcm283x: add and use pinctrl groups
From: Gerd Hoffmann @ 2016-09-19 8:43 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
New in v4: Patch #6 has been splitted into two: Patch 6 just moves
pinctrl from &gpio to &sdhci. Removing the empty now alt3 group
-- including all references as pointed out by Stefan Wahren in review --
is done by the new patch 7. Patches 1-5 are unchanged.
cheers,
Gerd
Eric Anholt (1):
ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
Gerd Hoffmann (6):
pinctrl: bcm2835: add pull defines to dt bindings
ARM: dts: bcm283x: add pinctrl group to &pwm, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio
ARM: dts: bcm283x: drop alt3 from &gpio
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 2 +-
arch/arm/boot/dts/bcm2835-rpi-a.dts | 2 +-
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 2 +-
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 2 +-
arch/arm/boot/dts/bcm2835-rpi-b.dts | 2 +-
arch/arm/boot/dts/bcm2835-rpi-zero.dts | 2 +-
arch/arm/boot/dts/bcm2835-rpi.dtsi | 15 ++-
arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 2 +-
arch/arm/boot/dts/bcm283x.dtsi | 203 +++++++++++++++++++++++++++++++
drivers/pinctrl/bcm/pinctrl-bcm2835.c | 6 -
include/dt-bindings/pinctrl/bcm2835.h | 5 +
11 files changed, 224 insertions(+), 19 deletions(-)
--
1.8.3.1
^ permalink raw reply
* [PATCH RFC 8/8] ARM: dts: sk-rzg1m: initial device tree
From: Geert Uytterhoeven @ 2016-09-19 8:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2097453.1xPZsJcFmC@wasted.cogentembedded.com>
On Fri, Sep 16, 2016 at 3:38 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Add the initial device tree for the R8A7743 SoC based SK-RZG1M board.
> The board has one debug serial port (SCIF0); include support for it, so
> that the serial console can work.
>
> Based on the original (and large) patch by Dmitry Shifrin
> <dmitry.shifrin@cogentembedded.com>.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> --- /dev/null
> +++ renesas/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
> @@ -0,0 +1,44 @@
> + compatible = "renesas,sk-rzg1m", "renesas,r8a7743";
To be documented in Documentation/devicetree/bindings/arm/shmobile.txt
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH] ASoC: samsung: make audio interface/controller explicitly
From: Mark Brown @ 2016-09-19 8:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474207751-9804-2-git-send-email-ayaka@soulik.info>
On Sun, Sep 18, 2016 at 10:09:11PM +0800, Randy Li wrote:
> It is simple sound card time, we could assign different codec
> to a interface without making a specific driver for it.
> config SND_SAMSUNG_AC97
> - tristate
> + tristate "Samsung AC97 controller support"
> select SND_SOC_AC97_BUS
Are you *sure* simple-card works for AC'97?
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 473 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20160919/3328cc74/attachment-0001.sig>
^ permalink raw reply
* [PATCH] make samsung interface entries explicitly
From: Mark Brown @ 2016-09-19 8:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474207751-9804-1-git-send-email-ayaka@soulik.info>
On Sun, Sep 18, 2016 at 10:09:10PM +0800, Randy Li wrote:
> I found those modules should be selected directly, as I
> only use the simple sound card.
Please don't send cover letters for single patches, if there is anything
that needs saying put it in the changelog of the patch or after the ---
if it's administrative stuff. This reduces mail volume and ensures that
any important information is recorded in the changelog rather than being
lost.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 473 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20160919/23df5cd9/attachment-0001.sig>
^ permalink raw reply
* [PATCH RFC 7/8] ARM: dts: r8a7743: add [H]SCIF support
From: Geert Uytterhoeven @ 2016-09-19 8:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2338956.oSVFAsJyhK@wasted.cogentembedded.com>
Hi Sergei,
On Fri, Sep 16, 2016 at 3:37 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Describe [H]SCIFs in the R8A7743 device tree.
>
> Based on the original (and large) patch by Dmitry Shifrin
> <dmitry.shifrin@cogentembedded.com>.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> --- renesas.orig/arch/arm/boot/dts/r8a7743.dtsi
> +++ renesas/arch/arm/boot/dts/r8a7743.dtsi
> @@ -154,6 +154,268 @@
> dma-channels = <15>;
> };
>
> + scifa0: serial at e6c40000 {
> + compatible = "renesas,scifa-r8a7743",
To be documented...
> + "renesas,rcar-gen2-scifa", "renesas,scifa";
> + reg = <0 0xe6c40000 0 64>;
> + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&mstp2_clks R8A7743_CLK_SCIFA0>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x21>, <&dmac0 0x22>,
> + <&dmac1 0x21>, <&dmac1 0x22>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
> + status = "disabled";
> + };
[...]
> + scifb0: serial at e6c20000 {
> + compatible = "renesas,scifb-r8a7743",
To be documented...
> + "renesas,rcar-gen2-scifb", "renesas,scifb";
> + reg = <0 0xe6c20000 0 64>;
This does not cover the whole register block (aha, also on existing Gen2).
"reg = <0 0xe6c20000 0 256>;"?
> + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&mstp2_clks R8A7743_CLK_SCIFB0>;
> + clock-names = "fck";
> + dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
> + <&dmac1 0x3d>, <&dmac1 0x3e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
> + status = "disabled";
> + };
[...]
> + scif0: serial at e6e60000 {
> + compatible = "renesas,scif-r8a7743",
To be documented...
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6e60000 0 64>;
> + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&mstp7_clks R8A7743_CLK_SCIF0>, <&zs_clk>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
> + <&dmac1 0x29>, <&dmac1 0x2a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
> + status = "disabled";
> + };
> +
> + scif1: serial at e6e68000 {
> + compatible = "renesas,scif-r8a7743",
> + "renesas,rcar-gen2-scif", "renesas,scif";
> + reg = <0 0xe6e68000 0 64>;
> + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&mstp7_clks R8A7743_CLK_SCIF1>, <&zs_clk>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
> + <&dmac1 0x2d>, <&dmac1 0x2e>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
> + status = "disabled";
> + };
[...]
> + hscif0: serial at e62c0000 {
> + compatible = "renesas,hscif-r8a7743",
To be documented...
> + "renesas,rcar-gen2-hscif", "renesas,hscif";
> + reg = <0 0xe62c0000 0 96>;
> + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&mstp7_clks R8A7743_CLK_HSCIF0>, <&zs_clk>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
> + <&dmac1 0x39>, <&dmac1 0x3a>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
> + status = "disabled";
> + };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH] dmaengine: sun6i: Add support for Allwinner A83T (sun8i) variant
From: Maxime Ripard @ 2016-09-19 8:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160918080103.ADDBE110E@mail.free-electrons.com>
On Sun, Sep 18, 2016 at 09:59:50AM +0200, Jean-Francois Moine wrote:
> The A83T SoC has the same dma engine as the A31 (sun6i), with a reduced
> amount of endpoints and physical channels.
>
> Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20160919/445ea2c3/attachment.sig>
^ permalink raw reply
* [PATCH] pinctrl: nomadik: don't default-flag IRQs as falling
From: Linus Walleij @ 2016-09-19 8:22 UTC (permalink / raw)
To: linux-arm-kernel
There is no point in adding any default trigger for these
GPIO interrupts: the device tree should contain all trigger
information and the platforms using the driver boots
exclusively from device tree.
Also the boot log is nagging me to fix this:
[ 0.771057] ------------[ cut here ]------------
[ 0.775695] WARNING: CPU: 0 PID: 1 at
../drivers/gpio/gpiolib.c:1622 _gpiochip_irqchip_add+0x138/0x160
[ 0.785034] /soc/gpio at 8012e000: Ignoring 2 default trigger
(...)
[ 0.942962] gpio 8012e000.gpio: at address e08f8000
(etc ad nauseam)
Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/nomadik/pinctrl-nomadik.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c
index 205fb399268a..d318ca055489 100644
--- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c
+++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c
@@ -1177,7 +1177,7 @@ static int nmk_gpio_probe(struct platform_device *dev)
irqchip,
0,
handle_edge_irq,
- IRQ_TYPE_EDGE_FALLING);
+ IRQ_TYPE_NONE);
if (ret) {
dev_err(&dev->dev, "could not add irqchip\n");
gpiochip_remove(&nmk_chip->chip);
--
2.7.4
^ permalink raw reply related
* [PATCH RFC 6/8] ARM: dts: r8a7743: add SYS-DMAC support
From: Geert Uytterhoeven @ 2016-09-19 8:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1815255.1arMxK7TDL@wasted.cogentembedded.com>
On Fri, Sep 16, 2016 at 3:36 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> --- renesas.orig/arch/arm/boot/dts/r8a7743.dtsi
> +++ renesas/arch/arm/boot/dts/r8a7743.dtsi
> @@ -90,6 +90,70 @@
> #power-domain-cells = <1>;
> };
>
> + dmac0: dma-controller at e6700000 {
> + compatible = "renesas,dmac-r8a7743",
To be documented.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH v4 2/2] ARM: dts: sun8i: enable UART1 for iNet D978 Rev2 board
From: Maxime Ripard @ 2016-09-19 8:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160916151642.27907-2-icenowy@aosc.xyz>
On Fri, Sep 16, 2016 at 11:16:42PM +0800, Icenowy Zheng wrote:
> UART1 is connected to the bluetooth part of RTL8723BS WiFi/BT combo card
> on iNet D978 Rev2 board.
>
> Enable the UART1 to make it possible to use the modified hciattach by
> Realtek to drive the BT part of RTL8723BS.
>
> On the board no r_uart pins are found now (the onboard RX/TX pins are
> wired to PF2/PF4, which is muxed with mmc0), so also disabled it.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20160919/3d283f19/attachment-0001.sig>
^ permalink raw reply
* [PATCH RFC 6/8] ARM: dts: r8a7743: add SYS-DMAC support
From: Geert Uytterhoeven @ 2016-09-19 8:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1815255.1arMxK7TDL@wasted.cogentembedded.com>
On Fri, Sep 16, 2016 at 3:36 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Describe SYS-DMAC0/1 in the R8A7743 device tree.
>
> Based on the original (and large) patch by Dmitry Shifrin
> <dmitry.shifrin@cogentembedded.com>.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
(but the clocks properties will have to be changed due to CPG/MSSR)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH v4 1/2] ARM: dts: sun8i: add pinmux for UART1 at PG
From: Maxime Ripard @ 2016-09-19 8:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160916151642.27907-1-icenowy@aosc.xyz>
Hi,
On Fri, Sep 16, 2016 at 11:16:41PM +0800, Icenowy Zheng wrote:
> The UART1 at PG (PG6, PG7, PG8, PG9) is, in the Allwinner's reference
> tablet design of A23/33, used to connect to UART Bluetooth cards.
>
> Add the pinmux for it.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> ---
> This patch is splited in v4.
>
> arch/arm/boot/dts/sun8i-a23-a33.dtsi | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> index 7e05e09..c340885 100644
> --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> @@ -361,6 +361,20 @@
> allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> };
>
> + uart1_pins_a: uart1 at 0 {
> + allwinner,pins = "PG6", "PG7";
> + allwinner,function = "uart1";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +
> + uart1_pins_cts_rts_a: uart1-cts-rts at 0 {
> + allwinner,pins = "PG8", "PG9";
> + allwinner,function = "uart1";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +
It turns out the allwinner,drive and allwinner,pull properties are
optionnal. I removed them, and applied that patch.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20160919/38cead74/attachment.sig>
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox