* Regression in next with "softirq: fix tasklet_kill() and its users"
From: Tony Lindgren @ 2016-09-22 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <a305129a-e2b4-9ba1-9e94-7998277da035@oracle.com>
* Santosh Shilimkar <santosh.shilimkar@oracle.com> [160922 13:59]:
> On 9/22/2016 1:51 PM, Tony Lindgren wrote:
> > Hi Santosh,
> >
> > Looks like commit 1f5e9c3bc47f ("softirq: fix tasklet_kill() and
> > its users") causes pandaboard es to not get any IP address on the
> > smsc95xx USB Ethernet.
> >
> > Reverting the commits fixes the issue. Any ideas?
> >
> Yep. It was discussed today morning and Stephen was suppose to
> revert that commit from next for now.
>
> The tasklet core fix even though fixes the issue, there are many
> bad users of tasklet which are using tasklet APIs without
> doing any sort of tasklet initialization. So there is more
> work to do before the tasklet core can be fixed.
OK thanks for the info.
Regards,
Tony
^ permalink raw reply
* [PATCH v2] arm: dts: zynq: Add MicroZed board support
From: Sören Brinkmann @ 2016-09-22 20:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474550489-7005-1-git-send-email-jagan@amarulasolutions.com>
On Thu, 2016-09-22 at 18:51:29 +0530, Jagan Teki wrote:
> From: Jagan Teki <jteki@openedev.com>
>
> Added basic dts support for MicroZed board.
>
> - UART
> - SDHCI
> - Ethernet
>
> Cc: Soren Brinkmann <soren.brinkmann@xilinx.com>
> Cc: Michal Simek <michal.simek@xilinx.com>
> Signed-off-by: Jagan Teki <jteki@openedev.com>
> ---
> Changes for v2:
> - Add SDHCI
> - Add Ethernet
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/zynq-microzed.dts | 95 +++++++++++++++++++++++++++++++++++++
> 2 files changed, 96 insertions(+)
> create mode 100644 arch/arm/boot/dts/zynq-microzed.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index faacd52..4d7b858 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -862,6 +862,7 @@ dtb-$(CONFIG_ARCH_VT8500) += \
> wm8750-apc8750.dtb \
> wm8850-w70v2.dtb
> dtb-$(CONFIG_ARCH_ZYNQ) += \
> + zynq-microzed.dtb \
> zynq-parallella.dtb \
> zynq-zc702.dtb \
> zynq-zc706.dtb \
> diff --git a/arch/arm/boot/dts/zynq-microzed.dts b/arch/arm/boot/dts/zynq-microzed.dts
> new file mode 100644
> index 0000000..9e64496
> --- /dev/null
> +++ b/arch/arm/boot/dts/zynq-microzed.dts
> @@ -0,0 +1,95 @@
> +/*
> + * Copyright (C) 2015 Jagan Teki <jteki@openedev.com>
> + *
> + * This software is licensed under the terms of the GNU General Public
> + * License version 2, as published by the Free Software Foundation, and
> + * may be copied, distributed, and modified under those terms.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +/dts-v1/;
> +/include/ "zynq-7000.dtsi"
> +
> +/ {
> + model = "Zynq MicroZED Development Board";
> + compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000";
> +
> + aliases {
> + ethernet0 = &gem0;
> + serial0 = &uart1;
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x0 0x40000000>;
> + };
> +
> + chosen {
> + bootargs = "earlycon";
> + stdout-path = "serial0:115200n8";
> + };
> +
> + usb_phy0: phy0 {
> + compatible = "usb-nop-xceiv";
> + #phy-cells = <0>;
> + };
> +};
> +
> +&clkc {
> + ps-clk-frequency = <33333333>;
> +};
> +
> +&gem0 {
> + status = "okay";
> + phy-mode = "rgmii-id";
> + phy-handle = <ðernet_phy>;
> +
> + ethernet_phy: ethernet-phy at 0 {
> + reg = <0>;
> + };
> +};
> +
> +&sdhci0 {
> + status = "okay";
> +};
> +
> +&uart1 {
> + status = "okay";
> +};
> +
> +&usb0 {
> + status = "okay";
> + dr_mode = "host";
> + usb-phy = <&usb_phy0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usb0_default>;
> +};
> +
> +&pinctrl0 {
> + pinctrl_usb0_default: usb0-default {
> + mux {
> + groups = "usb0_0_grp";
> + function = "usb0";
> + };
> +
> + conf {
> + groups = "usb0_0_grp";
> + slew-rate = <0>;
> + io-standard = <1>;
> + };
> +
> + conf-rx {
> + pins = "MIO29", "MIO31", "MIO36";
> + bias-high-impedance;
> + };
> +
> + conf-tx {
> + pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
> + "MIO35", "MIO37", "MIO38", "MIO39";
> + bias-disable;
> + };
> + };
> +};
I guess it's not strictly required, but shouldn't there be pinctrl
descriptions for all devices?
S?ren
^ permalink raw reply
* Regression in next with "softirq: fix tasklet_kill() and its users"
From: Santosh Shilimkar @ 2016-09-22 20:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160922205122.ezsxjint2l6lytyi@atomide.com>
On 9/22/2016 1:51 PM, Tony Lindgren wrote:
> Hi Santosh,
>
> Looks like commit 1f5e9c3bc47f ("softirq: fix tasklet_kill() and
> its users") causes pandaboard es to not get any IP address on the
> smsc95xx USB Ethernet.
>
> Reverting the commits fixes the issue. Any ideas?
>
Yep. It was discussed today morning and Stephen was suppose to
revert that commit from next for now.
The tasklet core fix even though fixes the issue, there are many
bad users of tasklet which are using tasklet APIs without
doing any sort of tasklet initialization. So there is more
work to do before the tasklet core can be fixed.
Regards,
Santosh
^ permalink raw reply
* [PATCH] ARM: dts: exynos: Add reboot reason support for Trats2
From: Krzysztof Kozlowski @ 2016-09-22 20:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87shsrlq1f.fsf@monsta.com>
On Thu, Sep 22, 2016 at 08:59:03PM +0200, Wolfgang Wiedmeyer wrote:
>
> Krzysztof Kozlowski writes:
>
> > On Thu, Sep 22, 2016 at 06:48:35PM +0200, Wolfgang Wiedmeyer wrote:
> >> This allows to reboot the device into recovery mode and into the download
> >> mode of the bootloader.
> >
> > Which bootloader? Probably UBoot... or Samsung stock one? Could you put
> > that information here?
>
> I'm only working with the stock one. I was under the impression that the
> stock bootloader cannot be replaced on a i9300 because there's a
> signature check. Is UBoot loaded after the stock one on Trats2 or how
> does this work? I didn't find information on that.
+CC Marek,
Trats2 is working with U-Boot. Just U-Boot. However I never converted S3
into Trats2 on my own. I always used targets prepared to be "Trats2"
type.
Of course kernel is independent to bootloader but in that case you want
to use a specific interface between kernel and specific bootloader
type/version. In that case - this should be U-Boot, I think.
>
> >>
> >> Signed-off-by: Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de>
> >> ---
> >> arch/arm/boot/dts/exynos4412-trats2.dts | 14 ++++++++++++++
> >> arch/arm/boot/dts/exynos4x12.dtsi | 2 +-
> >> 2 files changed, 15 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
> >> index 129e973..a38d1e3 100644
> >> --- a/arch/arm/boot/dts/exynos4412-trats2.dts
> >> +++ b/arch/arm/boot/dts/exynos4412-trats2.dts
> >> @@ -1294,3 +1294,17 @@
> >> vtmu-supply = <&ldo10_reg>;
> >> status = "okay";
> >> };
> >> +
> >> +&pmu {
> >> + compatible = "syscon", "simple-mfd";
> >> +
> >> + reboot-mode {
> >> + compatible = "syscon-reboot-mode";
> >> + offset = <0x80c>;
> >> +
> >> + mode-normal = <0x12345670>;
> >> + mode-bootloader = <0x12345671>;
> >> + mode-download = <0x12345671>;
> >> + mode-recovery = <0x12345674>;
> >
> > Hmmm, how did you get these values? Are they already supported?
>
> I only have the vendor source drop as documentation. The magic mode
> values [1] and the offset [2] can be found there.
It would be useful to mention that in commit msg (just the source)...
however as I wrote above, these values should be for U-Boot, not the
stock one.
Best regards,
Krzysztof
>
> > It would be nice to document them:
> > 1. In Documentation/arm/Samsung/Bootloader-interface.txt
> > 2. In header. I hate such magic numbers... you could add new header next
> > to existing rockchip one:
> > include/dt-bindings/soc/samsung,boot-mode.h
> > (and update maintainers entry :) )
>
> Thanks for the review! I will do the documentation and update the commit
> message.
>
> Best regards,
> Wolfgang
>
> [1] https://code.fossencdi.org/kernel_samsung_smdk4412.git/tree/arch/arm/mach-exynos/sec-reboot.c#n65
>
> [2] https://code.fossencdi.org/kernel_samsung_smdk4412.git/tree/arch/arm/mach-exynos/include/mach/regs-pmu.h#n79
>
>
> --
> Website: https://fossencdi.org
> Jabber: wolfgang at wiedmeyer.de
> OpenPGP: 0F30 D1A0 2F73 F70A 6FEE 048E 5816 A24C 1075 7FC4
> Key download: https://wiedmeyer.de/keys/ww.asc
^ permalink raw reply
* Regression in next with "softirq: fix tasklet_kill() and its users"
From: Tony Lindgren @ 2016-09-22 20:51 UTC (permalink / raw)
To: linux-arm-kernel
Hi Santosh,
Looks like commit 1f5e9c3bc47f ("softirq: fix tasklet_kill() and
its users") causes pandaboard es to not get any IP address on the
smsc95xx USB Ethernet.
Reverting the commits fixes the issue. Any ideas?
Regards,
Tony
^ permalink raw reply
* [PATCH 3/3] arm64: Add the Raspberry Pi firmware's interface to the FXL6408.
From: Gerd Hoffmann @ 2016-09-22 20:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160919161314.25858-3-eric@anholt.net>
On Mo, 2016-09-19 at 17:13 +0100, Eric Anholt wrote:
> This gets us hotplug detection of HDMI, so that graphics now works at
> boot. Tested with watching the output of xrandr while plugging and
> unplugging the HDMI cable.
Very nice. Whole patch series:
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
/me hopes this lands in the 4.9 merge window.
cheers,
Gerd
^ permalink raw reply
* [PATCH v18 6/6] ARM: socfpga: fpga bridge driver support
From: atull @ 2016-09-22 19:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160809160039.GX29630@windriver.com>
On Tue, 9 Aug 2016, Paul Gortmaker wrote:
> [Re: [PATCH v18 6/6] ARM: socfpga: fpga bridge driver support] On 08/08/2016 (Mon 13:44) Moritz Fischer wrote:
>
> > Hi Alan,
> >
> > On Mon, Aug 8, 2016 at 12:18 PM, atull <atull@opensource.altera.com> wrote:
> >
> > >> Please don't use module.h in drivers controlled by a bool
> > >> Kconfig setting.
> > >>
> > >> THanks,
> > >> Paul.
> > >>
> > >
> > > Thanks for the feedback. Can you provide an example of what you
> > > would consider to be proper usage in the kernel?
> >
> >
> > I think Paul is suggesting to use
> >
> > static int __init alt_fpga_bridge_init(void)
> > {
> > platform_driver_register(&alt_fpga_bridge_driver);
> > }
> >
> > device_initcall(alt_fpga_bridge_init);
> >
> > or better:
> >
> > builtin_platform_driver(&alt_fpga_bridge_driver);
> >
> > Like for example in: drivers/cpuidle/cpuidle-mvebu-v7.c
>
> Yes, pretty much that -- if you have a bool Kconfig, you should be using
> builtin registration functions, and have no need for module.h or
> anything MODULE_<xyz> or any module_init/module_exit calls.
>
> An empty file containing nothing but #include <linux/module.h> will
> cause cpp to emit about 750k of goop, so we really should only be using
> it for drivers that are genuinely modular; i.e. tristate Kconfig.
>
> Thanks,
> Paul.
> --
>
> >
> > Cheers,
> >
> > Moritz
>
Thanks for the feedback and explanations!
I've retested my stuff with it all built as modules (mgr, bridged,
and fpga-region) and it all works that way as well as built in.
So I'll fix up the Kconfig as tristates for everybody. Also
I'll add some dependencies as FPGA_REGION should be dependent
on FPGA_BRIDGE.
Alan
^ permalink raw reply
* [PATCH] arm: dts: fix rk3066a based boards vdd_log voltage initialization
From: Mark Brown @ 2016-09-22 19:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160922201301.0157a292@bbrezillon>
On Thu, Sep 22, 2016 at 08:13:01PM +0200, Boris Brezillon wrote:
> So, there are 2 different problems here:
> 1/ the board no longer boots because of commit 87248991a1de and a
> missing entry in the voltage table
> 2/ claiming the PWM pins at probe time can cause glitches
> I'm currently trying to solve #1, but most of the discussion in this
> thread was about addressing #2.
Well, if you actually want the entry in the voltage table then adding it
does seem the most sensible fix.
> > That was a very
> > long e-mail so I might be missing something but the obvious thing seems
> > to be to force a state since we'll be doing that when we enable anyway.
> Hm, okay, but which state should we choose? The first entry in the
> voltage-table?
That's why we don't do this currently. Probably the closest one if we
can work out what it was trying to achieve.
> > Or just not have the voltage table and use it as a continuous regulator.
> Yes, but that means patching the DT, which means breaking the DT compat.
It sounds like you want to fix the DT anyway though?
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^ permalink raw reply
* [PATCH] ARM: dts: exynos: Add reboot reason support for Trats2
From: Wolfgang Wiedmeyer @ 2016-09-22 18:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160922174606.GA4988@kozik-lap>
Krzysztof Kozlowski writes:
> On Thu, Sep 22, 2016 at 06:48:35PM +0200, Wolfgang Wiedmeyer wrote:
>> This allows to reboot the device into recovery mode and into the download
>> mode of the bootloader.
>
> Which bootloader? Probably UBoot... or Samsung stock one? Could you put
> that information here?
I'm only working with the stock one. I was under the impression that the
stock bootloader cannot be replaced on a i9300 because there's a
signature check. Is UBoot loaded after the stock one on Trats2 or how
does this work? I didn't find information on that.
>>
>> Signed-off-by: Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de>
>> ---
>> arch/arm/boot/dts/exynos4412-trats2.dts | 14 ++++++++++++++
>> arch/arm/boot/dts/exynos4x12.dtsi | 2 +-
>> 2 files changed, 15 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
>> index 129e973..a38d1e3 100644
>> --- a/arch/arm/boot/dts/exynos4412-trats2.dts
>> +++ b/arch/arm/boot/dts/exynos4412-trats2.dts
>> @@ -1294,3 +1294,17 @@
>> vtmu-supply = <&ldo10_reg>;
>> status = "okay";
>> };
>> +
>> +&pmu {
>> + compatible = "syscon", "simple-mfd";
>> +
>> + reboot-mode {
>> + compatible = "syscon-reboot-mode";
>> + offset = <0x80c>;
>> +
>> + mode-normal = <0x12345670>;
>> + mode-bootloader = <0x12345671>;
>> + mode-download = <0x12345671>;
>> + mode-recovery = <0x12345674>;
>
> Hmmm, how did you get these values? Are they already supported?
I only have the vendor source drop as documentation. The magic mode
values [1] and the offset [2] can be found there.
> It would be nice to document them:
> 1. In Documentation/arm/Samsung/Bootloader-interface.txt
> 2. In header. I hate such magic numbers... you could add new header next
> to existing rockchip one:
> include/dt-bindings/soc/samsung,boot-mode.h
> (and update maintainers entry :) )
Thanks for the review! I will do the documentation and update the commit
message.
Best regards,
Wolfgang
[1] https://code.fossencdi.org/kernel_samsung_smdk4412.git/tree/arch/arm/mach-exynos/sec-reboot.c#n65
[2] https://code.fossencdi.org/kernel_samsung_smdk4412.git/tree/arch/arm/mach-exynos/include/mach/regs-pmu.h#n79
--
Website: https://fossencdi.org
Jabber: wolfgang at wiedmeyer.de
OpenPGP: 0F30 D1A0 2F73 F70A 6FEE 048E 5816 A24C 1075 7FC4
Key download: https://wiedmeyer.de/keys/ww.asc
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^ permalink raw reply
* [PATCH v3] dmaengine: s3c24xx: Add dma_slave_map for s3c2440 devices
From: Sam Van Den Berge @ 2016-09-22 18:51 UTC (permalink / raw)
To: linux-arm-kernel
This patch updates the s3c24xx dma driver to be able to pass a
dma_slave_map array via the platform data. This is needed to
be able to use the new, simpler dmaengine API [1].
I used the virtual DMA channels as a parameter for the dma_filter
function. By doing that, I could reuse the existing filter function in
drivers/dma/s3c24xx-dma.c.
I have tested this on my mini2440 board with the audio driver.
According to my observations, dma_request_slave_channel in the
function dmaengine_pcm_new in the file
sound/soc/soc-generic-dmaengine-pcm.c now returns a valid DMA channel
whereas before no DMA channel was returned at that point.
Entries for DMACH_XD0, DMACH_XD1 and DMACH_TIMER are missing because I
don't realy know which driver to use for these.
[1]
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-December/393635.html
Signed-off-by: Sam Van Den Berge <sam.van.den.berge@telenet.be>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
---
This patch depends on the audio fixes from Sylwester Nawrocki
(http://www.spinics.net/lists/arm-kernel/msg521918.html)
Changes since v2:
- s/3c2440-sdi/s3c2440-sdi/
- Removed reference to the audio fixes of Sylwester from the commit message
because I don't think it belongs in the commit message itself.
Changes since v1:
- rename arm into dmaengine in title
- one channel for s3c2440-sdi named "rx-tx"
arch/arm/mach-s3c24xx/common.c | 35 +++++++++++++++++++++++++++++++
drivers/dma/s3c24xx-dma.c | 3 +++
include/linux/platform_data/dma-s3c24xx.h | 6 ++++++
3 files changed, 44 insertions(+)
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index fe7485d..f6c3f15 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -33,6 +33,7 @@
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/platform_data/dma-s3c24xx.h>
+#include <linux/dmaengine.h>
#include <mach/hardware.h>
#include <mach/regs-clock.h>
@@ -445,10 +446,44 @@ static struct s3c24xx_dma_channel s3c2440_dma_channels[DMACH_MAX] = {
[DMACH_USB_EP4] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 3), },
};
+static const struct dma_slave_map s3c2440_dma_slave_map[] = {
+ /* TODO: DMACH_XD0 */
+ /* TODO: DMACH_XD1 */
+ { "s3c2440-sdi", "rx-tx", (void *)DMACH_SDI },
+ { "s3c2410-spi.0", "rx", (void *)DMACH_SPI0 },
+ { "s3c2410-spi.0", "tx", (void *)DMACH_SPI0 },
+ { "s3c2410-spi.1", "rx", (void *)DMACH_SPI1 },
+ { "s3c2410-spi.1", "tx", (void *)DMACH_SPI1 },
+ { "s3c2440-uart.0", "rx", (void *)DMACH_UART0 },
+ { "s3c2440-uart.0", "tx", (void *)DMACH_UART0 },
+ { "s3c2440-uart.1", "rx", (void *)DMACH_UART1 },
+ { "s3c2440-uart.1", "tx", (void *)DMACH_UART1 },
+ { "s3c2440-uart.2", "rx", (void *)DMACH_UART2 },
+ { "s3c2440-uart.2", "tx", (void *)DMACH_UART2 },
+ { "s3c2440-uart.3", "rx", (void *)DMACH_UART3 },
+ { "s3c2440-uart.3", "tx", (void *)DMACH_UART3 },
+ /* TODO: DMACH_TIMER */
+ { "s3c24xx-iis", "rx", (void *)DMACH_I2S_IN },
+ { "s3c24xx-iis", "tx", (void *)DMACH_I2S_OUT },
+ { "samsung-ac97", "rx", (void *)DMACH_PCM_IN },
+ { "samsung-ac97", "tx", (void *)DMACH_PCM_OUT },
+ { "samsung-ac97", "rx", (void *)DMACH_MIC_IN },
+ { "s3c-hsudc", "rx0", (void *)DMACH_USB_EP1 },
+ { "s3c-hsudc", "rx1", (void *)DMACH_USB_EP2 },
+ { "s3c-hsudc", "rx2", (void *)DMACH_USB_EP3 },
+ { "s3c-hsudc", "rx3", (void *)DMACH_USB_EP4 },
+ { "s3c-hsudc", "tx0", (void *)DMACH_USB_EP1 },
+ { "s3c-hsudc", "tx1", (void *)DMACH_USB_EP2 },
+ { "s3c-hsudc", "tx2", (void *)DMACH_USB_EP3 },
+ { "s3c-hsudc", "tx3", (void *)DMACH_USB_EP4 }
+};
+
static struct s3c24xx_dma_platdata s3c2440_dma_platdata = {
.num_phy_channels = 4,
.channels = s3c2440_dma_channels,
.num_channels = DMACH_MAX,
+ .slave_map = s3c2440_dma_slave_map,
+ .slavecnt = ARRAY_SIZE(s3c2440_dma_slave_map),
};
struct platform_device s3c2440_device_dma = {
diff --git a/drivers/dma/s3c24xx-dma.c b/drivers/dma/s3c24xx-dma.c
index ce67075..d5c85e7 100644
--- a/drivers/dma/s3c24xx-dma.c
+++ b/drivers/dma/s3c24xx-dma.c
@@ -1301,6 +1301,9 @@ static int s3c24xx_dma_probe(struct platform_device *pdev)
s3cdma->slave.device_prep_dma_cyclic = s3c24xx_dma_prep_dma_cyclic;
s3cdma->slave.device_config = s3c24xx_dma_set_runtime_config;
s3cdma->slave.device_terminate_all = s3c24xx_dma_terminate_all;
+ s3cdma->slave.filter.map = pdata->slave_map;
+ s3cdma->slave.filter.mapcnt = pdata->slavecnt;
+ s3cdma->slave.filter.fn = s3c24xx_dma_filter;
/* Register as many memcpy channels as there are physical channels */
ret = s3c24xx_dma_init_virtual_channels(s3cdma, &s3cdma->memcpy,
diff --git a/include/linux/platform_data/dma-s3c24xx.h b/include/linux/platform_data/dma-s3c24xx.h
index 89ba1b0..4f9aba4 100644
--- a/include/linux/platform_data/dma-s3c24xx.h
+++ b/include/linux/platform_data/dma-s3c24xx.h
@@ -30,16 +30,22 @@ struct s3c24xx_dma_channel {
u16 chansel;
};
+struct dma_slave_map;
+
/**
* struct s3c24xx_dma_platdata - platform specific settings
* @num_phy_channels: number of physical channels
* @channels: array of virtual channel descriptions
* @num_channels: number of virtual channels
+ * @slave_map: dma slave map matching table
+ * @slavecnt: number of elements in slave_map
*/
struct s3c24xx_dma_platdata {
int num_phy_channels;
struct s3c24xx_dma_channel *channels;
int num_channels;
+ const struct dma_slave_map *slave_map;
+ int slavecnt;
};
struct dma_chan;
--
1.9.1
^ permalink raw reply related
* [RFC/PATCH] usb: misc: Add a driver for TC7USB40MU
From: Stephen Boyd @ 2016-09-22 18:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160917011605.GB10392@b29397-desktop>
Quoting Peter Chen (2016-09-16 18:16:05)
> On Wed, Sep 14, 2016 at 01:55:02AM -0700, Stephen Boyd wrote:
> > Quoting Stephen Boyd (2016-09-13 18:42:46)
> > > On the db410c 96boards platform we have a TC7USB40MU[1] on the
> > > board to mux the D+/D- lines from the SoC between a micro usb
> > > "device" port and a USB hub for "host" roles. Upon a role switch,
> > > we need to change this mux to forward the D+/D- lines to either
> > > the port or the hub. Therefore, introduce a driver for this
> > > device that intercepts extcon USB_HOST events and logically
> > > asserts a gpio to mux the "host" D+/D- lines when a host cable is
> > > attached. When the cable goes away, it will logically deassert
> > > the gpio and mux the "device" lines.
> > >
> > > [1] https://toshiba.semicon-storage.com/ap-en/product/logic/bus-switch/detail.TC7USB40MU.html
> > >
> > > Cc: MyungJoo Ham <myungjoo.ham@samsung.com>
> > > Cc: Chanwoo Choi <cw00.choi@samsung.com>
> > > Cc: <devicetree@vger.kernel.org>
> > > Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
> > > ---
> > >
> > > Should I make the extcon part optional? I could see a case where there are two
> > > "OTG" ports connected to the mux (or two hubs), and for some reason the
> > > software may want to mux between them at runtime. If we mandate an extcon,
> > > that won't be possible to support. Perhaps it would be better to have
> > > the node, but connect it to the usb controller with a phandle (maybe of_graph
> > > endpoints would be useful too) so that when the controller wants to mux over
> > > a port it can do so.
> >
> > Here's some dts mock-up on top of the db410c for the of_graph stuff. I
> > haven't written any code around it, but the idea is to allow the binding
> > to specify how the mux is connected to upstream and downstream D+/D-
> > lines. This way, we can do some dt parsing of the endpoints and their
> > parent nodes to figure out if the mux needs to be set high or low to use
> > a device connector or a usb hub based on if the id cable is present.
> > Maybe I'm over thinking things though and we could just have a DT
> > property for that.
> >
> > soc {
> > usb at 78d9000 {
> > extcon = <&usb_id>, <&usb_id>;
>
> Why you have two same extcon phandler? From my mind, one should id,
> another should is vbus. Besides, I find extcon-usb-gpio.c is lack of
> vbus support, how you support vbus detection for
> connection/disconnection with PC for your chipidea msm patch set?
This was already in the dts files for db410c. In the chipidea binding
one is for EXTCON_USB (vbus) and one is for EXTCON_USB_HOST (id). My
understanding is that extcon-usb-gpio.c sends events for both EXTCON_USB
and EXTCON_USB_HOST when the gpio changes state. vbus detection is not
that great on this board because we only have on gpio for this.
^ permalink raw reply
* [PATCH v2] dmaengine: s3c24xx: Add dma_slave_map for s3c2440 devices
From: Sam Van Den Berge @ 2016-09-22 18:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <b32bfb03-e0d1-09b4-95fc-5a6301a9bde5@kernel.org>
On Fri, Sep 16, 2016 at 01:16:31PM +0200, Krzysztof Kozlowski wrote:
> On 09/15/2016 09:41 PM, Sam Van Den Berge wrote:
> > This patch updates the s3c24xx dma driver to be able to pass a
> > dma_slave_map array via the platform data. This is needed to
> > be able to use the new, simpler dmaengine API [1].
> > I used the virtual DMA channels as a parameter for the dma_filter
> > function. By doing that, I could reuse the existing filter function in
> > drivers/dma/s3c24xx-dma.c.
> >
> > I have tested this on my mini2440 board with the audio driver.
> > (I first applied the audio fixes from Sylwester Nawrocki [2])
> > According to my observations, dma_request_slave_channel in the
> > function dmaengine_pcm_new in the file
> > sound/soc/soc-generic-dmaengine-pcm.c now returns a valid DMA channel
> > whereas before no DMA channel was returned at that point.
> >
> > Entries for DMACH_XD0, DMACH_XD1 and DMACH_TIMER are missing because I
> > don't realy know which driver to use for these.
> >
> > [1]
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2015-December/393635.html
> > [2] http://www.spinics.net/lists/arm-kernel/msg521918.html
> >
> > Signed-off-by: Sam Van Den Berge <sam.van.den.berge@telenet.be>
> > Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> > Acked-by: Arnd Bergmann <arnd@arndb.de>
> >
> > ---
> >
> > Changes since v1:
> > - rename arm into dmaengine in title
> > - one channel for s3c2440-sdi named "rx-tx"
> >
> > arch/arm/mach-s3c24xx/common.c | 35 +++++++++++++++++++++++++++++++
> > drivers/dma/s3c24xx-dma.c | 3 +++
> > include/linux/platform_data/dma-s3c24xx.h | 6 ++++++
> > 3 files changed, 44 insertions(+)
>
> Vinod, do you want to take it through your tree? Not much difference for
> me, so in such case:
> Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
I was kinda waiting for an answer on this question because I didn't know
if I should add the acked-by or not but I'm going to assume that it's ok
so I'll include it in the third version of this patch.
>
> Best regards,
> Krzysztof
>
>
^ permalink raw reply
* [PATCH v2] ARM: dts: exynos: Add entries for sound support on Odroid-XU board
From: Krzysztof Kozlowski @ 2016-09-22 18:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5fef2bec-adcf-0230-cd00-7fc29cbbcd32@samsung.com>
On Mon, Sep 19, 2016 at 10:47:46AM +0200, Sylwester Nawrocki wrote:
> On 09/17/2016 10:00 PM, Krzysztof Kozlowski wrote:
> > On Fri, Sep 16, 2016 at 01:58:32PM +0200, Krzysztof Kozlowski wrote:
> >> > On 09/16/2016 01:25 PM, Sylwester Nawrocki wrote:
> >>> > > On 09/16/2016 01:22 PM, Sylwester Nawrocki wrote:
> >>>> > >> This patch adds device nodes for the AUDSS clock controller,
> >>>> > >> peripheral DMA 0/1 controllers and the Audio Subsystem I2S controller.
> >>>> > >> These entries are required for sound support on Odroid-XU board.
> >>>> > >>
> >>>> > >> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> >>>> > >> ---
> >>>> > >> This patch depends on a patch adding clock ID macro definitions.
> >>>> > >> I'm going to provide a topic branch containing required changes.
> >>>> > >>
> >>>> > >> Changes since v1:
> >>>> > >> - GIC_SPI, IRQ_TYPE_NONE used in the PDMA and max98080 interrupt
> >>>> > >> specifiers,
> >>>> > >> - assigned-clock-* properties moved to respective controller
> >>>> > >> nodes.
> >>> > >
> >>> > > And here is a pull request containing clk dependency patches:
> >>> > >
> >>> > > The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc:
> >>> > >
> >>> > > Linux 4.8-rc1 (2016-08-07 18:18:00 -0700)
> >>> > >
> >>> > > are available in the git repository at:
> >>> > >
> >>> > > git://linuxtv.org/snawrocki/samsung.git tags/clk-v4.9-exynos54x0-dt
> >>> > >
> >>> > > for you to fetch changes up to 58d6506f327e3d192998ba03632f546da221b8d8:
> >>> > >
> >>> > > clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocks (2016-09-09
> >>> > > 10:13:02 +0200)
> >>> > >
> >> >
> >> > Pulled and applied, thanks!
> >
> > This does not boot...
> > http://www.krzk.eu/builders/boot-odroid-xu-exynos/builds/216
> > http://www.krzk.eu/builders/boot-odroid-xu-multi_v7/builds/195
> >
> > I am going to send pull request this weekend (or Monday) so probably this
> > won't be included. If by any chance you prepare a fix soon, then it
> > will save me from rebasing the branch.
>
> Oops, indeed, I didn't test with just that part of clk changes applied.
> The only resolution here I can see is to pull my whole clk branch,
> it has already been pulled to the upstream clk tree.
Hmmmm, why the clock implementation is needed? Usually it should work
without it. The driver will just handle ENODEV or DEFER... Maybe there
is similar issue to the serial: e51e4d8a185d ("serial: samsung: Fix ERR
pointer dereference on deferred probe")?
Anyway, the patch will wait till next window opens. I hope it will work
then. :)
Best regards,
Krzysztof
>
> The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc:
>
> Linux 4.8-rc1 (2016-08-07 18:18:00 -0700)
>
> are available in the git repository at:
>
> git://linuxtv.org/snawrocki/samsung.git tags/clk-v4.9-samsung
>
> for you to fetch changes up to be95d2c7d918b2b7b973378a1e92bdc6559c21f9:
>
> clk: samsung: Add support for EPLL on exynos5410 (2016-09-09 17:35:13 +0200)
>
> ----------------------------------------------------------------
> In addition to a few clean up and code consolidation patches this
> includes:
> - addition of sound subsystem related clocks for Exynos5410 SoC
> (EPLL, PDMA) and support for "samsung,exynos5410-audss-clock"
> compatible in the clk-exynos-audss driver,
> - addition of DRAM controller related clocks for exynos5420,
> - MAINTAINERS update adding Chanwoo Choi as the Samsung SoC
> clock drivers co-maintainer.
>
> ----------------------------------------------------------------
> Chanwoo Choi (5):
> clk: samsung: Add clock IDs for the CMU_CDREX (DRAM Express Controller)
> MAINTAINERS: Add myself as Samsung SoC clock drivers co-maintainer
> clk: samsung: exynos5260: Move struct samsung_cmu_info to init section
> clk: samsung: exynos5410: Use samsung_cmu_register_one() to simplify code
> clk: samsung: exynos5420: Add clocks for CMU_CDREX domain
>
> Sylwester Nawrocki (7):
> clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocks
> clk: samsung: exynos5410: Expose the peripheral DMA gate clocks
> clk: samsung: Use common registration function for pll2550x
> clk: samsung: clk-exynos-audss: controller variant handling rework
> clk: samsung: clk-exynos-audss: Add exynos5410 compatible
> clk: samsung: clk-exynos-audss: Whitespace and debug trace cleanup
> clk: samsung: Add support for EPLL on exynos5410
>
> .../devicetree/bindings/clock/clk-exynos-audss.txt | 4 +-
> .../devicetree/bindings/clock/exynos5410-clock.txt | 21 +-
> MAINTAINERS | 3 +
> drivers/clk/samsung/clk-exynos-audss.c | 84 +++--
> drivers/clk/samsung/clk-exynos5260.c | 350 ++++++++++-----------
> drivers/clk/samsung/clk-exynos5410.c | 61 ++--
> drivers/clk/samsung/clk-exynos5420.c | 37 +++
> drivers/clk/samsung/clk-exynos5440.c | 9 +-
> drivers/clk/samsung/clk-pll.c | 154 ++++++---
> drivers/clk/samsung/clk-pll.h | 2 +
> include/dt-bindings/clock/exynos5410.h | 3 +
> include/dt-bindings/clock/exynos5420.h | 11 +-
> include/dt-bindings/clock/exynos5440.h | 2 +
> 13 files changed, 453 insertions(+), 288 deletions(-)
>
> --
> Thanks,
> Sylwester
^ permalink raw reply
* [RFC 1/4] arm64: dts: msm8992 SoC and LG Bullhead (Nexus 5X) support
From: Stephen Boyd @ 2016-09-22 18:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <6cf4c215-e8a3-a9db-fcf1-8b56b5c1fab9@redhat.com>
Quoting Jeremy McNicoll (2016-09-20 17:42:02)
> On 2016-07-08 10:41 AM, Andy Gross wrote:
> > On Thu, Jul 07, 2016 at 05:41:04PM -0700, Jeremy McNicoll wrote:
> >> +
> >> +#include "../qcom/msm8992.dtsi"
> >> +
> >> +/ {
> >> + model = "LGE MSM8992 BULLHEAD rev-1.01";
> >> + compatible = "qcom,msm8992";
> >> + qcom,board-id = <0xb64 0>;
> >
> > Please work with sboyd to add the board-id to the dtbTool. We don't put
> > board-ids in the dts file. We post-process the dtb file and add them then.
> >
>
> sboyd has all the info he needs for this, I believe its just with legal
> now. Will remove for V2.
I've pushed out an update for dtbtool to have these msm ids.
>
> >> +
> >> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> >> +#include <dt-bindings/clock/qcom,gcc-msm8994.h>
> >> +
> >> +/ {
> >> + model = "Qualcomm Technologies, Inc. MSM 8992";
> >> + compatible = "qcom,msm8992";
> >> + qcom,msm-id = <251 0>, <252 0>;
>
> This is needed or else the LK provides the following error
>
> [5380] qcom,msm-id entry not found
>
> and refuses to boot.
>
>
> >> + qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>;
> >
> > See above comment on ids.
>
> removal of this (pmic-id) seems to be ok.
>
Having the msm ids (and the pmic ids) in dtbtool isn't going to help
here though. I believe the bootloader on these devices uses a design of
appended dtbs where each dtb has the qcom,{msm-id,board-id,pmic-id}
properties in them. The QCDT "header" that dtbtool generates is not
used.
To fix that problem we'll need to update dtbtool to inject these
properties into the dtbs based on the compatible strings. Or get
maintainers to accept that these ids are now necessary for proper
functionality.
Furthermore, the value of board-id (0xb64) is concerning. qcom only
supports a certain set of values there for their boards, but vendors are
free to do whatever they want with that value. This means they can reuse
existing values that would map to qcom's concept of the "mtp" or "cdp"
boards, or they can numbers that would alias with other vendors.
Thankfully, msm-id and pmic-id are values that are under qcom's control,
so those are always going to be unique and sane. Really all that could
alias is board-id.
What does this all mean? We can't support non-qcom boards in the same
boot.img because of the possibility for the board-id property to alias
between different dtbs. Or at least dtbtool will have to do some alias
analysis and eject one aliasing dtbs from the blob. It also means that
we have a lot of work to do in dtbtool to inject these properties based
on strings, and to have custom parsers for different vendor prefixes so
that we know what values to inject (the nightmare is growing).
I've asked the bootloader folks to fix this in future platforms so that
we match based on the compatible string, instead of having to do any
post processing. Basically, put dtbtool logic into the bootloader. The
discussion is still on-going, but I'm hopeful that we don't need to keep
doing things here with post-processing and the headache will be reduced.
That could totally backfire though if vendors decide to leave the
bootloader unchanged and boot the "qcom,msm8992-mtp" dtb that's been
slightly tweaked for their design. Let's hope that doesn't happen.
^ permalink raw reply
* [PATCH V6 3/5] PCI: thunder-pem: Allow to probe PEM-specific register range for ACPI case
From: Bjorn Helgaas @ 2016-09-22 18:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160922124446.GA21681@red-moon>
On Thu, Sep 22, 2016 at 01:44:46PM +0100, Lorenzo Pieralisi wrote:
> On Thu, Sep 22, 2016 at 11:10:13AM +0000, Gabriele Paoloni wrote:
> > Hi Lorenzo, Bjorn
> >
> > > -----Original Message-----
> > > From: Lorenzo Pieralisi [mailto:lorenzo.pieralisi at arm.com]
> > > Sent: 22 September 2016 10:50
> > > To: Bjorn Helgaas
> > > Cc: Ard Biesheuvel; Tomasz Nowicki; David Daney; Will Deacon; Catalin
> > > Marinas; Rafael Wysocki; Arnd Bergmann; Hanjun Guo; Sinan Kaya;
> > > Jayachandran C; Christopher Covington; Duc Dang; Robert Richter; Marcin
> > > Wojtas; Liviu Dudau; Wangyijing; Mark Salter; linux-
> > > pci at vger.kernel.org; linux-arm-kernel at lists.infradead.org; Linaro ACPI
> > > Mailman List; Jon Masters; Andrea Gallo; Jeremy Linton; liudongdong
> > > (C); Gabriele Paoloni; Jeff Hugo; linux-acpi at vger.kernel.org; linux-
> > > kernel at vger.kernel.org; Rafael J. Wysocki
> > > Subject: Re: [PATCH V6 3/5] PCI: thunder-pem: Allow to probe PEM-
> > > specific register range for ACPI case
> > >
> > > On Wed, Sep 21, 2016 at 01:04:57PM -0500, Bjorn Helgaas wrote:
> > > > On Wed, Sep 21, 2016 at 03:05:49PM +0100, Lorenzo Pieralisi wrote:
> > > > > On Tue, Sep 20, 2016 at 02:17:44PM -0500, Bjorn Helgaas wrote:
> > > > > > On Tue, Sep 20, 2016 at 04:09:25PM +0100, Ard Biesheuvel wrote:
> > > > >
> > > > > [...]
> > > > >
> > > > > > > None of these platforms can be fixed entirely in software, and
> > > given
> > > > > > > that we will not be adding quirks for new broken hardware, we
> > > should
> > > > > > > ask ourselves whether having two versions of a quirk, i.e., one
> > > for
> > > > > > > broken hardware + currently shipping firmware, and one for the
> > > same
> > > > > > > broken hardware with fixed firmware is really an improvement
> > > over what
> > > > > > > has been proposed here.
> > > > > >
> > > > > > We're talking about two completely different types of quirks:
> > > > > >
> > > > > > 1) MCFG quirks to use memory-mapped config space that doesn't
> > > quite
> > > > > > conform to the ECAM model in the PCIe spec, and
> > > > > >
> > > > > > 2) Some yet-to-be-determined method to describe address space
> > > > > > consumed by a bridge.
> > > > > >
> > > > > > The first two patches of this series are a nice implementation
> > > for 1).
> > > > > > The third patch (ThunderX-specific) is one possibility for 2),
> > > but I
> > > > > > don't like it because there's no way for generic software like
> > > the
> > > > > > ACPI core to discover these resources.
> > > > >
> > > > > Ok, so basically this means that to implement (2) we need to assign
> > > > > some sort of _HID to these quirky PCI bridges (so that we know what
> > > > > device they represent and we can retrieve their _CRS). I take from
> > > > > this discussion that the goal is to make sure that all non-config
> > > > > resources have to be declared through _CRS device objects, which is
> > > > > fine but that requires a FW update (unless we can fabricate ACPI
> > > > > devices and corresponding _CRS in the kernel whenever we match a
> > > > > given MCFG table signature).
> > > >
> > > > All resources consumed by ACPI devices should be declared through
> > > > _CRS. If you want to fabricate ACPI devices or _CRS via kernel
> > > > quirks, that's fine with me. This could be triggered via MCFG
> > > > signature, DMI info, host bridge _HID, etc.
> > >
> > > I think the PNP quirk approach + PNP0c02 resource put forward by Gab
> > > is enough.
> >
> > Great thanks as we take a final decision I will ask Dogndgong to submit
> > another RFC based on this approach
> >
> > >
> > > > > We discussed this already and I think we should make a decision:
> > > > >
> > > > > http://lists.infradead.org/pipermail/linux-arm-kernel/2016-
> > > March/414722.html
> > > > >
> > > > > > > > I'd like to step back and come up with some understanding of
> > > how
> > > > > > > > non-broken firmware *should* deal with this issue. Then, if
> > > we *do*
> > > > > > > > work around this particular broken firmware in the kernel, it
> > > would be
> > > > > > > > nice to do it in a way that fits in with that understanding.
> > > > > > > >
> > > > > > > > For example, if a companion ACPI device is the preferred
> > > solution, an
> > > > > > > > ACPI quirk could fabricate a device with the required
> > > resources. That
> > > > > > > > would address the problem closer to the source and make it
> > > more likely
> > > > > > > > that the rest of the system will work correctly: /proc/iomem
> > > could
> > > > > > > > make sense, things that look at _CRS generically would work
> > > (e.g,
> > > > > > > > /sys/, an admittedly hypothetical "lsacpi", etc.)
> > > > > > > >
> > > > > > > > Hard-coding stuff in drivers is a point solution that doesn't
> > > provide
> > > > > > > > any guidance for future platforms and makes it likely that
> > > the hack
> > > > > > > > will get copied into even more drivers.
> > > > > > > >
> > > > > > >
> > > > > > > OK, I see. But the guidance for future platforms should be 'do
> > > not
> > > > > > > rely on quirks', and what I am arguing here is that the more we
> > > polish
> > > > > > > up this code and make it clean and reusable, the more likely it
> > > is
> > > > > > > that will end up getting abused by new broken hardware that we
> > > set out
> > > > > > > to reject entirely in the first place.
> > > > > > >
> > > > > > > So of course, if the quirk involves claiming resources, let's
> > > make
> > > > > > > sure that this occurs in the cleanest and most compliant way
> > > possible.
> > > > > > > But any factoring/reuse concerns other than for the current
> > > crop of
> > > > > > > broken hardware should be avoided imo.
> > > > > >
> > > > > > If future hardware is completely ECAM-compliant and we don't need
> > > any
> > > > > > more MCFG quirks, that would be great.
> > > > >
> > > > > Yes.
> > > > >
> > > > > > But we'll still need to describe that memory-mapped config space
> > > > > > somewhere. If that's done with PNP0C02 or similar devices (as is
> > > done
> > > > > > on my x86 laptop), we'd be all set.
> > > > >
> > > > > I am not sure I understand what you mean here. Are you referring
> > > > > to MCFG regions reported as PNP0c02 resources through its _CRS ?
> > > >
> > > > Yes. PCI Firmware Spec r3.0, Table 4-2, note 2 says address ranges
> > > > reported via MCFG or _CBA should be reserved by _CRS of a PNP0C02
> > > > device.
> > >
> > > Ok, that's agreed. It goes without saying that since you are quoting
> > > the PCI spec, if FW fails to report MCFG regions in a PNP0c02 device
> > > _CRS I will consider that a FW bug.
> > >
> > > > > IIUC PNP0C02 is a reservation mechanism, but it does not help us
> > > > > associate its _CRS to a specific PCI host bridge instance, right ?
> > > >
> > > > Gab proposed a hierarchy that *would* associate a PNP0C02 device with
> > > > a PCI bridge:
> > > >
> > > > Device (PCI1) {
> > > > Name (_HID, "HISI0080") // PCI Express Root Bridge
> > > > Name (_CID, "PNP0A03") // Compatible PCI Root Bridge
> > > > Method (_CRS, 0, Serialized) { // Root complex resources
> > > (windows) }
> > > > Device (RES0) {
> > > > Name (_HID, "HISI0081") // HiSi PCIe RC config base address
> > > > Name (_CID, "PNP0C02") // Motherboard reserved resource
> > > > Name (_CRS, ResourceTemplate () { ... }
> > > > }
> > > > }
> > > >
> > > > That's a possibility. The PCI Firmware Spec suggests putting RES0 at
> > > > the root (under \_SB), but I don't know why.
> > > >
> > > > Putting it at the root means we couldn't generically associate it
> > > with
> > > > a bridge, although I could imagine something like this:
> > > >
> > > > Device (RES1) {
> > > > Name (_HID, "HISI0081") // HiSi PCIe RC config base address
> > > > Name (_CID, "PNP0C02") // Motherboard reserved resource
> > > > Name (_CRS, ResourceTemplate () { ... }
> > > > Method (BRDG) { "PCI1" } // hand-wavy ASL
> > > > }
> > > > Device (PCI1) {
> > > > Name (_HID, "HISI0080") // PCI Express Root Bridge
> > > > Name (_CID, "PNP0A03") // Compatible PCI Root Bridge
> > > > Method (_CRS, 0, Serialized) { // Root complex resources
> > > (windows) }
> > > > }
> > > >
> > > > Where you could search PNP0C02 devices for a cookie that matched the
> > > > host bridge.o
> > >
> > > Ok, I am fine with both and I think we are converging, but the way
> > > to solve this problem has to be uniform for all ARM partners (and
> > > not only ARM). Two points here:
> > >
> > > 1) Adding a device/subdevice allows people to add a _CRS reporting the
> > > non-window bridge resources. Fine. It also allows people to chuck in
> > > there all sorts of _DSD properties to describe their PCI host bridge
> > > as it is done with DT properties (those _DSD can contain eg clocks
> > > etc.), this may be tempting (so that they can reuse the same DT
> > > driver and do not have to update their firmware) but I want to be
> > > clear here: that must not happen. So, a subdevice with a _CRS to
> > > report resources, yes, but it will stop there.
> > > 2) It is unclear to me how to formalize the above. People should not
> > > write FW by reading the PCI mailing list, so these guidelines have
> > > to
> > > be written, somehow. I do not want to standardize quirks, I want
> > > to prevent random ACPI table content, which is different.
> > > Should I report this to the ACPI spec working group ? If we do
> > > not do that everyone will go solve this problem as they deem fit.
> > >
> >
> > Do we really need to formalize this?
> >
> > As we discussed in the Linaro call at the moment we have few vendors
> > that need quirks and we want to avoid promoting/accepting quirks for
> > the future.
> >
> > At the time of the call I think we decided to informally accept a set
> > of quirks for the current platforms and reject any other quirk coming
> > after a certain date/kernel version (this to be decided).
> >
> > I am not sure if there is a way to document/formalize a temporary
> > exception from the rule...
>
> - (1) will be enforced.
I'm not sure it's necessary or possible to enforce a "no future
quirks" rule. For one thing, there's already a pretty strong
incentive to avoid quirks: if your hardware doesn't require quirks,
it works with OSes already in the field.
MCFG quirks allow us to use the generic ACPI pci_root.c driver even if
the hardware doesn't support ECAM quite according to the spec.
PNP0C02 usage is a workaround for the failure of the Consumer/Producer
bit. PNP0C02 quirks compensate for firmware that doesn't describe
resource usage accurately. It's possible the ACPI spec folks could
come up with a better Consumer/Producer workaround, if that's needed.
Apparently x86 hasn't needed it yet.
If people add _DSD methods for clocks or whatnot, the hardware won't
work with the generic pci_root.c driver, so there's already an
incentive for avoiding them. x86 has managed without such methods;
arm64 should be able to do the same.
> - We do not know whether PNP0c02 can be used in non-root devices _CRS
> - Are we sure (given that we are implementing this to make sure we are
> able to validate resources) that it is valid to have a subdevice with
> a _CRS whose resources are not contained in its parent _CRS address
> space (because that's exactly the case for these quirks) ?
>
> That's what I mean by formalizing, I want to know how PNP0c02 should
> be used. We all want platforms with quirks to be enabled asap but only
> if we stick to the ACPI specifications. On top of that, with the
> bindings above, the kernel would end up creating a platform device for
> the "fake" device with a _CRS approach, which is questionable.
> > > [...]
> > >
> > > > > For FW that is immutable I really do not see what we can do apart
> > > > > from hardcoding the non-config resources (consumed by a bridge),
> > > > > somehow.
> > > >
> > > > Right. Well, I assume you mean we should hard-code "non-window
> > > > resources consumed directly by a bridge". If firmware in the field
> > > is
> > > > broken, we should work around it, and that may mean hard-coding some
> > > > resources.
> > > >
> > > > My point is that the hard-coding should not be buried in a driver
> > > > where it's invisible to the rest of the kernel. If we hard-code it
> > > in
> > > > a quirk that adds _CRS entries, then the kernel will work just like
> > > it
> > > > would if the firmware had been correct in the first place. The
> > > > resource will appear in /sys/devices/pnp*/*/resources and
> > > /proc/iomem,
> > > > and if we ever used _SRS to assign or move ACPI devices, we would
> > > know
> > > > to avoid the bridge resource.
> > >
> > > We are in complete agreement here.
> > >
> > > Thanks,
> > > Lorenzo
> >
^ permalink raw reply
* [PATCH] arm: dts: fix rk3066a based boards vdd_log voltage initialization
From: Boris Brezillon @ 2016-09-22 18:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160922164752.GP7994@sirena.org.uk>
On Thu, 22 Sep 2016 17:47:52 +0100
Mark Brown <broonie@kernel.org> wrote:
> On Thu, Sep 22, 2016 at 05:12:17PM +0200, Boris Brezillon wrote:
> > +Mark
>
> > I realize Mark has been out of the discussion, and what started as a DT
> > problem actually turned into a PWM regulator discussion.
> > Maybe we should start a new thread.
>
> Probably, you're lucky I even looked at this - the number of irrelevant
> patches I get CCed on is such that I'll often delete things that look
> irrelevant unread. I'm unsure what the relevance is, it looks like it's
> mainly a discussion about pinctrl?
Not exactly, even if this involves pin muxing.
>
> > As I said, the problem you're describing (pins muxed to the PWM device
> > when it should actually stay in gpio+input mode) is not new, and the old
> > pwm-regulator and pwm-rockchip implementation (before my atomic PWM
> > changes) were behaving the same way.
>
> Why would this make any kind of sense?
>
> > What is new though, is the pwm_regulator_init_state() function [1], and
> > it seems it's now preventing the probe of a pwm-regulator device if the
> > initial PWM state is not described in the voltage-table.
>
> > The question is, what should we do?
>
> > 1/ Force users to put an entry matching this state (which means
> > breaking DT compat)
> > 2/ Put a valid value in drvdata->state even if it's not reflecting the
> > real state
> > 3/ Patch regulator core to support an "unknown-selector" return code.
>
> Could someone say what the actual problem was please?
Well, to sum-up, the discussion started because Andy notice that some
boards were no longer booting, and found out that commit 87248991a1de
("regulator: pwm: Properly initialize the ->state field") was causing
the regression, because ->get_voltage_sel() was returning -EINVAL,
which in turn was caused by a missing entry in the voltage table.
Doug also noted that Andy was expecting the pin connected to the PWM
regulator to stay in a GPIO+input state until the PWM is really
enabled, in order to avoid glitches. But this not the case currently,
since the PWM chip claims all the pins at probe time.
So, there are 2 different problems here:
1/ the board no longer boots because of commit 87248991a1de and a
missing entry in the voltage table
2/ claiming the PWM pins at probe time can cause glitches
I'm currently trying to solve #1, but most of the discussion in this
thread was about addressing #2.
> That was a very
> long e-mail so I might be missing something but the obvious thing seems
> to be to force a state since we'll be doing that when we enable anyway.
Hm, okay, but which state should we choose? The first entry in the
voltage-table?
> Or just not have the voltage table and use it as a continuous regulator.
Yes, but that means patching the DT, which means breaking the DT compat.
^ permalink raw reply
* Regression in next with "mfd: twl6040: The chip does not support bulk access"
From: Tony Lindgren @ 2016-09-22 18:07 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
Looks like commit 7a17e47f6403 ("mfd: twl6040: The chip does not
support bulk access") breaks at least omap4-duovero. I now get
tons of errors:
Skipping twl internal clock init and using bootloader value (unknown osc rate)
twl 0-0048: PIH (irq 332) nested IRQs
of_get_named_gpiod_flags: parsed 'ti,audpwron-gpio' property of node '/ocp/i2c at 48070000/t
wl at 4b[0]' - status (0)
omap_i2c 48070000.i2c: bus 0 rev0.10 at 400 kHz
twl6040 0-004b: Failed to read IRQ status: -16
twl6040 0-004b: Failed to read IRQ status: -16
twl6040 0-004b: Failed to read IRQ status: -16
twl6040 0-004b: Failed to read IRQ status: -16
twl6040 0-004b: Failed to read IRQ status: -16
twl6040 0-004b: Failed to read IRQ status: -16
twl6040 0-004b: Failed to read IRQ status: -16
twl6040 0-004b: Failed to read IRQ status: -16
twl6040 0-004b: Failed to read IRQ status: -16
It seems the regmap irqs don't work with use_single_rw?
Also seems that twl6040 does support bulk access as things have been
working earlier?
Anyways, can you please revert?
Regards,
Tony
^ permalink raw reply
* [PATCH 0/2] Fix warnings for i2c-rk3x.c
From: Wolfram Sang @ 2016-09-22 17:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474543764-51135-1-git-send-email-david.wu@rock-chips.com>
On Thu, Sep 22, 2016 at 07:29:22PM +0800, David Wu wrote:
> David Wu (2):
> i2c: rk3x: Fix sparse warning
> i2c: rk3x: fix variable 'min_total_ns' unused warning
>
Applied to for-next, thanks!
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^ permalink raw reply
* [PATCH] ARM: dts: exynos: Add reboot reason support for Trats2
From: Krzysztof Kozlowski @ 2016-09-22 17:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474562915-4319-1-git-send-email-wolfgit@wiedmeyer.de>
Hi,
Thanks for the patch, it is nice that someone did this! When I saw the
syscon reboot mode driver, I though about such feature but never had
time or will to implement it. Great job!
Few comments below.
On Thu, Sep 22, 2016 at 06:48:35PM +0200, Wolfgang Wiedmeyer wrote:
> This allows to reboot the device into recovery mode and into the download
> mode of the bootloader.
Which bootloader? Probably UBoot... or Samsung stock one? Could you put
that information here?
>
> Signed-off-by: Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de>
> ---
> arch/arm/boot/dts/exynos4412-trats2.dts | 14 ++++++++++++++
> arch/arm/boot/dts/exynos4x12.dtsi | 2 +-
> 2 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
> index 129e973..a38d1e3 100644
> --- a/arch/arm/boot/dts/exynos4412-trats2.dts
> +++ b/arch/arm/boot/dts/exynos4412-trats2.dts
> @@ -1294,3 +1294,17 @@
> vtmu-supply = <&ldo10_reg>;
> status = "okay";
> };
> +
> +&pmu {
> + compatible = "syscon", "simple-mfd";
> +
> + reboot-mode {
> + compatible = "syscon-reboot-mode";
> + offset = <0x80c>;
> +
> + mode-normal = <0x12345670>;
> + mode-bootloader = <0x12345671>;
> + mode-download = <0x12345671>;
> + mode-recovery = <0x12345674>;
Hmmm, how did you get these values? Are they already supported?
It would be nice to document them:
1. In Documentation/arm/Samsung/Bootloader-interface.txt
2. In header. I hate such magic numbers... you could add new header next
to existing rockchip one:
include/dt-bindings/soc/samsung,boot-mode.h
(and update maintainers entry :) )
Best regards,
Krzysztof
> + };
> +};
> diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
> index c452499..b58c14e 100644
> --- a/arch/arm/boot/dts/exynos4x12.dtsi
> +++ b/arch/arm/boot/dts/exynos4x12.dtsi
> @@ -179,7 +179,7 @@
> ranges;
> status = "disabled";
>
> - pmu at 10020000 {
> + pmu: pmu at 10020000 {
> reg = <0x10020000 0x3000>;
> };
>
> --
> Website: https://fossencdi.org
> OpenPGP: 0F30 D1A0 2F73 F70A 6FEE 048E 5816 A24C 1075 7FC4
> Key download: https://wiedmeyer.de/keys/ww.asc
>
^ permalink raw reply
* [PATCH 2/2] net: thunderx: Support for byte queue limits
From: Florian Fainelli @ 2016-09-22 17:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474535121-13958-3-git-send-email-sunil.kovvuri@gmail.com>
On 09/22/2016 02:05 AM, sunil.kovvuri at gmail.com wrote:
> From: Sunil Goutham <sgoutham@cavium.com>
>
> This patch adds support for byte queue limits
>
> Signed-off-by: Sunil Goutham <sgoutham@cavium.com>
Where is the code that calls netdev_tx_reset_queue()? This is needed in
the function that brings down the interface, did your test survive a
up/down/up sequence?
> ---
> drivers/net/ethernet/cavium/thunder/nicvf_main.c | 11 ++++++--
> drivers/net/ethernet/cavium/thunder/nicvf_queues.c | 30 ++++++++++++++--------
> 2 files changed, 29 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_main.c b/drivers/net/ethernet/cavium/thunder/nicvf_main.c
> index 7d00162..453e3a0 100644
> --- a/drivers/net/ethernet/cavium/thunder/nicvf_main.c
> +++ b/drivers/net/ethernet/cavium/thunder/nicvf_main.c
> @@ -516,7 +516,8 @@ static int nicvf_init_resources(struct nicvf *nic)
> static void nicvf_snd_pkt_handler(struct net_device *netdev,
> struct cmp_queue *cq,
> struct cqe_send_t *cqe_tx,
> - int cqe_type, int budget)
> + int cqe_type, int budget,
> + unsigned int *tx_pkts, unsigned int *tx_bytes)
> {
> struct sk_buff *skb = NULL;
> struct nicvf *nic = netdev_priv(netdev);
> @@ -547,6 +548,8 @@ static void nicvf_snd_pkt_handler(struct net_device *netdev,
> }
> nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1);
> prefetch(skb);
> + (*tx_pkts)++;
> + *tx_bytes += skb->len;
> napi_consume_skb(skb, budget);
> sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL;
> } else {
> @@ -662,6 +665,7 @@ static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx,
> struct cmp_queue *cq = &qs->cq[cq_idx];
> struct cqe_rx_t *cq_desc;
> struct netdev_queue *txq;
> + unsigned int tx_pkts = 0, tx_bytes = 0;
>
> spin_lock_bh(&cq->lock);
> loop:
> @@ -701,7 +705,7 @@ loop:
> case CQE_TYPE_SEND:
> nicvf_snd_pkt_handler(netdev, cq,
> (void *)cq_desc, CQE_TYPE_SEND,
> - budget);
> + budget, &tx_pkts, &tx_bytes);
> tx_done++;
> break;
> case CQE_TYPE_INVALID:
> @@ -730,6 +734,9 @@ done:
> netdev = nic->pnicvf->netdev;
> txq = netdev_get_tx_queue(netdev,
> nicvf_netdev_qidx(nic, cq_idx));
> + if (tx_pkts)
> + netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
> +
> nic = nic->pnicvf;
> if (netif_tx_queue_stopped(txq) && netif_carrier_ok(netdev)) {
> netif_tx_start_queue(txq);
> diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_queues.c b/drivers/net/ethernet/cavium/thunder/nicvf_queues.c
> index 178c5c7..a4fc501 100644
> --- a/drivers/net/ethernet/cavium/thunder/nicvf_queues.c
> +++ b/drivers/net/ethernet/cavium/thunder/nicvf_queues.c
> @@ -1082,6 +1082,24 @@ static inline void nicvf_sq_add_cqe_subdesc(struct snd_queue *sq, int qentry,
> imm->len = 1;
> }
>
> +static inline void nicvf_sq_doorbell(struct nicvf *nic, struct sk_buff *skb,
> + int sq_num, int desc_cnt)
> +{
> + struct netdev_queue *txq;
> +
> + txq = netdev_get_tx_queue(nic->pnicvf->netdev,
> + skb_get_queue_mapping(skb));
> +
> + netdev_tx_sent_queue(txq, skb->len);
> +
> + /* make sure all memory stores are done before ringing doorbell */
> + smp_wmb();
> +
> + /* Inform HW to xmit all TSO segments */
> + nicvf_queue_reg_write(nic, NIC_QSET_SQ_0_7_DOOR,
> + sq_num, desc_cnt);
> +}
> +
> /* Segment a TSO packet into 'gso_size' segments and append
> * them to SQ for transfer
> */
> @@ -1141,12 +1159,8 @@ static int nicvf_sq_append_tso(struct nicvf *nic, struct snd_queue *sq,
> /* Save SKB in the last segment for freeing */
> sq->skbuff[hdr_qentry] = (u64)skb;
>
> - /* make sure all memory stores are done before ringing doorbell */
> - smp_wmb();
> + nicvf_sq_doorbell(nic, skb, sq_num, desc_cnt);
>
> - /* Inform HW to xmit all TSO segments */
> - nicvf_queue_reg_write(nic, NIC_QSET_SQ_0_7_DOOR,
> - sq_num, desc_cnt);
> nic->drv_stats.tx_tso++;
> return 1;
> }
> @@ -1219,12 +1233,8 @@ doorbell:
> nicvf_sq_add_cqe_subdesc(sq, qentry, tso_sqe, skb);
> }
>
> - /* make sure all memory stores are done before ringing doorbell */
> - smp_wmb();
> + nicvf_sq_doorbell(nic, skb, sq_num, subdesc_cnt);
>
> - /* Inform HW to xmit new packet */
> - nicvf_queue_reg_write(nic, NIC_QSET_SQ_0_7_DOOR,
> - sq_num, subdesc_cnt);
> return 1;
>
> append_fail:
>
--
Florian
^ permalink raw reply
* [PATCH v2] musb: Export musb_root_disconnect for use in modules
From: Mark Brown @ 2016-09-22 17:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160922172842.GA23726@kroah.com>
On Thu, Sep 22, 2016 at 07:28:42PM +0200, Greg Kroah-Hartman wrote:
> On Thu, Sep 22, 2016 at 06:15:26PM +0100, Mark Brown wrote:
> > On Thu, Sep 22, 2016 at 08:30:16AM -0500, Bin Liu wrote:
> > > Removed it from my tree, since Greg already picked it.
> > It's not showing in today's -next...
> It probably missed the cut-off, should be there tomorrow.
Ah, excellent thanks! Down to only one build break in all*config in -next :/
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* [PATCH v2] musb: Export musb_root_disconnect for use in modules
From: Greg Kroah-Hartman @ 2016-09-22 17:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160922171526.GR7994@sirena.org.uk>
On Thu, Sep 22, 2016 at 06:15:26PM +0100, Mark Brown wrote:
> On Thu, Sep 22, 2016 at 08:30:16AM -0500, Bin Liu wrote:
> > On Wed, Sep 21, 2016 at 03:51:33PM -0500, Bin Liu wrote:
>
> > > Applied. Thanks.
>
> > Removed it from my tree, since Greg already picked it.
>
> It's not showing in today's -next...
It probably missed the cut-off, should be there tomorrow.
^ permalink raw reply
* [PATCH v3 2/4] regulator: axp20x: duplicate the MFD axp20x-rsb code
From: Jean-Francois Moine @ 2016-09-22 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1474621107.git.moinejf@free.fr>
The axp20x rsb driver handles many different devices.
Duplicating its code in a generic regulator driver permits
to probe/remove individual devices.
Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
---
drivers/regulator/axp-regulator.c | 39 +++++++++++++++++++++++++++++++++++++++
drivers/regulator/axp-regulator.h | 6 ++++++
2 files changed, 45 insertions(+)
diff --git a/drivers/regulator/axp-regulator.c b/drivers/regulator/axp-regulator.c
index 0d7adb6..17943fb 100644
--- a/drivers/regulator/axp-regulator.c
+++ b/drivers/regulator/axp-regulator.c
@@ -303,6 +303,45 @@ int axp_regulator_create(struct device *dev,
}
EXPORT_SYMBOL_GPL(axp_regulator_create);
+/* probe/remove RSB devices */
+int axp_rsb_probe(struct sunxi_rsb_device *rdev,
+ struct axp20x_dev *axp20x,
+ const struct axp_cfg *axp_cfg)
+{
+ int ret;
+
+ axp20x->dev = &rdev->dev;
+ axp20x->irq = rdev->irq;
+ dev_set_drvdata(&rdev->dev, axp20x);
+
+ ret = axp20x_match_device(axp20x);
+ if (ret)
+ return ret;
+
+ axp20x->regmap = devm_regmap_init_sunxi_rsb(rdev,
+ axp20x->regmap_cfg);
+ if (IS_ERR(axp20x->regmap)) {
+ ret = PTR_ERR(axp20x->regmap);
+ dev_err(&rdev->dev, "regmap init failed: %d\n", ret);
+ return ret;
+ }
+
+ ret = axp20x_device_probe(axp20x);
+ if (ret < 0)
+ return ret;
+
+ return axp_regulator_create(&rdev->dev, axp_cfg);
+}
+EXPORT_SYMBOL_GPL(axp_rsb_probe);
+
+int axp_rsb_remove(struct sunxi_rsb_device *rdev)
+{
+ struct axp20x_dev *axp20x = sunxi_rsb_device_get_drvdata(rdev);
+
+ return axp20x_device_remove(axp20x);
+}
+EXPORT_SYMBOL_GPL(axp_rsb_remove);
+
MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
MODULE_DESCRIPTION("Regulator Module for AXP PMIC");
MODULE_LICENSE("GPL v2");
diff --git a/drivers/regulator/axp-regulator.h b/drivers/regulator/axp-regulator.h
index 0adf1b0..085eaa0 100644
--- a/drivers/regulator/axp-regulator.h
+++ b/drivers/regulator/axp-regulator.h
@@ -124,4 +124,10 @@ struct axp_cfg {
int axp_regulator_create(struct device *dev,
const struct axp_cfg *axp_cfg);
+struct sunxi_rsb_device;
+int axp_rsb_probe(struct sunxi_rsb_device *rdev,
+ struct axp20x_dev *axp20x,
+ const struct axp_cfg *axp_cfg);
+int axp_rsb_remove(struct sunxi_rsb_device *rdev);
+
#endif /* __AXP_REGULATOR_H__ */
--
2.10.0
^ permalink raw reply related
* [PATCH v2] musb: Export musb_root_disconnect for use in modules
From: Mark Brown @ 2016-09-22 17:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160922133016.GE3970@uda0271908>
On Thu, Sep 22, 2016 at 08:30:16AM -0500, Bin Liu wrote:
> On Wed, Sep 21, 2016 at 03:51:33PM -0500, Bin Liu wrote:
> > Applied. Thanks.
> Removed it from my tree, since Greg already picked it.
It's not showing in today's -next...
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^ permalink raw reply
* [PATCH] PCI: rockchip: fix uninitialized variable use
From: Brian Norris @ 2016-09-22 17:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160922094018.2138640-1-arnd@arndb.de>
On Thu, Sep 22, 2016 at 11:39:59AM +0200, Arnd Bergmann wrote:
> The newly added pcie-rockchip driver fails to initialize the
> io_size variable if the DT doesn't provide ranges for the PCI
> I/O space, as found by building it with -Wmaybe-uninitialized:
>
> drivers/pci/host/pcie-rockchip.c: In function 'rockchip_pcie_probe':
> drivers/pci/host/pcie-rockchip.c:1007:6: warning: 'io_size' may be used uninitialized in this function [-Wmaybe-uninitialized]
>
> This adds an appropriate initialization immediately in front of
> the loop, so the io_size is zero as expected afterwards for that
> case.
>
> Fixes: abe17181b16f ("PCI: rockchip: Add Rockchip PCIe controller support")
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> drivers/pci/host/pcie-rockchip.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
> index c3593e633ccd..8bedc1e1ef80 100644
> --- a/drivers/pci/host/pcie-rockchip.c
> +++ b/drivers/pci/host/pcie-rockchip.c
> @@ -1078,6 +1078,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
> goto err_vpcie;
>
> /* Get the I/O and memory ranges from DT */
> + io_size = 0;
> resource_list_for_each_entry(win, &res) {
> switch (resource_type(win->res)) {
> case IORESOURCE_IO:
I feel like we've fixed this one before, but then it's been refactored
many times along the way...
Reviewed-by: Brian Norris <briannorris@chromium.org>
^ permalink raw reply
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