* [PATCH] ARM: dts: rockchip: Reserve unusable memory region on rk3066
From: Heiko Stuebner @ 2016-10-03 10:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161003102054.GB7632@leverpostej>
Am Montag, 3. Oktober 2016, 11:20:54 CEST schrieb Mark Rutland:
> On Sat, Oct 01, 2016 at 09:18:15PM +0200, Heiko Stuebner wrote:
> > Am Samstag, 1. Oktober 2016, 19:17:11 CEST schrieb Mark Rutland:
> > > On Sat, Oct 01, 2016 at 04:09:39PM +0200,
> > > =?UTF-8?q?Pawe=C5=82=20Jarosz?=
> >
> > wrote:
> > > > For some reason accessing memory region above 0xfe000000 freezes
> > > > system on rk3066. There is similiar bug on later rockchip soc (rk3288)
> > > > solved same way.
>
> [...]
>
> > > > + reserved-memory {
> > > > + #address-cells = <1>;
> > > > + #size-cells = <1>;
> > > > + ranges;
> > > > + /*
> > > > + * The rk3066 cannot use the memory area above 0x9F000000
> > > > + * for some unknown reason.
> > > > + */
> > > > + unusable at 9F000000 {
> > > > + reg = <0x9F000000 0x1000000>;
> > > > + };
> > >
> > > I don't think this is a sane workaround, but it is at best difficult to
> > > tell, given there's no reason given for why this memory is unusable.
> > >
> > > For instance, if bus accesses to this address hang, then this patch only
> > > makes the hand less likely, since the kernel will still map the region
> > > (and
> > > therefore the CPU can perform speculative accesses).
> > >
> > > Are issues with this memory consistently seen in practice?
> > >
> > > Can you enable CONFIG_MEMTEST and pass 'memtest' to the kernel, to
> > > determine if the memory is returning erroneous values?
> >
> > just for the sake of completeness, on the rk3288 the issue was the dma not
> > being able to access the specific memory region (interestingly also the
> > last 16MB but of the 4GB area supported on the rk3288). So memory itself
> > was ok, just dma access to it failed.
>
> How odd.
>
> > We didn't find any other sane solution to limit the dma access in a
> > general way at the time, so opted for just blocking the memory region (as
> > it was similarly only
>
> I was under the impression that dma-ranges could describe this kind of
> DMA addressing limitation. Was there some problem with that? Perhaps the
> driver is not acquiring/configuring its mask correctly?
I remember looking at (and trying) different options back then.
dma-mask wanted power-of-2 values (so it's either 4GB or 2GB (or lower)),
zone-dma was a 32bit (and non-dt) thing and dma-ranges seem to simply also
calculate a dma-mask from the value, so you're down to 2GB again.
So just blocking of those 16MB at the end for 4GB devices somehow sounded
nicer than limiting dma access to only half the memory.
I may be overlooking something but that was what I came up with last year.
Heiko
^ permalink raw reply
* [PATCH v2 2/2] drm: zte: add initial vou drm driver
From: Emil Velikov @ 2016-10-03 10:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161001002228.GA2989@x250>
On 1 October 2016 at 01:22, Shawn Guo <shawnguo@kernel.org> wrote:
> Hi Emil,
>
> On Fri, Sep 30, 2016 at 01:34:14PM +0100, Emil Velikov wrote:
>> Hi Shawn,
>>
>> A couple of fly-by suggestions, which I hope you'll find useful :-)
>
> Thanks for the suggestions.
>
>> On 24 September 2016 at 15:26, Shawn Guo <shawn.guo@linaro.org> wrote:
>>
>> > +
>> > + val = ((vm.hsync_len - 1) << SYNC_WIDE_SHIFT) & SYNC_WIDE_MASK;
>> To save some writing/minimise the chances to typos getting, in you can
>> have single/collection to static inline functions similar to msm [1].
>> On a similar note inline wrappers zte_read/write/mask (around
>> writel/readl) will provide quite useful for debugging/tracing :-)
>>
>> [1] drivers/gpu/drm/msm/adreno/a4xx.xml.h
>
> I would not add a header file with hundreds or thousands of defines
> while only tens of them are actually used. For debugging, I prefer
> to print particular registers than every single read/write, which
> might not be easy to check what I want to check.
>
I've never implied adding hundreds/etc defines, but a few
macros/inlines which get you from
val = ((vm.hsync_len - 1) << SYNC_WIDE_SHIFT) & SYNC_WIDE_MASK;
....
val = readl(vou->vouctl + VOU_CLK_EN);
val |= inf->clocks_en_bits;
writel(val, vou->vouctl + VOU_CLK_EN);
to
val = SYNC_WIDE(vm.hsync_len - 1);
...
zte_vouctl_mask(vou, VOU_CLK_EN, mask, value); // or any permutation
of upper/lower case, argument order, use/discard the VOU_ register
prefix, etc.
The latter tends to be easier to read and less error prone. Either
way, it was just a suggestion.
>> > +static int zx_gl_get_fmt(uint32_t format)
>> > +{
>> > + switch (format) {
>> > + case DRM_FORMAT_ARGB8888:
>> > + case DRM_FORMAT_XRGB8888:
>> > + return GL_FMT_ARGB8888;
>> > + case DRM_FORMAT_RGB888:
>> > + return GL_FMT_RGB888;
>> > + case DRM_FORMAT_RGB565:
>> > + return GL_FMT_RGB565;
>> > + case DRM_FORMAT_ARGB1555:
>> > + return GL_FMT_ARGB1555;
>> > + case DRM_FORMAT_ARGB4444:
>> > + return GL_FMT_ARGB4444;
>> > + default:
>> > + WARN_ONCE(1, "invalid pixel format %d\n", format);
>> > + return -EINVAL;
>> Afaics the only user of this is atomic_update() and that function
>> cannot fail. You might want to move this to the _check() function.
>> Same logic goes for the rest of the driver, in case I've missed any.
>
> The function does the conversion from DRM format values to the ones that
> hardware accepts. And I need to set up hardware register with the
> converted value.
>
> I suppose that the error case in 'default' should never be hit, since
> all valid format have been reported to DRM core by gl_formats? In that
> case, I can simply drop the WARN and return a sane default format
> instead?
>
I'd just do the error checking in check() function and keep the
mapping in update(). As devs add new formats to DRM core it's not
possible for them to test every driver so getting a failure early is
better (imho) than getting subtle visual and/or other issues. Either
way it's up-to you really.
Regards,
Emil
^ permalink raw reply
* [PATCH v3 9/9] arm64: dts: add Pine64 support
From: Andre Przywara @ 2016-10-03 10:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161003080913.24197-10-maxime.ripard@free-electrons.com>
Hi Maxime,
thanks for the respin!
On 03/10/16 09:09, Maxime Ripard wrote:
> From: Andre Przywara <andre.przywara@arm.com>
>
> The Pine64 is a cost-efficient development board based on the
> Allwinner A64 SoC.
> There are three models: the basic version with Fast Ethernet and
> 512 MB of DRAM (Pine64) and two Pine64+ versions, which both
> feature Gigabit Ethernet and additional connectors for touchscreens
> and a camera. Or as my son put it: "Those are smaller and these are
> missing." ;-)
> The two Pine64+ models just differ in the amount of DRAM
> (1GB vs. 2GB). Since U-Boot will figure out the right size for us and
> patches the DT accordingly we just need to provide one DT for the
> Pine64+.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> [Maxime: Removed the common DTSI and include directly the pine64 DTS]
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> arch/arm64/boot/dts/Makefile | 1 +
> arch/arm64/boot/dts/allwinner/Makefile | 5 ++
> .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 50 +++++++++++
> .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 74 +++++++++++++++++
> include/dt-bindings/reset/sun50i-a64-ccu.h | 97 +++++++++++-----------
Shouldn't the changes in this file be merged into patch 6/9?
...
> 5 files changed, 179 insertions(+), 48 deletions(-)
> create mode 100644 arch/arm64/boot/dts/allwinner/Makefile
> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
>
> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
> index 6e199c903676..ddcbf5a2c17e 100644
> --- a/arch/arm64/boot/dts/Makefile
> +++ b/arch/arm64/boot/dts/Makefile
> @@ -1,4 +1,5 @@
> dts-dirs += al
> +dts-dirs += allwinner
> dts-dirs += altera
> dts-dirs += amd
> dts-dirs += amlogic
> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
> new file mode 100644
> index 000000000000..1e29a5ae8282
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> @@ -0,0 +1,5 @@
> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
> +
> +always := $(dtb-y)
> +subdir-y := $(dts-dirs)
> +clean-files := *.dtb
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
> new file mode 100644
> index 000000000000..790d14daaa6a
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
> @@ -0,0 +1,50 @@
> +/*
> + * Copyright (c) 2016 ARM Ltd.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include "sun50i-a64-pine64.dts"
> +
> +/ {
> + model = "Pine64+";
> + compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
> +
> + /* TODO: Camera, Ethernet PHY, touchscreen, etc. */
> +};
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
> new file mode 100644
> index 000000000000..9f127b3d0e33
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
> @@ -0,0 +1,74 @@
> +/*
> + * Copyright (c) 2016 ARM Ltd.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "sun50i-a64.dtsi"
> +
> +/ {
> + model = "Pine64";
> + compatible = "pine64,pine64", "allwinner,sun50i-a64";
> +
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +};
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_pins_a>;
> + status = "okay";
> +};
> +
> +&i2c1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c1_pins>;
> + status = "okay";
> +};
> +
> +&i2c1_pins {
> + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
> +};
> diff --git a/include/dt-bindings/reset/sun50i-a64-ccu.h b/include/dt-bindings/reset/sun50i-a64-ccu.h
> index e61fac294d73..db60b29ddb11 100644
> --- a/include/dt-bindings/reset/sun50i-a64-ccu.h
> +++ b/include/dt-bindings/reset/sun50i-a64-ccu.h
> @@ -46,52 +46,53 @@
> #define RST_USB_PHY0 0
> #define RST_USB_PHY1 1
> #define RST_USB_HSIC 2
> -#define RST_MBUS 3
....
> +#define RST_DRAM 3
> +#define RST_MBUS 4
So I take it that this kind of changes will not happen anymore once the
DT has been merged?
And this numbering is arbitrary and not connected to some hardware
bits/register addresses at all?
And in case we find some missing bits later we will just queue them at
the end?
Cheers,
Andre.
^ permalink raw reply
* [PATCH 8/9] ARM: sunxi: Remove useless allwinner,pull property
From: Maxime Ripard @ 2016-10-03 10:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.26c6f76b361d146fb079d744251f020ef6d2db7d.1475489558.git-series.maxime.ripard@free-electrons.com>
The allwinner,pull property set to NO_PULL was really considered our
default (and wasn't even changing the default value in the code).
Remove these properties to make it obvious that we do not set anything in
such a case.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/ntc-gr8-evb.dts | 4 +-
arch/arm/boot/dts/ntc-gr8.dtsi | 14 +-----
arch/arm/boot/dts/sun4i-a10-a1000.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 1 +-
arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts | 4 +-
arch/arm/boot/dts/sun4i-a10-gemei-g9.dts | 1 +-
arch/arm/boot/dts/sun4i-a10-hackberry.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-inet1.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-marsboard.dts | 1 +-
arch/arm/boot/dts/sun4i-a10-mk802.dts | 3 +-
arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-pcduino.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-pcduino2.dts | 1 +-
arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts | 3 +-
arch/arm/boot/dts/sun4i-a10.dtsi | 24 +--------
arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts | 1 +-
arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s-mk802.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s.dtsi | 7 +--
arch/arm/boot/dts/sun5i-a13-hsg-h702.dts | 1 +-
arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts | 3 +-
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 2 +-
arch/arm/boot/dts/sun5i-a13-utoo-p66.dts | 1 +-
arch/arm/boot/dts/sun5i-a13.dtsi | 3 +-
arch/arm/boot/dts/sun5i-r8-chip.dts | 2 +-
arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi | 2 +-
arch/arm/boot/dts/sun5i.dtsi | 7 +--
arch/arm/boot/dts/sun6i-a31-app4-evb1.dts | 1 +-
arch/arm/boot/dts/sun6i-a31-colombus.dts | 1 +-
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-i7.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-m9.dts | 2 +-
arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts | 2 +-
arch/arm/boot/dts/sun6i-a31.dtsi | 13 +----
arch/arm/boot/dts/sun6i-a31s-primo81.dts | 1 +-
arch/arm/boot/dts/sun6i-a31s-sina31s.dts | 1 +-
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 3 +-
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 3 +-
arch/arm/boot/dts/sun7i-a20-bananapi.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-bananapro.dts | 5 +--
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 1 +-
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 6 +--
arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 4 +-
arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts | 4 +-
arch/arm/boot/dts/sun7i-a20-itead-ibox.dts | 1 +-
arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-m3.dts | 1 +-
arch/arm/boot/dts/sun7i-a20-mk808c.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 4 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts | 1 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 3 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 1 +-
arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts | 4 +-
arch/arm/boot/dts/sun7i-a20-orangepi.dts | 4 +-
arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts | 3 +-
arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts | 3 +-
arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts | 1 +-
arch/arm/boot/dts/sun7i-a20.dtsi | 37 +------------
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 10 +---
arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts | 1 +-
arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts | 1 +-
arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts | 1 +-
arch/arm/boot/dts/sun8i-a33-olinuxino.dts | 3 +-
arch/arm/boot/dts/sun8i-a33.dtsi | 1 +-
arch/arm/boot/dts/sun8i-a83t.dtsi | 3 +-
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 3 +-
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 4 +-
arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 3 +-
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 3 +-
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 3 +-
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 1 +-
arch/arm/boot/dts/sun8i-h3.dtsi | 12 +----
arch/arm/boot/dts/sun8i-r16-parrot.dts | 3 +-
arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi | 2 +-
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 1 +-
arch/arm/boot/dts/sun9i-a80-optimus.dts | 4 +-
arch/arm/boot/dts/sun9i-a80.dtsi | 6 +--
arch/arm/boot/dts/sunxi-common-regulators.dtsi | 4 +-
85 files changed, 0 insertions(+), 302 deletions(-)
diff --git a/arch/arm/boot/dts/ntc-gr8-evb.dts b/arch/arm/boot/dts/ntc-gr8-evb.dts
index 04a474471adc..5a97dea32f98 100644
--- a/arch/arm/boot/dts/ntc-gr8-evb.dts
+++ b/arch/arm/boot/dts/ntc-gr8-evb.dts
@@ -228,25 +228,21 @@
mmc0_cd_pin_gr8_evb: mmc0-cd-pin at 0 {
allwinner,pins = "PG0";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_pin_gr8_evb: usb0-id-pin at 0 {
allwinner,pins = "PG2";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_det_pin_gr8_evb: usb0-vbus-det-pin at 0 {
allwinner,pins = "PG1";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_gr8_evb: usb1-vbus-pin at 0 {
allwinner,pins = "PG13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/ntc-gr8.dtsi b/arch/arm/boot/dts/ntc-gr8.dtsi
index d6a499bfd795..1c46cd38d999 100644
--- a/arch/arm/boot/dts/ntc-gr8.dtsi
+++ b/arch/arm/boot/dts/ntc-gr8.dtsi
@@ -766,37 +766,31 @@
i2c0_pins_a: i2c0 at 0 {
allwinner,pins = "PB0", "PB1";
allwinner,function = "i2c0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins_a: i2c1 at 0 {
allwinner,pins = "PB15", "PB16";
allwinner,function = "i2c1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins_a: i2c2 at 0 {
allwinner,pins = "PB17", "PB18";
allwinner,function = "i2c2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2s0_data_pins_a: i2s0-data at 0 {
allwinner,pins = "PB6", "PB7", "PB8", "PB9";
allwinner,function = "i2s0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2s0_mclk_pins_a: i2s0-mclk at 0 {
allwinner,pins = "PB6", "PB7", "PB8", "PB9";
allwinner,function = "i2s0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir0_rx_pins_a: ir0 at 0 {
allwinner,pins = "PB4";
allwinner,function = "ir0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
lcd_rgb666_pins: lcd-rgb666 at 0 {
@@ -805,7 +799,6 @@
"PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
"PD24", "PD25", "PD26", "PD27";
allwinner,function = "lcd0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0 at 0 {
@@ -813,7 +806,6 @@
"PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_pins_a: nand-base0 at 0 {
@@ -822,25 +814,21 @@
"PC11", "PC12", "PC13", "PC14",
"PC15";
allwinner,function = "nand0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_cs0_pins_a: nand-cs at 0 {
allwinner,pins = "PC4";
allwinner,function = "nand0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_rb0_pins_a: nand-rb at 0 {
allwinner,pins = "PC6";
allwinner,function = "nand0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm0_pins_a: pwm0 at 0 {
allwinner,pins = "PB2";
allwinner,function = "pwm0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spdif_tx_pins_a: spdif at 0 {
@@ -852,13 +840,11 @@
uart1_pins_a: uart1 at 1 {
allwinner,pins = "PG3", "PG4";
allwinner,function = "uart1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_cts_rts_pins_a: uart1-cts-rts at 0 {
allwinner,pins = "PG5", "PG6";
allwinner,function = "uart1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts b/arch/arm/boot/dts/sun4i-a10-a1000.dts
index 035395a32212..4d8164afc671 100644
--- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
@@ -188,13 +188,11 @@
emac_power_pin_a1000: emac_power_pin at 0 {
allwinner,pins = "PH15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_a1000: led_pins at 0 {
allwinner,pins = "PH10", "PH20";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index f11dcd82f468..e7188d2fb303 100644
--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
@@ -168,7 +168,6 @@
allwinner,pins = "PH20", "PH21";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts b/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
index e01bdd1f1b2b..b4b829d6008d 100644
--- a/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
+++ b/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
@@ -180,25 +180,21 @@
bl_en_pin_dsrv9703c: bl_en_pin at 0 {
allwinner,pins = "PH7";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
codec_pa_pin: codec_pa_pin at 0 {
allwinner,pins = "PH15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
motor_pins: motor_pins at 0 {
allwinner,pins = "PB3";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
touchscreen_pins: touchscreen_pins at 0 {
allwinner,pins = "PB13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts b/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
index fbd02c7a5d43..57496a38b94a 100644
--- a/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
+++ b/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
@@ -158,7 +158,6 @@
codec_pa_pin: codec_pa_pin at 0 {
allwinner,pins = "PH15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
index 9b8134cb968d..de10ae48c6f6 100644
--- a/arch/arm/boot/dts/sun4i-a10-hackberry.dts
+++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
@@ -131,13 +131,11 @@
hackberry_hogs: hogs at 0 {
allwinner,pins = "PH19";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb2_vbus_pin_hackberry: usb2_vbus_pin at 0 {
allwinner,pins = "PH12";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun4i-a10-inet1.dts b/arch/arm/boot/dts/sun4i-a10-inet1.dts
index bb64e466c4e0..f78c17a9a298 100644
--- a/arch/arm/boot/dts/sun4i-a10-inet1.dts
+++ b/arch/arm/boot/dts/sun4i-a10-inet1.dts
@@ -182,13 +182,11 @@
bl_en_pin_inet: bl_en_pin at 0 {
allwinner,pins = "PH7";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
touchscreen_wake_pin: touchscreen_wake_pin at 0 {
allwinner,pins = "PB13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts b/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
index 65273bc7998c..e6ffaefed42d 100644
--- a/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
+++ b/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
@@ -165,13 +165,11 @@
emac_power_pin_q5: emac_power_pin at 0 {
allwinner,pins = "PH19";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_q5: led_pins at 0 {
allwinner,pins = "PH20";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun4i-a10-marsboard.dts b/arch/arm/boot/dts/sun4i-a10-marsboard.dts
index c5916125bea8..001656eb9171 100644
--- a/arch/arm/boot/dts/sun4i-a10-marsboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-marsboard.dts
@@ -166,7 +166,6 @@
led_pins_marsboard: led_pins at 0 {
allwinner,pins = "PB5", "PB6", "PB7", "PB8";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun4i-a10-mk802.dts b/arch/arm/boot/dts/sun4i-a10-mk802.dts
index 204e2b68d09f..9ce39f75188e 100644
--- a/arch/arm/boot/dts/sun4i-a10-mk802.dts
+++ b/arch/arm/boot/dts/sun4i-a10-mk802.dts
@@ -93,19 +93,16 @@
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
allwinner,pins = "PH4";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
allwinner,pins = "PH5";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb2_vbus_pin_mk802: usb2_vbus_pin at 0 {
allwinner,pins = "PH12";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
index e8e14a53b764..203d399f0f7b 100644
--- a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
+++ b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
@@ -170,14 +170,12 @@
ahci_pwr_pin_olinuxinolime: ahci_pwr_pin at 1 {
allwinner,pins = "PC3";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_olinuxinolime: led_pins at 0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun4i-a10-pcduino.dts b/arch/arm/boot/dts/sun4i-a10-pcduino.dts
index 7e94334420af..94cdef53ac11 100644
--- a/arch/arm/boot/dts/sun4i-a10-pcduino.dts
+++ b/arch/arm/boot/dts/sun4i-a10-pcduino.dts
@@ -172,13 +172,11 @@
led_pins_pcduino: led_pins at 0 {
allwinner,pins = "PH15", "PH16";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
key_pins_pcduino: key_pins at 0 {
allwinner,pins = "PH17", "PH18", "PH19";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun4i-a10-pcduino2.dts b/arch/arm/boot/dts/sun4i-a10-pcduino2.dts
index 05de4050a831..9656ec9b51ae 100644
--- a/arch/arm/boot/dts/sun4i-a10-pcduino2.dts
+++ b/arch/arm/boot/dts/sun4i-a10-pcduino2.dts
@@ -59,7 +59,6 @@
usb2_vbus_pin_pcduino2: usb2_vbus_pin at 0 {
allwinner,pins = "PD2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts b/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts
index 459c7a2dbee7..9dedd808bde8 100644
--- a/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts
+++ b/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts
@@ -166,19 +166,16 @@
bl_en_pin_protab: bl_en_pin at 0 {
allwinner,pins = "PH7";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
codec_pa_pin: codec_pa_pin at 0 {
allwinner,pins = "PH15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
touchscreen_pins: touchscreen_pins at 0 {
allwinner,pins = "PA5", "PB13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index ae562272589c..36f3416c4c32 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -980,49 +980,41 @@
"PA11", "PA12", "PA13", "PA14",
"PA15", "PA16";
allwinner,function = "emac";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c0_pins_a: i2c0 at 0 {
allwinner,pins = "PB0", "PB1";
allwinner,function = "i2c0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins_a: i2c1 at 0 {
allwinner,pins = "PB18", "PB19";
allwinner,function = "i2c1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins_a: i2c2 at 0 {
allwinner,pins = "PB20", "PB21";
allwinner,function = "i2c2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir0_rx_pins_a: ir0 at 0 {
allwinner,pins = "PB4";
allwinner,function = "ir0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir0_tx_pins_a: ir0 at 1 {
allwinner,pins = "PB3";
allwinner,function = "ir0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir1_rx_pins_a: ir1 at 0 {
allwinner,pins = "PB23";
allwinner,function = "ir1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir1_tx_pins_a: ir1 at 1 {
allwinner,pins = "PB22";
allwinner,function = "ir1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0 at 0 {
@@ -1030,7 +1022,6 @@
"PF3", "PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_reference_design: mmc0_cd_pin at 0 {
@@ -1042,25 +1033,21 @@
ps20_pins_a: ps20 at 0 {
allwinner,pins = "PI20", "PI21";
allwinner,function = "ps2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ps21_pins_a: ps21 at 0 {
allwinner,pins = "PH12", "PH13";
allwinner,function = "ps2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm0_pins_a: pwm0 at 0 {
allwinner,pins = "PB2";
allwinner,function = "pwm";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm1_pins_a: pwm1 at 0 {
allwinner,pins = "PI3";
allwinner,function = "pwm";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spdif_tx_pins_a: spdif at 0 {
@@ -1072,67 +1059,56 @@
spi0_pins_a: spi0 at 0 {
allwinner,pins = "PI11", "PI12", "PI13";
allwinner,function = "spi0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi0_cs0_pins_a: spi0_cs0 at 0 {
allwinner,pins = "PI10";
allwinner,function = "spi0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi1_pins_a: spi1 at 0 {
allwinner,pins = "PI17", "PI18", "PI19";
allwinner,function = "spi1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi1_cs0_pins_a: spi1_cs0 at 0 {
allwinner,pins = "PI16";
allwinner,function = "spi1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_a: spi2 at 0 {
allwinner,pins = "PC20", "PC21", "PC22";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_b: spi2 at 1 {
allwinner,pins = "PB15", "PB16", "PB17";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_cs0_pins_a: spi2_cs0 at 0 {
allwinner,pins = "PC19";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_cs0_pins_b: spi2_cs0 at 1 {
allwinner,pins = "PB14";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PB22", "PB23";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_b: uart0 at 1 {
allwinner,pins = "PF2", "PF4";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_pins_a: uart1 at 0 {
allwinner,pins = "PA10", "PA11";
allwinner,function = "uart1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts b/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts
index 813e18c011da..8d1e414c0a3a 100644
--- a/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts
@@ -118,7 +118,6 @@
allwinner,pins = "PB2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts b/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
index 3c79e3536521..e3438a685c71 100644
--- a/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
@@ -144,14 +144,12 @@
mmc1_vcc_en_pin_t004: mmc1_vcc_en_pin at 0 {
allwinner,pins = "PB18";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_t004: led_pins at 0 {
allwinner,pins = "PB2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a10s-mk802.dts b/arch/arm/boot/dts/sun5i-a10s-mk802.dts
index 940139145fd5..405c1d519301 100644
--- a/arch/arm/boot/dts/sun5i-a10s-mk802.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-mk802.dts
@@ -118,7 +118,6 @@
led_pins_mk802: led_pins at 0 {
allwinner,pins = "PB2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_mk802: mmc0_cd_pin at 0 {
@@ -130,7 +129,6 @@
usb1_vbus_pin_mk802: usb1_vbus_pin at 0 {
allwinner,pins = "PB10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
index 26d74958bd57..125243305525 100644
--- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
@@ -217,13 +217,11 @@
allwinner,pins = "PE3";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_olinuxino_m: usb1_vbus_pin at 0 {
allwinner,pins = "PB10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts
index 84a3bf817c3b..e2dceda4889b 100644
--- a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts
@@ -110,13 +110,11 @@
allwinner,pins = "PB2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_r7: usb1_vbus_pin at 0 {
allwinner,pins = "PG13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts b/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts
index 56a6982773a9..f40451bffb84 100644
--- a/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts
@@ -148,7 +148,6 @@
led_pins_wobo_i5: led_pins at 0 {
allwinner,pins = "PB2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_wobo_i5: mmc0_cd_pin at 0 {
@@ -160,7 +159,6 @@
emac_power_pin_wobo: emac_power_pin at 0 {
allwinner,pins = "PA02";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 9aa80630e00f..4e014cb11e81 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -202,13 +202,11 @@
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PB19", "PB20";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart2_pins_a: uart2 at 0 {
allwinner,pins = "PC18", "PC19";
allwinner,function = "uart2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
emac_pins_a: emac0 at 0 {
@@ -218,7 +216,6 @@
"PA11", "PA12", "PA13", "PA14",
"PA15", "PA16";
allwinner,function = "emac";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
emac_pins_b: emac0 at 1 {
@@ -228,7 +225,6 @@
"PD21", "PD22", "PD23", "PD24",
"PD25", "PD26", "PD27";
allwinner,function = "emac";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc1_pins_a: mmc1 at 0 {
@@ -236,19 +232,16 @@
"PG6", "PG7", "PG8";
allwinner,function = "mmc1";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_a: spi2 at 0 {
allwinner,pins = "PB12", "PB13", "PB14";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_cs0_pins_a: spi2_cs0 at 0 {
allwinner,pins = "PB11";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
index aa4484ac50b2..f5d1a04f3a16 100644
--- a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
+++ b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
@@ -150,7 +150,6 @@
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
allwinner,pins = "PG1";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
index 8aec90ac28a4..df9315e5c850 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
@@ -124,7 +124,6 @@
allwinner,pins = "PG9";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
@@ -142,13 +141,11 @@
usb0_vbus_pin_olinuxinom: usb0_vbus_pin at 0 {
allwinner,pins = "PG12";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_olinuxinom: usb1_vbus_pin at 0 {
allwinner,pins = "PG11";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
index 86ae19ba70d4..0f035adfbc57 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
@@ -174,7 +174,6 @@
allwinner,pins = "PG9";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
@@ -192,7 +191,6 @@
usb1_vbus_pin_olinuxino: usb1_vbus_pin at 0 {
allwinner,pins = "PG11";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
index 663cfa414dc2..3b7f2097824d 100644
--- a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
+++ b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
@@ -124,7 +124,6 @@
ts_wake_pin_p66: ts_wake_pin at 0 {
allwinner,pins = "PB3";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index d79db1525448..1f4c5f773226 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -355,18 +355,15 @@
"PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
"PD24", "PD25", "PD26", "PD27";
allwinner,function = "lcd0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_pins_a: uart1 at 0 {
allwinner,pins = "PE10", "PE11";
allwinner,function = "uart1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_pins_b: uart1 at 1 {
allwinner,pins = "PG3", "PG4";
allwinner,function = "uart1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts
index 398a17a5d2e6..8f7f01bf1f0c 100644
--- a/arch/arm/boot/dts/sun5i-r8-chip.dts
+++ b/arch/arm/boot/dts/sun5i-r8-chip.dts
@@ -152,13 +152,11 @@
chip_vbus_pin: chip_vbus_pin at 0 {
allwinner,pins = "PB10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
chip_id_det_pin: chip_id_det_pin at 0 {
allwinner,pins = "PG2";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
index 600bd3c0e231..b29c4d1fad40 100644
--- a/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
+++ b/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
@@ -114,7 +114,6 @@
codec_pa_pin: codec_pa_pin at 0 {
allwinner,pins = "PG10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin: mmc0_cd_pin at 0 {
@@ -138,7 +137,6 @@
usb0_vbus_pin_a: usb0_vbus_pin at 0 {
allwinner,pins = "PG12";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index fe84703d3c14..76b696944514 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -556,19 +556,16 @@
i2c0_pins_a: i2c0 at 0 {
allwinner,pins = "PB0", "PB1";
allwinner,function = "i2c0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins_a: i2c1 at 0 {
allwinner,pins = "PB15", "PB16";
allwinner,function = "i2c1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins_a: i2c2 at 0 {
allwinner,pins = "PB17", "PB18";
allwinner,function = "i2c2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0 at 0 {
@@ -576,7 +573,6 @@
"PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc2_pins_a: mmc2 at 0 {
@@ -591,19 +587,16 @@
uart3_pins_a: uart3 at 0 {
allwinner,pins = "PG9", "PG10";
allwinner,function = "uart3";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart3_pins_cts_rts_a: uart3-cts-rts at 0 {
allwinner,pins = "PG11", "PG12";
allwinner,function = "uart3";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm0_pins: pwm0 {
allwinner,pins = "PB2";
allwinner,function = "pwm";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
index e723dedeb614..cbc99ce6ab1a 100644
--- a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
+++ b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
@@ -70,7 +70,6 @@
usb1_vbus_pin_a: usb1_vbus_pin at 0 {
allwinner,pins = "PH27";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31-colombus.dts b/arch/arm/boot/dts/sun6i-a31-colombus.dts
index 4057e91c7cb5..24909c8c1186 100644
--- a/arch/arm/boot/dts/sun6i-a31-colombus.dts
+++ b/arch/arm/boot/dts/sun6i-a31-colombus.dts
@@ -137,7 +137,6 @@
usb2_vbus_pin_colombus: usb2_vbus_pin at 0 {
allwinner,pins = "PH24";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c_lcd_pins: i2c_lcd_pin at 0 {
diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index a82c4674a3fc..7ec5f5fcdaac 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -155,7 +155,6 @@
gmac_phy_reset_pin_hummingbird: gmac_phy_reset_pin at 0 {
allwinner,pins = "PA21";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_hummingbird: mmc0_cd_pin at 0 {
@@ -167,7 +166,6 @@
wifi_reset_pin_hummingbird: wifi_reset_pin at 0 {
allwinner,pins = "PG10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31-i7.dts b/arch/arm/boot/dts/sun6i-a31-i7.dts
index a2d6a92dac29..61e3ef4528ec 100644
--- a/arch/arm/boot/dts/sun6i-a31-i7.dts
+++ b/arch/arm/boot/dts/sun6i-a31-i7.dts
@@ -111,7 +111,6 @@
led_pins_i7: led_pins at 0 {
allwinner,pins = "PH13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_i7: mmc0_cd_pin at 0 {
@@ -123,7 +122,6 @@
usb1_vbus_pin_i7: usb1_vbus_pin at 0 {
allwinner,pins = "PC27";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts b/arch/arm/boot/dts/sun6i-a31-m9.dts
index 0ae5ab2f06fa..96ad1fe9bbc8 100644
--- a/arch/arm/boot/dts/sun6i-a31-m9.dts
+++ b/arch/arm/boot/dts/sun6i-a31-m9.dts
@@ -130,7 +130,6 @@
led_pins_m9: led_pins at 0 {
allwinner,pins = "PH13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_m9: mmc0_cd_pin at 0 {
@@ -142,7 +141,6 @@
usb1_vbus_pin_m9: usb1_vbus_pin at 0 {
allwinner,pins = "PC27";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
index a551673aca68..a29ea186b964 100644
--- a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
+++ b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
@@ -130,7 +130,6 @@
led_pins_m9: led_pins at 0 {
allwinner,pins = "PH13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_m9: mmc0_cd_pin at 0 {
@@ -142,7 +141,6 @@
usb1_vbus_pin_m9: usb1_vbus_pin at 0 {
allwinner,pins = "PC27";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 6fcd3cf5b3b9..f754a255ca7d 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -437,25 +437,21 @@
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PH20", "PH21";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c0_pins_a: i2c0 at 0 {
allwinner,pins = "PH14", "PH15";
allwinner,function = "i2c0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins_a: i2c1 at 0 {
allwinner,pins = "PH16", "PH17";
allwinner,function = "i2c1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins_a: i2c2 at 0 {
allwinner,pins = "PH18", "PH19";
allwinner,function = "i2c2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0 at 0 {
@@ -463,7 +459,6 @@
"PF3", "PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc1_pins_a: mmc1 at 0 {
@@ -471,7 +466,6 @@
"PG4", "PG5";
allwinner,function = "mmc1";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc2_pins_a: mmc2 at 0 {
@@ -489,7 +483,6 @@
"PC24";
allwinner,function = "mmc2";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc3_8bit_emmc_pins: mmc3 at 1 {
@@ -499,7 +492,6 @@
"PC24";
allwinner,function = "mmc3";
allwinner,drive = <SUN4I_PINCTRL_40_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_mii_a: gmac_mii at 0 {
@@ -509,7 +501,6 @@
"PA20", "PA21", "PA22", "PA23",
"PA24", "PA26", "PA27";
allwinner,function = "gmac";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_gmii_a: gmac_gmii at 0 {
@@ -526,7 +517,6 @@
* might need a higher signal drive strength
*/
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_rgmii_a: gmac_rgmii at 0 {
@@ -540,7 +530,6 @@
* and need a higher signal drive strength
*/
allwinner,drive = <SUN4I_PINCTRL_40_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -892,13 +881,11 @@
ir_pins_a: ir at 0 {
allwinner,pins = "PL4";
allwinner,function = "s_ir";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
p2wi_pins: p2wi {
allwinner,pins = "PL0", "PL1";
allwinner,function = "s_p2wi";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun6i-a31s-primo81.dts b/arch/arm/boot/dts/sun6i-a31s-primo81.dts
index 4332cde8d6ca..f511aa0e250d 100644
--- a/arch/arm/boot/dts/sun6i-a31s-primo81.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-primo81.dts
@@ -136,7 +136,6 @@
gt911_int_primo81: gt911_int_pin at 0 {
allwinner,pins = "PA3";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mma8452_int_primo81: mma8452_int_pin at 0 {
diff --git a/arch/arm/boot/dts/sun6i-a31s-sina31s.dts b/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
index d0304f51a5c6..2beb867d095a 100644
--- a/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
@@ -130,7 +130,6 @@
led_pin_sina31s: led_pin at 0 {
allwinner,pins = "PH13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_sina31s: mmc0_cd_pin at 0 {
diff --git a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
index 83e47a1c93bd..3731cf22abc1 100644
--- a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
@@ -155,13 +155,11 @@
gmac_phy_reset_pin_bpi_m2: gmac_phy_reset_pin at 0 {
allwinner,pins = "PA21";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_bpi_m2: led_pins at 0 {
allwinner,pins = "PG5", "PG10", "PG11";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_bpi_m2: mmc0_cd_pin at 0 {
@@ -175,7 +173,6 @@
mmc2_pwrseq_pin_bpi_m2: mmc2_pwrseq_pin at 0 {
allwinner,pins = "PL8";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
index e10630e59c05..2018f074ff05 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
@@ -196,13 +196,11 @@
gmac_power_pin_bpi_m1p: gmac_power_pin at 0 {
allwinner,pins = "PH23";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_bpi_m1p: led_pins at 0 {
allwinner,pins = "PH24", "PH25";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_bpi_m1p: mmc0_cd_pin at 0 {
@@ -214,7 +212,6 @@
mmc3_pwrseq_pin_bpi_m1p: mmc3_pwrseq_pin at 0 {
allwinner,pins = "PH22";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
index 158ab889dce7..7cd6a74d104c 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
@@ -193,13 +193,11 @@
gmac_power_pin_bananapi: gmac_power_pin at 0 {
allwinner,pins = "PH23";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_bananapi: led_pins at 0 {
allwinner,pins = "PH24";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
index 4aaf137376de..366636451e7e 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
@@ -184,13 +184,11 @@
gmac_power_pin_bananapro: gmac_power_pin at 0 {
allwinner,pins = "PH23";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_bananapro: led_pins at 0 {
allwinner,pins = "PH24", "PG2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_bananapro: mmc0_cd_pin at 0 {
@@ -202,19 +200,16 @@
usb1_vbus_pin_bananapro: usb1_vbus_pin at 0 {
allwinner,pins = "PH0";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb2_vbus_pin_bananapro: usb2_vbus_pin at 0 {
allwinner,pins = "PH1";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
vmmc3_pin_bananapro: vmmc3_pin at 0 {
allwinner,pins = "PH22";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
index 42779aeb7297..e635dd6ac47d 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
@@ -162,7 +162,6 @@
led_pins_cubieboard2: led_pins at 0 {
allwinner,pins = "PH20", "PH21";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index a0b7ffb6196d..be8fa4879453 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -226,37 +226,31 @@
ahci_pwr_pin_cubietruck: ahci_pwr_pin at 1 {
allwinner,pins = "PH12";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_cubietruck: led_pins at 0 {
allwinner,pins = "PH7", "PH11", "PH20", "PH21";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc3_pwrseq_pin_cubietruck: mmc3_pwrseq_pin at 0 {
allwinner,pins = "PH9";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_pin_a: usb0_vbus_pin at 0 {
allwinner,pins = "PH17";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
allwinner,pins = "PH19";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
allwinner,pins = "PH22";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
index 714a463e24ed..6719c701a45f 100644
--- a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
+++ b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
@@ -190,25 +190,21 @@
ahci_pwr_pin_a20_hummingbird: ahci_pwr_pin at 0 {
allwinner,pins = "PH15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_a20_hummingbird: usb1_vbus_pin at 0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc3_vdd_pin_a20_hummingbird: mmc3_vdd_pin at 0 {
allwinner,pins = "PH9";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_vdd_pin_a20_hummingbird: gmac_vdd_pin at 0 {
allwinner,pins = "PH16";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts
index 4d1e102ea4b9..d64c11134dd7 100644
--- a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts
+++ b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts
@@ -200,25 +200,21 @@
vmmc3_pin_i12_tvbox: vmmc3_pin at 0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
vmmc3_io_pin_i12_tvbox: vmmc3_io_pin at 0 {
allwinner,pins = "PH12";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_power_pin_i12_tvbox: gmac_power_pin at 0 {
allwinner,pins = "PH21";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_i12_tvbox: led_pins at 0 {
allwinner,pins = "PH9", "PH20";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts b/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts
index 10d48cbf81ff..44f09642c893 100644
--- a/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts
+++ b/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts
@@ -134,7 +134,6 @@
allwinner,pins = "PH20","PH21";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
index 57c05e69d012..79cee00a85de 100644
--- a/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
+++ b/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
@@ -236,13 +236,11 @@
gmac_power_pin_lamobo_r1: gmac_power_pin at 0 {
allwinner,pins = "PH23";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_lamobo_r1: led_pins at 0 {
allwinner,pins = "PH24";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-m3.dts b/arch/arm/boot/dts/sun7i-a20-m3.dts
index cfaa5b45b159..97ce27da445f 100644
--- a/arch/arm/boot/dts/sun7i-a20-m3.dts
+++ b/arch/arm/boot/dts/sun7i-a20-m3.dts
@@ -147,7 +147,6 @@
led_pins_m3: led_pins at 0 {
allwinner,pins = "PH20";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-mk808c.dts b/arch/arm/boot/dts/sun7i-a20-mk808c.dts
index edd397d796be..c5890617382c 100644
--- a/arch/arm/boot/dts/sun7i-a20-mk808c.dts
+++ b/arch/arm/boot/dts/sun7i-a20-mk808c.dts
@@ -134,13 +134,11 @@
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
allwinner,pins = "PH4";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
allwinner,pins = "PH5";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
index edf735c10b63..de2863651b44 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
@@ -206,14 +206,12 @@
ahci_pwr_pin_olimex_som_evb: ahci_pwr_pin at 1 {
allwinner,pins = "PC3";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_olimex_som_evb: led_pins at 0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc3_cd_pin_olimex_som_evb: mmc3_cd_pin at 0 {
@@ -225,13 +223,11 @@
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
allwinner,pins = "PH4";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
allwinner,pins = "PH5";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts
index 632ad580e09f..21946497789e 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts
@@ -155,14 +155,12 @@
ahci_pwr_pin_olinuxinolime: ahci_pwr_pin at 1 {
allwinner,pins = "PC3";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_olinuxinolime: led_pins at 0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts
index a64c2b3a1125..6858d6aafea3 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts
@@ -59,7 +59,6 @@
mmc2_pins_nrst: mmc2 at 0 {
allwinner,pins = "PC16";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index b47b67765aec..3dcd745126a9 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
@@ -204,14 +204,12 @@
ahci_pwr_pin_olinuxinolime: ahci_pwr_pin at 1 {
allwinner,pins = "PC3";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_olinuxinolime: led_pins at 0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
@@ -229,7 +227,6 @@
usb0_vbus_pin_lime2: usb0_vbus_pin at 0 {
allwinner,pins = "PC17";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index 2dddbf148d8e..3773926df96e 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -236,7 +236,6 @@
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
index 69ad2345613f..8e05256f7c1b 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
@@ -186,25 +186,21 @@
usb2_vbus_pin_bananapro: usb2_vbus_pin at 0 {
allwinner,pins = "PH22";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_power_pin_orangepi: gmac_power_pin at 0 {
allwinner,pins = "PH23";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_orangepi: led_pins at 0 {
allwinner,pins = "PH24", "PH25";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_bananapro: usb1_vbus_pin at 0 {
allwinner,pins = "PH26";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi.dts b/arch/arm/boot/dts/sun7i-a20-orangepi.dts
index d6608ed6cdf3..d168b8f08e30 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi.dts
@@ -161,25 +161,21 @@
usb2_vbus_pin_bananapro: usb2_vbus_pin at 0 {
allwinner,pins = "PH22";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_power_pin_orangepi: gmac_power_pin at 0 {
allwinner,pins = "PH23";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_orangepi: led_pins at 0 {
allwinner,pins = "PH24";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_bananapro: usb1_vbus_pin at 0 {
allwinner,pins = "PH26";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
index 4a292a12616d..cdcbee74274e 100644
--- a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
+++ b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
@@ -154,13 +154,11 @@
ahci_pwr_pin_pcduino3_nano: ahci_pwr_pin at 0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
led_pins_pcduino3_nano: led_pins at 0 {
allwinner,pins = "PH16", "PH15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
@@ -172,7 +170,6 @@
usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin at 0 {
allwinner,pins = "PD2";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
index a416b3a47cee..fd2b4b8af9ea 100644
--- a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
+++ b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
@@ -185,13 +185,11 @@
led_pins_pcduino3: led_pins at 0 {
allwinner,pins = "PH15", "PH16";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
key_pins_pcduino3: key_pins at 0 {
allwinner,pins = "PH17", "PH18", "PH19";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
index a10c4ccd741d..688f75ceab58 100644
--- a/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
+++ b/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
@@ -175,19 +175,16 @@
bl_enable_pin: bl_enable_pin at 0 {
allwinner,pins = "PH7";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
codec_pa_pin: codec_pa_pin at 0 {
allwinner,pins = "PH15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ts_reset_pin: ts_reset_pin at 0 {
allwinner,pins = "PB13";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
index 87901259582b..b12493350ee3 100644
--- a/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
+++ b/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
@@ -162,7 +162,6 @@
vmmc3_pin_ap6xxx_wl_regon: vmmc3_pin at 0 {
allwinner,pins = "PH9";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index b6486fbfb48a..35dd9680ce3d 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -1094,13 +1094,11 @@
clk_out_a_pins_a: clk_out_a at 0 {
allwinner,pins = "PI12";
allwinner,function = "clk_out_a";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
clk_out_b_pins_a: clk_out_b at 0 {
allwinner,pins = "PI13";
allwinner,function = "clk_out_b";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
emac_pins_a: emac0 at 0 {
@@ -1110,7 +1108,6 @@
"PA11", "PA12", "PA13", "PA14",
"PA15", "PA16";
allwinner,function = "emac";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_mii_a: gmac_mii at 0 {
@@ -1120,7 +1117,6 @@
"PA11", "PA12", "PA13", "PA14",
"PA15", "PA16";
allwinner,function = "gmac";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
gmac_pins_rgmii_a: gmac_rgmii at 0 {
@@ -1135,55 +1131,46 @@
* and need a higher signal drive strength
*/
allwinner,drive = <SUN4I_PINCTRL_40_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c0_pins_a: i2c0 at 0 {
allwinner,pins = "PB0", "PB1";
allwinner,function = "i2c0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins_a: i2c1 at 0 {
allwinner,pins = "PB18", "PB19";
allwinner,function = "i2c1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins_a: i2c2 at 0 {
allwinner,pins = "PB20", "PB21";
allwinner,function = "i2c2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c3_pins_a: i2c3 at 0 {
allwinner,pins = "PI0", "PI1";
allwinner,function = "i2c3";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir0_rx_pins_a: ir0 at 0 {
allwinner,pins = "PB4";
allwinner,function = "ir0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir0_tx_pins_a: ir0 at 1 {
allwinner,pins = "PB3";
allwinner,function = "ir0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir1_rx_pins_a: ir1 at 0 {
allwinner,pins = "PB23";
allwinner,function = "ir1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ir1_tx_pins_a: ir1 at 1 {
allwinner,pins = "PB22";
allwinner,function = "ir1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0 at 0 {
@@ -1191,7 +1178,6 @@
"PF3", "PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_reference_design: mmc0_cd_pin at 0 {
@@ -1213,31 +1199,26 @@
"PI7", "PI8", "PI9";
allwinner,function = "mmc3";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ps20_pins_a: ps20 at 0 {
allwinner,pins = "PI20", "PI21";
allwinner,function = "ps2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
ps21_pins_a: ps21 at 0 {
allwinner,pins = "PH12", "PH13";
allwinner,function = "ps2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm0_pins_a: pwm0 at 0 {
allwinner,pins = "PB2";
allwinner,function = "pwm";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm1_pins_a: pwm1 at 0 {
allwinner,pins = "PI3";
allwinner,function = "pwm";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spdif_tx_pins_a: spdif at 0 {
@@ -1249,109 +1230,91 @@
spi0_pins_a: spi0 at 0 {
allwinner,pins = "PI11", "PI12", "PI13";
allwinner,function = "spi0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi0_cs0_pins_a: spi0_cs0 at 0 {
allwinner,pins = "PI10";
allwinner,function = "spi0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi0_cs1_pins_a: spi0_cs1 at 0 {
allwinner,pins = "PI14";
allwinner,function = "spi0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi1_pins_a: spi1 at 0 {
allwinner,pins = "PI17", "PI18", "PI19";
allwinner,function = "spi1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi1_cs0_pins_a: spi1_cs0 at 0 {
allwinner,pins = "PI16";
allwinner,function = "spi1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_a: spi2 at 0 {
allwinner,pins = "PC20", "PC21", "PC22";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_pins_b: spi2 at 1 {
allwinner,pins = "PB15", "PB16", "PB17";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_cs0_pins_a: spi2_cs0 at 0 {
allwinner,pins = "PC19";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
spi2_cs0_pins_b: spi2_cs0 at 1 {
allwinner,pins = "PB14";
allwinner,function = "spi2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PB22", "PB23";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart2_pins_a: uart2 at 0 {
allwinner,pins = "PI16", "PI17", "PI18", "PI19";
allwinner,function = "uart2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart3_pins_a: uart3 at 0 {
allwinner,pins = "PG6", "PG7", "PG8", "PG9";
allwinner,function = "uart3";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart3_pins_b: uart3 at 1 {
allwinner,pins = "PH0", "PH1";
allwinner,function = "uart3";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart4_pins_a: uart4 at 0 {
allwinner,pins = "PG10", "PG11";
allwinner,function = "uart4";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart4_pins_b: uart4 at 1 {
allwinner,pins = "PH4", "PH5";
allwinner,function = "uart4";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart5_pins_a: uart5 at 0 {
allwinner,pins = "PI10", "PI11";
allwinner,function = "uart5";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart6_pins_a: uart6 at 0 {
allwinner,pins = "PI12", "PI13";
allwinner,function = "uart6";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart7_pins_a: uart7 at 0 {
allwinner,pins = "PI20", "PI21";
allwinner,function = "uart7";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index c250c6d12f2f..294f00a95559 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -275,7 +275,6 @@
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PF2", "PF4";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_pins_a: uart1 at 0 {
@@ -293,7 +292,6 @@
"PF3", "PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc1_pins_a: mmc1 at 0 {
@@ -301,7 +299,6 @@
"PG3", "PG4", "PG5";
allwinner,function = "mmc1";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc2_8bit_pins: mmc2_8bit {
@@ -311,31 +308,26 @@
"PC15", "PC16";
allwinner,function = "mmc2";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
pwm0_pins: pwm0 {
allwinner,pins = "PH0";
allwinner,function = "pwm0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c0_pins_a: i2c0 at 0 {
allwinner,pins = "PH2", "PH3";
allwinner,function = "i2c0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins_a: i2c1 at 0 {
allwinner,pins = "PH4", "PH5";
allwinner,function = "i2c1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins_a: i2c2 at 0 {
allwinner,pins = "PE12", "PE13";
allwinner,function = "i2c2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
lcd_rgb666_pins: lcd-rgb666 at 0 {
@@ -344,7 +336,6 @@
"PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
"PD24", "PD25", "PD26", "PD27";
allwinner,function = "lcd0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -584,7 +575,6 @@
r_uart_pins_a: r_uart at 0 {
allwinner,pins = "PL2", "PL3";
allwinner,function = "s_uart";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
index fea9db3ee9ad..89f68a78ab32 100644
--- a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
+++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
@@ -93,7 +93,6 @@
wifi_pwrseq_pin_mid2407: wifi_pwrseq_pin at 0 {
allwinner,pins = "PL6";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
index abcd94ea5e86..e8367deaa587 100644
--- a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
+++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
@@ -86,7 +86,6 @@
wifi_pwrseq_pin_mid2809: wifi_pwrseq_pin at 0 {
allwinner,pins = "PL6";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
index fb4665576dff..442db91b943a 100644
--- a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
+++ b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
@@ -92,7 +92,6 @@
allwinner,pins = "PL5";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a33-olinuxino.dts b/arch/arm/boot/dts/sun8i-a33-olinuxino.dts
index 7eaf610eabd7..59a64d2d695c 100644
--- a/arch/arm/boot/dts/sun8i-a33-olinuxino.dts
+++ b/arch/arm/boot/dts/sun8i-a33-olinuxino.dts
@@ -94,19 +94,16 @@
led_pin_olinuxino: led_pins at 0 {
allwinner,pins = "PB7";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_olinuxino: mmc0_cd_pin at 0 {
allwinner,pins = "PB4";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
allwinner,pins = "PB3";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index e60c4c8c6976..310a38cf7f18 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -240,7 +240,6 @@
uart0_pins_b: uart0 at 1 {
allwinner,pins = "PB0", "PB1";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index c03d7f4cac83..cec6bfc2d3c9 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -171,19 +171,16 @@
"PF3", "PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PF2", "PF4";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_b: uart0 at 1 {
allwinner,pins = "PB9", "PB10";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index e02314a2d643..49194c38d56b 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -158,19 +158,16 @@
pwr_led_bpi_m2p: led_pins at 0 {
allwinner,pins = "PL10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
sw_r_bpi_m2p: key_pins at 0 {
allwinner,pins = "PL3";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
wifi_en_bpi_m2p: wifi_en_pin {
allwinner,pins = "PL7";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 277935e10543..1c6e96e8ec98 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -99,7 +99,6 @@
leds_opc: led-pins {
allwinner,pins = "PA10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -107,7 +106,6 @@
leds_r_opc: led-pins {
allwinner,pins = "PL10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index e44af3446514..dfd9bc2008fd 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -147,7 +147,6 @@
leds_opc: led_pins at 0 {
allwinner,pins = "PA15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -155,19 +154,16 @@
leds_r_opc: led_pins at 0 {
allwinner,pins = "PL10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
sw_r_opc: key_pins at 0 {
allwinner,pins = "PL3", "PL4";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
wifi_pwrseq_pin_orangepi: wifi_pwrseq_pin at 0 {
allwinner,pins = "PL7";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
index ce5b1086b580..77d29bae7739 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
@@ -145,7 +145,6 @@
leds_opc: led_pins at 0 {
allwinner,pins = "PA15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -153,13 +152,11 @@
leds_r_opc: led_pins at 0 {
allwinner,pins = "PL10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
sw_r_opc: key_pins at 0 {
allwinner,pins = "PL3";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index fbdd239175d4..49529d9ca26d 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -112,7 +112,6 @@
leds_opc: led_pins at 0 {
allwinner,pins = "PA15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -120,13 +119,11 @@
leds_r_opc: led_pins at 0 {
allwinner,pins = "PL10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
sw_r_opc: key_pins at 0 {
allwinner,pins = "PL3";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 638720c3d04e..0d56d33d43ea 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -134,7 +134,6 @@
leds_opc: led_pins at 0 {
allwinner,pins = "PA15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -142,13 +141,11 @@
leds_r_opc: led_pins at 0 {
allwinner,pins = "PL10";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
sw_r_opc: key_pins at 0 {
allwinner,pins = "PL3";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index 1236583caf64..ab8593d1d3df 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -85,7 +85,6 @@
usb3_vbus_pin_a: usb3_vbus_pin at 0 {
allwinner,pins = "PG11";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 4d10f8ad89da..cd02058dc8db 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -330,19 +330,16 @@
i2c0_pins: i2c0 {
allwinner,pins = "PA11", "PA12";
allwinner,function = "i2c0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c1_pins: i2c1 {
allwinner,pins = "PA18", "PA19";
allwinner,function = "i2c1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
i2c2_pins: i2c2 {
allwinner,pins = "PE12", "PE13";
allwinner,function = "i2c2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins_a: mmc0 at 0 {
@@ -350,7 +347,6 @@
"PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin: mmc0_cd_pin at 0 {
@@ -364,7 +360,6 @@
"PG4", "PG5";
allwinner,function = "mmc1";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc2_8bit_pins: mmc2_8bit {
@@ -374,37 +369,31 @@
"PC15", "PC16";
allwinner,function = "mmc2";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PA4", "PA5";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_pins: uart1 {
allwinner,pins = "PG6", "PG7";
allwinner,function = "uart1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart1_rts_cts_pins: uart1_rts_cts {
allwinner,pins = "PG8", "PG9";
allwinner,function = "uart1";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart2_pins: uart2 {
allwinner,pins = "PA0", "PA1";
allwinner,function = "uart2";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart3_pins: uart3 {
allwinner,pins = "PG13", "PG14";
allwinner,function = "uart3";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -569,7 +558,6 @@
ir_pins_a: ir at 0 {
allwinner,pins = "PL11";
allwinner,function = "s_cir_rx";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
};
diff --git a/arch/arm/boot/dts/sun8i-r16-parrot.dts b/arch/arm/boot/dts/sun8i-r16-parrot.dts
index 6161ec441df5..0588fceb0636 100644
--- a/arch/arm/boot/dts/sun8i-r16-parrot.dts
+++ b/arch/arm/boot/dts/sun8i-r16-parrot.dts
@@ -167,7 +167,6 @@
led_pins_parrot: led_pins at 0 {
allwinner,pins = "PE16", "PE17";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_det: usb0_id_detect_pin at 0 {
@@ -179,7 +178,6 @@
usb1_vbus_pin_parrot: usb1_vbus_pin at 0 {
allwinner,pins = "PD12";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -187,7 +185,6 @@
wifi_reset_pin_parrot: wifi_reset_pin at 0 {
allwinner,pins = "PL6";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
index ae95e5969681..dea852b2a4f3 100644
--- a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
+++ b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
@@ -96,7 +96,6 @@
bl_en_pin: bl_en_pin at 0 {
allwinner,pins = "PH6";
allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin: mmc0_cd_pin at 0 {
@@ -108,7 +107,6 @@
ts_power_pin: ts_power_pin at 0 {
allwinner,pins = "PH1";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
index e1be9fca86c7..e0ae76088f7e 100644
--- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
+++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
@@ -112,7 +112,6 @@
led_pins_cubieboard4: led-pins at 0 {
allwinner,pins = "PH6", "PH17";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_cubieboard4: mmc0_cd_pin at 0 {
diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts
index 0b2f7042bddf..a2e540fc5725 100644
--- a/arch/arm/boot/dts/sun9i-a80-optimus.dts
+++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts
@@ -162,7 +162,6 @@
led_pins_optimus: led-pins at 0 {
allwinner,pins = "PH0", "PH1";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_optimus: mmc0_cd_pin at 0 {
@@ -174,13 +173,11 @@
usb1_vbus_pin_optimus: usb1_vbus_pin at 1 {
allwinner,pins = "PH4";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb3_vbus_pin_optimus: usb3_vbus_pin at 1 {
allwinner,pins = "PH5";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -192,7 +189,6 @@
led_r_pins_optimus: led-pins at 1 {
allwinner,pins = "PM15";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 293b41ac8e37..d03f7481401c 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -688,7 +688,6 @@
i2c3_pins_a: i2c3 at 0 {
allwinner,pins = "PG10", "PG11";
allwinner,function = "i2c3";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_pins: mmc0 {
@@ -696,7 +695,6 @@
"PF4", "PF5";
allwinner,function = "mmc0";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc2_8bit_pins: mmc2_8bit {
@@ -706,19 +704,16 @@
"PC16";
allwinner,function = "mmc2";
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart0_pins_a: uart0 at 0 {
allwinner,pins = "PH12", "PH13";
allwinner,function = "uart0";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
uart4_pins_a: uart4 at 0 {
allwinner,pins = "PG12", "PG13", "PG14", "PG15";
allwinner,function = "uart4";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
@@ -901,7 +896,6 @@
r_ir_pins: r_ir {
allwinner,pins = "PL6";
allwinner,function = "s_cir_rx";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
r_rsb_pins: r_rsb {
diff --git a/arch/arm/boot/dts/sunxi-common-regulators.dtsi b/arch/arm/boot/dts/sunxi-common-regulators.dtsi
index 7809e18d30bd..358b8d9b4703 100644
--- a/arch/arm/boot/dts/sunxi-common-regulators.dtsi
+++ b/arch/arm/boot/dts/sunxi-common-regulators.dtsi
@@ -49,25 +49,21 @@
ahci_pwr_pin_a: ahci_pwr_pin at 0 {
allwinner,pins = "PB8";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb0_vbus_pin_a: usb0_vbus_pin at 0 {
allwinner,pins = "PB9";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb1_vbus_pin_a: usb1_vbus_pin at 0 {
allwinner,pins = "PH6";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb2_vbus_pin_a: usb2_vbus_pin at 0 {
allwinner,pins = "PH3";
allwinner,function = "gpio_out";
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
--
git-series 0.8.10
^ permalink raw reply related
* [PATCH 6/9] dt-bindings: pinctrl: Deprecate sunxi pinctrl bindings
From: Maxime Ripard @ 2016-10-03 10:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.26c6f76b361d146fb079d744251f020ef6d2db7d.1475489558.git-series.maxime.ripard@free-electrons.com>
The generic pin configuration and multiplexing should be preferred now,
even though we still support the old one.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 5 +++++
1 file changed, 5 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
index 69617220c5d6..e8b7cf64fdf1 100644
--- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
@@ -36,6 +36,11 @@ pins it needs, and how they should be configured, with regard to muxer
configuration, drive strength and pullups. If one of these options is
not set, its actual value will be unspecified.
+This driver supports the generic pin multiplexing and configuration
+bindings.
+
+*** Deprecated pin configuration and multiplexing binding
+
Required subnode-properties:
- allwinner,pins: List of strings containing the pin name.
--
git-series 0.8.10
^ permalink raw reply related
* [PATCH 5/9] pinctrl: sunxi: Support generic binding
From: Maxime Ripard @ 2016-10-03 10:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.26c6f76b361d146fb079d744251f020ef6d2db7d.1475489558.git-series.maxime.ripard@free-electrons.com>
Our bindings are mostly irrelevant now that we have generic pinctrl
bindings that cover exactly the same uses cases.
Add support for the new ones, and obviously keep our old binding support in
order to keep the ABI stable.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 48 ++++++++++++++++++++++++++--
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index cec977fcf98c..b52af7f1418a 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -150,18 +150,33 @@ static int sunxi_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
static bool sunxi_pctrl_has_bias_prop(struct device_node *node)
{
- return of_find_property(node, "allwinner,pull", NULL);
+ return of_find_property(node, "bias-pull-up", NULL) ||
+ of_find_property(node, "bias-pull-down", NULL) ||
+ of_find_property(node, "bias-disable", NULL) ||
+ of_find_property(node, "allwinner,pull", NULL);
}
static bool sunxi_pctrl_has_drive_prop(struct device_node *node)
{
- return of_find_property(node, "allwinner,drive", NULL);
+ return of_find_property(node, "drive-strength", NULL) ||
+ of_find_property(node, "allwinner,drive", NULL);
}
static int sunxi_pctrl_parse_bias_prop(struct device_node *node)
{
u32 val;
+ /* Try the new style binding */
+ if (of_find_property(node, "bias-pull-up", NULL))
+ return PIN_CONFIG_BIAS_PULL_UP;
+
+ if (of_find_property(node, "bias-pull-down", NULL))
+ return PIN_CONFIG_BIAS_PULL_DOWN;
+
+ if (of_find_property(node, "bias-disable", NULL))
+ return PIN_CONFIG_BIAS_DISABLE;
+
+ /* And fall back to the old binding */
if (of_property_read_u32(node, "allwinner,pull", &val))
return -EINVAL;
@@ -181,6 +196,21 @@ static int sunxi_pctrl_parse_drive_prop(struct device_node *node)
{
u32 val;
+ /* Try the new style binding */
+ if (!of_property_read_u32(node, "drive-strength", &val)) {
+ /* We can't go below 10mA ... */
+ if (val < 10)
+ return -EINVAL;
+
+ /* ... and only up to 40 mA ... */
+ if (val > 40)
+ val = 40;
+
+ /* by steps of 10 mA */
+ return rounddown(val, 10);
+ }
+
+ /* And then fall back to the old binding */
if (of_property_read_u32(node, "allwinner,drive", &val))
return -EINVAL;
@@ -192,6 +222,12 @@ static const char *sunxi_pctrl_parse_function_prop(struct device_node *node)
const char *function;
int ret;
+ /* Try the generic binding */
+ ret = of_property_read_string(node, "function", &function);
+ if (!ret)
+ return function;
+
+ /* And fall back to our legacy one */
ret = of_property_read_string(node, "allwinner,function", &function);
if (!ret)
return function;
@@ -204,6 +240,14 @@ static const char *sunxi_pctrl_find_pins_prop(struct device_node *node,
{
int count;
+ /* Try the generic binding */
+ count = of_property_count_strings(node, "pins");
+ if (count > 0) {
+ *npins = count;
+ return "pins";
+ }
+
+ /* And fall back to our legacy one */
count = of_property_count_strings(node, "allwinner,pins");
if (count > 0) {
*npins = count;
--
git-series 0.8.10
^ permalink raw reply related
* [PATCH 4/9] pinctrl: sunxi: Deal with configless pins
From: Maxime Ripard @ 2016-10-03 10:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.26c6f76b361d146fb079d744251f020ef6d2db7d.1475489558.git-series.maxime.ripard@free-electrons.com>
Even though the our binding had the assumption that the allwinner,pull and
allwinner,drive properties were optional, the code never took that into
account.
Fix that.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 50 +++++++++++++++++++---------
1 file changed, 35 insertions(+), 15 deletions(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 6f6f1e0011e2..cec977fcf98c 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -218,20 +218,29 @@ static unsigned long *sunxi_pctrl_build_pin_config(struct device_node *node,
{
unsigned long *pinconfig;
unsigned int configlen = 0, idx = 0;
+ int ret;
if (sunxi_pctrl_has_drive_prop(node))
configlen++;
if (sunxi_pctrl_has_bias_prop(node))
configlen++;
+ /*
+ * If we don't have any configuration, bail out
+ */
+ if (!configlen)
+ return NULL;
+
pinconfig = kzalloc(configlen * sizeof(*pinconfig), GFP_KERNEL);
if (!pinconfig)
- return NULL;
+ return ERR_PTR(-ENOMEM);
if (sunxi_pctrl_has_drive_prop(node)) {
int drive = sunxi_pctrl_parse_drive_prop(node);
- if (drive < 0)
+ if (drive < 0) {
+ ret = -EINVAL;
goto err_free;
+ }
pinconfig[idx++] = pinconf_to_config_packed(PIN_CONFIG_DRIVE_STRENGTH,
drive);
@@ -239,8 +248,10 @@ static unsigned long *sunxi_pctrl_build_pin_config(struct device_node *node,
if (sunxi_pctrl_has_bias_prop(node)) {
int pull = sunxi_pctrl_parse_bias_prop(node);
- if (pull < 0)
+ if (pull < 0) {
+ ret = -EINVAL;
goto err_free;
+ }
pinconfig[idx++] = pinconf_to_config_packed(pull, 0);
}
@@ -251,7 +262,7 @@ static unsigned long *sunxi_pctrl_build_pin_config(struct device_node *node,
err_free:
kfree(pinconfig);
- return NULL;
+ return ERR_PTR(ret);
}
static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
@@ -285,7 +296,10 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
/*
* We have two maps for each pin: one for the function, one
- * for the configuration (bias, strength, etc)
+ * for the configuration (bias, strength, etc).
+ *
+ * We might be slightly overshooting, since we might not have
+ * any configuration.
*/
nmaps = npins * 2;
*map = kmalloc(nmaps * sizeof(struct pinctrl_map), GFP_KERNEL);
@@ -293,8 +307,8 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
return -ENOMEM;
pinconfig = sunxi_pctrl_build_pin_config(node, &configlen);
- if (!pinconfig) {
- ret = -EINVAL;
+ if (IS_ERR(pinconfig)) {
+ ret = PTR_ERR(pinconfig);
goto err_free_map;
}
@@ -321,15 +335,16 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
i++;
- (*map)[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
- (*map)[i].data.configs.group_or_pin = group;
- (*map)[i].data.configs.configs = pinconfig;
- (*map)[i].data.configs.num_configs = configlen;
-
- i++;
+ if (pinconfig) {
+ (*map)[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
+ (*map)[i].data.configs.group_or_pin = group;
+ (*map)[i].data.configs.configs = pinconfig;
+ (*map)[i].data.configs.num_configs = configlen;
+ i++;
+ }
}
- *num_maps = nmaps;
+ *num_maps = i;
return 0;
@@ -342,8 +357,13 @@ static void sunxi_pctrl_dt_free_map(struct pinctrl_dev *pctldev,
struct pinctrl_map *map,
unsigned num_maps)
{
+ unsigned long *pinconfig;
+
/* All the maps have the same pin config, free only the first one */
- kfree(map[0].data.configs.configs);
+ pinconfig = map[0].data.configs.configs;
+ if (pinconfig)
+ kfree(pinconfig);
+
kfree(map);
}
--
git-series 0.8.10
^ permalink raw reply related
* [PATCH 3/9] pinctrl: sunxi: Handle bias disable
From: Maxime Ripard @ 2016-10-03 10:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.26c6f76b361d146fb079d744251f020ef6d2db7d.1475489558.git-series.maxime.ripard@free-electrons.com>
So far, putting NO_PULL in allwinner,pull was ignored, behaving like if
that property was not there at all.
Obviously, this is not the right thing to do, and in that case, we really
need to just disable the bias.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 8 ++++++++
1 file changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 5be455d5e252..6f6f1e0011e2 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -166,6 +166,8 @@ static int sunxi_pctrl_parse_bias_prop(struct device_node *node)
return -EINVAL;
switch (val) {
+ case SUN4I_PINCTRL_NO_PULL:
+ return PIN_CONFIG_BIAS_DISABLE;
case SUN4I_PINCTRL_PULL_UP:
return PIN_CONFIG_BIAS_PULL_UP;
case SUN4I_PINCTRL_PULL_DOWN:
@@ -402,6 +404,12 @@ static int sunxi_pconf_group_set(struct pinctrl_dev *pctldev,
| dlevel << sunxi_dlevel_offset(pin),
pctl->membase + sunxi_dlevel_reg(pin));
break;
+ case PIN_CONFIG_BIAS_DISABLE:
+ val = readl(pctl->membase + sunxi_pull_reg(pin));
+ mask = PULL_PINS_MASK << sunxi_pull_offset(pin);
+ writel((val & ~mask),
+ pctl->membase + sunxi_pull_reg(pin));
+ break;
case PIN_CONFIG_BIAS_PULL_UP:
val = readl(pctl->membase + sunxi_pull_reg(pin));
mask = PULL_PINS_MASK << sunxi_pull_offset(pin);
--
git-series 0.8.10
^ permalink raw reply related
* [PATCH 2/9] pinctrl: sunxi: Add bindings define
From: Maxime Ripard @ 2016-10-03 10:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.26c6f76b361d146fb079d744251f020ef6d2db7d.1475489558.git-series.maxime.ripard@free-electrons.com>
Since we have some bindings header for our hardcoded flags, let's use them
when we can.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 64f7f6dcc027..5be455d5e252 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -28,6 +28,8 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
#include "../core.h"
#include "../../gpio/gpiolib.h"
#include "pinctrl-sunxi.h"
@@ -164,9 +166,9 @@ static int sunxi_pctrl_parse_bias_prop(struct device_node *node)
return -EINVAL;
switch (val) {
- case 1:
+ case SUN4I_PINCTRL_PULL_UP:
return PIN_CONFIG_BIAS_PULL_UP;
- case 2:
+ case SUN4I_PINCTRL_PULL_DOWN:
return PIN_CONFIG_BIAS_PULL_DOWN;
}
--
git-series 0.8.10
^ permalink raw reply related
* [PATCH 1/9] pinctrl: sunxi: Rework the pin config building code
From: Maxime Ripard @ 2016-10-03 10:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.26c6f76b361d146fb079d744251f020ef6d2db7d.1475489558.git-series.maxime.ripard@free-electrons.com>
In order to support more easily the generic pinctrl properties, rework the
pinctrl maps configuration and split it into several sub-functions.
One of the side-effects from that rework is that we only parse the pin
configuration once, since it's going to be common to every pin, instead of
having to parsing once for each pin.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 178 +++++++++++++++++++--------
1 file changed, 130 insertions(+), 48 deletions(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 54455af566ec..64f7f6dcc027 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -146,6 +146,110 @@ static int sunxi_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
return 0;
}
+static bool sunxi_pctrl_has_bias_prop(struct device_node *node)
+{
+ return of_find_property(node, "allwinner,pull", NULL);
+}
+
+static bool sunxi_pctrl_has_drive_prop(struct device_node *node)
+{
+ return of_find_property(node, "allwinner,drive", NULL);
+}
+
+static int sunxi_pctrl_parse_bias_prop(struct device_node *node)
+{
+ u32 val;
+
+ if (of_property_read_u32(node, "allwinner,pull", &val))
+ return -EINVAL;
+
+ switch (val) {
+ case 1:
+ return PIN_CONFIG_BIAS_PULL_UP;
+ case 2:
+ return PIN_CONFIG_BIAS_PULL_DOWN;
+ }
+
+ return -EINVAL;
+}
+
+static int sunxi_pctrl_parse_drive_prop(struct device_node *node)
+{
+ u32 val;
+
+ if (of_property_read_u32(node, "allwinner,drive", &val))
+ return -EINVAL;
+
+ return (val + 1) * 10;
+}
+
+static const char *sunxi_pctrl_parse_function_prop(struct device_node *node)
+{
+ const char *function;
+ int ret;
+
+ ret = of_property_read_string(node, "allwinner,function", &function);
+ if (!ret)
+ return function;
+
+ return NULL;
+}
+
+static const char *sunxi_pctrl_find_pins_prop(struct device_node *node,
+ int *npins)
+{
+ int count;
+
+ count = of_property_count_strings(node, "allwinner,pins");
+ if (count > 0) {
+ *npins = count;
+ return "allwinner,pins";
+ }
+
+ return NULL;
+}
+
+static unsigned long *sunxi_pctrl_build_pin_config(struct device_node *node,
+ unsigned int *len)
+{
+ unsigned long *pinconfig;
+ unsigned int configlen = 0, idx = 0;
+
+ if (sunxi_pctrl_has_drive_prop(node))
+ configlen++;
+ if (sunxi_pctrl_has_bias_prop(node))
+ configlen++;
+
+ pinconfig = kzalloc(configlen * sizeof(*pinconfig), GFP_KERNEL);
+ if (!pinconfig)
+ return NULL;
+
+ if (sunxi_pctrl_has_drive_prop(node)) {
+ int drive = sunxi_pctrl_parse_drive_prop(node);
+ if (drive < 0)
+ goto err_free;
+
+ pinconfig[idx++] = pinconf_to_config_packed(PIN_CONFIG_DRIVE_STRENGTH,
+ drive);
+ }
+
+ if (sunxi_pctrl_has_bias_prop(node)) {
+ int pull = sunxi_pctrl_parse_bias_prop(node);
+ if (pull < 0)
+ goto err_free;
+
+ pinconfig[idx++] = pinconf_to_config_packed(pull, 0);
+ }
+
+
+ *len = configlen;
+ return pinconfig;
+
+err_free:
+ kfree(pinconfig);
+ return NULL;
+}
+
static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
struct device_node *node,
struct pinctrl_map **map,
@@ -154,38 +258,45 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
unsigned long *pinconfig;
struct property *prop;
- const char *function;
+ const char *function, *pin_prop;
const char *group;
- int ret, nmaps, i = 0;
- u32 val;
+ int ret, npins, nmaps, configlen = 0, i = 0;
*map = NULL;
*num_maps = 0;
- ret = of_property_read_string(node, "allwinner,function", &function);
- if (ret) {
- dev_err(pctl->dev,
- "missing allwinner,function property in node %s\n",
+ function = sunxi_pctrl_parse_function_prop(node);
+ if (!function) {
+ dev_err(pctl->dev, "missing function property in node %s\n",
node->name);
return -EINVAL;
}
- nmaps = of_property_count_strings(node, "allwinner,pins") * 2;
- if (nmaps < 0) {
- dev_err(pctl->dev,
- "missing allwinner,pins property in node %s\n",
+ pin_prop = sunxi_pctrl_find_pins_prop(node, &npins);
+ if (!pin_prop) {
+ dev_err(pctl->dev, "missing pins property in node %s\n",
node->name);
return -EINVAL;
}
+ /*
+ * We have two maps for each pin: one for the function, one
+ * for the configuration (bias, strength, etc)
+ */
+ nmaps = npins * 2;
*map = kmalloc(nmaps * sizeof(struct pinctrl_map), GFP_KERNEL);
if (!*map)
return -ENOMEM;
- of_property_for_each_string(node, "allwinner,pins", prop, group) {
+ pinconfig = sunxi_pctrl_build_pin_config(node, &configlen);
+ if (!pinconfig) {
+ ret = -EINVAL;
+ goto err_free_map;
+ }
+
+ of_property_for_each_string(node, pin_prop, prop, group) {
struct sunxi_pinctrl_group *grp =
sunxi_pinctrl_find_group_by_name(pctl, group);
- int j = 0, configlen = 0;
if (!grp) {
dev_err(pctl->dev, "unknown pin %s", group);
@@ -208,34 +319,6 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
(*map)[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
(*map)[i].data.configs.group_or_pin = group;
-
- if (of_find_property(node, "allwinner,drive", NULL))
- configlen++;
- if (of_find_property(node, "allwinner,pull", NULL))
- configlen++;
-
- pinconfig = kzalloc(configlen * sizeof(*pinconfig), GFP_KERNEL);
- if (!pinconfig) {
- kfree(*map);
- return -ENOMEM;
- }
-
- if (!of_property_read_u32(node, "allwinner,drive", &val)) {
- u16 strength = (val + 1) * 10;
- pinconfig[j++] =
- pinconf_to_config_packed(PIN_CONFIG_DRIVE_STRENGTH,
- strength);
- }
-
- if (!of_property_read_u32(node, "allwinner,pull", &val)) {
- enum pin_config_param pull = PIN_CONFIG_END;
- if (val == 1)
- pull = PIN_CONFIG_BIAS_PULL_UP;
- else if (val == 2)
- pull = PIN_CONFIG_BIAS_PULL_DOWN;
- pinconfig[j++] = pinconf_to_config_packed(pull, 0);
- }
-
(*map)[i].data.configs.configs = pinconfig;
(*map)[i].data.configs.num_configs = configlen;
@@ -245,19 +328,18 @@ static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
*num_maps = nmaps;
return 0;
+
+err_free_map:
+ kfree(map);
+ return ret;
}
static void sunxi_pctrl_dt_free_map(struct pinctrl_dev *pctldev,
struct pinctrl_map *map,
unsigned num_maps)
{
- int i;
-
- for (i = 0; i < num_maps; i++) {
- if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
- kfree(map[i].data.configs.configs);
- }
-
+ /* All the maps have the same pin config, free only the first one */
+ kfree(map[0].data.configs.configs);
kfree(map);
}
--
git-series 0.8.10
^ permalink raw reply related
* [PATCH 0/9] pinctrl: sunxi: Generic bindings rework
From: Maxime Ripard @ 2016-10-03 10:20 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
This patch set reworks the Allwinner pinctrl driver to support the generic
pin configuration and multiplexing bindings.
In the process, we also covered some lasting issues that were found: we
were ignoring the case where no pull-up was set, and while our binding was
saying that the allwinner,drive and allwinner,pull properties were
optional, the code was not able to deal with the case where they were not
present.
Maxime Ripard (9):
pinctrl: sunxi: Rework the pin config building code
pinctrl: sunxi: Add bindings define
pinctrl: sunxi: Handle bias disable
pinctrl: sunxi: Deal with configless pins
pinctrl: sunxi: Support generic binding
dt-bindings: pinctrl: Deprecate sunxi pinctrl bindings
ARM: sunxi: Remove useless allwinner,drive property
ARM: sunxi: Remove useless allwinner,pull property
ARM: sunxi: Convert pinctrl nodes to generic bindings
Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 5 +-
arch/arm/boot/dts/ntc-gr8-evb.dts | 24 ++----
arch/arm/boot/dts/ntc-gr8.dtsi | 104 +++++++++------------------
arch/arm/boot/dts/sun4i-a10-a1000.dts | 12 +--
arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts | 14 +---
arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 14 +---
arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts | 38 +++-------
arch/arm/boot/dts/sun4i-a10-gemei-g9.dts | 6 +--
arch/arm/boot/dts/sun4i-a10-hackberry.dts | 12 +--
arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts | 16 +---
arch/arm/boot/dts/sun4i-a10-inet1.dts | 26 ++-----
arch/arm/boot/dts/sun4i-a10-inet97fv2.dts | 14 +---
arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts | 29 +++-----
arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts | 12 +--
arch/arm/boot/dts/sun4i-a10-marsboard.dts | 13 +--
arch/arm/boot/dts/sun4i-a10-mini-xplus.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-mk802.dts | 18 +----
arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 27 ++-----
arch/arm/boot/dts/sun4i-a10-pcduino.dts | 19 +----
arch/arm/boot/dts/sun4i-a10-pcduino2.dts | 6 +--
arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts | 32 +++-----
arch/arm/boot/dts/sun4i-a10.dtsi | 169 +++++++++++++++-----------------------------
arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts | 18 ++---
arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts | 29 +++-----
arch/arm/boot/dts/sun5i-a10s-mk802.dts | 19 +----
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 36 +++------
arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts | 20 ++---
arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts | 21 +----
arch/arm/boot/dts/sun5i-a10s.dtsi | 61 ++++++----------
arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts | 23 ++----
arch/arm/boot/dts/sun5i-a13-hsg-h702.dts | 22 ++----
arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts | 40 ++++------
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 36 +++------
arch/arm/boot/dts/sun5i-a13-utoo-p66.dts | 17 +---
arch/arm/boot/dts/sun5i-a13.dtsi | 24 ++----
arch/arm/boot/dts/sun5i-r8-chip.dts | 12 +--
arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi | 33 +++------
arch/arm/boot/dts/sun5i.dtsi | 57 +++++----------
arch/arm/boot/dts/sun6i-a31-app4-evb1.dts | 6 +--
arch/arm/boot/dts/sun6i-a31-colombus.dts | 22 ++----
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 23 ++----
arch/arm/boot/dts/sun6i-a31-i7.dts | 19 +----
arch/arm/boot/dts/sun6i-a31-m9.dts | 19 +----
arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts | 19 +----
arch/arm/boot/dts/sun6i-a31.dtsi | 136 ++++++++++++++---------------------
arch/arm/boot/dts/sun6i-a31s-primo81.dts | 20 ++---
arch/arm/boot/dts/sun6i-a31s-sina31s.dts | 13 +--
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 29 +++-----
arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts | 9 +--
arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi | 14 +---
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 27 ++-----
arch/arm/boot/dts/sun7i-a20-bananapi.dts | 26 ++-----
arch/arm/boot/dts/sun7i-a20-bananapro.dts | 37 +++-------
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 13 +--
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 38 +++-------
arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 24 ++----
arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts | 26 ++-----
arch/arm/boot/dts/sun7i-a20-itead-ibox.dts | 7 +--
arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts | 30 +++-----
arch/arm/boot/dts/sun7i-a20-m3.dts | 6 +--
arch/arm/boot/dts/sun7i-a20-mk808c.dts | 12 +--
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 32 +++-----
arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts | 27 ++-----
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts | 6 +--
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 33 +++------
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 28 +++----
arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts | 45 ++++--------
arch/arm/boot/dts/sun7i-a20-orangepi.dts | 38 +++-------
arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts | 25 ++----
arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 21 +----
arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts | 25 ++----
arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts | 13 +--
arch/arm/boot/dts/sun7i-a20.dtsi | 277 ++++++++++++++++++++++++++----------------------------------------------
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 95 ++++++++++---------------
arch/arm/boot/dts/sun8i-a23-evb.dts | 7 +--
arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts | 8 +--
arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts | 8 +--
arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts | 9 +--
arch/arm/boot/dts/sun8i-a33-olinuxino.dts | 18 +----
arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 11 +--
arch/arm/boot/dts/sun8i-a33.dtsi | 6 +--
arch/arm/boot/dts/sun8i-a83t.dtsi | 21 +----
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 18 +----
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 12 +--
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 26 ++-----
arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 18 +----
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 18 +----
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 4 +-
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 18 +----
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 10 +--
arch/arm/boot/dts/sun8i-h3.dtsi | 92 +++++++++---------------
arch/arm/boot/dts/sun8i-q8-common.dtsi | 9 +--
arch/arm/boot/dts/sun8i-r16-parrot.dts | 36 +++------
arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi | 26 ++-----
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 15 +---
arch/arm/boot/dts/sun9i-a80-optimus.dts | 33 +++------
arch/arm/boot/dts/sun9i-a80.dtsi | 54 +++++---------
arch/arm/boot/dts/sunxi-common-regulators.dtsi | 24 ++----
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 260 ++++++++++++++++++++++++++++++++++++++++++++++++++++++--------------
100 files changed, 1290 insertions(+), 1793 deletions(-)
--
git-series 0.8.10
^ permalink raw reply
* [PATCH] ARM: dts: rockchip: Reserve unusable memory region on rk3066
From: Mark Rutland @ 2016-10-03 10:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <6962779.A926KxJite@phil>
On Sat, Oct 01, 2016 at 09:18:15PM +0200, Heiko Stuebner wrote:
> Am Samstag, 1. Oktober 2016, 19:17:11 CEST schrieb Mark Rutland:
> > On Sat, Oct 01, 2016 at 04:09:39PM +0200, =?UTF-8?q?Pawe=C5=82=20Jarosz?=
> wrote:
> > > For some reason accessing memory region above 0xfe000000 freezes
> > > system on rk3066. There is similiar bug on later rockchip soc (rk3288)
> > > solved same way.
[...]
> > > + reserved-memory {
> > > + #address-cells = <1>;
> > > + #size-cells = <1>;
> > > + ranges;
> > > + /*
> > > + * The rk3066 cannot use the memory area above 0x9F000000
> > > + * for some unknown reason.
> > > + */
> > > + unusable at 9F000000 {
> > > + reg = <0x9F000000 0x1000000>;
> > > + };
> >
> > I don't think this is a sane workaround, but it is at best difficult to
> > tell, given there's no reason given for why this memory is unusable.
> >
> > For instance, if bus accesses to this address hang, then this patch only
> > makes the hand less likely, since the kernel will still map the region (and
> > therefore the CPU can perform speculative accesses).
> >
> > Are issues with this memory consistently seen in practice?
> >
> > Can you enable CONFIG_MEMTEST and pass 'memtest' to the kernel, to determine
> > if the memory is returning erroneous values?
>
> just for the sake of completeness, on the rk3288 the issue was the dma not
> being able to access the specific memory region (interestingly also the last
> 16MB but of the 4GB area supported on the rk3288). So memory itself was ok,
> just dma access to it failed.
How odd.
> We didn't find any other sane solution to limit the dma access in a general way
> at the time, so opted for just blocking the memory region (as it was similarly
> only
I was under the impression that dma-ranges could describe this kind of
DMA addressing limitation. Was there some problem with that? Perhaps the
driver is not acquiring/configuring its mask correctly?
Thanks,
Mark.
^ permalink raw reply
* [RESEND PATCH] ARM: dts: pxa2xx: Specify all interrupts for the GPIO controller.
From: Vijay Kumar B @ 2016-10-03 10:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475489412-9758-1-git-send-email-vijaykumar@zilogic.com>
The PXA GPIO controller has 3 interrupt outputs, this needs to be
indicated in the DTS file. Without this mainstone's CPLD interrupt 0
will not be raised to the processor.
Signed-off-by: Vijay Kumar B. <vijaykumar@zilogic.com>
Reviewed-by: Deepak S. <deepak@zilogic.com>
---
arch/arm/boot/dts/pxa2xx.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/pxa2xx.dtsi b/arch/arm/boot/dts/pxa2xx.dtsi
index 5e5af07..9ca2e5b 100644
--- a/arch/arm/boot/dts/pxa2xx.dtsi
+++ b/arch/arm/boot/dts/pxa2xx.dtsi
@@ -54,8 +54,8 @@
reg = <0x40e00000 0x10000>;
gpio-controller;
#gpio-cells = <0x2>;
- interrupts = <10>;
- interrupt-names = "gpio_mux";
+ interrupts = <8 9 10>;
+ interrupt-names = "gpio0", "gpio1", "gpio_mux";
interrupt-controller;
#interrupt-cells = <0x2>;
ranges;
--
2.1.4
^ permalink raw reply related
* [PATCH] Specify all interrupts for the GPIO controller.
From: Vijay Kumar B @ 2016-10-03 10:10 UTC (permalink / raw)
To: linux-arm-kernel
The PXA GPIO controller has 3 interrupt outputs, this needs to be
indicated in the DTS file. Without this mainstone's CPLD interrupt 0
will not be raised to the processor.
Signed-off-by: Vijay Kumar B. <vijaykumar@zilogic.com>
Reviewed-by: Deepak S. <deepak@zilogic.com>
---
arch/arm/boot/dts/pxa2xx.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/pxa2xx.dtsi b/arch/arm/boot/dts/pxa2xx.dtsi
index 5e5af07..9ca2e5b 100644
--- a/arch/arm/boot/dts/pxa2xx.dtsi
+++ b/arch/arm/boot/dts/pxa2xx.dtsi
@@ -54,8 +54,8 @@
reg = <0x40e00000 0x10000>;
gpio-controller;
#gpio-cells = <0x2>;
- interrupts = <10>;
- interrupt-names = "gpio_mux";
+ interrupts = <8 9 10>;
+ interrupt-names = "gpio0", "gpio1", "gpio_mux";
interrupt-controller;
#interrupt-cells = <0x2>;
ranges;
--
2.1.4
^ permalink raw reply related
* [RFC 05/11] iommu/dma: iommu_dma_(un)map_mixed
From: Auger Eric @ 2016-10-03 9:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1b1b30b3-4199-9e18-362c-b8bc9d45277d@arm.com>
Hi Robin,
On 30/09/2016 15:24, Robin Murphy wrote:
> Hi Eric,
>
> On 27/09/16 21:48, Eric Auger wrote:
>> iommu_dma_map_mixed and iommu_dma_unmap_mixed operate on
>> IOMMU_DOMAIN_MIXED typed domains. On top of standard iommu_map/unmap
>> they reserve the IOVA window to prevent the iova allocator to
>> allocate in those areas.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> ---
>> drivers/iommu/dma-iommu.c | 48 +++++++++++++++++++++++++++++++++++++++++++++++
>> include/linux/dma-iommu.h | 18 ++++++++++++++++++
>> 2 files changed, 66 insertions(+)
>>
>> diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c
>> index 04bbc85..db21143 100644
>> --- a/drivers/iommu/dma-iommu.c
>> +++ b/drivers/iommu/dma-iommu.c
>> @@ -759,3 +759,51 @@ int iommu_get_dma_msi_region_cookie(struct iommu_domain *domain,
>> return 0;
>> }
>> EXPORT_SYMBOL(iommu_get_dma_msi_region_cookie);
>> +
>> +int iommu_dma_map_mixed(struct iommu_domain *domain, unsigned long iova,
>> + phys_addr_t paddr, size_t size, int prot)
>> +{
>> + struct iova_domain *iovad;
>> + unsigned long lo, hi;
>> + int ret;
>> +
>> + if (domain->type != IOMMU_DOMAIN_MIXED)
>> + return -EINVAL;
>> +
>> + if (!domain->iova_cookie)
>> + return -EINVAL;
>> +
>> + iovad = cookie_iovad(domain);
>> +
>> + lo = iova_pfn(iovad, iova);
>> + hi = iova_pfn(iovad, iova + size - 1);
>> + reserve_iova(iovad, lo, hi);
>
> This can't work reliably - reserve_iova() will (for good reason) merge
> any adjacent or overlapping entries, so any unmap is liable to free more
> IOVA space than actually gets unmapped, and things will get subtly out
> of sync and go wrong later.
OK. I did not notice that.
>
> The more general issue with this whole approach, though, is that it
> effectively rules out userspace doing guest memory hotplug or similar,
> and I'm not we want to paint ourselves into that corner. Basically, as
> soon as a device is attached to a guest, the entirety of the unallocated
> IPA space becomes reserved, and userspace can never add anything further
> to it, because any given address *might* be in use for an MSI mapping.
I fully agree. My bad, I mixed up about how/when the PCI MMIO space was
iommu mapped. So we don't have any other solution than having the guest
providing unused and non reserved GPA. Back to the original approach then.
>
> I think it still makes most sense to stick with the original approach of
> cooperating with userspace to reserve a bounded area - it's just that we
> can then let automatic mapping take care of itself within that area.
OK will respin asap.
>
> Speaking of which, I've realised the same fundamental reservation
> problem already applies to PCI without ACS, regardless of MSIs. I just
> tried on my Juno with guest memory placed at 0x4000000000, (i.e.
> matching the host PA of the 64-bit PCI window), and sure enough when the
> guest kicks off some DMA on the passed-through NIC, the root complex
> interprets the guest IPA as (unsupported) peer-to-peer DMA to a BAR
> claimed by the video card, and it fails. I guess this doesn't get hit in
> practice on x86 because the guest memory map is unlikely to be much
> different from the host's.
>
> It seems like we basically need a general way of communicating fixed and
> movable host reservations to userspace :/
Yes I saw "iommu/dma: Avoid PCI host bridge windows". Well this looks
like a generalisation of the MSI geometry issue (they also face this one
on x86 with a non x86 guest). This will also hit the fact that on QEMU
the ARM guest memory map is static.
Thank you for your time
Best Regards
Eric
>
> Robin.
>
>> + ret = iommu_map(domain, iova, paddr, size, prot);
>> + if (ret)
>> + free_iova(iovad, lo);
>> + return ret;
>> +}
>> +EXPORT_SYMBOL(iommu_dma_map_mixed);
>> +
>> +size_t iommu_dma_unmap_mixed(struct iommu_domain *domain, unsigned long iova,
>> + size_t size)
>> +{
>> + struct iova_domain *iovad;
>> + unsigned long lo;
>> + size_t ret;
>> +
>> + if (domain->type != IOMMU_DOMAIN_MIXED)
>> + return -EINVAL;
>> +
>> + if (!domain->iova_cookie)
>> + return -EINVAL;
>> +
>> + iovad = cookie_iovad(domain);
>> + lo = iova_pfn(iovad, iova);
>> +
>> + ret = iommu_unmap(domain, iova, size);
>> + if (ret == size)
>> + free_iova(iovad, lo);
>> + return ret;
>> +}
>> +EXPORT_SYMBOL(iommu_dma_unmap_mixed);
>> diff --git a/include/linux/dma-iommu.h b/include/linux/dma-iommu.h
>> index 1c55413..f2aa855 100644
>> --- a/include/linux/dma-iommu.h
>> +++ b/include/linux/dma-iommu.h
>> @@ -70,6 +70,12 @@ void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg);
>> int iommu_get_dma_msi_region_cookie(struct iommu_domain *domain,
>> dma_addr_t base, u64 size);
>>
>> +int iommu_dma_map_mixed(struct iommu_domain *domain, unsigned long iova,
>> + phys_addr_t paddr, size_t size, int prot);
>> +
>> +size_t iommu_dma_unmap_mixed(struct iommu_domain *domain, unsigned long iova,
>> + size_t size);
>> +
>> #else
>>
>> struct iommu_domain;
>> @@ -99,6 +105,18 @@ static inline int iommu_get_dma_msi_region_cookie(struct iommu_domain *domain,
>> return -ENODEV;
>> }
>>
>> +int iommu_dma_map_mixed(struct iommu_domain *domain, unsigned long iova,
>> + phys_addr_t paddr, size_t size, int prot)
>> +{
>> + return -ENODEV;
>> +}
>> +
>> +size_t iommu_dma_unmap_mixed(struct iommu_domain *domain, unsigned long iova,
>> + size_t size)
>> +{
>> + return -ENODEV;
>> +}
>> +
>> #endif /* CONFIG_IOMMU_DMA */
>> #endif /* __KERNEL__ */
>> #endif /* __DMA_IOMMU_H */
>>
>
> --
> To unsubscribe from this list: send the line "unsubscribe kvm" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* [PATCH] drm/mediatek: fix a typo
From: Matthias Brugger @ 2016-10-03 8:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475205119.13345.6.camel@mtksdaap41>
On 30/09/16 05:11, Bibby Hsieh wrote:
> On Thu, 2016-09-29 at 10:46 +0200, Matthias Brugger wrote:
>>
>> On 29/09/16 06:01, CK Hu wrote:
>>> Acked-by: CK Hu <ck.hu@mediatek.com>
>>>
>>> On Thu, 2016-09-29 at 11:22 +0800, Bibby Hsieh wrote:
>>>> Fix the typo: OD_RELAYMODE->OD_CFG
>>>>
>>
>
> Hi, Matthias
> Thanks for your reply.
>
>> Although it is quite clear what the patch does, could you write one
>> sentence to explain what it does. Maybe explain even which effect it
>> has, which error get fixed etc.
>
> Ok, I will do that.
>
>> As we are getting public available boards now, we should take more care
>> about fixes. If you have a fix for a commit introduced in an earlier
>> version of linux and it should be fixed for this version as well (e.g.
>> v4.6 does have the feature but it does not work correctly) then please
>> add these two lines before your Signed-off-by:
>> Fixes: <commit-hash> ("<commit subject line>")
>> Cc: stable at vger.kernel.org # v4.6+
>>
>> Where v4.6+ stands for the oldest version where this should get fixed.
>>
>
> Ok, but the patch hasn't been merged into v4.8 (just in drm-next [1] and
> linux-next [2]), how can I mark that?
>
If the commit get's into v4.9 then make sure that this patch get's
merged into the fixes for v4.9 by the corresponding maintainer.
Regards,
Matthias
> [1]
> https://cgit.freedesktop.org/~airlied/linux/commit/?h=drm-next&id=7216436420414144646f5d8343d061355fd23483
> [2]
> https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/?id=7216436420414144646f5d8343d061355fd23483
>
>
>> Thanks a lot,
>> Matthias
>>
>>>> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
>>>> ---
>>>> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +-
>>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
>>>> index df33b3c..aa5f20f 100644
>>>> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
>>>> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
>>>> @@ -123,7 +123,7 @@ static void mtk_od_config(struct mtk_ddp_comp *comp, unsigned int w,
>>>> unsigned int bpc)
>>>> {
>>>> writel(w << 16 | h, comp->regs + DISP_OD_SIZE);
>>>> - writel(OD_RELAYMODE, comp->regs + OD_RELAYMODE);
>>>> + writel(OD_RELAYMODE, comp->regs + OD_CFG);
>>>> mtk_dither_set(comp, bpc, DISP_OD_CFG);
>>>> }
>>>>
>>>
>>>
>
^ permalink raw reply
* [PATCH v3 9/9] arm64: dts: add Pine64 support
From: Maxime Ripard @ 2016-10-03 8:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161003080913.24197-1-maxime.ripard@free-electrons.com>
From: Andre Przywara <andre.przywara@arm.com>
The Pine64 is a cost-efficient development board based on the
Allwinner A64 SoC.
There are three models: the basic version with Fast Ethernet and
512 MB of DRAM (Pine64) and two Pine64+ versions, which both
feature Gigabit Ethernet and additional connectors for touchscreens
and a camera. Or as my son put it: "Those are smaller and these are
missing." ;-)
The two Pine64+ models just differ in the amount of DRAM
(1GB vs. 2GB). Since U-Boot will figure out the right size for us and
patches the DT accordingly we just need to provide one DT for the
Pine64+.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[Maxime: Removed the common DTSI and include directly the pine64 DTS]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm64/boot/dts/Makefile | 1 +
arch/arm64/boot/dts/allwinner/Makefile | 5 ++
.../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 50 +++++++++++
.../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 74 +++++++++++++++++
include/dt-bindings/reset/sun50i-a64-ccu.h | 97 +++++++++++-----------
5 files changed, 179 insertions(+), 48 deletions(-)
create mode 100644 arch/arm64/boot/dts/allwinner/Makefile
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 6e199c903676..ddcbf5a2c17e 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -1,4 +1,5 @@
dts-dirs += al
+dts-dirs += allwinner
dts-dirs += altera
dts-dirs += amd
dts-dirs += amlogic
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
new file mode 100644
index 000000000000..1e29a5ae8282
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
+
+always := $(dtb-y)
+subdir-y := $(dts-dirs)
+clean-files := *.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
new file mode 100644
index 000000000000..790d14daaa6a
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "sun50i-a64-pine64.dts"
+
+/ {
+ model = "Pine64+";
+ compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
+
+ /* TODO: Camera, Ethernet PHY, touchscreen, etc. */
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
new file mode 100644
index 000000000000..9f127b3d0e33
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+/ {
+ model = "Pine64";
+ compatible = "pine64,pine64", "allwinner,sun50i-a64";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "okay";
+};
+
+&i2c1_pins {
+ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+};
diff --git a/include/dt-bindings/reset/sun50i-a64-ccu.h b/include/dt-bindings/reset/sun50i-a64-ccu.h
index e61fac294d73..db60b29ddb11 100644
--- a/include/dt-bindings/reset/sun50i-a64-ccu.h
+++ b/include/dt-bindings/reset/sun50i-a64-ccu.h
@@ -46,52 +46,53 @@
#define RST_USB_PHY0 0
#define RST_USB_PHY1 1
#define RST_USB_HSIC 2
-#define RST_MBUS 3
-#define RST_BUS_MIPI_DSI 4
-#define RST_BUS_CE 5
-#define RST_BUS_DMA 6
-#define RST_BUS_MMC0 7
-#define RST_BUS_MMC1 8
-#define RST_BUS_MMC2 9
-#define RST_BUS_NAND 10
-#define RST_BUS_DRAM 11
-#define RST_BUS_EMAC 12
-#define RST_BUS_TS 13
-#define RST_BUS_HSTIMER 14
-#define RST_BUS_SPI0 15
-#define RST_BUS_SPI1 16
-#define RST_BUS_OTG 17
-#define RST_BUS_EHCI0 18
-#define RST_BUS_EHCI1 19
-#define RST_BUS_OHCI0 20
-#define RST_BUS_OHCI1 21
-#define RST_BUS_VE 22
-#define RST_BUS_TCON0 23
-#define RST_BUS_TCON1 24
-#define RST_BUS_DEINTERLACE 25
-#define RST_BUS_CSI 26
-#define RST_BUS_HDMI0 27
-#define RST_BUS_HDMI1 28
-#define RST_BUS_DE 29
-#define RST_BUS_GPU 30
-#define RST_BUS_MSGBOX 31
-#define RST_BUS_SPINLOCK 32
-#define RST_BUS_DBG 33
-#define RST_BUS_LVDS 34
-#define RST_BUS_CODEC 35
-#define RST_BUS_SPDIF 36
-#define RST_BUS_THS 37
-#define RST_BUS_I2S0 38
-#define RST_BUS_I2S1 39
-#define RST_BUS_I2S2 40
-#define RST_BUS_I2C0 41
-#define RST_BUS_I2C1 42
-#define RST_BUS_I2C2 43
-#define RST_BUS_SCR 44
-#define RST_BUS_UART0 45
-#define RST_BUS_UART1 46
-#define RST_BUS_UART2 47
-#define RST_BUS_UART3 48
-#define RST_BUS_UART4 49
+#define RST_DRAM 3
+#define RST_MBUS 4
+#define RST_BUS_MIPI_DSI 5
+#define RST_BUS_CE 6
+#define RST_BUS_DMA 7
+#define RST_BUS_MMC0 8
+#define RST_BUS_MMC1 9
+#define RST_BUS_MMC2 10
+#define RST_BUS_NAND 11
+#define RST_BUS_DRAM 12
+#define RST_BUS_EMAC 13
+#define RST_BUS_TS 14
+#define RST_BUS_HSTIMER 15
+#define RST_BUS_SPI0 16
+#define RST_BUS_SPI1 17
+#define RST_BUS_OTG 18
+#define RST_BUS_EHCI0 19
+#define RST_BUS_EHCI1 20
+#define RST_BUS_OHCI0 21
+#define RST_BUS_OHCI1 22
+#define RST_BUS_VE 23
+#define RST_BUS_TCON0 24
+#define RST_BUS_TCON1 25
+#define RST_BUS_DEINTERLACE 26
+#define RST_BUS_CSI 27
+#define RST_BUS_HDMI0 28
+#define RST_BUS_HDMI1 29
+#define RST_BUS_DE 30
+#define RST_BUS_GPU 31
+#define RST_BUS_MSGBOX 32
+#define RST_BUS_SPINLOCK 33
+#define RST_BUS_DBG 34
+#define RST_BUS_LVDS 35
+#define RST_BUS_CODEC 36
+#define RST_BUS_SPDIF 37
+#define RST_BUS_THS 38
+#define RST_BUS_I2S0 39
+#define RST_BUS_I2S1 40
+#define RST_BUS_I2S2 41
+#define RST_BUS_I2C0 42
+#define RST_BUS_I2C1 43
+#define RST_BUS_I2C2 44
+#define RST_BUS_SCR 45
+#define RST_BUS_UART0 46
+#define RST_BUS_UART1 47
+#define RST_BUS_UART2 48
+#define RST_BUS_UART3 49
+#define RST_BUS_UART4 50
-#endif /* _DT_BINDINGS_RST_SUN8I_H3_H_ */
+#endif /* _DT_BINDINGS_RST_SUN50I_A64_H_ */
--
2.9.3
^ permalink raw reply related
* [PATCH v3 8/9] Documentation: devicetree: add vendor prefix for Pine64
From: Maxime Ripard @ 2016-10-03 8:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161003080913.24197-1-maxime.ripard@free-electrons.com>
From: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
[Maxime: Change title prefix to match the usual style]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 7b6bda3b4189..3dd1d77c1c30 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -200,6 +200,7 @@ parade Parade Technologies Inc.
pericom Pericom Technology Inc.
phytec PHYTEC Messtechnik GmbH
picochip Picochip Ltd
+pine64 Pine64
plathome Plat'Home Co., Ltd.
plda PLDA
pixcir PIXCIR MICROELECTRONICS Co., Ltd
--
2.9.3
^ permalink raw reply related
* [PATCH v3 7/9] arm64: dts: add Allwinner A64 SoC .dtsi
From: Maxime Ripard @ 2016-10-03 8:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161003080913.24197-1-maxime.ripard@free-electrons.com>
From: Andre Przywara <andre.przywara@arm.com>
The Allwinner A64 SoC is a low-cost chip with 4 ARM Cortex-A53 cores
and the typical tablet / TV box peripherals.
The SoC is based on the (32-bit) Allwinner H3 chip, sharing most of
the peripherals and the memory map.
Although the cores are proper 64-bit ones, the whole SoC is actually
limited to 4GB (including all the supported DRAM), so we use 32-bit
address and size cells. This has the nice feature of us being able to
reuse the DT for 32-bit kernels as well.
This .dtsi lists the hardware that we support so far.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
[Maxime: Convert to CCU binding, drop the MMC support for now]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
Documentation/devicetree/bindings/arm/sunxi.txt | 1 +
MAINTAINERS | 1 +
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 263 ++++++++++++++++++++++++
3 files changed, 265 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
diff --git a/Documentation/devicetree/bindings/arm/sunxi.txt b/Documentation/devicetree/bindings/arm/sunxi.txt
index 3975d0a0e4c2..4d6467cc2aa2 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.txt
+++ b/Documentation/devicetree/bindings/arm/sunxi.txt
@@ -14,4 +14,5 @@ using one of the following compatible strings:
allwinner,sun8i-a83t
allwinner,sun8i-h3
allwinner,sun9i-a80
+ allwinner,sun50i-a64
nextthing,gr8
diff --git a/MAINTAINERS b/MAINTAINERS
index 7be47efb2159..926879c05dc6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -983,6 +983,7 @@ L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
S: Maintained
N: sun[x456789]i
F: arch/arm/boot/dts/ntc-gr8*
+F: arch/arm64/boot/dts/allwinner/
ARM/Allwinner SoC Clock Support
M: Emilio L?pez <emilio@elopez.com.ar>
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
new file mode 100644
index 000000000000..0f75fec23dc9
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -0,0 +1,263 @@
+/*
+ * Copyright (C) 2016 ARM Ltd.
+ * based on the Allwinner H3 dtsi:
+ * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/clock/sun50i-a64-ccu.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+#include <dt-bindings/reset/sun50i-a64-ccu.h>
+
+/ {
+ interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu at 0 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <0>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu at 1 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <1>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu at 2 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <2>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu at 3 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ device_type = "cpu";
+ reg = <3>;
+ enable-method = "psci";
+ };
+ };
+
+ osc24M: osc24M_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "osc24M";
+ };
+
+ osc32k: osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "osc32k";
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ ccu: clock at 01c20000 {
+ compatible = "allwinner,sun50i-a64-ccu";
+ reg = <0x01c20000 0x400>;
+ clocks = <&osc24M>, <&osc32k>;
+ clock-names = "hosc", "losc";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ pio: pinctrl at 1c20800 {
+ compatible = "allwinner,sun50i-a64-pinctrl";
+ reg = <0x01c20800 0x400>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_PIO>;
+ gpio-controller;
+ #gpio-cells = <3>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ i2c1_pins: i2c1_pins {
+ allwinner,pins = "PH2", "PH3";
+ allwinner,function = "i2c1";
+ };
+
+ uart0_pins_a: uart0 at 0 {
+ allwinner,pins = "PB8", "PB9";
+ allwinner,function = "uart0";
+ };
+ };
+
+ uart0: serial at 1c28000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28000 0x400>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART0>;
+ resets = <&ccu RST_BUS_UART0>;
+ status = "disabled";
+ };
+
+ uart1: serial at 1c28400 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28400 0x400>;
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART1>;
+ resets = <&ccu RST_BUS_UART1>;
+ status = "disabled";
+ };
+
+ uart2: serial at 1c28800 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28800 0x400>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART2>;
+ resets = <&ccu RST_BUS_UART2>;
+ status = "disabled";
+ };
+
+ uart3: serial at 1c28c00 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28c00 0x400>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART3>;
+ resets = <&ccu RST_BUS_UART3>;
+ status = "disabled";
+ };
+
+ uart4: serial at 1c29000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c29000 0x400>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART4>;
+ resets = <&ccu RST_BUS_UART4>;
+ status = "disabled";
+ };
+
+ rtc: rtc at 1f00000 {
+ compatible = "allwinner,sun6i-a31-rtc";
+ reg = <0x01f00000 0x54>;
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ i2c0: i2c at 1c2ac00 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2ac00 0x400>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C0>;
+ resets = <&ccu RST_BUS_I2C0>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c1: i2c at 1c2b000 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2b000 0x400>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C1>;
+ resets = <&ccu RST_BUS_I2C1>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c2: i2c at 1c2b400 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2b400 0x400>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C2>;
+ resets = <&ccu RST_BUS_I2C2>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ gic: interrupt-controller at 1c81000 {
+ compatible = "arm,gic-400";
+ reg = <0x01c81000 0x1000>,
+ <0x01c82000 0x2000>,
+ <0x01c84000 0x2000>,
+ <0x01c86000 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+ };
+};
--
2.9.3
^ permalink raw reply related
* [PATCH v3 6/9] clk: sunxi-ng: Add A64 clocks
From: Maxime Ripard @ 2016-10-03 8:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161003080913.24197-1-maxime.ripard@free-electrons.com>
Add the A64 CCU clocks set.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
.../devicetree/bindings/clock/sunxi-ccu.txt | 1 +
drivers/clk/sunxi-ng/Kconfig | 11 +
drivers/clk/sunxi-ng/Makefile | 1 +
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 918 +++++++++++++++++++++
drivers/clk/sunxi-ng/ccu-sun50i-a64.h | 72 ++
include/dt-bindings/clock/sun50i-a64-ccu.h | 134 +++
include/dt-bindings/reset/sun50i-a64-ccu.h | 97 +++
7 files changed, 1234 insertions(+)
create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-a64.c
create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-a64.h
create mode 100644 include/dt-bindings/clock/sun50i-a64-ccu.h
create mode 100644 include/dt-bindings/reset/sun50i-a64-ccu.h
diff --git a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
index 3868458a5feb..74d44a4273f2 100644
--- a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
@@ -7,6 +7,7 @@ Required properties :
- "allwinner,sun8i-a23-ccu"
- "allwinner,sun8i-a33-ccu"
- "allwinner,sun8i-h3-ccu"
+ - "allwinner,sun50i-a64-ccu"
- reg: Must contain the registers base address and length
- clocks: phandle to the oscillators feeding the CCU. Two are needed:
diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
index 1b4c55a53d7a..8454c6e3dd65 100644
--- a/drivers/clk/sunxi-ng/Kconfig
+++ b/drivers/clk/sunxi-ng/Kconfig
@@ -53,6 +53,17 @@ config SUNXI_CCU_MP
# SoC Drivers
+config SUN50I_A64_CCU
+ bool "Support for the Allwinner A64 CCU"
+ select SUNXI_CCU_DIV
+ select SUNXI_CCU_NK
+ select SUNXI_CCU_NKM
+ select SUNXI_CCU_NKMP
+ select SUNXI_CCU_NM
+ select SUNXI_CCU_MP
+ select SUNXI_CCU_PHASE
+ default ARM64 && ARCH_SUNXI
+
config SUN6I_A31_CCU
bool "Support for the Allwinner A31/A31s CCU"
select SUNXI_CCU_DIV
diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile
index 106cba27c331..24fbc6e5deb8 100644
--- a/drivers/clk/sunxi-ng/Makefile
+++ b/drivers/clk/sunxi-ng/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_SUNXI_CCU_NM) += ccu_nm.o
obj-$(CONFIG_SUNXI_CCU_MP) += ccu_mp.o
# SoC support
+obj-$(CONFIG_SUN50I_A64_CCU) += ccu-sun50i-a64.o
obj-$(CONFIG_SUN6I_A31_CCU) += ccu-sun6i-a31.o
obj-$(CONFIG_SUN8I_A23_CCU) += ccu-sun8i-a23.o
obj-$(CONFIG_SUN8I_A33_CCU) += ccu-sun8i-a33.o
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
new file mode 100644
index 000000000000..c0e96bf6d104
--- /dev/null
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -0,0 +1,918 @@
+/*
+ * Copyright (c) 2016 Maxime Ripard. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+
+#include "ccu_common.h"
+#include "ccu_reset.h"
+
+#include "ccu_div.h"
+#include "ccu_gate.h"
+#include "ccu_mp.h"
+#include "ccu_mult.h"
+#include "ccu_nk.h"
+#include "ccu_nkm.h"
+#include "ccu_nkmp.h"
+#include "ccu_nm.h"
+#include "ccu_phase.h"
+
+#include "ccu-sun50i-a64.h"
+
+static struct ccu_nkmp pll_cpux_clk = {
+ .enable = BIT(31),
+ .lock = BIT(28),
+ .n = _SUNXI_CCU_MULT(8, 5),
+ .k = _SUNXI_CCU_MULT(4, 2),
+ .m = _SUNXI_CCU_DIV(0, 2),
+ .p = _SUNXI_CCU_DIV_MAX(16, 2, 4),
+ .common = {
+ .reg = 0x000,
+ .hw.init = CLK_HW_INIT("pll-cpux",
+ "osc24M",
+ &ccu_nkmp_ops,
+ 0),
+ },
+};
+
+/*
+ * The Audio PLL is supposed to have 4 outputs: 3 fixed factors from
+ * the base (2x, 4x and 8x), and one variable divider (the one true
+ * pll audio).
+ *
+ * We don't have any need for the variable divider for now, so we just
+ * hardcode it to match with the clock names
+ */
+#define SUN50I_A64_PLL_AUDIO_REG 0x008
+
+static SUNXI_CCU_NM_WITH_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
+ "osc24M", 0x008,
+ 8, 7, /* N */
+ 0, 5, /* M */
+ BIT(31), /* gate */
+ BIT(28), /* lock */
+ 0);
+
+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video0_clk, "pll-video0",
+ "osc24M", 0x010,
+ 8, 7, /* N */
+ 0, 4, /* M */
+ BIT(24), /* frac enable */
+ BIT(25), /* frac select */
+ 270000000, /* frac rate 0 */
+ 297000000, /* frac rate 1 */
+ BIT(31), /* gate */
+ BIT(28), /* lock */
+ 0);
+
+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
+ "osc24M", 0x018,
+ 8, 7, /* N */
+ 0, 4, /* M */
+ BIT(24), /* frac enable */
+ BIT(25), /* frac select */
+ 270000000, /* frac rate 0 */
+ 297000000, /* frac rate 1 */
+ BIT(31), /* gate */
+ BIT(28), /* lock */
+ 0);
+
+static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr0",
+ "osc24M", 0x020,
+ 8, 5, /* N */
+ 4, 2, /* K */
+ 0, 2, /* M */
+ BIT(31), /* gate */
+ BIT(28), /* lock */
+ 0);
+
+static struct ccu_nk pll_periph0_clk = {
+ .enable = BIT(31),
+ .lock = BIT(28),
+ .n = _SUNXI_CCU_MULT(8, 5),
+ .k = _SUNXI_CCU_MULT_MIN(4, 2, 2),
+ .fixed_post_div = 2,
+ .common = {
+ .reg = 0x028,
+ .features = CCU_FEATURE_FIXED_POSTDIV,
+ .hw.init = CLK_HW_INIT("pll-periph0", "osc24M",
+ &ccu_nk_ops, 0),
+ },
+};
+
+static struct ccu_nk pll_periph1_clk = {
+ .enable = BIT(31),
+ .lock = BIT(28),
+ .n = _SUNXI_CCU_MULT(8, 5),
+ .k = _SUNXI_CCU_MULT_MIN(4, 2, 2),
+ .fixed_post_div = 2,
+ .common = {
+ .reg = 0x02c,
+ .features = CCU_FEATURE_FIXED_POSTDIV,
+ .hw.init = CLK_HW_INIT("pll-periph1", "osc24M",
+ &ccu_nk_ops, 0),
+ },
+};
+
+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video1_clk, "pll-video1",
+ "osc24M", 0x030,
+ 8, 7, /* N */
+ 0, 4, /* M */
+ BIT(24), /* frac enable */
+ BIT(25), /* frac select */
+ 270000000, /* frac rate 0 */
+ 297000000, /* frac rate 1 */
+ BIT(31), /* gate */
+ BIT(28), /* lock */
+ 0);
+
+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_gpu_clk, "pll-gpu",
+ "osc24M", 0x038,
+ 8, 7, /* N */
+ 0, 4, /* M */
+ BIT(24), /* frac enable */
+ BIT(25), /* frac select */
+ 270000000, /* frac rate 0 */
+ 297000000, /* frac rate 1 */
+ BIT(31), /* gate */
+ BIT(28), /* lock */
+ 0);
+
+/*
+ * The output function can be changed to something more complex that
+ * we do not handle yet.
+ *
+ * Hardcode the mode so that we don't fall in that case.
+ */
+#define SUN50I_A64_PLL_MIPI_REG 0x040
+
+struct ccu_nkm pll_mipi_clk = {
+ .enable = BIT(31),
+ .lock = BIT(28),
+ .n = _SUNXI_CCU_MULT(8, 4),
+ .k = _SUNXI_CCU_MULT_MIN(4, 2, 2),
+ .m = _SUNXI_CCU_DIV(0, 4),
+ .common = {
+ .reg = 0x040,
+ .hw.init = CLK_HW_INIT("pll-mipi", "pll-video0",
+ &ccu_nkm_ops, 0),
+ },
+};
+
+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_hsic_clk, "pll-hsic",
+ "osc24M", 0x044,
+ 8, 7, /* N */
+ 0, 4, /* M */
+ BIT(24), /* frac enable */
+ BIT(25), /* frac select */
+ 270000000, /* frac rate 0 */
+ 297000000, /* frac rate 1 */
+ BIT(31), /* gate */
+ BIT(28), /* lock */
+ 0);
+
+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_de_clk, "pll-de",
+ "osc24M", 0x048,
+ 8, 7, /* N */
+ 0, 4, /* M */
+ BIT(24), /* frac enable */
+ BIT(25), /* frac select */
+ 270000000, /* frac rate 0 */
+ 297000000, /* frac rate 1 */
+ BIT(31), /* gate */
+ BIT(28), /* lock */
+ 0);
+
+static SUNXI_CCU_NM_WITH_GATE_LOCK(pll_ddr1_clk, "pll-ddr1",
+ "osc24M", 0x04c,
+ 8, 7, /* N */
+ 0, 2, /* M */
+ BIT(31), /* gate */
+ BIT(28), /* lock */
+ 0);
+
+static const char * const cpux_parents[] = { "osc32k", "osc24M",
+ "pll-cpux" , "pll-cpux" };
+static SUNXI_CCU_MUX(cpux_clk, "cpux", cpux_parents,
+ 0x050, 16, 2, CLK_IS_CRITICAL);
+
+static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0);
+
+static const char * const ahb1_parents[] = { "osc32k", "osc24M",
+ "axi" , "pll-periph0" };
+static struct ccu_div ahb1_clk = {
+ .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
+
+ .mux = {
+ .shift = 12,
+ .width = 2,
+
+ .variable_prediv = {
+ .index = 3,
+ .shift = 6,
+ .width = 2,
+ },
+ },
+
+ .common = {
+ .reg = 0x054,
+ .features = CCU_FEATURE_VARIABLE_PREDIV,
+ .hw.init = CLK_HW_INIT_PARENTS("ahb1",
+ ahb1_parents,
+ &ccu_div_ops,
+ 0),
+ },
+};
+
+static struct clk_div_table apb1_div_table[] = {
+ { .val = 0, .div = 2 },
+ { .val = 1, .div = 2 },
+ { .val = 2, .div = 4 },
+ { .val = 3, .div = 8 },
+ { /* Sentinel */ },
+};
+static SUNXI_CCU_DIV_TABLE(apb1_clk, "apb1", "ahb1",
+ 0x054, 8, 2, apb1_div_table, 0);
+
+static const char * const apb2_parents[] = { "osc32k", "osc24M",
+ "pll-periph0-2x" ,
+ "pll-periph0-2x" };
+static SUNXI_CCU_MP_WITH_MUX(apb2_clk, "apb2", apb2_parents, 0x058,
+ 0, 5, /* M */
+ 16, 2, /* P */
+ 24, 2, /* mux */
+ 0);
+
+static const char * const ahb2_parents[] = { "ahb1" , "pll-periph0" };
+static const struct ccu_mux_fixed_prediv ahb2_fixed_predivs[] = {
+ { .index = 1, .div = 2 },
+};
+static struct ccu_mux ahb2_clk = {
+ .mux = {
+ .shift = 0,
+ .width = 1,
+ .fixed_predivs = ahb2_fixed_predivs,
+ .n_predivs = ARRAY_SIZE(ahb2_fixed_predivs),
+ },
+
+ .common = {
+ .reg = 0x05c,
+ .features = CCU_FEATURE_FIXED_PREDIV,
+ .hw.init = CLK_HW_INIT_PARENTS("ahb2",
+ ahb2_parents,
+ &ccu_mux_ops,
+ 0),
+ },
+};
+
+static SUNXI_CCU_GATE(bus_mipi_dsi_clk, "bus-mipi-dsi", "ahb1",
+ 0x060, BIT(1), 0);
+static SUNXI_CCU_GATE(bus_ce_clk, "bus-ce", "ahb1",
+ 0x060, BIT(5), 0);
+static SUNXI_CCU_GATE(bus_dma_clk, "bus-dma", "ahb1",
+ 0x060, BIT(6), 0);
+static SUNXI_CCU_GATE(bus_mmc0_clk, "bus-mmc0", "ahb1",
+ 0x060, BIT(8), 0);
+static SUNXI_CCU_GATE(bus_mmc1_clk, "bus-mmc1", "ahb1",
+ 0x060, BIT(9), 0);
+static SUNXI_CCU_GATE(bus_mmc2_clk, "bus-mmc2", "ahb1",
+ 0x060, BIT(10), 0);
+static SUNXI_CCU_GATE(bus_nand_clk, "bus-nand", "ahb1",
+ 0x060, BIT(13), 0);
+static SUNXI_CCU_GATE(bus_dram_clk, "bus-dram", "ahb1",
+ 0x060, BIT(14), 0);
+static SUNXI_CCU_GATE(bus_emac_clk, "bus-emac", "ahb2",
+ 0x060, BIT(17), 0);
+static SUNXI_CCU_GATE(bus_ts_clk, "bus-ts", "ahb1",
+ 0x060, BIT(18), 0);
+static SUNXI_CCU_GATE(bus_hstimer_clk, "bus-hstimer", "ahb1",
+ 0x060, BIT(19), 0);
+static SUNXI_CCU_GATE(bus_spi0_clk, "bus-spi0", "ahb1",
+ 0x060, BIT(20), 0);
+static SUNXI_CCU_GATE(bus_spi1_clk, "bus-spi1", "ahb1",
+ 0x060, BIT(21), 0);
+static SUNXI_CCU_GATE(bus_otg_clk, "bus-otg", "ahb1",
+ 0x060, BIT(23), 0);
+static SUNXI_CCU_GATE(bus_ehci0_clk, "bus-ehci0", "ahb1",
+ 0x060, BIT(24), 0);
+static SUNXI_CCU_GATE(bus_ehci1_clk, "bus-ehci1", "ahb2",
+ 0x060, BIT(25), 0);
+static SUNXI_CCU_GATE(bus_ohci0_clk, "bus-ohci0", "ahb1",
+ 0x060, BIT(28), 0);
+static SUNXI_CCU_GATE(bus_ohci1_clk, "bus-ohci1", "ahb2",
+ 0x060, BIT(29), 0);
+
+static SUNXI_CCU_GATE(bus_ve_clk, "bus-ve", "ahb1",
+ 0x064, BIT(0), 0);
+static SUNXI_CCU_GATE(bus_tcon0_clk, "bus-tcon0", "ahb1",
+ 0x064, BIT(3), 0);
+static SUNXI_CCU_GATE(bus_tcon1_clk, "bus-tcon1", "ahb1",
+ 0x064, BIT(4), 0);
+static SUNXI_CCU_GATE(bus_deinterlace_clk, "bus-deinterlace", "ahb1",
+ 0x064, BIT(5), 0);
+static SUNXI_CCU_GATE(bus_csi_clk, "bus-csi", "ahb1",
+ 0x064, BIT(8), 0);
+static SUNXI_CCU_GATE(bus_hdmi_clk, "bus-hdmi", "ahb1",
+ 0x064, BIT(11), 0);
+static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "ahb1",
+ 0x064, BIT(12), 0);
+static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "ahb1",
+ 0x064, BIT(20), 0);
+static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "ahb1",
+ 0x064, BIT(21), 0);
+static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "ahb1",
+ 0x064, BIT(22), 0);
+
+static SUNXI_CCU_GATE(bus_codec_clk, "bus-codec", "apb1",
+ 0x068, BIT(0), 0);
+static SUNXI_CCU_GATE(bus_spdif_clk, "bus-spdif", "apb1",
+ 0x068, BIT(1), 0);
+static SUNXI_CCU_GATE(bus_pio_clk, "bus-pio", "apb1",
+ 0x068, BIT(5), 0);
+static SUNXI_CCU_GATE(bus_ths_clk, "bus-ths", "apb1",
+ 0x068, BIT(8), 0);
+static SUNXI_CCU_GATE(bus_i2s0_clk, "bus-i2s0", "apb1",
+ 0x068, BIT(12), 0);
+static SUNXI_CCU_GATE(bus_i2s1_clk, "bus-i2s1", "apb1",
+ 0x068, BIT(13), 0);
+static SUNXI_CCU_GATE(bus_i2s2_clk, "bus-i2s2", "apb1",
+ 0x068, BIT(14), 0);
+
+static SUNXI_CCU_GATE(bus_i2c0_clk, "bus-i2c0", "apb2",
+ 0x06c, BIT(0), 0);
+static SUNXI_CCU_GATE(bus_i2c1_clk, "bus-i2c1", "apb2",
+ 0x06c, BIT(1), 0);
+static SUNXI_CCU_GATE(bus_i2c2_clk, "bus-i2c2", "apb2",
+ 0x06c, BIT(2), 0);
+static SUNXI_CCU_GATE(bus_scr_clk, "bus-scr", "apb2",
+ 0x06c, BIT(5), 0);
+static SUNXI_CCU_GATE(bus_uart0_clk, "bus-uart0", "apb2",
+ 0x06c, BIT(16), 0);
+static SUNXI_CCU_GATE(bus_uart1_clk, "bus-uart1", "apb2",
+ 0x06c, BIT(17), 0);
+static SUNXI_CCU_GATE(bus_uart2_clk, "bus-uart2", "apb2",
+ 0x06c, BIT(18), 0);
+static SUNXI_CCU_GATE(bus_uart3_clk, "bus-uart3", "apb2",
+ 0x06c, BIT(19), 0);
+static SUNXI_CCU_GATE(bus_uart4_clk, "bus-uart4", "apb2",
+ 0x06c, BIT(20), 0);
+
+static SUNXI_CCU_GATE(bus_dbg_clk, "bus-dbg", "ahb1",
+ 0x070, BIT(7), 0);
+
+static struct clk_div_table ths_div_table[] = {
+ { .val = 0, .div = 1 },
+ { .val = 1, .div = 2 },
+ { .val = 2, .div = 4 },
+ { .val = 3, .div = 6 },
+};
+static const char * const ths_parents[] = { "osc24M" };
+static struct ccu_div ths_clk = {
+ .enable = BIT(31),
+ .div = _SUNXI_CCU_DIV_TABLE(0, 2, ths_div_table),
+ .mux = _SUNXI_CCU_MUX(24, 2),
+ .common = {
+ .reg = 0x074,
+ .hw.init = CLK_HW_INIT_PARENTS("ths",
+ ths_parents,
+ &ccu_div_ops,
+ 0),
+ },
+};
+
+static const char * const mod0_default_parents[] = { "osc24M", "pll-periph0",
+ "pll-periph1" };
+static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
+ 0, 4, /* M */
+ 16, 2, /* P */
+ 24, 2, /* mux */
+ BIT(31), /* gate */
+ 0);
+
+static const char * const mmc_default_parents[] = { "osc24M", "pll-periph0-2x",
+ "pll-periph1-2x" };
+static SUNXI_CCU_MP_WITH_MUX_GATE(mmc0_clk, "mmc0", mmc_default_parents, 0x088,
+ 0, 4, /* M */
+ 16, 2, /* P */
+ 24, 2, /* mux */
+ BIT(31), /* gate */
+ 0);
+
+static SUNXI_CCU_MP_WITH_MUX_GATE(mmc1_clk, "mmc1", mmc_default_parents, 0x08c,
+ 0, 4, /* M */
+ 16, 2, /* P */
+ 24, 2, /* mux */
+ BIT(31), /* gate */
+ 0);
+
+static SUNXI_CCU_MP_WITH_MUX_GATE(mmc2_clk, "mmc2", mmc_default_parents, 0x090,
+ 0, 4, /* M */
+ 16, 2, /* P */
+ 24, 2, /* mux */
+ BIT(31), /* gate */
+ 0);
+
+static const char * const ts_parents[] = { "osc24M", "pll-periph0", };
+static SUNXI_CCU_MP_WITH_MUX_GATE(ts_clk, "ts", ts_parents, 0x098,
+ 0, 4, /* M */
+ 16, 2, /* P */
+ 24, 4, /* mux */
+ BIT(31), /* gate */
+ 0);
+
+static SUNXI_CCU_MP_WITH_MUX_GATE(ce_clk, "ce", mmc_default_parents, 0x09c,
+ 0, 4, /* M */
+ 16, 2, /* P */
+ 24, 2, /* mux */
+ BIT(31), /* gate */
+ 0);
+
+
+static SUNXI_CCU_MP_WITH_MUX_GATE(spi0_clk, "spi0", mod0_default_parents, 0x0a0,
+ 0, 4, /* M */
+ 16, 2, /* P */
+ 24, 2, /* mux */
+ BIT(31), /* gate */
+ 0);
+
+static SUNXI_CCU_MP_WITH_MUX_GATE(spi1_clk, "spi1", mod0_default_parents, 0x0a4,
+ 0, 4, /* M */
+ 16, 2, /* P */
+ 24, 2, /* mux */
+ BIT(31), /* gate */
+ 0);
+
+static const char * const i2s_parents[] = { "pll-audio-8x", "pll-audio-4x",
+ "pll-audio-2x", "pll-audio" };
+static SUNXI_CCU_MUX_WITH_GATE(i2s0_clk, "i2s0", i2s_parents,
+ 0x0b0, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
+
+static SUNXI_CCU_MUX_WITH_GATE(i2s1_clk, "i2s1", i2s_parents,
+ 0x0b4, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
+
+static SUNXI_CCU_MUX_WITH_GATE(i2s2_clk, "i2s2", i2s_parents,
+ 0x0b8, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
+
+static SUNXI_CCU_M_WITH_GATE(spdif_clk, "spdif", "pll-audio",
+ 0x0c0, 0, 4, BIT(31), CLK_SET_RATE_PARENT);
+
+static SUNXI_CCU_GATE(usb_phy0_clk, "usb-phy0", "osc24M",
+ 0x0cc, BIT(8), 0);
+static SUNXI_CCU_GATE(usb_phy1_clk, "usb-phy1", "osc24M",
+ 0x0cc, BIT(9), 0);
+static SUNXI_CCU_GATE(usb_hsic_clk, "usb-hsic", "pll-hsic",
+ 0x0cc, BIT(10), 0);
+static SUNXI_CCU_GATE(usb_hsic_12m_clk, "usb-hsic-12M", "osc12M",
+ 0x0cc, BIT(11), 0);
+static SUNXI_CCU_GATE(usb_ohci0_clk, "usb-ohci0", "osc12M",
+ 0x0cc, BIT(16), 0);
+static SUNXI_CCU_GATE(usb_ohci1_clk, "usb-ohci1", "usb-ohci0",
+ 0x0cc, BIT(17), 0);
+
+static const char * const dram_parents[] = { "pll-ddr0", "pll-ddr1" };
+static SUNXI_CCU_M_WITH_MUX(dram_clk, "dram", dram_parents,
+ 0x0f4, 0, 4, 20, 2, CLK_IS_CRITICAL);
+
+static SUNXI_CCU_GATE(dram_ve_clk, "dram-ve", "dram",
+ 0x100, BIT(0), 0);
+static SUNXI_CCU_GATE(dram_csi_clk, "dram-csi", "dram",
+ 0x100, BIT(1), 0);
+static SUNXI_CCU_GATE(dram_deinterlace_clk, "dram-deinterlace", "dram",
+ 0x100, BIT(2), 0);
+static SUNXI_CCU_GATE(dram_ts_clk, "dram-ts", "dram",
+ 0x100, BIT(3), 0);
+
+static const char * const de_parents[] = { "pll-periph0-2x", "pll-de" };
+static SUNXI_CCU_M_WITH_MUX_GATE(de_clk, "de", de_parents,
+ 0x104, 0, 4, 24, 3, BIT(31), 0);
+
+static const char * const tcon0_parents[] = { "pll-mipi", "pll-video0-2x" };
+static const u8 tcon0_table[] = { 0, 2, };
+static SUNXI_CCU_MUX_TABLE_WITH_GATE(tcon0_clk, "tcon0", tcon0_parents,
+ tcon0_table, 0x118, 24, 3, BIT(31),
+ CLK_SET_RATE_PARENT);
+
+static const char * const tcon1_parents[] = { "pll-video0", "pll-video1" };
+static const u8 tcon1_table[] = { 0, 2, };
+struct ccu_div tcon1_clk = {
+ .enable = BIT(31),
+ .div = _SUNXI_CCU_DIV(0, 4),
+ .mux = _SUNXI_CCU_MUX_TABLE(24, 3, tcon1_table),
+ .common = {
+ .reg = 0x11c,
+ .hw.init = CLK_HW_INIT_PARENTS("tcon1",
+ tcon1_parents,
+ &ccu_div_ops,
+ CLK_SET_RATE_PARENT),
+ },
+};
+
+static const char * const deinterlace_parents[] = { "pll-periph0", "pll-periph1" };
+static SUNXI_CCU_M_WITH_MUX_GATE(deinterlace_clk, "deinterlace", deinterlace_parents,
+ 0x124, 0, 4, 24, 3, BIT(31), 0);
+
+static SUNXI_CCU_GATE(csi_misc_clk, "csi-misc", "osc24M",
+ 0x130, BIT(31), 0);
+
+static const char * const csi_sclk_parents[] = { "pll-periph0", "pll-periph1" };
+static SUNXI_CCU_M_WITH_MUX_GATE(csi_sclk_clk, "csi-sclk", csi_sclk_parents,
+ 0x134, 16, 4, 24, 3, BIT(31), 0);
+
+static const char * const csi_mclk_parents[] = { "osc24M", "pll-video1", "pll-periph1" };
+static SUNXI_CCU_M_WITH_MUX_GATE(csi_mclk_clk, "csi-mclk", csi_mclk_parents,
+ 0x134, 0, 5, 8, 3, BIT(15), 0);
+
+static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve", "pll-ve",
+ 0x13c, 16, 3, BIT(31), 0);
+
+static SUNXI_CCU_GATE(ac_dig_clk, "ac-dig", "pll-audio",
+ 0x140, BIT(31), CLK_SET_RATE_PARENT);
+
+static SUNXI_CCU_GATE(ac_dig_4x_clk, "ac-dig-4x", "pll-audio-4x",
+ 0x140, BIT(30), CLK_SET_RATE_PARENT);
+
+static SUNXI_CCU_GATE(avs_clk, "avs", "osc24M",
+ 0x144, BIT(31), 0);
+
+static const char * const hdmi_parents[] = { "pll-video0", "pll-video1" };
+static SUNXI_CCU_M_WITH_MUX_GATE(hdmi_clk, "hdmi", hdmi_parents,
+ 0x150, 0, 4, 24, 2, BIT(31), 0);
+
+static SUNXI_CCU_GATE(hdmi_ddc_clk, "hdmi-ddc", "osc24M",
+ 0x154, BIT(31), 0);
+
+static const char * const mbus_parents[] = { "osc24M", "pll-periph0-2x",
+ "pll-ddr0", "pll-ddr1" };
+static SUNXI_CCU_M_WITH_MUX_GATE(mbus_clk, "mbus", mbus_parents,
+ 0x15c, 0, 3, 24, 2, BIT(31), CLK_IS_CRITICAL);
+
+static const char * const dsi_dphy_parents[] = { "pll-video0", "pll-periph0" };
+static const u8 dsi_dphy_table[] = { 0, 2, };
+static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(dsi_dphy_clk, "dsi-dphy",
+ dsi_dphy_parents, dsi_dphy_table,
+ 0x168, 0, 3, 24, 2, BIT(31), 0);
+
+static SUNXI_CCU_M_WITH_GATE(gpu_clk, "gpu", "pll-gpu",
+ 0x1a0, 0, 3, BIT(31), CLK_SET_RATE_PARENT);
+
+/* Fixed Factor clocks */
+static CLK_FIXED_FACTOR(osc12M_clk, "osc12M", "osc24M", 1, 2, 0);
+
+/* We hardcode the divider to 4 for now */
+static CLK_FIXED_FACTOR(pll_audio_clk, "pll-audio",
+ "pll-audio-base", 4, 1, CLK_SET_RATE_PARENT);
+static CLK_FIXED_FACTOR(pll_audio_2x_clk, "pll-audio-2x",
+ "pll-audio-base", 2, 1, CLK_SET_RATE_PARENT);
+static CLK_FIXED_FACTOR(pll_audio_4x_clk, "pll-audio-4x",
+ "pll-audio-base", 1, 1, CLK_SET_RATE_PARENT);
+static CLK_FIXED_FACTOR(pll_audio_8x_clk, "pll-audio-8x",
+ "pll-audio-base", 1, 2, CLK_SET_RATE_PARENT);
+static CLK_FIXED_FACTOR(pll_periph0_2x_clk, "pll-periph0-2x",
+ "pll-periph0", 1, 2, 0);
+static CLK_FIXED_FACTOR(pll_periph1_2x_clk, "pll-periph1-2x",
+ "pll-periph1", 1, 2, 0);
+static CLK_FIXED_FACTOR(pll_video0_2x_clk, "pll-video0-2x",
+ "pll-video0", 1, 2, CLK_SET_RATE_PARENT);
+
+static struct ccu_common *sun50i_a64_ccu_clks[] = {
+ &pll_cpux_clk.common,
+ &pll_audio_base_clk.common,
+ &pll_video0_clk.common,
+ &pll_ve_clk.common,
+ &pll_ddr0_clk.common,
+ &pll_periph0_clk.common,
+ &pll_periph1_clk.common,
+ &pll_video1_clk.common,
+ &pll_gpu_clk.common,
+ &pll_mipi_clk.common,
+ &pll_hsic_clk.common,
+ &pll_de_clk.common,
+ &pll_ddr1_clk.common,
+ &cpux_clk.common,
+ &axi_clk.common,
+ &ahb1_clk.common,
+ &apb1_clk.common,
+ &apb2_clk.common,
+ &ahb2_clk.common,
+ &bus_mipi_dsi_clk.common,
+ &bus_ce_clk.common,
+ &bus_dma_clk.common,
+ &bus_mmc0_clk.common,
+ &bus_mmc1_clk.common,
+ &bus_mmc2_clk.common,
+ &bus_nand_clk.common,
+ &bus_dram_clk.common,
+ &bus_emac_clk.common,
+ &bus_ts_clk.common,
+ &bus_hstimer_clk.common,
+ &bus_spi0_clk.common,
+ &bus_spi1_clk.common,
+ &bus_otg_clk.common,
+ &bus_ehci0_clk.common,
+ &bus_ehci1_clk.common,
+ &bus_ohci0_clk.common,
+ &bus_ohci1_clk.common,
+ &bus_ve_clk.common,
+ &bus_tcon0_clk.common,
+ &bus_tcon1_clk.common,
+ &bus_deinterlace_clk.common,
+ &bus_csi_clk.common,
+ &bus_hdmi_clk.common,
+ &bus_de_clk.common,
+ &bus_gpu_clk.common,
+ &bus_msgbox_clk.common,
+ &bus_spinlock_clk.common,
+ &bus_codec_clk.common,
+ &bus_spdif_clk.common,
+ &bus_pio_clk.common,
+ &bus_ths_clk.common,
+ &bus_i2s0_clk.common,
+ &bus_i2s1_clk.common,
+ &bus_i2s2_clk.common,
+ &bus_i2c0_clk.common,
+ &bus_i2c1_clk.common,
+ &bus_i2c2_clk.common,
+ &bus_scr_clk.common,
+ &bus_uart0_clk.common,
+ &bus_uart1_clk.common,
+ &bus_uart2_clk.common,
+ &bus_uart3_clk.common,
+ &bus_uart4_clk.common,
+ &bus_dbg_clk.common,
+ &ths_clk.common,
+ &nand_clk.common,
+ &mmc0_clk.common,
+ &mmc1_clk.common,
+ &mmc2_clk.common,
+ &ts_clk.common,
+ &ce_clk.common,
+ &spi0_clk.common,
+ &spi1_clk.common,
+ &i2s0_clk.common,
+ &i2s1_clk.common,
+ &i2s2_clk.common,
+ &spdif_clk.common,
+ &usb_phy0_clk.common,
+ &usb_phy1_clk.common,
+ &usb_hsic_clk.common,
+ &usb_hsic_12m_clk.common,
+ &usb_ohci0_clk.common,
+ &usb_ohci1_clk.common,
+ &dram_clk.common,
+ &dram_ve_clk.common,
+ &dram_csi_clk.common,
+ &dram_deinterlace_clk.common,
+ &dram_ts_clk.common,
+ &de_clk.common,
+ &tcon0_clk.common,
+ &tcon1_clk.common,
+ &deinterlace_clk.common,
+ &csi_misc_clk.common,
+ &csi_sclk_clk.common,
+ &csi_mclk_clk.common,
+ &ve_clk.common,
+ &ac_dig_clk.common,
+ &ac_dig_4x_clk.common,
+ &avs_clk.common,
+ &hdmi_clk.common,
+ &hdmi_ddc_clk.common,
+ &mbus_clk.common,
+ &dsi_dphy_clk.common,
+ &gpu_clk.common,
+};
+
+static struct clk_hw_onecell_data sun50i_a64_hw_clks = {
+ .hws = {
+ [CLK_OSC_12M] = &osc12M_clk.hw,
+ [CLK_PLL_CPUX] = &pll_cpux_clk.common.hw,
+ [CLK_PLL_AUDIO_BASE] = &pll_audio_base_clk.common.hw,
+ [CLK_PLL_AUDIO] = &pll_audio_clk.hw,
+ [CLK_PLL_AUDIO_2X] = &pll_audio_2x_clk.hw,
+ [CLK_PLL_AUDIO_4X] = &pll_audio_4x_clk.hw,
+ [CLK_PLL_AUDIO_8X] = &pll_audio_8x_clk.hw,
+ [CLK_PLL_VIDEO0] = &pll_video0_clk.common.hw,
+ [CLK_PLL_VIDEO0_2X] = &pll_video0_2x_clk.hw,
+ [CLK_PLL_VE] = &pll_ve_clk.common.hw,
+ [CLK_PLL_DDR0] = &pll_ddr0_clk.common.hw,
+ [CLK_PLL_PERIPH0] = &pll_periph0_clk.common.hw,
+ [CLK_PLL_PERIPH0_2X] = &pll_periph0_2x_clk.hw,
+ [CLK_PLL_PERIPH1] = &pll_periph1_clk.common.hw,
+ [CLK_PLL_PERIPH1_2X] = &pll_periph1_2x_clk.hw,
+ [CLK_PLL_VIDEO1] = &pll_video1_clk.common.hw,
+ [CLK_PLL_GPU] = &pll_gpu_clk.common.hw,
+ [CLK_PLL_MIPI] = &pll_mipi_clk.common.hw,
+ [CLK_PLL_HSIC] = &pll_hsic_clk.common.hw,
+ [CLK_PLL_DE] = &pll_de_clk.common.hw,
+ [CLK_PLL_DDR1] = &pll_ddr1_clk.common.hw,
+ [CLK_CPUX] = &cpux_clk.common.hw,
+ [CLK_AXI] = &axi_clk.common.hw,
+ [CLK_AHB1] = &ahb1_clk.common.hw,
+ [CLK_APB1] = &apb1_clk.common.hw,
+ [CLK_APB2] = &apb2_clk.common.hw,
+ [CLK_AHB2] = &ahb2_clk.common.hw,
+ [CLK_BUS_MIPI_DSI] = &bus_mipi_dsi_clk.common.hw,
+ [CLK_BUS_CE] = &bus_ce_clk.common.hw,
+ [CLK_BUS_DMA] = &bus_dma_clk.common.hw,
+ [CLK_BUS_MMC0] = &bus_mmc0_clk.common.hw,
+ [CLK_BUS_MMC1] = &bus_mmc1_clk.common.hw,
+ [CLK_BUS_MMC2] = &bus_mmc2_clk.common.hw,
+ [CLK_BUS_NAND] = &bus_nand_clk.common.hw,
+ [CLK_BUS_DRAM] = &bus_dram_clk.common.hw,
+ [CLK_BUS_EMAC] = &bus_emac_clk.common.hw,
+ [CLK_BUS_TS] = &bus_ts_clk.common.hw,
+ [CLK_BUS_HSTIMER] = &bus_hstimer_clk.common.hw,
+ [CLK_BUS_SPI0] = &bus_spi0_clk.common.hw,
+ [CLK_BUS_SPI1] = &bus_spi1_clk.common.hw,
+ [CLK_BUS_OTG] = &bus_otg_clk.common.hw,
+ [CLK_BUS_EHCI0] = &bus_ehci0_clk.common.hw,
+ [CLK_BUS_EHCI1] = &bus_ehci1_clk.common.hw,
+ [CLK_BUS_OHCI0] = &bus_ohci0_clk.common.hw,
+ [CLK_BUS_OHCI1] = &bus_ohci1_clk.common.hw,
+ [CLK_BUS_VE] = &bus_ve_clk.common.hw,
+ [CLK_BUS_TCON0] = &bus_tcon0_clk.common.hw,
+ [CLK_BUS_TCON1] = &bus_tcon1_clk.common.hw,
+ [CLK_BUS_DEINTERLACE] = &bus_deinterlace_clk.common.hw,
+ [CLK_BUS_CSI] = &bus_csi_clk.common.hw,
+ [CLK_BUS_HDMI] = &bus_hdmi_clk.common.hw,
+ [CLK_BUS_DE] = &bus_de_clk.common.hw,
+ [CLK_BUS_GPU] = &bus_gpu_clk.common.hw,
+ [CLK_BUS_MSGBOX] = &bus_msgbox_clk.common.hw,
+ [CLK_BUS_SPINLOCK] = &bus_spinlock_clk.common.hw,
+ [CLK_BUS_CODEC] = &bus_codec_clk.common.hw,
+ [CLK_BUS_SPDIF] = &bus_spdif_clk.common.hw,
+ [CLK_BUS_PIO] = &bus_pio_clk.common.hw,
+ [CLK_BUS_THS] = &bus_ths_clk.common.hw,
+ [CLK_BUS_I2S0] = &bus_i2s0_clk.common.hw,
+ [CLK_BUS_I2S1] = &bus_i2s1_clk.common.hw,
+ [CLK_BUS_I2S2] = &bus_i2s2_clk.common.hw,
+ [CLK_BUS_I2C0] = &bus_i2c0_clk.common.hw,
+ [CLK_BUS_I2C1] = &bus_i2c1_clk.common.hw,
+ [CLK_BUS_I2C2] = &bus_i2c2_clk.common.hw,
+ [CLK_BUS_UART0] = &bus_uart0_clk.common.hw,
+ [CLK_BUS_UART1] = &bus_uart1_clk.common.hw,
+ [CLK_BUS_UART2] = &bus_uart2_clk.common.hw,
+ [CLK_BUS_UART3] = &bus_uart3_clk.common.hw,
+ [CLK_BUS_UART4] = &bus_uart4_clk.common.hw,
+ [CLK_BUS_SCR] = &bus_scr_clk.common.hw,
+ [CLK_BUS_DBG] = &bus_dbg_clk.common.hw,
+ [CLK_THS] = &ths_clk.common.hw,
+ [CLK_NAND] = &nand_clk.common.hw,
+ [CLK_MMC0] = &mmc0_clk.common.hw,
+ [CLK_MMC1] = &mmc1_clk.common.hw,
+ [CLK_MMC2] = &mmc2_clk.common.hw,
+ [CLK_TS] = &ts_clk.common.hw,
+ [CLK_CE] = &ce_clk.common.hw,
+ [CLK_SPI0] = &spi0_clk.common.hw,
+ [CLK_SPI1] = &spi1_clk.common.hw,
+ [CLK_I2S0] = &i2s0_clk.common.hw,
+ [CLK_I2S1] = &i2s1_clk.common.hw,
+ [CLK_I2S2] = &i2s2_clk.common.hw,
+ [CLK_SPDIF] = &spdif_clk.common.hw,
+ [CLK_USB_PHY0] = &usb_phy0_clk.common.hw,
+ [CLK_USB_PHY1] = &usb_phy1_clk.common.hw,
+ [CLK_USB_HSIC] = &usb_hsic_clk.common.hw,
+ [CLK_USB_HSIC_12M] = &usb_hsic_12m_clk.common.hw,
+ [CLK_USB_OHCI0] = &usb_ohci0_clk.common.hw,
+ [CLK_USB_OHCI1] = &usb_ohci1_clk.common.hw,
+ [CLK_DRAM] = &dram_clk.common.hw,
+ [CLK_DRAM_VE] = &dram_ve_clk.common.hw,
+ [CLK_DRAM_CSI] = &dram_csi_clk.common.hw,
+ [CLK_DRAM_DEINTERLACE] = &dram_deinterlace_clk.common.hw,
+ [CLK_DRAM_TS] = &dram_ts_clk.common.hw,
+ [CLK_DE] = &de_clk.common.hw,
+ [CLK_TCON0] = &tcon0_clk.common.hw,
+ [CLK_TCON1] = &tcon1_clk.common.hw,
+ [CLK_DEINTERLACE] = &deinterlace_clk.common.hw,
+ [CLK_CSI_MISC] = &csi_misc_clk.common.hw,
+ [CLK_CSI_SCLK] = &csi_sclk_clk.common.hw,
+ [CLK_CSI_MCLK] = &csi_mclk_clk.common.hw,
+ [CLK_VE] = &ve_clk.common.hw,
+ [CLK_AC_DIG] = &ac_dig_clk.common.hw,
+ [CLK_AC_DIG_4X] = &ac_dig_4x_clk.common.hw,
+ [CLK_AVS] = &avs_clk.common.hw,
+ [CLK_HDMI] = &hdmi_clk.common.hw,
+ [CLK_HDMI_DDC] = &hdmi_ddc_clk.common.hw,
+ [CLK_MBUS] = &mbus_clk.common.hw,
+ [CLK_DSI_DPHY] = &dsi_dphy_clk.common.hw,
+ [CLK_GPU] = &gpu_clk.common.hw,
+ },
+ .num = CLK_NUMBER,
+};
+
+static struct ccu_reset_map sun50i_a64_ccu_resets[] = {
+ [RST_USB_PHY0] = { 0x0cc, BIT(0) },
+ [RST_USB_PHY1] = { 0x0cc, BIT(1) },
+ [RST_USB_HSIC] = { 0x0cc, BIT(2) },
+
+ [RST_DRAM] = { 0x0f4, BIT(31) },
+ [RST_MBUS] = { 0x0fc, BIT(31) },
+
+ [RST_BUS_MIPI_DSI] = { 0x2c0, BIT(1) },
+ [RST_BUS_CE] = { 0x2c0, BIT(5) },
+ [RST_BUS_DMA] = { 0x2c0, BIT(6) },
+ [RST_BUS_MMC0] = { 0x2c0, BIT(8) },
+ [RST_BUS_MMC1] = { 0x2c0, BIT(9) },
+ [RST_BUS_MMC2] = { 0x2c0, BIT(10) },
+ [RST_BUS_NAND] = { 0x2c0, BIT(13) },
+ [RST_BUS_DRAM] = { 0x2c0, BIT(14) },
+ [RST_BUS_EMAC] = { 0x2c0, BIT(17) },
+ [RST_BUS_TS] = { 0x2c0, BIT(18) },
+ [RST_BUS_HSTIMER] = { 0x2c0, BIT(19) },
+ [RST_BUS_SPI0] = { 0x2c0, BIT(20) },
+ [RST_BUS_SPI1] = { 0x2c0, BIT(21) },
+ [RST_BUS_OTG] = { 0x2c0, BIT(23) },
+ [RST_BUS_EHCI0] = { 0x2c0, BIT(24) },
+ [RST_BUS_EHCI1] = { 0x2c0, BIT(25) },
+ [RST_BUS_OHCI0] = { 0x2c0, BIT(28) },
+ [RST_BUS_OHCI1] = { 0x2c0, BIT(29) },
+
+ [RST_BUS_VE] = { 0x2c4, BIT(0) },
+ [RST_BUS_TCON0] = { 0x2c4, BIT(3) },
+ [RST_BUS_TCON1] = { 0x2c4, BIT(4) },
+ [RST_BUS_DEINTERLACE] = { 0x2c4, BIT(5) },
+ [RST_BUS_CSI] = { 0x2c4, BIT(8) },
+ [RST_BUS_HDMI0] = { 0x2c4, BIT(10) },
+ [RST_BUS_HDMI1] = { 0x2c4, BIT(11) },
+ [RST_BUS_DE] = { 0x2c4, BIT(12) },
+ [RST_BUS_GPU] = { 0x2c4, BIT(20) },
+ [RST_BUS_MSGBOX] = { 0x2c4, BIT(21) },
+ [RST_BUS_SPINLOCK] = { 0x2c4, BIT(22) },
+ [RST_BUS_DBG] = { 0x2c4, BIT(31) },
+
+ [RST_BUS_LVDS] = { 0x2c8, BIT(0) },
+
+ [RST_BUS_CODEC] = { 0x2d0, BIT(0) },
+ [RST_BUS_SPDIF] = { 0x2d0, BIT(1) },
+ [RST_BUS_THS] = { 0x2d0, BIT(8) },
+ [RST_BUS_I2S0] = { 0x2d0, BIT(12) },
+ [RST_BUS_I2S1] = { 0x2d0, BIT(13) },
+ [RST_BUS_I2S2] = { 0x2d0, BIT(14) },
+
+ [RST_BUS_I2C0] = { 0x2d8, BIT(0) },
+ [RST_BUS_I2C1] = { 0x2d8, BIT(1) },
+ [RST_BUS_I2C2] = { 0x2d8, BIT(2) },
+ [RST_BUS_SCR] = { 0x2d8, BIT(5) },
+ [RST_BUS_UART0] = { 0x2d8, BIT(16) },
+ [RST_BUS_UART1] = { 0x2d8, BIT(17) },
+ [RST_BUS_UART2] = { 0x2d8, BIT(18) },
+ [RST_BUS_UART3] = { 0x2d8, BIT(19) },
+ [RST_BUS_UART4] = { 0x2d8, BIT(20) },
+};
+
+static const struct sunxi_ccu_desc sun50i_a64_ccu_desc = {
+ .ccu_clks = sun50i_a64_ccu_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun50i_a64_ccu_clks),
+
+ .hw_clks = &sun50i_a64_hw_clks,
+
+ .resets = sun50i_a64_ccu_resets,
+ .num_resets = ARRAY_SIZE(sun50i_a64_ccu_resets),
+};
+
+static int sun50i_a64_ccu_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ void __iomem *reg;
+ u32 val;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ reg = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(reg)) {
+ dev_err(&pdev->dev, "Could not map the clock registers\n");
+ return PTR_ERR(reg);
+ }
+
+ /* Force the PLL-Audio-1x divider to 4 */
+ val = readl(reg + SUN50I_A64_PLL_AUDIO_REG);
+ val &= ~GENMASK(19, 16);
+ writel(val | (3 << 16), reg + SUN50I_A64_PLL_AUDIO_REG);
+
+ writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG);
+
+ return sunxi_ccu_probe(pdev->dev.of_node, reg, &sun50i_a64_ccu_desc);
+}
+
+static const struct of_device_id sun50i_a64_ccu_ids[] = {
+ { .compatible = "allwinner,sun50i-a64-ccu" },
+ { },
+};
+
+static struct platform_driver sun50i_a64_ccu_driver = {
+ .probe = sun50i_a64_ccu_probe,
+ .driver = {
+ .name = "sun50i-a64-ccu",
+ .of_match_table = sun50i_a64_ccu_ids,
+ },
+};
+builtin_platform_driver(sun50i_a64_ccu_driver);
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
new file mode 100644
index 000000000000..9b3cd24b78d2
--- /dev/null
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2016 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _CCU_SUN50I_A64_H_
+#define _CCU_SUN50I_A64_H_
+
+#include <dt-bindings/clock/sun50i-a64-ccu.h>
+#include <dt-bindings/reset/sun50i-a64-ccu.h>
+
+#define CLK_OSC_12M 0
+#define CLK_PLL_CPUX 1
+#define CLK_PLL_AUDIO_BASE 2
+#define CLK_PLL_AUDIO 3
+#define CLK_PLL_AUDIO_2X 4
+#define CLK_PLL_AUDIO_4X 5
+#define CLK_PLL_AUDIO_8X 6
+#define CLK_PLL_VIDEO0 7
+#define CLK_PLL_VIDEO0_2X 8
+#define CLK_PLL_VE 9
+#define CLK_PLL_DDR0 10
+#define CLK_PLL_PERIPH0 11
+#define CLK_PLL_PERIPH0_2X 12
+#define CLK_PLL_PERIPH1 13
+#define CLK_PLL_PERIPH1_2X 14
+#define CLK_PLL_VIDEO1 15
+#define CLK_PLL_GPU 16
+#define CLK_PLL_MIPI 17
+#define CLK_PLL_HSIC 18
+#define CLK_PLL_DE 19
+#define CLK_PLL_DDR1 20
+#define CLK_CPUX 21
+#define CLK_AXI 22
+#define CLK_APB 23
+#define CLK_AHB1 24
+#define CLK_APB1 25
+#define CLK_APB2 26
+#define CLK_AHB2 27
+
+/* All the bus gates are exported */
+
+/* The first bunch of module clocks are exported */
+
+#define CLK_USB_OHCI0_12M 90
+
+#define CLK_USB_OHCI1_12M 92
+
+#define CLK_DRAM 94
+
+/* All the DRAM gates are exported */
+
+/* Some more module clocks are exported */
+
+#define CLK_MBUS 112
+
+/* And the DSI and GPU module clock is exported */
+
+#define CLK_NUMBER (CLK_GPU + 1)
+
+#endif /* _CCU_SUN50I_A64_H_ */
diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h
new file mode 100644
index 000000000000..370c0a0473fc
--- /dev/null
+++ b/include/dt-bindings/clock/sun50i-a64-ccu.h
@@ -0,0 +1,134 @@
+/*
+ * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
+#define _DT_BINDINGS_CLK_SUN50I_A64_H_
+
+#define CLK_BUS_MIPI_DSI 28
+#define CLK_BUS_CE 29
+#define CLK_BUS_DMA 30
+#define CLK_BUS_MMC0 31
+#define CLK_BUS_MMC1 32
+#define CLK_BUS_MMC2 33
+#define CLK_BUS_NAND 34
+#define CLK_BUS_DRAM 35
+#define CLK_BUS_EMAC 36
+#define CLK_BUS_TS 37
+#define CLK_BUS_HSTIMER 38
+#define CLK_BUS_SPI0 39
+#define CLK_BUS_SPI1 40
+#define CLK_BUS_OTG 41
+#define CLK_BUS_EHCI0 42
+#define CLK_BUS_EHCI1 43
+#define CLK_BUS_OHCI0 44
+#define CLK_BUS_OHCI1 45
+#define CLK_BUS_VE 46
+#define CLK_BUS_TCON0 47
+#define CLK_BUS_TCON1 48
+#define CLK_BUS_DEINTERLACE 49
+#define CLK_BUS_CSI 50
+#define CLK_BUS_HDMI 51
+#define CLK_BUS_DE 52
+#define CLK_BUS_GPU 53
+#define CLK_BUS_MSGBOX 54
+#define CLK_BUS_SPINLOCK 55
+#define CLK_BUS_CODEC 56
+#define CLK_BUS_SPDIF 57
+#define CLK_BUS_PIO 58
+#define CLK_BUS_THS 59
+#define CLK_BUS_I2S0 60
+#define CLK_BUS_I2S1 61
+#define CLK_BUS_I2S2 62
+#define CLK_BUS_I2C0 63
+#define CLK_BUS_I2C1 64
+#define CLK_BUS_I2C2 65
+#define CLK_BUS_SCR 66
+#define CLK_BUS_UART0 67
+#define CLK_BUS_UART1 68
+#define CLK_BUS_UART2 69
+#define CLK_BUS_UART3 70
+#define CLK_BUS_UART4 71
+#define CLK_BUS_DBG 72
+#define CLK_THS 73
+#define CLK_NAND 74
+#define CLK_MMC0 75
+#define CLK_MMC1 76
+#define CLK_MMC2 77
+#define CLK_TS 78
+#define CLK_CE 79
+#define CLK_SPI0 80
+#define CLK_SPI1 81
+#define CLK_I2S0 82
+#define CLK_I2S1 83
+#define CLK_I2S2 84
+#define CLK_SPDIF 85
+#define CLK_USB_PHY0 86
+#define CLK_USB_PHY1 87
+#define CLK_USB_HSIC 88
+#define CLK_USB_HSIC_12M 89
+
+#define CLK_USB_OHCI0 91
+
+#define CLK_USB_OHCI1 93
+
+#define CLK_DRAM_VE 95
+#define CLK_DRAM_CSI 96
+#define CLK_DRAM_DEINTERLACE 97
+#define CLK_DRAM_TS 98
+#define CLK_DE 99
+#define CLK_TCON0 100
+#define CLK_TCON1 101
+#define CLK_DEINTERLACE 102
+#define CLK_CSI_MISC 103
+#define CLK_CSI_SCLK 104
+#define CLK_CSI_MCLK 105
+#define CLK_VE 106
+#define CLK_AC_DIG 107
+#define CLK_AC_DIG_4X 108
+#define CLK_AVS 109
+#define CLK_HDMI 110
+#define CLK_HDMI_DDC 111
+
+#define CLK_DSI_DPHY 113
+#define CLK_GPU 114
+
+#endif /* _DT_BINDINGS_CLK_SUN50I_H_ */
diff --git a/include/dt-bindings/reset/sun50i-a64-ccu.h b/include/dt-bindings/reset/sun50i-a64-ccu.h
new file mode 100644
index 000000000000..e61fac294d73
--- /dev/null
+++ b/include/dt-bindings/reset/sun50i-a64-ccu.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_RST_SUN50I_A64_H_
+#define _DT_BINDINGS_RST_SUN50I_A64_H_
+
+#define RST_USB_PHY0 0
+#define RST_USB_PHY1 1
+#define RST_USB_HSIC 2
+#define RST_MBUS 3
+#define RST_BUS_MIPI_DSI 4
+#define RST_BUS_CE 5
+#define RST_BUS_DMA 6
+#define RST_BUS_MMC0 7
+#define RST_BUS_MMC1 8
+#define RST_BUS_MMC2 9
+#define RST_BUS_NAND 10
+#define RST_BUS_DRAM 11
+#define RST_BUS_EMAC 12
+#define RST_BUS_TS 13
+#define RST_BUS_HSTIMER 14
+#define RST_BUS_SPI0 15
+#define RST_BUS_SPI1 16
+#define RST_BUS_OTG 17
+#define RST_BUS_EHCI0 18
+#define RST_BUS_EHCI1 19
+#define RST_BUS_OHCI0 20
+#define RST_BUS_OHCI1 21
+#define RST_BUS_VE 22
+#define RST_BUS_TCON0 23
+#define RST_BUS_TCON1 24
+#define RST_BUS_DEINTERLACE 25
+#define RST_BUS_CSI 26
+#define RST_BUS_HDMI0 27
+#define RST_BUS_HDMI1 28
+#define RST_BUS_DE 29
+#define RST_BUS_GPU 30
+#define RST_BUS_MSGBOX 31
+#define RST_BUS_SPINLOCK 32
+#define RST_BUS_DBG 33
+#define RST_BUS_LVDS 34
+#define RST_BUS_CODEC 35
+#define RST_BUS_SPDIF 36
+#define RST_BUS_THS 37
+#define RST_BUS_I2S0 38
+#define RST_BUS_I2S1 39
+#define RST_BUS_I2S2 40
+#define RST_BUS_I2C0 41
+#define RST_BUS_I2C1 42
+#define RST_BUS_I2C2 43
+#define RST_BUS_SCR 44
+#define RST_BUS_UART0 45
+#define RST_BUS_UART1 46
+#define RST_BUS_UART2 47
+#define RST_BUS_UART3 48
+#define RST_BUS_UART4 49
+
+#endif /* _DT_BINDINGS_RST_SUN8I_H3_H_ */
--
2.9.3
^ permalink raw reply related
* [PATCH v3 5/9] clk: sunxi-ng: Implement minimum for multipliers
From: Maxime Ripard @ 2016-10-03 8:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161003080913.24197-1-maxime.ripard@free-electrons.com>
Allow the CCU drivers to specify a multiplier for their clocks.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/clk/sunxi-ng/ccu_mult.c | 2 +-
drivers/clk/sunxi-ng/ccu_mult.h | 13 +++++++++----
drivers/clk/sunxi-ng/ccu_nk.c | 8 ++++----
drivers/clk/sunxi-ng/ccu_nkm.c | 8 ++++----
drivers/clk/sunxi-ng/ccu_nkmp.c | 4 ++--
drivers/clk/sunxi-ng/ccu_nm.c | 2 +-
6 files changed, 21 insertions(+), 16 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu_mult.c b/drivers/clk/sunxi-ng/ccu_mult.c
index 6a02ffee5386..678b6cb49f01 100644
--- a/drivers/clk/sunxi-ng/ccu_mult.c
+++ b/drivers/clk/sunxi-ng/ccu_mult.c
@@ -105,7 +105,7 @@ static int ccu_mult_set_rate(struct clk_hw *hw, unsigned long rate,
ccu_mux_helper_adjust_parent_for_prediv(&cm->common, &cm->mux, -1,
&parent_rate);
- _cm.min = 1;
+ _cm.min = cm->mult.min;
_cm.max = 1 << cm->mult.width;
ccu_mult_find_best(parent_rate, rate, &_cm);
diff --git a/drivers/clk/sunxi-ng/ccu_mult.h b/drivers/clk/sunxi-ng/ccu_mult.h
index 113780b7558e..c1a2134bdc71 100644
--- a/drivers/clk/sunxi-ng/ccu_mult.h
+++ b/drivers/clk/sunxi-ng/ccu_mult.h
@@ -7,14 +7,19 @@
struct ccu_mult_internal {
u8 shift;
u8 width;
+ u8 min;
};
-#define _SUNXI_CCU_MULT(_shift, _width) \
- { \
- .shift = _shift, \
- .width = _width, \
+#define _SUNXI_CCU_MULT_MIN(_shift, _width, _min) \
+ { \
+ .shift = _shift, \
+ .width = _width, \
+ .min = _min, \
}
+#define _SUNXI_CCU_MULT(_shift, _width) \
+ _SUNXI_CCU_MULT_MIN(_shift, _width, 1)
+
struct ccu_mult {
u32 enable;
diff --git a/drivers/clk/sunxi-ng/ccu_nk.c b/drivers/clk/sunxi-ng/ccu_nk.c
index a42d870ba0ef..eaf0fdf78d2b 100644
--- a/drivers/clk/sunxi-ng/ccu_nk.c
+++ b/drivers/clk/sunxi-ng/ccu_nk.c
@@ -97,9 +97,9 @@ static long ccu_nk_round_rate(struct clk_hw *hw, unsigned long rate,
if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate *= nk->fixed_post_div;
- _nk.min_n = 1;
+ _nk.min_n = nk->n.min;
_nk.max_n = 1 << nk->n.width;
- _nk.min_k = 1;
+ _nk.min_k = nk->k.min;
_nk.max_k = 1 << nk->k.width;
ccu_nk_find_best(*parent_rate, rate, &_nk);
@@ -122,9 +122,9 @@ static int ccu_nk_set_rate(struct clk_hw *hw, unsigned long rate,
if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate = rate * nk->fixed_post_div;
- _nk.min_n = 1;
+ _nk.min_n = nk->n.min;
_nk.max_n = 1 << nk->n.width;
- _nk.min_k = 1;
+ _nk.min_k = nk->k.min;
_nk.max_k = 1 << nk->k.width;
ccu_nk_find_best(parent_rate, rate, &_nk);
diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
index b2a5fccf2f8c..715b49211ddb 100644
--- a/drivers/clk/sunxi-ng/ccu_nkm.c
+++ b/drivers/clk/sunxi-ng/ccu_nkm.c
@@ -100,9 +100,9 @@ static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
struct ccu_nkm *nkm = data;
struct _ccu_nkm _nkm;
- _nkm.min_n = 1;
+ _nkm.min_n = nkm->n.min;
_nkm.max_n = 1 << nkm->n.width;
- _nkm.min_k = 1;
+ _nkm.min_n = nkm->k.min;
_nkm.max_k = 1 << nkm->k.width;
_nkm.min_m = 1;
_nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
@@ -129,9 +129,9 @@ static int ccu_nkm_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long flags;
u32 reg;
- _nkm.min_n = 1;
+ _nkm.min_n = nkm->n.min;
_nkm.max_n = 1 << nkm->n.width;
- _nkm.min_k = 1;
+ _nkm.min_n = nkm->k.min;
_nkm.max_k = 1 << nkm->k.width;
_nkm.min_m = 1;
_nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
diff --git a/drivers/clk/sunxi-ng/ccu_nkmp.c b/drivers/clk/sunxi-ng/ccu_nkmp.c
index 2c1398192e48..7968e0bac5db 100644
--- a/drivers/clk/sunxi-ng/ccu_nkmp.c
+++ b/drivers/clk/sunxi-ng/ccu_nkmp.c
@@ -107,9 +107,9 @@ static long ccu_nkmp_round_rate(struct clk_hw *hw, unsigned long rate,
struct ccu_nkmp *nkmp = hw_to_ccu_nkmp(hw);
struct _ccu_nkmp _nkmp;
- _nkmp.min_n = 1;
+ _nkmp.min_n = nkmp->n.min;
_nkmp.max_n = 1 << nkmp->n.width;
- _nkmp.min_k = 1;
+ _nkmp.min_n = nkmp->k.min;
_nkmp.max_k = 1 << nkmp->k.width;
_nkmp.min_m = 1;
_nkmp.max_m = nkmp->m.max ?: 1 << nkmp->m.width;
diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
index 2a190bc032a9..b1f3f0e8899d 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.c
+++ b/drivers/clk/sunxi-ng/ccu_nm.c
@@ -93,7 +93,7 @@ static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
struct ccu_nm *nm = hw_to_ccu_nm(hw);
struct _ccu_nm _nm;
- _nm.min_n = 1;
+ _nm.min_n = nm->n.min;
_nm.max_n = 1 << nm->n.width;
_nm.min_m = 1;
_nm.max_m = nm->m.max ?: 1 << nm->m.width;
--
2.9.3
^ permalink raw reply related
* [PATCH v3 4/9] clk: sunxi-ng: Add minimums for all the relevant structures and clocks
From: Maxime Ripard @ 2016-10-03 8:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161003080913.24197-1-maxime.ripard@free-electrons.com>
Modify the current clocks we have to be able to specify the minimum for
each clocks we support, just like we support the max.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/clk/sunxi-ng/ccu_mult.c | 7 ++++++-
drivers/clk/sunxi-ng/ccu_nk.c | 12 ++++++++----
drivers/clk/sunxi-ng/ccu_nkm.c | 18 ++++++++++++------
drivers/clk/sunxi-ng/ccu_nkmp.c | 16 ++++++++++++----
drivers/clk/sunxi-ng/ccu_nm.c | 12 ++++++++----
5 files changed, 46 insertions(+), 19 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu_mult.c b/drivers/clk/sunxi-ng/ccu_mult.c
index 32a1964439a2..6a02ffee5386 100644
--- a/drivers/clk/sunxi-ng/ccu_mult.c
+++ b/drivers/clk/sunxi-ng/ccu_mult.c
@@ -14,7 +14,7 @@
#include "ccu_mult.h"
struct _ccu_mult {
- unsigned long mult, max;
+ unsigned long mult, min, max;
};
static void ccu_mult_find_best(unsigned long parent, unsigned long rate,
@@ -23,6 +23,9 @@ static void ccu_mult_find_best(unsigned long parent, unsigned long rate,
int _mult;
_mult = rate / parent;
+ if (_mult < mult->min)
+ _mult = mult->min;
+
if (_mult > mult->max)
_mult = mult->max;
@@ -37,6 +40,7 @@ static unsigned long ccu_mult_round_rate(struct ccu_mux_internal *mux,
struct ccu_mult *cm = data;
struct _ccu_mult _cm;
+ _cm.min = 1;
_cm.max = 1 << cm->mult.width;
ccu_mult_find_best(parent_rate, rate, &_cm);
@@ -101,6 +105,7 @@ static int ccu_mult_set_rate(struct clk_hw *hw, unsigned long rate,
ccu_mux_helper_adjust_parent_for_prediv(&cm->common, &cm->mux, -1,
&parent_rate);
+ _cm.min = 1;
_cm.max = 1 << cm->mult.width;
ccu_mult_find_best(parent_rate, rate, &_cm);
diff --git a/drivers/clk/sunxi-ng/ccu_nk.c b/drivers/clk/sunxi-ng/ccu_nk.c
index e7e2e75618ef..a42d870ba0ef 100644
--- a/drivers/clk/sunxi-ng/ccu_nk.c
+++ b/drivers/clk/sunxi-ng/ccu_nk.c
@@ -14,8 +14,8 @@
#include "ccu_nk.h"
struct _ccu_nk {
- unsigned long n, max_n;
- unsigned long k, max_k;
+ unsigned long n, min_n, max_n;
+ unsigned long k, min_k, max_k;
};
static void ccu_nk_find_best(unsigned long parent, unsigned long rate,
@@ -25,8 +25,8 @@ static void ccu_nk_find_best(unsigned long parent, unsigned long rate,
unsigned int best_k = 0, best_n = 0;
unsigned int _k, _n;
- for (_k = 1; _k <= nk->max_k; _k++) {
- for (_n = 1; _n <= nk->max_n; _n++) {
+ for (_k = nk->min_k; _k <= nk->max_k; _k++) {
+ for (_n = nk->min_n; _n <= nk->max_n; _n++) {
unsigned long tmp_rate = parent * _n * _k;
if (tmp_rate > rate)
@@ -97,7 +97,9 @@ static long ccu_nk_round_rate(struct clk_hw *hw, unsigned long rate,
if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate *= nk->fixed_post_div;
+ _nk.min_n = 1;
_nk.max_n = 1 << nk->n.width;
+ _nk.min_k = 1;
_nk.max_k = 1 << nk->k.width;
ccu_nk_find_best(*parent_rate, rate, &_nk);
@@ -120,7 +122,9 @@ static int ccu_nk_set_rate(struct clk_hw *hw, unsigned long rate,
if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate = rate * nk->fixed_post_div;
+ _nk.min_n = 1;
_nk.max_n = 1 << nk->n.width;
+ _nk.min_k = 1;
_nk.max_k = 1 << nk->k.width;
ccu_nk_find_best(parent_rate, rate, &_nk);
diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
index 0b08d000eb38..b2a5fccf2f8c 100644
--- a/drivers/clk/sunxi-ng/ccu_nkm.c
+++ b/drivers/clk/sunxi-ng/ccu_nkm.c
@@ -14,9 +14,9 @@
#include "ccu_nkm.h"
struct _ccu_nkm {
- unsigned long n, max_n;
- unsigned long k, max_k;
- unsigned long m, max_m;
+ unsigned long n, min_n, max_n;
+ unsigned long k, min_k, max_k;
+ unsigned long m, min_m, max_m;
};
static void ccu_nkm_find_best(unsigned long parent, unsigned long rate,
@@ -26,9 +26,9 @@ static void ccu_nkm_find_best(unsigned long parent, unsigned long rate,
unsigned long best_n = 0, best_k = 0, best_m = 0;
unsigned long _n, _k, _m;
- for (_k = 1; _k <= nkm->max_k; _k++) {
- for (_n = 1; _n <= nkm->max_n; _n++) {
- for (_m = 1; _n <= nkm->max_m; _m++) {
+ for (_k = nkm->min_k; _k <= nkm->max_k; _k++) {
+ for (_n = nkm->min_n; _n <= nkm->max_n; _n++) {
+ for (_m = nkm->min_m; _n <= nkm->max_m; _m++) {
unsigned long tmp_rate;
tmp_rate = parent * _n * _k / _m;
@@ -100,8 +100,11 @@ static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
struct ccu_nkm *nkm = data;
struct _ccu_nkm _nkm;
+ _nkm.min_n = 1;
_nkm.max_n = 1 << nkm->n.width;
+ _nkm.min_k = 1;
_nkm.max_k = 1 << nkm->k.width;
+ _nkm.min_m = 1;
_nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
ccu_nkm_find_best(parent_rate, rate, &_nkm);
@@ -126,8 +129,11 @@ static int ccu_nkm_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long flags;
u32 reg;
+ _nkm.min_n = 1;
_nkm.max_n = 1 << nkm->n.width;
+ _nkm.min_k = 1;
_nkm.max_k = 1 << nkm->k.width;
+ _nkm.min_m = 1;
_nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
ccu_nkm_find_best(parent_rate, rate, &_nkm);
diff --git a/drivers/clk/sunxi-ng/ccu_nkmp.c b/drivers/clk/sunxi-ng/ccu_nkmp.c
index 4b457d8cce11..2c1398192e48 100644
--- a/drivers/clk/sunxi-ng/ccu_nkmp.c
+++ b/drivers/clk/sunxi-ng/ccu_nkmp.c
@@ -27,10 +27,10 @@ static void ccu_nkmp_find_best(unsigned long parent, unsigned long rate,
unsigned long best_n = 0, best_k = 0, best_m = 0, best_p = 0;
unsigned long _n, _k, _m, _p;
- for (_k = 1; _k <= nkmp->max_k; _k++) {
- for (_n = 1; _n <= nkm->max_n; _n++) {
- for (_m = 1; _n <= nkm->max_m; _m++) {
- for (_p = 1; _p <= nkmp->max_p; _p <<= 1) {
+ for (_k = nkmp->min_k; _k <= nkmp->max_k; _k++) {
+ for (_n = nkmp->min_n; _n <= nkmp->max_n; _n++) {
+ for (_m = nkmp->min_m; _n <= nkmp->max_m; _m++) {
+ for (_p = nkmp->min_p; _p <= nkmp->max_p; _p <<= 1) {
unsigned long tmp_rate;
tmp_rate = parent * _n * _k / (_m * _p);
@@ -107,9 +107,13 @@ static long ccu_nkmp_round_rate(struct clk_hw *hw, unsigned long rate,
struct ccu_nkmp *nkmp = hw_to_ccu_nkmp(hw);
struct _ccu_nkmp _nkmp;
+ _nkmp.min_n = 1;
_nkmp.max_n = 1 << nkmp->n.width;
+ _nkmp.min_k = 1;
_nkmp.max_k = 1 << nkmp->k.width;
+ _nkmp.min_m = 1;
_nkmp.max_m = nkmp->m.max ?: 1 << nkmp->m.width;
+ _nkmp.min_p = 1;
_nkmp.max_p = nkmp->p.max ?: 1 << ((1 << nkmp->p.width) - 1);
ccu_nkmp_find_best(*parent_rate, rate, &_nkmp);
@@ -125,9 +129,13 @@ static int ccu_nkmp_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long flags;
u32 reg;
+ _nkmp.min_n = 1;
_nkmp.max_n = 1 << nkmp->n.width;
+ _nkmp.min_k = 1;
_nkmp.max_k = 1 << nkmp->k.width;
+ _nkmp.min_m = 1;
_nkmp.max_m = nkmp->m.max ?: 1 << nkmp->m.width;
+ _nkmp.min_p = 1;
_nkmp.max_p = nkmp->p.max ?: 1 << ((1 << nkmp->p.width) - 1);
ccu_nkmp_find_best(parent_rate, rate, &_nkmp);
diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
index c6d652289320..2a190bc032a9 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.c
+++ b/drivers/clk/sunxi-ng/ccu_nm.c
@@ -15,8 +15,8 @@
#include "ccu_nm.h"
struct _ccu_nm {
- unsigned long n, max_n;
- unsigned long m, max_m;
+ unsigned long n, min_n, max_n;
+ unsigned long m, min_m, max_m;
};
static void ccu_nm_find_best(unsigned long parent, unsigned long rate,
@@ -26,8 +26,8 @@ static void ccu_nm_find_best(unsigned long parent, unsigned long rate,
unsigned long best_n = 0, best_m = 0;
unsigned long _n, _m;
- for (_n = 1; _n <= nm->max_n; _n++) {
- for (_m = 1; _n <= nm->max_m; _m++) {
+ for (_n = nm->min_n; _n <= nm->max_n; _n++) {
+ for (_m = nm->min_m; _n <= nm->max_m; _m++) {
unsigned long tmp_rate = parent * _n / _m;
if (tmp_rate > rate)
@@ -93,7 +93,9 @@ static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
struct ccu_nm *nm = hw_to_ccu_nm(hw);
struct _ccu_nm _nm;
+ _nm.min_n = 1;
_nm.max_n = 1 << nm->n.width;
+ _nm.min_m = 1;
_nm.max_m = nm->m.max ?: 1 << nm->m.width;
ccu_nm_find_best(*parent_rate, rate, &_nm);
@@ -114,7 +116,9 @@ static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
else
ccu_frac_helper_disable(&nm->common, &nm->frac);
+ _nm.min_n = 1;
_nm.max_n = 1 << nm->n.width;
+ _nm.min_m = 1;
_nm.max_m = nm->m.max ?: 1 << nm->m.width;
ccu_nm_find_best(parent_rate, rate, &_nm);
--
2.9.3
^ permalink raw reply related
* [PATCH v3 3/9] clk: sunxi-ng: Finish to convert to structures for arguments
From: Maxime Ripard @ 2016-10-03 8:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161003080913.24197-1-maxime.ripard@free-electrons.com>
Some clocks still use an explicit list of arguments, which make it a bit
more tedious to add new parameters.
Convert those over to a structure pointer argument to add as many
arguments as possible without having to many noise in our patches, or a
very long list of arguments.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/clk/sunxi-ng/ccu_mult.c | 28 ++++++++++++++++++++--------
drivers/clk/sunxi-ng/ccu_nk.c | 39 ++++++++++++++++++++++-----------------
2 files changed, 42 insertions(+), 25 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu_mult.c b/drivers/clk/sunxi-ng/ccu_mult.c
index 010e9424691d..32a1964439a2 100644
--- a/drivers/clk/sunxi-ng/ccu_mult.c
+++ b/drivers/clk/sunxi-ng/ccu_mult.c
@@ -13,10 +13,20 @@
#include "ccu_gate.h"
#include "ccu_mult.h"
+struct _ccu_mult {
+ unsigned long mult, max;
+};
+
static void ccu_mult_find_best(unsigned long parent, unsigned long rate,
- unsigned int max_n, unsigned int *n)
+ struct _ccu_mult *mult)
{
- *n = rate / parent;
+ int _mult;
+
+ _mult = rate / parent;
+ if (_mult > mult->max)
+ _mult = mult->max;
+
+ mult->mult = _mult;
}
static unsigned long ccu_mult_round_rate(struct ccu_mux_internal *mux,
@@ -25,11 +35,12 @@ static unsigned long ccu_mult_round_rate(struct ccu_mux_internal *mux,
void *data)
{
struct ccu_mult *cm = data;
- unsigned int n;
+ struct _ccu_mult _cm;
- ccu_mult_find_best(parent_rate, rate, 1 << cm->mult.width, &n);
+ _cm.max = 1 << cm->mult.width;
+ ccu_mult_find_best(parent_rate, rate, &_cm);
- return parent_rate * n;
+ return parent_rate * _cm.mult;
}
static void ccu_mult_disable(struct clk_hw *hw)
@@ -83,21 +94,22 @@ static int ccu_mult_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
struct ccu_mult *cm = hw_to_ccu_mult(hw);
+ struct _ccu_mult _cm;
unsigned long flags;
- unsigned int n;
u32 reg;
ccu_mux_helper_adjust_parent_for_prediv(&cm->common, &cm->mux, -1,
&parent_rate);
- ccu_mult_find_best(parent_rate, rate, 1 << cm->mult.width, &n);
+ _cm.max = 1 << cm->mult.width;
+ ccu_mult_find_best(parent_rate, rate, &_cm);
spin_lock_irqsave(cm->common.lock, flags);
reg = readl(cm->common.base + cm->common.reg);
reg &= ~GENMASK(cm->mult.width + cm->mult.shift - 1, cm->mult.shift);
- writel(reg | ((n - 1) << cm->mult.shift),
+ writel(reg | ((_cm.mult - 1) << cm->mult.shift),
cm->common.base + cm->common.reg);
spin_unlock_irqrestore(cm->common.lock, flags);
diff --git a/drivers/clk/sunxi-ng/ccu_nk.c b/drivers/clk/sunxi-ng/ccu_nk.c
index d6fafb397489..e7e2e75618ef 100644
--- a/drivers/clk/sunxi-ng/ccu_nk.c
+++ b/drivers/clk/sunxi-ng/ccu_nk.c
@@ -9,21 +9,24 @@
*/
#include <linux/clk-provider.h>
-#include <linux/rational.h>
#include "ccu_gate.h"
#include "ccu_nk.h"
+struct _ccu_nk {
+ unsigned long n, max_n;
+ unsigned long k, max_k;
+};
+
static void ccu_nk_find_best(unsigned long parent, unsigned long rate,
- unsigned int max_n, unsigned int max_k,
- unsigned int *n, unsigned int *k)
+ struct _ccu_nk *nk)
{
unsigned long best_rate = 0;
unsigned int best_k = 0, best_n = 0;
unsigned int _k, _n;
- for (_k = 1; _k <= max_k; _k++) {
- for (_n = 1; _n <= max_n; _n++) {
+ for (_k = 1; _k <= nk->max_k; _k++) {
+ for (_n = 1; _n <= nk->max_n; _n++) {
unsigned long tmp_rate = parent * _n * _k;
if (tmp_rate > rate)
@@ -37,8 +40,8 @@ static void ccu_nk_find_best(unsigned long parent, unsigned long rate,
}
}
- *k = best_k;
- *n = best_n;
+ nk->k = best_k;
+ nk->n = best_n;
}
static void ccu_nk_disable(struct clk_hw *hw)
@@ -89,16 +92,17 @@ static long ccu_nk_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
{
struct ccu_nk *nk = hw_to_ccu_nk(hw);
- unsigned int n, k;
+ struct _ccu_nk _nk;
if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate *= nk->fixed_post_div;
- ccu_nk_find_best(*parent_rate, rate,
- 1 << nk->n.width, 1 << nk->k.width,
- &n, &k);
+ _nk.max_n = 1 << nk->n.width;
+ _nk.max_k = 1 << nk->k.width;
+
+ ccu_nk_find_best(*parent_rate, rate, &_nk);
+ rate = *parent_rate * _nk.n * _nk.k;
- rate = *parent_rate * n * k;
if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate = rate / nk->fixed_post_div;
@@ -110,15 +114,16 @@ static int ccu_nk_set_rate(struct clk_hw *hw, unsigned long rate,
{
struct ccu_nk *nk = hw_to_ccu_nk(hw);
unsigned long flags;
- unsigned int n, k;
+ struct _ccu_nk _nk;
u32 reg;
if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate = rate * nk->fixed_post_div;
- ccu_nk_find_best(parent_rate, rate,
- 1 << nk->n.width, 1 << nk->k.width,
- &n, &k);
+ _nk.max_n = 1 << nk->n.width;
+ _nk.max_k = 1 << nk->k.width;
+
+ ccu_nk_find_best(parent_rate, rate, &_nk);
spin_lock_irqsave(nk->common.lock, flags);
@@ -126,7 +131,7 @@ static int ccu_nk_set_rate(struct clk_hw *hw, unsigned long rate,
reg &= ~GENMASK(nk->n.width + nk->n.shift - 1, nk->n.shift);
reg &= ~GENMASK(nk->k.width + nk->k.shift - 1, nk->k.shift);
- writel(reg | ((k - 1) << nk->k.shift) | ((n - 1) << nk->n.shift),
+ writel(reg | ((_nk.k - 1) << nk->k.shift) | ((_nk.n - 1) << nk->n.shift),
nk->common.base + nk->common.reg);
spin_unlock_irqrestore(nk->common.lock, flags);
--
2.9.3
^ permalink raw reply related
* [PATCH v3 2/9] clk: sunxi-ng: Remove the use of rational computations
From: Maxime Ripard @ 2016-10-03 8:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161003080913.24197-1-maxime.ripard@free-electrons.com>
While the rational library works great, it doesn't really allow us to add
more constraints, like the minimum.
Remove that in order to be able to deal with the constraints we'll need.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/clk/sunxi-ng/Kconfig | 3 ---
drivers/clk/sunxi-ng/ccu_nkm.c | 31 ++++++++++++-----------
drivers/clk/sunxi-ng/ccu_nkmp.c | 45 +++++++++++++++++-----------------
drivers/clk/sunxi-ng/ccu_nm.c | 54 +++++++++++++++++++++++++++++++----------
4 files changed, 78 insertions(+), 55 deletions(-)
diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
index 254d9526c018..1b4c55a53d7a 100644
--- a/drivers/clk/sunxi-ng/Kconfig
+++ b/drivers/clk/sunxi-ng/Kconfig
@@ -35,17 +35,14 @@ config SUNXI_CCU_NK
config SUNXI_CCU_NKM
bool
- select RATIONAL
select SUNXI_CCU_GATE
config SUNXI_CCU_NKMP
bool
- select RATIONAL
select SUNXI_CCU_GATE
config SUNXI_CCU_NM
bool
- select RATIONAL
select SUNXI_CCU_FRAC
select SUNXI_CCU_GATE
diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
index 059fdc3b4f96..0b08d000eb38 100644
--- a/drivers/clk/sunxi-ng/ccu_nkm.c
+++ b/drivers/clk/sunxi-ng/ccu_nkm.c
@@ -9,7 +9,6 @@
*/
#include <linux/clk-provider.h>
-#include <linux/rational.h>
#include "ccu_gate.h"
#include "ccu_nkm.h"
@@ -28,21 +27,21 @@ static void ccu_nkm_find_best(unsigned long parent, unsigned long rate,
unsigned long _n, _k, _m;
for (_k = 1; _k <= nkm->max_k; _k++) {
- unsigned long tmp_rate;
-
- rational_best_approximation(rate / _k, parent,
- nkm->max_n, nkm->max_m, &_n, &_m);
-
- tmp_rate = parent * _n * _k / _m;
-
- if (tmp_rate > rate)
- continue;
-
- if ((rate - tmp_rate) < (rate - best_rate)) {
- best_rate = tmp_rate;
- best_n = _n;
- best_k = _k;
- best_m = _m;
+ for (_n = 1; _n <= nkm->max_n; _n++) {
+ for (_m = 1; _n <= nkm->max_m; _m++) {
+ unsigned long tmp_rate;
+
+ tmp_rate = parent * _n * _k / _m;
+
+ if (tmp_rate > rate)
+ continue;
+ if ((rate - tmp_rate) < (rate - best_rate)) {
+ best_rate = tmp_rate;
+ best_n = _n;
+ best_k = _k;
+ best_m = _m;
+ }
+ }
}
}
diff --git a/drivers/clk/sunxi-ng/ccu_nkmp.c b/drivers/clk/sunxi-ng/ccu_nkmp.c
index 9769dee99511..4b457d8cce11 100644
--- a/drivers/clk/sunxi-ng/ccu_nkmp.c
+++ b/drivers/clk/sunxi-ng/ccu_nkmp.c
@@ -9,16 +9,15 @@
*/
#include <linux/clk-provider.h>
-#include <linux/rational.h>
#include "ccu_gate.h"
#include "ccu_nkmp.h"
struct _ccu_nkmp {
- unsigned long n, max_n;
- unsigned long k, max_k;
- unsigned long m, max_m;
- unsigned long p, max_p;
+ unsigned long n, min_n, max_n;
+ unsigned long k, min_k, max_k;
+ unsigned long m, min_m, max_m;
+ unsigned long p, min_p, max_p;
};
static void ccu_nkmp_find_best(unsigned long parent, unsigned long rate,
@@ -29,24 +28,24 @@ static void ccu_nkmp_find_best(unsigned long parent, unsigned long rate,
unsigned long _n, _k, _m, _p;
for (_k = 1; _k <= nkmp->max_k; _k++) {
- for (_p = 1; _p <= nkmp->max_p; _p <<= 1) {
- unsigned long tmp_rate;
-
- rational_best_approximation(rate / _k, parent / _p,
- nkmp->max_n, nkmp->max_m,
- &_n, &_m);
-
- tmp_rate = parent * _n * _k / (_m * _p);
-
- if (tmp_rate > rate)
- continue;
-
- if ((rate - tmp_rate) < (rate - best_rate)) {
- best_rate = tmp_rate;
- best_n = _n;
- best_k = _k;
- best_m = _m;
- best_p = _p;
+ for (_n = 1; _n <= nkm->max_n; _n++) {
+ for (_m = 1; _n <= nkm->max_m; _m++) {
+ for (_p = 1; _p <= nkmp->max_p; _p <<= 1) {
+ unsigned long tmp_rate;
+
+ tmp_rate = parent * _n * _k / (_m * _p);
+
+ if (tmp_rate > rate)
+ continue;
+
+ if ((rate - tmp_rate) < (rate - best_rate)) {
+ best_rate = tmp_rate;
+ best_n = _n;
+ best_k = _k;
+ best_m = _m;
+ best_p = _p;
+ }
+ }
}
}
}
diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
index b61bdd8c7a7f..c6d652289320 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.c
+++ b/drivers/clk/sunxi-ng/ccu_nm.c
@@ -9,12 +9,42 @@
*/
#include <linux/clk-provider.h>
-#include <linux/rational.h>
#include "ccu_frac.h"
#include "ccu_gate.h"
#include "ccu_nm.h"
+struct _ccu_nm {
+ unsigned long n, max_n;
+ unsigned long m, max_m;
+};
+
+static void ccu_nm_find_best(unsigned long parent, unsigned long rate,
+ struct _ccu_nm *nm)
+{
+ unsigned long best_rate = 0;
+ unsigned long best_n = 0, best_m = 0;
+ unsigned long _n, _m;
+
+ for (_n = 1; _n <= nm->max_n; _n++) {
+ for (_m = 1; _n <= nm->max_m; _m++) {
+ unsigned long tmp_rate = parent * _n / _m;
+
+ if (tmp_rate > rate)
+ continue;
+
+ if ((rate - tmp_rate) < (rate - best_rate)) {
+ best_rate = tmp_rate;
+ best_n = _n;
+ best_m = _m;
+ }
+ }
+ }
+
+ nm->n = best_n;
+ nm->m = best_m;
+}
+
static void ccu_nm_disable(struct clk_hw *hw)
{
struct ccu_nm *nm = hw_to_ccu_nm(hw);
@@ -61,24 +91,22 @@ static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
{
struct ccu_nm *nm = hw_to_ccu_nm(hw);
- unsigned long max_n, max_m;
- unsigned long n, m;
+ struct _ccu_nm _nm;
- max_n = 1 << nm->n.width;
- max_m = nm->m.max ?: 1 << nm->m.width;
+ _nm.max_n = 1 << nm->n.width;
+ _nm.max_m = nm->m.max ?: 1 << nm->m.width;
- rational_best_approximation(rate, *parent_rate, max_n, max_m, &n, &m);
+ ccu_nm_find_best(*parent_rate, rate, &_nm);
- return *parent_rate * n / m;
+ return *parent_rate * _nm.n / _nm.m;
}
static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
struct ccu_nm *nm = hw_to_ccu_nm(hw);
+ struct _ccu_nm _nm;
unsigned long flags;
- unsigned long max_n, max_m;
- unsigned long n, m;
u32 reg;
if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate))
@@ -86,10 +114,10 @@ static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
else
ccu_frac_helper_disable(&nm->common, &nm->frac);
- max_n = 1 << nm->n.width;
- max_m = nm->m.max ?: 1 << nm->m.width;
+ _nm.max_n = 1 << nm->n.width;
+ _nm.max_m = nm->m.max ?: 1 << nm->m.width;
- rational_best_approximation(rate, parent_rate, max_n, max_m, &n, &m);
+ ccu_nm_find_best(parent_rate, rate, &_nm);
spin_lock_irqsave(nm->common.lock, flags);
@@ -97,7 +125,7 @@ static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift);
reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift);
- writel(reg | ((m - 1) << nm->m.shift) | ((n - 1) << nm->n.shift),
+ writel(reg | ((_nm.m - 1) << nm->m.shift) | ((_nm.n - 1) << nm->n.shift),
nm->common.base + nm->common.reg);
spin_unlock_irqrestore(nm->common.lock, flags);
--
2.9.3
^ permalink raw reply related
* [PATCH v3 1/9] clk: sunxi-ng: Rename the internal structures
From: Maxime Ripard @ 2016-10-03 8:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161003080913.24197-1-maxime.ripard@free-electrons.com>
Rename the structures meant to be embedded in other structures to make it
consistent with the mux structure name
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
drivers/clk/sunxi-ng/ccu_div.h | 6 +++---
drivers/clk/sunxi-ng/ccu_frac.c | 12 ++++++------
drivers/clk/sunxi-ng/ccu_frac.h | 14 +++++++-------
drivers/clk/sunxi-ng/ccu_mp.h | 4 ++--
drivers/clk/sunxi-ng/ccu_mult.h | 4 ++--
drivers/clk/sunxi-ng/ccu_nk.h | 4 ++--
drivers/clk/sunxi-ng/ccu_nkm.h | 6 +++---
drivers/clk/sunxi-ng/ccu_nkmp.h | 8 ++++----
drivers/clk/sunxi-ng/ccu_nm.h | 6 +++---
9 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu_div.h b/drivers/clk/sunxi-ng/ccu_div.h
index 34c338832c0d..06540f7cf41c 100644
--- a/drivers/clk/sunxi-ng/ccu_div.h
+++ b/drivers/clk/sunxi-ng/ccu_div.h
@@ -20,7 +20,7 @@
#include "ccu_mux.h"
/**
- * struct _ccu_div - Internal divider description
+ * struct ccu_div_internal - Internal divider description
* @shift: Bit offset of the divider in its register
* @width: Width of the divider field in its register
* @max: Maximum value allowed for that divider. This is the
@@ -36,7 +36,7 @@
* It is basically a wrapper around the clk_divider functions
* arguments.
*/
-struct _ccu_div {
+struct ccu_div_internal {
u8 shift;
u8 width;
@@ -78,7 +78,7 @@ struct _ccu_div {
struct ccu_div {
u32 enable;
- struct _ccu_div div;
+ struct ccu_div_internal div;
struct ccu_mux_internal mux;
struct ccu_common common;
};
diff --git a/drivers/clk/sunxi-ng/ccu_frac.c b/drivers/clk/sunxi-ng/ccu_frac.c
index 5c4b10cd15b5..8b5eb7756bf7 100644
--- a/drivers/clk/sunxi-ng/ccu_frac.c
+++ b/drivers/clk/sunxi-ng/ccu_frac.c
@@ -14,7 +14,7 @@
#include "ccu_frac.h"
bool ccu_frac_helper_is_enabled(struct ccu_common *common,
- struct _ccu_frac *cf)
+ struct ccu_frac_internal *cf)
{
if (!(common->features & CCU_FEATURE_FRACTIONAL))
return false;
@@ -23,7 +23,7 @@ bool ccu_frac_helper_is_enabled(struct ccu_common *common,
}
void ccu_frac_helper_enable(struct ccu_common *common,
- struct _ccu_frac *cf)
+ struct ccu_frac_internal *cf)
{
unsigned long flags;
u32 reg;
@@ -38,7 +38,7 @@ void ccu_frac_helper_enable(struct ccu_common *common,
}
void ccu_frac_helper_disable(struct ccu_common *common,
- struct _ccu_frac *cf)
+ struct ccu_frac_internal *cf)
{
unsigned long flags;
u32 reg;
@@ -53,7 +53,7 @@ void ccu_frac_helper_disable(struct ccu_common *common,
}
bool ccu_frac_helper_has_rate(struct ccu_common *common,
- struct _ccu_frac *cf,
+ struct ccu_frac_internal *cf,
unsigned long rate)
{
if (!(common->features & CCU_FEATURE_FRACTIONAL))
@@ -63,7 +63,7 @@ bool ccu_frac_helper_has_rate(struct ccu_common *common,
}
unsigned long ccu_frac_helper_read_rate(struct ccu_common *common,
- struct _ccu_frac *cf)
+ struct ccu_frac_internal *cf)
{
u32 reg;
@@ -84,7 +84,7 @@ unsigned long ccu_frac_helper_read_rate(struct ccu_common *common,
}
int ccu_frac_helper_set_rate(struct ccu_common *common,
- struct _ccu_frac *cf,
+ struct ccu_frac_internal *cf,
unsigned long rate)
{
unsigned long flags;
diff --git a/drivers/clk/sunxi-ng/ccu_frac.h b/drivers/clk/sunxi-ng/ccu_frac.h
index e4c670b1cdfe..7b1ee380156f 100644
--- a/drivers/clk/sunxi-ng/ccu_frac.h
+++ b/drivers/clk/sunxi-ng/ccu_frac.h
@@ -18,7 +18,7 @@
#include "ccu_common.h"
-struct _ccu_frac {
+struct ccu_frac_internal {
u32 enable;
u32 select;
@@ -33,21 +33,21 @@ struct _ccu_frac {
}
bool ccu_frac_helper_is_enabled(struct ccu_common *common,
- struct _ccu_frac *cf);
+ struct ccu_frac_internal *cf);
void ccu_frac_helper_enable(struct ccu_common *common,
- struct _ccu_frac *cf);
+ struct ccu_frac_internal *cf);
void ccu_frac_helper_disable(struct ccu_common *common,
- struct _ccu_frac *cf);
+ struct ccu_frac_internal *cf);
bool ccu_frac_helper_has_rate(struct ccu_common *common,
- struct _ccu_frac *cf,
+ struct ccu_frac_internal *cf,
unsigned long rate);
unsigned long ccu_frac_helper_read_rate(struct ccu_common *common,
- struct _ccu_frac *cf);
+ struct ccu_frac_internal *cf);
int ccu_frac_helper_set_rate(struct ccu_common *common,
- struct _ccu_frac *cf,
+ struct ccu_frac_internal *cf,
unsigned long rate);
#endif /* _CCU_FRAC_H_ */
diff --git a/drivers/clk/sunxi-ng/ccu_mp.h b/drivers/clk/sunxi-ng/ccu_mp.h
index edf9215ea8cc..915625e97d98 100644
--- a/drivers/clk/sunxi-ng/ccu_mp.h
+++ b/drivers/clk/sunxi-ng/ccu_mp.h
@@ -29,8 +29,8 @@
struct ccu_mp {
u32 enable;
- struct _ccu_div m;
- struct _ccu_div p;
+ struct ccu_div_internal m;
+ struct ccu_div_internal p;
struct ccu_mux_internal mux;
struct ccu_common common;
};
diff --git a/drivers/clk/sunxi-ng/ccu_mult.h b/drivers/clk/sunxi-ng/ccu_mult.h
index 5d2c8dc14073..113780b7558e 100644
--- a/drivers/clk/sunxi-ng/ccu_mult.h
+++ b/drivers/clk/sunxi-ng/ccu_mult.h
@@ -4,7 +4,7 @@
#include "ccu_common.h"
#include "ccu_mux.h"
-struct _ccu_mult {
+struct ccu_mult_internal {
u8 shift;
u8 width;
};
@@ -18,7 +18,7 @@ struct _ccu_mult {
struct ccu_mult {
u32 enable;
- struct _ccu_mult mult;
+ struct ccu_mult_internal mult;
struct ccu_mux_internal mux;
struct ccu_common common;
};
diff --git a/drivers/clk/sunxi-ng/ccu_nk.h b/drivers/clk/sunxi-ng/ccu_nk.h
index 4b52da0c29fe..437836b80696 100644
--- a/drivers/clk/sunxi-ng/ccu_nk.h
+++ b/drivers/clk/sunxi-ng/ccu_nk.h
@@ -30,8 +30,8 @@ struct ccu_nk {
u32 enable;
u32 lock;
- struct _ccu_mult n;
- struct _ccu_mult k;
+ struct ccu_mult_internal n;
+ struct ccu_mult_internal k;
unsigned int fixed_post_div;
diff --git a/drivers/clk/sunxi-ng/ccu_nkm.h b/drivers/clk/sunxi-ng/ccu_nkm.h
index 35493fddd8ab..34580894f4d1 100644
--- a/drivers/clk/sunxi-ng/ccu_nkm.h
+++ b/drivers/clk/sunxi-ng/ccu_nkm.h
@@ -29,9 +29,9 @@ struct ccu_nkm {
u32 enable;
u32 lock;
- struct _ccu_mult n;
- struct _ccu_mult k;
- struct _ccu_div m;
+ struct ccu_mult_internal n;
+ struct ccu_mult_internal k;
+ struct ccu_div_internal m;
struct ccu_mux_internal mux;
struct ccu_common common;
diff --git a/drivers/clk/sunxi-ng/ccu_nkmp.h b/drivers/clk/sunxi-ng/ccu_nkmp.h
index 5adb0c92a614..a82facbc6144 100644
--- a/drivers/clk/sunxi-ng/ccu_nkmp.h
+++ b/drivers/clk/sunxi-ng/ccu_nkmp.h
@@ -29,10 +29,10 @@ struct ccu_nkmp {
u32 enable;
u32 lock;
- struct _ccu_mult n;
- struct _ccu_mult k;
- struct _ccu_div m;
- struct _ccu_div p;
+ struct ccu_mult_internal n;
+ struct ccu_mult_internal k;
+ struct ccu_div_internal m;
+ struct ccu_div_internal p;
struct ccu_common common;
};
diff --git a/drivers/clk/sunxi-ng/ccu_nm.h b/drivers/clk/sunxi-ng/ccu_nm.h
index 0b7bcd33a2df..e87fd186da78 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.h
+++ b/drivers/clk/sunxi-ng/ccu_nm.h
@@ -30,9 +30,9 @@ struct ccu_nm {
u32 enable;
u32 lock;
- struct _ccu_mult n;
- struct _ccu_div m;
- struct _ccu_frac frac;
+ struct ccu_mult_internal n;
+ struct ccu_div_internal m;
+ struct ccu_frac_internal frac;
struct ccu_common common;
};
--
2.9.3
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